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Merge tag 'for-4.1' of git://git.kernel.org/pub/scm/linux/kernel/git/kishon/linux...
[deliverable/linux.git] / drivers / net / wireless / iwlwifi / mvm / coex.c
CommitLineData
931d4160
EG		 1/******************************************************************************
2 *
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
5 *
6 * GPL LICENSE SUMMARY
7 *
51368bf7 8 * Copyright(c) 2013 - 2014 Intel Corporation. All rights reserved.
8b4139dc 9 * Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH
931d4160
EG		 10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of version 2 of the GNU General Public License as
13 * published by the Free Software Foundation.
14 *
15 * This program is distributed in the hope that it will be useful, but
16 * WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 * General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
23 * USA
24 *
25 * The full GNU General Public License is included in this distribution
26 * in the file called COPYING.
27 *
28 * Contact Information:
29 * Intel Linux Wireless <ilw@linux.intel.com>
30 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
31 *
32 * BSD LICENSE
33 *
51368bf7 34 * Copyright(c) 2013 - 2014 Intel Corporation. All rights reserved.
8b4139dc 35 * Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH
931d4160
EG		 36 * All rights reserved.
37 *
38 * Redistribution and use in source and binary forms, with or without
39 * modification, are permitted provided that the following conditions
40 * are met:
41 *
42 * * Redistributions of source code must retain the above copyright
43 * notice, this list of conditions and the following disclaimer.
44 * * Redistributions in binary form must reproduce the above copyright
45 * notice, this list of conditions and the following disclaimer in
46 * the documentation and/or other materials provided with the
47 * distribution.
48 * * Neither the name Intel Corporation nor the names of its
49 * contributors may be used to endorse or promote products derived
50 * from this software without specific prior written permission.
51 *
52 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
53 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
54 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
55 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
56 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
57 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
58 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
59 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
60 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
61 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
62 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
63 *
64 *****************************************************************************/
65
ee7bea58
EG		 66#include <linux/ieee80211.h>
67#include <linux/etherdevice.h>
2b76ef13
EG		 68#include <net/mac80211.h>
69
5b7ff615 70#include "fw-api-coex.h"
931d4160
EG		 71#include "iwl-modparams.h"
72#include "mvm.h"
f421f9c3 73#include "iwl-debug.h"
931d4160 74
1459f269
EG		 75const u32 iwl_bt_ctl_kill_msk[BT_KILL_MSK_MAX] = {
76 [BT_KILL_MSK_DEFAULT] = 0xfffffc00,
77 [BT_KILL_MSK_NEVER] = 0xffffffff,
78 [BT_KILL_MSK_ALWAYS] = 0,
931d4160
EG		 79};
80
1459f269
EG		 81const u8 iwl_bt_cts_kill_msk[BT_MAX_AG][BT_COEX_MAX_LUT] = {
82 {
83 BT_KILL_MSK_ALWAYS,
84 BT_KILL_MSK_ALWAYS,
85 BT_KILL_MSK_ALWAYS,
86 },
87 {
88 BT_KILL_MSK_NEVER,
89 BT_KILL_MSK_NEVER,
90 BT_KILL_MSK_NEVER,
91 },
92 {
93 BT_KILL_MSK_NEVER,
94 BT_KILL_MSK_NEVER,
95 BT_KILL_MSK_NEVER,
96 },
97 {
98 BT_KILL_MSK_DEFAULT,
99 BT_KILL_MSK_NEVER,
100 BT_KILL_MSK_DEFAULT,
101 },
102};
103
104const u8 iwl_bt_ack_kill_msk[BT_MAX_AG][BT_COEX_MAX_LUT] = {
105 {
106 BT_KILL_MSK_ALWAYS,
107 BT_KILL_MSK_ALWAYS,
108 BT_KILL_MSK_ALWAYS,
109 },
110 {
111 BT_KILL_MSK_ALWAYS,
112 BT_KILL_MSK_ALWAYS,
113 BT_KILL_MSK_ALWAYS,
114 },
115 {
116 BT_KILL_MSK_ALWAYS,
117 BT_KILL_MSK_ALWAYS,
118 BT_KILL_MSK_ALWAYS,
119 },
120 {
121 BT_KILL_MSK_DEFAULT,
122 BT_KILL_MSK_ALWAYS,
123 BT_KILL_MSK_DEFAULT,
124 },
931d4160
EG		 125};
126
dac94da8 127static const __le32 iwl_bt_prio_boost[BT_COEX_BOOST_SIZE] = {
2adc8949
EG		 128 cpu_to_le32(0xf0f0f0f0), /* 50% */
129 cpu_to_le32(0xc0c0c0c0), /* 25% */
130 cpu_to_le32(0xfcfcfcfc), /* 75% */
131 cpu_to_le32(0xfefefefe), /* 87.5% */
931d4160
EG		 132};
133
d1d5e3cd
EG		 134static const __le32 iwl_single_shared_ant[BT_COEX_MAX_LUT][BT_COEX_LUT_SIZE] = {
135 {
136 cpu_to_le32(0x40000000),
137 cpu_to_le32(0x00000000),
138 cpu_to_le32(0x44000000),
139 cpu_to_le32(0x00000000),
140 cpu_to_le32(0x40000000),
141 cpu_to_le32(0x00000000),
142 cpu_to_le32(0x44000000),
143 cpu_to_le32(0x00000000),
144 cpu_to_le32(0xc0004000),
145 cpu_to_le32(0xf0005000),
146 cpu_to_le32(0xc0004000),
147 cpu_to_le32(0xf0005000),
148 },
149 {
150 cpu_to_le32(0x40000000),
151 cpu_to_le32(0x00000000),
152 cpu_to_le32(0x44000000),
153 cpu_to_le32(0x00000000),
154 cpu_to_le32(0x40000000),
155 cpu_to_le32(0x00000000),
156 cpu_to_le32(0x44000000),
157 cpu_to_le32(0x00000000),
158 cpu_to_le32(0xc0004000),
159 cpu_to_le32(0xf0005000),
160 cpu_to_le32(0xc0004000),
161 cpu_to_le32(0xf0005000),
162 },
163 {
164 cpu_to_le32(0x40000000),
165 cpu_to_le32(0x00000000),
166 cpu_to_le32(0x44000000),
167 cpu_to_le32(0x00000000),
168 cpu_to_le32(0x40000000),
169 cpu_to_le32(0x00000000),
170 cpu_to_le32(0x44000000),
171 cpu_to_le32(0x00000000),
172 cpu_to_le32(0xc0004000),
173 cpu_to_le32(0xf0005000),
174 cpu_to_le32(0xc0004000),
175 cpu_to_le32(0xf0005000),
176 },
177};
178
dac94da8
EG		 179static const __le32 iwl_combined_lookup[BT_COEX_MAX_LUT][BT_COEX_LUT_SIZE] = {
180 {
181 /* Tight */
182 cpu_to_le32(0xaaaaaaaa),
183 cpu_to_le32(0xaaaaaaaa),
184 cpu_to_le32(0xaeaaaaaa),
185 cpu_to_le32(0xaaaaaaaa),
186 cpu_to_le32(0xcc00ff28),
187 cpu_to_le32(0x0000aaaa),
188 cpu_to_le32(0xcc00aaaa),
189 cpu_to_le32(0x0000aaaa),
190 cpu_to_le32(0xc0004000),
a6bc9280 191 cpu_to_le32(0x00004000),
dac94da8
EG		 192 cpu_to_le32(0xf0005000),
193 cpu_to_le32(0xf0005000),
194 },
195 {
196 /* Loose */
197 cpu_to_le32(0xaaaaaaaa),
198 cpu_to_le32(0xaaaaaaaa),
199 cpu_to_le32(0xaaaaaaaa),
200 cpu_to_le32(0xaaaaaaaa),
201 cpu_to_le32(0xcc00ff28),
202 cpu_to_le32(0x0000aaaa),
203 cpu_to_le32(0xcc00aaaa),
204 cpu_to_le32(0x0000aaaa),
205 cpu_to_le32(0x00000000),
206 cpu_to_le32(0x00000000),
207 cpu_to_le32(0xf0005000),
208 cpu_to_le32(0xf0005000),
209 },
210 {
211 /* Tx Tx disabled */
212 cpu_to_le32(0xaaaaaaaa),
213 cpu_to_le32(0xaaaaaaaa),
a6bc9280 214 cpu_to_le32(0xeeaaaaaa),
dac94da8
EG		 215 cpu_to_le32(0xaaaaaaaa),
216 cpu_to_le32(0xcc00ff28),
217 cpu_to_le32(0x0000aaaa),
218 cpu_to_le32(0xcc00aaaa),
219 cpu_to_le32(0x0000aaaa),
a6bc9280
EG		 220 cpu_to_le32(0xc0004000),
221 cpu_to_le32(0xc0004000),
222 cpu_to_le32(0xf0005000),
223 cpu_to_le32(0xf0005000),
dac94da8 224 },
931d4160
EG		 225};
226
dac94da8
EG		 227/* 20MHz / 40MHz below / 40Mhz above*/
228static const __le64 iwl_ci_mask[][3] = {
229 /* dummy entry for channel 0 */
230 {cpu_to_le64(0), cpu_to_le64(0), cpu_to_le64(0)},
231 {
232 cpu_to_le64(0x0000001FFFULL),
233 cpu_to_le64(0x0ULL),
234 cpu_to_le64(0x00007FFFFFULL),
235 },
236 {
237 cpu_to_le64(0x000000FFFFULL),
238 cpu_to_le64(0x0ULL),
239 cpu_to_le64(0x0003FFFFFFULL),
240 },
241 {
242 cpu_to_le64(0x000003FFFCULL),
243 cpu_to_le64(0x0ULL),
244 cpu_to_le64(0x000FFFFFFCULL),
245 },
246 {
247 cpu_to_le64(0x00001FFFE0ULL),
248 cpu_to_le64(0x0ULL),
249 cpu_to_le64(0x007FFFFFE0ULL),
250 },
251 {
252 cpu_to_le64(0x00007FFF80ULL),
253 cpu_to_le64(0x00007FFFFFULL),
254 cpu_to_le64(0x01FFFFFF80ULL),
255 },
256 {
257 cpu_to_le64(0x0003FFFC00ULL),
258 cpu_to_le64(0x0003FFFFFFULL),
259 cpu_to_le64(0x0FFFFFFC00ULL),
260 },
261 {
262 cpu_to_le64(0x000FFFF000ULL),
263 cpu_to_le64(0x000FFFFFFCULL),
264 cpu_to_le64(0x3FFFFFF000ULL),
265 },
266 {
267 cpu_to_le64(0x007FFF8000ULL),
268 cpu_to_le64(0x007FFFFFE0ULL),
269 cpu_to_le64(0xFFFFFF8000ULL),
270 },
271 {
272 cpu_to_le64(0x01FFFE0000ULL),
273 cpu_to_le64(0x01FFFFFF80ULL),
274 cpu_to_le64(0xFFFFFE0000ULL),
275 },
276 {
277 cpu_to_le64(0x0FFFF00000ULL),
278 cpu_to_le64(0x0FFFFFFC00ULL),
279 cpu_to_le64(0x0ULL),
280 },
281 {
282 cpu_to_le64(0x3FFFC00000ULL),
283 cpu_to_le64(0x3FFFFFF000ULL),
284 cpu_to_le64(0x0)
285 },
286 {
287 cpu_to_le64(0xFFFE000000ULL),
288 cpu_to_le64(0xFFFFFF8000ULL),
289 cpu_to_le64(0x0)
290 },
291 {
292 cpu_to_le64(0xFFF8000000ULL),
293 cpu_to_le64(0xFFFFFE0000ULL),
294 cpu_to_le64(0x0)
295 },
296 {
d2ccc902 297 cpu_to_le64(0xFFC0000000ULL),
dac94da8 298 cpu_to_le64(0x0ULL),
d2ccc902 299 cpu_to_le64(0x0ULL)
dac94da8 300 },
931d4160
EG		 301};
302
b9fae2d5
EG		 303struct corunning_block_luts {
304 u8 range;
305 __le32 lut20[BT_COEX_CORUN_LUT_SIZE];
306};
307
308/*
309 * Ranges for the antenna coupling calibration / co-running block LUT:
310 * LUT0: [ 0, 12[
311 * LUT1: [12, 20[
312 * LUT2: [20, 21[
313 * LUT3: [21, 23[
314 * LUT4: [23, 27[
315 * LUT5: [27, 30[
316 * LUT6: [30, 32[
317 * LUT7: [32, 33[
318 * LUT8: [33, - [
319 */
320static const struct corunning_block_luts antenna_coupling_ranges[] = {
321 {
322 .range = 0,
323 .lut20 = {
324 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
325 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
326 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
327 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
328 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
329 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
330 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
331 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
332 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
333 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
334 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
335 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
336 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
337 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
338 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
339 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
340 },
341 },
342 {
343 .range = 12,
344 .lut20 = {
e583b50c 345 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
b9fae2d5
EG		 346 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
347 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
348 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
349 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
350 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
351 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
352 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
353 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
354 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
355 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
356 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
357 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
358 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
359 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
360 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
361 },
362 },
363 {
364 .range = 20,
365 .lut20 = {
e583b50c 366 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
b9fae2d5
EG		 367 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
368 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
369 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
370 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
371 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
372 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
373 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
374 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
375 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
376 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
377 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
378 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
379 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
380 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
381 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
382 },
383 },
384 {
385 .range = 21,
386 .lut20 = {
e583b50c 387 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
b9fae2d5
EG		 388 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
389 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
390 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
391 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
392 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
393 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
394 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
395 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
396 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
397 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
398 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
399 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
400 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
401 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
402 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
403 },
404 },
405 {
406 .range = 23,
407 .lut20 = {
e583b50c 408 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
b9fae2d5
EG		 409 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
410 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
411 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
412 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
413 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
414 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
415 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
416 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
417 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
418 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
419 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
420 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
421 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
422 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
423 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
424 },
425 },
426 {
427 .range = 27,
428 .lut20 = {
e583b50c 429 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
b9fae2d5
EG		 430 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
431 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
432 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
433 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
434 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
435 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
436 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
437 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
438 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
439 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
440 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
441 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
442 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
443 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
444 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
445 },
446 },
447 {
448 .range = 30,
449 .lut20 = {
e583b50c 450 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
b9fae2d5
EG		 451 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
452 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
453 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
454 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
455 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
456 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
457 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
458 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
459 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
460 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
461 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
462 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
463 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
464 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
465 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
466 },
467 },
468 {
469 .range = 32,
470 .lut20 = {
e583b50c 471 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
b9fae2d5
EG		 472 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
473 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
474 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
475 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
476 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
477 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
478 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
479 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
480 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
481 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
482 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
483 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
484 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
485 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
486 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
487 },
488 },
489 {
490 .range = 33,
491 .lut20 = {
e583b50c 492 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
b9fae2d5
EG		 493 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
494 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
495 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
496 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
497 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
498 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
499 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
500 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
501 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
502 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
503 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
504 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
505 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
506 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
507 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
508 },
509 },
510};
511
4515f30f
EG		 512static enum iwl_bt_coex_lut_type
513iwl_get_coex_type(struct iwl_mvm *mvm, const struct ieee80211_vif *vif)
514{
515 struct ieee80211_chanctx_conf *chanctx_conf;
516 enum iwl_bt_coex_lut_type ret;
517 u16 phy_ctx_id;
430a3bba 518 u32 primary_ch_phy_id, secondary_ch_phy_id;
4515f30f 519
9145d151
EG		 520 /*
521 * Checking that we hold mvm->mutex is a good idea, but the rate
522 * control can't acquire the mutex since it runs in Tx path.
523 * So this is racy in that case, but in the worst case, the AMPDU
524 * size limit will be wrong for a short time which is not a big
525 * issue.
526 */
4515f30f
EG		 527
528 rcu_read_lock();
529
530 chanctx_conf = rcu_dereference(vif->chanctx_conf);
531
532 if (!chanctx_conf ||
533 chanctx_conf->def.chan->band != IEEE80211_BAND_2GHZ) {
534 rcu_read_unlock();
7fa4fa0c 535 return BT_COEX_INVALID_LUT;
4515f30f
EG		 536 }
537
538 ret = BT_COEX_TX_DIS_LUT;
539
39149911
EG		 540 if (mvm->cfg->bt_shared_single_ant) {
541 rcu_read_unlock();
542 return ret;
543 }
544
4515f30f 545 phy_ctx_id = *((u16 *)chanctx_conf->drv_priv);
430a3bba
EG		 546 primary_ch_phy_id = le32_to_cpu(mvm->last_bt_ci_cmd.primary_ch_phy_id);
547 secondary_ch_phy_id =
548 le32_to_cpu(mvm->last_bt_ci_cmd.secondary_ch_phy_id);
4515f30f 549
430a3bba 550 if (primary_ch_phy_id == phy_ctx_id)
4515f30f 551 ret = le32_to_cpu(mvm->last_bt_notif.primary_ch_lut);
430a3bba 552 else if (secondary_ch_phy_id == phy_ctx_id)
4515f30f
EG		 553 ret = le32_to_cpu(mvm->last_bt_notif.secondary_ch_lut);
554 /* else - default = TX TX disallowed */
555
556 rcu_read_unlock();
557
558 return ret;
559}
560
931d4160
EG		 561int iwl_send_bt_init_conf(struct iwl_mvm *mvm)
562{
430a3bba 563 struct iwl_bt_coex_cmd *bt_cmd;
03e304e4
EG		 564 struct iwl_host_cmd cmd = {
565 .id = BT_CONFIG,
566 .len = { sizeof(*bt_cmd), },
567 .dataflags = { IWL_HCMD_DFL_NOCOPY, },
931d4160
EG		 568 };
569 int ret;
430a3bba 570 u32 mode;
dac94da8 571
0ea8d043
EG		 572 if (!(mvm->fw->ucode_capa.api[0] & IWL_UCODE_TLV_API_BT_COEX_SPLIT))
573 return iwl_send_bt_init_conf_old(mvm);
574
03e304e4
EG		 575 bt_cmd = kzalloc(sizeof(*bt_cmd), GFP_KERNEL);
576 if (!bt_cmd)
577 return -ENOMEM;
578 cmd.data[0] = bt_cmd;
579
a39979a8
EG		 580 lockdep_assert_held(&mvm->mutex);
581
582 if (unlikely(mvm->bt_force_ant_mode != BT_FORCE_ANT_DIS)) {
583 switch (mvm->bt_force_ant_mode) {
a39979a8 584 case BT_FORCE_ANT_BT:
430a3bba 585 mode = BT_COEX_BT;
a39979a8
EG		 586 break;
587 case BT_FORCE_ANT_WIFI:
430a3bba 588 mode = BT_COEX_WIFI;
a39979a8
EG		 589 break;
590 default:
591 WARN_ON(1);
430a3bba 592 mode = 0;
a39979a8
EG		 593 }
594
430a3bba 595 bt_cmd->mode = cpu_to_le32(mode);
a39979a8
EG		 596 goto send_cmd;
597 }
598
430a3bba
EG		 599 bt_cmd->max_kill = cpu_to_le32(5);
600 bt_cmd->bt4_antenna_isolation_thr =
f3b2098d 601 cpu_to_le32(IWL_MVM_BT_COEX_ANTENNA_COUPLING_THRS);
430a3bba
EG		 602 bt_cmd->bt4_tx_tx_delta_freq_thr = cpu_to_le32(15);
603 bt_cmd->bt4_tx_rx_max_freq0 = cpu_to_le32(15);
604 bt_cmd->override_primary_lut = cpu_to_le32(BT_COEX_INVALID_LUT);
605 bt_cmd->override_secondary_lut = cpu_to_le32(BT_COEX_INVALID_LUT);
606
607 mode = iwlwifi_mod_params.bt_coex_active ? BT_COEX_NW : BT_COEX_DISABLE;
608 bt_cmd->mode = cpu_to_le32(mode);
dac94da8 609
741e703b 610 if (IWL_MVM_BT_COEX_SYNC2SCO)
430a3bba
EG		 611 bt_cmd->enabled_modules |=
612 cpu_to_le32(BT_COEX_SYNC2SCO_ENABLED);
741e703b 613
430a3bba
EG		 614 if (IWL_MVM_BT_COEX_CORUNNING)
615 bt_cmd->enabled_modules |= cpu_to_le32(BT_COEX_CORUN_ENABLED);
b9fae2d5 616
cdb00563 617 if (IWL_MVM_BT_COEX_MPLUT) {
430a3bba
EG		 618 bt_cmd->enabled_modules |= cpu_to_le32(BT_COEX_MPLUT_ENABLED);
619 bt_cmd->enabled_modules |=
620 cpu_to_le32(BT_COEX_MPLUT_BOOST_ENABLED);
cdb00563
EG		 621 }
622
261c0ec0
EG		 623 bt_cmd->enabled_modules |= cpu_to_le32(BT_COEX_HIGH_BAND_RET);
624
d1d5e3cd
EG		 625 if (mvm->cfg->bt_shared_single_ant)
626 memcpy(&bt_cmd->decision_lut, iwl_single_shared_ant,
627 sizeof(iwl_single_shared_ant));
628 else
629 memcpy(&bt_cmd->decision_lut, iwl_combined_lookup,
630 sizeof(iwl_combined_lookup));
631
430a3bba 632 memcpy(&bt_cmd->mplut_prio_boost, iwl_bt_prio_boost,
dac94da8 633 sizeof(iwl_bt_prio_boost));
ee00aed1
EG		 634 bt_cmd->multiprio_lut[0] = cpu_to_le32(IWL_MVM_BT_COEX_MPLUT_REG0);
635 bt_cmd->multiprio_lut[1] = cpu_to_le32(IWL_MVM_BT_COEX_MPLUT_REG1);
931d4160 636
a39979a8 637send_cmd:
2b76ef13 638 memset(&mvm->last_bt_notif, 0, sizeof(mvm->last_bt_notif));
dac94da8 639 memset(&mvm->last_bt_ci_cmd, 0, sizeof(mvm->last_bt_ci_cmd));
2b76ef13 640
03e304e4 641 ret = iwl_mvm_send_cmd(mvm, &cmd);
931d4160 642
03e304e4
EG		 643 kfree(bt_cmd);
644 return ret;
931d4160 645}
f421f9c3 646
1459f269 647static int iwl_mvm_bt_udpate_sw_boost(struct iwl_mvm *mvm)
2b76ef13 648{
430a3bba 649 struct iwl_bt_coex_profile_notif *notif = &mvm->last_bt_notif;
1459f269
EG		 650 u32 primary_lut = le32_to_cpu(notif->primary_ch_lut);
651 u32 secondary_lut = le32_to_cpu(notif->secondary_ch_lut);
652 u32 ag = le32_to_cpu(notif->bt_activity_grading);
653 struct iwl_bt_coex_sw_boost_update_cmd cmd = {};
654 u8 ack_kill_msk[NUM_PHY_CTX] = {};
655 u8 cts_kill_msk[NUM_PHY_CTX] = {};
656 int i;
2b76ef13
EG		 657
658 lockdep_assert_held(&mvm->mutex);
659
1459f269
EG		 660 ack_kill_msk[0] = iwl_bt_ack_kill_msk[ag][primary_lut];
661 cts_kill_msk[0] = iwl_bt_cts_kill_msk[ag][primary_lut];
2b76ef13 662
1459f269
EG		 663 ack_kill_msk[1] = iwl_bt_ack_kill_msk[ag][secondary_lut];
664 cts_kill_msk[1] = iwl_bt_cts_kill_msk[ag][secondary_lut];
2b76ef13
EG		 665
666 /* Don't send HCMD if there is no update */
1459f269
EG		 667 if (!memcmp(ack_kill_msk, mvm->bt_ack_kill_msk, sizeof(ack_kill_msk)) ||
668 !memcmp(cts_kill_msk, mvm->bt_cts_kill_msk, sizeof(cts_kill_msk)))
2b76ef13
EG		 669 return 0;
670
1459f269
EG		 671 memcpy(mvm->bt_ack_kill_msk, ack_kill_msk,
672 sizeof(mvm->bt_ack_kill_msk));
673 memcpy(mvm->bt_cts_kill_msk, cts_kill_msk,
674 sizeof(mvm->bt_cts_kill_msk));
03e304e4 675
1459f269 676 BUILD_BUG_ON(ARRAY_SIZE(ack_kill_msk) < ARRAY_SIZE(cmd.boost_values));
03e304e4 677
1459f269
EG		 678 for (i = 0; i < ARRAY_SIZE(cmd.boost_values); i++) {
679 cmd.boost_values[i].kill_ack_msk =
680 cpu_to_le32(iwl_bt_ctl_kill_msk[ack_kill_msk[i]]);
681 cmd.boost_values[i].kill_cts_msk =
682 cpu_to_le32(iwl_bt_ctl_kill_msk[cts_kill_msk[i]]);
683 }
03e304e4 684
df878f38
EG		 685 return iwl_mvm_send_cmd_pdu(mvm, BT_COEX_UPDATE_SW_BOOST, 0,
686 sizeof(cmd), &cmd);
2b76ef13
EG		 687}
688
1fa477c6
EG		 689static int iwl_mvm_bt_coex_reduced_txp(struct iwl_mvm *mvm, u8 sta_id,
690 bool enable)
2b76ef13 691{
455e7ac5 692 struct iwl_bt_coex_reduced_txp_update_cmd cmd = {};
2b76ef13 693 struct iwl_mvm_sta *mvmsta;
455e7ac5 694 u32 value;
03e304e4 695 int ret;
2b76ef13 696
f327b04c
EG		 697 mvmsta = iwl_mvm_sta_from_staid_protected(mvm, sta_id);
698 if (!mvmsta)
2b76ef13
EG		 699 return 0;
700
2b76ef13 701 /* nothing to do */
1fa477c6 702 if (mvmsta->bt_reduced_txpower == enable)
2b76ef13
EG		 703 return 0;
704
455e7ac5 705 value = mvmsta->sta_id;
03e304e4 706
2b76ef13 707 if (enable)
455e7ac5 708 value |= BT_REDUCED_TX_POWER_BIT;
2b76ef13
EG		 709
710 IWL_DEBUG_COEX(mvm, "%sable reduced Tx Power for sta %d\n",
711 enable ? "en" : "dis", sta_id);
712
455e7ac5 713 cmd.reduced_txp = cpu_to_le32(value);
2b76ef13
EG		 714 mvmsta->bt_reduced_txpower = enable;
715
455e7ac5
EG		 716 ret = iwl_mvm_send_cmd_pdu(mvm, BT_COEX_UPDATE_REDUCED_TXP, CMD_ASYNC,
717 sizeof(cmd), &cmd);
03e304e4 718
03e304e4 719 return ret;
2b76ef13
EG		 720}
721
722struct iwl_bt_iterator_data {
430a3bba 723 struct iwl_bt_coex_profile_notif *notif;
2b76ef13 724 struct iwl_mvm *mvm;
dac94da8
EG		 725 struct ieee80211_chanctx_conf *primary;
726 struct ieee80211_chanctx_conf *secondary;
0ee5bcdd 727 bool primary_ll;
7da052b8
EG		 728};
729
f6fc5775
EG		 730static inline
731void iwl_mvm_bt_coex_enable_rssi_event(struct iwl_mvm *mvm,
732 struct ieee80211_vif *vif,
733 bool enable, int rssi)
734{
735 struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif);
736
737 mvmvif->bf_data.last_bt_coex_event = rssi;
738 mvmvif->bf_data.bt_coex_max_thold =
8286d9f5 739 enable ? -IWL_MVM_BT_COEX_EN_RED_TXP_THRESH : 0;
f6fc5775 740 mvmvif->bf_data.bt_coex_min_thold =
8286d9f5 741 enable ? -IWL_MVM_BT_COEX_DIS_RED_TXP_THRESH : 0;
f6fc5775
EG		 742}
743
dac94da8 744/* must be called under rcu_read_lock */
7da052b8
EG		 745static void iwl_mvm_bt_notif_iterator(void *_data, u8 *mac,
746 struct ieee80211_vif *vif)
747{
748 struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif);
2b76ef13
EG		 749 struct iwl_bt_iterator_data *data = _data;
750 struct iwl_mvm *mvm = data->mvm;
7da052b8 751 struct ieee80211_chanctx_conf *chanctx_conf;
582de30a
JB		 752 /* default smps_mode is AUTOMATIC - only used for client modes */
753 enum ieee80211_smps_mode smps_mode = IEEE80211_SMPS_AUTOMATIC;
f6415f6b 754 u32 bt_activity_grading;
2b76ef13 755 int ave_rssi;
7da052b8 756
9ee718aa 757 lockdep_assert_held(&mvm->mutex);
7da052b8 758
f6415f6b
EG		 759 switch (vif->type) {
760 case NL80211_IFTYPE_STATION:
f6415f6b
EG		 761 break;
762 case NL80211_IFTYPE_AP:
45bbb2ca 763 if (!mvmvif->ap_ibss_active)
f6415f6b 764 return;
f6415f6b
EG		 765 break;
766 default:
767 return;
768 }
7da052b8 769
dac94da8
EG		 770 chanctx_conf = rcu_dereference(vif->chanctx_conf);
771
772 /* If channel context is invalid or not on 2.4GHz .. */
773 if ((!chanctx_conf ||
774 chanctx_conf->def.chan->band != IEEE80211_BAND_2GHZ)) {
0f618e6e 775 if (vif->type == NL80211_IFTYPE_STATION) {
45bbb2ca
EG		 776 /* ... relax constraints and disable rssi events */
777 iwl_mvm_update_smps(mvm, vif, IWL_MVM_SMPS_REQ_BT_COEX,
778 smps_mode);
0f618e6e
EG		 779 iwl_mvm_bt_coex_reduced_txp(mvm, mvmvif->ap_sta_id,
780 false);
f6415f6b 781 iwl_mvm_bt_coex_enable_rssi_event(mvm, vif, false, 0);
0f618e6e 782 }
41069b46 783 return;
dac94da8
EG		 784 }
785
f6415f6b
EG		 786 bt_activity_grading = le32_to_cpu(data->notif->bt_activity_grading);
787 if (bt_activity_grading >= BT_HIGH_TRAFFIC)
788 smps_mode = IEEE80211_SMPS_STATIC;
789 else if (bt_activity_grading >= BT_LOW_TRAFFIC)
45bbb2ca 790 smps_mode = IEEE80211_SMPS_DYNAMIC;
4d66449a 791
582de30a 792 /* relax SMPS constraints for next association */
4d66449a
EG		 793 if (!vif->bss_conf.assoc)
794 smps_mode = IEEE80211_SMPS_AUTOMATIC;
795
4cd4b50c
EG		 796 if (mvmvif->phy_ctxt &&
797 IWL_COEX_IS_RRC_ON(mvm->last_bt_notif.ttc_rrc_status,
4c86f938
EG		 798 mvmvif->phy_ctxt->id))
799 smps_mode = IEEE80211_SMPS_AUTOMATIC;
800
f6415f6b 801 IWL_DEBUG_COEX(data->mvm,
430a3bba
EG		 802 "mac %d: bt_activity_grading %d smps_req %d\n",
803 mvmvif->id, bt_activity_grading, smps_mode);
f6415f6b 804
45bbb2ca
EG		 805 if (vif->type == NL80211_IFTYPE_STATION)
806 iwl_mvm_update_smps(mvm, vif, IWL_MVM_SMPS_REQ_BT_COEX,
807 smps_mode);
f6415f6b 808
0ee5bcdd
EG		 809 /* low latency is always primary */
810 if (iwl_mvm_vif_low_latency(mvmvif)) {
811 data->primary_ll = true;
812
813 data->secondary = data->primary;
814 data->primary = chanctx_conf;
815 }
816
dac94da8 817 if (vif->type == NL80211_IFTYPE_AP) {
5023d966 818 if (!mvmvif->ap_ibss_active)
dac94da8
EG		 819 return;
820
dac94da8
EG		 821 if (chanctx_conf == data->primary)
822 return;
823
0ee5bcdd
EG		 824 if (!data->primary_ll) {
825 /*
826 * downgrade the current primary no matter what its
827 * type is.
828 */
829 data->secondary = data->primary;
830 data->primary = chanctx_conf;
831 } else {
832 /* there is low latency vif - we will be secondary */
833 data->secondary = chanctx_conf;
834 }
9166b1ee
EG		 835 return;
836 }
837
0ee5bcdd
EG		 838 /*
839 * STA / P2P Client, try to be primary if first vif. If we are in low
840 * latency mode, we are already in primary and just don't do much
841 */
dac94da8
EG		 842 if (!data->primary || data->primary == chanctx_conf)
843 data->primary = chanctx_conf;
844 else if (!data->secondary)
845 /* if secondary is not NULL, it might be a GO */
846 data->secondary = chanctx_conf;
847
4d66449a
EG		 848 /*
849 * don't reduce the Tx power if one of these is true:
850 * we are in LOOSE
851 * single share antenna product
852 * BT is active
853 * we are associated
854 */
39149911 855 if (iwl_get_coex_type(mvm, vif) == BT_COEX_LOOSE_LUT ||
4d66449a 856 mvm->cfg->bt_shared_single_ant || !vif->bss_conf.assoc ||
430a3bba 857 le32_to_cpu(mvm->last_bt_notif.bt_activity_grading) == BT_OFF) {
0f618e6e 858 iwl_mvm_bt_coex_reduced_txp(mvm, mvmvif->ap_sta_id, false);
f6fc5775 859 iwl_mvm_bt_coex_enable_rssi_event(mvm, vif, false, 0);
2b76ef13 860 return;
39149911 861 }
2b76ef13 862
911222b5
AO		 863 /* try to get the avg rssi from fw */
864 ave_rssi = mvmvif->bf_data.ave_beacon_signal;
2b76ef13
EG		 865
866 /* if the RSSI isn't valid, fake it is very low */
867 if (!ave_rssi)
868 ave_rssi = -100;
8286d9f5 869 if (ave_rssi > -IWL_MVM_BT_COEX_EN_RED_TXP_THRESH) {
2b76ef13
EG		 870 if (iwl_mvm_bt_coex_reduced_txp(mvm, mvmvif->ap_sta_id, true))
871 IWL_ERR(mvm, "Couldn't send BT_CONFIG cmd\n");
8286d9f5 872 } else if (ave_rssi < -IWL_MVM_BT_COEX_DIS_RED_TXP_THRESH) {
2b76ef13
EG		 873 if (iwl_mvm_bt_coex_reduced_txp(mvm, mvmvif->ap_sta_id, false))
874 IWL_ERR(mvm, "Couldn't send BT_CONFIG cmd\n");
2b76ef13
EG		 875 }
876
877 /* Begin to monitor the RSSI: it may influence the reduced Tx power */
f6fc5775 878 iwl_mvm_bt_coex_enable_rssi_event(mvm, vif, true, ave_rssi);
7da052b8
EG		 879}
880
d37cac98 881static void iwl_mvm_bt_coex_notif_handle(struct iwl_mvm *mvm)
f421f9c3 882{
2b76ef13 883 struct iwl_bt_iterator_data data = {
7da052b8 884 .mvm = mvm,
d37cac98 885 .notif = &mvm->last_bt_notif,
7da052b8 886 };
430a3bba 887 struct iwl_bt_coex_ci_cmd cmd = {};
dac94da8 888 u8 ci_bw_idx;
f421f9c3 889
a39979a8
EG		 890 /* Ignore updates if we are in force mode */
891 if (unlikely(mvm->bt_force_ant_mode != BT_FORCE_ANT_DIS))
892 return;
893
dac94da8 894 rcu_read_lock();
7da052b8
EG		 895 ieee80211_iterate_active_interfaces_atomic(
896 mvm->hw, IEEE80211_IFACE_ITER_NORMAL,
897 iwl_mvm_bt_notif_iterator, &data);
898
dac94da8
EG		 899 if (data.primary) {
900 struct ieee80211_chanctx_conf *chan = data.primary;
901 if (WARN_ON(!chan->def.chan)) {
902 rcu_read_unlock();
903 return;
904 }
905
906 if (chan->def.width < NL80211_CHAN_WIDTH_40) {
907 ci_bw_idx = 0;
dac94da8 908 } else {
dac94da8
EG		 909 if (chan->def.center_freq1 >
910 chan->def.chan->center_freq)
911 ci_bw_idx = 2;
912 else
913 ci_bw_idx = 1;
914 }
915
916 cmd.bt_primary_ci =
917 iwl_ci_mask[chan->def.chan->hw_value][ci_bw_idx];
430a3bba
EG		 918 cmd.primary_ch_phy_id =
919 cpu_to_le32(*((u16 *)data.primary->drv_priv));
dac94da8
EG		 920 }
921
922 if (data.secondary) {
923 struct ieee80211_chanctx_conf *chan = data.secondary;
924 if (WARN_ON(!data.secondary->def.chan)) {
925 rcu_read_unlock();
926 return;
927 }
928
929 if (chan->def.width < NL80211_CHAN_WIDTH_40) {
930 ci_bw_idx = 0;
dac94da8 931 } else {
dac94da8
EG		 932 if (chan->def.center_freq1 >
933 chan->def.chan->center_freq)
934 ci_bw_idx = 2;
935 else
936 ci_bw_idx = 1;
937 }
938
939 cmd.bt_secondary_ci =
940 iwl_ci_mask[chan->def.chan->hw_value][ci_bw_idx];
430a3bba
EG		 941 cmd.secondary_ch_phy_id =
942 cpu_to_le32(*((u16 *)data.secondary->drv_priv));
dac94da8
EG		 943 }
944
945 rcu_read_unlock();
946
947 /* Don't spam the fw with the same command over and over */
948 if (memcmp(&cmd, &mvm->last_bt_ci_cmd, sizeof(cmd))) {
a1022927 949 if (iwl_mvm_send_cmd_pdu(mvm, BT_COEX_CI, 0,
dac94da8 950 sizeof(cmd), &cmd))
3c6acb61 951 IWL_ERR(mvm, "Failed to send BT_CI cmd\n");
dac94da8
EG		 952 memcpy(&mvm->last_bt_ci_cmd, &cmd, sizeof(cmd));
953 }
954
1459f269 955 if (iwl_mvm_bt_udpate_sw_boost(mvm))
2b76ef13 956 IWL_ERR(mvm, "Failed to update the ctrl_kill_msk\n");
9166b1ee
EG		 957}
958
9166b1ee
EG		 959int iwl_mvm_rx_bt_coex_notif(struct iwl_mvm *mvm,
960 struct iwl_rx_cmd_buffer *rxb,
961 struct iwl_device_cmd *dev_cmd)
962{
963 struct iwl_rx_packet *pkt = rxb_addr(rxb);
df878f38 964 struct iwl_bt_coex_profile_notif *notif = (void *)pkt->data;
9166b1ee 965
0ea8d043
EG		 966 if (!(mvm->fw->ucode_capa.api[0] & IWL_UCODE_TLV_API_BT_COEX_SPLIT))
967 return iwl_mvm_rx_bt_coex_notif_old(mvm, rxb, dev_cmd);
968
9166b1ee 969 IWL_DEBUG_COEX(mvm, "BT Coex Notification received\n");
dac94da8
EG		 970 IWL_DEBUG_COEX(mvm, "\tBT ci compliance %d\n", notif->bt_ci_compliance);
971 IWL_DEBUG_COEX(mvm, "\tBT primary_ch_lut %d\n",
972 le32_to_cpu(notif->primary_ch_lut));
973 IWL_DEBUG_COEX(mvm, "\tBT secondary_ch_lut %d\n",
974 le32_to_cpu(notif->secondary_ch_lut));
975 IWL_DEBUG_COEX(mvm, "\tBT activity grading %d\n",
976 le32_to_cpu(notif->bt_activity_grading));
9166b1ee 977
d37cac98
EG		 978 /* remember this notification for future use: rssi fluctuations */
979 memcpy(&mvm->last_bt_notif, notif, sizeof(mvm->last_bt_notif));
980
981 iwl_mvm_bt_coex_notif_handle(mvm);
2b76ef13
EG		 982
983 /*
984 * This is an async handler for a notification, returning anything other
985 * than 0 doesn't make sense even if HCMD failed.
986 */
987 return 0;
988}
989
990static void iwl_mvm_bt_rssi_iterator(void *_data, u8 *mac,
991 struct ieee80211_vif *vif)
992{
5b530e95 993 struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif);
2b76ef13
EG		 994 struct iwl_bt_iterator_data *data = _data;
995 struct iwl_mvm *mvm = data->mvm;
996
997 struct ieee80211_sta *sta;
998 struct iwl_mvm_sta *mvmsta;
999
f6fc5775
EG		 1000 struct ieee80211_chanctx_conf *chanctx_conf;
1001
1002 rcu_read_lock();
1003 chanctx_conf = rcu_dereference(vif->chanctx_conf);
1004 /* If channel context is invalid or not on 2.4GHz - don't count it */
1005 if (!chanctx_conf ||
1006 chanctx_conf->def.chan->band != IEEE80211_BAND_2GHZ) {
1007 rcu_read_unlock();
1008 return;
1009 }
1010 rcu_read_unlock();
1011
2b76ef13
EG		 1012 if (vif->type != NL80211_IFTYPE_STATION ||
1013 mvmvif->ap_sta_id == IWL_MVM_STATION_COUNT)
1014 return;
1015
1016 sta = rcu_dereference_protected(mvm->fw_id_to_mac_id[mvmvif->ap_sta_id],
1017 lockdep_is_held(&mvm->mutex));
56c07a9c
EG		 1018
1019 /* This can happen if the station has been removed right now */
1020 if (IS_ERR_OR_NULL(sta))
1021 return;
1022
5b577a90 1023 mvmsta = iwl_mvm_sta_from_mac80211(sta);
2b76ef13
EG		 1024}
1025
1026void iwl_mvm_bt_rssi_event(struct iwl_mvm *mvm, struct ieee80211_vif *vif,
1027 enum ieee80211_rssi_event rssi_event)
1028{
5b530e95 1029 struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif);
2b76ef13
EG		 1030 struct iwl_bt_iterator_data data = {
1031 .mvm = mvm,
2b76ef13
EG		 1032 };
1033 int ret;
1034
0ea8d043
EG		 1035 if (!(mvm->fw->ucode_capa.api[0] & IWL_UCODE_TLV_API_BT_COEX_SPLIT)) {
1036 iwl_mvm_bt_rssi_event_old(mvm, vif, rssi_event);
1037 return;
1038 }
1039
3dd1cd2d 1040 lockdep_assert_held(&mvm->mutex);
2b76ef13 1041
a39979a8
EG		 1042 /* Ignore updates if we are in force mode */
1043 if (unlikely(mvm->bt_force_ant_mode != BT_FORCE_ANT_DIS))
1044 return;
1045
1e929199
EG		 1046 /*
1047 * Rssi update while not associated - can happen since the statistics
1048 * are handled asynchronously
1049 */
1050 if (mvmvif->ap_sta_id == IWL_MVM_STATION_COUNT)
3dd1cd2d 1051 return;
2b76ef13 1052
4515f30f 1053 /* No BT - reports should be disabled */
430a3bba 1054 if (le32_to_cpu(mvm->last_bt_notif.bt_activity_grading) == BT_OFF)
3dd1cd2d 1055 return;
2b76ef13
EG		 1056
1057 IWL_DEBUG_COEX(mvm, "RSSI for %pM is now %s\n", vif->bss_conf.bssid,
1058 rssi_event == RSSI_EVENT_HIGH ? "HIGH" : "LOW");
1059
1060 /*
1061 * Check if rssi is good enough for reduced Tx power, but not in loose
1062 * scheme.
1063 */
39149911 1064 if (rssi_event == RSSI_EVENT_LOW || mvm->cfg->bt_shared_single_ant ||
4515f30f 1065 iwl_get_coex_type(mvm, vif) == BT_COEX_LOOSE_LUT)
2b76ef13
EG		 1066 ret = iwl_mvm_bt_coex_reduced_txp(mvm, mvmvif->ap_sta_id,
1067 false);
f421f9c3 1068 else
2b76ef13 1069 ret = iwl_mvm_bt_coex_reduced_txp(mvm, mvmvif->ap_sta_id, true);
f421f9c3 1070
2b76ef13
EG		 1071 if (ret)
1072 IWL_ERR(mvm, "couldn't send BT_CONFIG HCMD upon RSSI event\n");
f421f9c3 1073
2b76ef13
EG		 1074 ieee80211_iterate_active_interfaces_atomic(
1075 mvm->hw, IEEE80211_IFACE_ITER_NORMAL,
1076 iwl_mvm_bt_rssi_iterator, &data);
f421f9c3 1077
1459f269 1078 if (iwl_mvm_bt_udpate_sw_boost(mvm))
2b76ef13 1079 IWL_ERR(mvm, "Failed to update the ctrl_kill_msk\n");
f421f9c3 1080}
9166b1ee 1081
9145d151
EG		 1082#define LINK_QUAL_AGG_TIME_LIMIT_DEF (4000)
1083#define LINK_QUAL_AGG_TIME_LIMIT_BT_ACT (1200)
1084
5b7ff615
EG		 1085u16 iwl_mvm_coex_agg_time_limit(struct iwl_mvm *mvm,
1086 struct ieee80211_sta *sta)
9145d151 1087{
5b577a90 1088 struct iwl_mvm_sta *mvmsta = iwl_mvm_sta_from_mac80211(sta);
4c86f938
EG		 1089 struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(mvmsta->vif);
1090 struct iwl_mvm_phy_ctxt *phy_ctxt = mvmvif->phy_ctxt;
9145d151
EG		 1091 enum iwl_bt_coex_lut_type lut_type;
1092
0ea8d043
EG		 1093 if (!(mvm->fw->ucode_capa.api[0] & IWL_UCODE_TLV_API_BT_COEX_SPLIT))
1094 return iwl_mvm_coex_agg_time_limit_old(mvm, sta);
1095
4c86f938
EG		 1096 if (IWL_COEX_IS_TTC_ON(mvm->last_bt_notif.ttc_rrc_status, phy_ctxt->id))
1097 return LINK_QUAL_AGG_TIME_LIMIT_DEF;
1098
9145d151 1099 if (le32_to_cpu(mvm->last_bt_notif.bt_activity_grading) <
c2119351 1100 BT_HIGH_TRAFFIC)
9145d151 1101 return LINK_QUAL_AGG_TIME_LIMIT_DEF;
35fbf5d0 1102
9145d151
EG		 1103 lut_type = iwl_get_coex_type(mvm, mvmsta->vif);
1104
7fa4fa0c 1105 if (lut_type == BT_COEX_LOOSE_LUT || lut_type == BT_COEX_INVALID_LUT)
9145d151
EG		 1106 return LINK_QUAL_AGG_TIME_LIMIT_DEF;
1107
1108 /* tight coex, high bt traffic, reduce AGG time limit */
1109 return LINK_QUAL_AGG_TIME_LIMIT_BT_ACT;
1110}
1111
ffa6c707
EG		 1112bool iwl_mvm_bt_coex_is_mimo_allowed(struct iwl_mvm *mvm,
1113 struct ieee80211_sta *sta)
1114{
5b577a90 1115 struct iwl_mvm_sta *mvmsta = iwl_mvm_sta_from_mac80211(sta);
4c86f938
EG		 1116 struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(mvmsta->vif);
1117 struct iwl_mvm_phy_ctxt *phy_ctxt = mvmvif->phy_ctxt;
7fa4fa0c 1118 enum iwl_bt_coex_lut_type lut_type;
ffa6c707 1119
0ea8d043 1120 if (!(mvm->fw->ucode_capa.api[0] & IWL_UCODE_TLV_API_BT_COEX_SPLIT))
5fc7d86c 1121 return iwl_mvm_bt_coex_is_mimo_allowed_old(mvm, sta);
0ea8d043 1122
4c86f938 1123 if (IWL_COEX_IS_TTC_ON(mvm->last_bt_notif.ttc_rrc_status, phy_ctxt->id))
35fbf5d0
EG		 1124 return true;
1125
ffa6c707
EG		 1126 if (le32_to_cpu(mvm->last_bt_notif.bt_activity_grading) <
1127 BT_HIGH_TRAFFIC)
1128 return true;
1129
1130 /*
7fa4fa0c
EG		 1131 * In Tight / TxTxDis, BT can't Rx while we Tx, so use both antennas
1132 * since BT is already killed.
1133 * In Loose, BT can Rx while we Tx, so forbid MIMO to let BT Rx while
1134 * we Tx.
1135 * When we are in 5GHz, we'll get BT_COEX_INVALID_LUT allowing MIMO.
ffa6c707 1136 */
7fa4fa0c
EG		 1137 lut_type = iwl_get_coex_type(mvm, mvmsta->vif);
1138 return lut_type != BT_COEX_LOOSE_LUT;
ffa6c707
EG		 1139}
1140
219fb66b
EG		 1141bool iwl_mvm_bt_coex_is_ant_avail(struct iwl_mvm *mvm, u8 ant)
1142{
1143 /* there is no other antenna, shared antenna is always available */
1144 if (mvm->cfg->bt_shared_single_ant)
1145 return true;
1146
1147 if (ant & mvm->cfg->non_shared_ant)
1148 return true;
1149
1150 if (!(mvm->fw->ucode_capa.api[0] & IWL_UCODE_TLV_API_BT_COEX_SPLIT))
1151 return iwl_mvm_bt_coex_is_shared_ant_avail_old(mvm);
1152
1153 return le32_to_cpu(mvm->last_bt_notif.bt_activity_grading) <
1154 BT_HIGH_TRAFFIC;
1155}
1156
34c8b24f
EG		 1157bool iwl_mvm_bt_coex_is_shared_ant_avail(struct iwl_mvm *mvm)
1158{
bbab7582
EG		 1159 /* there is no other antenna, shared antenna is always available */
1160 if (mvm->cfg->bt_shared_single_ant)
1161 return true;
1162
0ea8d043
EG		 1163 if (!(mvm->fw->ucode_capa.api[0] & IWL_UCODE_TLV_API_BT_COEX_SPLIT))
1164 return iwl_mvm_bt_coex_is_shared_ant_avail_old(mvm);
1165
34c8b24f
EG		 1166 return le32_to_cpu(mvm->last_bt_notif.bt_activity_grading) == BT_OFF;
1167}
1168
2fd647f8
EP		 1169bool iwl_mvm_bt_coex_is_tpc_allowed(struct iwl_mvm *mvm,
1170 enum ieee80211_band band)
1171{
1172 u32 bt_activity = le32_to_cpu(mvm->last_bt_notif.bt_activity_grading);
1173
0ea8d043
EG		 1174 if (!(mvm->fw->ucode_capa.api[0] & IWL_UCODE_TLV_API_BT_COEX_SPLIT))
1175 return iwl_mvm_bt_coex_is_tpc_allowed_old(mvm, band);
1176
2fd647f8
EP		 1177 if (band != IEEE80211_BAND_2GHZ)
1178 return false;
1179
1180 return bt_activity >= BT_LOW_TRAFFIC;
1181}
1182
ee7bea58 1183u8 iwl_mvm_bt_coex_tx_prio(struct iwl_mvm *mvm, struct ieee80211_hdr *hdr,
b797e3fb 1184 struct ieee80211_tx_info *info, u8 ac)
ee7bea58
EG		 1185{
1186 __le16 fc = hdr->frame_control;
1187
b797e3fb
EG		 1188 if (info->band != IEEE80211_BAND_2GHZ)
1189 return 0;
1190
cdb00563
EG		 1191 if (unlikely(mvm->bt_tx_prio))
1192 return mvm->bt_tx_prio - 1;
1193
ee7bea58 1194 /* High prio packet (wrt. BT coex) if it is EAPOL, MCAST or MGMT */
b797e3fb 1195 if (info->control.flags & IEEE80211_TX_CTRL_PORT_CTRL_PROTO ||
ee7bea58 1196 is_multicast_ether_addr(hdr->addr1) ||
b797e3fb
EG		 1197 ieee80211_is_ctl(fc) || ieee80211_is_mgmt(fc) ||
1198 ieee80211_is_nullfunc(fc) || ieee80211_is_qos_nullfunc(fc))
1199 return 3;
1200
1201 switch (ac) {
1202 case IEEE80211_AC_BE:
1203 return 1;
1204 case IEEE80211_AC_VO:
1205 return 3;
1206 case IEEE80211_AC_VI:
ee7bea58 1207 return 2;
b797e3fb
EG		 1208 default:
1209 break;
1210 }
ee7bea58
EG		 1211
1212 return 0;
1213}
1214
8e484f0b 1215void iwl_mvm_bt_coex_vif_change(struct iwl_mvm *mvm)
9166b1ee 1216{
0ea8d043
EG		 1217 if (!(mvm->fw->ucode_capa.api[0] & IWL_UCODE_TLV_API_BT_COEX_SPLIT)) {
1218 iwl_mvm_bt_coex_vif_change_old(mvm);
1219 return;
1220 }
1221
d37cac98 1222 iwl_mvm_bt_coex_notif_handle(mvm);
9166b1ee 1223}
b9fae2d5
EG		 1224
1225int iwl_mvm_rx_ant_coupling_notif(struct iwl_mvm *mvm,
1226 struct iwl_rx_cmd_buffer *rxb,
1227 struct iwl_device_cmd *dev_cmd)
1228{
1229 struct iwl_rx_packet *pkt = rxb_addr(rxb);
1230 u32 ant_isolation = le32_to_cpup((void *)pkt->data);
704602a1 1231 struct iwl_bt_coex_corun_lut_update_cmd cmd = {};
b9fae2d5
EG		 1232 u8 __maybe_unused lower_bound, upper_bound;
1233 u8 lut;
1234
0ea8d043
EG		 1235 if (!(mvm->fw->ucode_capa.api[0] & IWL_UCODE_TLV_API_BT_COEX_SPLIT))
1236 return iwl_mvm_rx_ant_coupling_notif_old(mvm, rxb, dev_cmd);
1237
b9fae2d5
EG		 1238 if (!IWL_MVM_BT_COEX_CORUNNING)
1239 return 0;
1240
1241 lockdep_assert_held(&mvm->mutex);
1242
a39979a8
EG		 1243 /* Ignore updates if we are in force mode */
1244 if (unlikely(mvm->bt_force_ant_mode != BT_FORCE_ANT_DIS))
1245 return 0;
1246
b9fae2d5
EG		 1247 if (ant_isolation == mvm->last_ant_isol)
1248 return 0;
1249
1250 for (lut = 0; lut < ARRAY_SIZE(antenna_coupling_ranges) - 1; lut++)
1251 if (ant_isolation < antenna_coupling_ranges[lut + 1].range)
1252 break;
1253
1254 lower_bound = antenna_coupling_ranges[lut].range;
1255
1256 if (lut < ARRAY_SIZE(antenna_coupling_ranges) - 1)
1257 upper_bound = antenna_coupling_ranges[lut + 1].range;
1258 else
1259 upper_bound = antenna_coupling_ranges[lut].range;
1260
1261 IWL_DEBUG_COEX(mvm, "Antenna isolation=%d in range [%d,%d[, lut=%d\n",
1262 ant_isolation, lower_bound, upper_bound, lut);
1263
1264 mvm->last_ant_isol = ant_isolation;
1265
1266 if (mvm->last_corun_lut == lut)
1267 return 0;
1268
1269 mvm->last_corun_lut = lut;
1270
b9fae2d5 1271 /* For the moment, use the same LUT for 20GHz and 40GHz */
704602a1
EG		 1272 memcpy(&cmd.corun_lut20, antenna_coupling_ranges[lut].lut20,
1273 sizeof(cmd.corun_lut20));
b9fae2d5 1274
704602a1
EG		 1275 memcpy(&cmd.corun_lut40, antenna_coupling_ranges[lut].lut20,
1276 sizeof(cmd.corun_lut40));
b9fae2d5 1277
704602a1
EG		 1278 return iwl_mvm_send_cmd_pdu(mvm, BT_COEX_UPDATE_CORUN_LUT, 0,
1279 sizeof(cmd), &cmd);
b9fae2d5 1280}
Linux kernel - Deliverables
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