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931d4160 EG |
1 | /****************************************************************************** |
2 | * | |
3 | * This file is provided under a dual BSD/GPLv2 license. When using or | |
4 | * redistributing this file, you may do so under either license. | |
5 | * | |
6 | * GPL LICENSE SUMMARY | |
7 | * | |
51368bf7 | 8 | * Copyright(c) 2013 - 2014 Intel Corporation. All rights reserved. |
931d4160 EG |
9 | * |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of version 2 of the GNU General Public License as | |
12 | * published by the Free Software Foundation. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, but | |
15 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
17 | * General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110, | |
22 | * USA | |
23 | * | |
24 | * The full GNU General Public License is included in this distribution | |
25 | * in the file called COPYING. | |
26 | * | |
27 | * Contact Information: | |
28 | * Intel Linux Wireless <ilw@linux.intel.com> | |
29 | * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | |
30 | * | |
31 | * BSD LICENSE | |
32 | * | |
51368bf7 | 33 | * Copyright(c) 2013 - 2014 Intel Corporation. All rights reserved. |
931d4160 EG |
34 | * All rights reserved. |
35 | * | |
36 | * Redistribution and use in source and binary forms, with or without | |
37 | * modification, are permitted provided that the following conditions | |
38 | * are met: | |
39 | * | |
40 | * * Redistributions of source code must retain the above copyright | |
41 | * notice, this list of conditions and the following disclaimer. | |
42 | * * Redistributions in binary form must reproduce the above copyright | |
43 | * notice, this list of conditions and the following disclaimer in | |
44 | * the documentation and/or other materials provided with the | |
45 | * distribution. | |
46 | * * Neither the name Intel Corporation nor the names of its | |
47 | * contributors may be used to endorse or promote products derived | |
48 | * from this software without specific prior written permission. | |
49 | * | |
50 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS | |
51 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT | |
52 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR | |
53 | * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT | |
54 | * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, | |
55 | * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT | |
56 | * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, | |
57 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY | |
58 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | |
59 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE | |
60 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
61 | * | |
62 | *****************************************************************************/ | |
63 | ||
ee7bea58 EG |
64 | #include <linux/ieee80211.h> |
65 | #include <linux/etherdevice.h> | |
2b76ef13 EG |
66 | #include <net/mac80211.h> |
67 | ||
5b7ff615 | 68 | #include "fw-api-coex.h" |
931d4160 EG |
69 | #include "iwl-modparams.h" |
70 | #include "mvm.h" | |
f421f9c3 | 71 | #include "iwl-debug.h" |
931d4160 | 72 | |
dac94da8 | 73 | #define BT_ANTENNA_COUPLING_THRESHOLD (30) |
2b76ef13 | 74 | |
2de13cae | 75 | const u32 iwl_bt_ack_kill_msk[BT_KILL_MSK_MAX] = { |
5b7e662b EG |
76 | [BT_KILL_MSK_DEFAULT] = 0xffff0000, |
77 | [BT_KILL_MSK_SCO_HID_A2DP] = 0xffffffff, | |
78 | [BT_KILL_MSK_REDUCED_TXPOW] = 0, | |
931d4160 EG |
79 | }; |
80 | ||
2de13cae | 81 | const u32 iwl_bt_cts_kill_msk[BT_KILL_MSK_MAX] = { |
5b7e662b EG |
82 | [BT_KILL_MSK_DEFAULT] = 0xffff0000, |
83 | [BT_KILL_MSK_SCO_HID_A2DP] = 0xffffffff, | |
84 | [BT_KILL_MSK_REDUCED_TXPOW] = 0, | |
931d4160 EG |
85 | }; |
86 | ||
dac94da8 | 87 | static const __le32 iwl_bt_prio_boost[BT_COEX_BOOST_SIZE] = { |
2adc8949 EG |
88 | cpu_to_le32(0xf0f0f0f0), /* 50% */ |
89 | cpu_to_le32(0xc0c0c0c0), /* 25% */ | |
90 | cpu_to_le32(0xfcfcfcfc), /* 75% */ | |
91 | cpu_to_le32(0xfefefefe), /* 87.5% */ | |
931d4160 EG |
92 | }; |
93 | ||
d1d5e3cd EG |
94 | static const __le32 iwl_single_shared_ant[BT_COEX_MAX_LUT][BT_COEX_LUT_SIZE] = { |
95 | { | |
96 | cpu_to_le32(0x40000000), | |
97 | cpu_to_le32(0x00000000), | |
98 | cpu_to_le32(0x44000000), | |
99 | cpu_to_le32(0x00000000), | |
100 | cpu_to_le32(0x40000000), | |
101 | cpu_to_le32(0x00000000), | |
102 | cpu_to_le32(0x44000000), | |
103 | cpu_to_le32(0x00000000), | |
104 | cpu_to_le32(0xc0004000), | |
105 | cpu_to_le32(0xf0005000), | |
106 | cpu_to_le32(0xc0004000), | |
107 | cpu_to_le32(0xf0005000), | |
108 | }, | |
109 | { | |
110 | cpu_to_le32(0x40000000), | |
111 | cpu_to_le32(0x00000000), | |
112 | cpu_to_le32(0x44000000), | |
113 | cpu_to_le32(0x00000000), | |
114 | cpu_to_le32(0x40000000), | |
115 | cpu_to_le32(0x00000000), | |
116 | cpu_to_le32(0x44000000), | |
117 | cpu_to_le32(0x00000000), | |
118 | cpu_to_le32(0xc0004000), | |
119 | cpu_to_le32(0xf0005000), | |
120 | cpu_to_le32(0xc0004000), | |
121 | cpu_to_le32(0xf0005000), | |
122 | }, | |
123 | { | |
124 | cpu_to_le32(0x40000000), | |
125 | cpu_to_le32(0x00000000), | |
126 | cpu_to_le32(0x44000000), | |
127 | cpu_to_le32(0x00000000), | |
128 | cpu_to_le32(0x40000000), | |
129 | cpu_to_le32(0x00000000), | |
130 | cpu_to_le32(0x44000000), | |
131 | cpu_to_le32(0x00000000), | |
132 | cpu_to_le32(0xc0004000), | |
133 | cpu_to_le32(0xf0005000), | |
134 | cpu_to_le32(0xc0004000), | |
135 | cpu_to_le32(0xf0005000), | |
136 | }, | |
137 | }; | |
138 | ||
dac94da8 EG |
139 | static const __le32 iwl_combined_lookup[BT_COEX_MAX_LUT][BT_COEX_LUT_SIZE] = { |
140 | { | |
141 | /* Tight */ | |
142 | cpu_to_le32(0xaaaaaaaa), | |
143 | cpu_to_le32(0xaaaaaaaa), | |
144 | cpu_to_le32(0xaeaaaaaa), | |
145 | cpu_to_le32(0xaaaaaaaa), | |
146 | cpu_to_le32(0xcc00ff28), | |
147 | cpu_to_le32(0x0000aaaa), | |
148 | cpu_to_le32(0xcc00aaaa), | |
149 | cpu_to_le32(0x0000aaaa), | |
150 | cpu_to_le32(0xc0004000), | |
a6bc9280 | 151 | cpu_to_le32(0x00004000), |
dac94da8 EG |
152 | cpu_to_le32(0xf0005000), |
153 | cpu_to_le32(0xf0005000), | |
154 | }, | |
155 | { | |
156 | /* Loose */ | |
157 | cpu_to_le32(0xaaaaaaaa), | |
158 | cpu_to_le32(0xaaaaaaaa), | |
159 | cpu_to_le32(0xaaaaaaaa), | |
160 | cpu_to_le32(0xaaaaaaaa), | |
161 | cpu_to_le32(0xcc00ff28), | |
162 | cpu_to_le32(0x0000aaaa), | |
163 | cpu_to_le32(0xcc00aaaa), | |
164 | cpu_to_le32(0x0000aaaa), | |
165 | cpu_to_le32(0x00000000), | |
166 | cpu_to_le32(0x00000000), | |
167 | cpu_to_le32(0xf0005000), | |
168 | cpu_to_le32(0xf0005000), | |
169 | }, | |
170 | { | |
171 | /* Tx Tx disabled */ | |
172 | cpu_to_le32(0xaaaaaaaa), | |
173 | cpu_to_le32(0xaaaaaaaa), | |
a6bc9280 | 174 | cpu_to_le32(0xeeaaaaaa), |
dac94da8 EG |
175 | cpu_to_le32(0xaaaaaaaa), |
176 | cpu_to_le32(0xcc00ff28), | |
177 | cpu_to_le32(0x0000aaaa), | |
178 | cpu_to_le32(0xcc00aaaa), | |
179 | cpu_to_le32(0x0000aaaa), | |
a6bc9280 EG |
180 | cpu_to_le32(0xc0004000), |
181 | cpu_to_le32(0xc0004000), | |
182 | cpu_to_le32(0xf0005000), | |
183 | cpu_to_le32(0xf0005000), | |
dac94da8 | 184 | }, |
931d4160 EG |
185 | }; |
186 | ||
dac94da8 EG |
187 | /* 20MHz / 40MHz below / 40Mhz above*/ |
188 | static const __le64 iwl_ci_mask[][3] = { | |
189 | /* dummy entry for channel 0 */ | |
190 | {cpu_to_le64(0), cpu_to_le64(0), cpu_to_le64(0)}, | |
191 | { | |
192 | cpu_to_le64(0x0000001FFFULL), | |
193 | cpu_to_le64(0x0ULL), | |
194 | cpu_to_le64(0x00007FFFFFULL), | |
195 | }, | |
196 | { | |
197 | cpu_to_le64(0x000000FFFFULL), | |
198 | cpu_to_le64(0x0ULL), | |
199 | cpu_to_le64(0x0003FFFFFFULL), | |
200 | }, | |
201 | { | |
202 | cpu_to_le64(0x000003FFFCULL), | |
203 | cpu_to_le64(0x0ULL), | |
204 | cpu_to_le64(0x000FFFFFFCULL), | |
205 | }, | |
206 | { | |
207 | cpu_to_le64(0x00001FFFE0ULL), | |
208 | cpu_to_le64(0x0ULL), | |
209 | cpu_to_le64(0x007FFFFFE0ULL), | |
210 | }, | |
211 | { | |
212 | cpu_to_le64(0x00007FFF80ULL), | |
213 | cpu_to_le64(0x00007FFFFFULL), | |
214 | cpu_to_le64(0x01FFFFFF80ULL), | |
215 | }, | |
216 | { | |
217 | cpu_to_le64(0x0003FFFC00ULL), | |
218 | cpu_to_le64(0x0003FFFFFFULL), | |
219 | cpu_to_le64(0x0FFFFFFC00ULL), | |
220 | }, | |
221 | { | |
222 | cpu_to_le64(0x000FFFF000ULL), | |
223 | cpu_to_le64(0x000FFFFFFCULL), | |
224 | cpu_to_le64(0x3FFFFFF000ULL), | |
225 | }, | |
226 | { | |
227 | cpu_to_le64(0x007FFF8000ULL), | |
228 | cpu_to_le64(0x007FFFFFE0ULL), | |
229 | cpu_to_le64(0xFFFFFF8000ULL), | |
230 | }, | |
231 | { | |
232 | cpu_to_le64(0x01FFFE0000ULL), | |
233 | cpu_to_le64(0x01FFFFFF80ULL), | |
234 | cpu_to_le64(0xFFFFFE0000ULL), | |
235 | }, | |
236 | { | |
237 | cpu_to_le64(0x0FFFF00000ULL), | |
238 | cpu_to_le64(0x0FFFFFFC00ULL), | |
239 | cpu_to_le64(0x0ULL), | |
240 | }, | |
241 | { | |
242 | cpu_to_le64(0x3FFFC00000ULL), | |
243 | cpu_to_le64(0x3FFFFFF000ULL), | |
244 | cpu_to_le64(0x0) | |
245 | }, | |
246 | { | |
247 | cpu_to_le64(0xFFFE000000ULL), | |
248 | cpu_to_le64(0xFFFFFF8000ULL), | |
249 | cpu_to_le64(0x0) | |
250 | }, | |
251 | { | |
252 | cpu_to_le64(0xFFF8000000ULL), | |
253 | cpu_to_le64(0xFFFFFE0000ULL), | |
254 | cpu_to_le64(0x0) | |
255 | }, | |
256 | { | |
d2ccc902 | 257 | cpu_to_le64(0xFFC0000000ULL), |
dac94da8 | 258 | cpu_to_le64(0x0ULL), |
d2ccc902 | 259 | cpu_to_le64(0x0ULL) |
dac94da8 | 260 | }, |
931d4160 EG |
261 | }; |
262 | ||
dac94da8 | 263 | static const __le32 iwl_bt_mprio_lut[BT_COEX_MULTI_PRIO_LUT_SIZE] = { |
2adc8949 EG |
264 | cpu_to_le32(0x28412201), |
265 | cpu_to_le32(0x11118451), | |
e715c3a9 EG |
266 | }; |
267 | ||
b9fae2d5 EG |
268 | struct corunning_block_luts { |
269 | u8 range; | |
270 | __le32 lut20[BT_COEX_CORUN_LUT_SIZE]; | |
271 | }; | |
272 | ||
273 | /* | |
274 | * Ranges for the antenna coupling calibration / co-running block LUT: | |
275 | * LUT0: [ 0, 12[ | |
276 | * LUT1: [12, 20[ | |
277 | * LUT2: [20, 21[ | |
278 | * LUT3: [21, 23[ | |
279 | * LUT4: [23, 27[ | |
280 | * LUT5: [27, 30[ | |
281 | * LUT6: [30, 32[ | |
282 | * LUT7: [32, 33[ | |
283 | * LUT8: [33, - [ | |
284 | */ | |
285 | static const struct corunning_block_luts antenna_coupling_ranges[] = { | |
286 | { | |
287 | .range = 0, | |
288 | .lut20 = { | |
289 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
290 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
291 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
292 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
293 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
294 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
295 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
296 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
297 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
298 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
299 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
300 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
301 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
302 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
303 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
304 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
305 | }, | |
306 | }, | |
307 | { | |
308 | .range = 12, | |
309 | .lut20 = { | |
310 | cpu_to_le32(0x00000001), cpu_to_le32(0x00000000), | |
311 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
312 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
313 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
314 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
315 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
316 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
317 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
318 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
319 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
320 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
321 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
322 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
323 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
324 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
325 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
326 | }, | |
327 | }, | |
328 | { | |
329 | .range = 20, | |
330 | .lut20 = { | |
331 | cpu_to_le32(0x00000002), cpu_to_le32(0x00000000), | |
332 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
333 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
334 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
335 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
336 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
337 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
338 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
339 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
340 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
341 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
342 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
343 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
344 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
345 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
346 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
347 | }, | |
348 | }, | |
349 | { | |
350 | .range = 21, | |
351 | .lut20 = { | |
352 | cpu_to_le32(0x00000003), cpu_to_le32(0x00000000), | |
353 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
354 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
355 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
356 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
357 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
358 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
359 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
360 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
361 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
362 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
363 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
364 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
365 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
366 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
367 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
368 | }, | |
369 | }, | |
370 | { | |
371 | .range = 23, | |
372 | .lut20 = { | |
373 | cpu_to_le32(0x00000004), cpu_to_le32(0x00000000), | |
374 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
375 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
376 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
377 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
378 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
379 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
380 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
381 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
382 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
383 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
384 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
385 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
386 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
387 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
388 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
389 | }, | |
390 | }, | |
391 | { | |
392 | .range = 27, | |
393 | .lut20 = { | |
394 | cpu_to_le32(0x00000005), cpu_to_le32(0x00000000), | |
395 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
396 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
397 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
398 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
399 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
400 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
401 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
402 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
403 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
404 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
405 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
406 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
407 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
408 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
409 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
410 | }, | |
411 | }, | |
412 | { | |
413 | .range = 30, | |
414 | .lut20 = { | |
415 | cpu_to_le32(0x00000006), cpu_to_le32(0x00000000), | |
416 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
417 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
418 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
419 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
420 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
421 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
422 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
423 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
424 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
425 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
426 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
427 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
428 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
429 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
430 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
431 | }, | |
432 | }, | |
433 | { | |
434 | .range = 32, | |
435 | .lut20 = { | |
436 | cpu_to_le32(0x00000007), cpu_to_le32(0x00000000), | |
437 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
438 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
439 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
440 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
441 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
442 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
443 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
444 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
445 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
446 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
447 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
448 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
449 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
450 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
451 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
452 | }, | |
453 | }, | |
454 | { | |
455 | .range = 33, | |
456 | .lut20 = { | |
457 | cpu_to_le32(0x00000008), cpu_to_le32(0x00000000), | |
458 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
459 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
460 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
461 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
462 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
463 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
464 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
465 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
466 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
467 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
468 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
469 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
470 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
471 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
472 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
473 | }, | |
474 | }, | |
475 | }; | |
476 | ||
4515f30f EG |
477 | static enum iwl_bt_coex_lut_type |
478 | iwl_get_coex_type(struct iwl_mvm *mvm, const struct ieee80211_vif *vif) | |
479 | { | |
480 | struct ieee80211_chanctx_conf *chanctx_conf; | |
481 | enum iwl_bt_coex_lut_type ret; | |
482 | u16 phy_ctx_id; | |
430a3bba | 483 | u32 primary_ch_phy_id, secondary_ch_phy_id; |
4515f30f | 484 | |
9145d151 EG |
485 | /* |
486 | * Checking that we hold mvm->mutex is a good idea, but the rate | |
487 | * control can't acquire the mutex since it runs in Tx path. | |
488 | * So this is racy in that case, but in the worst case, the AMPDU | |
489 | * size limit will be wrong for a short time which is not a big | |
490 | * issue. | |
491 | */ | |
4515f30f EG |
492 | |
493 | rcu_read_lock(); | |
494 | ||
495 | chanctx_conf = rcu_dereference(vif->chanctx_conf); | |
496 | ||
497 | if (!chanctx_conf || | |
498 | chanctx_conf->def.chan->band != IEEE80211_BAND_2GHZ) { | |
499 | rcu_read_unlock(); | |
7fa4fa0c | 500 | return BT_COEX_INVALID_LUT; |
4515f30f EG |
501 | } |
502 | ||
503 | ret = BT_COEX_TX_DIS_LUT; | |
504 | ||
39149911 EG |
505 | if (mvm->cfg->bt_shared_single_ant) { |
506 | rcu_read_unlock(); | |
507 | return ret; | |
508 | } | |
509 | ||
4515f30f | 510 | phy_ctx_id = *((u16 *)chanctx_conf->drv_priv); |
430a3bba EG |
511 | primary_ch_phy_id = le32_to_cpu(mvm->last_bt_ci_cmd.primary_ch_phy_id); |
512 | secondary_ch_phy_id = | |
513 | le32_to_cpu(mvm->last_bt_ci_cmd.secondary_ch_phy_id); | |
4515f30f | 514 | |
430a3bba | 515 | if (primary_ch_phy_id == phy_ctx_id) |
4515f30f | 516 | ret = le32_to_cpu(mvm->last_bt_notif.primary_ch_lut); |
430a3bba | 517 | else if (secondary_ch_phy_id == phy_ctx_id) |
4515f30f EG |
518 | ret = le32_to_cpu(mvm->last_bt_notif.secondary_ch_lut); |
519 | /* else - default = TX TX disallowed */ | |
520 | ||
521 | rcu_read_unlock(); | |
522 | ||
523 | return ret; | |
524 | } | |
525 | ||
931d4160 EG |
526 | int iwl_send_bt_init_conf(struct iwl_mvm *mvm) |
527 | { | |
430a3bba | 528 | struct iwl_bt_coex_cmd *bt_cmd; |
03e304e4 EG |
529 | struct iwl_host_cmd cmd = { |
530 | .id = BT_CONFIG, | |
531 | .len = { sizeof(*bt_cmd), }, | |
532 | .dataflags = { IWL_HCMD_DFL_NOCOPY, }, | |
931d4160 EG |
533 | }; |
534 | int ret; | |
430a3bba | 535 | u32 mode; |
dac94da8 | 536 | |
0ea8d043 EG |
537 | if (!(mvm->fw->ucode_capa.api[0] & IWL_UCODE_TLV_API_BT_COEX_SPLIT)) |
538 | return iwl_send_bt_init_conf_old(mvm); | |
539 | ||
03e304e4 EG |
540 | bt_cmd = kzalloc(sizeof(*bt_cmd), GFP_KERNEL); |
541 | if (!bt_cmd) | |
542 | return -ENOMEM; | |
543 | cmd.data[0] = bt_cmd; | |
544 | ||
a39979a8 EG |
545 | lockdep_assert_held(&mvm->mutex); |
546 | ||
547 | if (unlikely(mvm->bt_force_ant_mode != BT_FORCE_ANT_DIS)) { | |
430a3bba EG |
548 | u32 mode; |
549 | ||
a39979a8 | 550 | switch (mvm->bt_force_ant_mode) { |
a39979a8 | 551 | case BT_FORCE_ANT_BT: |
430a3bba | 552 | mode = BT_COEX_BT; |
a39979a8 EG |
553 | break; |
554 | case BT_FORCE_ANT_WIFI: | |
430a3bba | 555 | mode = BT_COEX_WIFI; |
a39979a8 EG |
556 | break; |
557 | default: | |
558 | WARN_ON(1); | |
430a3bba | 559 | mode = 0; |
a39979a8 EG |
560 | } |
561 | ||
430a3bba | 562 | bt_cmd->mode = cpu_to_le32(mode); |
a39979a8 EG |
563 | goto send_cmd; |
564 | } | |
565 | ||
430a3bba EG |
566 | bt_cmd->max_kill = cpu_to_le32(5); |
567 | bt_cmd->bt4_antenna_isolation_thr = | |
568 | cpu_to_le32(BT_ANTENNA_COUPLING_THRESHOLD); | |
569 | bt_cmd->bt4_tx_tx_delta_freq_thr = cpu_to_le32(15); | |
570 | bt_cmd->bt4_tx_rx_max_freq0 = cpu_to_le32(15); | |
571 | bt_cmd->override_primary_lut = cpu_to_le32(BT_COEX_INVALID_LUT); | |
572 | bt_cmd->override_secondary_lut = cpu_to_le32(BT_COEX_INVALID_LUT); | |
573 | ||
574 | mode = iwlwifi_mod_params.bt_coex_active ? BT_COEX_NW : BT_COEX_DISABLE; | |
575 | bt_cmd->mode = cpu_to_le32(mode); | |
dac94da8 | 576 | |
741e703b | 577 | if (IWL_MVM_BT_COEX_SYNC2SCO) |
430a3bba EG |
578 | bt_cmd->enabled_modules |= |
579 | cpu_to_le32(BT_COEX_SYNC2SCO_ENABLED); | |
741e703b | 580 | |
430a3bba EG |
581 | if (IWL_MVM_BT_COEX_CORUNNING) |
582 | bt_cmd->enabled_modules |= cpu_to_le32(BT_COEX_CORUN_ENABLED); | |
b9fae2d5 | 583 | |
cdb00563 | 584 | if (IWL_MVM_BT_COEX_MPLUT) { |
430a3bba EG |
585 | bt_cmd->enabled_modules |= cpu_to_le32(BT_COEX_MPLUT_ENABLED); |
586 | bt_cmd->enabled_modules |= | |
587 | cpu_to_le32(BT_COEX_MPLUT_BOOST_ENABLED); | |
cdb00563 EG |
588 | } |
589 | ||
d1d5e3cd EG |
590 | if (mvm->cfg->bt_shared_single_ant) |
591 | memcpy(&bt_cmd->decision_lut, iwl_single_shared_ant, | |
592 | sizeof(iwl_single_shared_ant)); | |
593 | else | |
594 | memcpy(&bt_cmd->decision_lut, iwl_combined_lookup, | |
595 | sizeof(iwl_combined_lookup)); | |
596 | ||
430a3bba | 597 | memcpy(&bt_cmd->mplut_prio_boost, iwl_bt_prio_boost, |
dac94da8 | 598 | sizeof(iwl_bt_prio_boost)); |
430a3bba | 599 | memcpy(&bt_cmd->multiprio_lut, iwl_bt_mprio_lut, |
dac94da8 | 600 | sizeof(iwl_bt_mprio_lut)); |
931d4160 | 601 | |
a39979a8 | 602 | send_cmd: |
2b76ef13 | 603 | memset(&mvm->last_bt_notif, 0, sizeof(mvm->last_bt_notif)); |
dac94da8 | 604 | memset(&mvm->last_bt_ci_cmd, 0, sizeof(mvm->last_bt_ci_cmd)); |
2b76ef13 | 605 | |
03e304e4 | 606 | ret = iwl_mvm_send_cmd(mvm, &cmd); |
931d4160 | 607 | |
03e304e4 EG |
608 | kfree(bt_cmd); |
609 | return ret; | |
931d4160 | 610 | } |
f421f9c3 | 611 | |
2b76ef13 EG |
612 | static int iwl_mvm_bt_udpate_ctrl_kill_msk(struct iwl_mvm *mvm, |
613 | bool reduced_tx_power) | |
614 | { | |
615 | enum iwl_bt_kill_msk bt_kill_msk; | |
0ea8d043 | 616 | struct iwl_bt_coex_cmd_old *bt_cmd; |
430a3bba | 617 | struct iwl_bt_coex_profile_notif *notif = &mvm->last_bt_notif; |
03e304e4 EG |
618 | struct iwl_host_cmd cmd = { |
619 | .id = BT_CONFIG, | |
620 | .data[0] = &bt_cmd, | |
621 | .len = { sizeof(*bt_cmd), }, | |
622 | .dataflags = { IWL_HCMD_DFL_NOCOPY, }, | |
03e304e4 EG |
623 | }; |
624 | int ret = 0; | |
2b76ef13 EG |
625 | |
626 | lockdep_assert_held(&mvm->mutex); | |
627 | ||
628 | if (reduced_tx_power) { | |
629 | /* Reduced Tx power has precedence on the type of the profile */ | |
630 | bt_kill_msk = BT_KILL_MSK_REDUCED_TXPOW; | |
631 | } else { | |
632 | /* Low latency BT profile is active: give higher prio to BT */ | |
633 | if (BT_MBOX_MSG(notif, 3, SCO_STATE) || | |
634 | BT_MBOX_MSG(notif, 3, A2DP_STATE) || | |
635 | BT_MBOX_MSG(notif, 3, SNIFF_STATE)) | |
636 | bt_kill_msk = BT_KILL_MSK_SCO_HID_A2DP; | |
637 | else | |
638 | bt_kill_msk = BT_KILL_MSK_DEFAULT; | |
639 | } | |
640 | ||
641 | IWL_DEBUG_COEX(mvm, | |
642 | "Update kill_msk: %d - SCO %sactive A2DP %sactive SNIFF %sactive\n", | |
643 | bt_kill_msk, | |
644 | BT_MBOX_MSG(notif, 3, SCO_STATE) ? "" : "in", | |
645 | BT_MBOX_MSG(notif, 3, A2DP_STATE) ? "" : "in", | |
646 | BT_MBOX_MSG(notif, 3, SNIFF_STATE) ? "" : "in"); | |
647 | ||
648 | /* Don't send HCMD if there is no update */ | |
649 | if (bt_kill_msk == mvm->bt_kill_msk) | |
650 | return 0; | |
651 | ||
652 | mvm->bt_kill_msk = bt_kill_msk; | |
03e304e4 EG |
653 | |
654 | bt_cmd = kzalloc(sizeof(*bt_cmd), GFP_KERNEL); | |
655 | if (!bt_cmd) | |
656 | return -ENOMEM; | |
657 | cmd.data[0] = bt_cmd; | |
0ea8d043 | 658 | bt_cmd->flags = cpu_to_le32(BT_COEX_NW_OLD); |
03e304e4 EG |
659 | |
660 | bt_cmd->kill_ack_msk = cpu_to_le32(iwl_bt_ack_kill_msk[bt_kill_msk]); | |
661 | bt_cmd->kill_cts_msk = cpu_to_le32(iwl_bt_cts_kill_msk[bt_kill_msk]); | |
7352cac0 EG |
662 | bt_cmd->valid_bit_msk |= cpu_to_le32(BT_VALID_ENABLE | |
663 | BT_VALID_KILL_ACK | | |
664 | BT_VALID_KILL_CTS); | |
2b76ef13 | 665 | |
dac94da8 EG |
666 | IWL_DEBUG_COEX(mvm, "ACK Kill msk = 0x%08x, CTS Kill msk = 0x%08x\n", |
667 | iwl_bt_ack_kill_msk[bt_kill_msk], | |
668 | iwl_bt_cts_kill_msk[bt_kill_msk]); | |
03e304e4 EG |
669 | |
670 | ret = iwl_mvm_send_cmd(mvm, &cmd); | |
671 | ||
672 | kfree(bt_cmd); | |
673 | return ret; | |
2b76ef13 EG |
674 | } |
675 | ||
1fa477c6 EG |
676 | static int iwl_mvm_bt_coex_reduced_txp(struct iwl_mvm *mvm, u8 sta_id, |
677 | bool enable) | |
2b76ef13 | 678 | { |
0ea8d043 | 679 | struct iwl_bt_coex_cmd_old *bt_cmd; |
03e304e4 EG |
680 | /* Send ASYNC since this can be sent from an atomic context */ |
681 | struct iwl_host_cmd cmd = { | |
682 | .id = BT_CONFIG, | |
683 | .len = { sizeof(*bt_cmd), }, | |
b9fae2d5 | 684 | .dataflags = { IWL_HCMD_DFL_NOCOPY, }, |
03e304e4 | 685 | .flags = CMD_ASYNC, |
2b76ef13 | 686 | }; |
2b76ef13 | 687 | struct iwl_mvm_sta *mvmsta; |
03e304e4 | 688 | int ret; |
2b76ef13 | 689 | |
430a3bba EG |
690 | return 0; |
691 | ||
f327b04c EG |
692 | mvmsta = iwl_mvm_sta_from_staid_protected(mvm, sta_id); |
693 | if (!mvmsta) | |
2b76ef13 EG |
694 | return 0; |
695 | ||
2b76ef13 | 696 | /* nothing to do */ |
1fa477c6 | 697 | if (mvmsta->bt_reduced_txpower == enable) |
2b76ef13 EG |
698 | return 0; |
699 | ||
03e304e4 EG |
700 | bt_cmd = kzalloc(sizeof(*bt_cmd), GFP_ATOMIC); |
701 | if (!bt_cmd) | |
702 | return -ENOMEM; | |
703 | cmd.data[0] = bt_cmd; | |
0ea8d043 | 704 | bt_cmd->flags = cpu_to_le32(BT_COEX_NW_OLD); |
03e304e4 | 705 | |
7352cac0 EG |
706 | bt_cmd->valid_bit_msk = |
707 | cpu_to_le32(BT_VALID_ENABLE | BT_VALID_REDUCED_TX_POWER); | |
03e304e4 EG |
708 | bt_cmd->bt_reduced_tx_power = sta_id; |
709 | ||
2b76ef13 | 710 | if (enable) |
03e304e4 | 711 | bt_cmd->bt_reduced_tx_power |= BT_REDUCED_TX_POWER_BIT; |
2b76ef13 EG |
712 | |
713 | IWL_DEBUG_COEX(mvm, "%sable reduced Tx Power for sta %d\n", | |
714 | enable ? "en" : "dis", sta_id); | |
715 | ||
716 | mvmsta->bt_reduced_txpower = enable; | |
717 | ||
03e304e4 EG |
718 | ret = iwl_mvm_send_cmd(mvm, &cmd); |
719 | ||
720 | kfree(bt_cmd); | |
721 | return ret; | |
2b76ef13 EG |
722 | } |
723 | ||
724 | struct iwl_bt_iterator_data { | |
430a3bba | 725 | struct iwl_bt_coex_profile_notif *notif; |
2b76ef13 EG |
726 | struct iwl_mvm *mvm; |
727 | u32 num_bss_ifaces; | |
9e511c31 | 728 | bool reduced_tx_power; |
dac94da8 EG |
729 | struct ieee80211_chanctx_conf *primary; |
730 | struct ieee80211_chanctx_conf *secondary; | |
0ee5bcdd | 731 | bool primary_ll; |
7da052b8 EG |
732 | }; |
733 | ||
f6fc5775 EG |
734 | static inline |
735 | void iwl_mvm_bt_coex_enable_rssi_event(struct iwl_mvm *mvm, | |
736 | struct ieee80211_vif *vif, | |
737 | bool enable, int rssi) | |
738 | { | |
739 | struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif); | |
740 | ||
741 | mvmvif->bf_data.last_bt_coex_event = rssi; | |
742 | mvmvif->bf_data.bt_coex_max_thold = | |
8286d9f5 | 743 | enable ? -IWL_MVM_BT_COEX_EN_RED_TXP_THRESH : 0; |
f6fc5775 | 744 | mvmvif->bf_data.bt_coex_min_thold = |
8286d9f5 | 745 | enable ? -IWL_MVM_BT_COEX_DIS_RED_TXP_THRESH : 0; |
f6fc5775 EG |
746 | } |
747 | ||
dac94da8 | 748 | /* must be called under rcu_read_lock */ |
7da052b8 EG |
749 | static void iwl_mvm_bt_notif_iterator(void *_data, u8 *mac, |
750 | struct ieee80211_vif *vif) | |
751 | { | |
752 | struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif); | |
2b76ef13 EG |
753 | struct iwl_bt_iterator_data *data = _data; |
754 | struct iwl_mvm *mvm = data->mvm; | |
7da052b8 EG |
755 | struct ieee80211_chanctx_conf *chanctx_conf; |
756 | enum ieee80211_smps_mode smps_mode; | |
f6415f6b | 757 | u32 bt_activity_grading; |
2b76ef13 | 758 | int ave_rssi; |
7da052b8 | 759 | |
9ee718aa | 760 | lockdep_assert_held(&mvm->mutex); |
7da052b8 | 761 | |
f6415f6b EG |
762 | switch (vif->type) { |
763 | case NL80211_IFTYPE_STATION: | |
4d66449a EG |
764 | /* Count BSSes vifs */ |
765 | data->num_bss_ifaces++; | |
f6415f6b EG |
766 | /* default smps_mode for BSS / P2P client is AUTOMATIC */ |
767 | smps_mode = IEEE80211_SMPS_AUTOMATIC; | |
f6415f6b EG |
768 | break; |
769 | case NL80211_IFTYPE_AP: | |
770 | /* default smps_mode for AP / GO is OFF */ | |
771 | smps_mode = IEEE80211_SMPS_OFF; | |
772 | if (!mvmvif->ap_ibss_active) { | |
773 | iwl_mvm_update_smps(mvm, vif, IWL_MVM_SMPS_REQ_BT_COEX, | |
774 | smps_mode); | |
775 | return; | |
776 | } | |
7da052b8 | 777 | |
f6415f6b EG |
778 | /* the Ack / Cts kill mask must be default if AP / GO */ |
779 | data->reduced_tx_power = false; | |
780 | break; | |
781 | default: | |
782 | return; | |
783 | } | |
7da052b8 | 784 | |
dac94da8 EG |
785 | chanctx_conf = rcu_dereference(vif->chanctx_conf); |
786 | ||
787 | /* If channel context is invalid or not on 2.4GHz .. */ | |
788 | if ((!chanctx_conf || | |
789 | chanctx_conf->def.chan->band != IEEE80211_BAND_2GHZ)) { | |
f6415f6b EG |
790 | /* ... relax constraints and disable rssi events */ |
791 | iwl_mvm_update_smps(mvm, vif, IWL_MVM_SMPS_REQ_BT_COEX, | |
792 | smps_mode); | |
4d66449a | 793 | data->reduced_tx_power = false; |
0f618e6e EG |
794 | if (vif->type == NL80211_IFTYPE_STATION) { |
795 | iwl_mvm_bt_coex_reduced_txp(mvm, mvmvif->ap_sta_id, | |
796 | false); | |
f6415f6b | 797 | iwl_mvm_bt_coex_enable_rssi_event(mvm, vif, false, 0); |
0f618e6e | 798 | } |
41069b46 | 799 | return; |
dac94da8 EG |
800 | } |
801 | ||
f6415f6b EG |
802 | bt_activity_grading = le32_to_cpu(data->notif->bt_activity_grading); |
803 | if (bt_activity_grading >= BT_HIGH_TRAFFIC) | |
804 | smps_mode = IEEE80211_SMPS_STATIC; | |
805 | else if (bt_activity_grading >= BT_LOW_TRAFFIC) | |
806 | smps_mode = vif->type == NL80211_IFTYPE_AP ? | |
807 | IEEE80211_SMPS_OFF : | |
808 | IEEE80211_SMPS_DYNAMIC; | |
4d66449a EG |
809 | |
810 | /* relax SMPS contraints for next association */ | |
811 | if (!vif->bss_conf.assoc) | |
812 | smps_mode = IEEE80211_SMPS_AUTOMATIC; | |
813 | ||
f6415f6b | 814 | IWL_DEBUG_COEX(data->mvm, |
430a3bba EG |
815 | "mac %d: bt_activity_grading %d smps_req %d\n", |
816 | mvmvif->id, bt_activity_grading, smps_mode); | |
f6415f6b EG |
817 | |
818 | iwl_mvm_update_smps(mvm, vif, IWL_MVM_SMPS_REQ_BT_COEX, smps_mode); | |
819 | ||
0ee5bcdd EG |
820 | /* low latency is always primary */ |
821 | if (iwl_mvm_vif_low_latency(mvmvif)) { | |
822 | data->primary_ll = true; | |
823 | ||
824 | data->secondary = data->primary; | |
825 | data->primary = chanctx_conf; | |
826 | } | |
827 | ||
dac94da8 | 828 | if (vif->type == NL80211_IFTYPE_AP) { |
5023d966 | 829 | if (!mvmvif->ap_ibss_active) |
dac94da8 EG |
830 | return; |
831 | ||
dac94da8 EG |
832 | if (chanctx_conf == data->primary) |
833 | return; | |
834 | ||
0ee5bcdd EG |
835 | if (!data->primary_ll) { |
836 | /* | |
837 | * downgrade the current primary no matter what its | |
838 | * type is. | |
839 | */ | |
840 | data->secondary = data->primary; | |
841 | data->primary = chanctx_conf; | |
842 | } else { | |
843 | /* there is low latency vif - we will be secondary */ | |
844 | data->secondary = chanctx_conf; | |
845 | } | |
9166b1ee EG |
846 | return; |
847 | } | |
848 | ||
0ee5bcdd EG |
849 | /* |
850 | * STA / P2P Client, try to be primary if first vif. If we are in low | |
851 | * latency mode, we are already in primary and just don't do much | |
852 | */ | |
dac94da8 EG |
853 | if (!data->primary || data->primary == chanctx_conf) |
854 | data->primary = chanctx_conf; | |
855 | else if (!data->secondary) | |
856 | /* if secondary is not NULL, it might be a GO */ | |
857 | data->secondary = chanctx_conf; | |
858 | ||
4d66449a EG |
859 | /* |
860 | * don't reduce the Tx power if one of these is true: | |
861 | * we are in LOOSE | |
862 | * single share antenna product | |
863 | * BT is active | |
864 | * we are associated | |
865 | */ | |
39149911 | 866 | if (iwl_get_coex_type(mvm, vif) == BT_COEX_LOOSE_LUT || |
4d66449a | 867 | mvm->cfg->bt_shared_single_ant || !vif->bss_conf.assoc || |
430a3bba | 868 | le32_to_cpu(mvm->last_bt_notif.bt_activity_grading) == BT_OFF) { |
39149911 | 869 | data->reduced_tx_power = false; |
0f618e6e | 870 | iwl_mvm_bt_coex_reduced_txp(mvm, mvmvif->ap_sta_id, false); |
f6fc5775 | 871 | iwl_mvm_bt_coex_enable_rssi_event(mvm, vif, false, 0); |
2b76ef13 | 872 | return; |
39149911 | 873 | } |
2b76ef13 | 874 | |
911222b5 AO |
875 | /* try to get the avg rssi from fw */ |
876 | ave_rssi = mvmvif->bf_data.ave_beacon_signal; | |
2b76ef13 EG |
877 | |
878 | /* if the RSSI isn't valid, fake it is very low */ | |
879 | if (!ave_rssi) | |
880 | ave_rssi = -100; | |
8286d9f5 | 881 | if (ave_rssi > -IWL_MVM_BT_COEX_EN_RED_TXP_THRESH) { |
2b76ef13 EG |
882 | if (iwl_mvm_bt_coex_reduced_txp(mvm, mvmvif->ap_sta_id, true)) |
883 | IWL_ERR(mvm, "Couldn't send BT_CONFIG cmd\n"); | |
884 | ||
885 | /* | |
886 | * bt_kill_msk can be BT_KILL_MSK_REDUCED_TXPOW only if all the | |
887 | * BSS / P2P clients have rssi above threshold. | |
888 | * We set the bt_kill_msk to BT_KILL_MSK_REDUCED_TXPOW before | |
889 | * the iteration, if one interface's rssi isn't good enough, | |
890 | * bt_kill_msk will be set to default values. | |
891 | */ | |
8286d9f5 | 892 | } else if (ave_rssi < -IWL_MVM_BT_COEX_DIS_RED_TXP_THRESH) { |
2b76ef13 EG |
893 | if (iwl_mvm_bt_coex_reduced_txp(mvm, mvmvif->ap_sta_id, false)) |
894 | IWL_ERR(mvm, "Couldn't send BT_CONFIG cmd\n"); | |
895 | ||
896 | /* | |
897 | * One interface hasn't rssi above threshold, bt_kill_msk must | |
898 | * be set to default values. | |
899 | */ | |
9e511c31 | 900 | data->reduced_tx_power = false; |
2b76ef13 EG |
901 | } |
902 | ||
903 | /* Begin to monitor the RSSI: it may influence the reduced Tx power */ | |
f6fc5775 | 904 | iwl_mvm_bt_coex_enable_rssi_event(mvm, vif, true, ave_rssi); |
7da052b8 EG |
905 | } |
906 | ||
d37cac98 | 907 | static void iwl_mvm_bt_coex_notif_handle(struct iwl_mvm *mvm) |
f421f9c3 | 908 | { |
2b76ef13 | 909 | struct iwl_bt_iterator_data data = { |
7da052b8 | 910 | .mvm = mvm, |
d37cac98 | 911 | .notif = &mvm->last_bt_notif, |
9e511c31 | 912 | .reduced_tx_power = true, |
7da052b8 | 913 | }; |
430a3bba | 914 | struct iwl_bt_coex_ci_cmd cmd = {}; |
dac94da8 | 915 | u8 ci_bw_idx; |
f421f9c3 | 916 | |
a39979a8 EG |
917 | /* Ignore updates if we are in force mode */ |
918 | if (unlikely(mvm->bt_force_ant_mode != BT_FORCE_ANT_DIS)) | |
919 | return; | |
920 | ||
dac94da8 | 921 | rcu_read_lock(); |
7da052b8 EG |
922 | ieee80211_iterate_active_interfaces_atomic( |
923 | mvm->hw, IEEE80211_IFACE_ITER_NORMAL, | |
924 | iwl_mvm_bt_notif_iterator, &data); | |
925 | ||
dac94da8 EG |
926 | if (data.primary) { |
927 | struct ieee80211_chanctx_conf *chan = data.primary; | |
928 | if (WARN_ON(!chan->def.chan)) { | |
929 | rcu_read_unlock(); | |
930 | return; | |
931 | } | |
932 | ||
933 | if (chan->def.width < NL80211_CHAN_WIDTH_40) { | |
934 | ci_bw_idx = 0; | |
dac94da8 | 935 | } else { |
dac94da8 EG |
936 | if (chan->def.center_freq1 > |
937 | chan->def.chan->center_freq) | |
938 | ci_bw_idx = 2; | |
939 | else | |
940 | ci_bw_idx = 1; | |
941 | } | |
942 | ||
943 | cmd.bt_primary_ci = | |
944 | iwl_ci_mask[chan->def.chan->hw_value][ci_bw_idx]; | |
430a3bba EG |
945 | cmd.primary_ch_phy_id = |
946 | cpu_to_le32(*((u16 *)data.primary->drv_priv)); | |
dac94da8 EG |
947 | } |
948 | ||
949 | if (data.secondary) { | |
950 | struct ieee80211_chanctx_conf *chan = data.secondary; | |
951 | if (WARN_ON(!data.secondary->def.chan)) { | |
952 | rcu_read_unlock(); | |
953 | return; | |
954 | } | |
955 | ||
956 | if (chan->def.width < NL80211_CHAN_WIDTH_40) { | |
957 | ci_bw_idx = 0; | |
dac94da8 | 958 | } else { |
dac94da8 EG |
959 | if (chan->def.center_freq1 > |
960 | chan->def.chan->center_freq) | |
961 | ci_bw_idx = 2; | |
962 | else | |
963 | ci_bw_idx = 1; | |
964 | } | |
965 | ||
966 | cmd.bt_secondary_ci = | |
967 | iwl_ci_mask[chan->def.chan->hw_value][ci_bw_idx]; | |
430a3bba EG |
968 | cmd.secondary_ch_phy_id = |
969 | cpu_to_le32(*((u16 *)data.secondary->drv_priv)); | |
dac94da8 EG |
970 | } |
971 | ||
972 | rcu_read_unlock(); | |
973 | ||
974 | /* Don't spam the fw with the same command over and over */ | |
975 | if (memcmp(&cmd, &mvm->last_bt_ci_cmd, sizeof(cmd))) { | |
a1022927 | 976 | if (iwl_mvm_send_cmd_pdu(mvm, BT_COEX_CI, 0, |
dac94da8 | 977 | sizeof(cmd), &cmd)) |
3c6acb61 | 978 | IWL_ERR(mvm, "Failed to send BT_CI cmd\n"); |
dac94da8 EG |
979 | memcpy(&mvm->last_bt_ci_cmd, &cmd, sizeof(cmd)); |
980 | } | |
981 | ||
2b76ef13 EG |
982 | /* |
983 | * If there are no BSS / P2P client interfaces, reduced Tx Power is | |
984 | * irrelevant since it is based on the RSSI coming from the beacon. | |
985 | * Use BT_KILL_MSK_DEFAULT in that case. | |
986 | */ | |
9e511c31 | 987 | data.reduced_tx_power = data.reduced_tx_power && data.num_bss_ifaces; |
2b76ef13 | 988 | |
9e511c31 | 989 | if (iwl_mvm_bt_udpate_ctrl_kill_msk(mvm, data.reduced_tx_power)) |
2b76ef13 | 990 | IWL_ERR(mvm, "Failed to update the ctrl_kill_msk\n"); |
9166b1ee EG |
991 | } |
992 | ||
9166b1ee EG |
993 | int iwl_mvm_rx_bt_coex_notif(struct iwl_mvm *mvm, |
994 | struct iwl_rx_cmd_buffer *rxb, | |
995 | struct iwl_device_cmd *dev_cmd) | |
996 | { | |
997 | struct iwl_rx_packet *pkt = rxb_addr(rxb); | |
0ea8d043 | 998 | struct iwl_bt_coex_profile_notif_old *notif = (void *)pkt->data; |
9166b1ee | 999 | |
0ea8d043 EG |
1000 | if (!(mvm->fw->ucode_capa.api[0] & IWL_UCODE_TLV_API_BT_COEX_SPLIT)) |
1001 | return iwl_mvm_rx_bt_coex_notif_old(mvm, rxb, dev_cmd); | |
1002 | ||
1003 | /* TODO */ | |
1004 | return 0; | |
9166b1ee EG |
1005 | |
1006 | IWL_DEBUG_COEX(mvm, "BT Coex Notification received\n"); | |
dac94da8 EG |
1007 | IWL_DEBUG_COEX(mvm, "\tBT ci compliance %d\n", notif->bt_ci_compliance); |
1008 | IWL_DEBUG_COEX(mvm, "\tBT primary_ch_lut %d\n", | |
1009 | le32_to_cpu(notif->primary_ch_lut)); | |
1010 | IWL_DEBUG_COEX(mvm, "\tBT secondary_ch_lut %d\n", | |
1011 | le32_to_cpu(notif->secondary_ch_lut)); | |
1012 | IWL_DEBUG_COEX(mvm, "\tBT activity grading %d\n", | |
1013 | le32_to_cpu(notif->bt_activity_grading)); | |
9166b1ee | 1014 | |
d37cac98 EG |
1015 | /* remember this notification for future use: rssi fluctuations */ |
1016 | memcpy(&mvm->last_bt_notif, notif, sizeof(mvm->last_bt_notif)); | |
1017 | ||
1018 | iwl_mvm_bt_coex_notif_handle(mvm); | |
2b76ef13 EG |
1019 | |
1020 | /* | |
1021 | * This is an async handler for a notification, returning anything other | |
1022 | * than 0 doesn't make sense even if HCMD failed. | |
1023 | */ | |
1024 | return 0; | |
1025 | } | |
1026 | ||
1027 | static void iwl_mvm_bt_rssi_iterator(void *_data, u8 *mac, | |
1028 | struct ieee80211_vif *vif) | |
1029 | { | |
1030 | struct iwl_mvm_vif *mvmvif = (void *)vif->drv_priv; | |
1031 | struct iwl_bt_iterator_data *data = _data; | |
1032 | struct iwl_mvm *mvm = data->mvm; | |
1033 | ||
1034 | struct ieee80211_sta *sta; | |
1035 | struct iwl_mvm_sta *mvmsta; | |
1036 | ||
f6fc5775 EG |
1037 | struct ieee80211_chanctx_conf *chanctx_conf; |
1038 | ||
1039 | rcu_read_lock(); | |
1040 | chanctx_conf = rcu_dereference(vif->chanctx_conf); | |
1041 | /* If channel context is invalid or not on 2.4GHz - don't count it */ | |
1042 | if (!chanctx_conf || | |
1043 | chanctx_conf->def.chan->band != IEEE80211_BAND_2GHZ) { | |
1044 | rcu_read_unlock(); | |
1045 | return; | |
1046 | } | |
1047 | rcu_read_unlock(); | |
1048 | ||
2b76ef13 EG |
1049 | if (vif->type != NL80211_IFTYPE_STATION || |
1050 | mvmvif->ap_sta_id == IWL_MVM_STATION_COUNT) | |
1051 | return; | |
1052 | ||
1053 | sta = rcu_dereference_protected(mvm->fw_id_to_mac_id[mvmvif->ap_sta_id], | |
1054 | lockdep_is_held(&mvm->mutex)); | |
56c07a9c EG |
1055 | |
1056 | /* This can happen if the station has been removed right now */ | |
1057 | if (IS_ERR_OR_NULL(sta)) | |
1058 | return; | |
1059 | ||
5b577a90 | 1060 | mvmsta = iwl_mvm_sta_from_mac80211(sta); |
2b76ef13 | 1061 | |
8e0366f9 EG |
1062 | data->num_bss_ifaces++; |
1063 | ||
2b76ef13 EG |
1064 | /* |
1065 | * This interface doesn't support reduced Tx power (because of low | |
1066 | * RSSI probably), then set bt_kill_msk to default values. | |
1067 | */ | |
1068 | if (!mvmsta->bt_reduced_txpower) | |
9e511c31 | 1069 | data->reduced_tx_power = false; |
2b76ef13 EG |
1070 | /* else - possibly leave it to BT_KILL_MSK_REDUCED_TXPOW */ |
1071 | } | |
1072 | ||
1073 | void iwl_mvm_bt_rssi_event(struct iwl_mvm *mvm, struct ieee80211_vif *vif, | |
1074 | enum ieee80211_rssi_event rssi_event) | |
1075 | { | |
1076 | struct iwl_mvm_vif *mvmvif = (void *)vif->drv_priv; | |
2b76ef13 EG |
1077 | struct iwl_bt_iterator_data data = { |
1078 | .mvm = mvm, | |
9e511c31 | 1079 | .reduced_tx_power = true, |
2b76ef13 EG |
1080 | }; |
1081 | int ret; | |
1082 | ||
0ea8d043 EG |
1083 | if (!(mvm->fw->ucode_capa.api[0] & IWL_UCODE_TLV_API_BT_COEX_SPLIT)) { |
1084 | iwl_mvm_bt_rssi_event_old(mvm, vif, rssi_event); | |
1085 | return; | |
1086 | } | |
1087 | ||
1088 | /* TODO */ | |
1089 | return; | |
1090 | ||
3dd1cd2d | 1091 | lockdep_assert_held(&mvm->mutex); |
2b76ef13 | 1092 | |
a39979a8 EG |
1093 | /* Ignore updates if we are in force mode */ |
1094 | if (unlikely(mvm->bt_force_ant_mode != BT_FORCE_ANT_DIS)) | |
1095 | return; | |
1096 | ||
1e929199 EG |
1097 | /* |
1098 | * Rssi update while not associated - can happen since the statistics | |
1099 | * are handled asynchronously | |
1100 | */ | |
1101 | if (mvmvif->ap_sta_id == IWL_MVM_STATION_COUNT) | |
3dd1cd2d | 1102 | return; |
2b76ef13 | 1103 | |
4515f30f | 1104 | /* No BT - reports should be disabled */ |
430a3bba | 1105 | if (le32_to_cpu(mvm->last_bt_notif.bt_activity_grading) == BT_OFF) |
3dd1cd2d | 1106 | return; |
2b76ef13 EG |
1107 | |
1108 | IWL_DEBUG_COEX(mvm, "RSSI for %pM is now %s\n", vif->bss_conf.bssid, | |
1109 | rssi_event == RSSI_EVENT_HIGH ? "HIGH" : "LOW"); | |
1110 | ||
1111 | /* | |
1112 | * Check if rssi is good enough for reduced Tx power, but not in loose | |
1113 | * scheme. | |
1114 | */ | |
39149911 | 1115 | if (rssi_event == RSSI_EVENT_LOW || mvm->cfg->bt_shared_single_ant || |
4515f30f | 1116 | iwl_get_coex_type(mvm, vif) == BT_COEX_LOOSE_LUT) |
2b76ef13 EG |
1117 | ret = iwl_mvm_bt_coex_reduced_txp(mvm, mvmvif->ap_sta_id, |
1118 | false); | |
f421f9c3 | 1119 | else |
2b76ef13 | 1120 | ret = iwl_mvm_bt_coex_reduced_txp(mvm, mvmvif->ap_sta_id, true); |
f421f9c3 | 1121 | |
2b76ef13 EG |
1122 | if (ret) |
1123 | IWL_ERR(mvm, "couldn't send BT_CONFIG HCMD upon RSSI event\n"); | |
f421f9c3 | 1124 | |
2b76ef13 EG |
1125 | ieee80211_iterate_active_interfaces_atomic( |
1126 | mvm->hw, IEEE80211_IFACE_ITER_NORMAL, | |
1127 | iwl_mvm_bt_rssi_iterator, &data); | |
f421f9c3 | 1128 | |
2b76ef13 EG |
1129 | /* |
1130 | * If there are no BSS / P2P client interfaces, reduced Tx Power is | |
1131 | * irrelevant since it is based on the RSSI coming from the beacon. | |
1132 | * Use BT_KILL_MSK_DEFAULT in that case. | |
1133 | */ | |
9e511c31 | 1134 | data.reduced_tx_power = data.reduced_tx_power && data.num_bss_ifaces; |
f421f9c3 | 1135 | |
9e511c31 | 1136 | if (iwl_mvm_bt_udpate_ctrl_kill_msk(mvm, data.reduced_tx_power)) |
2b76ef13 | 1137 | IWL_ERR(mvm, "Failed to update the ctrl_kill_msk\n"); |
f421f9c3 | 1138 | } |
9166b1ee | 1139 | |
9145d151 EG |
1140 | #define LINK_QUAL_AGG_TIME_LIMIT_DEF (4000) |
1141 | #define LINK_QUAL_AGG_TIME_LIMIT_BT_ACT (1200) | |
1142 | ||
5b7ff615 EG |
1143 | u16 iwl_mvm_coex_agg_time_limit(struct iwl_mvm *mvm, |
1144 | struct ieee80211_sta *sta) | |
9145d151 | 1145 | { |
5b577a90 | 1146 | struct iwl_mvm_sta *mvmsta = iwl_mvm_sta_from_mac80211(sta); |
9145d151 EG |
1147 | enum iwl_bt_coex_lut_type lut_type; |
1148 | ||
0ea8d043 EG |
1149 | if (!(mvm->fw->ucode_capa.api[0] & IWL_UCODE_TLV_API_BT_COEX_SPLIT)) |
1150 | return iwl_mvm_coex_agg_time_limit_old(mvm, sta); | |
1151 | ||
1152 | /* TODO */ | |
1153 | return LINK_QUAL_AGG_TIME_LIMIT_DEF; | |
1154 | ||
9145d151 | 1155 | if (le32_to_cpu(mvm->last_bt_notif.bt_activity_grading) < |
c2119351 | 1156 | BT_HIGH_TRAFFIC) |
9145d151 | 1157 | return LINK_QUAL_AGG_TIME_LIMIT_DEF; |
430a3bba EG |
1158 | /* |
1159 | TODO | |
35fbf5d0 EG |
1160 | if (mvm->last_bt_notif.ttc_enabled) |
1161 | return LINK_QUAL_AGG_TIME_LIMIT_DEF; | |
430a3bba | 1162 | */ |
35fbf5d0 | 1163 | |
9145d151 EG |
1164 | lut_type = iwl_get_coex_type(mvm, mvmsta->vif); |
1165 | ||
7fa4fa0c | 1166 | if (lut_type == BT_COEX_LOOSE_LUT || lut_type == BT_COEX_INVALID_LUT) |
9145d151 EG |
1167 | return LINK_QUAL_AGG_TIME_LIMIT_DEF; |
1168 | ||
1169 | /* tight coex, high bt traffic, reduce AGG time limit */ | |
1170 | return LINK_QUAL_AGG_TIME_LIMIT_BT_ACT; | |
1171 | } | |
1172 | ||
ffa6c707 EG |
1173 | bool iwl_mvm_bt_coex_is_mimo_allowed(struct iwl_mvm *mvm, |
1174 | struct ieee80211_sta *sta) | |
1175 | { | |
5b577a90 | 1176 | struct iwl_mvm_sta *mvmsta = iwl_mvm_sta_from_mac80211(sta); |
7fa4fa0c | 1177 | enum iwl_bt_coex_lut_type lut_type; |
ffa6c707 | 1178 | |
0ea8d043 EG |
1179 | if (!(mvm->fw->ucode_capa.api[0] & IWL_UCODE_TLV_API_BT_COEX_SPLIT)) |
1180 | return iwl_mvm_coex_agg_time_limit_old(mvm, sta); | |
1181 | ||
430a3bba EG |
1182 | /* |
1183 | TODO | |
35fbf5d0 EG |
1184 | if (mvm->last_bt_notif.ttc_enabled) |
1185 | return true; | |
430a3bba | 1186 | */ |
35fbf5d0 | 1187 | |
ffa6c707 EG |
1188 | if (le32_to_cpu(mvm->last_bt_notif.bt_activity_grading) < |
1189 | BT_HIGH_TRAFFIC) | |
1190 | return true; | |
1191 | ||
1192 | /* | |
7fa4fa0c EG |
1193 | * In Tight / TxTxDis, BT can't Rx while we Tx, so use both antennas |
1194 | * since BT is already killed. | |
1195 | * In Loose, BT can Rx while we Tx, so forbid MIMO to let BT Rx while | |
1196 | * we Tx. | |
1197 | * When we are in 5GHz, we'll get BT_COEX_INVALID_LUT allowing MIMO. | |
ffa6c707 | 1198 | */ |
7fa4fa0c EG |
1199 | lut_type = iwl_get_coex_type(mvm, mvmsta->vif); |
1200 | return lut_type != BT_COEX_LOOSE_LUT; | |
ffa6c707 EG |
1201 | } |
1202 | ||
34c8b24f EG |
1203 | bool iwl_mvm_bt_coex_is_shared_ant_avail(struct iwl_mvm *mvm) |
1204 | { | |
0ea8d043 EG |
1205 | if (!(mvm->fw->ucode_capa.api[0] & IWL_UCODE_TLV_API_BT_COEX_SPLIT)) |
1206 | return iwl_mvm_bt_coex_is_shared_ant_avail_old(mvm); | |
1207 | ||
34c8b24f EG |
1208 | return le32_to_cpu(mvm->last_bt_notif.bt_activity_grading) == BT_OFF; |
1209 | } | |
1210 | ||
2fd647f8 EP |
1211 | bool iwl_mvm_bt_coex_is_tpc_allowed(struct iwl_mvm *mvm, |
1212 | enum ieee80211_band band) | |
1213 | { | |
1214 | u32 bt_activity = le32_to_cpu(mvm->last_bt_notif.bt_activity_grading); | |
1215 | ||
0ea8d043 EG |
1216 | if (!(mvm->fw->ucode_capa.api[0] & IWL_UCODE_TLV_API_BT_COEX_SPLIT)) |
1217 | return iwl_mvm_bt_coex_is_tpc_allowed_old(mvm, band); | |
1218 | ||
1219 | /* TODO */ | |
1220 | return false; | |
1221 | ||
2fd647f8 EP |
1222 | if (band != IEEE80211_BAND_2GHZ) |
1223 | return false; | |
1224 | ||
1225 | return bt_activity >= BT_LOW_TRAFFIC; | |
1226 | } | |
1227 | ||
ee7bea58 | 1228 | u8 iwl_mvm_bt_coex_tx_prio(struct iwl_mvm *mvm, struct ieee80211_hdr *hdr, |
b797e3fb | 1229 | struct ieee80211_tx_info *info, u8 ac) |
ee7bea58 EG |
1230 | { |
1231 | __le16 fc = hdr->frame_control; | |
1232 | ||
b797e3fb EG |
1233 | if (info->band != IEEE80211_BAND_2GHZ) |
1234 | return 0; | |
1235 | ||
cdb00563 EG |
1236 | if (unlikely(mvm->bt_tx_prio)) |
1237 | return mvm->bt_tx_prio - 1; | |
1238 | ||
ee7bea58 | 1239 | /* High prio packet (wrt. BT coex) if it is EAPOL, MCAST or MGMT */ |
b797e3fb | 1240 | if (info->control.flags & IEEE80211_TX_CTRL_PORT_CTRL_PROTO || |
ee7bea58 | 1241 | is_multicast_ether_addr(hdr->addr1) || |
b797e3fb EG |
1242 | ieee80211_is_ctl(fc) || ieee80211_is_mgmt(fc) || |
1243 | ieee80211_is_nullfunc(fc) || ieee80211_is_qos_nullfunc(fc)) | |
1244 | return 3; | |
1245 | ||
1246 | switch (ac) { | |
1247 | case IEEE80211_AC_BE: | |
1248 | return 1; | |
1249 | case IEEE80211_AC_VO: | |
1250 | return 3; | |
1251 | case IEEE80211_AC_VI: | |
ee7bea58 | 1252 | return 2; |
b797e3fb EG |
1253 | default: |
1254 | break; | |
1255 | } | |
ee7bea58 EG |
1256 | |
1257 | return 0; | |
1258 | } | |
1259 | ||
8e484f0b | 1260 | void iwl_mvm_bt_coex_vif_change(struct iwl_mvm *mvm) |
9166b1ee | 1261 | { |
0ea8d043 EG |
1262 | if (!(mvm->fw->ucode_capa.api[0] & IWL_UCODE_TLV_API_BT_COEX_SPLIT)) { |
1263 | iwl_mvm_bt_coex_vif_change_old(mvm); | |
1264 | return; | |
1265 | } | |
1266 | ||
1267 | /* TODO */ | |
1268 | return; | |
1269 | ||
d37cac98 | 1270 | iwl_mvm_bt_coex_notif_handle(mvm); |
9166b1ee | 1271 | } |
b9fae2d5 EG |
1272 | |
1273 | int iwl_mvm_rx_ant_coupling_notif(struct iwl_mvm *mvm, | |
1274 | struct iwl_rx_cmd_buffer *rxb, | |
1275 | struct iwl_device_cmd *dev_cmd) | |
1276 | { | |
1277 | struct iwl_rx_packet *pkt = rxb_addr(rxb); | |
1278 | u32 ant_isolation = le32_to_cpup((void *)pkt->data); | |
1279 | u8 __maybe_unused lower_bound, upper_bound; | |
fff47eb0 | 1280 | int ret; |
b9fae2d5 EG |
1281 | u8 lut; |
1282 | ||
0ea8d043 | 1283 | struct iwl_bt_coex_cmd_old *bt_cmd; |
b9fae2d5 EG |
1284 | struct iwl_host_cmd cmd = { |
1285 | .id = BT_CONFIG, | |
1286 | .len = { sizeof(*bt_cmd), }, | |
1287 | .dataflags = { IWL_HCMD_DFL_NOCOPY, }, | |
b9fae2d5 EG |
1288 | }; |
1289 | ||
0ea8d043 EG |
1290 | if (!(mvm->fw->ucode_capa.api[0] & IWL_UCODE_TLV_API_BT_COEX_SPLIT)) |
1291 | return iwl_mvm_rx_ant_coupling_notif_old(mvm, rxb, dev_cmd); | |
1292 | ||
1293 | /* TODO */ | |
1294 | return 0; | |
1295 | ||
b9fae2d5 EG |
1296 | if (!IWL_MVM_BT_COEX_CORUNNING) |
1297 | return 0; | |
1298 | ||
1299 | lockdep_assert_held(&mvm->mutex); | |
1300 | ||
a39979a8 EG |
1301 | /* Ignore updates if we are in force mode */ |
1302 | if (unlikely(mvm->bt_force_ant_mode != BT_FORCE_ANT_DIS)) | |
1303 | return 0; | |
1304 | ||
b9fae2d5 EG |
1305 | if (ant_isolation == mvm->last_ant_isol) |
1306 | return 0; | |
1307 | ||
1308 | for (lut = 0; lut < ARRAY_SIZE(antenna_coupling_ranges) - 1; lut++) | |
1309 | if (ant_isolation < antenna_coupling_ranges[lut + 1].range) | |
1310 | break; | |
1311 | ||
1312 | lower_bound = antenna_coupling_ranges[lut].range; | |
1313 | ||
1314 | if (lut < ARRAY_SIZE(antenna_coupling_ranges) - 1) | |
1315 | upper_bound = antenna_coupling_ranges[lut + 1].range; | |
1316 | else | |
1317 | upper_bound = antenna_coupling_ranges[lut].range; | |
1318 | ||
1319 | IWL_DEBUG_COEX(mvm, "Antenna isolation=%d in range [%d,%d[, lut=%d\n", | |
1320 | ant_isolation, lower_bound, upper_bound, lut); | |
1321 | ||
1322 | mvm->last_ant_isol = ant_isolation; | |
1323 | ||
1324 | if (mvm->last_corun_lut == lut) | |
1325 | return 0; | |
1326 | ||
1327 | mvm->last_corun_lut = lut; | |
1328 | ||
1329 | bt_cmd = kzalloc(sizeof(*bt_cmd), GFP_KERNEL); | |
1330 | if (!bt_cmd) | |
1331 | return 0; | |
1332 | cmd.data[0] = bt_cmd; | |
1333 | ||
0ea8d043 | 1334 | bt_cmd->flags = cpu_to_le32(BT_COEX_NW_OLD); |
b9fae2d5 EG |
1335 | bt_cmd->valid_bit_msk |= cpu_to_le32(BT_VALID_ENABLE | |
1336 | BT_VALID_CORUN_LUT_20 | | |
1337 | BT_VALID_CORUN_LUT_40); | |
1338 | ||
1339 | /* For the moment, use the same LUT for 20GHz and 40GHz */ | |
1340 | memcpy(bt_cmd->bt4_corun_lut20, antenna_coupling_ranges[lut].lut20, | |
1341 | sizeof(bt_cmd->bt4_corun_lut20)); | |
1342 | ||
1343 | memcpy(bt_cmd->bt4_corun_lut40, antenna_coupling_ranges[lut].lut20, | |
1344 | sizeof(bt_cmd->bt4_corun_lut40)); | |
1345 | ||
fff47eb0 EG |
1346 | ret = iwl_mvm_send_cmd(mvm, &cmd); |
1347 | ||
1348 | kfree(bt_cmd); | |
1349 | return ret; | |
b9fae2d5 | 1350 | } |