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931d4160 EG |
1 | /****************************************************************************** |
2 | * | |
3 | * This file is provided under a dual BSD/GPLv2 license. When using or | |
4 | * redistributing this file, you may do so under either license. | |
5 | * | |
6 | * GPL LICENSE SUMMARY | |
7 | * | |
51368bf7 | 8 | * Copyright(c) 2013 - 2014 Intel Corporation. All rights reserved. |
931d4160 EG |
9 | * |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of version 2 of the GNU General Public License as | |
12 | * published by the Free Software Foundation. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, but | |
15 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
17 | * General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110, | |
22 | * USA | |
23 | * | |
24 | * The full GNU General Public License is included in this distribution | |
25 | * in the file called COPYING. | |
26 | * | |
27 | * Contact Information: | |
28 | * Intel Linux Wireless <ilw@linux.intel.com> | |
29 | * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | |
30 | * | |
31 | * BSD LICENSE | |
32 | * | |
51368bf7 | 33 | * Copyright(c) 2013 - 2014 Intel Corporation. All rights reserved. |
931d4160 EG |
34 | * All rights reserved. |
35 | * | |
36 | * Redistribution and use in source and binary forms, with or without | |
37 | * modification, are permitted provided that the following conditions | |
38 | * are met: | |
39 | * | |
40 | * * Redistributions of source code must retain the above copyright | |
41 | * notice, this list of conditions and the following disclaimer. | |
42 | * * Redistributions in binary form must reproduce the above copyright | |
43 | * notice, this list of conditions and the following disclaimer in | |
44 | * the documentation and/or other materials provided with the | |
45 | * distribution. | |
46 | * * Neither the name Intel Corporation nor the names of its | |
47 | * contributors may be used to endorse or promote products derived | |
48 | * from this software without specific prior written permission. | |
49 | * | |
50 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS | |
51 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT | |
52 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR | |
53 | * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT | |
54 | * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, | |
55 | * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT | |
56 | * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, | |
57 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY | |
58 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | |
59 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE | |
60 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
61 | * | |
62 | *****************************************************************************/ | |
63 | ||
ee7bea58 EG |
64 | #include <linux/ieee80211.h> |
65 | #include <linux/etherdevice.h> | |
2b76ef13 EG |
66 | #include <net/mac80211.h> |
67 | ||
5b7ff615 | 68 | #include "fw-api-coex.h" |
931d4160 EG |
69 | #include "iwl-modparams.h" |
70 | #include "mvm.h" | |
f421f9c3 | 71 | #include "iwl-debug.h" |
931d4160 EG |
72 | |
73 | #define EVENT_PRIO_ANT(_evt, _prio, _shrd_ant) \ | |
74 | [(_evt)] = (((_prio) << BT_COEX_PRIO_TBL_PRIO_POS) | \ | |
75 | ((_shrd_ant) << BT_COEX_PRIO_TBL_SHRD_ANT_POS)) | |
76 | ||
77 | static const u8 iwl_bt_prio_tbl[BT_COEX_PRIO_TBL_EVT_MAX] = { | |
78 | EVENT_PRIO_ANT(BT_COEX_PRIO_TBL_EVT_INIT_CALIB1, | |
79 | BT_COEX_PRIO_TBL_PRIO_BYPASS, 0), | |
80 | EVENT_PRIO_ANT(BT_COEX_PRIO_TBL_EVT_INIT_CALIB2, | |
81 | BT_COEX_PRIO_TBL_PRIO_BYPASS, 1), | |
82 | EVENT_PRIO_ANT(BT_COEX_PRIO_TBL_EVT_PERIODIC_CALIB_LOW1, | |
83 | BT_COEX_PRIO_TBL_PRIO_LOW, 0), | |
84 | EVENT_PRIO_ANT(BT_COEX_PRIO_TBL_EVT_PERIODIC_CALIB_LOW2, | |
85 | BT_COEX_PRIO_TBL_PRIO_LOW, 1), | |
86 | EVENT_PRIO_ANT(BT_COEX_PRIO_TBL_EVT_PERIODIC_CALIB_HIGH1, | |
87 | BT_COEX_PRIO_TBL_PRIO_HIGH, 0), | |
88 | EVENT_PRIO_ANT(BT_COEX_PRIO_TBL_EVT_PERIODIC_CALIB_HIGH2, | |
89 | BT_COEX_PRIO_TBL_PRIO_HIGH, 1), | |
90 | EVENT_PRIO_ANT(BT_COEX_PRIO_TBL_EVT_DTIM, | |
91 | BT_COEX_PRIO_TBL_DISABLED, 0), | |
92 | EVENT_PRIO_ANT(BT_COEX_PRIO_TBL_EVT_SCAN52, | |
93 | BT_COEX_PRIO_TBL_PRIO_COEX_OFF, 0), | |
94 | EVENT_PRIO_ANT(BT_COEX_PRIO_TBL_EVT_SCAN24, | |
95 | BT_COEX_PRIO_TBL_PRIO_COEX_ON, 0), | |
96 | EVENT_PRIO_ANT(BT_COEX_PRIO_TBL_EVT_IDLE, | |
97 | BT_COEX_PRIO_TBL_PRIO_COEX_IDLE, 0), | |
98 | 0, 0, 0, 0, 0, 0, | |
99 | }; | |
100 | ||
101 | #undef EVENT_PRIO_ANT | |
102 | ||
dac94da8 | 103 | #define BT_ANTENNA_COUPLING_THRESHOLD (30) |
2b76ef13 | 104 | |
ae397472 | 105 | static int iwl_send_bt_prio_tbl(struct iwl_mvm *mvm) |
931d4160 | 106 | { |
a39979a8 EG |
107 | if (unlikely(mvm->bt_force_ant_mode != BT_FORCE_ANT_DIS)) |
108 | return 0; | |
109 | ||
a1022927 | 110 | return iwl_mvm_send_cmd_pdu(mvm, BT_COEX_PRIO_TABLE, 0, |
931d4160 EG |
111 | sizeof(struct iwl_bt_coex_prio_tbl_cmd), |
112 | &iwl_bt_prio_tbl); | |
113 | } | |
114 | ||
2de13cae | 115 | const u32 iwl_bt_ack_kill_msk[BT_KILL_MSK_MAX] = { |
5b7e662b EG |
116 | [BT_KILL_MSK_DEFAULT] = 0xffff0000, |
117 | [BT_KILL_MSK_SCO_HID_A2DP] = 0xffffffff, | |
118 | [BT_KILL_MSK_REDUCED_TXPOW] = 0, | |
931d4160 EG |
119 | }; |
120 | ||
2de13cae | 121 | const u32 iwl_bt_cts_kill_msk[BT_KILL_MSK_MAX] = { |
5b7e662b EG |
122 | [BT_KILL_MSK_DEFAULT] = 0xffff0000, |
123 | [BT_KILL_MSK_SCO_HID_A2DP] = 0xffffffff, | |
124 | [BT_KILL_MSK_REDUCED_TXPOW] = 0, | |
931d4160 EG |
125 | }; |
126 | ||
dac94da8 | 127 | static const __le32 iwl_bt_prio_boost[BT_COEX_BOOST_SIZE] = { |
2adc8949 EG |
128 | cpu_to_le32(0xf0f0f0f0), /* 50% */ |
129 | cpu_to_le32(0xc0c0c0c0), /* 25% */ | |
130 | cpu_to_le32(0xfcfcfcfc), /* 75% */ | |
131 | cpu_to_le32(0xfefefefe), /* 87.5% */ | |
931d4160 EG |
132 | }; |
133 | ||
d1d5e3cd EG |
134 | static const __le32 iwl_single_shared_ant[BT_COEX_MAX_LUT][BT_COEX_LUT_SIZE] = { |
135 | { | |
136 | cpu_to_le32(0x40000000), | |
137 | cpu_to_le32(0x00000000), | |
138 | cpu_to_le32(0x44000000), | |
139 | cpu_to_le32(0x00000000), | |
140 | cpu_to_le32(0x40000000), | |
141 | cpu_to_le32(0x00000000), | |
142 | cpu_to_le32(0x44000000), | |
143 | cpu_to_le32(0x00000000), | |
144 | cpu_to_le32(0xc0004000), | |
145 | cpu_to_le32(0xf0005000), | |
146 | cpu_to_le32(0xc0004000), | |
147 | cpu_to_le32(0xf0005000), | |
148 | }, | |
149 | { | |
150 | cpu_to_le32(0x40000000), | |
151 | cpu_to_le32(0x00000000), | |
152 | cpu_to_le32(0x44000000), | |
153 | cpu_to_le32(0x00000000), | |
154 | cpu_to_le32(0x40000000), | |
155 | cpu_to_le32(0x00000000), | |
156 | cpu_to_le32(0x44000000), | |
157 | cpu_to_le32(0x00000000), | |
158 | cpu_to_le32(0xc0004000), | |
159 | cpu_to_le32(0xf0005000), | |
160 | cpu_to_le32(0xc0004000), | |
161 | cpu_to_le32(0xf0005000), | |
162 | }, | |
163 | { | |
164 | cpu_to_le32(0x40000000), | |
165 | cpu_to_le32(0x00000000), | |
166 | cpu_to_le32(0x44000000), | |
167 | cpu_to_le32(0x00000000), | |
168 | cpu_to_le32(0x40000000), | |
169 | cpu_to_le32(0x00000000), | |
170 | cpu_to_le32(0x44000000), | |
171 | cpu_to_le32(0x00000000), | |
172 | cpu_to_le32(0xc0004000), | |
173 | cpu_to_le32(0xf0005000), | |
174 | cpu_to_le32(0xc0004000), | |
175 | cpu_to_le32(0xf0005000), | |
176 | }, | |
177 | }; | |
178 | ||
dac94da8 EG |
179 | static const __le32 iwl_combined_lookup[BT_COEX_MAX_LUT][BT_COEX_LUT_SIZE] = { |
180 | { | |
181 | /* Tight */ | |
182 | cpu_to_le32(0xaaaaaaaa), | |
183 | cpu_to_le32(0xaaaaaaaa), | |
184 | cpu_to_le32(0xaeaaaaaa), | |
185 | cpu_to_le32(0xaaaaaaaa), | |
186 | cpu_to_le32(0xcc00ff28), | |
187 | cpu_to_le32(0x0000aaaa), | |
188 | cpu_to_le32(0xcc00aaaa), | |
189 | cpu_to_le32(0x0000aaaa), | |
190 | cpu_to_le32(0xc0004000), | |
a6bc9280 | 191 | cpu_to_le32(0x00004000), |
dac94da8 EG |
192 | cpu_to_le32(0xf0005000), |
193 | cpu_to_le32(0xf0005000), | |
194 | }, | |
195 | { | |
196 | /* Loose */ | |
197 | cpu_to_le32(0xaaaaaaaa), | |
198 | cpu_to_le32(0xaaaaaaaa), | |
199 | cpu_to_le32(0xaaaaaaaa), | |
200 | cpu_to_le32(0xaaaaaaaa), | |
201 | cpu_to_le32(0xcc00ff28), | |
202 | cpu_to_le32(0x0000aaaa), | |
203 | cpu_to_le32(0xcc00aaaa), | |
204 | cpu_to_le32(0x0000aaaa), | |
205 | cpu_to_le32(0x00000000), | |
206 | cpu_to_le32(0x00000000), | |
207 | cpu_to_le32(0xf0005000), | |
208 | cpu_to_le32(0xf0005000), | |
209 | }, | |
210 | { | |
211 | /* Tx Tx disabled */ | |
212 | cpu_to_le32(0xaaaaaaaa), | |
213 | cpu_to_le32(0xaaaaaaaa), | |
a6bc9280 | 214 | cpu_to_le32(0xeeaaaaaa), |
dac94da8 EG |
215 | cpu_to_le32(0xaaaaaaaa), |
216 | cpu_to_le32(0xcc00ff28), | |
217 | cpu_to_le32(0x0000aaaa), | |
218 | cpu_to_le32(0xcc00aaaa), | |
219 | cpu_to_le32(0x0000aaaa), | |
a6bc9280 EG |
220 | cpu_to_le32(0xc0004000), |
221 | cpu_to_le32(0xc0004000), | |
222 | cpu_to_le32(0xf0005000), | |
223 | cpu_to_le32(0xf0005000), | |
dac94da8 | 224 | }, |
931d4160 EG |
225 | }; |
226 | ||
dac94da8 EG |
227 | /* 20MHz / 40MHz below / 40Mhz above*/ |
228 | static const __le64 iwl_ci_mask[][3] = { | |
229 | /* dummy entry for channel 0 */ | |
230 | {cpu_to_le64(0), cpu_to_le64(0), cpu_to_le64(0)}, | |
231 | { | |
232 | cpu_to_le64(0x0000001FFFULL), | |
233 | cpu_to_le64(0x0ULL), | |
234 | cpu_to_le64(0x00007FFFFFULL), | |
235 | }, | |
236 | { | |
237 | cpu_to_le64(0x000000FFFFULL), | |
238 | cpu_to_le64(0x0ULL), | |
239 | cpu_to_le64(0x0003FFFFFFULL), | |
240 | }, | |
241 | { | |
242 | cpu_to_le64(0x000003FFFCULL), | |
243 | cpu_to_le64(0x0ULL), | |
244 | cpu_to_le64(0x000FFFFFFCULL), | |
245 | }, | |
246 | { | |
247 | cpu_to_le64(0x00001FFFE0ULL), | |
248 | cpu_to_le64(0x0ULL), | |
249 | cpu_to_le64(0x007FFFFFE0ULL), | |
250 | }, | |
251 | { | |
252 | cpu_to_le64(0x00007FFF80ULL), | |
253 | cpu_to_le64(0x00007FFFFFULL), | |
254 | cpu_to_le64(0x01FFFFFF80ULL), | |
255 | }, | |
256 | { | |
257 | cpu_to_le64(0x0003FFFC00ULL), | |
258 | cpu_to_le64(0x0003FFFFFFULL), | |
259 | cpu_to_le64(0x0FFFFFFC00ULL), | |
260 | }, | |
261 | { | |
262 | cpu_to_le64(0x000FFFF000ULL), | |
263 | cpu_to_le64(0x000FFFFFFCULL), | |
264 | cpu_to_le64(0x3FFFFFF000ULL), | |
265 | }, | |
266 | { | |
267 | cpu_to_le64(0x007FFF8000ULL), | |
268 | cpu_to_le64(0x007FFFFFE0ULL), | |
269 | cpu_to_le64(0xFFFFFF8000ULL), | |
270 | }, | |
271 | { | |
272 | cpu_to_le64(0x01FFFE0000ULL), | |
273 | cpu_to_le64(0x01FFFFFF80ULL), | |
274 | cpu_to_le64(0xFFFFFE0000ULL), | |
275 | }, | |
276 | { | |
277 | cpu_to_le64(0x0FFFF00000ULL), | |
278 | cpu_to_le64(0x0FFFFFFC00ULL), | |
279 | cpu_to_le64(0x0ULL), | |
280 | }, | |
281 | { | |
282 | cpu_to_le64(0x3FFFC00000ULL), | |
283 | cpu_to_le64(0x3FFFFFF000ULL), | |
284 | cpu_to_le64(0x0) | |
285 | }, | |
286 | { | |
287 | cpu_to_le64(0xFFFE000000ULL), | |
288 | cpu_to_le64(0xFFFFFF8000ULL), | |
289 | cpu_to_le64(0x0) | |
290 | }, | |
291 | { | |
292 | cpu_to_le64(0xFFF8000000ULL), | |
293 | cpu_to_le64(0xFFFFFE0000ULL), | |
294 | cpu_to_le64(0x0) | |
295 | }, | |
296 | { | |
d2ccc902 | 297 | cpu_to_le64(0xFFC0000000ULL), |
dac94da8 | 298 | cpu_to_le64(0x0ULL), |
d2ccc902 | 299 | cpu_to_le64(0x0ULL) |
dac94da8 | 300 | }, |
931d4160 EG |
301 | }; |
302 | ||
dac94da8 | 303 | static const __le32 iwl_bt_mprio_lut[BT_COEX_MULTI_PRIO_LUT_SIZE] = { |
2adc8949 EG |
304 | cpu_to_le32(0x28412201), |
305 | cpu_to_le32(0x11118451), | |
e715c3a9 EG |
306 | }; |
307 | ||
b9fae2d5 EG |
308 | struct corunning_block_luts { |
309 | u8 range; | |
310 | __le32 lut20[BT_COEX_CORUN_LUT_SIZE]; | |
311 | }; | |
312 | ||
313 | /* | |
314 | * Ranges for the antenna coupling calibration / co-running block LUT: | |
315 | * LUT0: [ 0, 12[ | |
316 | * LUT1: [12, 20[ | |
317 | * LUT2: [20, 21[ | |
318 | * LUT3: [21, 23[ | |
319 | * LUT4: [23, 27[ | |
320 | * LUT5: [27, 30[ | |
321 | * LUT6: [30, 32[ | |
322 | * LUT7: [32, 33[ | |
323 | * LUT8: [33, - [ | |
324 | */ | |
325 | static const struct corunning_block_luts antenna_coupling_ranges[] = { | |
326 | { | |
327 | .range = 0, | |
328 | .lut20 = { | |
329 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
330 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
331 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
332 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
333 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
334 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
335 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
336 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
337 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
338 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
339 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
340 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
341 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
342 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
343 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
344 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
345 | }, | |
346 | }, | |
347 | { | |
348 | .range = 12, | |
349 | .lut20 = { | |
350 | cpu_to_le32(0x00000001), cpu_to_le32(0x00000000), | |
351 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
352 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
353 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
354 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
355 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
356 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
357 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
358 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
359 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
360 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
361 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
362 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
363 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
364 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
365 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
366 | }, | |
367 | }, | |
368 | { | |
369 | .range = 20, | |
370 | .lut20 = { | |
371 | cpu_to_le32(0x00000002), cpu_to_le32(0x00000000), | |
372 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
373 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
374 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
375 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
376 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
377 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
378 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
379 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
380 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
381 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
382 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
383 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
384 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
385 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
386 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
387 | }, | |
388 | }, | |
389 | { | |
390 | .range = 21, | |
391 | .lut20 = { | |
392 | cpu_to_le32(0x00000003), cpu_to_le32(0x00000000), | |
393 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
394 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
395 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
396 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
397 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
398 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
399 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
400 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
401 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
402 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
403 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
404 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
405 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
406 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
407 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
408 | }, | |
409 | }, | |
410 | { | |
411 | .range = 23, | |
412 | .lut20 = { | |
413 | cpu_to_le32(0x00000004), cpu_to_le32(0x00000000), | |
414 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
415 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
416 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
417 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
418 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
419 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
420 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
421 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
422 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
423 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
424 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
425 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
426 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
427 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
428 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
429 | }, | |
430 | }, | |
431 | { | |
432 | .range = 27, | |
433 | .lut20 = { | |
434 | cpu_to_le32(0x00000005), cpu_to_le32(0x00000000), | |
435 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
436 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
437 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
438 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
439 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
440 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
441 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
442 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
443 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
444 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
445 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
446 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
447 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
448 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
449 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
450 | }, | |
451 | }, | |
452 | { | |
453 | .range = 30, | |
454 | .lut20 = { | |
455 | cpu_to_le32(0x00000006), cpu_to_le32(0x00000000), | |
456 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
457 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
458 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
459 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
460 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
461 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
462 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
463 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
464 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
465 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
466 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
467 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
468 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
469 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
470 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
471 | }, | |
472 | }, | |
473 | { | |
474 | .range = 32, | |
475 | .lut20 = { | |
476 | cpu_to_le32(0x00000007), cpu_to_le32(0x00000000), | |
477 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
478 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
479 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
480 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
481 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
482 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
483 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
484 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
485 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
486 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
487 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
488 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
489 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
490 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
491 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
492 | }, | |
493 | }, | |
494 | { | |
495 | .range = 33, | |
496 | .lut20 = { | |
497 | cpu_to_le32(0x00000008), cpu_to_le32(0x00000000), | |
498 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
499 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
500 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
501 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
502 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
503 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
504 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
505 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
506 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
507 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
508 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
509 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
510 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
511 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
512 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
513 | }, | |
514 | }, | |
515 | }; | |
516 | ||
4515f30f EG |
517 | static enum iwl_bt_coex_lut_type |
518 | iwl_get_coex_type(struct iwl_mvm *mvm, const struct ieee80211_vif *vif) | |
519 | { | |
520 | struct ieee80211_chanctx_conf *chanctx_conf; | |
521 | enum iwl_bt_coex_lut_type ret; | |
522 | u16 phy_ctx_id; | |
523 | ||
9145d151 EG |
524 | /* |
525 | * Checking that we hold mvm->mutex is a good idea, but the rate | |
526 | * control can't acquire the mutex since it runs in Tx path. | |
527 | * So this is racy in that case, but in the worst case, the AMPDU | |
528 | * size limit will be wrong for a short time which is not a big | |
529 | * issue. | |
530 | */ | |
4515f30f EG |
531 | |
532 | rcu_read_lock(); | |
533 | ||
534 | chanctx_conf = rcu_dereference(vif->chanctx_conf); | |
535 | ||
536 | if (!chanctx_conf || | |
537 | chanctx_conf->def.chan->band != IEEE80211_BAND_2GHZ) { | |
538 | rcu_read_unlock(); | |
7fa4fa0c | 539 | return BT_COEX_INVALID_LUT; |
4515f30f EG |
540 | } |
541 | ||
542 | ret = BT_COEX_TX_DIS_LUT; | |
543 | ||
39149911 EG |
544 | if (mvm->cfg->bt_shared_single_ant) { |
545 | rcu_read_unlock(); | |
546 | return ret; | |
547 | } | |
548 | ||
4515f30f EG |
549 | phy_ctx_id = *((u16 *)chanctx_conf->drv_priv); |
550 | ||
551 | if (mvm->last_bt_ci_cmd.primary_ch_phy_id == phy_ctx_id) | |
552 | ret = le32_to_cpu(mvm->last_bt_notif.primary_ch_lut); | |
553 | else if (mvm->last_bt_ci_cmd.secondary_ch_phy_id == phy_ctx_id) | |
554 | ret = le32_to_cpu(mvm->last_bt_notif.secondary_ch_lut); | |
555 | /* else - default = TX TX disallowed */ | |
556 | ||
557 | rcu_read_unlock(); | |
558 | ||
559 | return ret; | |
560 | } | |
561 | ||
931d4160 EG |
562 | int iwl_send_bt_init_conf(struct iwl_mvm *mvm) |
563 | { | |
03e304e4 EG |
564 | struct iwl_bt_coex_cmd *bt_cmd; |
565 | struct iwl_host_cmd cmd = { | |
566 | .id = BT_CONFIG, | |
567 | .len = { sizeof(*bt_cmd), }, | |
568 | .dataflags = { IWL_HCMD_DFL_NOCOPY, }, | |
931d4160 EG |
569 | }; |
570 | int ret; | |
dac94da8 EG |
571 | u32 flags; |
572 | ||
ae397472 EG |
573 | ret = iwl_send_bt_prio_tbl(mvm); |
574 | if (ret) | |
575 | return ret; | |
576 | ||
03e304e4 EG |
577 | bt_cmd = kzalloc(sizeof(*bt_cmd), GFP_KERNEL); |
578 | if (!bt_cmd) | |
579 | return -ENOMEM; | |
580 | cmd.data[0] = bt_cmd; | |
581 | ||
a39979a8 EG |
582 | lockdep_assert_held(&mvm->mutex); |
583 | ||
584 | if (unlikely(mvm->bt_force_ant_mode != BT_FORCE_ANT_DIS)) { | |
585 | switch (mvm->bt_force_ant_mode) { | |
586 | case BT_FORCE_ANT_AUTO: | |
587 | flags = BT_COEX_AUTO; | |
588 | break; | |
589 | case BT_FORCE_ANT_BT: | |
590 | flags = BT_COEX_BT; | |
591 | break; | |
592 | case BT_FORCE_ANT_WIFI: | |
593 | flags = BT_COEX_WIFI; | |
594 | break; | |
595 | default: | |
596 | WARN_ON(1); | |
597 | flags = 0; | |
598 | } | |
599 | ||
600 | bt_cmd->flags = cpu_to_le32(flags); | |
601 | bt_cmd->valid_bit_msk = cpu_to_le32(BT_VALID_ENABLE); | |
602 | goto send_cmd; | |
603 | } | |
604 | ||
03e304e4 | 605 | bt_cmd->max_kill = 5; |
8a0063a0 EG |
606 | bt_cmd->bt4_antenna_isolation_thr = BT_ANTENNA_COUPLING_THRESHOLD; |
607 | bt_cmd->bt4_antenna_isolation = iwlwifi_mod_params.ant_coupling; | |
608 | bt_cmd->bt4_tx_tx_delta_freq_thr = 15; | |
609 | bt_cmd->bt4_tx_rx_max_freq0 = 15; | |
e78973ef EG |
610 | bt_cmd->override_primary_lut = BT_COEX_INVALID_LUT; |
611 | bt_cmd->override_secondary_lut = BT_COEX_INVALID_LUT; | |
03e304e4 | 612 | |
dac94da8 | 613 | flags = iwlwifi_mod_params.bt_coex_active ? |
931d4160 | 614 | BT_COEX_NW : BT_COEX_DISABLE; |
dac94da8 | 615 | bt_cmd->flags = cpu_to_le32(flags); |
931d4160 | 616 | |
dac94da8 | 617 | bt_cmd->valid_bit_msk = cpu_to_le32(BT_VALID_ENABLE | |
03e304e4 EG |
618 | BT_VALID_BT_PRIO_BOOST | |
619 | BT_VALID_MAX_KILL | | |
620 | BT_VALID_3W_TMRS | | |
621 | BT_VALID_KILL_ACK | | |
622 | BT_VALID_KILL_CTS | | |
623 | BT_VALID_REDUCED_TX_POWER | | |
dac94da8 EG |
624 | BT_VALID_LUT | |
625 | BT_VALID_WIFI_RX_SW_PRIO_BOOST | | |
626 | BT_VALID_WIFI_TX_SW_PRIO_BOOST | | |
dac94da8 EG |
627 | BT_VALID_ANT_ISOLATION | |
628 | BT_VALID_ANT_ISOLATION_THRS | | |
629 | BT_VALID_TXTX_DELTA_FREQ_THRS | | |
b9c509cc EG |
630 | BT_VALID_TXRX_MAX_FREQ_0 | |
631 | BT_VALID_SYNC_TO_SCO); | |
dac94da8 | 632 | |
741e703b EG |
633 | if (IWL_MVM_BT_COEX_SYNC2SCO) |
634 | bt_cmd->flags |= cpu_to_le32(BT_COEX_SYNC2SCO); | |
635 | ||
b9fae2d5 | 636 | if (IWL_MVM_BT_COEX_CORUNNING) { |
0fed2bcf EG |
637 | bt_cmd->valid_bit_msk |= cpu_to_le32(BT_VALID_CORUN_LUT_20 | |
638 | BT_VALID_CORUN_LUT_40); | |
b9fae2d5 EG |
639 | bt_cmd->flags |= cpu_to_le32(BT_COEX_CORUNNING); |
640 | } | |
641 | ||
cdb00563 EG |
642 | if (IWL_MVM_BT_COEX_MPLUT) { |
643 | bt_cmd->flags |= cpu_to_le32(BT_COEX_MPLUT); | |
0fed2bcf | 644 | bt_cmd->valid_bit_msk |= cpu_to_le32(BT_VALID_MULTI_PRIO_LUT); |
cdb00563 EG |
645 | } |
646 | ||
d1d5e3cd EG |
647 | if (mvm->cfg->bt_shared_single_ant) |
648 | memcpy(&bt_cmd->decision_lut, iwl_single_shared_ant, | |
649 | sizeof(iwl_single_shared_ant)); | |
650 | else | |
651 | memcpy(&bt_cmd->decision_lut, iwl_combined_lookup, | |
652 | sizeof(iwl_combined_lookup)); | |
653 | ||
b9fae2d5 EG |
654 | /* Take first Co-running block LUT to get started */ |
655 | memcpy(bt_cmd->bt4_corun_lut20, antenna_coupling_ranges[0].lut20, | |
656 | sizeof(bt_cmd->bt4_corun_lut20)); | |
657 | memcpy(bt_cmd->bt4_corun_lut40, antenna_coupling_ranges[0].lut20, | |
658 | sizeof(bt_cmd->bt4_corun_lut40)); | |
659 | ||
dac94da8 EG |
660 | memcpy(&bt_cmd->bt_prio_boost, iwl_bt_prio_boost, |
661 | sizeof(iwl_bt_prio_boost)); | |
662 | memcpy(&bt_cmd->bt4_multiprio_lut, iwl_bt_mprio_lut, | |
663 | sizeof(iwl_bt_mprio_lut)); | |
03e304e4 | 664 | bt_cmd->kill_ack_msk = |
931d4160 | 665 | cpu_to_le32(iwl_bt_ack_kill_msk[BT_KILL_MSK_DEFAULT]); |
03e304e4 | 666 | bt_cmd->kill_cts_msk = |
931d4160 EG |
667 | cpu_to_le32(iwl_bt_cts_kill_msk[BT_KILL_MSK_DEFAULT]); |
668 | ||
a39979a8 | 669 | send_cmd: |
2b76ef13 | 670 | memset(&mvm->last_bt_notif, 0, sizeof(mvm->last_bt_notif)); |
dac94da8 | 671 | memset(&mvm->last_bt_ci_cmd, 0, sizeof(mvm->last_bt_ci_cmd)); |
2b76ef13 | 672 | |
03e304e4 | 673 | ret = iwl_mvm_send_cmd(mvm, &cmd); |
931d4160 | 674 | |
03e304e4 EG |
675 | kfree(bt_cmd); |
676 | return ret; | |
931d4160 | 677 | } |
f421f9c3 | 678 | |
2b76ef13 EG |
679 | static int iwl_mvm_bt_udpate_ctrl_kill_msk(struct iwl_mvm *mvm, |
680 | bool reduced_tx_power) | |
681 | { | |
682 | enum iwl_bt_kill_msk bt_kill_msk; | |
03e304e4 | 683 | struct iwl_bt_coex_cmd *bt_cmd; |
2b76ef13 | 684 | struct iwl_bt_coex_profile_notif *notif = &mvm->last_bt_notif; |
03e304e4 EG |
685 | struct iwl_host_cmd cmd = { |
686 | .id = BT_CONFIG, | |
687 | .data[0] = &bt_cmd, | |
688 | .len = { sizeof(*bt_cmd), }, | |
689 | .dataflags = { IWL_HCMD_DFL_NOCOPY, }, | |
03e304e4 EG |
690 | }; |
691 | int ret = 0; | |
2b76ef13 EG |
692 | |
693 | lockdep_assert_held(&mvm->mutex); | |
694 | ||
695 | if (reduced_tx_power) { | |
696 | /* Reduced Tx power has precedence on the type of the profile */ | |
697 | bt_kill_msk = BT_KILL_MSK_REDUCED_TXPOW; | |
698 | } else { | |
699 | /* Low latency BT profile is active: give higher prio to BT */ | |
700 | if (BT_MBOX_MSG(notif, 3, SCO_STATE) || | |
701 | BT_MBOX_MSG(notif, 3, A2DP_STATE) || | |
702 | BT_MBOX_MSG(notif, 3, SNIFF_STATE)) | |
703 | bt_kill_msk = BT_KILL_MSK_SCO_HID_A2DP; | |
704 | else | |
705 | bt_kill_msk = BT_KILL_MSK_DEFAULT; | |
706 | } | |
707 | ||
708 | IWL_DEBUG_COEX(mvm, | |
709 | "Update kill_msk: %d - SCO %sactive A2DP %sactive SNIFF %sactive\n", | |
710 | bt_kill_msk, | |
711 | BT_MBOX_MSG(notif, 3, SCO_STATE) ? "" : "in", | |
712 | BT_MBOX_MSG(notif, 3, A2DP_STATE) ? "" : "in", | |
713 | BT_MBOX_MSG(notif, 3, SNIFF_STATE) ? "" : "in"); | |
714 | ||
715 | /* Don't send HCMD if there is no update */ | |
716 | if (bt_kill_msk == mvm->bt_kill_msk) | |
717 | return 0; | |
718 | ||
719 | mvm->bt_kill_msk = bt_kill_msk; | |
03e304e4 EG |
720 | |
721 | bt_cmd = kzalloc(sizeof(*bt_cmd), GFP_KERNEL); | |
722 | if (!bt_cmd) | |
723 | return -ENOMEM; | |
724 | cmd.data[0] = bt_cmd; | |
7352cac0 | 725 | bt_cmd->flags = cpu_to_le32(BT_COEX_NW); |
03e304e4 EG |
726 | |
727 | bt_cmd->kill_ack_msk = cpu_to_le32(iwl_bt_ack_kill_msk[bt_kill_msk]); | |
728 | bt_cmd->kill_cts_msk = cpu_to_le32(iwl_bt_cts_kill_msk[bt_kill_msk]); | |
7352cac0 EG |
729 | bt_cmd->valid_bit_msk |= cpu_to_le32(BT_VALID_ENABLE | |
730 | BT_VALID_KILL_ACK | | |
731 | BT_VALID_KILL_CTS); | |
2b76ef13 | 732 | |
dac94da8 EG |
733 | IWL_DEBUG_COEX(mvm, "ACK Kill msk = 0x%08x, CTS Kill msk = 0x%08x\n", |
734 | iwl_bt_ack_kill_msk[bt_kill_msk], | |
735 | iwl_bt_cts_kill_msk[bt_kill_msk]); | |
03e304e4 EG |
736 | |
737 | ret = iwl_mvm_send_cmd(mvm, &cmd); | |
738 | ||
739 | kfree(bt_cmd); | |
740 | return ret; | |
2b76ef13 EG |
741 | } |
742 | ||
1fa477c6 EG |
743 | static int iwl_mvm_bt_coex_reduced_txp(struct iwl_mvm *mvm, u8 sta_id, |
744 | bool enable) | |
2b76ef13 | 745 | { |
03e304e4 EG |
746 | struct iwl_bt_coex_cmd *bt_cmd; |
747 | /* Send ASYNC since this can be sent from an atomic context */ | |
748 | struct iwl_host_cmd cmd = { | |
749 | .id = BT_CONFIG, | |
750 | .len = { sizeof(*bt_cmd), }, | |
b9fae2d5 | 751 | .dataflags = { IWL_HCMD_DFL_NOCOPY, }, |
03e304e4 | 752 | .flags = CMD_ASYNC, |
2b76ef13 | 753 | }; |
2b76ef13 | 754 | struct iwl_mvm_sta *mvmsta; |
03e304e4 | 755 | int ret; |
2b76ef13 | 756 | |
f327b04c EG |
757 | mvmsta = iwl_mvm_sta_from_staid_protected(mvm, sta_id); |
758 | if (!mvmsta) | |
2b76ef13 EG |
759 | return 0; |
760 | ||
2b76ef13 | 761 | /* nothing to do */ |
1fa477c6 | 762 | if (mvmsta->bt_reduced_txpower == enable) |
2b76ef13 EG |
763 | return 0; |
764 | ||
03e304e4 EG |
765 | bt_cmd = kzalloc(sizeof(*bt_cmd), GFP_ATOMIC); |
766 | if (!bt_cmd) | |
767 | return -ENOMEM; | |
768 | cmd.data[0] = bt_cmd; | |
7352cac0 | 769 | bt_cmd->flags = cpu_to_le32(BT_COEX_NW); |
03e304e4 | 770 | |
7352cac0 EG |
771 | bt_cmd->valid_bit_msk = |
772 | cpu_to_le32(BT_VALID_ENABLE | BT_VALID_REDUCED_TX_POWER); | |
03e304e4 EG |
773 | bt_cmd->bt_reduced_tx_power = sta_id; |
774 | ||
2b76ef13 | 775 | if (enable) |
03e304e4 | 776 | bt_cmd->bt_reduced_tx_power |= BT_REDUCED_TX_POWER_BIT; |
2b76ef13 EG |
777 | |
778 | IWL_DEBUG_COEX(mvm, "%sable reduced Tx Power for sta %d\n", | |
779 | enable ? "en" : "dis", sta_id); | |
780 | ||
781 | mvmsta->bt_reduced_txpower = enable; | |
782 | ||
03e304e4 EG |
783 | ret = iwl_mvm_send_cmd(mvm, &cmd); |
784 | ||
785 | kfree(bt_cmd); | |
786 | return ret; | |
2b76ef13 EG |
787 | } |
788 | ||
789 | struct iwl_bt_iterator_data { | |
7da052b8 | 790 | struct iwl_bt_coex_profile_notif *notif; |
2b76ef13 EG |
791 | struct iwl_mvm *mvm; |
792 | u32 num_bss_ifaces; | |
9e511c31 | 793 | bool reduced_tx_power; |
dac94da8 EG |
794 | struct ieee80211_chanctx_conf *primary; |
795 | struct ieee80211_chanctx_conf *secondary; | |
0ee5bcdd | 796 | bool primary_ll; |
7da052b8 EG |
797 | }; |
798 | ||
f6fc5775 EG |
799 | static inline |
800 | void iwl_mvm_bt_coex_enable_rssi_event(struct iwl_mvm *mvm, | |
801 | struct ieee80211_vif *vif, | |
802 | bool enable, int rssi) | |
803 | { | |
804 | struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif); | |
805 | ||
806 | mvmvif->bf_data.last_bt_coex_event = rssi; | |
807 | mvmvif->bf_data.bt_coex_max_thold = | |
8286d9f5 | 808 | enable ? -IWL_MVM_BT_COEX_EN_RED_TXP_THRESH : 0; |
f6fc5775 | 809 | mvmvif->bf_data.bt_coex_min_thold = |
8286d9f5 | 810 | enable ? -IWL_MVM_BT_COEX_DIS_RED_TXP_THRESH : 0; |
f6fc5775 EG |
811 | } |
812 | ||
dac94da8 | 813 | /* must be called under rcu_read_lock */ |
7da052b8 EG |
814 | static void iwl_mvm_bt_notif_iterator(void *_data, u8 *mac, |
815 | struct ieee80211_vif *vif) | |
816 | { | |
817 | struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif); | |
2b76ef13 EG |
818 | struct iwl_bt_iterator_data *data = _data; |
819 | struct iwl_mvm *mvm = data->mvm; | |
7da052b8 EG |
820 | struct ieee80211_chanctx_conf *chanctx_conf; |
821 | enum ieee80211_smps_mode smps_mode; | |
f6415f6b | 822 | u32 bt_activity_grading; |
2b76ef13 | 823 | int ave_rssi; |
7da052b8 | 824 | |
9ee718aa | 825 | lockdep_assert_held(&mvm->mutex); |
7da052b8 | 826 | |
f6415f6b EG |
827 | switch (vif->type) { |
828 | case NL80211_IFTYPE_STATION: | |
4d66449a EG |
829 | /* Count BSSes vifs */ |
830 | data->num_bss_ifaces++; | |
f6415f6b EG |
831 | /* default smps_mode for BSS / P2P client is AUTOMATIC */ |
832 | smps_mode = IEEE80211_SMPS_AUTOMATIC; | |
f6415f6b EG |
833 | break; |
834 | case NL80211_IFTYPE_AP: | |
835 | /* default smps_mode for AP / GO is OFF */ | |
836 | smps_mode = IEEE80211_SMPS_OFF; | |
837 | if (!mvmvif->ap_ibss_active) { | |
838 | iwl_mvm_update_smps(mvm, vif, IWL_MVM_SMPS_REQ_BT_COEX, | |
839 | smps_mode); | |
840 | return; | |
841 | } | |
7da052b8 | 842 | |
f6415f6b EG |
843 | /* the Ack / Cts kill mask must be default if AP / GO */ |
844 | data->reduced_tx_power = false; | |
845 | break; | |
846 | default: | |
847 | return; | |
848 | } | |
7da052b8 | 849 | |
dac94da8 EG |
850 | chanctx_conf = rcu_dereference(vif->chanctx_conf); |
851 | ||
852 | /* If channel context is invalid or not on 2.4GHz .. */ | |
853 | if ((!chanctx_conf || | |
854 | chanctx_conf->def.chan->band != IEEE80211_BAND_2GHZ)) { | |
f6415f6b EG |
855 | /* ... relax constraints and disable rssi events */ |
856 | iwl_mvm_update_smps(mvm, vif, IWL_MVM_SMPS_REQ_BT_COEX, | |
857 | smps_mode); | |
4d66449a | 858 | data->reduced_tx_power = false; |
0f618e6e EG |
859 | if (vif->type == NL80211_IFTYPE_STATION) { |
860 | iwl_mvm_bt_coex_reduced_txp(mvm, mvmvif->ap_sta_id, | |
861 | false); | |
f6415f6b | 862 | iwl_mvm_bt_coex_enable_rssi_event(mvm, vif, false, 0); |
0f618e6e | 863 | } |
41069b46 | 864 | return; |
dac94da8 EG |
865 | } |
866 | ||
f6415f6b EG |
867 | bt_activity_grading = le32_to_cpu(data->notif->bt_activity_grading); |
868 | if (bt_activity_grading >= BT_HIGH_TRAFFIC) | |
869 | smps_mode = IEEE80211_SMPS_STATIC; | |
870 | else if (bt_activity_grading >= BT_LOW_TRAFFIC) | |
871 | smps_mode = vif->type == NL80211_IFTYPE_AP ? | |
872 | IEEE80211_SMPS_OFF : | |
873 | IEEE80211_SMPS_DYNAMIC; | |
4d66449a EG |
874 | |
875 | /* relax SMPS contraints for next association */ | |
876 | if (!vif->bss_conf.assoc) | |
877 | smps_mode = IEEE80211_SMPS_AUTOMATIC; | |
878 | ||
f6415f6b EG |
879 | IWL_DEBUG_COEX(data->mvm, |
880 | "mac %d: bt_status %d bt_activity_grading %d smps_req %d\n", | |
881 | mvmvif->id, data->notif->bt_status, bt_activity_grading, | |
882 | smps_mode); | |
883 | ||
884 | iwl_mvm_update_smps(mvm, vif, IWL_MVM_SMPS_REQ_BT_COEX, smps_mode); | |
885 | ||
0ee5bcdd EG |
886 | /* low latency is always primary */ |
887 | if (iwl_mvm_vif_low_latency(mvmvif)) { | |
888 | data->primary_ll = true; | |
889 | ||
890 | data->secondary = data->primary; | |
891 | data->primary = chanctx_conf; | |
892 | } | |
893 | ||
dac94da8 | 894 | if (vif->type == NL80211_IFTYPE_AP) { |
5023d966 | 895 | if (!mvmvif->ap_ibss_active) |
dac94da8 EG |
896 | return; |
897 | ||
dac94da8 EG |
898 | if (chanctx_conf == data->primary) |
899 | return; | |
900 | ||
0ee5bcdd EG |
901 | if (!data->primary_ll) { |
902 | /* | |
903 | * downgrade the current primary no matter what its | |
904 | * type is. | |
905 | */ | |
906 | data->secondary = data->primary; | |
907 | data->primary = chanctx_conf; | |
908 | } else { | |
909 | /* there is low latency vif - we will be secondary */ | |
910 | data->secondary = chanctx_conf; | |
911 | } | |
9166b1ee EG |
912 | return; |
913 | } | |
914 | ||
0ee5bcdd EG |
915 | /* |
916 | * STA / P2P Client, try to be primary if first vif. If we are in low | |
917 | * latency mode, we are already in primary and just don't do much | |
918 | */ | |
dac94da8 EG |
919 | if (!data->primary || data->primary == chanctx_conf) |
920 | data->primary = chanctx_conf; | |
921 | else if (!data->secondary) | |
922 | /* if secondary is not NULL, it might be a GO */ | |
923 | data->secondary = chanctx_conf; | |
924 | ||
4d66449a EG |
925 | /* |
926 | * don't reduce the Tx power if one of these is true: | |
927 | * we are in LOOSE | |
928 | * single share antenna product | |
929 | * BT is active | |
930 | * we are associated | |
931 | */ | |
39149911 | 932 | if (iwl_get_coex_type(mvm, vif) == BT_COEX_LOOSE_LUT || |
4d66449a EG |
933 | mvm->cfg->bt_shared_single_ant || !vif->bss_conf.assoc || |
934 | !data->notif->bt_status) { | |
39149911 | 935 | data->reduced_tx_power = false; |
0f618e6e | 936 | iwl_mvm_bt_coex_reduced_txp(mvm, mvmvif->ap_sta_id, false); |
f6fc5775 | 937 | iwl_mvm_bt_coex_enable_rssi_event(mvm, vif, false, 0); |
2b76ef13 | 938 | return; |
39149911 | 939 | } |
2b76ef13 | 940 | |
911222b5 AO |
941 | /* try to get the avg rssi from fw */ |
942 | ave_rssi = mvmvif->bf_data.ave_beacon_signal; | |
2b76ef13 EG |
943 | |
944 | /* if the RSSI isn't valid, fake it is very low */ | |
945 | if (!ave_rssi) | |
946 | ave_rssi = -100; | |
8286d9f5 | 947 | if (ave_rssi > -IWL_MVM_BT_COEX_EN_RED_TXP_THRESH) { |
2b76ef13 EG |
948 | if (iwl_mvm_bt_coex_reduced_txp(mvm, mvmvif->ap_sta_id, true)) |
949 | IWL_ERR(mvm, "Couldn't send BT_CONFIG cmd\n"); | |
950 | ||
951 | /* | |
952 | * bt_kill_msk can be BT_KILL_MSK_REDUCED_TXPOW only if all the | |
953 | * BSS / P2P clients have rssi above threshold. | |
954 | * We set the bt_kill_msk to BT_KILL_MSK_REDUCED_TXPOW before | |
955 | * the iteration, if one interface's rssi isn't good enough, | |
956 | * bt_kill_msk will be set to default values. | |
957 | */ | |
8286d9f5 | 958 | } else if (ave_rssi < -IWL_MVM_BT_COEX_DIS_RED_TXP_THRESH) { |
2b76ef13 EG |
959 | if (iwl_mvm_bt_coex_reduced_txp(mvm, mvmvif->ap_sta_id, false)) |
960 | IWL_ERR(mvm, "Couldn't send BT_CONFIG cmd\n"); | |
961 | ||
962 | /* | |
963 | * One interface hasn't rssi above threshold, bt_kill_msk must | |
964 | * be set to default values. | |
965 | */ | |
9e511c31 | 966 | data->reduced_tx_power = false; |
2b76ef13 EG |
967 | } |
968 | ||
969 | /* Begin to monitor the RSSI: it may influence the reduced Tx power */ | |
f6fc5775 | 970 | iwl_mvm_bt_coex_enable_rssi_event(mvm, vif, true, ave_rssi); |
7da052b8 EG |
971 | } |
972 | ||
d37cac98 | 973 | static void iwl_mvm_bt_coex_notif_handle(struct iwl_mvm *mvm) |
f421f9c3 | 974 | { |
2b76ef13 | 975 | struct iwl_bt_iterator_data data = { |
7da052b8 | 976 | .mvm = mvm, |
d37cac98 | 977 | .notif = &mvm->last_bt_notif, |
9e511c31 | 978 | .reduced_tx_power = true, |
7da052b8 | 979 | }; |
dac94da8 EG |
980 | struct iwl_bt_coex_ci_cmd cmd = {}; |
981 | u8 ci_bw_idx; | |
f421f9c3 | 982 | |
a39979a8 EG |
983 | /* Ignore updates if we are in force mode */ |
984 | if (unlikely(mvm->bt_force_ant_mode != BT_FORCE_ANT_DIS)) | |
985 | return; | |
986 | ||
dac94da8 | 987 | rcu_read_lock(); |
7da052b8 EG |
988 | ieee80211_iterate_active_interfaces_atomic( |
989 | mvm->hw, IEEE80211_IFACE_ITER_NORMAL, | |
990 | iwl_mvm_bt_notif_iterator, &data); | |
991 | ||
dac94da8 EG |
992 | if (data.primary) { |
993 | struct ieee80211_chanctx_conf *chan = data.primary; | |
994 | if (WARN_ON(!chan->def.chan)) { | |
995 | rcu_read_unlock(); | |
996 | return; | |
997 | } | |
998 | ||
999 | if (chan->def.width < NL80211_CHAN_WIDTH_40) { | |
1000 | ci_bw_idx = 0; | |
1001 | cmd.co_run_bw_primary = 0; | |
1002 | } else { | |
1003 | cmd.co_run_bw_primary = 1; | |
1004 | if (chan->def.center_freq1 > | |
1005 | chan->def.chan->center_freq) | |
1006 | ci_bw_idx = 2; | |
1007 | else | |
1008 | ci_bw_idx = 1; | |
1009 | } | |
1010 | ||
1011 | cmd.bt_primary_ci = | |
1012 | iwl_ci_mask[chan->def.chan->hw_value][ci_bw_idx]; | |
1013 | cmd.primary_ch_phy_id = *((u16 *)data.primary->drv_priv); | |
1014 | } | |
1015 | ||
1016 | if (data.secondary) { | |
1017 | struct ieee80211_chanctx_conf *chan = data.secondary; | |
1018 | if (WARN_ON(!data.secondary->def.chan)) { | |
1019 | rcu_read_unlock(); | |
1020 | return; | |
1021 | } | |
1022 | ||
1023 | if (chan->def.width < NL80211_CHAN_WIDTH_40) { | |
1024 | ci_bw_idx = 0; | |
1025 | cmd.co_run_bw_secondary = 0; | |
1026 | } else { | |
1027 | cmd.co_run_bw_secondary = 1; | |
1028 | if (chan->def.center_freq1 > | |
1029 | chan->def.chan->center_freq) | |
1030 | ci_bw_idx = 2; | |
1031 | else | |
1032 | ci_bw_idx = 1; | |
1033 | } | |
1034 | ||
1035 | cmd.bt_secondary_ci = | |
1036 | iwl_ci_mask[chan->def.chan->hw_value][ci_bw_idx]; | |
c92f06a1 | 1037 | cmd.secondary_ch_phy_id = *((u16 *)data.secondary->drv_priv); |
dac94da8 EG |
1038 | } |
1039 | ||
1040 | rcu_read_unlock(); | |
1041 | ||
1042 | /* Don't spam the fw with the same command over and over */ | |
1043 | if (memcmp(&cmd, &mvm->last_bt_ci_cmd, sizeof(cmd))) { | |
a1022927 | 1044 | if (iwl_mvm_send_cmd_pdu(mvm, BT_COEX_CI, 0, |
dac94da8 | 1045 | sizeof(cmd), &cmd)) |
3c6acb61 | 1046 | IWL_ERR(mvm, "Failed to send BT_CI cmd\n"); |
dac94da8 EG |
1047 | memcpy(&mvm->last_bt_ci_cmd, &cmd, sizeof(cmd)); |
1048 | } | |
1049 | ||
2b76ef13 EG |
1050 | /* |
1051 | * If there are no BSS / P2P client interfaces, reduced Tx Power is | |
1052 | * irrelevant since it is based on the RSSI coming from the beacon. | |
1053 | * Use BT_KILL_MSK_DEFAULT in that case. | |
1054 | */ | |
9e511c31 | 1055 | data.reduced_tx_power = data.reduced_tx_power && data.num_bss_ifaces; |
2b76ef13 | 1056 | |
9e511c31 | 1057 | if (iwl_mvm_bt_udpate_ctrl_kill_msk(mvm, data.reduced_tx_power)) |
2b76ef13 | 1058 | IWL_ERR(mvm, "Failed to update the ctrl_kill_msk\n"); |
9166b1ee EG |
1059 | } |
1060 | ||
9166b1ee EG |
1061 | int iwl_mvm_rx_bt_coex_notif(struct iwl_mvm *mvm, |
1062 | struct iwl_rx_cmd_buffer *rxb, | |
1063 | struct iwl_device_cmd *dev_cmd) | |
1064 | { | |
1065 | struct iwl_rx_packet *pkt = rxb_addr(rxb); | |
1066 | struct iwl_bt_coex_profile_notif *notif = (void *)pkt->data; | |
1067 | ||
1068 | ||
1069 | IWL_DEBUG_COEX(mvm, "BT Coex Notification received\n"); | |
dac94da8 EG |
1070 | IWL_DEBUG_COEX(mvm, "\tBT status: %s\n", |
1071 | notif->bt_status ? "ON" : "OFF"); | |
9166b1ee | 1072 | IWL_DEBUG_COEX(mvm, "\tBT open conn %d\n", notif->bt_open_conn); |
dac94da8 EG |
1073 | IWL_DEBUG_COEX(mvm, "\tBT ci compliance %d\n", notif->bt_ci_compliance); |
1074 | IWL_DEBUG_COEX(mvm, "\tBT primary_ch_lut %d\n", | |
1075 | le32_to_cpu(notif->primary_ch_lut)); | |
1076 | IWL_DEBUG_COEX(mvm, "\tBT secondary_ch_lut %d\n", | |
1077 | le32_to_cpu(notif->secondary_ch_lut)); | |
1078 | IWL_DEBUG_COEX(mvm, "\tBT activity grading %d\n", | |
1079 | le32_to_cpu(notif->bt_activity_grading)); | |
9166b1ee EG |
1080 | IWL_DEBUG_COEX(mvm, "\tBT agg traffic load %d\n", |
1081 | notif->bt_agg_traffic_load); | |
9166b1ee | 1082 | |
d37cac98 EG |
1083 | /* remember this notification for future use: rssi fluctuations */ |
1084 | memcpy(&mvm->last_bt_notif, notif, sizeof(mvm->last_bt_notif)); | |
1085 | ||
1086 | iwl_mvm_bt_coex_notif_handle(mvm); | |
2b76ef13 EG |
1087 | |
1088 | /* | |
1089 | * This is an async handler for a notification, returning anything other | |
1090 | * than 0 doesn't make sense even if HCMD failed. | |
1091 | */ | |
1092 | return 0; | |
1093 | } | |
1094 | ||
1095 | static void iwl_mvm_bt_rssi_iterator(void *_data, u8 *mac, | |
1096 | struct ieee80211_vif *vif) | |
1097 | { | |
1098 | struct iwl_mvm_vif *mvmvif = (void *)vif->drv_priv; | |
1099 | struct iwl_bt_iterator_data *data = _data; | |
1100 | struct iwl_mvm *mvm = data->mvm; | |
1101 | ||
1102 | struct ieee80211_sta *sta; | |
1103 | struct iwl_mvm_sta *mvmsta; | |
1104 | ||
f6fc5775 EG |
1105 | struct ieee80211_chanctx_conf *chanctx_conf; |
1106 | ||
1107 | rcu_read_lock(); | |
1108 | chanctx_conf = rcu_dereference(vif->chanctx_conf); | |
1109 | /* If channel context is invalid or not on 2.4GHz - don't count it */ | |
1110 | if (!chanctx_conf || | |
1111 | chanctx_conf->def.chan->band != IEEE80211_BAND_2GHZ) { | |
1112 | rcu_read_unlock(); | |
1113 | return; | |
1114 | } | |
1115 | rcu_read_unlock(); | |
1116 | ||
2b76ef13 EG |
1117 | if (vif->type != NL80211_IFTYPE_STATION || |
1118 | mvmvif->ap_sta_id == IWL_MVM_STATION_COUNT) | |
1119 | return; | |
1120 | ||
1121 | sta = rcu_dereference_protected(mvm->fw_id_to_mac_id[mvmvif->ap_sta_id], | |
1122 | lockdep_is_held(&mvm->mutex)); | |
56c07a9c EG |
1123 | |
1124 | /* This can happen if the station has been removed right now */ | |
1125 | if (IS_ERR_OR_NULL(sta)) | |
1126 | return; | |
1127 | ||
5b577a90 | 1128 | mvmsta = iwl_mvm_sta_from_mac80211(sta); |
2b76ef13 | 1129 | |
8e0366f9 EG |
1130 | data->num_bss_ifaces++; |
1131 | ||
2b76ef13 EG |
1132 | /* |
1133 | * This interface doesn't support reduced Tx power (because of low | |
1134 | * RSSI probably), then set bt_kill_msk to default values. | |
1135 | */ | |
1136 | if (!mvmsta->bt_reduced_txpower) | |
9e511c31 | 1137 | data->reduced_tx_power = false; |
2b76ef13 EG |
1138 | /* else - possibly leave it to BT_KILL_MSK_REDUCED_TXPOW */ |
1139 | } | |
1140 | ||
1141 | void iwl_mvm_bt_rssi_event(struct iwl_mvm *mvm, struct ieee80211_vif *vif, | |
1142 | enum ieee80211_rssi_event rssi_event) | |
1143 | { | |
1144 | struct iwl_mvm_vif *mvmvif = (void *)vif->drv_priv; | |
2b76ef13 EG |
1145 | struct iwl_bt_iterator_data data = { |
1146 | .mvm = mvm, | |
9e511c31 | 1147 | .reduced_tx_power = true, |
2b76ef13 EG |
1148 | }; |
1149 | int ret; | |
1150 | ||
3dd1cd2d | 1151 | lockdep_assert_held(&mvm->mutex); |
2b76ef13 | 1152 | |
a39979a8 EG |
1153 | /* Ignore updates if we are in force mode */ |
1154 | if (unlikely(mvm->bt_force_ant_mode != BT_FORCE_ANT_DIS)) | |
1155 | return; | |
1156 | ||
1e929199 EG |
1157 | /* |
1158 | * Rssi update while not associated - can happen since the statistics | |
1159 | * are handled asynchronously | |
1160 | */ | |
1161 | if (mvmvif->ap_sta_id == IWL_MVM_STATION_COUNT) | |
3dd1cd2d | 1162 | return; |
2b76ef13 | 1163 | |
4515f30f | 1164 | /* No BT - reports should be disabled */ |
0af8835e | 1165 | if (!mvm->last_bt_notif.bt_status) |
3dd1cd2d | 1166 | return; |
2b76ef13 EG |
1167 | |
1168 | IWL_DEBUG_COEX(mvm, "RSSI for %pM is now %s\n", vif->bss_conf.bssid, | |
1169 | rssi_event == RSSI_EVENT_HIGH ? "HIGH" : "LOW"); | |
1170 | ||
1171 | /* | |
1172 | * Check if rssi is good enough for reduced Tx power, but not in loose | |
1173 | * scheme. | |
1174 | */ | |
39149911 | 1175 | if (rssi_event == RSSI_EVENT_LOW || mvm->cfg->bt_shared_single_ant || |
4515f30f | 1176 | iwl_get_coex_type(mvm, vif) == BT_COEX_LOOSE_LUT) |
2b76ef13 EG |
1177 | ret = iwl_mvm_bt_coex_reduced_txp(mvm, mvmvif->ap_sta_id, |
1178 | false); | |
f421f9c3 | 1179 | else |
2b76ef13 | 1180 | ret = iwl_mvm_bt_coex_reduced_txp(mvm, mvmvif->ap_sta_id, true); |
f421f9c3 | 1181 | |
2b76ef13 EG |
1182 | if (ret) |
1183 | IWL_ERR(mvm, "couldn't send BT_CONFIG HCMD upon RSSI event\n"); | |
f421f9c3 | 1184 | |
2b76ef13 EG |
1185 | ieee80211_iterate_active_interfaces_atomic( |
1186 | mvm->hw, IEEE80211_IFACE_ITER_NORMAL, | |
1187 | iwl_mvm_bt_rssi_iterator, &data); | |
f421f9c3 | 1188 | |
2b76ef13 EG |
1189 | /* |
1190 | * If there are no BSS / P2P client interfaces, reduced Tx Power is | |
1191 | * irrelevant since it is based on the RSSI coming from the beacon. | |
1192 | * Use BT_KILL_MSK_DEFAULT in that case. | |
1193 | */ | |
9e511c31 | 1194 | data.reduced_tx_power = data.reduced_tx_power && data.num_bss_ifaces; |
f421f9c3 | 1195 | |
9e511c31 | 1196 | if (iwl_mvm_bt_udpate_ctrl_kill_msk(mvm, data.reduced_tx_power)) |
2b76ef13 | 1197 | IWL_ERR(mvm, "Failed to update the ctrl_kill_msk\n"); |
f421f9c3 | 1198 | } |
9166b1ee | 1199 | |
9145d151 EG |
1200 | #define LINK_QUAL_AGG_TIME_LIMIT_DEF (4000) |
1201 | #define LINK_QUAL_AGG_TIME_LIMIT_BT_ACT (1200) | |
1202 | ||
5b7ff615 EG |
1203 | u16 iwl_mvm_coex_agg_time_limit(struct iwl_mvm *mvm, |
1204 | struct ieee80211_sta *sta) | |
9145d151 | 1205 | { |
5b577a90 | 1206 | struct iwl_mvm_sta *mvmsta = iwl_mvm_sta_from_mac80211(sta); |
9145d151 EG |
1207 | enum iwl_bt_coex_lut_type lut_type; |
1208 | ||
1209 | if (le32_to_cpu(mvm->last_bt_notif.bt_activity_grading) < | |
c2119351 | 1210 | BT_HIGH_TRAFFIC) |
9145d151 EG |
1211 | return LINK_QUAL_AGG_TIME_LIMIT_DEF; |
1212 | ||
35fbf5d0 EG |
1213 | if (mvm->last_bt_notif.ttc_enabled) |
1214 | return LINK_QUAL_AGG_TIME_LIMIT_DEF; | |
1215 | ||
9145d151 EG |
1216 | lut_type = iwl_get_coex_type(mvm, mvmsta->vif); |
1217 | ||
7fa4fa0c | 1218 | if (lut_type == BT_COEX_LOOSE_LUT || lut_type == BT_COEX_INVALID_LUT) |
9145d151 EG |
1219 | return LINK_QUAL_AGG_TIME_LIMIT_DEF; |
1220 | ||
1221 | /* tight coex, high bt traffic, reduce AGG time limit */ | |
1222 | return LINK_QUAL_AGG_TIME_LIMIT_BT_ACT; | |
1223 | } | |
1224 | ||
ffa6c707 EG |
1225 | bool iwl_mvm_bt_coex_is_mimo_allowed(struct iwl_mvm *mvm, |
1226 | struct ieee80211_sta *sta) | |
1227 | { | |
5b577a90 | 1228 | struct iwl_mvm_sta *mvmsta = iwl_mvm_sta_from_mac80211(sta); |
7fa4fa0c | 1229 | enum iwl_bt_coex_lut_type lut_type; |
ffa6c707 | 1230 | |
35fbf5d0 EG |
1231 | if (mvm->last_bt_notif.ttc_enabled) |
1232 | return true; | |
1233 | ||
ffa6c707 EG |
1234 | if (le32_to_cpu(mvm->last_bt_notif.bt_activity_grading) < |
1235 | BT_HIGH_TRAFFIC) | |
1236 | return true; | |
1237 | ||
1238 | /* | |
7fa4fa0c EG |
1239 | * In Tight / TxTxDis, BT can't Rx while we Tx, so use both antennas |
1240 | * since BT is already killed. | |
1241 | * In Loose, BT can Rx while we Tx, so forbid MIMO to let BT Rx while | |
1242 | * we Tx. | |
1243 | * When we are in 5GHz, we'll get BT_COEX_INVALID_LUT allowing MIMO. | |
ffa6c707 | 1244 | */ |
7fa4fa0c EG |
1245 | lut_type = iwl_get_coex_type(mvm, mvmsta->vif); |
1246 | return lut_type != BT_COEX_LOOSE_LUT; | |
ffa6c707 EG |
1247 | } |
1248 | ||
34c8b24f EG |
1249 | bool iwl_mvm_bt_coex_is_shared_ant_avail(struct iwl_mvm *mvm) |
1250 | { | |
1251 | return le32_to_cpu(mvm->last_bt_notif.bt_activity_grading) == BT_OFF; | |
1252 | } | |
1253 | ||
2fd647f8 EP |
1254 | bool iwl_mvm_bt_coex_is_tpc_allowed(struct iwl_mvm *mvm, |
1255 | enum ieee80211_band band) | |
1256 | { | |
1257 | u32 bt_activity = le32_to_cpu(mvm->last_bt_notif.bt_activity_grading); | |
1258 | ||
1259 | if (band != IEEE80211_BAND_2GHZ) | |
1260 | return false; | |
1261 | ||
1262 | return bt_activity >= BT_LOW_TRAFFIC; | |
1263 | } | |
1264 | ||
ee7bea58 | 1265 | u8 iwl_mvm_bt_coex_tx_prio(struct iwl_mvm *mvm, struct ieee80211_hdr *hdr, |
b797e3fb | 1266 | struct ieee80211_tx_info *info, u8 ac) |
ee7bea58 EG |
1267 | { |
1268 | __le16 fc = hdr->frame_control; | |
1269 | ||
b797e3fb EG |
1270 | if (info->band != IEEE80211_BAND_2GHZ) |
1271 | return 0; | |
1272 | ||
cdb00563 EG |
1273 | if (unlikely(mvm->bt_tx_prio)) |
1274 | return mvm->bt_tx_prio - 1; | |
1275 | ||
ee7bea58 | 1276 | /* High prio packet (wrt. BT coex) if it is EAPOL, MCAST or MGMT */ |
b797e3fb | 1277 | if (info->control.flags & IEEE80211_TX_CTRL_PORT_CTRL_PROTO || |
ee7bea58 | 1278 | is_multicast_ether_addr(hdr->addr1) || |
b797e3fb EG |
1279 | ieee80211_is_ctl(fc) || ieee80211_is_mgmt(fc) || |
1280 | ieee80211_is_nullfunc(fc) || ieee80211_is_qos_nullfunc(fc)) | |
1281 | return 3; | |
1282 | ||
1283 | switch (ac) { | |
1284 | case IEEE80211_AC_BE: | |
1285 | return 1; | |
1286 | case IEEE80211_AC_VO: | |
1287 | return 3; | |
1288 | case IEEE80211_AC_VI: | |
ee7bea58 | 1289 | return 2; |
b797e3fb EG |
1290 | default: |
1291 | break; | |
1292 | } | |
ee7bea58 EG |
1293 | |
1294 | return 0; | |
1295 | } | |
1296 | ||
8e484f0b | 1297 | void iwl_mvm_bt_coex_vif_change(struct iwl_mvm *mvm) |
9166b1ee | 1298 | { |
d37cac98 | 1299 | iwl_mvm_bt_coex_notif_handle(mvm); |
9166b1ee | 1300 | } |
b9fae2d5 EG |
1301 | |
1302 | int iwl_mvm_rx_ant_coupling_notif(struct iwl_mvm *mvm, | |
1303 | struct iwl_rx_cmd_buffer *rxb, | |
1304 | struct iwl_device_cmd *dev_cmd) | |
1305 | { | |
1306 | struct iwl_rx_packet *pkt = rxb_addr(rxb); | |
1307 | u32 ant_isolation = le32_to_cpup((void *)pkt->data); | |
1308 | u8 __maybe_unused lower_bound, upper_bound; | |
fff47eb0 | 1309 | int ret; |
b9fae2d5 EG |
1310 | u8 lut; |
1311 | ||
1312 | struct iwl_bt_coex_cmd *bt_cmd; | |
1313 | struct iwl_host_cmd cmd = { | |
1314 | .id = BT_CONFIG, | |
1315 | .len = { sizeof(*bt_cmd), }, | |
1316 | .dataflags = { IWL_HCMD_DFL_NOCOPY, }, | |
b9fae2d5 EG |
1317 | }; |
1318 | ||
1319 | if (!IWL_MVM_BT_COEX_CORUNNING) | |
1320 | return 0; | |
1321 | ||
1322 | lockdep_assert_held(&mvm->mutex); | |
1323 | ||
a39979a8 EG |
1324 | /* Ignore updates if we are in force mode */ |
1325 | if (unlikely(mvm->bt_force_ant_mode != BT_FORCE_ANT_DIS)) | |
1326 | return 0; | |
1327 | ||
b9fae2d5 EG |
1328 | if (ant_isolation == mvm->last_ant_isol) |
1329 | return 0; | |
1330 | ||
1331 | for (lut = 0; lut < ARRAY_SIZE(antenna_coupling_ranges) - 1; lut++) | |
1332 | if (ant_isolation < antenna_coupling_ranges[lut + 1].range) | |
1333 | break; | |
1334 | ||
1335 | lower_bound = antenna_coupling_ranges[lut].range; | |
1336 | ||
1337 | if (lut < ARRAY_SIZE(antenna_coupling_ranges) - 1) | |
1338 | upper_bound = antenna_coupling_ranges[lut + 1].range; | |
1339 | else | |
1340 | upper_bound = antenna_coupling_ranges[lut].range; | |
1341 | ||
1342 | IWL_DEBUG_COEX(mvm, "Antenna isolation=%d in range [%d,%d[, lut=%d\n", | |
1343 | ant_isolation, lower_bound, upper_bound, lut); | |
1344 | ||
1345 | mvm->last_ant_isol = ant_isolation; | |
1346 | ||
1347 | if (mvm->last_corun_lut == lut) | |
1348 | return 0; | |
1349 | ||
1350 | mvm->last_corun_lut = lut; | |
1351 | ||
1352 | bt_cmd = kzalloc(sizeof(*bt_cmd), GFP_KERNEL); | |
1353 | if (!bt_cmd) | |
1354 | return 0; | |
1355 | cmd.data[0] = bt_cmd; | |
1356 | ||
1357 | bt_cmd->flags = cpu_to_le32(BT_COEX_NW); | |
1358 | bt_cmd->valid_bit_msk |= cpu_to_le32(BT_VALID_ENABLE | | |
1359 | BT_VALID_CORUN_LUT_20 | | |
1360 | BT_VALID_CORUN_LUT_40); | |
1361 | ||
1362 | /* For the moment, use the same LUT for 20GHz and 40GHz */ | |
1363 | memcpy(bt_cmd->bt4_corun_lut20, antenna_coupling_ranges[lut].lut20, | |
1364 | sizeof(bt_cmd->bt4_corun_lut20)); | |
1365 | ||
1366 | memcpy(bt_cmd->bt4_corun_lut40, antenna_coupling_ranges[lut].lut20, | |
1367 | sizeof(bt_cmd->bt4_corun_lut40)); | |
1368 | ||
fff47eb0 EG |
1369 | ret = iwl_mvm_send_cmd(mvm, &cmd); |
1370 | ||
1371 | kfree(bt_cmd); | |
1372 | return ret; | |
b9fae2d5 | 1373 | } |