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0ea8d043 EG |
1 | /****************************************************************************** |
2 | * | |
3 | * This file is provided under a dual BSD/GPLv2 license. When using or | |
4 | * redistributing this file, you may do so under either license. | |
5 | * | |
6 | * GPL LICENSE SUMMARY | |
7 | * | |
8 | * Copyright(c) 2013 - 2014 Intel Corporation. All rights reserved. | |
8b4139dc | 9 | * Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH |
0ea8d043 EG |
10 | * |
11 | * This program is free software; you can redistribute it and/or modify | |
12 | * it under the terms of version 2 of the GNU General Public License as | |
13 | * published by the Free Software Foundation. | |
14 | * | |
15 | * This program is distributed in the hope that it will be useful, but | |
16 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
18 | * General Public License for more details. | |
19 | * | |
20 | * You should have received a copy of the GNU General Public License | |
21 | * along with this program; if not, write to the Free Software | |
22 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110, | |
23 | * USA | |
24 | * | |
25 | * The full GNU General Public License is included in this distribution | |
26 | * in the file called COPYING. | |
27 | * | |
28 | * Contact Information: | |
29 | * Intel Linux Wireless <ilw@linux.intel.com> | |
30 | * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | |
31 | * | |
32 | * BSD LICENSE | |
33 | * | |
34 | * Copyright(c) 2013 - 2014 Intel Corporation. All rights reserved. | |
8b4139dc | 35 | * Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH |
0ea8d043 EG |
36 | * All rights reserved. |
37 | * | |
38 | * Redistribution and use in source and binary forms, with or without | |
39 | * modification, are permitted provided that the following conditions | |
40 | * are met: | |
41 | * | |
42 | * * Redistributions of source code must retain the above copyright | |
43 | * notice, this list of conditions and the following disclaimer. | |
44 | * * Redistributions in binary form must reproduce the above copyright | |
45 | * notice, this list of conditions and the following disclaimer in | |
46 | * the documentation and/or other materials provided with the | |
47 | * distribution. | |
48 | * * Neither the name Intel Corporation nor the names of its | |
49 | * contributors may be used to endorse or promote products derived | |
50 | * from this software without specific prior written permission. | |
51 | * | |
52 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS | |
53 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT | |
54 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR | |
55 | * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT | |
56 | * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, | |
57 | * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT | |
58 | * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, | |
59 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY | |
60 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | |
61 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE | |
62 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
63 | * | |
64 | *****************************************************************************/ | |
65 | ||
66 | #include <linux/ieee80211.h> | |
67 | #include <linux/etherdevice.h> | |
68 | #include <net/mac80211.h> | |
69 | ||
70 | #include "fw-api-coex.h" | |
71 | #include "iwl-modparams.h" | |
72 | #include "mvm.h" | |
73 | #include "iwl-debug.h" | |
74 | ||
75 | #define EVENT_PRIO_ANT(_evt, _prio, _shrd_ant) \ | |
76 | [(_evt)] = (((_prio) << BT_COEX_PRIO_TBL_PRIO_POS) | \ | |
77 | ((_shrd_ant) << BT_COEX_PRIO_TBL_SHRD_ANT_POS)) | |
78 | ||
79 | static const u8 iwl_bt_prio_tbl[BT_COEX_PRIO_TBL_EVT_MAX] = { | |
80 | EVENT_PRIO_ANT(BT_COEX_PRIO_TBL_EVT_INIT_CALIB1, | |
81 | BT_COEX_PRIO_TBL_PRIO_BYPASS, 0), | |
82 | EVENT_PRIO_ANT(BT_COEX_PRIO_TBL_EVT_INIT_CALIB2, | |
83 | BT_COEX_PRIO_TBL_PRIO_BYPASS, 1), | |
84 | EVENT_PRIO_ANT(BT_COEX_PRIO_TBL_EVT_PERIODIC_CALIB_LOW1, | |
85 | BT_COEX_PRIO_TBL_PRIO_LOW, 0), | |
86 | EVENT_PRIO_ANT(BT_COEX_PRIO_TBL_EVT_PERIODIC_CALIB_LOW2, | |
87 | BT_COEX_PRIO_TBL_PRIO_LOW, 1), | |
88 | EVENT_PRIO_ANT(BT_COEX_PRIO_TBL_EVT_PERIODIC_CALIB_HIGH1, | |
89 | BT_COEX_PRIO_TBL_PRIO_HIGH, 0), | |
90 | EVENT_PRIO_ANT(BT_COEX_PRIO_TBL_EVT_PERIODIC_CALIB_HIGH2, | |
91 | BT_COEX_PRIO_TBL_PRIO_HIGH, 1), | |
92 | EVENT_PRIO_ANT(BT_COEX_PRIO_TBL_EVT_DTIM, | |
93 | BT_COEX_PRIO_TBL_DISABLED, 0), | |
94 | EVENT_PRIO_ANT(BT_COEX_PRIO_TBL_EVT_SCAN52, | |
95 | BT_COEX_PRIO_TBL_PRIO_COEX_OFF, 0), | |
96 | EVENT_PRIO_ANT(BT_COEX_PRIO_TBL_EVT_SCAN24, | |
97 | BT_COEX_PRIO_TBL_PRIO_COEX_ON, 0), | |
98 | EVENT_PRIO_ANT(BT_COEX_PRIO_TBL_EVT_IDLE, | |
99 | BT_COEX_PRIO_TBL_PRIO_COEX_IDLE, 0), | |
100 | 0, 0, 0, 0, 0, 0, | |
101 | }; | |
102 | ||
103 | #undef EVENT_PRIO_ANT | |
104 | ||
0ea8d043 EG |
105 | static int iwl_send_bt_prio_tbl(struct iwl_mvm *mvm) |
106 | { | |
107 | if (unlikely(mvm->bt_force_ant_mode != BT_FORCE_ANT_DIS)) | |
108 | return 0; | |
109 | ||
110 | return iwl_mvm_send_cmd_pdu(mvm, BT_COEX_PRIO_TABLE, 0, | |
111 | sizeof(struct iwl_bt_coex_prio_tbl_cmd), | |
112 | &iwl_bt_prio_tbl); | |
113 | } | |
114 | ||
115 | static const __le32 iwl_bt_prio_boost[BT_COEX_BOOST_SIZE] = { | |
116 | cpu_to_le32(0xf0f0f0f0), /* 50% */ | |
117 | cpu_to_le32(0xc0c0c0c0), /* 25% */ | |
118 | cpu_to_le32(0xfcfcfcfc), /* 75% */ | |
119 | cpu_to_le32(0xfefefefe), /* 87.5% */ | |
120 | }; | |
121 | ||
122 | static const __le32 iwl_single_shared_ant[BT_COEX_MAX_LUT][BT_COEX_LUT_SIZE] = { | |
123 | { | |
124 | cpu_to_le32(0x40000000), | |
125 | cpu_to_le32(0x00000000), | |
126 | cpu_to_le32(0x44000000), | |
127 | cpu_to_le32(0x00000000), | |
128 | cpu_to_le32(0x40000000), | |
129 | cpu_to_le32(0x00000000), | |
130 | cpu_to_le32(0x44000000), | |
131 | cpu_to_le32(0x00000000), | |
132 | cpu_to_le32(0xc0004000), | |
133 | cpu_to_le32(0xf0005000), | |
134 | cpu_to_le32(0xc0004000), | |
135 | cpu_to_le32(0xf0005000), | |
136 | }, | |
137 | { | |
138 | cpu_to_le32(0x40000000), | |
139 | cpu_to_le32(0x00000000), | |
140 | cpu_to_le32(0x44000000), | |
141 | cpu_to_le32(0x00000000), | |
142 | cpu_to_le32(0x40000000), | |
143 | cpu_to_le32(0x00000000), | |
144 | cpu_to_le32(0x44000000), | |
145 | cpu_to_le32(0x00000000), | |
146 | cpu_to_le32(0xc0004000), | |
147 | cpu_to_le32(0xf0005000), | |
148 | cpu_to_le32(0xc0004000), | |
149 | cpu_to_le32(0xf0005000), | |
150 | }, | |
151 | { | |
152 | cpu_to_le32(0x40000000), | |
153 | cpu_to_le32(0x00000000), | |
154 | cpu_to_le32(0x44000000), | |
155 | cpu_to_le32(0x00000000), | |
156 | cpu_to_le32(0x40000000), | |
157 | cpu_to_le32(0x00000000), | |
158 | cpu_to_le32(0x44000000), | |
159 | cpu_to_le32(0x00000000), | |
160 | cpu_to_le32(0xc0004000), | |
161 | cpu_to_le32(0xf0005000), | |
162 | cpu_to_le32(0xc0004000), | |
163 | cpu_to_le32(0xf0005000), | |
164 | }, | |
165 | }; | |
166 | ||
167 | static const __le32 iwl_combined_lookup[BT_COEX_MAX_LUT][BT_COEX_LUT_SIZE] = { | |
168 | { | |
169 | /* Tight */ | |
170 | cpu_to_le32(0xaaaaaaaa), | |
171 | cpu_to_le32(0xaaaaaaaa), | |
172 | cpu_to_le32(0xaeaaaaaa), | |
173 | cpu_to_le32(0xaaaaaaaa), | |
174 | cpu_to_le32(0xcc00ff28), | |
175 | cpu_to_le32(0x0000aaaa), | |
176 | cpu_to_le32(0xcc00aaaa), | |
177 | cpu_to_le32(0x0000aaaa), | |
178 | cpu_to_le32(0xc0004000), | |
179 | cpu_to_le32(0x00004000), | |
180 | cpu_to_le32(0xf0005000), | |
181 | cpu_to_le32(0xf0005000), | |
182 | }, | |
183 | { | |
184 | /* Loose */ | |
185 | cpu_to_le32(0xaaaaaaaa), | |
186 | cpu_to_le32(0xaaaaaaaa), | |
187 | cpu_to_le32(0xaaaaaaaa), | |
188 | cpu_to_le32(0xaaaaaaaa), | |
189 | cpu_to_le32(0xcc00ff28), | |
190 | cpu_to_le32(0x0000aaaa), | |
191 | cpu_to_le32(0xcc00aaaa), | |
192 | cpu_to_le32(0x0000aaaa), | |
193 | cpu_to_le32(0x00000000), | |
194 | cpu_to_le32(0x00000000), | |
195 | cpu_to_le32(0xf0005000), | |
196 | cpu_to_le32(0xf0005000), | |
197 | }, | |
198 | { | |
199 | /* Tx Tx disabled */ | |
200 | cpu_to_le32(0xaaaaaaaa), | |
201 | cpu_to_le32(0xaaaaaaaa), | |
202 | cpu_to_le32(0xeeaaaaaa), | |
203 | cpu_to_le32(0xaaaaaaaa), | |
204 | cpu_to_le32(0xcc00ff28), | |
205 | cpu_to_le32(0x0000aaaa), | |
206 | cpu_to_le32(0xcc00aaaa), | |
207 | cpu_to_le32(0x0000aaaa), | |
208 | cpu_to_le32(0xc0004000), | |
209 | cpu_to_le32(0xc0004000), | |
210 | cpu_to_le32(0xf0005000), | |
211 | cpu_to_le32(0xf0005000), | |
212 | }, | |
213 | }; | |
214 | ||
215 | /* 20MHz / 40MHz below / 40Mhz above*/ | |
216 | static const __le64 iwl_ci_mask[][3] = { | |
217 | /* dummy entry for channel 0 */ | |
218 | {cpu_to_le64(0), cpu_to_le64(0), cpu_to_le64(0)}, | |
219 | { | |
220 | cpu_to_le64(0x0000001FFFULL), | |
221 | cpu_to_le64(0x0ULL), | |
222 | cpu_to_le64(0x00007FFFFFULL), | |
223 | }, | |
224 | { | |
225 | cpu_to_le64(0x000000FFFFULL), | |
226 | cpu_to_le64(0x0ULL), | |
227 | cpu_to_le64(0x0003FFFFFFULL), | |
228 | }, | |
229 | { | |
230 | cpu_to_le64(0x000003FFFCULL), | |
231 | cpu_to_le64(0x0ULL), | |
232 | cpu_to_le64(0x000FFFFFFCULL), | |
233 | }, | |
234 | { | |
235 | cpu_to_le64(0x00001FFFE0ULL), | |
236 | cpu_to_le64(0x0ULL), | |
237 | cpu_to_le64(0x007FFFFFE0ULL), | |
238 | }, | |
239 | { | |
240 | cpu_to_le64(0x00007FFF80ULL), | |
241 | cpu_to_le64(0x00007FFFFFULL), | |
242 | cpu_to_le64(0x01FFFFFF80ULL), | |
243 | }, | |
244 | { | |
245 | cpu_to_le64(0x0003FFFC00ULL), | |
246 | cpu_to_le64(0x0003FFFFFFULL), | |
247 | cpu_to_le64(0x0FFFFFFC00ULL), | |
248 | }, | |
249 | { | |
250 | cpu_to_le64(0x000FFFF000ULL), | |
251 | cpu_to_le64(0x000FFFFFFCULL), | |
252 | cpu_to_le64(0x3FFFFFF000ULL), | |
253 | }, | |
254 | { | |
255 | cpu_to_le64(0x007FFF8000ULL), | |
256 | cpu_to_le64(0x007FFFFFE0ULL), | |
257 | cpu_to_le64(0xFFFFFF8000ULL), | |
258 | }, | |
259 | { | |
260 | cpu_to_le64(0x01FFFE0000ULL), | |
261 | cpu_to_le64(0x01FFFFFF80ULL), | |
262 | cpu_to_le64(0xFFFFFE0000ULL), | |
263 | }, | |
264 | { | |
265 | cpu_to_le64(0x0FFFF00000ULL), | |
266 | cpu_to_le64(0x0FFFFFFC00ULL), | |
267 | cpu_to_le64(0x0ULL), | |
268 | }, | |
269 | { | |
270 | cpu_to_le64(0x3FFFC00000ULL), | |
271 | cpu_to_le64(0x3FFFFFF000ULL), | |
272 | cpu_to_le64(0x0) | |
273 | }, | |
274 | { | |
275 | cpu_to_le64(0xFFFE000000ULL), | |
276 | cpu_to_le64(0xFFFFFF8000ULL), | |
277 | cpu_to_le64(0x0) | |
278 | }, | |
279 | { | |
280 | cpu_to_le64(0xFFF8000000ULL), | |
281 | cpu_to_le64(0xFFFFFE0000ULL), | |
282 | cpu_to_le64(0x0) | |
283 | }, | |
284 | { | |
285 | cpu_to_le64(0xFFC0000000ULL), | |
286 | cpu_to_le64(0x0ULL), | |
287 | cpu_to_le64(0x0ULL) | |
288 | }, | |
289 | }; | |
290 | ||
0ea8d043 EG |
291 | struct corunning_block_luts { |
292 | u8 range; | |
293 | __le32 lut20[BT_COEX_CORUN_LUT_SIZE]; | |
294 | }; | |
295 | ||
296 | /* | |
297 | * Ranges for the antenna coupling calibration / co-running block LUT: | |
298 | * LUT0: [ 0, 12[ | |
299 | * LUT1: [12, 20[ | |
300 | * LUT2: [20, 21[ | |
301 | * LUT3: [21, 23[ | |
302 | * LUT4: [23, 27[ | |
303 | * LUT5: [27, 30[ | |
304 | * LUT6: [30, 32[ | |
305 | * LUT7: [32, 33[ | |
306 | * LUT8: [33, - [ | |
307 | */ | |
308 | static const struct corunning_block_luts antenna_coupling_ranges[] = { | |
309 | { | |
310 | .range = 0, | |
311 | .lut20 = { | |
312 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
313 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
314 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
315 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
316 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
317 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
318 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
319 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
320 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
321 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
322 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
323 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
324 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
325 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
326 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
327 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
328 | }, | |
329 | }, | |
330 | { | |
331 | .range = 12, | |
332 | .lut20 = { | |
e583b50c | 333 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), |
0ea8d043 EG |
334 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), |
335 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
336 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
337 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
338 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
339 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
340 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
341 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
342 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
343 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
344 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
345 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
346 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
347 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
348 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
349 | }, | |
350 | }, | |
351 | { | |
352 | .range = 20, | |
353 | .lut20 = { | |
e583b50c | 354 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), |
0ea8d043 EG |
355 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), |
356 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
357 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
358 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
359 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
360 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
361 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
362 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
363 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
364 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
365 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
366 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
367 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
368 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
369 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
370 | }, | |
371 | }, | |
372 | { | |
373 | .range = 21, | |
374 | .lut20 = { | |
e583b50c | 375 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), |
0ea8d043 EG |
376 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), |
377 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
378 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
379 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
380 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
381 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
382 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
383 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
384 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
385 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
386 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
387 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
388 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
389 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
390 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
391 | }, | |
392 | }, | |
393 | { | |
394 | .range = 23, | |
395 | .lut20 = { | |
e583b50c | 396 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), |
0ea8d043 EG |
397 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), |
398 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
399 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
400 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
401 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
402 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
403 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
404 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
405 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
406 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
407 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
408 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
409 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
410 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
411 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
412 | }, | |
413 | }, | |
414 | { | |
415 | .range = 27, | |
416 | .lut20 = { | |
e583b50c | 417 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), |
0ea8d043 EG |
418 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), |
419 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
420 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
421 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
422 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
423 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
424 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
425 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
426 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
427 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
428 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
429 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
430 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
431 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
432 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
433 | }, | |
434 | }, | |
435 | { | |
436 | .range = 30, | |
437 | .lut20 = { | |
e583b50c | 438 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), |
0ea8d043 EG |
439 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), |
440 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
441 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
442 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
443 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
444 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
445 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
446 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
447 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
448 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
449 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
450 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
451 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
452 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
453 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
454 | }, | |
455 | }, | |
456 | { | |
457 | .range = 32, | |
458 | .lut20 = { | |
e583b50c | 459 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), |
0ea8d043 EG |
460 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), |
461 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
462 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
463 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
464 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
465 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
466 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
467 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
468 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
469 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
470 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
471 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
472 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
473 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
474 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
475 | }, | |
476 | }, | |
477 | { | |
478 | .range = 33, | |
479 | .lut20 = { | |
e583b50c | 480 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), |
0ea8d043 EG |
481 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), |
482 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
483 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
484 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
485 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
486 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
487 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
488 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
489 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
490 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
491 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
492 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
493 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
494 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
495 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
496 | }, | |
497 | }, | |
498 | }; | |
499 | ||
500 | static enum iwl_bt_coex_lut_type | |
501 | iwl_get_coex_type(struct iwl_mvm *mvm, const struct ieee80211_vif *vif) | |
502 | { | |
503 | struct ieee80211_chanctx_conf *chanctx_conf; | |
504 | enum iwl_bt_coex_lut_type ret; | |
505 | u16 phy_ctx_id; | |
506 | ||
507 | /* | |
508 | * Checking that we hold mvm->mutex is a good idea, but the rate | |
509 | * control can't acquire the mutex since it runs in Tx path. | |
510 | * So this is racy in that case, but in the worst case, the AMPDU | |
511 | * size limit will be wrong for a short time which is not a big | |
512 | * issue. | |
513 | */ | |
514 | ||
515 | rcu_read_lock(); | |
516 | ||
517 | chanctx_conf = rcu_dereference(vif->chanctx_conf); | |
518 | ||
519 | if (!chanctx_conf || | |
520 | chanctx_conf->def.chan->band != IEEE80211_BAND_2GHZ) { | |
521 | rcu_read_unlock(); | |
522 | return BT_COEX_INVALID_LUT; | |
523 | } | |
524 | ||
525 | ret = BT_COEX_TX_DIS_LUT; | |
526 | ||
527 | if (mvm->cfg->bt_shared_single_ant) { | |
528 | rcu_read_unlock(); | |
529 | return ret; | |
530 | } | |
531 | ||
532 | phy_ctx_id = *((u16 *)chanctx_conf->drv_priv); | |
533 | ||
534 | if (mvm->last_bt_ci_cmd_old.primary_ch_phy_id == phy_ctx_id) | |
535 | ret = le32_to_cpu(mvm->last_bt_notif_old.primary_ch_lut); | |
536 | else if (mvm->last_bt_ci_cmd_old.secondary_ch_phy_id == phy_ctx_id) | |
537 | ret = le32_to_cpu(mvm->last_bt_notif_old.secondary_ch_lut); | |
538 | /* else - default = TX TX disallowed */ | |
539 | ||
540 | rcu_read_unlock(); | |
541 | ||
542 | return ret; | |
543 | } | |
544 | ||
545 | int iwl_send_bt_init_conf_old(struct iwl_mvm *mvm) | |
546 | { | |
547 | struct iwl_bt_coex_cmd_old *bt_cmd; | |
548 | struct iwl_host_cmd cmd = { | |
549 | .id = BT_CONFIG, | |
550 | .len = { sizeof(*bt_cmd), }, | |
551 | .dataflags = { IWL_HCMD_DFL_NOCOPY, }, | |
552 | }; | |
553 | int ret; | |
554 | u32 flags; | |
555 | ||
556 | ret = iwl_send_bt_prio_tbl(mvm); | |
557 | if (ret) | |
558 | return ret; | |
559 | ||
560 | bt_cmd = kzalloc(sizeof(*bt_cmd), GFP_KERNEL); | |
561 | if (!bt_cmd) | |
562 | return -ENOMEM; | |
563 | cmd.data[0] = bt_cmd; | |
564 | ||
565 | lockdep_assert_held(&mvm->mutex); | |
566 | ||
567 | if (unlikely(mvm->bt_force_ant_mode != BT_FORCE_ANT_DIS)) { | |
568 | switch (mvm->bt_force_ant_mode) { | |
569 | case BT_FORCE_ANT_AUTO: | |
570 | flags = BT_COEX_AUTO_OLD; | |
571 | break; | |
572 | case BT_FORCE_ANT_BT: | |
573 | flags = BT_COEX_BT_OLD; | |
574 | break; | |
575 | case BT_FORCE_ANT_WIFI: | |
576 | flags = BT_COEX_WIFI_OLD; | |
577 | break; | |
578 | default: | |
579 | WARN_ON(1); | |
580 | flags = 0; | |
581 | } | |
582 | ||
583 | bt_cmd->flags = cpu_to_le32(flags); | |
584 | bt_cmd->valid_bit_msk = cpu_to_le32(BT_VALID_ENABLE); | |
585 | goto send_cmd; | |
586 | } | |
587 | ||
588 | bt_cmd->max_kill = 5; | |
f3b2098d EG |
589 | bt_cmd->bt4_antenna_isolation_thr = |
590 | IWL_MVM_BT_COEX_ANTENNA_COUPLING_THRS; | |
0ea8d043 EG |
591 | bt_cmd->bt4_antenna_isolation = iwlwifi_mod_params.ant_coupling; |
592 | bt_cmd->bt4_tx_tx_delta_freq_thr = 15; | |
593 | bt_cmd->bt4_tx_rx_max_freq0 = 15; | |
594 | bt_cmd->override_primary_lut = BT_COEX_INVALID_LUT; | |
595 | bt_cmd->override_secondary_lut = BT_COEX_INVALID_LUT; | |
596 | ||
597 | flags = iwlwifi_mod_params.bt_coex_active ? | |
598 | BT_COEX_NW_OLD : BT_COEX_DISABLE_OLD; | |
599 | bt_cmd->flags = cpu_to_le32(flags); | |
600 | ||
601 | bt_cmd->valid_bit_msk = cpu_to_le32(BT_VALID_ENABLE | | |
602 | BT_VALID_BT_PRIO_BOOST | | |
603 | BT_VALID_MAX_KILL | | |
604 | BT_VALID_3W_TMRS | | |
605 | BT_VALID_KILL_ACK | | |
606 | BT_VALID_KILL_CTS | | |
607 | BT_VALID_REDUCED_TX_POWER | | |
608 | BT_VALID_LUT | | |
609 | BT_VALID_WIFI_RX_SW_PRIO_BOOST | | |
610 | BT_VALID_WIFI_TX_SW_PRIO_BOOST | | |
611 | BT_VALID_ANT_ISOLATION | | |
612 | BT_VALID_ANT_ISOLATION_THRS | | |
613 | BT_VALID_TXTX_DELTA_FREQ_THRS | | |
614 | BT_VALID_TXRX_MAX_FREQ_0 | | |
123f5156 EG |
615 | BT_VALID_SYNC_TO_SCO | |
616 | BT_VALID_TTC | | |
617 | BT_VALID_RRC); | |
0ea8d043 EG |
618 | |
619 | if (IWL_MVM_BT_COEX_SYNC2SCO) | |
620 | bt_cmd->flags |= cpu_to_le32(BT_COEX_SYNC2SCO); | |
621 | ||
622 | if (IWL_MVM_BT_COEX_CORUNNING) { | |
623 | bt_cmd->valid_bit_msk |= cpu_to_le32(BT_VALID_CORUN_LUT_20 | | |
624 | BT_VALID_CORUN_LUT_40); | |
625 | bt_cmd->flags |= cpu_to_le32(BT_COEX_CORUNNING); | |
626 | } | |
627 | ||
628 | if (IWL_MVM_BT_COEX_MPLUT) { | |
629 | bt_cmd->flags |= cpu_to_le32(BT_COEX_MPLUT); | |
630 | bt_cmd->valid_bit_msk |= cpu_to_le32(BT_VALID_MULTI_PRIO_LUT); | |
631 | } | |
632 | ||
123f5156 EG |
633 | if (IWL_MVM_BT_COEX_TTC) |
634 | bt_cmd->flags |= cpu_to_le32(BT_COEX_TTC); | |
635 | ||
636 | if (IWL_MVM_BT_COEX_RRC) | |
637 | bt_cmd->flags |= cpu_to_le32(BT_COEX_RRC); | |
638 | ||
0ea8d043 EG |
639 | if (mvm->cfg->bt_shared_single_ant) |
640 | memcpy(&bt_cmd->decision_lut, iwl_single_shared_ant, | |
641 | sizeof(iwl_single_shared_ant)); | |
642 | else | |
643 | memcpy(&bt_cmd->decision_lut, iwl_combined_lookup, | |
644 | sizeof(iwl_combined_lookup)); | |
645 | ||
646 | /* Take first Co-running block LUT to get started */ | |
647 | memcpy(bt_cmd->bt4_corun_lut20, antenna_coupling_ranges[0].lut20, | |
648 | sizeof(bt_cmd->bt4_corun_lut20)); | |
649 | memcpy(bt_cmd->bt4_corun_lut40, antenna_coupling_ranges[0].lut20, | |
650 | sizeof(bt_cmd->bt4_corun_lut40)); | |
651 | ||
652 | memcpy(&bt_cmd->bt_prio_boost, iwl_bt_prio_boost, | |
653 | sizeof(iwl_bt_prio_boost)); | |
ee00aed1 EG |
654 | bt_cmd->bt4_multiprio_lut[0] = cpu_to_le32(IWL_MVM_BT_COEX_MPLUT_REG0); |
655 | bt_cmd->bt4_multiprio_lut[1] = cpu_to_le32(IWL_MVM_BT_COEX_MPLUT_REG1); | |
0ea8d043 EG |
656 | |
657 | send_cmd: | |
658 | memset(&mvm->last_bt_notif_old, 0, sizeof(mvm->last_bt_notif_old)); | |
659 | memset(&mvm->last_bt_ci_cmd_old, 0, sizeof(mvm->last_bt_ci_cmd_old)); | |
660 | ||
661 | ret = iwl_mvm_send_cmd(mvm, &cmd); | |
662 | ||
663 | kfree(bt_cmd); | |
664 | return ret; | |
665 | } | |
666 | ||
1459f269 | 667 | static int iwl_mvm_bt_udpate_ctrl_kill_msk(struct iwl_mvm *mvm) |
0ea8d043 | 668 | { |
0ea8d043 | 669 | struct iwl_bt_coex_profile_notif_old *notif = &mvm->last_bt_notif_old; |
1459f269 EG |
670 | u32 primary_lut = le32_to_cpu(notif->primary_ch_lut); |
671 | u32 ag = le32_to_cpu(notif->bt_activity_grading); | |
672 | struct iwl_bt_coex_cmd_old *bt_cmd; | |
673 | u8 ack_kill_msk, cts_kill_msk; | |
0ea8d043 EG |
674 | struct iwl_host_cmd cmd = { |
675 | .id = BT_CONFIG, | |
676 | .data[0] = &bt_cmd, | |
677 | .len = { sizeof(*bt_cmd), }, | |
678 | .dataflags = { IWL_HCMD_DFL_NOCOPY, }, | |
679 | }; | |
680 | int ret = 0; | |
681 | ||
682 | lockdep_assert_held(&mvm->mutex); | |
683 | ||
1459f269 EG |
684 | ack_kill_msk = iwl_bt_ack_kill_msk[ag][primary_lut]; |
685 | cts_kill_msk = iwl_bt_cts_kill_msk[ag][primary_lut]; | |
0ea8d043 | 686 | |
1459f269 EG |
687 | if (mvm->bt_ack_kill_msk[0] == ack_kill_msk && |
688 | mvm->bt_cts_kill_msk[0] == cts_kill_msk) | |
0ea8d043 EG |
689 | return 0; |
690 | ||
1459f269 EG |
691 | mvm->bt_ack_kill_msk[0] = ack_kill_msk; |
692 | mvm->bt_cts_kill_msk[0] = cts_kill_msk; | |
0ea8d043 EG |
693 | |
694 | bt_cmd = kzalloc(sizeof(*bt_cmd), GFP_KERNEL); | |
695 | if (!bt_cmd) | |
696 | return -ENOMEM; | |
697 | cmd.data[0] = bt_cmd; | |
698 | bt_cmd->flags = cpu_to_le32(BT_COEX_NW_OLD); | |
699 | ||
1459f269 EG |
700 | bt_cmd->kill_ack_msk = cpu_to_le32(iwl_bt_ctl_kill_msk[ack_kill_msk]); |
701 | bt_cmd->kill_cts_msk = cpu_to_le32(iwl_bt_ctl_kill_msk[cts_kill_msk]); | |
0ea8d043 EG |
702 | bt_cmd->valid_bit_msk |= cpu_to_le32(BT_VALID_ENABLE | |
703 | BT_VALID_KILL_ACK | | |
704 | BT_VALID_KILL_CTS); | |
705 | ||
0ea8d043 EG |
706 | ret = iwl_mvm_send_cmd(mvm, &cmd); |
707 | ||
708 | kfree(bt_cmd); | |
709 | return ret; | |
710 | } | |
711 | ||
712 | static int iwl_mvm_bt_coex_reduced_txp(struct iwl_mvm *mvm, u8 sta_id, | |
713 | bool enable) | |
714 | { | |
715 | struct iwl_bt_coex_cmd_old *bt_cmd; | |
716 | /* Send ASYNC since this can be sent from an atomic context */ | |
717 | struct iwl_host_cmd cmd = { | |
718 | .id = BT_CONFIG, | |
719 | .len = { sizeof(*bt_cmd), }, | |
720 | .dataflags = { IWL_HCMD_DFL_NOCOPY, }, | |
721 | .flags = CMD_ASYNC, | |
722 | }; | |
723 | struct iwl_mvm_sta *mvmsta; | |
724 | int ret; | |
725 | ||
726 | mvmsta = iwl_mvm_sta_from_staid_protected(mvm, sta_id); | |
727 | if (!mvmsta) | |
728 | return 0; | |
729 | ||
730 | /* nothing to do */ | |
731 | if (mvmsta->bt_reduced_txpower == enable) | |
732 | return 0; | |
733 | ||
734 | bt_cmd = kzalloc(sizeof(*bt_cmd), GFP_ATOMIC); | |
735 | if (!bt_cmd) | |
736 | return -ENOMEM; | |
737 | cmd.data[0] = bt_cmd; | |
738 | bt_cmd->flags = cpu_to_le32(BT_COEX_NW_OLD); | |
739 | ||
740 | bt_cmd->valid_bit_msk = | |
741 | cpu_to_le32(BT_VALID_ENABLE | BT_VALID_REDUCED_TX_POWER); | |
742 | bt_cmd->bt_reduced_tx_power = sta_id; | |
743 | ||
744 | if (enable) | |
745 | bt_cmd->bt_reduced_tx_power |= BT_REDUCED_TX_POWER_BIT; | |
746 | ||
747 | IWL_DEBUG_COEX(mvm, "%sable reduced Tx Power for sta %d\n", | |
748 | enable ? "en" : "dis", sta_id); | |
749 | ||
750 | mvmsta->bt_reduced_txpower = enable; | |
751 | ||
752 | ret = iwl_mvm_send_cmd(mvm, &cmd); | |
753 | ||
754 | kfree(bt_cmd); | |
755 | return ret; | |
756 | } | |
757 | ||
758 | struct iwl_bt_iterator_data { | |
759 | struct iwl_bt_coex_profile_notif_old *notif; | |
760 | struct iwl_mvm *mvm; | |
0ea8d043 EG |
761 | struct ieee80211_chanctx_conf *primary; |
762 | struct ieee80211_chanctx_conf *secondary; | |
763 | bool primary_ll; | |
764 | }; | |
765 | ||
766 | static inline | |
767 | void iwl_mvm_bt_coex_enable_rssi_event(struct iwl_mvm *mvm, | |
768 | struct ieee80211_vif *vif, | |
769 | bool enable, int rssi) | |
770 | { | |
771 | struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif); | |
772 | ||
773 | mvmvif->bf_data.last_bt_coex_event = rssi; | |
774 | mvmvif->bf_data.bt_coex_max_thold = | |
775 | enable ? -IWL_MVM_BT_COEX_EN_RED_TXP_THRESH : 0; | |
776 | mvmvif->bf_data.bt_coex_min_thold = | |
777 | enable ? -IWL_MVM_BT_COEX_DIS_RED_TXP_THRESH : 0; | |
778 | } | |
779 | ||
780 | /* must be called under rcu_read_lock */ | |
781 | static void iwl_mvm_bt_notif_iterator(void *_data, u8 *mac, | |
782 | struct ieee80211_vif *vif) | |
783 | { | |
784 | struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif); | |
785 | struct iwl_bt_iterator_data *data = _data; | |
786 | struct iwl_mvm *mvm = data->mvm; | |
787 | struct ieee80211_chanctx_conf *chanctx_conf; | |
788 | enum ieee80211_smps_mode smps_mode; | |
789 | u32 bt_activity_grading; | |
790 | int ave_rssi; | |
791 | ||
792 | lockdep_assert_held(&mvm->mutex); | |
793 | ||
794 | switch (vif->type) { | |
795 | case NL80211_IFTYPE_STATION: | |
0ea8d043 EG |
796 | /* default smps_mode for BSS / P2P client is AUTOMATIC */ |
797 | smps_mode = IEEE80211_SMPS_AUTOMATIC; | |
798 | break; | |
799 | case NL80211_IFTYPE_AP: | |
45bbb2ca | 800 | if (!mvmvif->ap_ibss_active) |
0ea8d043 | 801 | return; |
0ea8d043 EG |
802 | break; |
803 | default: | |
804 | return; | |
805 | } | |
806 | ||
807 | chanctx_conf = rcu_dereference(vif->chanctx_conf); | |
808 | ||
809 | /* If channel context is invalid or not on 2.4GHz .. */ | |
810 | if ((!chanctx_conf || | |
811 | chanctx_conf->def.chan->band != IEEE80211_BAND_2GHZ)) { | |
0ea8d043 | 812 | if (vif->type == NL80211_IFTYPE_STATION) { |
45bbb2ca EG |
813 | /* ... relax constraints and disable rssi events */ |
814 | iwl_mvm_update_smps(mvm, vif, IWL_MVM_SMPS_REQ_BT_COEX, | |
815 | smps_mode); | |
0ea8d043 EG |
816 | iwl_mvm_bt_coex_reduced_txp(mvm, mvmvif->ap_sta_id, |
817 | false); | |
818 | iwl_mvm_bt_coex_enable_rssi_event(mvm, vif, false, 0); | |
819 | } | |
820 | return; | |
821 | } | |
822 | ||
823 | bt_activity_grading = le32_to_cpu(data->notif->bt_activity_grading); | |
824 | if (bt_activity_grading >= BT_HIGH_TRAFFIC) | |
825 | smps_mode = IEEE80211_SMPS_STATIC; | |
826 | else if (bt_activity_grading >= BT_LOW_TRAFFIC) | |
827 | smps_mode = vif->type == NL80211_IFTYPE_AP ? | |
828 | IEEE80211_SMPS_OFF : | |
829 | IEEE80211_SMPS_DYNAMIC; | |
830 | ||
831 | /* relax SMPS contraints for next association */ | |
832 | if (!vif->bss_conf.assoc) | |
833 | smps_mode = IEEE80211_SMPS_AUTOMATIC; | |
834 | ||
4cd4b50c EG |
835 | if (mvmvif->phy_ctxt && |
836 | data->notif->rrc_enabled & BIT(mvmvif->phy_ctxt->id)) | |
123f5156 EG |
837 | smps_mode = IEEE80211_SMPS_AUTOMATIC; |
838 | ||
0ea8d043 EG |
839 | IWL_DEBUG_COEX(data->mvm, |
840 | "mac %d: bt_status %d bt_activity_grading %d smps_req %d\n", | |
841 | mvmvif->id, data->notif->bt_status, bt_activity_grading, | |
842 | smps_mode); | |
843 | ||
45bbb2ca EG |
844 | if (vif->type == NL80211_IFTYPE_STATION) |
845 | iwl_mvm_update_smps(mvm, vif, IWL_MVM_SMPS_REQ_BT_COEX, | |
846 | smps_mode); | |
0ea8d043 EG |
847 | |
848 | /* low latency is always primary */ | |
849 | if (iwl_mvm_vif_low_latency(mvmvif)) { | |
850 | data->primary_ll = true; | |
851 | ||
852 | data->secondary = data->primary; | |
853 | data->primary = chanctx_conf; | |
854 | } | |
855 | ||
856 | if (vif->type == NL80211_IFTYPE_AP) { | |
857 | if (!mvmvif->ap_ibss_active) | |
858 | return; | |
859 | ||
860 | if (chanctx_conf == data->primary) | |
861 | return; | |
862 | ||
863 | if (!data->primary_ll) { | |
864 | /* | |
865 | * downgrade the current primary no matter what its | |
866 | * type is. | |
867 | */ | |
868 | data->secondary = data->primary; | |
869 | data->primary = chanctx_conf; | |
870 | } else { | |
871 | /* there is low latency vif - we will be secondary */ | |
872 | data->secondary = chanctx_conf; | |
873 | } | |
874 | return; | |
875 | } | |
876 | ||
877 | /* | |
878 | * STA / P2P Client, try to be primary if first vif. If we are in low | |
879 | * latency mode, we are already in primary and just don't do much | |
880 | */ | |
881 | if (!data->primary || data->primary == chanctx_conf) | |
882 | data->primary = chanctx_conf; | |
883 | else if (!data->secondary) | |
884 | /* if secondary is not NULL, it might be a GO */ | |
885 | data->secondary = chanctx_conf; | |
886 | ||
887 | /* | |
888 | * don't reduce the Tx power if one of these is true: | |
889 | * we are in LOOSE | |
890 | * single share antenna product | |
891 | * BT is active | |
892 | * we are associated | |
893 | */ | |
894 | if (iwl_get_coex_type(mvm, vif) == BT_COEX_LOOSE_LUT || | |
895 | mvm->cfg->bt_shared_single_ant || !vif->bss_conf.assoc || | |
896 | !data->notif->bt_status) { | |
0ea8d043 EG |
897 | iwl_mvm_bt_coex_reduced_txp(mvm, mvmvif->ap_sta_id, false); |
898 | iwl_mvm_bt_coex_enable_rssi_event(mvm, vif, false, 0); | |
899 | return; | |
900 | } | |
901 | ||
902 | /* try to get the avg rssi from fw */ | |
903 | ave_rssi = mvmvif->bf_data.ave_beacon_signal; | |
904 | ||
905 | /* if the RSSI isn't valid, fake it is very low */ | |
906 | if (!ave_rssi) | |
907 | ave_rssi = -100; | |
908 | if (ave_rssi > -IWL_MVM_BT_COEX_EN_RED_TXP_THRESH) { | |
909 | if (iwl_mvm_bt_coex_reduced_txp(mvm, mvmvif->ap_sta_id, true)) | |
910 | IWL_ERR(mvm, "Couldn't send BT_CONFIG cmd\n"); | |
0ea8d043 EG |
911 | } else if (ave_rssi < -IWL_MVM_BT_COEX_DIS_RED_TXP_THRESH) { |
912 | if (iwl_mvm_bt_coex_reduced_txp(mvm, mvmvif->ap_sta_id, false)) | |
913 | IWL_ERR(mvm, "Couldn't send BT_CONFIG cmd\n"); | |
0ea8d043 EG |
914 | } |
915 | ||
916 | /* Begin to monitor the RSSI: it may influence the reduced Tx power */ | |
917 | iwl_mvm_bt_coex_enable_rssi_event(mvm, vif, true, ave_rssi); | |
918 | } | |
919 | ||
920 | static void iwl_mvm_bt_coex_notif_handle(struct iwl_mvm *mvm) | |
921 | { | |
922 | struct iwl_bt_iterator_data data = { | |
923 | .mvm = mvm, | |
924 | .notif = &mvm->last_bt_notif_old, | |
0ea8d043 EG |
925 | }; |
926 | struct iwl_bt_coex_ci_cmd_old cmd = {}; | |
927 | u8 ci_bw_idx; | |
928 | ||
929 | /* Ignore updates if we are in force mode */ | |
930 | if (unlikely(mvm->bt_force_ant_mode != BT_FORCE_ANT_DIS)) | |
931 | return; | |
932 | ||
933 | rcu_read_lock(); | |
934 | ieee80211_iterate_active_interfaces_atomic( | |
935 | mvm->hw, IEEE80211_IFACE_ITER_NORMAL, | |
936 | iwl_mvm_bt_notif_iterator, &data); | |
937 | ||
938 | if (data.primary) { | |
939 | struct ieee80211_chanctx_conf *chan = data.primary; | |
940 | ||
941 | if (WARN_ON(!chan->def.chan)) { | |
942 | rcu_read_unlock(); | |
943 | return; | |
944 | } | |
945 | ||
946 | if (chan->def.width < NL80211_CHAN_WIDTH_40) { | |
947 | ci_bw_idx = 0; | |
948 | cmd.co_run_bw_primary = 0; | |
949 | } else { | |
950 | cmd.co_run_bw_primary = 1; | |
951 | if (chan->def.center_freq1 > | |
952 | chan->def.chan->center_freq) | |
953 | ci_bw_idx = 2; | |
954 | else | |
955 | ci_bw_idx = 1; | |
956 | } | |
957 | ||
958 | cmd.bt_primary_ci = | |
959 | iwl_ci_mask[chan->def.chan->hw_value][ci_bw_idx]; | |
960 | cmd.primary_ch_phy_id = *((u16 *)data.primary->drv_priv); | |
961 | } | |
962 | ||
963 | if (data.secondary) { | |
964 | struct ieee80211_chanctx_conf *chan = data.secondary; | |
965 | ||
966 | if (WARN_ON(!data.secondary->def.chan)) { | |
967 | rcu_read_unlock(); | |
968 | return; | |
969 | } | |
970 | ||
971 | if (chan->def.width < NL80211_CHAN_WIDTH_40) { | |
972 | ci_bw_idx = 0; | |
973 | cmd.co_run_bw_secondary = 0; | |
974 | } else { | |
975 | cmd.co_run_bw_secondary = 1; | |
976 | if (chan->def.center_freq1 > | |
977 | chan->def.chan->center_freq) | |
978 | ci_bw_idx = 2; | |
979 | else | |
980 | ci_bw_idx = 1; | |
981 | } | |
982 | ||
983 | cmd.bt_secondary_ci = | |
984 | iwl_ci_mask[chan->def.chan->hw_value][ci_bw_idx]; | |
985 | cmd.secondary_ch_phy_id = *((u16 *)data.secondary->drv_priv); | |
986 | } | |
987 | ||
988 | rcu_read_unlock(); | |
989 | ||
990 | /* Don't spam the fw with the same command over and over */ | |
991 | if (memcmp(&cmd, &mvm->last_bt_ci_cmd_old, sizeof(cmd))) { | |
992 | if (iwl_mvm_send_cmd_pdu(mvm, BT_COEX_CI, 0, | |
993 | sizeof(cmd), &cmd)) | |
994 | IWL_ERR(mvm, "Failed to send BT_CI cmd\n"); | |
995 | memcpy(&mvm->last_bt_ci_cmd_old, &cmd, sizeof(cmd)); | |
996 | } | |
997 | ||
1459f269 | 998 | if (iwl_mvm_bt_udpate_ctrl_kill_msk(mvm)) |
0ea8d043 EG |
999 | IWL_ERR(mvm, "Failed to update the ctrl_kill_msk\n"); |
1000 | } | |
1001 | ||
1002 | int iwl_mvm_rx_bt_coex_notif_old(struct iwl_mvm *mvm, | |
1003 | struct iwl_rx_cmd_buffer *rxb, | |
1004 | struct iwl_device_cmd *dev_cmd) | |
1005 | { | |
1006 | struct iwl_rx_packet *pkt = rxb_addr(rxb); | |
1007 | struct iwl_bt_coex_profile_notif_old *notif = (void *)pkt->data; | |
1008 | ||
1009 | IWL_DEBUG_COEX(mvm, "BT Coex Notification received\n"); | |
1010 | IWL_DEBUG_COEX(mvm, "\tBT status: %s\n", | |
1011 | notif->bt_status ? "ON" : "OFF"); | |
1012 | IWL_DEBUG_COEX(mvm, "\tBT open conn %d\n", notif->bt_open_conn); | |
1013 | IWL_DEBUG_COEX(mvm, "\tBT ci compliance %d\n", notif->bt_ci_compliance); | |
1014 | IWL_DEBUG_COEX(mvm, "\tBT primary_ch_lut %d\n", | |
1015 | le32_to_cpu(notif->primary_ch_lut)); | |
1016 | IWL_DEBUG_COEX(mvm, "\tBT secondary_ch_lut %d\n", | |
1017 | le32_to_cpu(notif->secondary_ch_lut)); | |
1018 | IWL_DEBUG_COEX(mvm, "\tBT activity grading %d\n", | |
1019 | le32_to_cpu(notif->bt_activity_grading)); | |
1020 | IWL_DEBUG_COEX(mvm, "\tBT agg traffic load %d\n", | |
1021 | notif->bt_agg_traffic_load); | |
1022 | ||
1023 | /* remember this notification for future use: rssi fluctuations */ | |
1024 | memcpy(&mvm->last_bt_notif_old, notif, sizeof(mvm->last_bt_notif_old)); | |
1025 | ||
1026 | iwl_mvm_bt_coex_notif_handle(mvm); | |
1027 | ||
1028 | /* | |
1029 | * This is an async handler for a notification, returning anything other | |
1030 | * than 0 doesn't make sense even if HCMD failed. | |
1031 | */ | |
1032 | return 0; | |
1033 | } | |
1034 | ||
1035 | static void iwl_mvm_bt_rssi_iterator(void *_data, u8 *mac, | |
1036 | struct ieee80211_vif *vif) | |
1037 | { | |
5b530e95 | 1038 | struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif); |
0ea8d043 EG |
1039 | struct iwl_bt_iterator_data *data = _data; |
1040 | struct iwl_mvm *mvm = data->mvm; | |
1041 | ||
1042 | struct ieee80211_sta *sta; | |
1043 | struct iwl_mvm_sta *mvmsta; | |
1044 | ||
1045 | struct ieee80211_chanctx_conf *chanctx_conf; | |
1046 | ||
1047 | rcu_read_lock(); | |
1048 | chanctx_conf = rcu_dereference(vif->chanctx_conf); | |
1049 | /* If channel context is invalid or not on 2.4GHz - don't count it */ | |
1050 | if (!chanctx_conf || | |
1051 | chanctx_conf->def.chan->band != IEEE80211_BAND_2GHZ) { | |
1052 | rcu_read_unlock(); | |
1053 | return; | |
1054 | } | |
1055 | rcu_read_unlock(); | |
1056 | ||
1057 | if (vif->type != NL80211_IFTYPE_STATION || | |
1058 | mvmvif->ap_sta_id == IWL_MVM_STATION_COUNT) | |
1059 | return; | |
1060 | ||
1061 | sta = rcu_dereference_protected(mvm->fw_id_to_mac_id[mvmvif->ap_sta_id], | |
1062 | lockdep_is_held(&mvm->mutex)); | |
1063 | ||
1064 | /* This can happen if the station has been removed right now */ | |
1065 | if (IS_ERR_OR_NULL(sta)) | |
1066 | return; | |
1067 | ||
1068 | mvmsta = iwl_mvm_sta_from_mac80211(sta); | |
0ea8d043 EG |
1069 | } |
1070 | ||
1071 | void iwl_mvm_bt_rssi_event_old(struct iwl_mvm *mvm, struct ieee80211_vif *vif, | |
1072 | enum ieee80211_rssi_event rssi_event) | |
1073 | { | |
5b530e95 | 1074 | struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif); |
0ea8d043 EG |
1075 | struct iwl_bt_iterator_data data = { |
1076 | .mvm = mvm, | |
0ea8d043 EG |
1077 | }; |
1078 | int ret; | |
1079 | ||
1080 | lockdep_assert_held(&mvm->mutex); | |
1081 | ||
1082 | /* Ignore updates if we are in force mode */ | |
1083 | if (unlikely(mvm->bt_force_ant_mode != BT_FORCE_ANT_DIS)) | |
1084 | return; | |
1085 | ||
1086 | /* | |
1087 | * Rssi update while not associated - can happen since the statistics | |
1088 | * are handled asynchronously | |
1089 | */ | |
1090 | if (mvmvif->ap_sta_id == IWL_MVM_STATION_COUNT) | |
1091 | return; | |
1092 | ||
1093 | /* No BT - reports should be disabled */ | |
1094 | if (!mvm->last_bt_notif_old.bt_status) | |
1095 | return; | |
1096 | ||
1097 | IWL_DEBUG_COEX(mvm, "RSSI for %pM is now %s\n", vif->bss_conf.bssid, | |
1098 | rssi_event == RSSI_EVENT_HIGH ? "HIGH" : "LOW"); | |
1099 | ||
1100 | /* | |
1101 | * Check if rssi is good enough for reduced Tx power, but not in loose | |
1102 | * scheme. | |
1103 | */ | |
1104 | if (rssi_event == RSSI_EVENT_LOW || mvm->cfg->bt_shared_single_ant || | |
1105 | iwl_get_coex_type(mvm, vif) == BT_COEX_LOOSE_LUT) | |
1106 | ret = iwl_mvm_bt_coex_reduced_txp(mvm, mvmvif->ap_sta_id, | |
1107 | false); | |
1108 | else | |
1109 | ret = iwl_mvm_bt_coex_reduced_txp(mvm, mvmvif->ap_sta_id, true); | |
1110 | ||
1111 | if (ret) | |
1112 | IWL_ERR(mvm, "couldn't send BT_CONFIG HCMD upon RSSI event\n"); | |
1113 | ||
1114 | ieee80211_iterate_active_interfaces_atomic( | |
1115 | mvm->hw, IEEE80211_IFACE_ITER_NORMAL, | |
1116 | iwl_mvm_bt_rssi_iterator, &data); | |
1117 | ||
1459f269 | 1118 | if (iwl_mvm_bt_udpate_ctrl_kill_msk(mvm)) |
0ea8d043 EG |
1119 | IWL_ERR(mvm, "Failed to update the ctrl_kill_msk\n"); |
1120 | } | |
1121 | ||
1122 | #define LINK_QUAL_AGG_TIME_LIMIT_DEF (4000) | |
1123 | #define LINK_QUAL_AGG_TIME_LIMIT_BT_ACT (1200) | |
1124 | ||
1125 | u16 iwl_mvm_coex_agg_time_limit_old(struct iwl_mvm *mvm, | |
1126 | struct ieee80211_sta *sta) | |
1127 | { | |
1128 | struct iwl_mvm_sta *mvmsta = iwl_mvm_sta_from_mac80211(sta); | |
1129 | enum iwl_bt_coex_lut_type lut_type; | |
1130 | ||
1131 | if (le32_to_cpu(mvm->last_bt_notif_old.bt_activity_grading) < | |
1132 | BT_HIGH_TRAFFIC) | |
1133 | return LINK_QUAL_AGG_TIME_LIMIT_DEF; | |
1134 | ||
1135 | if (mvm->last_bt_notif_old.ttc_enabled) | |
1136 | return LINK_QUAL_AGG_TIME_LIMIT_DEF; | |
1137 | ||
1138 | lut_type = iwl_get_coex_type(mvm, mvmsta->vif); | |
1139 | ||
1140 | if (lut_type == BT_COEX_LOOSE_LUT || lut_type == BT_COEX_INVALID_LUT) | |
1141 | return LINK_QUAL_AGG_TIME_LIMIT_DEF; | |
1142 | ||
1143 | /* tight coex, high bt traffic, reduce AGG time limit */ | |
1144 | return LINK_QUAL_AGG_TIME_LIMIT_BT_ACT; | |
1145 | } | |
1146 | ||
1147 | bool iwl_mvm_bt_coex_is_mimo_allowed_old(struct iwl_mvm *mvm, | |
1148 | struct ieee80211_sta *sta) | |
1149 | { | |
1150 | struct iwl_mvm_sta *mvmsta = iwl_mvm_sta_from_mac80211(sta); | |
1151 | enum iwl_bt_coex_lut_type lut_type; | |
1152 | ||
1153 | if (mvm->last_bt_notif_old.ttc_enabled) | |
1154 | return true; | |
1155 | ||
1156 | if (le32_to_cpu(mvm->last_bt_notif_old.bt_activity_grading) < | |
1157 | BT_HIGH_TRAFFIC) | |
1158 | return true; | |
1159 | ||
1160 | /* | |
1161 | * In Tight / TxTxDis, BT can't Rx while we Tx, so use both antennas | |
1162 | * since BT is already killed. | |
1163 | * In Loose, BT can Rx while we Tx, so forbid MIMO to let BT Rx while | |
1164 | * we Tx. | |
1165 | * When we are in 5GHz, we'll get BT_COEX_INVALID_LUT allowing MIMO. | |
1166 | */ | |
1167 | lut_type = iwl_get_coex_type(mvm, mvmsta->vif); | |
1168 | return lut_type != BT_COEX_LOOSE_LUT; | |
1169 | } | |
1170 | ||
219fb66b EG |
1171 | bool iwl_mvm_bt_coex_is_ant_avail_old(struct iwl_mvm *mvm, u8 ant) |
1172 | { | |
1173 | u32 ag = le32_to_cpu(mvm->last_bt_notif_old.bt_activity_grading); | |
1174 | return ag < BT_HIGH_TRAFFIC; | |
1175 | } | |
1176 | ||
0ea8d043 EG |
1177 | bool iwl_mvm_bt_coex_is_shared_ant_avail_old(struct iwl_mvm *mvm) |
1178 | { | |
1179 | u32 ag = le32_to_cpu(mvm->last_bt_notif_old.bt_activity_grading); | |
1180 | return ag == BT_OFF; | |
1181 | } | |
1182 | ||
1183 | bool iwl_mvm_bt_coex_is_tpc_allowed_old(struct iwl_mvm *mvm, | |
1184 | enum ieee80211_band band) | |
1185 | { | |
1186 | u32 bt_activity = | |
1187 | le32_to_cpu(mvm->last_bt_notif_old.bt_activity_grading); | |
1188 | ||
1189 | if (band != IEEE80211_BAND_2GHZ) | |
1190 | return false; | |
1191 | ||
1192 | return bt_activity >= BT_LOW_TRAFFIC; | |
1193 | } | |
1194 | ||
1195 | void iwl_mvm_bt_coex_vif_change_old(struct iwl_mvm *mvm) | |
1196 | { | |
1197 | iwl_mvm_bt_coex_notif_handle(mvm); | |
1198 | } | |
1199 | ||
1200 | int iwl_mvm_rx_ant_coupling_notif_old(struct iwl_mvm *mvm, | |
1201 | struct iwl_rx_cmd_buffer *rxb, | |
1202 | struct iwl_device_cmd *dev_cmd) | |
1203 | { | |
1204 | struct iwl_rx_packet *pkt = rxb_addr(rxb); | |
1205 | u32 ant_isolation = le32_to_cpup((void *)pkt->data); | |
1206 | u8 __maybe_unused lower_bound, upper_bound; | |
1207 | int ret; | |
1208 | u8 lut; | |
1209 | ||
1210 | struct iwl_bt_coex_cmd_old *bt_cmd; | |
1211 | struct iwl_host_cmd cmd = { | |
1212 | .id = BT_CONFIG, | |
1213 | .len = { sizeof(*bt_cmd), }, | |
1214 | .dataflags = { IWL_HCMD_DFL_NOCOPY, }, | |
1215 | }; | |
1216 | ||
1217 | if (!IWL_MVM_BT_COEX_CORUNNING) | |
1218 | return 0; | |
1219 | ||
1220 | lockdep_assert_held(&mvm->mutex); | |
1221 | ||
1222 | /* Ignore updates if we are in force mode */ | |
1223 | if (unlikely(mvm->bt_force_ant_mode != BT_FORCE_ANT_DIS)) | |
1224 | return 0; | |
1225 | ||
1226 | if (ant_isolation == mvm->last_ant_isol) | |
1227 | return 0; | |
1228 | ||
1229 | for (lut = 0; lut < ARRAY_SIZE(antenna_coupling_ranges) - 1; lut++) | |
1230 | if (ant_isolation < antenna_coupling_ranges[lut + 1].range) | |
1231 | break; | |
1232 | ||
1233 | lower_bound = antenna_coupling_ranges[lut].range; | |
1234 | ||
1235 | if (lut < ARRAY_SIZE(antenna_coupling_ranges) - 1) | |
1236 | upper_bound = antenna_coupling_ranges[lut + 1].range; | |
1237 | else | |
1238 | upper_bound = antenna_coupling_ranges[lut].range; | |
1239 | ||
1240 | IWL_DEBUG_COEX(mvm, "Antenna isolation=%d in range [%d,%d[, lut=%d\n", | |
1241 | ant_isolation, lower_bound, upper_bound, lut); | |
1242 | ||
1243 | mvm->last_ant_isol = ant_isolation; | |
1244 | ||
1245 | if (mvm->last_corun_lut == lut) | |
1246 | return 0; | |
1247 | ||
1248 | mvm->last_corun_lut = lut; | |
1249 | ||
1250 | bt_cmd = kzalloc(sizeof(*bt_cmd), GFP_KERNEL); | |
1251 | if (!bt_cmd) | |
1252 | return 0; | |
1253 | cmd.data[0] = bt_cmd; | |
1254 | ||
1255 | bt_cmd->flags = cpu_to_le32(BT_COEX_NW_OLD); | |
1256 | bt_cmd->valid_bit_msk |= cpu_to_le32(BT_VALID_ENABLE | | |
1257 | BT_VALID_CORUN_LUT_20 | | |
1258 | BT_VALID_CORUN_LUT_40); | |
1259 | ||
1260 | /* For the moment, use the same LUT for 20GHz and 40GHz */ | |
1261 | memcpy(bt_cmd->bt4_corun_lut20, antenna_coupling_ranges[lut].lut20, | |
1262 | sizeof(bt_cmd->bt4_corun_lut20)); | |
1263 | ||
1264 | memcpy(bt_cmd->bt4_corun_lut40, antenna_coupling_ranges[lut].lut20, | |
1265 | sizeof(bt_cmd->bt4_corun_lut40)); | |
1266 | ||
1267 | ret = iwl_mvm_send_cmd(mvm, &cmd); | |
1268 | ||
1269 | kfree(bt_cmd); | |
1270 | return ret; | |
1271 | } |