iwlwifi: mvm: use iwl_mvm_mac_get_queues_mask() more
[deliverable/linux.git] / drivers / net / wireless / iwlwifi / mvm / fw-api.h
CommitLineData
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1/******************************************************************************
2 *
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
5 *
6 * GPL LICENSE SUMMARY
7 *
51368bf7 8 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
8b4139dc 9 * Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH
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10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of version 2 of the GNU General Public License as
13 * published by the Free Software Foundation.
14 *
15 * This program is distributed in the hope that it will be useful, but
16 * WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 * General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
23 * USA
24 *
25 * The full GNU General Public License is included in this distribution
410dc5aa 26 * in the file called COPYING.
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27 *
28 * Contact Information:
29 * Intel Linux Wireless <ilw@linux.intel.com>
30 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
31 *
32 * BSD LICENSE
33 *
51368bf7 34 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
8b4139dc 35 * Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH
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36 * All rights reserved.
37 *
38 * Redistribution and use in source and binary forms, with or without
39 * modification, are permitted provided that the following conditions
40 * are met:
41 *
42 * * Redistributions of source code must retain the above copyright
43 * notice, this list of conditions and the following disclaimer.
44 * * Redistributions in binary form must reproduce the above copyright
45 * notice, this list of conditions and the following disclaimer in
46 * the documentation and/or other materials provided with the
47 * distribution.
48 * * Neither the name Intel Corporation nor the names of its
49 * contributors may be used to endorse or promote products derived
50 * from this software without specific prior written permission.
51 *
52 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
53 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
54 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
55 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
56 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
57 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
58 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
59 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
60 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
61 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
62 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
63 *
64 *****************************************************************************/
65
66#ifndef __fw_api_h__
67#define __fw_api_h__
68
69#include "fw-api-rs.h"
70#include "fw-api-tx.h"
71#include "fw-api-sta.h"
72#include "fw-api-mac.h"
73#include "fw-api-power.h"
74#include "fw-api-d3.h"
5b7ff615 75#include "fw-api-coex.h"
e820c2da 76#include "fw-api-scan.h"
8ca151b5 77
19e737c9 78/* Tx queue numbers */
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79enum {
80 IWL_MVM_OFFCHANNEL_QUEUE = 8,
81 IWL_MVM_CMD_QUEUE = 9,
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82};
83
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84enum iwl_mvm_tx_fifo {
85 IWL_MVM_TX_FIFO_BK = 0,
86 IWL_MVM_TX_FIFO_BE,
87 IWL_MVM_TX_FIFO_VI,
88 IWL_MVM_TX_FIFO_VO,
89 IWL_MVM_TX_FIFO_MCAST = 5,
90 IWL_MVM_TX_FIFO_CMD = 7,
91};
19e737c9 92
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93#define IWL_MVM_STATION_COUNT 16
94
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95#define IWL_MVM_TDLS_STA_COUNT 4
96
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97/* commands */
98enum {
99 MVM_ALIVE = 0x1,
100 REPLY_ERROR = 0x2,
101
102 INIT_COMPLETE_NOTIF = 0x4,
103
104 /* PHY context commands */
105 PHY_CONTEXT_CMD = 0x8,
106 DBG_CFG = 0x9,
b9fae2d5 107 ANTENNA_COUPLING_NOTIFICATION = 0xa,
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108
109 /* station table */
5a258aae 110 ADD_STA_KEY = 0x17,
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111 ADD_STA = 0x18,
112 REMOVE_STA = 0x19,
113
114 /* TX */
115 TX_CMD = 0x1c,
116 TXPATH_FLUSH = 0x1e,
117 MGMT_MCAST_KEY = 0x1f,
118
119 /* global key */
120 WEP_KEY = 0x20,
121
122 /* MAC and Binding commands */
123 MAC_CONTEXT_CMD = 0x28,
124 TIME_EVENT_CMD = 0x29, /* both CMD and response */
125 TIME_EVENT_NOTIFICATION = 0x2a,
126 BINDING_CONTEXT_CMD = 0x2b,
127 TIME_QUOTA_CMD = 0x2c,
4ac6cb59 128 NON_QOS_TX_COUNTER_CMD = 0x2d,
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129
130 LQ_CMD = 0x4e,
131
132 /* Calibration */
133 TEMPERATURE_NOTIFICATION = 0x62,
134 CALIBRATION_CFG_CMD = 0x65,
135 CALIBRATION_RES_NOTIFICATION = 0x66,
136 CALIBRATION_COMPLETE_NOTIFICATION = 0x67,
137 RADIO_VERSION_NOTIFICATION = 0x68,
138
139 /* Scan offload */
140 SCAN_OFFLOAD_REQUEST_CMD = 0x51,
141 SCAN_OFFLOAD_ABORT_CMD = 0x52,
720befbf 142 HOT_SPOT_CMD = 0x53,
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143 SCAN_OFFLOAD_COMPLETE = 0x6D,
144 SCAN_OFFLOAD_UPDATE_PROFILES_CMD = 0x6E,
145 SCAN_OFFLOAD_CONFIG_CMD = 0x6f,
35a000b7 146 MATCH_FOUND_NOTIFICATION = 0xd9,
fb98be5e 147 SCAN_ITERATION_COMPLETE = 0xe7,
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148
149 /* Phy */
150 PHY_CONFIGURATION_CMD = 0x6a,
151 CALIB_RES_NOTIF_PHY_DB = 0x6b,
152 /* PHY_DB_CMD = 0x6c, */
153
e811ada7 154 /* Power - legacy power table command */
8ca151b5 155 POWER_TABLE_CMD = 0x77,
175a70b7 156 PSM_UAPSD_AP_MISBEHAVING_NOTIFICATION = 0x78,
8ca151b5 157
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158 /* Thermal Throttling*/
159 REPLY_THERMAL_MNG_BACKOFF = 0x7e,
160
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161 /* Scanning */
162 SCAN_REQUEST_CMD = 0x80,
163 SCAN_ABORT_CMD = 0x81,
164 SCAN_START_NOTIFICATION = 0x82,
165 SCAN_RESULTS_NOTIFICATION = 0x83,
166 SCAN_COMPLETE_NOTIFICATION = 0x84,
167
168 /* NVM */
169 NVM_ACCESS_CMD = 0x88,
170
171 SET_CALIB_DEFAULT_CMD = 0x8e,
172
571765c8 173 BEACON_NOTIFICATION = 0x90,
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174 BEACON_TEMPLATE_CMD = 0x91,
175 TX_ANT_CONFIGURATION_CMD = 0x98,
176 STATISTICS_NOTIFICATION = 0x9d,
3e56eadf 177 EOSP_NOTIFICATION = 0x9e,
88f2fd73 178 REDUCE_TX_POWER_CMD = 0x9f,
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179
180 /* RF-KILL commands and notifications */
181 CARD_STATE_CMD = 0xa0,
182 CARD_STATE_NOTIFICATION = 0xa1,
183
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184 MISSED_BEACONS_NOTIFICATION = 0xa2,
185
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186 /* Power - new power table command */
187 MAC_PM_POWER_TABLE = 0xa9,
188
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189 REPLY_RX_PHY_CMD = 0xc0,
190 REPLY_RX_MPDU_CMD = 0xc1,
191 BA_NOTIF = 0xc5,
192
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193 MARKER_CMD = 0xcb,
194
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195 /* BT Coex */
196 BT_COEX_PRIO_TABLE = 0xcc,
197 BT_COEX_PROT_ENV = 0xcd,
198 BT_PROFILE_NOTIFICATION = 0xce,
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199 BT_CONFIG = 0x9b,
200 BT_COEX_UPDATE_SW_BOOST = 0x5a,
201 BT_COEX_UPDATE_CORUN_LUT = 0x5b,
202 BT_COEX_UPDATE_REDUCED_TXP = 0x5c,
dac94da8 203 BT_COEX_CI = 0x5d,
fb3ceb81 204
1f3b0ff8 205 REPLY_SF_CFG_CMD = 0xd1,
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206 REPLY_BEACON_FILTERING_CMD = 0xd2,
207
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208 REPLY_DEBUG_CMD = 0xf0,
209 DEBUG_LOG_MSG = 0xf7,
210
c87163b9 211 BCAST_FILTER_CMD = 0xcf,
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212 MCAST_FILTER_CMD = 0xd0,
213
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214 /* D3 commands/notifications */
215 D3_CONFIG_CMD = 0xd3,
216 PROT_OFFLOAD_CONFIG_CMD = 0xd4,
217 OFFLOADS_QUERY_CMD = 0xd5,
218 REMOTE_WAKE_CONFIG_CMD = 0xd6,
98ee7783 219 D0I3_END_CMD = 0xed,
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220
221 /* for WoWLAN in particular */
222 WOWLAN_PATTERNS = 0xe0,
223 WOWLAN_CONFIGURATION = 0xe1,
224 WOWLAN_TSC_RSC_PARAM = 0xe2,
225 WOWLAN_TKIP_PARAM = 0xe3,
226 WOWLAN_KEK_KCK_MATERIAL = 0xe4,
227 WOWLAN_GET_STATUSES = 0xe5,
228 WOWLAN_TX_POWER_PER_DB = 0xe6,
229
230 /* and for NetDetect */
231 NET_DETECT_CONFIG_CMD = 0x54,
232 NET_DETECT_PROFILES_QUERY_CMD = 0x56,
233 NET_DETECT_PROFILES_CMD = 0x57,
234 NET_DETECT_HOTSPOTS_CMD = 0x58,
235 NET_DETECT_HOTSPOTS_QUERY_CMD = 0x59,
236
237 REPLY_MAX = 0xff,
238};
239
240/**
241 * struct iwl_cmd_response - generic response struct for most commands
242 * @status: status of the command asked, changes for each one
243 */
244struct iwl_cmd_response {
245 __le32 status;
246};
247
248/*
249 * struct iwl_tx_ant_cfg_cmd
250 * @valid: valid antenna configuration
251 */
252struct iwl_tx_ant_cfg_cmd {
253 __le32 valid;
254} __packed;
255
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256/**
257 * struct iwl_reduce_tx_power_cmd - TX power reduction command
258 * REDUCE_TX_POWER_CMD = 0x9f
259 * @flags: (reserved for future implementation)
260 * @mac_context_id: id of the mac ctx for which we are reducing TX power.
261 * @pwr_restriction: TX power restriction in dBms.
262 */
263struct iwl_reduce_tx_power_cmd {
264 u8 flags;
265 u8 mac_context_id;
266 __le16 pwr_restriction;
267} __packed; /* TX_REDUCED_POWER_API_S_VER_1 */
268
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269/*
270 * Calibration control struct.
271 * Sent as part of the phy configuration command.
272 * @flow_trigger: bitmap for which calibrations to perform according to
273 * flow triggers.
274 * @event_trigger: bitmap for which calibrations to perform according to
275 * event triggers.
276 */
277struct iwl_calib_ctrl {
278 __le32 flow_trigger;
279 __le32 event_trigger;
280} __packed;
281
282/* This enum defines the bitmap of various calibrations to enable in both
283 * init ucode and runtime ucode through CALIBRATION_CFG_CMD.
284 */
285enum iwl_calib_cfg {
286 IWL_CALIB_CFG_XTAL_IDX = BIT(0),
287 IWL_CALIB_CFG_TEMPERATURE_IDX = BIT(1),
288 IWL_CALIB_CFG_VOLTAGE_READ_IDX = BIT(2),
289 IWL_CALIB_CFG_PAPD_IDX = BIT(3),
290 IWL_CALIB_CFG_TX_PWR_IDX = BIT(4),
291 IWL_CALIB_CFG_DC_IDX = BIT(5),
292 IWL_CALIB_CFG_BB_FILTER_IDX = BIT(6),
293 IWL_CALIB_CFG_LO_LEAKAGE_IDX = BIT(7),
294 IWL_CALIB_CFG_TX_IQ_IDX = BIT(8),
295 IWL_CALIB_CFG_TX_IQ_SKEW_IDX = BIT(9),
296 IWL_CALIB_CFG_RX_IQ_IDX = BIT(10),
297 IWL_CALIB_CFG_RX_IQ_SKEW_IDX = BIT(11),
298 IWL_CALIB_CFG_SENSITIVITY_IDX = BIT(12),
299 IWL_CALIB_CFG_CHAIN_NOISE_IDX = BIT(13),
300 IWL_CALIB_CFG_DISCONNECTED_ANT_IDX = BIT(14),
301 IWL_CALIB_CFG_ANT_COUPLING_IDX = BIT(15),
302 IWL_CALIB_CFG_DAC_IDX = BIT(16),
303 IWL_CALIB_CFG_ABS_IDX = BIT(17),
304 IWL_CALIB_CFG_AGC_IDX = BIT(18),
305};
306
307/*
308 * Phy configuration command.
309 */
310struct iwl_phy_cfg_cmd {
311 __le32 phy_cfg;
312 struct iwl_calib_ctrl calib_control;
313} __packed;
314
315#define PHY_CFG_RADIO_TYPE (BIT(0) | BIT(1))
316#define PHY_CFG_RADIO_STEP (BIT(2) | BIT(3))
317#define PHY_CFG_RADIO_DASH (BIT(4) | BIT(5))
318#define PHY_CFG_PRODUCT_NUMBER (BIT(6) | BIT(7))
319#define PHY_CFG_TX_CHAIN_A BIT(8)
320#define PHY_CFG_TX_CHAIN_B BIT(9)
321#define PHY_CFG_TX_CHAIN_C BIT(10)
322#define PHY_CFG_RX_CHAIN_A BIT(12)
323#define PHY_CFG_RX_CHAIN_B BIT(13)
324#define PHY_CFG_RX_CHAIN_C BIT(14)
325
326
327/* Target of the NVM_ACCESS_CMD */
328enum {
329 NVM_ACCESS_TARGET_CACHE = 0,
330 NVM_ACCESS_TARGET_OTP = 1,
331 NVM_ACCESS_TARGET_EEPROM = 2,
332};
333
b9545b48 334/* Section types for NVM_ACCESS_CMD */
8ca151b5 335enum {
ae2b21b0 336 NVM_SECTION_TYPE_SW = 1,
77db0a3c 337 NVM_SECTION_TYPE_REGULATORY = 3,
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338 NVM_SECTION_TYPE_CALIBRATION = 4,
339 NVM_SECTION_TYPE_PRODUCTION = 5,
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340 NVM_SECTION_TYPE_MAC_OVERRIDE = 11,
341 NVM_MAX_NUM_SECTIONS = 12,
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342};
343
344/**
345 * struct iwl_nvm_access_cmd_ver2 - Request the device to send an NVM section
346 * @op_code: 0 - read, 1 - write
347 * @target: NVM_ACCESS_TARGET_*
348 * @type: NVM_SECTION_TYPE_*
349 * @offset: offset in bytes into the section
350 * @length: in bytes, to read/write
351 * @data: if write operation, the data to write. On read its empty
352 */
b9545b48 353struct iwl_nvm_access_cmd {
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354 u8 op_code;
355 u8 target;
356 __le16 type;
357 __le16 offset;
358 __le16 length;
359 u8 data[];
360} __packed; /* NVM_ACCESS_CMD_API_S_VER_2 */
361
362/**
363 * struct iwl_nvm_access_resp_ver2 - response to NVM_ACCESS_CMD
364 * @offset: offset in bytes into the section
365 * @length: in bytes, either how much was written or read
366 * @type: NVM_SECTION_TYPE_*
367 * @status: 0 for success, fail otherwise
368 * @data: if read operation, the data returned. Empty on write.
369 */
b9545b48 370struct iwl_nvm_access_resp {
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371 __le16 offset;
372 __le16 length;
373 __le16 type;
374 __le16 status;
375 u8 data[];
376} __packed; /* NVM_ACCESS_CMD_RESP_API_S_VER_2 */
377
378/* MVM_ALIVE 0x1 */
379
380/* alive response is_valid values */
381#define ALIVE_RESP_UCODE_OK BIT(0)
382#define ALIVE_RESP_RFKILL BIT(1)
383
384/* alive response ver_type values */
385enum {
386 FW_TYPE_HW = 0,
387 FW_TYPE_PROT = 1,
388 FW_TYPE_AP = 2,
389 FW_TYPE_WOWLAN = 3,
390 FW_TYPE_TIMING = 4,
391 FW_TYPE_WIPAN = 5
392};
393
394/* alive response ver_subtype values */
395enum {
396 FW_SUBTYPE_FULL_FEATURE = 0,
397 FW_SUBTYPE_BOOTSRAP = 1, /* Not valid */
398 FW_SUBTYPE_REDUCED = 2,
399 FW_SUBTYPE_ALIVE_ONLY = 3,
400 FW_SUBTYPE_WOWLAN = 4,
401 FW_SUBTYPE_AP_SUBTYPE = 5,
402 FW_SUBTYPE_WIPAN = 6,
403 FW_SUBTYPE_INITIALIZE = 9
404};
405
406#define IWL_ALIVE_STATUS_ERR 0xDEAD
407#define IWL_ALIVE_STATUS_OK 0xCAFE
408
409#define IWL_ALIVE_FLG_RFKILL BIT(0)
410
411struct mvm_alive_resp {
412 __le16 status;
413 __le16 flags;
414 u8 ucode_minor;
415 u8 ucode_major;
416 __le16 id;
417 u8 api_minor;
418 u8 api_major;
419 u8 ver_subtype;
420 u8 ver_type;
421 u8 mac;
422 u8 opt;
423 __le16 reserved2;
424 __le32 timestamp;
425 __le32 error_event_table_ptr; /* SRAM address for error log */
426 __le32 log_event_table_ptr; /* SRAM address for event log */
427 __le32 cpu_register_ptr;
428 __le32 dbgm_config_ptr;
429 __le32 alive_counter_ptr;
430 __le32 scd_base_ptr; /* SRAM address for SCD */
431} __packed; /* ALIVE_RES_API_S_VER_1 */
432
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433struct mvm_alive_resp_ver2 {
434 __le16 status;
435 __le16 flags;
436 u8 ucode_minor;
437 u8 ucode_major;
438 __le16 id;
439 u8 api_minor;
440 u8 api_major;
441 u8 ver_subtype;
442 u8 ver_type;
443 u8 mac;
444 u8 opt;
445 __le16 reserved2;
446 __le32 timestamp;
447 __le32 error_event_table_ptr; /* SRAM address for error log */
448 __le32 log_event_table_ptr; /* SRAM address for LMAC event log */
449 __le32 cpu_register_ptr;
450 __le32 dbgm_config_ptr;
451 __le32 alive_counter_ptr;
452 __le32 scd_base_ptr; /* SRAM address for SCD */
453 __le32 st_fwrd_addr; /* pointer to Store and forward */
454 __le32 st_fwrd_size;
455 u8 umac_minor; /* UMAC version: minor */
456 u8 umac_major; /* UMAC version: major */
457 __le16 umac_id; /* UMAC version: id */
458 __le32 error_info_addr; /* SRAM address for UMAC error log */
459 __le32 dbg_print_buff_addr;
460} __packed; /* ALIVE_RES_API_S_VER_2 */
461
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462/* Error response/notification */
463enum {
464 FW_ERR_UNKNOWN_CMD = 0x0,
465 FW_ERR_INVALID_CMD_PARAM = 0x1,
466 FW_ERR_SERVICE = 0x2,
467 FW_ERR_ARC_MEMORY = 0x3,
468 FW_ERR_ARC_CODE = 0x4,
469 FW_ERR_WATCH_DOG = 0x5,
470 FW_ERR_WEP_GRP_KEY_INDX = 0x10,
471 FW_ERR_WEP_KEY_SIZE = 0x11,
472 FW_ERR_OBSOLETE_FUNC = 0x12,
473 FW_ERR_UNEXPECTED = 0xFE,
474 FW_ERR_FATAL = 0xFF
475};
476
477/**
478 * struct iwl_error_resp - FW error indication
479 * ( REPLY_ERROR = 0x2 )
480 * @error_type: one of FW_ERR_*
481 * @cmd_id: the command ID for which the error occured
482 * @bad_cmd_seq_num: sequence number of the erroneous command
483 * @error_service: which service created the error, applicable only if
484 * error_type = 2, otherwise 0
485 * @timestamp: TSF in usecs.
486 */
487struct iwl_error_resp {
488 __le32 error_type;
489 u8 cmd_id;
490 u8 reserved1;
491 __le16 bad_cmd_seq_num;
492 __le32 error_service;
493 __le64 timestamp;
494} __packed;
495
496
497/* Common PHY, MAC and Bindings definitions */
498
499#define MAX_MACS_IN_BINDING (3)
500#define MAX_BINDINGS (4)
501#define AUX_BINDING_INDEX (3)
502#define MAX_PHYS (4)
503
504/* Used to extract ID and color from the context dword */
505#define FW_CTXT_ID_POS (0)
506#define FW_CTXT_ID_MSK (0xff << FW_CTXT_ID_POS)
507#define FW_CTXT_COLOR_POS (8)
508#define FW_CTXT_COLOR_MSK (0xff << FW_CTXT_COLOR_POS)
509#define FW_CTXT_INVALID (0xffffffff)
510
511#define FW_CMD_ID_AND_COLOR(_id, _color) ((_id << FW_CTXT_ID_POS) |\
512 (_color << FW_CTXT_COLOR_POS))
513
514/* Possible actions on PHYs, MACs and Bindings */
515enum {
516 FW_CTXT_ACTION_STUB = 0,
517 FW_CTXT_ACTION_ADD,
518 FW_CTXT_ACTION_MODIFY,
519 FW_CTXT_ACTION_REMOVE,
520 FW_CTXT_ACTION_NUM
521}; /* COMMON_CONTEXT_ACTION_API_E_VER_1 */
522
523/* Time Events */
524
525/* Time Event types, according to MAC type */
526enum iwl_time_event_type {
527 /* BSS Station Events */
528 TE_BSS_STA_AGGRESSIVE_ASSOC,
529 TE_BSS_STA_ASSOC,
530 TE_BSS_EAP_DHCP_PROT,
531 TE_BSS_QUIET_PERIOD,
532
533 /* P2P Device Events */
534 TE_P2P_DEVICE_DISCOVERABLE,
535 TE_P2P_DEVICE_LISTEN,
536 TE_P2P_DEVICE_ACTION_SCAN,
537 TE_P2P_DEVICE_FULL_SCAN,
538
539 /* P2P Client Events */
540 TE_P2P_CLIENT_AGGRESSIVE_ASSOC,
541 TE_P2P_CLIENT_ASSOC,
542 TE_P2P_CLIENT_QUIET_PERIOD,
543
544 /* P2P GO Events */
545 TE_P2P_GO_ASSOC_PROT,
546 TE_P2P_GO_REPETITIVE_NOA,
547 TE_P2P_GO_CT_WINDOW,
548
549 /* WiDi Sync Events */
550 TE_WIDI_TX_SYNC,
551
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552 /* Channel Switch NoA */
553 TE_P2P_GO_CSA_NOA,
554
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555 TE_MAX
556}; /* MAC_EVENT_TYPE_API_E_VER_1 */
557
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558
559
560/* Time event - defines for command API v1 */
561
562/*
563 * @TE_V1_FRAG_NONE: fragmentation of the time event is NOT allowed.
564 * @TE_V1_FRAG_SINGLE: fragmentation of the time event is allowed, but only
565 * the first fragment is scheduled.
566 * @TE_V1_FRAG_DUAL: fragmentation of the time event is allowed, but only
567 * the first 2 fragments are scheduled.
568 * @TE_V1_FRAG_ENDLESS: fragmentation of the time event is allowed, and any
569 * number of fragments are valid.
570 *
571 * Other than the constant defined above, specifying a fragmentation value 'x'
572 * means that the event can be fragmented but only the first 'x' will be
573 * scheduled.
574 */
575enum {
576 TE_V1_FRAG_NONE = 0,
577 TE_V1_FRAG_SINGLE = 1,
578 TE_V1_FRAG_DUAL = 2,
579 TE_V1_FRAG_ENDLESS = 0xffffffff
580};
581
582/* If a Time Event can be fragmented, this is the max number of fragments */
583#define TE_V1_FRAG_MAX_MSK 0x0fffffff
584/* Repeat the time event endlessly (until removed) */
585#define TE_V1_REPEAT_ENDLESS 0xffffffff
586/* If a Time Event has bounded repetitions, this is the maximal value */
587#define TE_V1_REPEAT_MAX_MSK_V1 0x0fffffff
588
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589/* Time Event dependencies: none, on another TE, or in a specific time */
590enum {
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591 TE_V1_INDEPENDENT = 0,
592 TE_V1_DEP_OTHER = BIT(0),
593 TE_V1_DEP_TSF = BIT(1),
594 TE_V1_EVENT_SOCIOPATHIC = BIT(2),
8ca151b5 595}; /* MAC_EVENT_DEPENDENCY_POLICY_API_E_VER_2 */
f8f03c3e 596
1da80e80 597/*
f8f03c3e
EL
598 * @TE_V1_NOTIF_NONE: no notifications
599 * @TE_V1_NOTIF_HOST_EVENT_START: request/receive notification on event start
600 * @TE_V1_NOTIF_HOST_EVENT_END:request/receive notification on event end
601 * @TE_V1_NOTIF_INTERNAL_EVENT_START: internal FW use
602 * @TE_V1_NOTIF_INTERNAL_EVENT_END: internal FW use.
603 * @TE_V1_NOTIF_HOST_FRAG_START: request/receive notification on frag start
604 * @TE_V1_NOTIF_HOST_FRAG_END:request/receive notification on frag end
605 * @TE_V1_NOTIF_INTERNAL_FRAG_START: internal FW use.
606 * @TE_V1_NOTIF_INTERNAL_FRAG_END: internal FW use.
607 *
1da80e80
IP
608 * Supported Time event notifications configuration.
609 * A notification (both event and fragment) includes a status indicating weather
610 * the FW was able to schedule the event or not. For fragment start/end
611 * notification the status is always success. There is no start/end fragment
612 * notification for monolithic events.
1da80e80 613 */
8ca151b5 614enum {
f8f03c3e
EL
615 TE_V1_NOTIF_NONE = 0,
616 TE_V1_NOTIF_HOST_EVENT_START = BIT(0),
617 TE_V1_NOTIF_HOST_EVENT_END = BIT(1),
618 TE_V1_NOTIF_INTERNAL_EVENT_START = BIT(2),
619 TE_V1_NOTIF_INTERNAL_EVENT_END = BIT(3),
620 TE_V1_NOTIF_HOST_FRAG_START = BIT(4),
621 TE_V1_NOTIF_HOST_FRAG_END = BIT(5),
622 TE_V1_NOTIF_INTERNAL_FRAG_START = BIT(6),
623 TE_V1_NOTIF_INTERNAL_FRAG_END = BIT(7),
1da80e80 624}; /* MAC_EVENT_ACTION_API_E_VER_2 */
8ca151b5 625
a373f67c 626/* Time event - defines for command API */
f8f03c3e 627
8ca151b5 628/*
f8f03c3e
EL
629 * @TE_V2_FRAG_NONE: fragmentation of the time event is NOT allowed.
630 * @TE_V2_FRAG_SINGLE: fragmentation of the time event is allowed, but only
8ca151b5 631 * the first fragment is scheduled.
f8f03c3e 632 * @TE_V2_FRAG_DUAL: fragmentation of the time event is allowed, but only
8ca151b5 633 * the first 2 fragments are scheduled.
f8f03c3e
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634 * @TE_V2_FRAG_ENDLESS: fragmentation of the time event is allowed, and any
635 * number of fragments are valid.
8ca151b5
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636 *
637 * Other than the constant defined above, specifying a fragmentation value 'x'
638 * means that the event can be fragmented but only the first 'x' will be
639 * scheduled.
640 */
641enum {
f8f03c3e
EL
642 TE_V2_FRAG_NONE = 0,
643 TE_V2_FRAG_SINGLE = 1,
644 TE_V2_FRAG_DUAL = 2,
645 TE_V2_FRAG_MAX = 0xfe,
646 TE_V2_FRAG_ENDLESS = 0xff
8ca151b5
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647};
648
649/* Repeat the time event endlessly (until removed) */
f8f03c3e 650#define TE_V2_REPEAT_ENDLESS 0xff
8ca151b5 651/* If a Time Event has bounded repetitions, this is the maximal value */
f8f03c3e
EL
652#define TE_V2_REPEAT_MAX 0xfe
653
654#define TE_V2_PLACEMENT_POS 12
655#define TE_V2_ABSENCE_POS 15
656
a373f67c 657/* Time event policy values
f8f03c3e
EL
658 * A notification (both event and fragment) includes a status indicating weather
659 * the FW was able to schedule the event or not. For fragment start/end
660 * notification the status is always success. There is no start/end fragment
661 * notification for monolithic events.
662 *
663 * @TE_V2_DEFAULT_POLICY: independent, social, present, unoticable
664 * @TE_V2_NOTIF_HOST_EVENT_START: request/receive notification on event start
665 * @TE_V2_NOTIF_HOST_EVENT_END:request/receive notification on event end
666 * @TE_V2_NOTIF_INTERNAL_EVENT_START: internal FW use
667 * @TE_V2_NOTIF_INTERNAL_EVENT_END: internal FW use.
668 * @TE_V2_NOTIF_HOST_FRAG_START: request/receive notification on frag start
669 * @TE_V2_NOTIF_HOST_FRAG_END:request/receive notification on frag end
670 * @TE_V2_NOTIF_INTERNAL_FRAG_START: internal FW use.
671 * @TE_V2_NOTIF_INTERNAL_FRAG_END: internal FW use.
672 * @TE_V2_DEP_OTHER: depends on another time event
673 * @TE_V2_DEP_TSF: depends on a specific time
674 * @TE_V2_EVENT_SOCIOPATHIC: can't co-exist with other events of tha same MAC
675 * @TE_V2_ABSENCE: are we present or absent during the Time Event.
676 */
677enum {
678 TE_V2_DEFAULT_POLICY = 0x0,
679
680 /* notifications (event start/stop, fragment start/stop) */
681 TE_V2_NOTIF_HOST_EVENT_START = BIT(0),
682 TE_V2_NOTIF_HOST_EVENT_END = BIT(1),
683 TE_V2_NOTIF_INTERNAL_EVENT_START = BIT(2),
684 TE_V2_NOTIF_INTERNAL_EVENT_END = BIT(3),
685
686 TE_V2_NOTIF_HOST_FRAG_START = BIT(4),
687 TE_V2_NOTIF_HOST_FRAG_END = BIT(5),
688 TE_V2_NOTIF_INTERNAL_FRAG_START = BIT(6),
689 TE_V2_NOTIF_INTERNAL_FRAG_END = BIT(7),
1f6bf078 690 T2_V2_START_IMMEDIATELY = BIT(11),
f8f03c3e
EL
691
692 TE_V2_NOTIF_MSK = 0xff,
693
694 /* placement characteristics */
695 TE_V2_DEP_OTHER = BIT(TE_V2_PLACEMENT_POS),
696 TE_V2_DEP_TSF = BIT(TE_V2_PLACEMENT_POS + 1),
697 TE_V2_EVENT_SOCIOPATHIC = BIT(TE_V2_PLACEMENT_POS + 2),
698
699 /* are we present or absent during the Time Event. */
700 TE_V2_ABSENCE = BIT(TE_V2_ABSENCE_POS),
701};
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702
703/**
a373f67c 704 * struct iwl_time_event_cmd_api - configuring Time Events
f8f03c3e
EL
705 * with struct MAC_TIME_EVENT_DATA_API_S_VER_2 (see also
706 * with version 1. determined by IWL_UCODE_TLV_FLAGS)
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707 * ( TIME_EVENT_CMD = 0x29 )
708 * @id_and_color: ID and color of the relevant MAC
709 * @action: action to perform, one of FW_CTXT_ACTION_*
710 * @id: this field has two meanings, depending on the action:
711 * If the action is ADD, then it means the type of event to add.
712 * For all other actions it is the unique event ID assigned when the
713 * event was added by the FW.
714 * @apply_time: When to start the Time Event (in GP2)
715 * @max_delay: maximum delay to event's start (apply time), in TU
716 * @depends_on: the unique ID of the event we depend on (if any)
717 * @interval: interval between repetitions, in TU
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718 * @duration: duration of event in TU
719 * @repeat: how many repetitions to do, can be TE_REPEAT_ENDLESS
8ca151b5 720 * @max_frags: maximal number of fragments the Time Event can be divided to
f8f03c3e
EL
721 * @policy: defines whether uCode shall notify the host or other uCode modules
722 * on event and/or fragment start and/or end
723 * using one of TE_INDEPENDENT, TE_DEP_OTHER, TE_DEP_TSF
724 * TE_EVENT_SOCIOPATHIC
725 * using TE_ABSENCE and using TE_NOTIF_*
8ca151b5 726 */
a373f67c 727struct iwl_time_event_cmd {
8ca151b5
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728 /* COMMON_INDEX_HDR_API_S_VER_1 */
729 __le32 id_and_color;
730 __le32 action;
731 __le32 id;
f8f03c3e 732 /* MAC_TIME_EVENT_DATA_API_S_VER_2 */
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JB
733 __le32 apply_time;
734 __le32 max_delay;
8ca151b5 735 __le32 depends_on;
8ca151b5 736 __le32 interval;
8ca151b5 737 __le32 duration;
f8f03c3e
EL
738 u8 repeat;
739 u8 max_frags;
740 __le16 policy;
741} __packed; /* MAC_TIME_EVENT_CMD_API_S_VER_2 */
8ca151b5
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742
743/**
744 * struct iwl_time_event_resp - response structure to iwl_time_event_cmd
745 * @status: bit 0 indicates success, all others specify errors
746 * @id: the Time Event type
747 * @unique_id: the unique ID assigned (in ADD) or given (others) to the TE
748 * @id_and_color: ID and color of the relevant MAC
749 */
750struct iwl_time_event_resp {
751 __le32 status;
752 __le32 id;
753 __le32 unique_id;
754 __le32 id_and_color;
755} __packed; /* MAC_TIME_EVENT_RSP_API_S_VER_1 */
756
757/**
758 * struct iwl_time_event_notif - notifications of time event start/stop
759 * ( TIME_EVENT_NOTIFICATION = 0x2a )
760 * @timestamp: action timestamp in GP2
761 * @session_id: session's unique id
762 * @unique_id: unique id of the Time Event itself
763 * @id_and_color: ID and color of the relevant MAC
764 * @action: one of TE_NOTIF_START or TE_NOTIF_END
765 * @status: true if scheduled, false otherwise (not executed)
766 */
767struct iwl_time_event_notif {
768 __le32 timestamp;
769 __le32 session_id;
770 __le32 unique_id;
771 __le32 id_and_color;
772 __le32 action;
773 __le32 status;
774} __packed; /* MAC_TIME_EVENT_NTFY_API_S_VER_1 */
775
776
777/* Bindings and Time Quota */
778
779/**
780 * struct iwl_binding_cmd - configuring bindings
781 * ( BINDING_CONTEXT_CMD = 0x2b )
782 * @id_and_color: ID and color of the relevant Binding
783 * @action: action to perform, one of FW_CTXT_ACTION_*
784 * @macs: array of MAC id and colors which belong to the binding
785 * @phy: PHY id and color which belongs to the binding
786 */
787struct iwl_binding_cmd {
788 /* COMMON_INDEX_HDR_API_S_VER_1 */
789 __le32 id_and_color;
790 __le32 action;
791 /* BINDING_DATA_API_S_VER_1 */
792 __le32 macs[MAX_MACS_IN_BINDING];
793 __le32 phy;
794} __packed; /* BINDING_CMD_API_S_VER_1 */
795
35adfd6e
IP
796/* The maximal number of fragments in the FW's schedule session */
797#define IWL_MVM_MAX_QUOTA 128
798
8ca151b5
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799/**
800 * struct iwl_time_quota_data - configuration of time quota per binding
801 * @id_and_color: ID and color of the relevant Binding
802 * @quota: absolute time quota in TU. The scheduler will try to divide the
803 * remainig quota (after Time Events) according to this quota.
804 * @max_duration: max uninterrupted context duration in TU
805 */
806struct iwl_time_quota_data {
807 __le32 id_and_color;
808 __le32 quota;
809 __le32 max_duration;
810} __packed; /* TIME_QUOTA_DATA_API_S_VER_1 */
811
812/**
813 * struct iwl_time_quota_cmd - configuration of time quota between bindings
814 * ( TIME_QUOTA_CMD = 0x2c )
815 * @quotas: allocations per binding
816 */
817struct iwl_time_quota_cmd {
818 struct iwl_time_quota_data quotas[MAX_BINDINGS];
819} __packed; /* TIME_QUOTA_ALLOCATION_CMD_API_S_VER_1 */
820
821
822/* PHY context */
823
824/* Supported bands */
825#define PHY_BAND_5 (0)
826#define PHY_BAND_24 (1)
827
828/* Supported channel width, vary if there is VHT support */
829#define PHY_VHT_CHANNEL_MODE20 (0x0)
830#define PHY_VHT_CHANNEL_MODE40 (0x1)
831#define PHY_VHT_CHANNEL_MODE80 (0x2)
832#define PHY_VHT_CHANNEL_MODE160 (0x3)
833
834/*
835 * Control channel position:
836 * For legacy set bit means upper channel, otherwise lower.
837 * For VHT - bit-2 marks if the control is lower/upper relative to center-freq
838 * bits-1:0 mark the distance from the center freq. for 20Mhz, offset is 0.
839 * center_freq
840 * |
841 * 40Mhz |_______|_______|
842 * 80Mhz |_______|_______|_______|_______|
843 * 160Mhz |_______|_______|_______|_______|_______|_______|_______|_______|
844 * code 011 010 001 000 | 100 101 110 111
845 */
846#define PHY_VHT_CTRL_POS_1_BELOW (0x0)
847#define PHY_VHT_CTRL_POS_2_BELOW (0x1)
848#define PHY_VHT_CTRL_POS_3_BELOW (0x2)
849#define PHY_VHT_CTRL_POS_4_BELOW (0x3)
850#define PHY_VHT_CTRL_POS_1_ABOVE (0x4)
851#define PHY_VHT_CTRL_POS_2_ABOVE (0x5)
852#define PHY_VHT_CTRL_POS_3_ABOVE (0x6)
853#define PHY_VHT_CTRL_POS_4_ABOVE (0x7)
854
855/*
856 * @band: PHY_BAND_*
857 * @channel: channel number
858 * @width: PHY_[VHT|LEGACY]_CHANNEL_*
859 * @ctrl channel: PHY_[VHT|LEGACY]_CTRL_*
860 */
861struct iwl_fw_channel_info {
862 u8 band;
863 u8 channel;
864 u8 width;
865 u8 ctrl_pos;
866} __packed;
867
868#define PHY_RX_CHAIN_DRIVER_FORCE_POS (0)
869#define PHY_RX_CHAIN_DRIVER_FORCE_MSK \
870 (0x1 << PHY_RX_CHAIN_DRIVER_FORCE_POS)
871#define PHY_RX_CHAIN_VALID_POS (1)
872#define PHY_RX_CHAIN_VALID_MSK \
873 (0x7 << PHY_RX_CHAIN_VALID_POS)
874#define PHY_RX_CHAIN_FORCE_SEL_POS (4)
875#define PHY_RX_CHAIN_FORCE_SEL_MSK \
876 (0x7 << PHY_RX_CHAIN_FORCE_SEL_POS)
877#define PHY_RX_CHAIN_FORCE_MIMO_SEL_POS (7)
878#define PHY_RX_CHAIN_FORCE_MIMO_SEL_MSK \
879 (0x7 << PHY_RX_CHAIN_FORCE_MIMO_SEL_POS)
880#define PHY_RX_CHAIN_CNT_POS (10)
881#define PHY_RX_CHAIN_CNT_MSK \
882 (0x3 << PHY_RX_CHAIN_CNT_POS)
883#define PHY_RX_CHAIN_MIMO_CNT_POS (12)
884#define PHY_RX_CHAIN_MIMO_CNT_MSK \
885 (0x3 << PHY_RX_CHAIN_MIMO_CNT_POS)
886#define PHY_RX_CHAIN_MIMO_FORCE_POS (14)
887#define PHY_RX_CHAIN_MIMO_FORCE_MSK \
888 (0x1 << PHY_RX_CHAIN_MIMO_FORCE_POS)
889
890/* TODO: fix the value, make it depend on firmware at runtime? */
891#define NUM_PHY_CTX 3
892
893/* TODO: complete missing documentation */
894/**
895 * struct iwl_phy_context_cmd - config of the PHY context
896 * ( PHY_CONTEXT_CMD = 0x8 )
897 * @id_and_color: ID and color of the relevant Binding
898 * @action: action to perform, one of FW_CTXT_ACTION_*
899 * @apply_time: 0 means immediate apply and context switch.
900 * other value means apply new params after X usecs
901 * @tx_param_color: ???
902 * @channel_info:
903 * @txchain_info: ???
904 * @rxchain_info: ???
905 * @acquisition_data: ???
906 * @dsp_cfg_flags: set to 0
907 */
908struct iwl_phy_context_cmd {
909 /* COMMON_INDEX_HDR_API_S_VER_1 */
910 __le32 id_and_color;
911 __le32 action;
912 /* PHY_CONTEXT_DATA_API_S_VER_1 */
913 __le32 apply_time;
914 __le32 tx_param_color;
915 struct iwl_fw_channel_info ci;
916 __le32 txchain_info;
917 __le32 rxchain_info;
918 __le32 acquisition_data;
919 __le32 dsp_cfg_flags;
920} __packed; /* PHY_CONTEXT_CMD_API_VER_1 */
921
720befbf
AM
922/*
923 * Aux ROC command
924 *
925 * Command requests the firmware to create a time event for a certain duration
926 * and remain on the given channel. This is done by using the Aux framework in
927 * the FW.
928 * The command was first used for Hot Spot issues - but can be used regardless
929 * to Hot Spot.
930 *
931 * ( HOT_SPOT_CMD 0x53 )
932 *
933 * @id_and_color: ID and color of the MAC
934 * @action: action to perform, one of FW_CTXT_ACTION_*
935 * @event_unique_id: If the action FW_CTXT_ACTION_REMOVE then the
936 * event_unique_id should be the id of the time event assigned by ucode.
937 * Otherwise ignore the event_unique_id.
938 * @sta_id_and_color: station id and color, resumed during "Remain On Channel"
939 * activity.
940 * @channel_info: channel info
941 * @node_addr: Our MAC Address
942 * @reserved: reserved for alignment
943 * @apply_time: GP2 value to start (should always be the current GP2 value)
944 * @apply_time_max_delay: Maximum apply time delay value in TU. Defines max
945 * time by which start of the event is allowed to be postponed.
946 * @duration: event duration in TU To calculate event duration:
947 * timeEventDuration = min(duration, remainingQuota)
948 */
949struct iwl_hs20_roc_req {
950 /* COMMON_INDEX_HDR_API_S_VER_1 hdr */
951 __le32 id_and_color;
952 __le32 action;
953 __le32 event_unique_id;
954 __le32 sta_id_and_color;
955 struct iwl_fw_channel_info channel_info;
956 u8 node_addr[ETH_ALEN];
957 __le16 reserved;
958 __le32 apply_time;
959 __le32 apply_time_max_delay;
960 __le32 duration;
961} __packed; /* HOT_SPOT_CMD_API_S_VER_1 */
962
963/*
964 * values for AUX ROC result values
965 */
966enum iwl_mvm_hot_spot {
967 HOT_SPOT_RSP_STATUS_OK,
968 HOT_SPOT_RSP_STATUS_TOO_MANY_EVENTS,
969 HOT_SPOT_MAX_NUM_OF_SESSIONS,
970};
971
972/*
973 * Aux ROC command response
974 *
975 * In response to iwl_hs20_roc_req the FW sends this command to notify the
976 * driver the uid of the timevent.
977 *
978 * ( HOT_SPOT_CMD 0x53 )
979 *
980 * @event_unique_id: Unique ID of time event assigned by ucode
981 * @status: Return status 0 is success, all the rest used for specific errors
982 */
983struct iwl_hs20_roc_res {
984 __le32 event_unique_id;
985 __le32 status;
986} __packed; /* HOT_SPOT_RSP_API_S_VER_1 */
987
8ca151b5 988#define IWL_RX_INFO_PHY_CNT 8
a2d7b870
AA
989#define IWL_RX_INFO_ENERGY_ANT_ABC_IDX 1
990#define IWL_RX_INFO_ENERGY_ANT_A_MSK 0x000000ff
991#define IWL_RX_INFO_ENERGY_ANT_B_MSK 0x0000ff00
992#define IWL_RX_INFO_ENERGY_ANT_C_MSK 0x00ff0000
993#define IWL_RX_INFO_ENERGY_ANT_A_POS 0
994#define IWL_RX_INFO_ENERGY_ANT_B_POS 8
995#define IWL_RX_INFO_ENERGY_ANT_C_POS 16
996
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997#define IWL_RX_INFO_AGC_IDX 1
998#define IWL_RX_INFO_RSSI_AB_IDX 2
8101a7f0
EG
999#define IWL_OFDM_AGC_A_MSK 0x0000007f
1000#define IWL_OFDM_AGC_A_POS 0
1001#define IWL_OFDM_AGC_B_MSK 0x00003f80
1002#define IWL_OFDM_AGC_B_POS 7
1003#define IWL_OFDM_AGC_CODE_MSK 0x3fe00000
1004#define IWL_OFDM_AGC_CODE_POS 20
8ca151b5 1005#define IWL_OFDM_RSSI_INBAND_A_MSK 0x00ff
8ca151b5 1006#define IWL_OFDM_RSSI_A_POS 0
8101a7f0
EG
1007#define IWL_OFDM_RSSI_ALLBAND_A_MSK 0xff00
1008#define IWL_OFDM_RSSI_ALLBAND_A_POS 8
8ca151b5 1009#define IWL_OFDM_RSSI_INBAND_B_MSK 0xff0000
8ca151b5 1010#define IWL_OFDM_RSSI_B_POS 16
8101a7f0
EG
1011#define IWL_OFDM_RSSI_ALLBAND_B_MSK 0xff000000
1012#define IWL_OFDM_RSSI_ALLBAND_B_POS 24
8ca151b5
JB
1013
1014/**
1015 * struct iwl_rx_phy_info - phy info
1016 * (REPLY_RX_PHY_CMD = 0xc0)
1017 * @non_cfg_phy_cnt: non configurable DSP phy data byte count
1018 * @cfg_phy_cnt: configurable DSP phy data byte count
1019 * @stat_id: configurable DSP phy data set ID
1020 * @reserved1:
1021 * @system_timestamp: GP2 at on air rise
1022 * @timestamp: TSF at on air rise
1023 * @beacon_time_stamp: beacon at on-air rise
1024 * @phy_flags: general phy flags: band, modulation, ...
1025 * @channel: channel number
1026 * @non_cfg_phy_buf: for various implementations of non_cfg_phy
1027 * @rate_n_flags: RATE_MCS_*
1028 * @byte_count: frame's byte-count
1029 * @frame_time: frame's time on the air, based on byte count and frame rate
1030 * calculation
6bfcb7e8 1031 * @mac_active_msk: what MACs were active when the frame was received
8ca151b5
JB
1032 *
1033 * Before each Rx, the device sends this data. It contains PHY information
1034 * about the reception of the packet.
1035 */
1036struct iwl_rx_phy_info {
1037 u8 non_cfg_phy_cnt;
1038 u8 cfg_phy_cnt;
1039 u8 stat_id;
1040 u8 reserved1;
1041 __le32 system_timestamp;
1042 __le64 timestamp;
1043 __le32 beacon_time_stamp;
1044 __le16 phy_flags;
1045 __le16 channel;
1046 __le32 non_cfg_phy[IWL_RX_INFO_PHY_CNT];
1047 __le32 rate_n_flags;
1048 __le32 byte_count;
6bfcb7e8 1049 __le16 mac_active_msk;
8ca151b5
JB
1050 __le16 frame_time;
1051} __packed;
1052
1053struct iwl_rx_mpdu_res_start {
1054 __le16 byte_count;
1055 __le16 reserved;
1056} __packed;
1057
1058/**
1059 * enum iwl_rx_phy_flags - to parse %iwl_rx_phy_info phy_flags
1060 * @RX_RES_PHY_FLAGS_BAND_24: true if the packet was received on 2.4 band
1061 * @RX_RES_PHY_FLAGS_MOD_CCK:
1062 * @RX_RES_PHY_FLAGS_SHORT_PREAMBLE: true if packet's preamble was short
1063 * @RX_RES_PHY_FLAGS_NARROW_BAND:
1064 * @RX_RES_PHY_FLAGS_ANTENNA: antenna on which the packet was received
1065 * @RX_RES_PHY_FLAGS_AGG: set if the packet was part of an A-MPDU
1066 * @RX_RES_PHY_FLAGS_OFDM_HT: The frame was an HT frame
1067 * @RX_RES_PHY_FLAGS_OFDM_GF: The frame used GF preamble
1068 * @RX_RES_PHY_FLAGS_OFDM_VHT: The frame was a VHT frame
1069 */
1070enum iwl_rx_phy_flags {
1071 RX_RES_PHY_FLAGS_BAND_24 = BIT(0),
1072 RX_RES_PHY_FLAGS_MOD_CCK = BIT(1),
1073 RX_RES_PHY_FLAGS_SHORT_PREAMBLE = BIT(2),
1074 RX_RES_PHY_FLAGS_NARROW_BAND = BIT(3),
1075 RX_RES_PHY_FLAGS_ANTENNA = (0x7 << 4),
1076 RX_RES_PHY_FLAGS_ANTENNA_POS = 4,
1077 RX_RES_PHY_FLAGS_AGG = BIT(7),
1078 RX_RES_PHY_FLAGS_OFDM_HT = BIT(8),
1079 RX_RES_PHY_FLAGS_OFDM_GF = BIT(9),
1080 RX_RES_PHY_FLAGS_OFDM_VHT = BIT(10),
1081};
1082
1083/**
1084 * enum iwl_mvm_rx_status - written by fw for each Rx packet
1085 * @RX_MPDU_RES_STATUS_CRC_OK: CRC is fine
1086 * @RX_MPDU_RES_STATUS_OVERRUN_OK: there was no RXE overflow
1087 * @RX_MPDU_RES_STATUS_SRC_STA_FOUND:
1088 * @RX_MPDU_RES_STATUS_KEY_VALID:
1089 * @RX_MPDU_RES_STATUS_KEY_PARAM_OK:
1090 * @RX_MPDU_RES_STATUS_ICV_OK: ICV is fine, if not, the packet is destroyed
1091 * @RX_MPDU_RES_STATUS_MIC_OK: used for CCM alg only. TKIP MIC is checked
1092 * in the driver.
1093 * @RX_MPDU_RES_STATUS_TTAK_OK: TTAK is fine
1094 * @RX_MPDU_RES_STATUS_MNG_FRAME_REPLAY_ERR: valid for alg = CCM_CMAC or
1095 * alg = CCM only. Checks replay attack for 11w frames. Relevant only if
1096 * %RX_MPDU_RES_STATUS_ROBUST_MNG_FRAME is set.
1097 * @RX_MPDU_RES_STATUS_SEC_NO_ENC: this frame is not encrypted
1098 * @RX_MPDU_RES_STATUS_SEC_WEP_ENC: this frame is encrypted using WEP
1099 * @RX_MPDU_RES_STATUS_SEC_CCM_ENC: this frame is encrypted using CCM
1100 * @RX_MPDU_RES_STATUS_SEC_TKIP_ENC: this frame is encrypted using TKIP
1101 * @RX_MPDU_RES_STATUS_SEC_CCM_CMAC_ENC: this frame is encrypted using CCM_CMAC
1102 * @RX_MPDU_RES_STATUS_SEC_ENC_ERR: this frame couldn't be decrypted
1103 * @RX_MPDU_RES_STATUS_SEC_ENC_MSK: bitmask of the encryption algorithm
1104 * @RX_MPDU_RES_STATUS_DEC_DONE: this frame has been successfully decrypted
1105 * @RX_MPDU_RES_STATUS_PROTECT_FRAME_BIT_CMP:
1106 * @RX_MPDU_RES_STATUS_EXT_IV_BIT_CMP:
1107 * @RX_MPDU_RES_STATUS_KEY_ID_CMP_BIT:
1108 * @RX_MPDU_RES_STATUS_ROBUST_MNG_FRAME: this frame is an 11w management frame
1109 * @RX_MPDU_RES_STATUS_HASH_INDEX_MSK:
1110 * @RX_MPDU_RES_STATUS_STA_ID_MSK:
1111 * @RX_MPDU_RES_STATUS_RRF_KILL:
1112 * @RX_MPDU_RES_STATUS_FILTERING_MSK:
1113 * @RX_MPDU_RES_STATUS2_FILTERING_MSK:
1114 */
1115enum iwl_mvm_rx_status {
1116 RX_MPDU_RES_STATUS_CRC_OK = BIT(0),
1117 RX_MPDU_RES_STATUS_OVERRUN_OK = BIT(1),
1118 RX_MPDU_RES_STATUS_SRC_STA_FOUND = BIT(2),
1119 RX_MPDU_RES_STATUS_KEY_VALID = BIT(3),
1120 RX_MPDU_RES_STATUS_KEY_PARAM_OK = BIT(4),
1121 RX_MPDU_RES_STATUS_ICV_OK = BIT(5),
1122 RX_MPDU_RES_STATUS_MIC_OK = BIT(6),
1123 RX_MPDU_RES_STATUS_TTAK_OK = BIT(7),
1124 RX_MPDU_RES_STATUS_MNG_FRAME_REPLAY_ERR = BIT(7),
1125 RX_MPDU_RES_STATUS_SEC_NO_ENC = (0 << 8),
1126 RX_MPDU_RES_STATUS_SEC_WEP_ENC = (1 << 8),
1127 RX_MPDU_RES_STATUS_SEC_CCM_ENC = (2 << 8),
1128 RX_MPDU_RES_STATUS_SEC_TKIP_ENC = (3 << 8),
e36e5433 1129 RX_MPDU_RES_STATUS_SEC_EXT_ENC = (4 << 8),
8ca151b5
JB
1130 RX_MPDU_RES_STATUS_SEC_CCM_CMAC_ENC = (6 << 8),
1131 RX_MPDU_RES_STATUS_SEC_ENC_ERR = (7 << 8),
1132 RX_MPDU_RES_STATUS_SEC_ENC_MSK = (7 << 8),
1133 RX_MPDU_RES_STATUS_DEC_DONE = BIT(11),
1134 RX_MPDU_RES_STATUS_PROTECT_FRAME_BIT_CMP = BIT(12),
1135 RX_MPDU_RES_STATUS_EXT_IV_BIT_CMP = BIT(13),
1136 RX_MPDU_RES_STATUS_KEY_ID_CMP_BIT = BIT(14),
1137 RX_MPDU_RES_STATUS_ROBUST_MNG_FRAME = BIT(15),
1138 RX_MPDU_RES_STATUS_HASH_INDEX_MSK = (0x3F0000),
1139 RX_MPDU_RES_STATUS_STA_ID_MSK = (0x1f000000),
1140 RX_MPDU_RES_STATUS_RRF_KILL = BIT(29),
1141 RX_MPDU_RES_STATUS_FILTERING_MSK = (0xc00000),
1142 RX_MPDU_RES_STATUS2_FILTERING_MSK = (0xc0000000),
1143};
1144
1145/**
1146 * struct iwl_radio_version_notif - information on the radio version
1147 * ( RADIO_VERSION_NOTIFICATION = 0x68 )
1148 * @radio_flavor:
1149 * @radio_step:
1150 * @radio_dash:
1151 */
1152struct iwl_radio_version_notif {
1153 __le32 radio_flavor;
1154 __le32 radio_step;
1155 __le32 radio_dash;
1156} __packed; /* RADIO_VERSION_NOTOFICATION_S_VER_1 */
1157
1158enum iwl_card_state_flags {
1159 CARD_ENABLED = 0x00,
1160 HW_CARD_DISABLED = 0x01,
1161 SW_CARD_DISABLED = 0x02,
1162 CT_KILL_CARD_DISABLED = 0x04,
1163 HALT_CARD_DISABLED = 0x08,
1164 CARD_DISABLED_MSK = 0x0f,
1165 CARD_IS_RX_ON = 0x10,
1166};
1167
1168/**
1169 * struct iwl_radio_version_notif - information on the radio version
1170 * ( CARD_STATE_NOTIFICATION = 0xa1 )
1171 * @flags: %iwl_card_state_flags
1172 */
1173struct iwl_card_state_notif {
1174 __le32 flags;
1175} __packed; /* CARD_STATE_NTFY_API_S_VER_1 */
1176
d64048ed
HG
1177/**
1178 * struct iwl_missed_beacons_notif - information on missed beacons
1179 * ( MISSED_BEACONS_NOTIFICATION = 0xa2 )
1180 * @mac_id: interface ID
1181 * @consec_missed_beacons_since_last_rx: number of consecutive missed
1182 * beacons since last RX.
1183 * @consec_missed_beacons: number of consecutive missed beacons
1184 * @num_expected_beacons:
1185 * @num_recvd_beacons:
1186 */
1187struct iwl_missed_beacons_notif {
1188 __le32 mac_id;
1189 __le32 consec_missed_beacons_since_last_rx;
1190 __le32 consec_missed_beacons;
1191 __le32 num_expected_beacons;
1192 __le32 num_recvd_beacons;
1193} __packed; /* MISSED_BEACON_NTFY_API_S_VER_3 */
1194
8ca151b5
JB
1195/**
1196 * struct iwl_set_calib_default_cmd - set default value for calibration.
1197 * ( SET_CALIB_DEFAULT_CMD = 0x8e )
1198 * @calib_index: the calibration to set value for
1199 * @length: of data
1200 * @data: the value to set for the calibration result
1201 */
1202struct iwl_set_calib_default_cmd {
1203 __le16 calib_index;
1204 __le16 length;
1205 u8 data[0];
1206} __packed; /* PHY_CALIB_OVERRIDE_VALUES_S */
1207
51b6b9e0 1208#define MAX_PORT_ID_NUM 2
e59647ea 1209#define MAX_MCAST_FILTERING_ADDRESSES 256
51b6b9e0
EG
1210
1211/**
1212 * struct iwl_mcast_filter_cmd - configure multicast filter.
1213 * @filter_own: Set 1 to filter out multicast packets sent by station itself
1214 * @port_id: Multicast MAC addresses array specifier. This is a strange way
1215 * to identify network interface adopted in host-device IF.
1216 * It is used by FW as index in array of addresses. This array has
1217 * MAX_PORT_ID_NUM members.
1218 * @count: Number of MAC addresses in the array
1219 * @pass_all: Set 1 to pass all multicast packets.
1220 * @bssid: current association BSSID.
1221 * @addr_list: Place holder for array of MAC addresses.
1222 * IMPORTANT: add padding if necessary to ensure DWORD alignment.
1223 */
1224struct iwl_mcast_filter_cmd {
1225 u8 filter_own;
1226 u8 port_id;
1227 u8 count;
1228 u8 pass_all;
1229 u8 bssid[6];
1230 u8 reserved[2];
1231 u8 addr_list[0];
1232} __packed; /* MCAST_FILTERING_CMD_API_S_VER_1 */
1233
c87163b9
EP
1234#define MAX_BCAST_FILTERS 8
1235#define MAX_BCAST_FILTER_ATTRS 2
1236
1237/**
1238 * enum iwl_mvm_bcast_filter_attr_offset - written by fw for each Rx packet
1239 * @BCAST_FILTER_OFFSET_PAYLOAD_START: offset is from payload start.
1240 * @BCAST_FILTER_OFFSET_IP_END: offset is from ip header end (i.e.
1241 * start of ip payload).
1242 */
1243enum iwl_mvm_bcast_filter_attr_offset {
1244 BCAST_FILTER_OFFSET_PAYLOAD_START = 0,
1245 BCAST_FILTER_OFFSET_IP_END = 1,
1246};
1247
1248/**
1249 * struct iwl_fw_bcast_filter_attr - broadcast filter attribute
1250 * @offset_type: &enum iwl_mvm_bcast_filter_attr_offset.
1251 * @offset: starting offset of this pattern.
1252 * @val: value to match - big endian (MSB is the first
1253 * byte to match from offset pos).
1254 * @mask: mask to match (big endian).
1255 */
1256struct iwl_fw_bcast_filter_attr {
1257 u8 offset_type;
1258 u8 offset;
1259 __le16 reserved1;
1260 __be32 val;
1261 __be32 mask;
1262} __packed; /* BCAST_FILTER_ATT_S_VER_1 */
1263
1264/**
1265 * enum iwl_mvm_bcast_filter_frame_type - filter frame type
1266 * @BCAST_FILTER_FRAME_TYPE_ALL: consider all frames.
1267 * @BCAST_FILTER_FRAME_TYPE_IPV4: consider only ipv4 frames
1268 */
1269enum iwl_mvm_bcast_filter_frame_type {
1270 BCAST_FILTER_FRAME_TYPE_ALL = 0,
1271 BCAST_FILTER_FRAME_TYPE_IPV4 = 1,
1272};
1273
1274/**
1275 * struct iwl_fw_bcast_filter - broadcast filter
1276 * @discard: discard frame (1) or let it pass (0).
1277 * @frame_type: &enum iwl_mvm_bcast_filter_frame_type.
1278 * @num_attrs: number of valid attributes in this filter.
1279 * @attrs: attributes of this filter. a filter is considered matched
1280 * only when all its attributes are matched (i.e. AND relationship)
1281 */
1282struct iwl_fw_bcast_filter {
1283 u8 discard;
1284 u8 frame_type;
1285 u8 num_attrs;
1286 u8 reserved1;
1287 struct iwl_fw_bcast_filter_attr attrs[MAX_BCAST_FILTER_ATTRS];
1288} __packed; /* BCAST_FILTER_S_VER_1 */
1289
1290/**
1291 * struct iwl_fw_bcast_mac - per-mac broadcast filtering configuration.
1292 * @default_discard: default action for this mac (discard (1) / pass (0)).
1293 * @attached_filters: bitmap of relevant filters for this mac.
1294 */
1295struct iwl_fw_bcast_mac {
1296 u8 default_discard;
1297 u8 reserved1;
1298 __le16 attached_filters;
1299} __packed; /* BCAST_MAC_CONTEXT_S_VER_1 */
1300
1301/**
1302 * struct iwl_bcast_filter_cmd - broadcast filtering configuration
1303 * @disable: enable (0) / disable (1)
1304 * @max_bcast_filters: max number of filters (MAX_BCAST_FILTERS)
1305 * @max_macs: max number of macs (NUM_MAC_INDEX_DRIVER)
1306 * @filters: broadcast filters
1307 * @macs: broadcast filtering configuration per-mac
1308 */
1309struct iwl_bcast_filter_cmd {
1310 u8 disable;
1311 u8 max_bcast_filters;
1312 u8 max_macs;
1313 u8 reserved1;
1314 struct iwl_fw_bcast_filter filters[MAX_BCAST_FILTERS];
1315 struct iwl_fw_bcast_mac macs[NUM_MAC_INDEX_DRIVER];
1316} __packed; /* BCAST_FILTERING_HCMD_API_S_VER_1 */
1317
a2d79c57
MG
1318/*
1319 * enum iwl_mvm_marker_id - maker ids
1320 *
1321 * The ids for different type of markers to insert into the usniffer logs
1322 */
1323enum iwl_mvm_marker_id {
1324 MARKER_ID_TX_FRAME_LATENCY = 1,
1325}; /* MARKER_ID_API_E_VER_1 */
1326
1327/**
1328 * struct iwl_mvm_marker - mark info into the usniffer logs
1329 *
1330 * (MARKER_CMD = 0xcb)
1331 *
1332 * Mark the UTC time stamp into the usniffer logs together with additional
1333 * metadata, so the usniffer output can be parsed.
1334 * In the command response the ucode will return the GP2 time.
1335 *
1336 * @dw_len: The amount of dwords following this byte including this byte.
1337 * @marker_id: A unique marker id (iwl_mvm_marker_id).
1338 * @reserved: reserved.
1339 * @timestamp: in milliseconds since 1970-01-01 00:00:00 UTC
1340 * @metadata: additional meta data that will be written to the unsiffer log
1341 */
1342struct iwl_mvm_marker {
1343 u8 dwLen;
1344 u8 markerId;
1345 __le16 reserved;
1346 __le64 timestamp;
1347 __le32 metadata[0];
1348} __packed; /* MARKER_API_S_VER_1 */
1349
9ee718aa
EL
1350struct mvm_statistics_dbg {
1351 __le32 burst_check;
1352 __le32 burst_count;
1353 __le32 wait_for_silence_timeout_cnt;
1354 __le32 reserved[3];
1355} __packed; /* STATISTICS_DEBUG_API_S_VER_2 */
1356
1357struct mvm_statistics_div {
1358 __le32 tx_on_a;
1359 __le32 tx_on_b;
1360 __le32 exec_time;
1361 __le32 probe_time;
1362 __le32 rssi_ant;
1363 __le32 reserved2;
1364} __packed; /* STATISTICS_SLOW_DIV_API_S_VER_2 */
1365
1366struct mvm_statistics_general_common {
1367 __le32 temperature; /* radio temperature */
1368 __le32 temperature_m; /* radio voltage */
1369 struct mvm_statistics_dbg dbg;
1370 __le32 sleep_time;
1371 __le32 slots_out;
1372 __le32 slots_idle;
1373 __le32 ttl_timestamp;
1374 struct mvm_statistics_div div;
1375 __le32 rx_enable_counter;
1376 /*
1377 * num_of_sos_states:
1378 * count the number of times we have to re-tune
1379 * in order to get out of bad PHY status
1380 */
1381 __le32 num_of_sos_states;
1382} __packed; /* STATISTICS_GENERAL_API_S_VER_5 */
1383
1384struct mvm_statistics_rx_non_phy {
1385 __le32 bogus_cts; /* CTS received when not expecting CTS */
1386 __le32 bogus_ack; /* ACK received when not expecting ACK */
1387 __le32 non_bssid_frames; /* number of frames with BSSID that
1388 * doesn't belong to the STA BSSID */
1389 __le32 filtered_frames; /* count frames that were dumped in the
1390 * filtering process */
1391 __le32 non_channel_beacons; /* beacons with our bss id but not on
1392 * our serving channel */
1393 __le32 channel_beacons; /* beacons with our bss id and in our
1394 * serving channel */
1395 __le32 num_missed_bcon; /* number of missed beacons */
1396 __le32 adc_rx_saturation_time; /* count in 0.8us units the time the
1397 * ADC was in saturation */
1398 __le32 ina_detection_search_time;/* total time (in 0.8us) searched
1399 * for INA */
1400 __le32 beacon_silence_rssi_a; /* RSSI silence after beacon frame */
1401 __le32 beacon_silence_rssi_b; /* RSSI silence after beacon frame */
1402 __le32 beacon_silence_rssi_c; /* RSSI silence after beacon frame */
1403 __le32 interference_data_flag; /* flag for interference data
1404 * availability. 1 when data is
1405 * available. */
1406 __le32 channel_load; /* counts RX Enable time in uSec */
1407 __le32 dsp_false_alarms; /* DSP false alarm (both OFDM
1408 * and CCK) counter */
1409 __le32 beacon_rssi_a;
1410 __le32 beacon_rssi_b;
1411 __le32 beacon_rssi_c;
1412 __le32 beacon_energy_a;
1413 __le32 beacon_energy_b;
1414 __le32 beacon_energy_c;
1415 __le32 num_bt_kills;
1416 __le32 mac_id;
1417 __le32 directed_data_mpdu;
1418} __packed; /* STATISTICS_RX_NON_PHY_API_S_VER_3 */
1419
1420struct mvm_statistics_rx_phy {
1421 __le32 ina_cnt;
1422 __le32 fina_cnt;
1423 __le32 plcp_err;
1424 __le32 crc32_err;
1425 __le32 overrun_err;
1426 __le32 early_overrun_err;
1427 __le32 crc32_good;
1428 __le32 false_alarm_cnt;
1429 __le32 fina_sync_err_cnt;
1430 __le32 sfd_timeout;
1431 __le32 fina_timeout;
1432 __le32 unresponded_rts;
1433 __le32 rxe_frame_limit_overrun;
1434 __le32 sent_ack_cnt;
1435 __le32 sent_cts_cnt;
1436 __le32 sent_ba_rsp_cnt;
1437 __le32 dsp_self_kill;
1438 __le32 mh_format_err;
1439 __le32 re_acq_main_rssi_sum;
1440 __le32 reserved;
1441} __packed; /* STATISTICS_RX_PHY_API_S_VER_2 */
1442
1443struct mvm_statistics_rx_ht_phy {
1444 __le32 plcp_err;
1445 __le32 overrun_err;
1446 __le32 early_overrun_err;
1447 __le32 crc32_good;
1448 __le32 crc32_err;
1449 __le32 mh_format_err;
1450 __le32 agg_crc32_good;
1451 __le32 agg_mpdu_cnt;
1452 __le32 agg_cnt;
1453 __le32 unsupport_mcs;
1454} __packed; /* STATISTICS_HT_RX_PHY_API_S_VER_1 */
1455
1456#define MAX_CHAINS 3
1457
1458struct mvm_statistics_tx_non_phy_agg {
1459 __le32 ba_timeout;
1460 __le32 ba_reschedule_frames;
1461 __le32 scd_query_agg_frame_cnt;
1462 __le32 scd_query_no_agg;
1463 __le32 scd_query_agg;
1464 __le32 scd_query_mismatch;
1465 __le32 frame_not_ready;
1466 __le32 underrun;
1467 __le32 bt_prio_kill;
1468 __le32 rx_ba_rsp_cnt;
1469 __s8 txpower[MAX_CHAINS];
1470 __s8 reserved;
1471 __le32 reserved2;
1472} __packed; /* STATISTICS_TX_NON_PHY_AGG_API_S_VER_1 */
1473
1474struct mvm_statistics_tx_channel_width {
1475 __le32 ext_cca_narrow_ch20[1];
1476 __le32 ext_cca_narrow_ch40[2];
1477 __le32 ext_cca_narrow_ch80[3];
1478 __le32 ext_cca_narrow_ch160[4];
1479 __le32 last_tx_ch_width_indx;
1480 __le32 rx_detected_per_ch_width[4];
1481 __le32 success_per_ch_width[4];
1482 __le32 fail_per_ch_width[4];
1483}; /* STATISTICS_TX_CHANNEL_WIDTH_API_S_VER_1 */
1484
1485struct mvm_statistics_tx {
1486 __le32 preamble_cnt;
1487 __le32 rx_detected_cnt;
1488 __le32 bt_prio_defer_cnt;
1489 __le32 bt_prio_kill_cnt;
1490 __le32 few_bytes_cnt;
1491 __le32 cts_timeout;
1492 __le32 ack_timeout;
1493 __le32 expected_ack_cnt;
1494 __le32 actual_ack_cnt;
1495 __le32 dump_msdu_cnt;
1496 __le32 burst_abort_next_frame_mismatch_cnt;
1497 __le32 burst_abort_missing_next_frame_cnt;
1498 __le32 cts_timeout_collision;
1499 __le32 ack_or_ba_timeout_collision;
1500 struct mvm_statistics_tx_non_phy_agg agg;
1501 struct mvm_statistics_tx_channel_width channel_width;
1502} __packed; /* STATISTICS_TX_API_S_VER_4 */
1503
1504
1505struct mvm_statistics_bt_activity {
1506 __le32 hi_priority_tx_req_cnt;
1507 __le32 hi_priority_tx_denied_cnt;
1508 __le32 lo_priority_tx_req_cnt;
1509 __le32 lo_priority_tx_denied_cnt;
1510 __le32 hi_priority_rx_req_cnt;
1511 __le32 hi_priority_rx_denied_cnt;
1512 __le32 lo_priority_rx_req_cnt;
1513 __le32 lo_priority_rx_denied_cnt;
1514} __packed; /* STATISTICS_BT_ACTIVITY_API_S_VER_1 */
1515
1516struct mvm_statistics_general {
1517 struct mvm_statistics_general_common common;
1518 __le32 beacon_filtered;
1519 __le32 missed_beacons;
a20fd398 1520 __s8 beacon_filter_average_energy;
9ee718aa
EL
1521 __s8 beacon_filter_reason;
1522 __s8 beacon_filter_current_energy;
1523 __s8 beacon_filter_reserved;
1524 __le32 beacon_filter_delta_time;
1525 struct mvm_statistics_bt_activity bt_activity;
1526} __packed; /* STATISTICS_GENERAL_API_S_VER_5 */
1527
1528struct mvm_statistics_rx {
1529 struct mvm_statistics_rx_phy ofdm;
1530 struct mvm_statistics_rx_phy cck;
1531 struct mvm_statistics_rx_non_phy general;
1532 struct mvm_statistics_rx_ht_phy ofdm_ht;
1533} __packed; /* STATISTICS_RX_API_S_VER_3 */
1534
1535/*
1536 * STATISTICS_NOTIFICATION = 0x9d (notification only, not a command)
1537 *
1538 * By default, uCode issues this notification after receiving a beacon
1539 * while associated. To disable this behavior, set DISABLE_NOTIF flag in the
1540 * REPLY_STATISTICS_CMD 0x9c, above.
1541 *
1542 * Statistics counters continue to increment beacon after beacon, but are
1543 * cleared when changing channels or when driver issues REPLY_STATISTICS_CMD
1544 * 0x9c with CLEAR_STATS bit set (see above).
1545 *
1546 * uCode also issues this notification during scans. uCode clears statistics
1547 * appropriately so that each notification contains statistics for only the
1548 * one channel that has just been scanned.
1549 */
1550
1551struct iwl_notif_statistics { /* STATISTICS_NTFY_API_S_VER_8 */
1552 __le32 flag;
1553 struct mvm_statistics_rx rx;
1554 struct mvm_statistics_tx tx;
1555 struct mvm_statistics_general general;
1556} __packed;
1557
1f3b0ff8
LE
1558/***********************************
1559 * Smart Fifo API
1560 ***********************************/
1561/* Smart Fifo state */
1562enum iwl_sf_state {
1563 SF_LONG_DELAY_ON = 0, /* should never be called by driver */
1564 SF_FULL_ON,
1565 SF_UNINIT,
1566 SF_INIT_OFF,
1567 SF_HW_NUM_STATES
1568};
1569
1570/* Smart Fifo possible scenario */
1571enum iwl_sf_scenario {
1572 SF_SCENARIO_SINGLE_UNICAST,
1573 SF_SCENARIO_AGG_UNICAST,
1574 SF_SCENARIO_MULTICAST,
1575 SF_SCENARIO_BA_RESP,
1576 SF_SCENARIO_TX_RESP,
1577 SF_NUM_SCENARIO
1578};
1579
1580#define SF_TRANSIENT_STATES_NUMBER 2 /* SF_LONG_DELAY_ON and SF_FULL_ON */
1581#define SF_NUM_TIMEOUT_TYPES 2 /* Aging timer and Idle timer */
1582
1583/* smart FIFO default values */
1584#define SF_W_MARK_SISO 4096
1585#define SF_W_MARK_MIMO2 8192
1586#define SF_W_MARK_MIMO3 6144
1587#define SF_W_MARK_LEGACY 4096
1588#define SF_W_MARK_SCAN 4096
1589
1590/* SF Scenarios timers for FULL_ON state (aligned to 32 uSec) */
1591#define SF_SINGLE_UNICAST_IDLE_TIMER 320 /* 300 uSec */
1592#define SF_SINGLE_UNICAST_AGING_TIMER 2016 /* 2 mSec */
1593#define SF_AGG_UNICAST_IDLE_TIMER 320 /* 300 uSec */
1594#define SF_AGG_UNICAST_AGING_TIMER 2016 /* 2 mSec */
1595#define SF_MCAST_IDLE_TIMER 2016 /* 2 mSec */
1596#define SF_MCAST_AGING_TIMER 10016 /* 10 mSec */
1597#define SF_BA_IDLE_TIMER 320 /* 300 uSec */
1598#define SF_BA_AGING_TIMER 2016 /* 2 mSec */
1599#define SF_TX_RE_IDLE_TIMER 320 /* 300 uSec */
1600#define SF_TX_RE_AGING_TIMER 2016 /* 2 mSec */
1601
1602#define SF_LONG_DELAY_AGING_TIMER 1000000 /* 1 Sec */
1603
1604/**
1605 * Smart Fifo configuration command.
1606 * @state: smart fifo state, types listed in iwl_sf_sate.
1607 * @watermark: Minimum allowed availabe free space in RXF for transient state.
1608 * @long_delay_timeouts: aging and idle timer values for each scenario
1609 * in long delay state.
1610 * @full_on_timeouts: timer values for each scenario in full on state.
1611 */
1612struct iwl_sf_cfg_cmd {
1613 enum iwl_sf_state state;
1614 __le32 watermark[SF_TRANSIENT_STATES_NUMBER];
1615 __le32 long_delay_timeouts[SF_NUM_SCENARIO][SF_NUM_TIMEOUT_TYPES];
1616 __le32 full_on_timeouts[SF_NUM_SCENARIO][SF_NUM_TIMEOUT_TYPES];
1617} __packed; /* SF_CFG_API_S_VER_2 */
1618
8ca151b5 1619#endif /* __fw_api_h__ */
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