iwlwifi: mvm: sync statistics firmware API
[deliverable/linux.git] / drivers / net / wireless / iwlwifi / mvm / fw-api.h
CommitLineData
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1/******************************************************************************
2 *
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
5 *
6 * GPL LICENSE SUMMARY
7 *
51368bf7 8 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
8b4139dc 9 * Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH
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10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of version 2 of the GNU General Public License as
13 * published by the Free Software Foundation.
14 *
15 * This program is distributed in the hope that it will be useful, but
16 * WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 * General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
23 * USA
24 *
25 * The full GNU General Public License is included in this distribution
410dc5aa 26 * in the file called COPYING.
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27 *
28 * Contact Information:
29 * Intel Linux Wireless <ilw@linux.intel.com>
30 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
31 *
32 * BSD LICENSE
33 *
51368bf7 34 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
8b4139dc 35 * Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH
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36 * All rights reserved.
37 *
38 * Redistribution and use in source and binary forms, with or without
39 * modification, are permitted provided that the following conditions
40 * are met:
41 *
42 * * Redistributions of source code must retain the above copyright
43 * notice, this list of conditions and the following disclaimer.
44 * * Redistributions in binary form must reproduce the above copyright
45 * notice, this list of conditions and the following disclaimer in
46 * the documentation and/or other materials provided with the
47 * distribution.
48 * * Neither the name Intel Corporation nor the names of its
49 * contributors may be used to endorse or promote products derived
50 * from this software without specific prior written permission.
51 *
52 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
53 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
54 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
55 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
56 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
57 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
58 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
59 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
60 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
61 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
62 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
63 *
64 *****************************************************************************/
65
66#ifndef __fw_api_h__
67#define __fw_api_h__
68
69#include "fw-api-rs.h"
70#include "fw-api-tx.h"
71#include "fw-api-sta.h"
72#include "fw-api-mac.h"
73#include "fw-api-power.h"
74#include "fw-api-d3.h"
5b7ff615 75#include "fw-api-coex.h"
e820c2da 76#include "fw-api-scan.h"
8ca151b5 77
19e737c9 78/* Tx queue numbers */
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79enum {
80 IWL_MVM_OFFCHANNEL_QUEUE = 8,
81 IWL_MVM_CMD_QUEUE = 9,
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82};
83
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84enum iwl_mvm_tx_fifo {
85 IWL_MVM_TX_FIFO_BK = 0,
86 IWL_MVM_TX_FIFO_BE,
87 IWL_MVM_TX_FIFO_VI,
88 IWL_MVM_TX_FIFO_VO,
89 IWL_MVM_TX_FIFO_MCAST = 5,
90 IWL_MVM_TX_FIFO_CMD = 7,
91};
19e737c9 92
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93#define IWL_MVM_STATION_COUNT 16
94
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95#define IWL_MVM_TDLS_STA_COUNT 4
96
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97/* commands */
98enum {
99 MVM_ALIVE = 0x1,
100 REPLY_ERROR = 0x2,
101
102 INIT_COMPLETE_NOTIF = 0x4,
103
104 /* PHY context commands */
105 PHY_CONTEXT_CMD = 0x8,
106 DBG_CFG = 0x9,
b9fae2d5 107 ANTENNA_COUPLING_NOTIFICATION = 0xa,
8ca151b5 108
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109 /* UMAC scan commands */
110 SCAN_CFG_CMD = 0xc,
111 SCAN_REQ_UMAC = 0xd,
112 SCAN_ABORT_UMAC = 0xe,
113 SCAN_COMPLETE_UMAC = 0xf,
114
8ca151b5 115 /* station table */
5a258aae 116 ADD_STA_KEY = 0x17,
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117 ADD_STA = 0x18,
118 REMOVE_STA = 0x19,
119
120 /* TX */
121 TX_CMD = 0x1c,
122 TXPATH_FLUSH = 0x1e,
123 MGMT_MCAST_KEY = 0x1f,
124
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125 /* scheduler config */
126 SCD_QUEUE_CFG = 0x1d,
127
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128 /* global key */
129 WEP_KEY = 0x20,
130
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131 /* Memory */
132 SHARED_MEM_CFG = 0x25,
133
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134 /* TDLS */
135 TDLS_CHANNEL_SWITCH_CMD = 0x27,
136 TDLS_CHANNEL_SWITCH_NOTIFICATION = 0xaa,
307e4723 137 TDLS_CONFIG_CMD = 0xa7,
77c5d7ef 138
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139 /* MAC and Binding commands */
140 MAC_CONTEXT_CMD = 0x28,
141 TIME_EVENT_CMD = 0x29, /* both CMD and response */
142 TIME_EVENT_NOTIFICATION = 0x2a,
143 BINDING_CONTEXT_CMD = 0x2b,
144 TIME_QUOTA_CMD = 0x2c,
4ac6cb59 145 NON_QOS_TX_COUNTER_CMD = 0x2d,
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146
147 LQ_CMD = 0x4e,
148
149 /* Calibration */
150 TEMPERATURE_NOTIFICATION = 0x62,
151 CALIBRATION_CFG_CMD = 0x65,
152 CALIBRATION_RES_NOTIFICATION = 0x66,
153 CALIBRATION_COMPLETE_NOTIFICATION = 0x67,
154 RADIO_VERSION_NOTIFICATION = 0x68,
155
156 /* Scan offload */
157 SCAN_OFFLOAD_REQUEST_CMD = 0x51,
158 SCAN_OFFLOAD_ABORT_CMD = 0x52,
720befbf 159 HOT_SPOT_CMD = 0x53,
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160 SCAN_OFFLOAD_COMPLETE = 0x6D,
161 SCAN_OFFLOAD_UPDATE_PROFILES_CMD = 0x6E,
162 SCAN_OFFLOAD_CONFIG_CMD = 0x6f,
35a000b7 163 MATCH_FOUND_NOTIFICATION = 0xd9,
fb98be5e 164 SCAN_ITERATION_COMPLETE = 0xe7,
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165
166 /* Phy */
167 PHY_CONFIGURATION_CMD = 0x6a,
168 CALIB_RES_NOTIF_PHY_DB = 0x6b,
169 /* PHY_DB_CMD = 0x6c, */
170
e811ada7 171 /* Power - legacy power table command */
8ca151b5 172 POWER_TABLE_CMD = 0x77,
175a70b7 173 PSM_UAPSD_AP_MISBEHAVING_NOTIFICATION = 0x78,
9180ac50 174 LTR_CONFIG = 0xee,
8ca151b5 175
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176 /* Thermal Throttling*/
177 REPLY_THERMAL_MNG_BACKOFF = 0x7e,
178
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179 /* Scanning */
180 SCAN_REQUEST_CMD = 0x80,
181 SCAN_ABORT_CMD = 0x81,
182 SCAN_START_NOTIFICATION = 0x82,
183 SCAN_RESULTS_NOTIFICATION = 0x83,
184 SCAN_COMPLETE_NOTIFICATION = 0x84,
185
186 /* NVM */
187 NVM_ACCESS_CMD = 0x88,
188
189 SET_CALIB_DEFAULT_CMD = 0x8e,
190
571765c8 191 BEACON_NOTIFICATION = 0x90,
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192 BEACON_TEMPLATE_CMD = 0x91,
193 TX_ANT_CONFIGURATION_CMD = 0x98,
194 STATISTICS_NOTIFICATION = 0x9d,
3e56eadf 195 EOSP_NOTIFICATION = 0x9e,
88f2fd73 196 REDUCE_TX_POWER_CMD = 0x9f,
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197
198 /* RF-KILL commands and notifications */
199 CARD_STATE_CMD = 0xa0,
200 CARD_STATE_NOTIFICATION = 0xa1,
201
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202 MISSED_BEACONS_NOTIFICATION = 0xa2,
203
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204 /* Power - new power table command */
205 MAC_PM_POWER_TABLE = 0xa9,
206
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207 MFUART_LOAD_NOTIFICATION = 0xb1,
208
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209 REPLY_RX_PHY_CMD = 0xc0,
210 REPLY_RX_MPDU_CMD = 0xc1,
211 BA_NOTIF = 0xc5,
212
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213 MARKER_CMD = 0xcb,
214
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215 /* BT Coex */
216 BT_COEX_PRIO_TABLE = 0xcc,
217 BT_COEX_PROT_ENV = 0xcd,
218 BT_PROFILE_NOTIFICATION = 0xce,
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219 BT_CONFIG = 0x9b,
220 BT_COEX_UPDATE_SW_BOOST = 0x5a,
221 BT_COEX_UPDATE_CORUN_LUT = 0x5b,
222 BT_COEX_UPDATE_REDUCED_TXP = 0x5c,
dac94da8 223 BT_COEX_CI = 0x5d,
fb3ceb81 224
1f3b0ff8 225 REPLY_SF_CFG_CMD = 0xd1,
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226 REPLY_BEACON_FILTERING_CMD = 0xd2,
227
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228 /* DTS measurements */
229 CMD_DTS_MEASUREMENT_TRIGGER = 0xdc,
230 DTS_MEASUREMENT_NOTIFICATION = 0xdd,
231
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232 REPLY_DEBUG_CMD = 0xf0,
233 DEBUG_LOG_MSG = 0xf7,
234
c87163b9 235 BCAST_FILTER_CMD = 0xcf,
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236 MCAST_FILTER_CMD = 0xd0,
237
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238 /* D3 commands/notifications */
239 D3_CONFIG_CMD = 0xd3,
240 PROT_OFFLOAD_CONFIG_CMD = 0xd4,
241 OFFLOADS_QUERY_CMD = 0xd5,
242 REMOTE_WAKE_CONFIG_CMD = 0xd6,
98ee7783 243 D0I3_END_CMD = 0xed,
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244
245 /* for WoWLAN in particular */
246 WOWLAN_PATTERNS = 0xe0,
247 WOWLAN_CONFIGURATION = 0xe1,
248 WOWLAN_TSC_RSC_PARAM = 0xe2,
249 WOWLAN_TKIP_PARAM = 0xe3,
250 WOWLAN_KEK_KCK_MATERIAL = 0xe4,
251 WOWLAN_GET_STATUSES = 0xe5,
252 WOWLAN_TX_POWER_PER_DB = 0xe6,
253
254 /* and for NetDetect */
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255 SCAN_OFFLOAD_PROFILES_QUERY_CMD = 0x56,
256 SCAN_OFFLOAD_HOTSPOTS_CONFIG_CMD = 0x58,
257 SCAN_OFFLOAD_HOTSPOTS_QUERY_CMD = 0x59,
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258
259 REPLY_MAX = 0xff,
260};
261
262/**
263 * struct iwl_cmd_response - generic response struct for most commands
264 * @status: status of the command asked, changes for each one
265 */
266struct iwl_cmd_response {
267 __le32 status;
268};
269
270/*
271 * struct iwl_tx_ant_cfg_cmd
272 * @valid: valid antenna configuration
273 */
274struct iwl_tx_ant_cfg_cmd {
275 __le32 valid;
276} __packed;
277
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278/**
279 * struct iwl_reduce_tx_power_cmd - TX power reduction command
280 * REDUCE_TX_POWER_CMD = 0x9f
281 * @flags: (reserved for future implementation)
282 * @mac_context_id: id of the mac ctx for which we are reducing TX power.
283 * @pwr_restriction: TX power restriction in dBms.
284 */
285struct iwl_reduce_tx_power_cmd {
286 u8 flags;
287 u8 mac_context_id;
288 __le16 pwr_restriction;
289} __packed; /* TX_REDUCED_POWER_API_S_VER_1 */
290
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291/*
292 * Calibration control struct.
293 * Sent as part of the phy configuration command.
294 * @flow_trigger: bitmap for which calibrations to perform according to
295 * flow triggers.
296 * @event_trigger: bitmap for which calibrations to perform according to
297 * event triggers.
298 */
299struct iwl_calib_ctrl {
300 __le32 flow_trigger;
301 __le32 event_trigger;
302} __packed;
303
304/* This enum defines the bitmap of various calibrations to enable in both
305 * init ucode and runtime ucode through CALIBRATION_CFG_CMD.
306 */
307enum iwl_calib_cfg {
308 IWL_CALIB_CFG_XTAL_IDX = BIT(0),
309 IWL_CALIB_CFG_TEMPERATURE_IDX = BIT(1),
310 IWL_CALIB_CFG_VOLTAGE_READ_IDX = BIT(2),
311 IWL_CALIB_CFG_PAPD_IDX = BIT(3),
312 IWL_CALIB_CFG_TX_PWR_IDX = BIT(4),
313 IWL_CALIB_CFG_DC_IDX = BIT(5),
314 IWL_CALIB_CFG_BB_FILTER_IDX = BIT(6),
315 IWL_CALIB_CFG_LO_LEAKAGE_IDX = BIT(7),
316 IWL_CALIB_CFG_TX_IQ_IDX = BIT(8),
317 IWL_CALIB_CFG_TX_IQ_SKEW_IDX = BIT(9),
318 IWL_CALIB_CFG_RX_IQ_IDX = BIT(10),
319 IWL_CALIB_CFG_RX_IQ_SKEW_IDX = BIT(11),
320 IWL_CALIB_CFG_SENSITIVITY_IDX = BIT(12),
321 IWL_CALIB_CFG_CHAIN_NOISE_IDX = BIT(13),
322 IWL_CALIB_CFG_DISCONNECTED_ANT_IDX = BIT(14),
323 IWL_CALIB_CFG_ANT_COUPLING_IDX = BIT(15),
324 IWL_CALIB_CFG_DAC_IDX = BIT(16),
325 IWL_CALIB_CFG_ABS_IDX = BIT(17),
326 IWL_CALIB_CFG_AGC_IDX = BIT(18),
327};
328
329/*
330 * Phy configuration command.
331 */
332struct iwl_phy_cfg_cmd {
333 __le32 phy_cfg;
334 struct iwl_calib_ctrl calib_control;
335} __packed;
336
337#define PHY_CFG_RADIO_TYPE (BIT(0) | BIT(1))
338#define PHY_CFG_RADIO_STEP (BIT(2) | BIT(3))
339#define PHY_CFG_RADIO_DASH (BIT(4) | BIT(5))
340#define PHY_CFG_PRODUCT_NUMBER (BIT(6) | BIT(7))
341#define PHY_CFG_TX_CHAIN_A BIT(8)
342#define PHY_CFG_TX_CHAIN_B BIT(9)
343#define PHY_CFG_TX_CHAIN_C BIT(10)
344#define PHY_CFG_RX_CHAIN_A BIT(12)
345#define PHY_CFG_RX_CHAIN_B BIT(13)
346#define PHY_CFG_RX_CHAIN_C BIT(14)
347
348
349/* Target of the NVM_ACCESS_CMD */
350enum {
351 NVM_ACCESS_TARGET_CACHE = 0,
352 NVM_ACCESS_TARGET_OTP = 1,
353 NVM_ACCESS_TARGET_EEPROM = 2,
354};
355
b9545b48 356/* Section types for NVM_ACCESS_CMD */
8ca151b5 357enum {
ae2b21b0 358 NVM_SECTION_TYPE_SW = 1,
77db0a3c 359 NVM_SECTION_TYPE_REGULATORY = 3,
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360 NVM_SECTION_TYPE_CALIBRATION = 4,
361 NVM_SECTION_TYPE_PRODUCTION = 5,
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362 NVM_SECTION_TYPE_MAC_OVERRIDE = 11,
363 NVM_MAX_NUM_SECTIONS = 12,
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364};
365
366/**
367 * struct iwl_nvm_access_cmd_ver2 - Request the device to send an NVM section
368 * @op_code: 0 - read, 1 - write
369 * @target: NVM_ACCESS_TARGET_*
370 * @type: NVM_SECTION_TYPE_*
371 * @offset: offset in bytes into the section
372 * @length: in bytes, to read/write
373 * @data: if write operation, the data to write. On read its empty
374 */
b9545b48 375struct iwl_nvm_access_cmd {
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376 u8 op_code;
377 u8 target;
378 __le16 type;
379 __le16 offset;
380 __le16 length;
381 u8 data[];
382} __packed; /* NVM_ACCESS_CMD_API_S_VER_2 */
383
384/**
385 * struct iwl_nvm_access_resp_ver2 - response to NVM_ACCESS_CMD
386 * @offset: offset in bytes into the section
387 * @length: in bytes, either how much was written or read
388 * @type: NVM_SECTION_TYPE_*
389 * @status: 0 for success, fail otherwise
390 * @data: if read operation, the data returned. Empty on write.
391 */
b9545b48 392struct iwl_nvm_access_resp {
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393 __le16 offset;
394 __le16 length;
395 __le16 type;
396 __le16 status;
397 u8 data[];
398} __packed; /* NVM_ACCESS_CMD_RESP_API_S_VER_2 */
399
400/* MVM_ALIVE 0x1 */
401
402/* alive response is_valid values */
403#define ALIVE_RESP_UCODE_OK BIT(0)
404#define ALIVE_RESP_RFKILL BIT(1)
405
406/* alive response ver_type values */
407enum {
408 FW_TYPE_HW = 0,
409 FW_TYPE_PROT = 1,
410 FW_TYPE_AP = 2,
411 FW_TYPE_WOWLAN = 3,
412 FW_TYPE_TIMING = 4,
413 FW_TYPE_WIPAN = 5
414};
415
416/* alive response ver_subtype values */
417enum {
418 FW_SUBTYPE_FULL_FEATURE = 0,
419 FW_SUBTYPE_BOOTSRAP = 1, /* Not valid */
420 FW_SUBTYPE_REDUCED = 2,
421 FW_SUBTYPE_ALIVE_ONLY = 3,
422 FW_SUBTYPE_WOWLAN = 4,
423 FW_SUBTYPE_AP_SUBTYPE = 5,
424 FW_SUBTYPE_WIPAN = 6,
425 FW_SUBTYPE_INITIALIZE = 9
426};
427
428#define IWL_ALIVE_STATUS_ERR 0xDEAD
429#define IWL_ALIVE_STATUS_OK 0xCAFE
430
431#define IWL_ALIVE_FLG_RFKILL BIT(0)
432
433struct mvm_alive_resp {
434 __le16 status;
435 __le16 flags;
436 u8 ucode_minor;
437 u8 ucode_major;
438 __le16 id;
439 u8 api_minor;
440 u8 api_major;
441 u8 ver_subtype;
442 u8 ver_type;
443 u8 mac;
444 u8 opt;
445 __le16 reserved2;
446 __le32 timestamp;
447 __le32 error_event_table_ptr; /* SRAM address for error log */
448 __le32 log_event_table_ptr; /* SRAM address for event log */
449 __le32 cpu_register_ptr;
450 __le32 dbgm_config_ptr;
451 __le32 alive_counter_ptr;
452 __le32 scd_base_ptr; /* SRAM address for SCD */
453} __packed; /* ALIVE_RES_API_S_VER_1 */
454
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455struct mvm_alive_resp_ver2 {
456 __le16 status;
457 __le16 flags;
458 u8 ucode_minor;
459 u8 ucode_major;
460 __le16 id;
461 u8 api_minor;
462 u8 api_major;
463 u8 ver_subtype;
464 u8 ver_type;
465 u8 mac;
466 u8 opt;
467 __le16 reserved2;
468 __le32 timestamp;
469 __le32 error_event_table_ptr; /* SRAM address for error log */
470 __le32 log_event_table_ptr; /* SRAM address for LMAC event log */
471 __le32 cpu_register_ptr;
472 __le32 dbgm_config_ptr;
473 __le32 alive_counter_ptr;
474 __le32 scd_base_ptr; /* SRAM address for SCD */
475 __le32 st_fwrd_addr; /* pointer to Store and forward */
476 __le32 st_fwrd_size;
477 u8 umac_minor; /* UMAC version: minor */
478 u8 umac_major; /* UMAC version: major */
479 __le16 umac_id; /* UMAC version: id */
480 __le32 error_info_addr; /* SRAM address for UMAC error log */
481 __le32 dbg_print_buff_addr;
482} __packed; /* ALIVE_RES_API_S_VER_2 */
483
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484/* Error response/notification */
485enum {
486 FW_ERR_UNKNOWN_CMD = 0x0,
487 FW_ERR_INVALID_CMD_PARAM = 0x1,
488 FW_ERR_SERVICE = 0x2,
489 FW_ERR_ARC_MEMORY = 0x3,
490 FW_ERR_ARC_CODE = 0x4,
491 FW_ERR_WATCH_DOG = 0x5,
492 FW_ERR_WEP_GRP_KEY_INDX = 0x10,
493 FW_ERR_WEP_KEY_SIZE = 0x11,
494 FW_ERR_OBSOLETE_FUNC = 0x12,
495 FW_ERR_UNEXPECTED = 0xFE,
496 FW_ERR_FATAL = 0xFF
497};
498
499/**
500 * struct iwl_error_resp - FW error indication
501 * ( REPLY_ERROR = 0x2 )
502 * @error_type: one of FW_ERR_*
503 * @cmd_id: the command ID for which the error occured
504 * @bad_cmd_seq_num: sequence number of the erroneous command
505 * @error_service: which service created the error, applicable only if
506 * error_type = 2, otherwise 0
507 * @timestamp: TSF in usecs.
508 */
509struct iwl_error_resp {
510 __le32 error_type;
511 u8 cmd_id;
512 u8 reserved1;
513 __le16 bad_cmd_seq_num;
514 __le32 error_service;
515 __le64 timestamp;
516} __packed;
517
518
519/* Common PHY, MAC and Bindings definitions */
520
521#define MAX_MACS_IN_BINDING (3)
522#define MAX_BINDINGS (4)
523#define AUX_BINDING_INDEX (3)
524#define MAX_PHYS (4)
525
526/* Used to extract ID and color from the context dword */
527#define FW_CTXT_ID_POS (0)
528#define FW_CTXT_ID_MSK (0xff << FW_CTXT_ID_POS)
529#define FW_CTXT_COLOR_POS (8)
530#define FW_CTXT_COLOR_MSK (0xff << FW_CTXT_COLOR_POS)
531#define FW_CTXT_INVALID (0xffffffff)
532
533#define FW_CMD_ID_AND_COLOR(_id, _color) ((_id << FW_CTXT_ID_POS) |\
534 (_color << FW_CTXT_COLOR_POS))
535
536/* Possible actions on PHYs, MACs and Bindings */
537enum {
538 FW_CTXT_ACTION_STUB = 0,
539 FW_CTXT_ACTION_ADD,
540 FW_CTXT_ACTION_MODIFY,
541 FW_CTXT_ACTION_REMOVE,
542 FW_CTXT_ACTION_NUM
543}; /* COMMON_CONTEXT_ACTION_API_E_VER_1 */
544
545/* Time Events */
546
547/* Time Event types, according to MAC type */
548enum iwl_time_event_type {
549 /* BSS Station Events */
550 TE_BSS_STA_AGGRESSIVE_ASSOC,
551 TE_BSS_STA_ASSOC,
552 TE_BSS_EAP_DHCP_PROT,
553 TE_BSS_QUIET_PERIOD,
554
555 /* P2P Device Events */
556 TE_P2P_DEVICE_DISCOVERABLE,
557 TE_P2P_DEVICE_LISTEN,
558 TE_P2P_DEVICE_ACTION_SCAN,
559 TE_P2P_DEVICE_FULL_SCAN,
560
561 /* P2P Client Events */
562 TE_P2P_CLIENT_AGGRESSIVE_ASSOC,
563 TE_P2P_CLIENT_ASSOC,
564 TE_P2P_CLIENT_QUIET_PERIOD,
565
566 /* P2P GO Events */
567 TE_P2P_GO_ASSOC_PROT,
568 TE_P2P_GO_REPETITIVE_NOA,
569 TE_P2P_GO_CT_WINDOW,
570
571 /* WiDi Sync Events */
572 TE_WIDI_TX_SYNC,
573
7f0a7c67 574 /* Channel Switch NoA */
f991e17b 575 TE_CHANNEL_SWITCH_PERIOD,
7f0a7c67 576
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577 TE_MAX
578}; /* MAC_EVENT_TYPE_API_E_VER_1 */
579
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580
581
582/* Time event - defines for command API v1 */
583
584/*
585 * @TE_V1_FRAG_NONE: fragmentation of the time event is NOT allowed.
586 * @TE_V1_FRAG_SINGLE: fragmentation of the time event is allowed, but only
587 * the first fragment is scheduled.
588 * @TE_V1_FRAG_DUAL: fragmentation of the time event is allowed, but only
589 * the first 2 fragments are scheduled.
590 * @TE_V1_FRAG_ENDLESS: fragmentation of the time event is allowed, and any
591 * number of fragments are valid.
592 *
593 * Other than the constant defined above, specifying a fragmentation value 'x'
594 * means that the event can be fragmented but only the first 'x' will be
595 * scheduled.
596 */
597enum {
598 TE_V1_FRAG_NONE = 0,
599 TE_V1_FRAG_SINGLE = 1,
600 TE_V1_FRAG_DUAL = 2,
601 TE_V1_FRAG_ENDLESS = 0xffffffff
602};
603
604/* If a Time Event can be fragmented, this is the max number of fragments */
605#define TE_V1_FRAG_MAX_MSK 0x0fffffff
606/* Repeat the time event endlessly (until removed) */
607#define TE_V1_REPEAT_ENDLESS 0xffffffff
608/* If a Time Event has bounded repetitions, this is the maximal value */
609#define TE_V1_REPEAT_MAX_MSK_V1 0x0fffffff
610
8ca151b5
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611/* Time Event dependencies: none, on another TE, or in a specific time */
612enum {
f8f03c3e
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613 TE_V1_INDEPENDENT = 0,
614 TE_V1_DEP_OTHER = BIT(0),
615 TE_V1_DEP_TSF = BIT(1),
616 TE_V1_EVENT_SOCIOPATHIC = BIT(2),
8ca151b5 617}; /* MAC_EVENT_DEPENDENCY_POLICY_API_E_VER_2 */
f8f03c3e 618
1da80e80 619/*
f8f03c3e
EL
620 * @TE_V1_NOTIF_NONE: no notifications
621 * @TE_V1_NOTIF_HOST_EVENT_START: request/receive notification on event start
622 * @TE_V1_NOTIF_HOST_EVENT_END:request/receive notification on event end
623 * @TE_V1_NOTIF_INTERNAL_EVENT_START: internal FW use
624 * @TE_V1_NOTIF_INTERNAL_EVENT_END: internal FW use.
625 * @TE_V1_NOTIF_HOST_FRAG_START: request/receive notification on frag start
626 * @TE_V1_NOTIF_HOST_FRAG_END:request/receive notification on frag end
627 * @TE_V1_NOTIF_INTERNAL_FRAG_START: internal FW use.
628 * @TE_V1_NOTIF_INTERNAL_FRAG_END: internal FW use.
629 *
1da80e80
IP
630 * Supported Time event notifications configuration.
631 * A notification (both event and fragment) includes a status indicating weather
632 * the FW was able to schedule the event or not. For fragment start/end
633 * notification the status is always success. There is no start/end fragment
634 * notification for monolithic events.
1da80e80 635 */
8ca151b5 636enum {
f8f03c3e
EL
637 TE_V1_NOTIF_NONE = 0,
638 TE_V1_NOTIF_HOST_EVENT_START = BIT(0),
639 TE_V1_NOTIF_HOST_EVENT_END = BIT(1),
640 TE_V1_NOTIF_INTERNAL_EVENT_START = BIT(2),
641 TE_V1_NOTIF_INTERNAL_EVENT_END = BIT(3),
642 TE_V1_NOTIF_HOST_FRAG_START = BIT(4),
643 TE_V1_NOTIF_HOST_FRAG_END = BIT(5),
644 TE_V1_NOTIF_INTERNAL_FRAG_START = BIT(6),
645 TE_V1_NOTIF_INTERNAL_FRAG_END = BIT(7),
1da80e80 646}; /* MAC_EVENT_ACTION_API_E_VER_2 */
8ca151b5 647
a373f67c 648/* Time event - defines for command API */
f8f03c3e 649
8ca151b5 650/*
f8f03c3e
EL
651 * @TE_V2_FRAG_NONE: fragmentation of the time event is NOT allowed.
652 * @TE_V2_FRAG_SINGLE: fragmentation of the time event is allowed, but only
8ca151b5 653 * the first fragment is scheduled.
f8f03c3e 654 * @TE_V2_FRAG_DUAL: fragmentation of the time event is allowed, but only
8ca151b5 655 * the first 2 fragments are scheduled.
f8f03c3e
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656 * @TE_V2_FRAG_ENDLESS: fragmentation of the time event is allowed, and any
657 * number of fragments are valid.
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658 *
659 * Other than the constant defined above, specifying a fragmentation value 'x'
660 * means that the event can be fragmented but only the first 'x' will be
661 * scheduled.
662 */
663enum {
f8f03c3e
EL
664 TE_V2_FRAG_NONE = 0,
665 TE_V2_FRAG_SINGLE = 1,
666 TE_V2_FRAG_DUAL = 2,
667 TE_V2_FRAG_MAX = 0xfe,
668 TE_V2_FRAG_ENDLESS = 0xff
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669};
670
671/* Repeat the time event endlessly (until removed) */
f8f03c3e 672#define TE_V2_REPEAT_ENDLESS 0xff
8ca151b5 673/* If a Time Event has bounded repetitions, this is the maximal value */
f8f03c3e
EL
674#define TE_V2_REPEAT_MAX 0xfe
675
676#define TE_V2_PLACEMENT_POS 12
677#define TE_V2_ABSENCE_POS 15
678
a373f67c 679/* Time event policy values
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680 * A notification (both event and fragment) includes a status indicating weather
681 * the FW was able to schedule the event or not. For fragment start/end
682 * notification the status is always success. There is no start/end fragment
683 * notification for monolithic events.
684 *
685 * @TE_V2_DEFAULT_POLICY: independent, social, present, unoticable
686 * @TE_V2_NOTIF_HOST_EVENT_START: request/receive notification on event start
687 * @TE_V2_NOTIF_HOST_EVENT_END:request/receive notification on event end
688 * @TE_V2_NOTIF_INTERNAL_EVENT_START: internal FW use
689 * @TE_V2_NOTIF_INTERNAL_EVENT_END: internal FW use.
690 * @TE_V2_NOTIF_HOST_FRAG_START: request/receive notification on frag start
691 * @TE_V2_NOTIF_HOST_FRAG_END:request/receive notification on frag end
692 * @TE_V2_NOTIF_INTERNAL_FRAG_START: internal FW use.
693 * @TE_V2_NOTIF_INTERNAL_FRAG_END: internal FW use.
694 * @TE_V2_DEP_OTHER: depends on another time event
695 * @TE_V2_DEP_TSF: depends on a specific time
696 * @TE_V2_EVENT_SOCIOPATHIC: can't co-exist with other events of tha same MAC
697 * @TE_V2_ABSENCE: are we present or absent during the Time Event.
698 */
699enum {
700 TE_V2_DEFAULT_POLICY = 0x0,
701
702 /* notifications (event start/stop, fragment start/stop) */
703 TE_V2_NOTIF_HOST_EVENT_START = BIT(0),
704 TE_V2_NOTIF_HOST_EVENT_END = BIT(1),
705 TE_V2_NOTIF_INTERNAL_EVENT_START = BIT(2),
706 TE_V2_NOTIF_INTERNAL_EVENT_END = BIT(3),
707
708 TE_V2_NOTIF_HOST_FRAG_START = BIT(4),
709 TE_V2_NOTIF_HOST_FRAG_END = BIT(5),
710 TE_V2_NOTIF_INTERNAL_FRAG_START = BIT(6),
711 TE_V2_NOTIF_INTERNAL_FRAG_END = BIT(7),
1f6bf078 712 T2_V2_START_IMMEDIATELY = BIT(11),
f8f03c3e
EL
713
714 TE_V2_NOTIF_MSK = 0xff,
715
716 /* placement characteristics */
717 TE_V2_DEP_OTHER = BIT(TE_V2_PLACEMENT_POS),
718 TE_V2_DEP_TSF = BIT(TE_V2_PLACEMENT_POS + 1),
719 TE_V2_EVENT_SOCIOPATHIC = BIT(TE_V2_PLACEMENT_POS + 2),
720
721 /* are we present or absent during the Time Event. */
722 TE_V2_ABSENCE = BIT(TE_V2_ABSENCE_POS),
723};
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724
725/**
a373f67c 726 * struct iwl_time_event_cmd_api - configuring Time Events
f8f03c3e
EL
727 * with struct MAC_TIME_EVENT_DATA_API_S_VER_2 (see also
728 * with version 1. determined by IWL_UCODE_TLV_FLAGS)
8ca151b5
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729 * ( TIME_EVENT_CMD = 0x29 )
730 * @id_and_color: ID and color of the relevant MAC
731 * @action: action to perform, one of FW_CTXT_ACTION_*
732 * @id: this field has two meanings, depending on the action:
733 * If the action is ADD, then it means the type of event to add.
734 * For all other actions it is the unique event ID assigned when the
735 * event was added by the FW.
736 * @apply_time: When to start the Time Event (in GP2)
737 * @max_delay: maximum delay to event's start (apply time), in TU
738 * @depends_on: the unique ID of the event we depend on (if any)
739 * @interval: interval between repetitions, in TU
8ca151b5
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740 * @duration: duration of event in TU
741 * @repeat: how many repetitions to do, can be TE_REPEAT_ENDLESS
8ca151b5 742 * @max_frags: maximal number of fragments the Time Event can be divided to
f8f03c3e
EL
743 * @policy: defines whether uCode shall notify the host or other uCode modules
744 * on event and/or fragment start and/or end
745 * using one of TE_INDEPENDENT, TE_DEP_OTHER, TE_DEP_TSF
746 * TE_EVENT_SOCIOPATHIC
747 * using TE_ABSENCE and using TE_NOTIF_*
8ca151b5 748 */
a373f67c 749struct iwl_time_event_cmd {
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750 /* COMMON_INDEX_HDR_API_S_VER_1 */
751 __le32 id_and_color;
752 __le32 action;
753 __le32 id;
f8f03c3e 754 /* MAC_TIME_EVENT_DATA_API_S_VER_2 */
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755 __le32 apply_time;
756 __le32 max_delay;
8ca151b5 757 __le32 depends_on;
8ca151b5 758 __le32 interval;
8ca151b5 759 __le32 duration;
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EL
760 u8 repeat;
761 u8 max_frags;
762 __le16 policy;
763} __packed; /* MAC_TIME_EVENT_CMD_API_S_VER_2 */
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764
765/**
766 * struct iwl_time_event_resp - response structure to iwl_time_event_cmd
767 * @status: bit 0 indicates success, all others specify errors
768 * @id: the Time Event type
769 * @unique_id: the unique ID assigned (in ADD) or given (others) to the TE
770 * @id_and_color: ID and color of the relevant MAC
771 */
772struct iwl_time_event_resp {
773 __le32 status;
774 __le32 id;
775 __le32 unique_id;
776 __le32 id_and_color;
777} __packed; /* MAC_TIME_EVENT_RSP_API_S_VER_1 */
778
779/**
780 * struct iwl_time_event_notif - notifications of time event start/stop
781 * ( TIME_EVENT_NOTIFICATION = 0x2a )
782 * @timestamp: action timestamp in GP2
783 * @session_id: session's unique id
784 * @unique_id: unique id of the Time Event itself
785 * @id_and_color: ID and color of the relevant MAC
786 * @action: one of TE_NOTIF_START or TE_NOTIF_END
787 * @status: true if scheduled, false otherwise (not executed)
788 */
789struct iwl_time_event_notif {
790 __le32 timestamp;
791 __le32 session_id;
792 __le32 unique_id;
793 __le32 id_and_color;
794 __le32 action;
795 __le32 status;
796} __packed; /* MAC_TIME_EVENT_NTFY_API_S_VER_1 */
797
798
799/* Bindings and Time Quota */
800
801/**
802 * struct iwl_binding_cmd - configuring bindings
803 * ( BINDING_CONTEXT_CMD = 0x2b )
804 * @id_and_color: ID and color of the relevant Binding
805 * @action: action to perform, one of FW_CTXT_ACTION_*
806 * @macs: array of MAC id and colors which belong to the binding
807 * @phy: PHY id and color which belongs to the binding
808 */
809struct iwl_binding_cmd {
810 /* COMMON_INDEX_HDR_API_S_VER_1 */
811 __le32 id_and_color;
812 __le32 action;
813 /* BINDING_DATA_API_S_VER_1 */
814 __le32 macs[MAX_MACS_IN_BINDING];
815 __le32 phy;
816} __packed; /* BINDING_CMD_API_S_VER_1 */
817
35adfd6e
IP
818/* The maximal number of fragments in the FW's schedule session */
819#define IWL_MVM_MAX_QUOTA 128
820
8ca151b5
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821/**
822 * struct iwl_time_quota_data - configuration of time quota per binding
823 * @id_and_color: ID and color of the relevant Binding
824 * @quota: absolute time quota in TU. The scheduler will try to divide the
825 * remainig quota (after Time Events) according to this quota.
826 * @max_duration: max uninterrupted context duration in TU
827 */
828struct iwl_time_quota_data {
829 __le32 id_and_color;
830 __le32 quota;
831 __le32 max_duration;
832} __packed; /* TIME_QUOTA_DATA_API_S_VER_1 */
833
834/**
835 * struct iwl_time_quota_cmd - configuration of time quota between bindings
836 * ( TIME_QUOTA_CMD = 0x2c )
837 * @quotas: allocations per binding
838 */
839struct iwl_time_quota_cmd {
840 struct iwl_time_quota_data quotas[MAX_BINDINGS];
841} __packed; /* TIME_QUOTA_ALLOCATION_CMD_API_S_VER_1 */
842
843
844/* PHY context */
845
846/* Supported bands */
847#define PHY_BAND_5 (0)
848#define PHY_BAND_24 (1)
849
850/* Supported channel width, vary if there is VHT support */
851#define PHY_VHT_CHANNEL_MODE20 (0x0)
852#define PHY_VHT_CHANNEL_MODE40 (0x1)
853#define PHY_VHT_CHANNEL_MODE80 (0x2)
854#define PHY_VHT_CHANNEL_MODE160 (0x3)
855
856/*
857 * Control channel position:
858 * For legacy set bit means upper channel, otherwise lower.
859 * For VHT - bit-2 marks if the control is lower/upper relative to center-freq
860 * bits-1:0 mark the distance from the center freq. for 20Mhz, offset is 0.
861 * center_freq
862 * |
863 * 40Mhz |_______|_______|
864 * 80Mhz |_______|_______|_______|_______|
865 * 160Mhz |_______|_______|_______|_______|_______|_______|_______|_______|
866 * code 011 010 001 000 | 100 101 110 111
867 */
868#define PHY_VHT_CTRL_POS_1_BELOW (0x0)
869#define PHY_VHT_CTRL_POS_2_BELOW (0x1)
870#define PHY_VHT_CTRL_POS_3_BELOW (0x2)
871#define PHY_VHT_CTRL_POS_4_BELOW (0x3)
872#define PHY_VHT_CTRL_POS_1_ABOVE (0x4)
873#define PHY_VHT_CTRL_POS_2_ABOVE (0x5)
874#define PHY_VHT_CTRL_POS_3_ABOVE (0x6)
875#define PHY_VHT_CTRL_POS_4_ABOVE (0x7)
876
877/*
878 * @band: PHY_BAND_*
879 * @channel: channel number
880 * @width: PHY_[VHT|LEGACY]_CHANNEL_*
881 * @ctrl channel: PHY_[VHT|LEGACY]_CTRL_*
882 */
883struct iwl_fw_channel_info {
884 u8 band;
885 u8 channel;
886 u8 width;
887 u8 ctrl_pos;
888} __packed;
889
890#define PHY_RX_CHAIN_DRIVER_FORCE_POS (0)
891#define PHY_RX_CHAIN_DRIVER_FORCE_MSK \
892 (0x1 << PHY_RX_CHAIN_DRIVER_FORCE_POS)
893#define PHY_RX_CHAIN_VALID_POS (1)
894#define PHY_RX_CHAIN_VALID_MSK \
895 (0x7 << PHY_RX_CHAIN_VALID_POS)
896#define PHY_RX_CHAIN_FORCE_SEL_POS (4)
897#define PHY_RX_CHAIN_FORCE_SEL_MSK \
898 (0x7 << PHY_RX_CHAIN_FORCE_SEL_POS)
899#define PHY_RX_CHAIN_FORCE_MIMO_SEL_POS (7)
900#define PHY_RX_CHAIN_FORCE_MIMO_SEL_MSK \
901 (0x7 << PHY_RX_CHAIN_FORCE_MIMO_SEL_POS)
902#define PHY_RX_CHAIN_CNT_POS (10)
903#define PHY_RX_CHAIN_CNT_MSK \
904 (0x3 << PHY_RX_CHAIN_CNT_POS)
905#define PHY_RX_CHAIN_MIMO_CNT_POS (12)
906#define PHY_RX_CHAIN_MIMO_CNT_MSK \
907 (0x3 << PHY_RX_CHAIN_MIMO_CNT_POS)
908#define PHY_RX_CHAIN_MIMO_FORCE_POS (14)
909#define PHY_RX_CHAIN_MIMO_FORCE_MSK \
910 (0x1 << PHY_RX_CHAIN_MIMO_FORCE_POS)
911
912/* TODO: fix the value, make it depend on firmware at runtime? */
913#define NUM_PHY_CTX 3
914
915/* TODO: complete missing documentation */
916/**
917 * struct iwl_phy_context_cmd - config of the PHY context
918 * ( PHY_CONTEXT_CMD = 0x8 )
919 * @id_and_color: ID and color of the relevant Binding
920 * @action: action to perform, one of FW_CTXT_ACTION_*
921 * @apply_time: 0 means immediate apply and context switch.
922 * other value means apply new params after X usecs
923 * @tx_param_color: ???
924 * @channel_info:
925 * @txchain_info: ???
926 * @rxchain_info: ???
927 * @acquisition_data: ???
928 * @dsp_cfg_flags: set to 0
929 */
930struct iwl_phy_context_cmd {
931 /* COMMON_INDEX_HDR_API_S_VER_1 */
932 __le32 id_and_color;
933 __le32 action;
934 /* PHY_CONTEXT_DATA_API_S_VER_1 */
935 __le32 apply_time;
936 __le32 tx_param_color;
937 struct iwl_fw_channel_info ci;
938 __le32 txchain_info;
939 __le32 rxchain_info;
940 __le32 acquisition_data;
941 __le32 dsp_cfg_flags;
942} __packed; /* PHY_CONTEXT_CMD_API_VER_1 */
943
720befbf
AM
944/*
945 * Aux ROC command
946 *
947 * Command requests the firmware to create a time event for a certain duration
948 * and remain on the given channel. This is done by using the Aux framework in
949 * the FW.
950 * The command was first used for Hot Spot issues - but can be used regardless
951 * to Hot Spot.
952 *
953 * ( HOT_SPOT_CMD 0x53 )
954 *
955 * @id_and_color: ID and color of the MAC
956 * @action: action to perform, one of FW_CTXT_ACTION_*
957 * @event_unique_id: If the action FW_CTXT_ACTION_REMOVE then the
958 * event_unique_id should be the id of the time event assigned by ucode.
959 * Otherwise ignore the event_unique_id.
960 * @sta_id_and_color: station id and color, resumed during "Remain On Channel"
961 * activity.
962 * @channel_info: channel info
963 * @node_addr: Our MAC Address
964 * @reserved: reserved for alignment
965 * @apply_time: GP2 value to start (should always be the current GP2 value)
966 * @apply_time_max_delay: Maximum apply time delay value in TU. Defines max
967 * time by which start of the event is allowed to be postponed.
968 * @duration: event duration in TU To calculate event duration:
969 * timeEventDuration = min(duration, remainingQuota)
970 */
971struct iwl_hs20_roc_req {
972 /* COMMON_INDEX_HDR_API_S_VER_1 hdr */
973 __le32 id_and_color;
974 __le32 action;
975 __le32 event_unique_id;
976 __le32 sta_id_and_color;
977 struct iwl_fw_channel_info channel_info;
978 u8 node_addr[ETH_ALEN];
979 __le16 reserved;
980 __le32 apply_time;
981 __le32 apply_time_max_delay;
982 __le32 duration;
983} __packed; /* HOT_SPOT_CMD_API_S_VER_1 */
984
985/*
986 * values for AUX ROC result values
987 */
988enum iwl_mvm_hot_spot {
989 HOT_SPOT_RSP_STATUS_OK,
990 HOT_SPOT_RSP_STATUS_TOO_MANY_EVENTS,
991 HOT_SPOT_MAX_NUM_OF_SESSIONS,
992};
993
994/*
995 * Aux ROC command response
996 *
997 * In response to iwl_hs20_roc_req the FW sends this command to notify the
998 * driver the uid of the timevent.
999 *
1000 * ( HOT_SPOT_CMD 0x53 )
1001 *
1002 * @event_unique_id: Unique ID of time event assigned by ucode
1003 * @status: Return status 0 is success, all the rest used for specific errors
1004 */
1005struct iwl_hs20_roc_res {
1006 __le32 event_unique_id;
1007 __le32 status;
1008} __packed; /* HOT_SPOT_RSP_API_S_VER_1 */
1009
8ca151b5 1010#define IWL_RX_INFO_PHY_CNT 8
a2d7b870
AA
1011#define IWL_RX_INFO_ENERGY_ANT_ABC_IDX 1
1012#define IWL_RX_INFO_ENERGY_ANT_A_MSK 0x000000ff
1013#define IWL_RX_INFO_ENERGY_ANT_B_MSK 0x0000ff00
1014#define IWL_RX_INFO_ENERGY_ANT_C_MSK 0x00ff0000
1015#define IWL_RX_INFO_ENERGY_ANT_A_POS 0
1016#define IWL_RX_INFO_ENERGY_ANT_B_POS 8
1017#define IWL_RX_INFO_ENERGY_ANT_C_POS 16
1018
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JB
1019#define IWL_RX_INFO_AGC_IDX 1
1020#define IWL_RX_INFO_RSSI_AB_IDX 2
8101a7f0
EG
1021#define IWL_OFDM_AGC_A_MSK 0x0000007f
1022#define IWL_OFDM_AGC_A_POS 0
1023#define IWL_OFDM_AGC_B_MSK 0x00003f80
1024#define IWL_OFDM_AGC_B_POS 7
1025#define IWL_OFDM_AGC_CODE_MSK 0x3fe00000
1026#define IWL_OFDM_AGC_CODE_POS 20
8ca151b5 1027#define IWL_OFDM_RSSI_INBAND_A_MSK 0x00ff
8ca151b5 1028#define IWL_OFDM_RSSI_A_POS 0
8101a7f0
EG
1029#define IWL_OFDM_RSSI_ALLBAND_A_MSK 0xff00
1030#define IWL_OFDM_RSSI_ALLBAND_A_POS 8
8ca151b5 1031#define IWL_OFDM_RSSI_INBAND_B_MSK 0xff0000
8ca151b5 1032#define IWL_OFDM_RSSI_B_POS 16
8101a7f0
EG
1033#define IWL_OFDM_RSSI_ALLBAND_B_MSK 0xff000000
1034#define IWL_OFDM_RSSI_ALLBAND_B_POS 24
8ca151b5
JB
1035
1036/**
1037 * struct iwl_rx_phy_info - phy info
1038 * (REPLY_RX_PHY_CMD = 0xc0)
1039 * @non_cfg_phy_cnt: non configurable DSP phy data byte count
1040 * @cfg_phy_cnt: configurable DSP phy data byte count
1041 * @stat_id: configurable DSP phy data set ID
1042 * @reserved1:
1043 * @system_timestamp: GP2 at on air rise
1044 * @timestamp: TSF at on air rise
1045 * @beacon_time_stamp: beacon at on-air rise
1046 * @phy_flags: general phy flags: band, modulation, ...
1047 * @channel: channel number
1048 * @non_cfg_phy_buf: for various implementations of non_cfg_phy
1049 * @rate_n_flags: RATE_MCS_*
1050 * @byte_count: frame's byte-count
1051 * @frame_time: frame's time on the air, based on byte count and frame rate
1052 * calculation
6bfcb7e8 1053 * @mac_active_msk: what MACs were active when the frame was received
8ca151b5
JB
1054 *
1055 * Before each Rx, the device sends this data. It contains PHY information
1056 * about the reception of the packet.
1057 */
1058struct iwl_rx_phy_info {
1059 u8 non_cfg_phy_cnt;
1060 u8 cfg_phy_cnt;
1061 u8 stat_id;
1062 u8 reserved1;
1063 __le32 system_timestamp;
1064 __le64 timestamp;
1065 __le32 beacon_time_stamp;
1066 __le16 phy_flags;
1067 __le16 channel;
1068 __le32 non_cfg_phy[IWL_RX_INFO_PHY_CNT];
1069 __le32 rate_n_flags;
1070 __le32 byte_count;
6bfcb7e8 1071 __le16 mac_active_msk;
8ca151b5
JB
1072 __le16 frame_time;
1073} __packed;
1074
1075struct iwl_rx_mpdu_res_start {
1076 __le16 byte_count;
1077 __le16 reserved;
1078} __packed;
1079
1080/**
1081 * enum iwl_rx_phy_flags - to parse %iwl_rx_phy_info phy_flags
1082 * @RX_RES_PHY_FLAGS_BAND_24: true if the packet was received on 2.4 band
1083 * @RX_RES_PHY_FLAGS_MOD_CCK:
1084 * @RX_RES_PHY_FLAGS_SHORT_PREAMBLE: true if packet's preamble was short
1085 * @RX_RES_PHY_FLAGS_NARROW_BAND:
1086 * @RX_RES_PHY_FLAGS_ANTENNA: antenna on which the packet was received
1087 * @RX_RES_PHY_FLAGS_AGG: set if the packet was part of an A-MPDU
1088 * @RX_RES_PHY_FLAGS_OFDM_HT: The frame was an HT frame
1089 * @RX_RES_PHY_FLAGS_OFDM_GF: The frame used GF preamble
1090 * @RX_RES_PHY_FLAGS_OFDM_VHT: The frame was a VHT frame
1091 */
1092enum iwl_rx_phy_flags {
1093 RX_RES_PHY_FLAGS_BAND_24 = BIT(0),
1094 RX_RES_PHY_FLAGS_MOD_CCK = BIT(1),
1095 RX_RES_PHY_FLAGS_SHORT_PREAMBLE = BIT(2),
1096 RX_RES_PHY_FLAGS_NARROW_BAND = BIT(3),
1097 RX_RES_PHY_FLAGS_ANTENNA = (0x7 << 4),
1098 RX_RES_PHY_FLAGS_ANTENNA_POS = 4,
1099 RX_RES_PHY_FLAGS_AGG = BIT(7),
1100 RX_RES_PHY_FLAGS_OFDM_HT = BIT(8),
1101 RX_RES_PHY_FLAGS_OFDM_GF = BIT(9),
1102 RX_RES_PHY_FLAGS_OFDM_VHT = BIT(10),
1103};
1104
1105/**
1106 * enum iwl_mvm_rx_status - written by fw for each Rx packet
1107 * @RX_MPDU_RES_STATUS_CRC_OK: CRC is fine
1108 * @RX_MPDU_RES_STATUS_OVERRUN_OK: there was no RXE overflow
1109 * @RX_MPDU_RES_STATUS_SRC_STA_FOUND:
1110 * @RX_MPDU_RES_STATUS_KEY_VALID:
1111 * @RX_MPDU_RES_STATUS_KEY_PARAM_OK:
1112 * @RX_MPDU_RES_STATUS_ICV_OK: ICV is fine, if not, the packet is destroyed
1113 * @RX_MPDU_RES_STATUS_MIC_OK: used for CCM alg only. TKIP MIC is checked
1114 * in the driver.
1115 * @RX_MPDU_RES_STATUS_TTAK_OK: TTAK is fine
1116 * @RX_MPDU_RES_STATUS_MNG_FRAME_REPLAY_ERR: valid for alg = CCM_CMAC or
1117 * alg = CCM only. Checks replay attack for 11w frames. Relevant only if
1118 * %RX_MPDU_RES_STATUS_ROBUST_MNG_FRAME is set.
1119 * @RX_MPDU_RES_STATUS_SEC_NO_ENC: this frame is not encrypted
1120 * @RX_MPDU_RES_STATUS_SEC_WEP_ENC: this frame is encrypted using WEP
1121 * @RX_MPDU_RES_STATUS_SEC_CCM_ENC: this frame is encrypted using CCM
1122 * @RX_MPDU_RES_STATUS_SEC_TKIP_ENC: this frame is encrypted using TKIP
1123 * @RX_MPDU_RES_STATUS_SEC_CCM_CMAC_ENC: this frame is encrypted using CCM_CMAC
1124 * @RX_MPDU_RES_STATUS_SEC_ENC_ERR: this frame couldn't be decrypted
1125 * @RX_MPDU_RES_STATUS_SEC_ENC_MSK: bitmask of the encryption algorithm
1126 * @RX_MPDU_RES_STATUS_DEC_DONE: this frame has been successfully decrypted
1127 * @RX_MPDU_RES_STATUS_PROTECT_FRAME_BIT_CMP:
1128 * @RX_MPDU_RES_STATUS_EXT_IV_BIT_CMP:
1129 * @RX_MPDU_RES_STATUS_KEY_ID_CMP_BIT:
1130 * @RX_MPDU_RES_STATUS_ROBUST_MNG_FRAME: this frame is an 11w management frame
1131 * @RX_MPDU_RES_STATUS_HASH_INDEX_MSK:
1132 * @RX_MPDU_RES_STATUS_STA_ID_MSK:
1133 * @RX_MPDU_RES_STATUS_RRF_KILL:
1134 * @RX_MPDU_RES_STATUS_FILTERING_MSK:
1135 * @RX_MPDU_RES_STATUS2_FILTERING_MSK:
1136 */
1137enum iwl_mvm_rx_status {
1138 RX_MPDU_RES_STATUS_CRC_OK = BIT(0),
1139 RX_MPDU_RES_STATUS_OVERRUN_OK = BIT(1),
1140 RX_MPDU_RES_STATUS_SRC_STA_FOUND = BIT(2),
1141 RX_MPDU_RES_STATUS_KEY_VALID = BIT(3),
1142 RX_MPDU_RES_STATUS_KEY_PARAM_OK = BIT(4),
1143 RX_MPDU_RES_STATUS_ICV_OK = BIT(5),
1144 RX_MPDU_RES_STATUS_MIC_OK = BIT(6),
1145 RX_MPDU_RES_STATUS_TTAK_OK = BIT(7),
1146 RX_MPDU_RES_STATUS_MNG_FRAME_REPLAY_ERR = BIT(7),
1147 RX_MPDU_RES_STATUS_SEC_NO_ENC = (0 << 8),
1148 RX_MPDU_RES_STATUS_SEC_WEP_ENC = (1 << 8),
1149 RX_MPDU_RES_STATUS_SEC_CCM_ENC = (2 << 8),
1150 RX_MPDU_RES_STATUS_SEC_TKIP_ENC = (3 << 8),
e36e5433 1151 RX_MPDU_RES_STATUS_SEC_EXT_ENC = (4 << 8),
8ca151b5
JB
1152 RX_MPDU_RES_STATUS_SEC_CCM_CMAC_ENC = (6 << 8),
1153 RX_MPDU_RES_STATUS_SEC_ENC_ERR = (7 << 8),
1154 RX_MPDU_RES_STATUS_SEC_ENC_MSK = (7 << 8),
1155 RX_MPDU_RES_STATUS_DEC_DONE = BIT(11),
1156 RX_MPDU_RES_STATUS_PROTECT_FRAME_BIT_CMP = BIT(12),
1157 RX_MPDU_RES_STATUS_EXT_IV_BIT_CMP = BIT(13),
1158 RX_MPDU_RES_STATUS_KEY_ID_CMP_BIT = BIT(14),
1159 RX_MPDU_RES_STATUS_ROBUST_MNG_FRAME = BIT(15),
1160 RX_MPDU_RES_STATUS_HASH_INDEX_MSK = (0x3F0000),
1161 RX_MPDU_RES_STATUS_STA_ID_MSK = (0x1f000000),
1162 RX_MPDU_RES_STATUS_RRF_KILL = BIT(29),
1163 RX_MPDU_RES_STATUS_FILTERING_MSK = (0xc00000),
1164 RX_MPDU_RES_STATUS2_FILTERING_MSK = (0xc0000000),
1165};
1166
1167/**
1168 * struct iwl_radio_version_notif - information on the radio version
1169 * ( RADIO_VERSION_NOTIFICATION = 0x68 )
1170 * @radio_flavor:
1171 * @radio_step:
1172 * @radio_dash:
1173 */
1174struct iwl_radio_version_notif {
1175 __le32 radio_flavor;
1176 __le32 radio_step;
1177 __le32 radio_dash;
1178} __packed; /* RADIO_VERSION_NOTOFICATION_S_VER_1 */
1179
1180enum iwl_card_state_flags {
1181 CARD_ENABLED = 0x00,
1182 HW_CARD_DISABLED = 0x01,
1183 SW_CARD_DISABLED = 0x02,
1184 CT_KILL_CARD_DISABLED = 0x04,
1185 HALT_CARD_DISABLED = 0x08,
1186 CARD_DISABLED_MSK = 0x0f,
1187 CARD_IS_RX_ON = 0x10,
1188};
1189
1190/**
1191 * struct iwl_radio_version_notif - information on the radio version
1192 * ( CARD_STATE_NOTIFICATION = 0xa1 )
1193 * @flags: %iwl_card_state_flags
1194 */
1195struct iwl_card_state_notif {
1196 __le32 flags;
1197} __packed; /* CARD_STATE_NTFY_API_S_VER_1 */
1198
d64048ed
HG
1199/**
1200 * struct iwl_missed_beacons_notif - information on missed beacons
1201 * ( MISSED_BEACONS_NOTIFICATION = 0xa2 )
1202 * @mac_id: interface ID
1203 * @consec_missed_beacons_since_last_rx: number of consecutive missed
1204 * beacons since last RX.
1205 * @consec_missed_beacons: number of consecutive missed beacons
1206 * @num_expected_beacons:
1207 * @num_recvd_beacons:
1208 */
1209struct iwl_missed_beacons_notif {
1210 __le32 mac_id;
1211 __le32 consec_missed_beacons_since_last_rx;
1212 __le32 consec_missed_beacons;
1213 __le32 num_expected_beacons;
1214 __le32 num_recvd_beacons;
1215} __packed; /* MISSED_BEACON_NTFY_API_S_VER_3 */
1216
30269c12
CRI
1217/**
1218 * struct iwl_mfuart_load_notif - mfuart image version & status
1219 * ( MFUART_LOAD_NOTIFICATION = 0xb1 )
1220 * @installed_ver: installed image version
1221 * @external_ver: external image version
1222 * @status: MFUART loading status
1223 * @duration: MFUART loading time
1224*/
1225struct iwl_mfuart_load_notif {
1226 __le32 installed_ver;
1227 __le32 external_ver;
1228 __le32 status;
1229 __le32 duration;
1230} __packed; /*MFU_LOADER_NTFY_API_S_VER_1*/
1231
8ca151b5
JB
1232/**
1233 * struct iwl_set_calib_default_cmd - set default value for calibration.
1234 * ( SET_CALIB_DEFAULT_CMD = 0x8e )
1235 * @calib_index: the calibration to set value for
1236 * @length: of data
1237 * @data: the value to set for the calibration result
1238 */
1239struct iwl_set_calib_default_cmd {
1240 __le16 calib_index;
1241 __le16 length;
1242 u8 data[0];
1243} __packed; /* PHY_CALIB_OVERRIDE_VALUES_S */
1244
51b6b9e0 1245#define MAX_PORT_ID_NUM 2
e59647ea 1246#define MAX_MCAST_FILTERING_ADDRESSES 256
51b6b9e0
EG
1247
1248/**
1249 * struct iwl_mcast_filter_cmd - configure multicast filter.
1250 * @filter_own: Set 1 to filter out multicast packets sent by station itself
1251 * @port_id: Multicast MAC addresses array specifier. This is a strange way
1252 * to identify network interface adopted in host-device IF.
1253 * It is used by FW as index in array of addresses. This array has
1254 * MAX_PORT_ID_NUM members.
1255 * @count: Number of MAC addresses in the array
1256 * @pass_all: Set 1 to pass all multicast packets.
1257 * @bssid: current association BSSID.
1258 * @addr_list: Place holder for array of MAC addresses.
1259 * IMPORTANT: add padding if necessary to ensure DWORD alignment.
1260 */
1261struct iwl_mcast_filter_cmd {
1262 u8 filter_own;
1263 u8 port_id;
1264 u8 count;
1265 u8 pass_all;
1266 u8 bssid[6];
1267 u8 reserved[2];
1268 u8 addr_list[0];
1269} __packed; /* MCAST_FILTERING_CMD_API_S_VER_1 */
1270
c87163b9
EP
1271#define MAX_BCAST_FILTERS 8
1272#define MAX_BCAST_FILTER_ATTRS 2
1273
1274/**
1275 * enum iwl_mvm_bcast_filter_attr_offset - written by fw for each Rx packet
1276 * @BCAST_FILTER_OFFSET_PAYLOAD_START: offset is from payload start.
1277 * @BCAST_FILTER_OFFSET_IP_END: offset is from ip header end (i.e.
1278 * start of ip payload).
1279 */
1280enum iwl_mvm_bcast_filter_attr_offset {
1281 BCAST_FILTER_OFFSET_PAYLOAD_START = 0,
1282 BCAST_FILTER_OFFSET_IP_END = 1,
1283};
1284
1285/**
1286 * struct iwl_fw_bcast_filter_attr - broadcast filter attribute
1287 * @offset_type: &enum iwl_mvm_bcast_filter_attr_offset.
1288 * @offset: starting offset of this pattern.
1289 * @val: value to match - big endian (MSB is the first
1290 * byte to match from offset pos).
1291 * @mask: mask to match (big endian).
1292 */
1293struct iwl_fw_bcast_filter_attr {
1294 u8 offset_type;
1295 u8 offset;
1296 __le16 reserved1;
1297 __be32 val;
1298 __be32 mask;
1299} __packed; /* BCAST_FILTER_ATT_S_VER_1 */
1300
1301/**
1302 * enum iwl_mvm_bcast_filter_frame_type - filter frame type
1303 * @BCAST_FILTER_FRAME_TYPE_ALL: consider all frames.
1304 * @BCAST_FILTER_FRAME_TYPE_IPV4: consider only ipv4 frames
1305 */
1306enum iwl_mvm_bcast_filter_frame_type {
1307 BCAST_FILTER_FRAME_TYPE_ALL = 0,
1308 BCAST_FILTER_FRAME_TYPE_IPV4 = 1,
1309};
1310
1311/**
1312 * struct iwl_fw_bcast_filter - broadcast filter
1313 * @discard: discard frame (1) or let it pass (0).
1314 * @frame_type: &enum iwl_mvm_bcast_filter_frame_type.
1315 * @num_attrs: number of valid attributes in this filter.
1316 * @attrs: attributes of this filter. a filter is considered matched
1317 * only when all its attributes are matched (i.e. AND relationship)
1318 */
1319struct iwl_fw_bcast_filter {
1320 u8 discard;
1321 u8 frame_type;
1322 u8 num_attrs;
1323 u8 reserved1;
1324 struct iwl_fw_bcast_filter_attr attrs[MAX_BCAST_FILTER_ATTRS];
1325} __packed; /* BCAST_FILTER_S_VER_1 */
1326
1327/**
1328 * struct iwl_fw_bcast_mac - per-mac broadcast filtering configuration.
1329 * @default_discard: default action for this mac (discard (1) / pass (0)).
1330 * @attached_filters: bitmap of relevant filters for this mac.
1331 */
1332struct iwl_fw_bcast_mac {
1333 u8 default_discard;
1334 u8 reserved1;
1335 __le16 attached_filters;
1336} __packed; /* BCAST_MAC_CONTEXT_S_VER_1 */
1337
1338/**
1339 * struct iwl_bcast_filter_cmd - broadcast filtering configuration
1340 * @disable: enable (0) / disable (1)
1341 * @max_bcast_filters: max number of filters (MAX_BCAST_FILTERS)
1342 * @max_macs: max number of macs (NUM_MAC_INDEX_DRIVER)
1343 * @filters: broadcast filters
1344 * @macs: broadcast filtering configuration per-mac
1345 */
1346struct iwl_bcast_filter_cmd {
1347 u8 disable;
1348 u8 max_bcast_filters;
1349 u8 max_macs;
1350 u8 reserved1;
1351 struct iwl_fw_bcast_filter filters[MAX_BCAST_FILTERS];
1352 struct iwl_fw_bcast_mac macs[NUM_MAC_INDEX_DRIVER];
1353} __packed; /* BCAST_FILTERING_HCMD_API_S_VER_1 */
1354
a2d79c57
MG
1355/*
1356 * enum iwl_mvm_marker_id - maker ids
1357 *
1358 * The ids for different type of markers to insert into the usniffer logs
1359 */
1360enum iwl_mvm_marker_id {
1361 MARKER_ID_TX_FRAME_LATENCY = 1,
1362}; /* MARKER_ID_API_E_VER_1 */
1363
1364/**
1365 * struct iwl_mvm_marker - mark info into the usniffer logs
1366 *
1367 * (MARKER_CMD = 0xcb)
1368 *
1369 * Mark the UTC time stamp into the usniffer logs together with additional
1370 * metadata, so the usniffer output can be parsed.
1371 * In the command response the ucode will return the GP2 time.
1372 *
1373 * @dw_len: The amount of dwords following this byte including this byte.
1374 * @marker_id: A unique marker id (iwl_mvm_marker_id).
1375 * @reserved: reserved.
1376 * @timestamp: in milliseconds since 1970-01-01 00:00:00 UTC
1377 * @metadata: additional meta data that will be written to the unsiffer log
1378 */
1379struct iwl_mvm_marker {
1380 u8 dwLen;
1381 u8 markerId;
1382 __le16 reserved;
1383 __le64 timestamp;
1384 __le32 metadata[0];
1385} __packed; /* MARKER_API_S_VER_1 */
1386
9ee718aa
EL
1387struct mvm_statistics_dbg {
1388 __le32 burst_check;
1389 __le32 burst_count;
1390 __le32 wait_for_silence_timeout_cnt;
1391 __le32 reserved[3];
1392} __packed; /* STATISTICS_DEBUG_API_S_VER_2 */
1393
1394struct mvm_statistics_div {
1395 __le32 tx_on_a;
1396 __le32 tx_on_b;
1397 __le32 exec_time;
1398 __le32 probe_time;
1399 __le32 rssi_ant;
1400 __le32 reserved2;
1401} __packed; /* STATISTICS_SLOW_DIV_API_S_VER_2 */
1402
9ee718aa
EL
1403struct mvm_statistics_rx_non_phy {
1404 __le32 bogus_cts; /* CTS received when not expecting CTS */
1405 __le32 bogus_ack; /* ACK received when not expecting ACK */
1406 __le32 non_bssid_frames; /* number of frames with BSSID that
1407 * doesn't belong to the STA BSSID */
1408 __le32 filtered_frames; /* count frames that were dumped in the
1409 * filtering process */
1410 __le32 non_channel_beacons; /* beacons with our bss id but not on
1411 * our serving channel */
1412 __le32 channel_beacons; /* beacons with our bss id and in our
1413 * serving channel */
1414 __le32 num_missed_bcon; /* number of missed beacons */
1415 __le32 adc_rx_saturation_time; /* count in 0.8us units the time the
1416 * ADC was in saturation */
1417 __le32 ina_detection_search_time;/* total time (in 0.8us) searched
1418 * for INA */
1419 __le32 beacon_silence_rssi_a; /* RSSI silence after beacon frame */
1420 __le32 beacon_silence_rssi_b; /* RSSI silence after beacon frame */
1421 __le32 beacon_silence_rssi_c; /* RSSI silence after beacon frame */
1422 __le32 interference_data_flag; /* flag for interference data
1423 * availability. 1 when data is
1424 * available. */
1425 __le32 channel_load; /* counts RX Enable time in uSec */
1426 __le32 dsp_false_alarms; /* DSP false alarm (both OFDM
1427 * and CCK) counter */
1428 __le32 beacon_rssi_a;
1429 __le32 beacon_rssi_b;
1430 __le32 beacon_rssi_c;
1431 __le32 beacon_energy_a;
1432 __le32 beacon_energy_b;
1433 __le32 beacon_energy_c;
1434 __le32 num_bt_kills;
1435 __le32 mac_id;
1436 __le32 directed_data_mpdu;
1437} __packed; /* STATISTICS_RX_NON_PHY_API_S_VER_3 */
1438
1439struct mvm_statistics_rx_phy {
1440 __le32 ina_cnt;
1441 __le32 fina_cnt;
1442 __le32 plcp_err;
1443 __le32 crc32_err;
1444 __le32 overrun_err;
1445 __le32 early_overrun_err;
1446 __le32 crc32_good;
1447 __le32 false_alarm_cnt;
1448 __le32 fina_sync_err_cnt;
1449 __le32 sfd_timeout;
1450 __le32 fina_timeout;
1451 __le32 unresponded_rts;
1452 __le32 rxe_frame_limit_overrun;
1453 __le32 sent_ack_cnt;
1454 __le32 sent_cts_cnt;
1455 __le32 sent_ba_rsp_cnt;
1456 __le32 dsp_self_kill;
1457 __le32 mh_format_err;
1458 __le32 re_acq_main_rssi_sum;
1459 __le32 reserved;
1460} __packed; /* STATISTICS_RX_PHY_API_S_VER_2 */
1461
1462struct mvm_statistics_rx_ht_phy {
1463 __le32 plcp_err;
1464 __le32 overrun_err;
1465 __le32 early_overrun_err;
1466 __le32 crc32_good;
1467 __le32 crc32_err;
1468 __le32 mh_format_err;
1469 __le32 agg_crc32_good;
1470 __le32 agg_mpdu_cnt;
1471 __le32 agg_cnt;
1472 __le32 unsupport_mcs;
1473} __packed; /* STATISTICS_HT_RX_PHY_API_S_VER_1 */
1474
75e52472
JB
1475struct mvm_statistics_tx_non_phy {
1476 __le32 preamble_cnt;
1477 __le32 rx_detected_cnt;
1478 __le32 bt_prio_defer_cnt;
1479 __le32 bt_prio_kill_cnt;
1480 __le32 few_bytes_cnt;
1481 __le32 cts_timeout;
1482 __le32 ack_timeout;
1483 __le32 expected_ack_cnt;
1484 __le32 actual_ack_cnt;
1485 __le32 dump_msdu_cnt;
1486 __le32 burst_abort_next_frame_mismatch_cnt;
1487 __le32 burst_abort_missing_next_frame_cnt;
1488 __le32 cts_timeout_collision;
1489 __le32 ack_or_ba_timeout_collision;
1490} __packed; /* STATISTICS_TX_NON_PHY_API_S_VER_3 */
1491
9ee718aa
EL
1492#define MAX_CHAINS 3
1493
1494struct mvm_statistics_tx_non_phy_agg {
1495 __le32 ba_timeout;
1496 __le32 ba_reschedule_frames;
1497 __le32 scd_query_agg_frame_cnt;
1498 __le32 scd_query_no_agg;
1499 __le32 scd_query_agg;
1500 __le32 scd_query_mismatch;
1501 __le32 frame_not_ready;
1502 __le32 underrun;
1503 __le32 bt_prio_kill;
1504 __le32 rx_ba_rsp_cnt;
1505 __s8 txpower[MAX_CHAINS];
1506 __s8 reserved;
1507 __le32 reserved2;
1508} __packed; /* STATISTICS_TX_NON_PHY_AGG_API_S_VER_1 */
1509
1510struct mvm_statistics_tx_channel_width {
1511 __le32 ext_cca_narrow_ch20[1];
1512 __le32 ext_cca_narrow_ch40[2];
1513 __le32 ext_cca_narrow_ch80[3];
1514 __le32 ext_cca_narrow_ch160[4];
1515 __le32 last_tx_ch_width_indx;
1516 __le32 rx_detected_per_ch_width[4];
1517 __le32 success_per_ch_width[4];
1518 __le32 fail_per_ch_width[4];
1519}; /* STATISTICS_TX_CHANNEL_WIDTH_API_S_VER_1 */
1520
1521struct mvm_statistics_tx {
75e52472 1522 struct mvm_statistics_tx_non_phy general;
9ee718aa
EL
1523 struct mvm_statistics_tx_non_phy_agg agg;
1524 struct mvm_statistics_tx_channel_width channel_width;
1525} __packed; /* STATISTICS_TX_API_S_VER_4 */
1526
1527
1528struct mvm_statistics_bt_activity {
1529 __le32 hi_priority_tx_req_cnt;
1530 __le32 hi_priority_tx_denied_cnt;
1531 __le32 lo_priority_tx_req_cnt;
1532 __le32 lo_priority_tx_denied_cnt;
1533 __le32 hi_priority_rx_req_cnt;
1534 __le32 hi_priority_rx_denied_cnt;
1535 __le32 lo_priority_rx_req_cnt;
1536 __le32 lo_priority_rx_denied_cnt;
1537} __packed; /* STATISTICS_BT_ACTIVITY_API_S_VER_1 */
1538
1539struct mvm_statistics_general {
75e52472
JB
1540 __le32 radio_temperature;
1541 __le32 radio_voltage;
1542 struct mvm_statistics_dbg dbg;
1543 __le32 sleep_time;
1544 __le32 slots_out;
1545 __le32 slots_idle;
1546 __le32 ttl_timestamp;
1547 struct mvm_statistics_div slow_div;
1548 __le32 rx_enable_counter;
1549 /*
1550 * num_of_sos_states:
1551 * count the number of times we have to re-tune
1552 * in order to get out of bad PHY status
1553 */
1554 __le32 num_of_sos_states;
9ee718aa
EL
1555 __le32 beacon_filtered;
1556 __le32 missed_beacons;
a20fd398 1557 __s8 beacon_filter_average_energy;
9ee718aa
EL
1558 __s8 beacon_filter_reason;
1559 __s8 beacon_filter_current_energy;
1560 __s8 beacon_filter_reserved;
1561 __le32 beacon_filter_delta_time;
1562 struct mvm_statistics_bt_activity bt_activity;
1563} __packed; /* STATISTICS_GENERAL_API_S_VER_5 */
1564
1565struct mvm_statistics_rx {
1566 struct mvm_statistics_rx_phy ofdm;
1567 struct mvm_statistics_rx_phy cck;
1568 struct mvm_statistics_rx_non_phy general;
1569 struct mvm_statistics_rx_ht_phy ofdm_ht;
1570} __packed; /* STATISTICS_RX_API_S_VER_3 */
1571
1572/*
1573 * STATISTICS_NOTIFICATION = 0x9d (notification only, not a command)
1574 *
1575 * By default, uCode issues this notification after receiving a beacon
1576 * while associated. To disable this behavior, set DISABLE_NOTIF flag in the
1577 * REPLY_STATISTICS_CMD 0x9c, above.
1578 *
1579 * Statistics counters continue to increment beacon after beacon, but are
1580 * cleared when changing channels or when driver issues REPLY_STATISTICS_CMD
1581 * 0x9c with CLEAR_STATS bit set (see above).
1582 *
1583 * uCode also issues this notification during scans. uCode clears statistics
1584 * appropriately so that each notification contains statistics for only the
1585 * one channel that has just been scanned.
1586 */
1587
75e52472 1588struct iwl_notif_statistics {
9ee718aa
EL
1589 __le32 flag;
1590 struct mvm_statistics_rx rx;
1591 struct mvm_statistics_tx tx;
1592 struct mvm_statistics_general general;
75e52472 1593} __packed; /* STATISTICS_NTFY_API_S_VER_8 */
9ee718aa 1594
1f3b0ff8
LE
1595/***********************************
1596 * Smart Fifo API
1597 ***********************************/
1598/* Smart Fifo state */
1599enum iwl_sf_state {
1600 SF_LONG_DELAY_ON = 0, /* should never be called by driver */
1601 SF_FULL_ON,
1602 SF_UNINIT,
1603 SF_INIT_OFF,
1604 SF_HW_NUM_STATES
1605};
1606
1607/* Smart Fifo possible scenario */
1608enum iwl_sf_scenario {
1609 SF_SCENARIO_SINGLE_UNICAST,
1610 SF_SCENARIO_AGG_UNICAST,
1611 SF_SCENARIO_MULTICAST,
1612 SF_SCENARIO_BA_RESP,
1613 SF_SCENARIO_TX_RESP,
1614 SF_NUM_SCENARIO
1615};
1616
1617#define SF_TRANSIENT_STATES_NUMBER 2 /* SF_LONG_DELAY_ON and SF_FULL_ON */
1618#define SF_NUM_TIMEOUT_TYPES 2 /* Aging timer and Idle timer */
1619
1620/* smart FIFO default values */
b4c82adc 1621#define SF_W_MARK_SISO 6144
1f3b0ff8
LE
1622#define SF_W_MARK_MIMO2 8192
1623#define SF_W_MARK_MIMO3 6144
1624#define SF_W_MARK_LEGACY 4096
1625#define SF_W_MARK_SCAN 4096
1626
1627/* SF Scenarios timers for FULL_ON state (aligned to 32 uSec) */
1628#define SF_SINGLE_UNICAST_IDLE_TIMER 320 /* 300 uSec */
1629#define SF_SINGLE_UNICAST_AGING_TIMER 2016 /* 2 mSec */
1630#define SF_AGG_UNICAST_IDLE_TIMER 320 /* 300 uSec */
1631#define SF_AGG_UNICAST_AGING_TIMER 2016 /* 2 mSec */
1632#define SF_MCAST_IDLE_TIMER 2016 /* 2 mSec */
1633#define SF_MCAST_AGING_TIMER 10016 /* 10 mSec */
1634#define SF_BA_IDLE_TIMER 320 /* 300 uSec */
1635#define SF_BA_AGING_TIMER 2016 /* 2 mSec */
1636#define SF_TX_RE_IDLE_TIMER 320 /* 300 uSec */
1637#define SF_TX_RE_AGING_TIMER 2016 /* 2 mSec */
1638
1639#define SF_LONG_DELAY_AGING_TIMER 1000000 /* 1 Sec */
1640
161bdb77
EH
1641#define SF_CFG_DUMMY_NOTIF_OFF BIT(16)
1642
1f3b0ff8
LE
1643/**
1644 * Smart Fifo configuration command.
86974bff 1645 * @state: smart fifo state, types listed in enum %iwl_sf_sate.
1f3b0ff8
LE
1646 * @watermark: Minimum allowed availabe free space in RXF for transient state.
1647 * @long_delay_timeouts: aging and idle timer values for each scenario
1648 * in long delay state.
1649 * @full_on_timeouts: timer values for each scenario in full on state.
1650 */
1651struct iwl_sf_cfg_cmd {
86974bff 1652 __le32 state;
1f3b0ff8
LE
1653 __le32 watermark[SF_TRANSIENT_STATES_NUMBER];
1654 __le32 long_delay_timeouts[SF_NUM_SCENARIO][SF_NUM_TIMEOUT_TYPES];
1655 __le32 full_on_timeouts[SF_NUM_SCENARIO][SF_NUM_TIMEOUT_TYPES];
1656} __packed; /* SF_CFG_API_S_VER_2 */
1657
a0a09243
LC
1658/* DTS measurements */
1659
1660enum iwl_dts_measurement_flags {
1661 DTS_TRIGGER_CMD_FLAGS_TEMP = BIT(0),
1662 DTS_TRIGGER_CMD_FLAGS_VOLT = BIT(1),
1663};
1664
1665/**
1666 * iwl_dts_measurement_cmd - request DTS temperature and/or voltage measurements
1667 *
1668 * @flags: indicates which measurements we want as specified in &enum
1669 * iwl_dts_measurement_flags
1670 */
1671struct iwl_dts_measurement_cmd {
1672 __le32 flags;
1673} __packed; /* TEMPERATURE_MEASUREMENT_TRIGGER_CMD_S */
1674
1675/**
1676 * iwl_dts_measurement_notif - notification received with the measurements
1677 *
1678 * @temp: the measured temperature
1679 * @voltage: the measured voltage
1680 */
1681struct iwl_dts_measurement_notif {
1682 __le32 temp;
1683 __le32 voltage;
1684} __packed; /* TEMPERATURE_MEASUREMENT_TRIGGER_NTFY_S */
1685
77c5d7ef
AN
1686/***********************************
1687 * TDLS API
1688 ***********************************/
1689
1690/* Type of TDLS request */
1691enum iwl_tdls_channel_switch_type {
1692 TDLS_SEND_CHAN_SW_REQ = 0,
1693 TDLS_SEND_CHAN_SW_RESP_AND_MOVE_CH,
1694 TDLS_MOVE_CH,
1695}; /* TDLS_STA_CHANNEL_SWITCH_CMD_TYPE_API_E_VER_1 */
1696
1697/**
1698 * Switch timing sub-element in a TDLS channel-switch command
1699 * @frame_timestamp: GP2 timestamp of channel-switch request/response packet
1700 * received from peer
1701 * @max_offchan_duration: What amount of microseconds out of a DTIM is given
1702 * to the TDLS off-channel communication. For instance if the DTIM is
1703 * 200TU and the TDLS peer is to be given 25% of the time, the value
1704 * given will be 50TU, or 50 * 1024 if translated into microseconds.
1705 * @switch_time: switch time the peer sent in its channel switch timing IE
1706 * @switch_timout: switch timeout the peer sent in its channel switch timing IE
1707 */
1708struct iwl_tdls_channel_switch_timing {
1709 __le32 frame_timestamp; /* GP2 time of peer packet Rx */
1710 __le32 max_offchan_duration; /* given in micro-seconds */
1711 __le32 switch_time; /* given in micro-seconds */
1712 __le32 switch_timeout; /* given in micro-seconds */
1713} __packed; /* TDLS_STA_CHANNEL_SWITCH_TIMING_DATA_API_S_VER_1 */
1714
1715#define IWL_TDLS_CH_SW_FRAME_MAX_SIZE 200
1716
1717/**
1718 * TDLS channel switch frame template
1719 *
1720 * A template representing a TDLS channel-switch request or response frame
1721 *
1722 * @switch_time_offset: offset to the channel switch timing IE in the template
1723 * @tx_cmd: Tx parameters for the frame
1724 * @data: frame data
1725 */
1726struct iwl_tdls_channel_switch_frame {
1727 __le32 switch_time_offset;
1728 struct iwl_tx_cmd tx_cmd;
1729 u8 data[IWL_TDLS_CH_SW_FRAME_MAX_SIZE];
1730} __packed; /* TDLS_STA_CHANNEL_SWITCH_FRAME_API_S_VER_1 */
1731
1732/**
1733 * TDLS channel switch command
1734 *
1735 * The command is sent to initiate a channel switch and also in response to
1736 * incoming TDLS channel-switch request/response packets from remote peers.
1737 *
1738 * @switch_type: see &enum iwl_tdls_channel_switch_type
1739 * @peer_sta_id: station id of TDLS peer
1740 * @ci: channel we switch to
1741 * @timing: timing related data for command
1742 * @frame: channel-switch request/response template, depending to switch_type
1743 */
1744struct iwl_tdls_channel_switch_cmd {
1745 u8 switch_type;
1746 __le32 peer_sta_id;
1747 struct iwl_fw_channel_info ci;
1748 struct iwl_tdls_channel_switch_timing timing;
1749 struct iwl_tdls_channel_switch_frame frame;
1750} __packed; /* TDLS_STA_CHANNEL_SWITCH_CMD_API_S_VER_1 */
1751
1752/**
1753 * TDLS channel switch start notification
1754 *
1755 * @status: non-zero on success
1756 * @offchannel_duration: duration given in microseconds
1757 * @sta_id: peer currently performing the channel-switch with
1758 */
1759struct iwl_tdls_channel_switch_notif {
1760 __le32 status;
1761 __le32 offchannel_duration;
1762 __le32 sta_id;
1763} __packed; /* TDLS_STA_CHANNEL_SWITCH_NTFY_API_S_VER_1 */
1764
307e4723
AN
1765/**
1766 * TDLS station info
1767 *
1768 * @sta_id: station id of the TDLS peer
1769 * @tx_to_peer_tid: TID reserved vs. the peer for FW based Tx
1770 * @tx_to_peer_ssn: initial SSN the FW should use for Tx on its TID vs the peer
1771 * @is_initiator: 1 if the peer is the TDLS link initiator, 0 otherwise
1772 */
1773struct iwl_tdls_sta_info {
1774 u8 sta_id;
1775 u8 tx_to_peer_tid;
1776 __le16 tx_to_peer_ssn;
1777 __le32 is_initiator;
1778} __packed; /* TDLS_STA_INFO_VER_1 */
1779
1780/**
1781 * TDLS basic config command
1782 *
1783 * @id_and_color: MAC id and color being configured
1784 * @tdls_peer_count: amount of currently connected TDLS peers
1785 * @tx_to_ap_tid: TID reverved vs. the AP for FW based Tx
1786 * @tx_to_ap_ssn: initial SSN the FW should use for Tx on its TID vs. the AP
1787 * @sta_info: per-station info. Only the first tdls_peer_count entries are set
1788 * @pti_req_data_offset: offset of network-level data for the PTI template
1789 * @pti_req_tx_cmd: Tx parameters for PTI request template
1790 * @pti_req_template: PTI request template data
1791 */
1792struct iwl_tdls_config_cmd {
1793 __le32 id_and_color; /* mac id and color */
1794 u8 tdls_peer_count;
1795 u8 tx_to_ap_tid;
1796 __le16 tx_to_ap_ssn;
1797 struct iwl_tdls_sta_info sta_info[IWL_MVM_TDLS_STA_COUNT];
1798
1799 __le32 pti_req_data_offset;
1800 struct iwl_tx_cmd pti_req_tx_cmd;
1801 u8 pti_req_template[0];
1802} __packed; /* TDLS_CONFIG_CMD_API_S_VER_1 */
1803
1804/**
1805 * TDLS per-station config information from FW
1806 *
1807 * @sta_id: station id of the TDLS peer
1808 * @tx_to_peer_last_seq: last sequence number used by FW during FW-based Tx to
1809 * the peer
1810 */
1811struct iwl_tdls_config_sta_info_res {
1812 __le16 sta_id;
1813 __le16 tx_to_peer_last_seq;
1814} __packed; /* TDLS_STA_INFO_RSP_VER_1 */
1815
1816/**
1817 * TDLS config information from FW
1818 *
1819 * @tx_to_ap_last_seq: last sequence number used by FW during FW-based Tx to AP
1820 * @sta_info: per-station TDLS config information
1821 */
1822struct iwl_tdls_config_res {
1823 __le32 tx_to_ap_last_seq;
1824 struct iwl_tdls_config_sta_info_res sta_info[IWL_MVM_TDLS_STA_COUNT];
1825} __packed; /* TDLS_CONFIG_RSP_API_S_VER_1 */
1826
04fd2c28
LK
1827#define TX_FIFO_MAX_NUM 8
1828#define RX_FIFO_MAX_NUM 2
1829
1830/**
1831 * Shared memory configuration information from the FW
1832 *
1833 * @shared_mem_addr: shared memory addr (pre 8000 HW set to 0x0 as MARBH is not
1834 * accessible)
1835 * @shared_mem_size: shared memory size
1836 * @sample_buff_addr: internal sample (mon/adc) buff addr (pre 8000 HW set to
1837 * 0x0 as accessible only via DBGM RDAT)
1838 * @sample_buff_size: internal sample buff size
1839 * @txfifo_addr: start addr of TXF0 (excluding the context table 0.5KB), (pre
1840 * 8000 HW set to 0x0 as not accessible)
1841 * @txfifo_size: size of TXF0 ... TXF7
1842 * @rxfifo_size: RXF1, RXF2 sizes. If there is no RXF2, it'll have a value of 0
1843 * @page_buff_addr: used by UMAC and performance debug (page miss analysis),
1844 * when paging is not supported this should be 0
1845 * @page_buff_size: size of %page_buff_addr
1846 */
1847struct iwl_shared_mem_cfg {
1848 __le32 shared_mem_addr;
1849 __le32 shared_mem_size;
1850 __le32 sample_buff_addr;
1851 __le32 sample_buff_size;
1852 __le32 txfifo_addr;
1853 __le32 txfifo_size[TX_FIFO_MAX_NUM];
1854 __le32 rxfifo_size[RX_FIFO_MAX_NUM];
1855 __le32 page_buff_addr;
1856 __le32 page_buff_size;
1857} __packed; /* SHARED_MEM_ALLOC_API_S_VER_1 */
1858
8ca151b5 1859#endif /* __fw_api_h__ */
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