iwlwifi: mvm: remove deprecated command IDs
[deliverable/linux.git] / drivers / net / wireless / iwlwifi / mvm / fw-api.h
CommitLineData
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1/******************************************************************************
2 *
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
5 *
6 * GPL LICENSE SUMMARY
7 *
51368bf7 8 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
8b4139dc 9 * Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH
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10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of version 2 of the GNU General Public License as
13 * published by the Free Software Foundation.
14 *
15 * This program is distributed in the hope that it will be useful, but
16 * WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 * General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
23 * USA
24 *
25 * The full GNU General Public License is included in this distribution
410dc5aa 26 * in the file called COPYING.
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27 *
28 * Contact Information:
29 * Intel Linux Wireless <ilw@linux.intel.com>
30 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
31 *
32 * BSD LICENSE
33 *
51368bf7 34 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
8b4139dc 35 * Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH
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36 * All rights reserved.
37 *
38 * Redistribution and use in source and binary forms, with or without
39 * modification, are permitted provided that the following conditions
40 * are met:
41 *
42 * * Redistributions of source code must retain the above copyright
43 * notice, this list of conditions and the following disclaimer.
44 * * Redistributions in binary form must reproduce the above copyright
45 * notice, this list of conditions and the following disclaimer in
46 * the documentation and/or other materials provided with the
47 * distribution.
48 * * Neither the name Intel Corporation nor the names of its
49 * contributors may be used to endorse or promote products derived
50 * from this software without specific prior written permission.
51 *
52 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
53 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
54 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
55 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
56 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
57 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
58 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
59 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
60 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
61 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
62 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
63 *
64 *****************************************************************************/
65
66#ifndef __fw_api_h__
67#define __fw_api_h__
68
69#include "fw-api-rs.h"
70#include "fw-api-tx.h"
71#include "fw-api-sta.h"
72#include "fw-api-mac.h"
73#include "fw-api-power.h"
74#include "fw-api-d3.h"
5b7ff615 75#include "fw-api-coex.h"
e820c2da 76#include "fw-api-scan.h"
d19ac589 77#include "fw-api-stats.h"
8ca151b5 78
19e737c9 79/* Tx queue numbers */
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80enum {
81 IWL_MVM_OFFCHANNEL_QUEUE = 8,
82 IWL_MVM_CMD_QUEUE = 9,
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83};
84
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85enum iwl_mvm_tx_fifo {
86 IWL_MVM_TX_FIFO_BK = 0,
87 IWL_MVM_TX_FIFO_BE,
88 IWL_MVM_TX_FIFO_VI,
89 IWL_MVM_TX_FIFO_VO,
90 IWL_MVM_TX_FIFO_MCAST = 5,
91 IWL_MVM_TX_FIFO_CMD = 7,
92};
19e737c9 93
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94#define IWL_MVM_STATION_COUNT 16
95
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96#define IWL_MVM_TDLS_STA_COUNT 4
97
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98/* commands */
99enum {
100 MVM_ALIVE = 0x1,
101 REPLY_ERROR = 0x2,
102
103 INIT_COMPLETE_NOTIF = 0x4,
104
105 /* PHY context commands */
106 PHY_CONTEXT_CMD = 0x8,
107 DBG_CFG = 0x9,
b9fae2d5 108 ANTENNA_COUPLING_NOTIFICATION = 0xa,
8ca151b5 109
d2496221
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110 /* UMAC scan commands */
111 SCAN_CFG_CMD = 0xc,
112 SCAN_REQ_UMAC = 0xd,
113 SCAN_ABORT_UMAC = 0xe,
114 SCAN_COMPLETE_UMAC = 0xf,
115
8ca151b5 116 /* station table */
5a258aae 117 ADD_STA_KEY = 0x17,
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118 ADD_STA = 0x18,
119 REMOVE_STA = 0x19,
120
121 /* TX */
122 TX_CMD = 0x1c,
123 TXPATH_FLUSH = 0x1e,
124 MGMT_MCAST_KEY = 0x1f,
125
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AA
126 /* scheduler config */
127 SCD_QUEUE_CFG = 0x1d,
128
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129 /* global key */
130 WEP_KEY = 0x20,
131
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132 /* Memory */
133 SHARED_MEM_CFG = 0x25,
134
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AN
135 /* TDLS */
136 TDLS_CHANNEL_SWITCH_CMD = 0x27,
137 TDLS_CHANNEL_SWITCH_NOTIFICATION = 0xaa,
307e4723 138 TDLS_CONFIG_CMD = 0xa7,
77c5d7ef 139
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140 /* MAC and Binding commands */
141 MAC_CONTEXT_CMD = 0x28,
142 TIME_EVENT_CMD = 0x29, /* both CMD and response */
143 TIME_EVENT_NOTIFICATION = 0x2a,
144 BINDING_CONTEXT_CMD = 0x2b,
145 TIME_QUOTA_CMD = 0x2c,
4ac6cb59 146 NON_QOS_TX_COUNTER_CMD = 0x2d,
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147
148 LQ_CMD = 0x4e,
149
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150 /* Scan offload */
151 SCAN_OFFLOAD_REQUEST_CMD = 0x51,
152 SCAN_OFFLOAD_ABORT_CMD = 0x52,
720befbf 153 HOT_SPOT_CMD = 0x53,
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154 SCAN_OFFLOAD_COMPLETE = 0x6D,
155 SCAN_OFFLOAD_UPDATE_PROFILES_CMD = 0x6E,
156 SCAN_OFFLOAD_CONFIG_CMD = 0x6f,
35a000b7 157 MATCH_FOUND_NOTIFICATION = 0xd9,
fb98be5e 158 SCAN_ITERATION_COMPLETE = 0xe7,
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159
160 /* Phy */
161 PHY_CONFIGURATION_CMD = 0x6a,
162 CALIB_RES_NOTIF_PHY_DB = 0x6b,
163 /* PHY_DB_CMD = 0x6c, */
164
e811ada7 165 /* Power - legacy power table command */
8ca151b5 166 POWER_TABLE_CMD = 0x77,
175a70b7 167 PSM_UAPSD_AP_MISBEHAVING_NOTIFICATION = 0x78,
9180ac50 168 LTR_CONFIG = 0xee,
8ca151b5 169
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170 /* Thermal Throttling*/
171 REPLY_THERMAL_MNG_BACKOFF = 0x7e,
172
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173 /* Scanning */
174 SCAN_REQUEST_CMD = 0x80,
175 SCAN_ABORT_CMD = 0x81,
176 SCAN_START_NOTIFICATION = 0x82,
177 SCAN_RESULTS_NOTIFICATION = 0x83,
178 SCAN_COMPLETE_NOTIFICATION = 0x84,
179
180 /* NVM */
181 NVM_ACCESS_CMD = 0x88,
182
183 SET_CALIB_DEFAULT_CMD = 0x8e,
184
571765c8 185 BEACON_NOTIFICATION = 0x90,
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186 BEACON_TEMPLATE_CMD = 0x91,
187 TX_ANT_CONFIGURATION_CMD = 0x98,
91a8bcde 188 STATISTICS_CMD = 0x9c,
8ca151b5 189 STATISTICS_NOTIFICATION = 0x9d,
3e56eadf 190 EOSP_NOTIFICATION = 0x9e,
88f2fd73 191 REDUCE_TX_POWER_CMD = 0x9f,
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192
193 /* RF-KILL commands and notifications */
194 CARD_STATE_CMD = 0xa0,
195 CARD_STATE_NOTIFICATION = 0xa1,
196
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197 MISSED_BEACONS_NOTIFICATION = 0xa2,
198
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199 /* Power - new power table command */
200 MAC_PM_POWER_TABLE = 0xa9,
201
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202 MFUART_LOAD_NOTIFICATION = 0xb1,
203
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204 REPLY_RX_PHY_CMD = 0xc0,
205 REPLY_RX_MPDU_CMD = 0xc1,
206 BA_NOTIF = 0xc5,
207
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208 /* Location Aware Regulatory */
209 MCC_UPDATE_CMD = 0xc8,
88931cc9 210 MCC_CHUB_UPDATE_CMD = 0xc9,
dcaf9f5e 211
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MG
212 MARKER_CMD = 0xcb,
213
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214 /* BT Coex */
215 BT_COEX_PRIO_TABLE = 0xcc,
216 BT_COEX_PROT_ENV = 0xcd,
217 BT_PROFILE_NOTIFICATION = 0xce,
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EG
218 BT_CONFIG = 0x9b,
219 BT_COEX_UPDATE_SW_BOOST = 0x5a,
220 BT_COEX_UPDATE_CORUN_LUT = 0x5b,
221 BT_COEX_UPDATE_REDUCED_TXP = 0x5c,
dac94da8 222 BT_COEX_CI = 0x5d,
fb3ceb81 223
1f3b0ff8 224 REPLY_SF_CFG_CMD = 0xd1,
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225 REPLY_BEACON_FILTERING_CMD = 0xd2,
226
a0a09243
LC
227 /* DTS measurements */
228 CMD_DTS_MEASUREMENT_TRIGGER = 0xdc,
229 DTS_MEASUREMENT_NOTIFICATION = 0xdd,
230
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231 REPLY_DEBUG_CMD = 0xf0,
232 DEBUG_LOG_MSG = 0xf7,
233
c87163b9 234 BCAST_FILTER_CMD = 0xcf,
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235 MCAST_FILTER_CMD = 0xd0,
236
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237 /* D3 commands/notifications */
238 D3_CONFIG_CMD = 0xd3,
239 PROT_OFFLOAD_CONFIG_CMD = 0xd4,
240 OFFLOADS_QUERY_CMD = 0xd5,
241 REMOTE_WAKE_CONFIG_CMD = 0xd6,
98ee7783 242 D0I3_END_CMD = 0xed,
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243
244 /* for WoWLAN in particular */
245 WOWLAN_PATTERNS = 0xe0,
246 WOWLAN_CONFIGURATION = 0xe1,
247 WOWLAN_TSC_RSC_PARAM = 0xe2,
248 WOWLAN_TKIP_PARAM = 0xe3,
249 WOWLAN_KEK_KCK_MATERIAL = 0xe4,
250 WOWLAN_GET_STATUSES = 0xe5,
251 WOWLAN_TX_POWER_PER_DB = 0xe6,
252
253 /* and for NetDetect */
b04998f3
LC
254 SCAN_OFFLOAD_PROFILES_QUERY_CMD = 0x56,
255 SCAN_OFFLOAD_HOTSPOTS_CONFIG_CMD = 0x58,
256 SCAN_OFFLOAD_HOTSPOTS_QUERY_CMD = 0x59,
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257
258 REPLY_MAX = 0xff,
259};
260
261/**
262 * struct iwl_cmd_response - generic response struct for most commands
263 * @status: status of the command asked, changes for each one
264 */
265struct iwl_cmd_response {
266 __le32 status;
267};
268
269/*
270 * struct iwl_tx_ant_cfg_cmd
271 * @valid: valid antenna configuration
272 */
273struct iwl_tx_ant_cfg_cmd {
274 __le32 valid;
275} __packed;
276
277/*
278 * Calibration control struct.
279 * Sent as part of the phy configuration command.
280 * @flow_trigger: bitmap for which calibrations to perform according to
281 * flow triggers.
282 * @event_trigger: bitmap for which calibrations to perform according to
283 * event triggers.
284 */
285struct iwl_calib_ctrl {
286 __le32 flow_trigger;
287 __le32 event_trigger;
288} __packed;
289
290/* This enum defines the bitmap of various calibrations to enable in both
291 * init ucode and runtime ucode through CALIBRATION_CFG_CMD.
292 */
293enum iwl_calib_cfg {
294 IWL_CALIB_CFG_XTAL_IDX = BIT(0),
295 IWL_CALIB_CFG_TEMPERATURE_IDX = BIT(1),
296 IWL_CALIB_CFG_VOLTAGE_READ_IDX = BIT(2),
297 IWL_CALIB_CFG_PAPD_IDX = BIT(3),
298 IWL_CALIB_CFG_TX_PWR_IDX = BIT(4),
299 IWL_CALIB_CFG_DC_IDX = BIT(5),
300 IWL_CALIB_CFG_BB_FILTER_IDX = BIT(6),
301 IWL_CALIB_CFG_LO_LEAKAGE_IDX = BIT(7),
302 IWL_CALIB_CFG_TX_IQ_IDX = BIT(8),
303 IWL_CALIB_CFG_TX_IQ_SKEW_IDX = BIT(9),
304 IWL_CALIB_CFG_RX_IQ_IDX = BIT(10),
305 IWL_CALIB_CFG_RX_IQ_SKEW_IDX = BIT(11),
306 IWL_CALIB_CFG_SENSITIVITY_IDX = BIT(12),
307 IWL_CALIB_CFG_CHAIN_NOISE_IDX = BIT(13),
308 IWL_CALIB_CFG_DISCONNECTED_ANT_IDX = BIT(14),
309 IWL_CALIB_CFG_ANT_COUPLING_IDX = BIT(15),
310 IWL_CALIB_CFG_DAC_IDX = BIT(16),
311 IWL_CALIB_CFG_ABS_IDX = BIT(17),
312 IWL_CALIB_CFG_AGC_IDX = BIT(18),
313};
314
315/*
316 * Phy configuration command.
317 */
318struct iwl_phy_cfg_cmd {
319 __le32 phy_cfg;
320 struct iwl_calib_ctrl calib_control;
321} __packed;
322
323#define PHY_CFG_RADIO_TYPE (BIT(0) | BIT(1))
324#define PHY_CFG_RADIO_STEP (BIT(2) | BIT(3))
325#define PHY_CFG_RADIO_DASH (BIT(4) | BIT(5))
326#define PHY_CFG_PRODUCT_NUMBER (BIT(6) | BIT(7))
327#define PHY_CFG_TX_CHAIN_A BIT(8)
328#define PHY_CFG_TX_CHAIN_B BIT(9)
329#define PHY_CFG_TX_CHAIN_C BIT(10)
330#define PHY_CFG_RX_CHAIN_A BIT(12)
331#define PHY_CFG_RX_CHAIN_B BIT(13)
332#define PHY_CFG_RX_CHAIN_C BIT(14)
333
334
335/* Target of the NVM_ACCESS_CMD */
336enum {
337 NVM_ACCESS_TARGET_CACHE = 0,
338 NVM_ACCESS_TARGET_OTP = 1,
339 NVM_ACCESS_TARGET_EEPROM = 2,
340};
341
b9545b48 342/* Section types for NVM_ACCESS_CMD */
8ca151b5 343enum {
ae2b21b0 344 NVM_SECTION_TYPE_SW = 1,
77db0a3c 345 NVM_SECTION_TYPE_REGULATORY = 3,
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346 NVM_SECTION_TYPE_CALIBRATION = 4,
347 NVM_SECTION_TYPE_PRODUCTION = 5,
77db0a3c 348 NVM_SECTION_TYPE_MAC_OVERRIDE = 11,
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349 NVM_SECTION_TYPE_PHY_SKU = 12,
350 NVM_MAX_NUM_SECTIONS = 13,
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351};
352
353/**
354 * struct iwl_nvm_access_cmd_ver2 - Request the device to send an NVM section
355 * @op_code: 0 - read, 1 - write
356 * @target: NVM_ACCESS_TARGET_*
357 * @type: NVM_SECTION_TYPE_*
358 * @offset: offset in bytes into the section
359 * @length: in bytes, to read/write
360 * @data: if write operation, the data to write. On read its empty
361 */
b9545b48 362struct iwl_nvm_access_cmd {
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363 u8 op_code;
364 u8 target;
365 __le16 type;
366 __le16 offset;
367 __le16 length;
368 u8 data[];
369} __packed; /* NVM_ACCESS_CMD_API_S_VER_2 */
370
371/**
372 * struct iwl_nvm_access_resp_ver2 - response to NVM_ACCESS_CMD
373 * @offset: offset in bytes into the section
374 * @length: in bytes, either how much was written or read
375 * @type: NVM_SECTION_TYPE_*
376 * @status: 0 for success, fail otherwise
377 * @data: if read operation, the data returned. Empty on write.
378 */
b9545b48 379struct iwl_nvm_access_resp {
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380 __le16 offset;
381 __le16 length;
382 __le16 type;
383 __le16 status;
384 u8 data[];
385} __packed; /* NVM_ACCESS_CMD_RESP_API_S_VER_2 */
386
387/* MVM_ALIVE 0x1 */
388
389/* alive response is_valid values */
390#define ALIVE_RESP_UCODE_OK BIT(0)
391#define ALIVE_RESP_RFKILL BIT(1)
392
393/* alive response ver_type values */
394enum {
395 FW_TYPE_HW = 0,
396 FW_TYPE_PROT = 1,
397 FW_TYPE_AP = 2,
398 FW_TYPE_WOWLAN = 3,
399 FW_TYPE_TIMING = 4,
400 FW_TYPE_WIPAN = 5
401};
402
403/* alive response ver_subtype values */
404enum {
405 FW_SUBTYPE_FULL_FEATURE = 0,
406 FW_SUBTYPE_BOOTSRAP = 1, /* Not valid */
407 FW_SUBTYPE_REDUCED = 2,
408 FW_SUBTYPE_ALIVE_ONLY = 3,
409 FW_SUBTYPE_WOWLAN = 4,
410 FW_SUBTYPE_AP_SUBTYPE = 5,
411 FW_SUBTYPE_WIPAN = 6,
412 FW_SUBTYPE_INITIALIZE = 9
413};
414
415#define IWL_ALIVE_STATUS_ERR 0xDEAD
416#define IWL_ALIVE_STATUS_OK 0xCAFE
417
418#define IWL_ALIVE_FLG_RFKILL BIT(0)
419
7e1223b5 420struct mvm_alive_resp_ver1 {
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421 __le16 status;
422 __le16 flags;
423 u8 ucode_minor;
424 u8 ucode_major;
425 __le16 id;
426 u8 api_minor;
427 u8 api_major;
428 u8 ver_subtype;
429 u8 ver_type;
430 u8 mac;
431 u8 opt;
432 __le16 reserved2;
433 __le32 timestamp;
434 __le32 error_event_table_ptr; /* SRAM address for error log */
435 __le32 log_event_table_ptr; /* SRAM address for event log */
436 __le32 cpu_register_ptr;
437 __le32 dbgm_config_ptr;
438 __le32 alive_counter_ptr;
439 __le32 scd_base_ptr; /* SRAM address for SCD */
440} __packed; /* ALIVE_RES_API_S_VER_1 */
441
01a9ca51
EH
442struct mvm_alive_resp_ver2 {
443 __le16 status;
444 __le16 flags;
445 u8 ucode_minor;
446 u8 ucode_major;
447 __le16 id;
448 u8 api_minor;
449 u8 api_major;
450 u8 ver_subtype;
451 u8 ver_type;
452 u8 mac;
453 u8 opt;
454 __le16 reserved2;
455 __le32 timestamp;
456 __le32 error_event_table_ptr; /* SRAM address for error log */
457 __le32 log_event_table_ptr; /* SRAM address for LMAC event log */
458 __le32 cpu_register_ptr;
459 __le32 dbgm_config_ptr;
460 __le32 alive_counter_ptr;
461 __le32 scd_base_ptr; /* SRAM address for SCD */
462 __le32 st_fwrd_addr; /* pointer to Store and forward */
463 __le32 st_fwrd_size;
464 u8 umac_minor; /* UMAC version: minor */
465 u8 umac_major; /* UMAC version: major */
466 __le16 umac_id; /* UMAC version: id */
467 __le32 error_info_addr; /* SRAM address for UMAC error log */
468 __le32 dbg_print_buff_addr;
469} __packed; /* ALIVE_RES_API_S_VER_2 */
470
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EG
471struct mvm_alive_resp {
472 __le16 status;
473 __le16 flags;
474 __le32 ucode_minor;
475 __le32 ucode_major;
476 u8 ver_subtype;
477 u8 ver_type;
478 u8 mac;
479 u8 opt;
480 __le32 timestamp;
481 __le32 error_event_table_ptr; /* SRAM address for error log */
482 __le32 log_event_table_ptr; /* SRAM address for LMAC event log */
483 __le32 cpu_register_ptr;
484 __le32 dbgm_config_ptr;
485 __le32 alive_counter_ptr;
486 __le32 scd_base_ptr; /* SRAM address for SCD */
487 __le32 st_fwrd_addr; /* pointer to Store and forward */
488 __le32 st_fwrd_size;
489 __le32 umac_minor; /* UMAC version: minor */
490 __le32 umac_major; /* UMAC version: major */
491 __le32 error_info_addr; /* SRAM address for UMAC error log */
492 __le32 dbg_print_buff_addr;
493} __packed; /* ALIVE_RES_API_S_VER_3 */
494
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495/* Error response/notification */
496enum {
497 FW_ERR_UNKNOWN_CMD = 0x0,
498 FW_ERR_INVALID_CMD_PARAM = 0x1,
499 FW_ERR_SERVICE = 0x2,
500 FW_ERR_ARC_MEMORY = 0x3,
501 FW_ERR_ARC_CODE = 0x4,
502 FW_ERR_WATCH_DOG = 0x5,
503 FW_ERR_WEP_GRP_KEY_INDX = 0x10,
504 FW_ERR_WEP_KEY_SIZE = 0x11,
505 FW_ERR_OBSOLETE_FUNC = 0x12,
506 FW_ERR_UNEXPECTED = 0xFE,
507 FW_ERR_FATAL = 0xFF
508};
509
510/**
511 * struct iwl_error_resp - FW error indication
512 * ( REPLY_ERROR = 0x2 )
513 * @error_type: one of FW_ERR_*
514 * @cmd_id: the command ID for which the error occured
515 * @bad_cmd_seq_num: sequence number of the erroneous command
516 * @error_service: which service created the error, applicable only if
517 * error_type = 2, otherwise 0
518 * @timestamp: TSF in usecs.
519 */
520struct iwl_error_resp {
521 __le32 error_type;
522 u8 cmd_id;
523 u8 reserved1;
524 __le16 bad_cmd_seq_num;
525 __le32 error_service;
526 __le64 timestamp;
527} __packed;
528
529
530/* Common PHY, MAC and Bindings definitions */
531
532#define MAX_MACS_IN_BINDING (3)
533#define MAX_BINDINGS (4)
534#define AUX_BINDING_INDEX (3)
535#define MAX_PHYS (4)
536
537/* Used to extract ID and color from the context dword */
538#define FW_CTXT_ID_POS (0)
539#define FW_CTXT_ID_MSK (0xff << FW_CTXT_ID_POS)
540#define FW_CTXT_COLOR_POS (8)
541#define FW_CTXT_COLOR_MSK (0xff << FW_CTXT_COLOR_POS)
542#define FW_CTXT_INVALID (0xffffffff)
543
544#define FW_CMD_ID_AND_COLOR(_id, _color) ((_id << FW_CTXT_ID_POS) |\
545 (_color << FW_CTXT_COLOR_POS))
546
547/* Possible actions on PHYs, MACs and Bindings */
548enum {
549 FW_CTXT_ACTION_STUB = 0,
550 FW_CTXT_ACTION_ADD,
551 FW_CTXT_ACTION_MODIFY,
552 FW_CTXT_ACTION_REMOVE,
553 FW_CTXT_ACTION_NUM
554}; /* COMMON_CONTEXT_ACTION_API_E_VER_1 */
555
556/* Time Events */
557
558/* Time Event types, according to MAC type */
559enum iwl_time_event_type {
560 /* BSS Station Events */
561 TE_BSS_STA_AGGRESSIVE_ASSOC,
562 TE_BSS_STA_ASSOC,
563 TE_BSS_EAP_DHCP_PROT,
564 TE_BSS_QUIET_PERIOD,
565
566 /* P2P Device Events */
567 TE_P2P_DEVICE_DISCOVERABLE,
568 TE_P2P_DEVICE_LISTEN,
569 TE_P2P_DEVICE_ACTION_SCAN,
570 TE_P2P_DEVICE_FULL_SCAN,
571
572 /* P2P Client Events */
573 TE_P2P_CLIENT_AGGRESSIVE_ASSOC,
574 TE_P2P_CLIENT_ASSOC,
575 TE_P2P_CLIENT_QUIET_PERIOD,
576
577 /* P2P GO Events */
578 TE_P2P_GO_ASSOC_PROT,
579 TE_P2P_GO_REPETITIVE_NOA,
580 TE_P2P_GO_CT_WINDOW,
581
582 /* WiDi Sync Events */
583 TE_WIDI_TX_SYNC,
584
7f0a7c67 585 /* Channel Switch NoA */
f991e17b 586 TE_CHANNEL_SWITCH_PERIOD,
7f0a7c67 587
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588 TE_MAX
589}; /* MAC_EVENT_TYPE_API_E_VER_1 */
590
f8f03c3e
EL
591
592
593/* Time event - defines for command API v1 */
594
595/*
596 * @TE_V1_FRAG_NONE: fragmentation of the time event is NOT allowed.
597 * @TE_V1_FRAG_SINGLE: fragmentation of the time event is allowed, but only
598 * the first fragment is scheduled.
599 * @TE_V1_FRAG_DUAL: fragmentation of the time event is allowed, but only
600 * the first 2 fragments are scheduled.
601 * @TE_V1_FRAG_ENDLESS: fragmentation of the time event is allowed, and any
602 * number of fragments are valid.
603 *
604 * Other than the constant defined above, specifying a fragmentation value 'x'
605 * means that the event can be fragmented but only the first 'x' will be
606 * scheduled.
607 */
608enum {
609 TE_V1_FRAG_NONE = 0,
610 TE_V1_FRAG_SINGLE = 1,
611 TE_V1_FRAG_DUAL = 2,
612 TE_V1_FRAG_ENDLESS = 0xffffffff
613};
614
615/* If a Time Event can be fragmented, this is the max number of fragments */
616#define TE_V1_FRAG_MAX_MSK 0x0fffffff
617/* Repeat the time event endlessly (until removed) */
618#define TE_V1_REPEAT_ENDLESS 0xffffffff
619/* If a Time Event has bounded repetitions, this is the maximal value */
620#define TE_V1_REPEAT_MAX_MSK_V1 0x0fffffff
621
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622/* Time Event dependencies: none, on another TE, or in a specific time */
623enum {
f8f03c3e
EL
624 TE_V1_INDEPENDENT = 0,
625 TE_V1_DEP_OTHER = BIT(0),
626 TE_V1_DEP_TSF = BIT(1),
627 TE_V1_EVENT_SOCIOPATHIC = BIT(2),
8ca151b5 628}; /* MAC_EVENT_DEPENDENCY_POLICY_API_E_VER_2 */
f8f03c3e 629
1da80e80 630/*
f8f03c3e
EL
631 * @TE_V1_NOTIF_NONE: no notifications
632 * @TE_V1_NOTIF_HOST_EVENT_START: request/receive notification on event start
633 * @TE_V1_NOTIF_HOST_EVENT_END:request/receive notification on event end
634 * @TE_V1_NOTIF_INTERNAL_EVENT_START: internal FW use
635 * @TE_V1_NOTIF_INTERNAL_EVENT_END: internal FW use.
636 * @TE_V1_NOTIF_HOST_FRAG_START: request/receive notification on frag start
637 * @TE_V1_NOTIF_HOST_FRAG_END:request/receive notification on frag end
638 * @TE_V1_NOTIF_INTERNAL_FRAG_START: internal FW use.
639 * @TE_V1_NOTIF_INTERNAL_FRAG_END: internal FW use.
640 *
1da80e80
IP
641 * Supported Time event notifications configuration.
642 * A notification (both event and fragment) includes a status indicating weather
643 * the FW was able to schedule the event or not. For fragment start/end
644 * notification the status is always success. There is no start/end fragment
645 * notification for monolithic events.
1da80e80 646 */
8ca151b5 647enum {
f8f03c3e
EL
648 TE_V1_NOTIF_NONE = 0,
649 TE_V1_NOTIF_HOST_EVENT_START = BIT(0),
650 TE_V1_NOTIF_HOST_EVENT_END = BIT(1),
651 TE_V1_NOTIF_INTERNAL_EVENT_START = BIT(2),
652 TE_V1_NOTIF_INTERNAL_EVENT_END = BIT(3),
653 TE_V1_NOTIF_HOST_FRAG_START = BIT(4),
654 TE_V1_NOTIF_HOST_FRAG_END = BIT(5),
655 TE_V1_NOTIF_INTERNAL_FRAG_START = BIT(6),
656 TE_V1_NOTIF_INTERNAL_FRAG_END = BIT(7),
1da80e80 657}; /* MAC_EVENT_ACTION_API_E_VER_2 */
8ca151b5 658
a373f67c 659/* Time event - defines for command API */
f8f03c3e 660
8ca151b5 661/*
f8f03c3e
EL
662 * @TE_V2_FRAG_NONE: fragmentation of the time event is NOT allowed.
663 * @TE_V2_FRAG_SINGLE: fragmentation of the time event is allowed, but only
8ca151b5 664 * the first fragment is scheduled.
f8f03c3e 665 * @TE_V2_FRAG_DUAL: fragmentation of the time event is allowed, but only
8ca151b5 666 * the first 2 fragments are scheduled.
f8f03c3e
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667 * @TE_V2_FRAG_ENDLESS: fragmentation of the time event is allowed, and any
668 * number of fragments are valid.
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669 *
670 * Other than the constant defined above, specifying a fragmentation value 'x'
671 * means that the event can be fragmented but only the first 'x' will be
672 * scheduled.
673 */
674enum {
f8f03c3e
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675 TE_V2_FRAG_NONE = 0,
676 TE_V2_FRAG_SINGLE = 1,
677 TE_V2_FRAG_DUAL = 2,
678 TE_V2_FRAG_MAX = 0xfe,
679 TE_V2_FRAG_ENDLESS = 0xff
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680};
681
682/* Repeat the time event endlessly (until removed) */
f8f03c3e 683#define TE_V2_REPEAT_ENDLESS 0xff
8ca151b5 684/* If a Time Event has bounded repetitions, this is the maximal value */
f8f03c3e
EL
685#define TE_V2_REPEAT_MAX 0xfe
686
687#define TE_V2_PLACEMENT_POS 12
688#define TE_V2_ABSENCE_POS 15
689
a373f67c 690/* Time event policy values
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691 * A notification (both event and fragment) includes a status indicating weather
692 * the FW was able to schedule the event or not. For fragment start/end
693 * notification the status is always success. There is no start/end fragment
694 * notification for monolithic events.
695 *
696 * @TE_V2_DEFAULT_POLICY: independent, social, present, unoticable
697 * @TE_V2_NOTIF_HOST_EVENT_START: request/receive notification on event start
698 * @TE_V2_NOTIF_HOST_EVENT_END:request/receive notification on event end
699 * @TE_V2_NOTIF_INTERNAL_EVENT_START: internal FW use
700 * @TE_V2_NOTIF_INTERNAL_EVENT_END: internal FW use.
701 * @TE_V2_NOTIF_HOST_FRAG_START: request/receive notification on frag start
702 * @TE_V2_NOTIF_HOST_FRAG_END:request/receive notification on frag end
703 * @TE_V2_NOTIF_INTERNAL_FRAG_START: internal FW use.
704 * @TE_V2_NOTIF_INTERNAL_FRAG_END: internal FW use.
705 * @TE_V2_DEP_OTHER: depends on another time event
706 * @TE_V2_DEP_TSF: depends on a specific time
707 * @TE_V2_EVENT_SOCIOPATHIC: can't co-exist with other events of tha same MAC
708 * @TE_V2_ABSENCE: are we present or absent during the Time Event.
709 */
710enum {
711 TE_V2_DEFAULT_POLICY = 0x0,
712
713 /* notifications (event start/stop, fragment start/stop) */
714 TE_V2_NOTIF_HOST_EVENT_START = BIT(0),
715 TE_V2_NOTIF_HOST_EVENT_END = BIT(1),
716 TE_V2_NOTIF_INTERNAL_EVENT_START = BIT(2),
717 TE_V2_NOTIF_INTERNAL_EVENT_END = BIT(3),
718
719 TE_V2_NOTIF_HOST_FRAG_START = BIT(4),
720 TE_V2_NOTIF_HOST_FRAG_END = BIT(5),
721 TE_V2_NOTIF_INTERNAL_FRAG_START = BIT(6),
722 TE_V2_NOTIF_INTERNAL_FRAG_END = BIT(7),
1f6bf078 723 T2_V2_START_IMMEDIATELY = BIT(11),
f8f03c3e
EL
724
725 TE_V2_NOTIF_MSK = 0xff,
726
727 /* placement characteristics */
728 TE_V2_DEP_OTHER = BIT(TE_V2_PLACEMENT_POS),
729 TE_V2_DEP_TSF = BIT(TE_V2_PLACEMENT_POS + 1),
730 TE_V2_EVENT_SOCIOPATHIC = BIT(TE_V2_PLACEMENT_POS + 2),
731
732 /* are we present or absent during the Time Event. */
733 TE_V2_ABSENCE = BIT(TE_V2_ABSENCE_POS),
734};
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735
736/**
a373f67c 737 * struct iwl_time_event_cmd_api - configuring Time Events
f8f03c3e
EL
738 * with struct MAC_TIME_EVENT_DATA_API_S_VER_2 (see also
739 * with version 1. determined by IWL_UCODE_TLV_FLAGS)
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740 * ( TIME_EVENT_CMD = 0x29 )
741 * @id_and_color: ID and color of the relevant MAC
742 * @action: action to perform, one of FW_CTXT_ACTION_*
743 * @id: this field has two meanings, depending on the action:
744 * If the action is ADD, then it means the type of event to add.
745 * For all other actions it is the unique event ID assigned when the
746 * event was added by the FW.
747 * @apply_time: When to start the Time Event (in GP2)
748 * @max_delay: maximum delay to event's start (apply time), in TU
749 * @depends_on: the unique ID of the event we depend on (if any)
750 * @interval: interval between repetitions, in TU
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751 * @duration: duration of event in TU
752 * @repeat: how many repetitions to do, can be TE_REPEAT_ENDLESS
8ca151b5 753 * @max_frags: maximal number of fragments the Time Event can be divided to
f8f03c3e
EL
754 * @policy: defines whether uCode shall notify the host or other uCode modules
755 * on event and/or fragment start and/or end
756 * using one of TE_INDEPENDENT, TE_DEP_OTHER, TE_DEP_TSF
757 * TE_EVENT_SOCIOPATHIC
758 * using TE_ABSENCE and using TE_NOTIF_*
8ca151b5 759 */
a373f67c 760struct iwl_time_event_cmd {
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761 /* COMMON_INDEX_HDR_API_S_VER_1 */
762 __le32 id_and_color;
763 __le32 action;
764 __le32 id;
f8f03c3e 765 /* MAC_TIME_EVENT_DATA_API_S_VER_2 */
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766 __le32 apply_time;
767 __le32 max_delay;
8ca151b5 768 __le32 depends_on;
8ca151b5 769 __le32 interval;
8ca151b5 770 __le32 duration;
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EL
771 u8 repeat;
772 u8 max_frags;
773 __le16 policy;
774} __packed; /* MAC_TIME_EVENT_CMD_API_S_VER_2 */
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775
776/**
777 * struct iwl_time_event_resp - response structure to iwl_time_event_cmd
778 * @status: bit 0 indicates success, all others specify errors
779 * @id: the Time Event type
780 * @unique_id: the unique ID assigned (in ADD) or given (others) to the TE
781 * @id_and_color: ID and color of the relevant MAC
782 */
783struct iwl_time_event_resp {
784 __le32 status;
785 __le32 id;
786 __le32 unique_id;
787 __le32 id_and_color;
788} __packed; /* MAC_TIME_EVENT_RSP_API_S_VER_1 */
789
790/**
791 * struct iwl_time_event_notif - notifications of time event start/stop
792 * ( TIME_EVENT_NOTIFICATION = 0x2a )
793 * @timestamp: action timestamp in GP2
794 * @session_id: session's unique id
795 * @unique_id: unique id of the Time Event itself
796 * @id_and_color: ID and color of the relevant MAC
797 * @action: one of TE_NOTIF_START or TE_NOTIF_END
798 * @status: true if scheduled, false otherwise (not executed)
799 */
800struct iwl_time_event_notif {
801 __le32 timestamp;
802 __le32 session_id;
803 __le32 unique_id;
804 __le32 id_and_color;
805 __le32 action;
806 __le32 status;
807} __packed; /* MAC_TIME_EVENT_NTFY_API_S_VER_1 */
808
809
810/* Bindings and Time Quota */
811
812/**
813 * struct iwl_binding_cmd - configuring bindings
814 * ( BINDING_CONTEXT_CMD = 0x2b )
815 * @id_and_color: ID and color of the relevant Binding
816 * @action: action to perform, one of FW_CTXT_ACTION_*
817 * @macs: array of MAC id and colors which belong to the binding
818 * @phy: PHY id and color which belongs to the binding
819 */
820struct iwl_binding_cmd {
821 /* COMMON_INDEX_HDR_API_S_VER_1 */
822 __le32 id_and_color;
823 __le32 action;
824 /* BINDING_DATA_API_S_VER_1 */
825 __le32 macs[MAX_MACS_IN_BINDING];
826 __le32 phy;
827} __packed; /* BINDING_CMD_API_S_VER_1 */
828
35adfd6e
IP
829/* The maximal number of fragments in the FW's schedule session */
830#define IWL_MVM_MAX_QUOTA 128
831
8ca151b5
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832/**
833 * struct iwl_time_quota_data - configuration of time quota per binding
834 * @id_and_color: ID and color of the relevant Binding
835 * @quota: absolute time quota in TU. The scheduler will try to divide the
836 * remainig quota (after Time Events) according to this quota.
837 * @max_duration: max uninterrupted context duration in TU
838 */
839struct iwl_time_quota_data {
840 __le32 id_and_color;
841 __le32 quota;
842 __le32 max_duration;
843} __packed; /* TIME_QUOTA_DATA_API_S_VER_1 */
844
845/**
846 * struct iwl_time_quota_cmd - configuration of time quota between bindings
847 * ( TIME_QUOTA_CMD = 0x2c )
848 * @quotas: allocations per binding
849 */
850struct iwl_time_quota_cmd {
851 struct iwl_time_quota_data quotas[MAX_BINDINGS];
852} __packed; /* TIME_QUOTA_ALLOCATION_CMD_API_S_VER_1 */
853
854
855/* PHY context */
856
857/* Supported bands */
858#define PHY_BAND_5 (0)
859#define PHY_BAND_24 (1)
860
861/* Supported channel width, vary if there is VHT support */
862#define PHY_VHT_CHANNEL_MODE20 (0x0)
863#define PHY_VHT_CHANNEL_MODE40 (0x1)
864#define PHY_VHT_CHANNEL_MODE80 (0x2)
865#define PHY_VHT_CHANNEL_MODE160 (0x3)
866
867/*
868 * Control channel position:
869 * For legacy set bit means upper channel, otherwise lower.
870 * For VHT - bit-2 marks if the control is lower/upper relative to center-freq
871 * bits-1:0 mark the distance from the center freq. for 20Mhz, offset is 0.
872 * center_freq
873 * |
874 * 40Mhz |_______|_______|
875 * 80Mhz |_______|_______|_______|_______|
876 * 160Mhz |_______|_______|_______|_______|_______|_______|_______|_______|
877 * code 011 010 001 000 | 100 101 110 111
878 */
879#define PHY_VHT_CTRL_POS_1_BELOW (0x0)
880#define PHY_VHT_CTRL_POS_2_BELOW (0x1)
881#define PHY_VHT_CTRL_POS_3_BELOW (0x2)
882#define PHY_VHT_CTRL_POS_4_BELOW (0x3)
883#define PHY_VHT_CTRL_POS_1_ABOVE (0x4)
884#define PHY_VHT_CTRL_POS_2_ABOVE (0x5)
885#define PHY_VHT_CTRL_POS_3_ABOVE (0x6)
886#define PHY_VHT_CTRL_POS_4_ABOVE (0x7)
887
888/*
889 * @band: PHY_BAND_*
890 * @channel: channel number
891 * @width: PHY_[VHT|LEGACY]_CHANNEL_*
892 * @ctrl channel: PHY_[VHT|LEGACY]_CTRL_*
893 */
894struct iwl_fw_channel_info {
895 u8 band;
896 u8 channel;
897 u8 width;
898 u8 ctrl_pos;
899} __packed;
900
901#define PHY_RX_CHAIN_DRIVER_FORCE_POS (0)
902#define PHY_RX_CHAIN_DRIVER_FORCE_MSK \
903 (0x1 << PHY_RX_CHAIN_DRIVER_FORCE_POS)
904#define PHY_RX_CHAIN_VALID_POS (1)
905#define PHY_RX_CHAIN_VALID_MSK \
906 (0x7 << PHY_RX_CHAIN_VALID_POS)
907#define PHY_RX_CHAIN_FORCE_SEL_POS (4)
908#define PHY_RX_CHAIN_FORCE_SEL_MSK \
909 (0x7 << PHY_RX_CHAIN_FORCE_SEL_POS)
910#define PHY_RX_CHAIN_FORCE_MIMO_SEL_POS (7)
911#define PHY_RX_CHAIN_FORCE_MIMO_SEL_MSK \
912 (0x7 << PHY_RX_CHAIN_FORCE_MIMO_SEL_POS)
913#define PHY_RX_CHAIN_CNT_POS (10)
914#define PHY_RX_CHAIN_CNT_MSK \
915 (0x3 << PHY_RX_CHAIN_CNT_POS)
916#define PHY_RX_CHAIN_MIMO_CNT_POS (12)
917#define PHY_RX_CHAIN_MIMO_CNT_MSK \
918 (0x3 << PHY_RX_CHAIN_MIMO_CNT_POS)
919#define PHY_RX_CHAIN_MIMO_FORCE_POS (14)
920#define PHY_RX_CHAIN_MIMO_FORCE_MSK \
921 (0x1 << PHY_RX_CHAIN_MIMO_FORCE_POS)
922
923/* TODO: fix the value, make it depend on firmware at runtime? */
924#define NUM_PHY_CTX 3
925
926/* TODO: complete missing documentation */
927/**
928 * struct iwl_phy_context_cmd - config of the PHY context
929 * ( PHY_CONTEXT_CMD = 0x8 )
930 * @id_and_color: ID and color of the relevant Binding
931 * @action: action to perform, one of FW_CTXT_ACTION_*
932 * @apply_time: 0 means immediate apply and context switch.
933 * other value means apply new params after X usecs
934 * @tx_param_color: ???
935 * @channel_info:
936 * @txchain_info: ???
937 * @rxchain_info: ???
938 * @acquisition_data: ???
939 * @dsp_cfg_flags: set to 0
940 */
941struct iwl_phy_context_cmd {
942 /* COMMON_INDEX_HDR_API_S_VER_1 */
943 __le32 id_and_color;
944 __le32 action;
945 /* PHY_CONTEXT_DATA_API_S_VER_1 */
946 __le32 apply_time;
947 __le32 tx_param_color;
948 struct iwl_fw_channel_info ci;
949 __le32 txchain_info;
950 __le32 rxchain_info;
951 __le32 acquisition_data;
952 __le32 dsp_cfg_flags;
953} __packed; /* PHY_CONTEXT_CMD_API_VER_1 */
954
720befbf
AM
955/*
956 * Aux ROC command
957 *
958 * Command requests the firmware to create a time event for a certain duration
959 * and remain on the given channel. This is done by using the Aux framework in
960 * the FW.
961 * The command was first used for Hot Spot issues - but can be used regardless
962 * to Hot Spot.
963 *
964 * ( HOT_SPOT_CMD 0x53 )
965 *
966 * @id_and_color: ID and color of the MAC
967 * @action: action to perform, one of FW_CTXT_ACTION_*
968 * @event_unique_id: If the action FW_CTXT_ACTION_REMOVE then the
969 * event_unique_id should be the id of the time event assigned by ucode.
970 * Otherwise ignore the event_unique_id.
971 * @sta_id_and_color: station id and color, resumed during "Remain On Channel"
972 * activity.
973 * @channel_info: channel info
974 * @node_addr: Our MAC Address
975 * @reserved: reserved for alignment
976 * @apply_time: GP2 value to start (should always be the current GP2 value)
977 * @apply_time_max_delay: Maximum apply time delay value in TU. Defines max
978 * time by which start of the event is allowed to be postponed.
979 * @duration: event duration in TU To calculate event duration:
980 * timeEventDuration = min(duration, remainingQuota)
981 */
982struct iwl_hs20_roc_req {
983 /* COMMON_INDEX_HDR_API_S_VER_1 hdr */
984 __le32 id_and_color;
985 __le32 action;
986 __le32 event_unique_id;
987 __le32 sta_id_and_color;
988 struct iwl_fw_channel_info channel_info;
989 u8 node_addr[ETH_ALEN];
990 __le16 reserved;
991 __le32 apply_time;
992 __le32 apply_time_max_delay;
993 __le32 duration;
994} __packed; /* HOT_SPOT_CMD_API_S_VER_1 */
995
996/*
997 * values for AUX ROC result values
998 */
999enum iwl_mvm_hot_spot {
1000 HOT_SPOT_RSP_STATUS_OK,
1001 HOT_SPOT_RSP_STATUS_TOO_MANY_EVENTS,
1002 HOT_SPOT_MAX_NUM_OF_SESSIONS,
1003};
1004
1005/*
1006 * Aux ROC command response
1007 *
1008 * In response to iwl_hs20_roc_req the FW sends this command to notify the
1009 * driver the uid of the timevent.
1010 *
1011 * ( HOT_SPOT_CMD 0x53 )
1012 *
1013 * @event_unique_id: Unique ID of time event assigned by ucode
1014 * @status: Return status 0 is success, all the rest used for specific errors
1015 */
1016struct iwl_hs20_roc_res {
1017 __le32 event_unique_id;
1018 __le32 status;
1019} __packed; /* HOT_SPOT_RSP_API_S_VER_1 */
1020
8ca151b5 1021#define IWL_RX_INFO_PHY_CNT 8
a2d7b870
AA
1022#define IWL_RX_INFO_ENERGY_ANT_ABC_IDX 1
1023#define IWL_RX_INFO_ENERGY_ANT_A_MSK 0x000000ff
1024#define IWL_RX_INFO_ENERGY_ANT_B_MSK 0x0000ff00
1025#define IWL_RX_INFO_ENERGY_ANT_C_MSK 0x00ff0000
1026#define IWL_RX_INFO_ENERGY_ANT_A_POS 0
1027#define IWL_RX_INFO_ENERGY_ANT_B_POS 8
1028#define IWL_RX_INFO_ENERGY_ANT_C_POS 16
1029
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JB
1030#define IWL_RX_INFO_AGC_IDX 1
1031#define IWL_RX_INFO_RSSI_AB_IDX 2
8101a7f0
EG
1032#define IWL_OFDM_AGC_A_MSK 0x0000007f
1033#define IWL_OFDM_AGC_A_POS 0
1034#define IWL_OFDM_AGC_B_MSK 0x00003f80
1035#define IWL_OFDM_AGC_B_POS 7
1036#define IWL_OFDM_AGC_CODE_MSK 0x3fe00000
1037#define IWL_OFDM_AGC_CODE_POS 20
8ca151b5 1038#define IWL_OFDM_RSSI_INBAND_A_MSK 0x00ff
8ca151b5 1039#define IWL_OFDM_RSSI_A_POS 0
8101a7f0
EG
1040#define IWL_OFDM_RSSI_ALLBAND_A_MSK 0xff00
1041#define IWL_OFDM_RSSI_ALLBAND_A_POS 8
8ca151b5 1042#define IWL_OFDM_RSSI_INBAND_B_MSK 0xff0000
8ca151b5 1043#define IWL_OFDM_RSSI_B_POS 16
8101a7f0
EG
1044#define IWL_OFDM_RSSI_ALLBAND_B_MSK 0xff000000
1045#define IWL_OFDM_RSSI_ALLBAND_B_POS 24
8ca151b5
JB
1046
1047/**
1048 * struct iwl_rx_phy_info - phy info
1049 * (REPLY_RX_PHY_CMD = 0xc0)
1050 * @non_cfg_phy_cnt: non configurable DSP phy data byte count
1051 * @cfg_phy_cnt: configurable DSP phy data byte count
1052 * @stat_id: configurable DSP phy data set ID
1053 * @reserved1:
1054 * @system_timestamp: GP2 at on air rise
1055 * @timestamp: TSF at on air rise
1056 * @beacon_time_stamp: beacon at on-air rise
1057 * @phy_flags: general phy flags: band, modulation, ...
1058 * @channel: channel number
1059 * @non_cfg_phy_buf: for various implementations of non_cfg_phy
1060 * @rate_n_flags: RATE_MCS_*
1061 * @byte_count: frame's byte-count
1062 * @frame_time: frame's time on the air, based on byte count and frame rate
1063 * calculation
6bfcb7e8 1064 * @mac_active_msk: what MACs were active when the frame was received
8ca151b5
JB
1065 *
1066 * Before each Rx, the device sends this data. It contains PHY information
1067 * about the reception of the packet.
1068 */
1069struct iwl_rx_phy_info {
1070 u8 non_cfg_phy_cnt;
1071 u8 cfg_phy_cnt;
1072 u8 stat_id;
1073 u8 reserved1;
1074 __le32 system_timestamp;
1075 __le64 timestamp;
1076 __le32 beacon_time_stamp;
1077 __le16 phy_flags;
1078 __le16 channel;
1079 __le32 non_cfg_phy[IWL_RX_INFO_PHY_CNT];
1080 __le32 rate_n_flags;
1081 __le32 byte_count;
6bfcb7e8 1082 __le16 mac_active_msk;
8ca151b5
JB
1083 __le16 frame_time;
1084} __packed;
1085
1086struct iwl_rx_mpdu_res_start {
1087 __le16 byte_count;
1088 __le16 reserved;
1089} __packed;
1090
1091/**
1092 * enum iwl_rx_phy_flags - to parse %iwl_rx_phy_info phy_flags
1093 * @RX_RES_PHY_FLAGS_BAND_24: true if the packet was received on 2.4 band
1094 * @RX_RES_PHY_FLAGS_MOD_CCK:
1095 * @RX_RES_PHY_FLAGS_SHORT_PREAMBLE: true if packet's preamble was short
1096 * @RX_RES_PHY_FLAGS_NARROW_BAND:
1097 * @RX_RES_PHY_FLAGS_ANTENNA: antenna on which the packet was received
1098 * @RX_RES_PHY_FLAGS_AGG: set if the packet was part of an A-MPDU
1099 * @RX_RES_PHY_FLAGS_OFDM_HT: The frame was an HT frame
1100 * @RX_RES_PHY_FLAGS_OFDM_GF: The frame used GF preamble
1101 * @RX_RES_PHY_FLAGS_OFDM_VHT: The frame was a VHT frame
1102 */
1103enum iwl_rx_phy_flags {
1104 RX_RES_PHY_FLAGS_BAND_24 = BIT(0),
1105 RX_RES_PHY_FLAGS_MOD_CCK = BIT(1),
1106 RX_RES_PHY_FLAGS_SHORT_PREAMBLE = BIT(2),
1107 RX_RES_PHY_FLAGS_NARROW_BAND = BIT(3),
1108 RX_RES_PHY_FLAGS_ANTENNA = (0x7 << 4),
1109 RX_RES_PHY_FLAGS_ANTENNA_POS = 4,
1110 RX_RES_PHY_FLAGS_AGG = BIT(7),
1111 RX_RES_PHY_FLAGS_OFDM_HT = BIT(8),
1112 RX_RES_PHY_FLAGS_OFDM_GF = BIT(9),
1113 RX_RES_PHY_FLAGS_OFDM_VHT = BIT(10),
1114};
1115
1116/**
1117 * enum iwl_mvm_rx_status - written by fw for each Rx packet
1118 * @RX_MPDU_RES_STATUS_CRC_OK: CRC is fine
1119 * @RX_MPDU_RES_STATUS_OVERRUN_OK: there was no RXE overflow
1120 * @RX_MPDU_RES_STATUS_SRC_STA_FOUND:
1121 * @RX_MPDU_RES_STATUS_KEY_VALID:
1122 * @RX_MPDU_RES_STATUS_KEY_PARAM_OK:
1123 * @RX_MPDU_RES_STATUS_ICV_OK: ICV is fine, if not, the packet is destroyed
1124 * @RX_MPDU_RES_STATUS_MIC_OK: used for CCM alg only. TKIP MIC is checked
1125 * in the driver.
1126 * @RX_MPDU_RES_STATUS_TTAK_OK: TTAK is fine
1127 * @RX_MPDU_RES_STATUS_MNG_FRAME_REPLAY_ERR: valid for alg = CCM_CMAC or
1128 * alg = CCM only. Checks replay attack for 11w frames. Relevant only if
1129 * %RX_MPDU_RES_STATUS_ROBUST_MNG_FRAME is set.
1130 * @RX_MPDU_RES_STATUS_SEC_NO_ENC: this frame is not encrypted
1131 * @RX_MPDU_RES_STATUS_SEC_WEP_ENC: this frame is encrypted using WEP
1132 * @RX_MPDU_RES_STATUS_SEC_CCM_ENC: this frame is encrypted using CCM
1133 * @RX_MPDU_RES_STATUS_SEC_TKIP_ENC: this frame is encrypted using TKIP
1134 * @RX_MPDU_RES_STATUS_SEC_CCM_CMAC_ENC: this frame is encrypted using CCM_CMAC
1135 * @RX_MPDU_RES_STATUS_SEC_ENC_ERR: this frame couldn't be decrypted
1136 * @RX_MPDU_RES_STATUS_SEC_ENC_MSK: bitmask of the encryption algorithm
1137 * @RX_MPDU_RES_STATUS_DEC_DONE: this frame has been successfully decrypted
1138 * @RX_MPDU_RES_STATUS_PROTECT_FRAME_BIT_CMP:
1139 * @RX_MPDU_RES_STATUS_EXT_IV_BIT_CMP:
1140 * @RX_MPDU_RES_STATUS_KEY_ID_CMP_BIT:
1141 * @RX_MPDU_RES_STATUS_ROBUST_MNG_FRAME: this frame is an 11w management frame
1142 * @RX_MPDU_RES_STATUS_HASH_INDEX_MSK:
1143 * @RX_MPDU_RES_STATUS_STA_ID_MSK:
1144 * @RX_MPDU_RES_STATUS_RRF_KILL:
1145 * @RX_MPDU_RES_STATUS_FILTERING_MSK:
1146 * @RX_MPDU_RES_STATUS2_FILTERING_MSK:
1147 */
1148enum iwl_mvm_rx_status {
1149 RX_MPDU_RES_STATUS_CRC_OK = BIT(0),
1150 RX_MPDU_RES_STATUS_OVERRUN_OK = BIT(1),
1151 RX_MPDU_RES_STATUS_SRC_STA_FOUND = BIT(2),
1152 RX_MPDU_RES_STATUS_KEY_VALID = BIT(3),
1153 RX_MPDU_RES_STATUS_KEY_PARAM_OK = BIT(4),
1154 RX_MPDU_RES_STATUS_ICV_OK = BIT(5),
1155 RX_MPDU_RES_STATUS_MIC_OK = BIT(6),
1156 RX_MPDU_RES_STATUS_TTAK_OK = BIT(7),
1157 RX_MPDU_RES_STATUS_MNG_FRAME_REPLAY_ERR = BIT(7),
1158 RX_MPDU_RES_STATUS_SEC_NO_ENC = (0 << 8),
1159 RX_MPDU_RES_STATUS_SEC_WEP_ENC = (1 << 8),
1160 RX_MPDU_RES_STATUS_SEC_CCM_ENC = (2 << 8),
1161 RX_MPDU_RES_STATUS_SEC_TKIP_ENC = (3 << 8),
e36e5433 1162 RX_MPDU_RES_STATUS_SEC_EXT_ENC = (4 << 8),
8ca151b5
JB
1163 RX_MPDU_RES_STATUS_SEC_CCM_CMAC_ENC = (6 << 8),
1164 RX_MPDU_RES_STATUS_SEC_ENC_ERR = (7 << 8),
1165 RX_MPDU_RES_STATUS_SEC_ENC_MSK = (7 << 8),
1166 RX_MPDU_RES_STATUS_DEC_DONE = BIT(11),
1167 RX_MPDU_RES_STATUS_PROTECT_FRAME_BIT_CMP = BIT(12),
1168 RX_MPDU_RES_STATUS_EXT_IV_BIT_CMP = BIT(13),
1169 RX_MPDU_RES_STATUS_KEY_ID_CMP_BIT = BIT(14),
1170 RX_MPDU_RES_STATUS_ROBUST_MNG_FRAME = BIT(15),
1171 RX_MPDU_RES_STATUS_HASH_INDEX_MSK = (0x3F0000),
1172 RX_MPDU_RES_STATUS_STA_ID_MSK = (0x1f000000),
1173 RX_MPDU_RES_STATUS_RRF_KILL = BIT(29),
1174 RX_MPDU_RES_STATUS_FILTERING_MSK = (0xc00000),
1175 RX_MPDU_RES_STATUS2_FILTERING_MSK = (0xc0000000),
1176};
1177
1178/**
1179 * struct iwl_radio_version_notif - information on the radio version
1180 * ( RADIO_VERSION_NOTIFICATION = 0x68 )
1181 * @radio_flavor:
1182 * @radio_step:
1183 * @radio_dash:
1184 */
1185struct iwl_radio_version_notif {
1186 __le32 radio_flavor;
1187 __le32 radio_step;
1188 __le32 radio_dash;
1189} __packed; /* RADIO_VERSION_NOTOFICATION_S_VER_1 */
1190
1191enum iwl_card_state_flags {
1192 CARD_ENABLED = 0x00,
1193 HW_CARD_DISABLED = 0x01,
1194 SW_CARD_DISABLED = 0x02,
1195 CT_KILL_CARD_DISABLED = 0x04,
1196 HALT_CARD_DISABLED = 0x08,
1197 CARD_DISABLED_MSK = 0x0f,
1198 CARD_IS_RX_ON = 0x10,
1199};
1200
1201/**
1202 * struct iwl_radio_version_notif - information on the radio version
1203 * ( CARD_STATE_NOTIFICATION = 0xa1 )
1204 * @flags: %iwl_card_state_flags
1205 */
1206struct iwl_card_state_notif {
1207 __le32 flags;
1208} __packed; /* CARD_STATE_NTFY_API_S_VER_1 */
1209
d64048ed
HG
1210/**
1211 * struct iwl_missed_beacons_notif - information on missed beacons
1212 * ( MISSED_BEACONS_NOTIFICATION = 0xa2 )
1213 * @mac_id: interface ID
1214 * @consec_missed_beacons_since_last_rx: number of consecutive missed
1215 * beacons since last RX.
1216 * @consec_missed_beacons: number of consecutive missed beacons
1217 * @num_expected_beacons:
1218 * @num_recvd_beacons:
1219 */
1220struct iwl_missed_beacons_notif {
1221 __le32 mac_id;
1222 __le32 consec_missed_beacons_since_last_rx;
1223 __le32 consec_missed_beacons;
1224 __le32 num_expected_beacons;
1225 __le32 num_recvd_beacons;
1226} __packed; /* MISSED_BEACON_NTFY_API_S_VER_3 */
1227
30269c12
CRI
1228/**
1229 * struct iwl_mfuart_load_notif - mfuart image version & status
1230 * ( MFUART_LOAD_NOTIFICATION = 0xb1 )
1231 * @installed_ver: installed image version
1232 * @external_ver: external image version
1233 * @status: MFUART loading status
1234 * @duration: MFUART loading time
1235*/
1236struct iwl_mfuart_load_notif {
1237 __le32 installed_ver;
1238 __le32 external_ver;
1239 __le32 status;
1240 __le32 duration;
1241} __packed; /*MFU_LOADER_NTFY_API_S_VER_1*/
1242
8ca151b5
JB
1243/**
1244 * struct iwl_set_calib_default_cmd - set default value for calibration.
1245 * ( SET_CALIB_DEFAULT_CMD = 0x8e )
1246 * @calib_index: the calibration to set value for
1247 * @length: of data
1248 * @data: the value to set for the calibration result
1249 */
1250struct iwl_set_calib_default_cmd {
1251 __le16 calib_index;
1252 __le16 length;
1253 u8 data[0];
1254} __packed; /* PHY_CALIB_OVERRIDE_VALUES_S */
1255
51b6b9e0 1256#define MAX_PORT_ID_NUM 2
e59647ea 1257#define MAX_MCAST_FILTERING_ADDRESSES 256
51b6b9e0
EG
1258
1259/**
1260 * struct iwl_mcast_filter_cmd - configure multicast filter.
1261 * @filter_own: Set 1 to filter out multicast packets sent by station itself
1262 * @port_id: Multicast MAC addresses array specifier. This is a strange way
1263 * to identify network interface adopted in host-device IF.
1264 * It is used by FW as index in array of addresses. This array has
1265 * MAX_PORT_ID_NUM members.
1266 * @count: Number of MAC addresses in the array
1267 * @pass_all: Set 1 to pass all multicast packets.
1268 * @bssid: current association BSSID.
1269 * @addr_list: Place holder for array of MAC addresses.
1270 * IMPORTANT: add padding if necessary to ensure DWORD alignment.
1271 */
1272struct iwl_mcast_filter_cmd {
1273 u8 filter_own;
1274 u8 port_id;
1275 u8 count;
1276 u8 pass_all;
1277 u8 bssid[6];
1278 u8 reserved[2];
1279 u8 addr_list[0];
1280} __packed; /* MCAST_FILTERING_CMD_API_S_VER_1 */
1281
c87163b9
EP
1282#define MAX_BCAST_FILTERS 8
1283#define MAX_BCAST_FILTER_ATTRS 2
1284
1285/**
1286 * enum iwl_mvm_bcast_filter_attr_offset - written by fw for each Rx packet
1287 * @BCAST_FILTER_OFFSET_PAYLOAD_START: offset is from payload start.
1288 * @BCAST_FILTER_OFFSET_IP_END: offset is from ip header end (i.e.
1289 * start of ip payload).
1290 */
1291enum iwl_mvm_bcast_filter_attr_offset {
1292 BCAST_FILTER_OFFSET_PAYLOAD_START = 0,
1293 BCAST_FILTER_OFFSET_IP_END = 1,
1294};
1295
1296/**
1297 * struct iwl_fw_bcast_filter_attr - broadcast filter attribute
1298 * @offset_type: &enum iwl_mvm_bcast_filter_attr_offset.
1299 * @offset: starting offset of this pattern.
1300 * @val: value to match - big endian (MSB is the first
1301 * byte to match from offset pos).
1302 * @mask: mask to match (big endian).
1303 */
1304struct iwl_fw_bcast_filter_attr {
1305 u8 offset_type;
1306 u8 offset;
1307 __le16 reserved1;
1308 __be32 val;
1309 __be32 mask;
1310} __packed; /* BCAST_FILTER_ATT_S_VER_1 */
1311
1312/**
1313 * enum iwl_mvm_bcast_filter_frame_type - filter frame type
1314 * @BCAST_FILTER_FRAME_TYPE_ALL: consider all frames.
1315 * @BCAST_FILTER_FRAME_TYPE_IPV4: consider only ipv4 frames
1316 */
1317enum iwl_mvm_bcast_filter_frame_type {
1318 BCAST_FILTER_FRAME_TYPE_ALL = 0,
1319 BCAST_FILTER_FRAME_TYPE_IPV4 = 1,
1320};
1321
1322/**
1323 * struct iwl_fw_bcast_filter - broadcast filter
1324 * @discard: discard frame (1) or let it pass (0).
1325 * @frame_type: &enum iwl_mvm_bcast_filter_frame_type.
1326 * @num_attrs: number of valid attributes in this filter.
1327 * @attrs: attributes of this filter. a filter is considered matched
1328 * only when all its attributes are matched (i.e. AND relationship)
1329 */
1330struct iwl_fw_bcast_filter {
1331 u8 discard;
1332 u8 frame_type;
1333 u8 num_attrs;
1334 u8 reserved1;
1335 struct iwl_fw_bcast_filter_attr attrs[MAX_BCAST_FILTER_ATTRS];
1336} __packed; /* BCAST_FILTER_S_VER_1 */
1337
1338/**
1339 * struct iwl_fw_bcast_mac - per-mac broadcast filtering configuration.
1340 * @default_discard: default action for this mac (discard (1) / pass (0)).
1341 * @attached_filters: bitmap of relevant filters for this mac.
1342 */
1343struct iwl_fw_bcast_mac {
1344 u8 default_discard;
1345 u8 reserved1;
1346 __le16 attached_filters;
1347} __packed; /* BCAST_MAC_CONTEXT_S_VER_1 */
1348
1349/**
1350 * struct iwl_bcast_filter_cmd - broadcast filtering configuration
1351 * @disable: enable (0) / disable (1)
1352 * @max_bcast_filters: max number of filters (MAX_BCAST_FILTERS)
1353 * @max_macs: max number of macs (NUM_MAC_INDEX_DRIVER)
1354 * @filters: broadcast filters
1355 * @macs: broadcast filtering configuration per-mac
1356 */
1357struct iwl_bcast_filter_cmd {
1358 u8 disable;
1359 u8 max_bcast_filters;
1360 u8 max_macs;
1361 u8 reserved1;
1362 struct iwl_fw_bcast_filter filters[MAX_BCAST_FILTERS];
1363 struct iwl_fw_bcast_mac macs[NUM_MAC_INDEX_DRIVER];
1364} __packed; /* BCAST_FILTERING_HCMD_API_S_VER_1 */
1365
a2d79c57
MG
1366/*
1367 * enum iwl_mvm_marker_id - maker ids
1368 *
1369 * The ids for different type of markers to insert into the usniffer logs
1370 */
1371enum iwl_mvm_marker_id {
1372 MARKER_ID_TX_FRAME_LATENCY = 1,
1373}; /* MARKER_ID_API_E_VER_1 */
1374
1375/**
1376 * struct iwl_mvm_marker - mark info into the usniffer logs
1377 *
1378 * (MARKER_CMD = 0xcb)
1379 *
1380 * Mark the UTC time stamp into the usniffer logs together with additional
1381 * metadata, so the usniffer output can be parsed.
1382 * In the command response the ucode will return the GP2 time.
1383 *
1384 * @dw_len: The amount of dwords following this byte including this byte.
1385 * @marker_id: A unique marker id (iwl_mvm_marker_id).
1386 * @reserved: reserved.
1387 * @timestamp: in milliseconds since 1970-01-01 00:00:00 UTC
1388 * @metadata: additional meta data that will be written to the unsiffer log
1389 */
1390struct iwl_mvm_marker {
1391 u8 dwLen;
1392 u8 markerId;
1393 __le16 reserved;
1394 __le64 timestamp;
1395 __le32 metadata[0];
1396} __packed; /* MARKER_API_S_VER_1 */
1397
1f3b0ff8
LE
1398/***********************************
1399 * Smart Fifo API
1400 ***********************************/
1401/* Smart Fifo state */
1402enum iwl_sf_state {
1403 SF_LONG_DELAY_ON = 0, /* should never be called by driver */
1404 SF_FULL_ON,
1405 SF_UNINIT,
1406 SF_INIT_OFF,
1407 SF_HW_NUM_STATES
1408};
1409
1410/* Smart Fifo possible scenario */
1411enum iwl_sf_scenario {
1412 SF_SCENARIO_SINGLE_UNICAST,
1413 SF_SCENARIO_AGG_UNICAST,
1414 SF_SCENARIO_MULTICAST,
1415 SF_SCENARIO_BA_RESP,
1416 SF_SCENARIO_TX_RESP,
1417 SF_NUM_SCENARIO
1418};
1419
1420#define SF_TRANSIENT_STATES_NUMBER 2 /* SF_LONG_DELAY_ON and SF_FULL_ON */
1421#define SF_NUM_TIMEOUT_TYPES 2 /* Aging timer and Idle timer */
1422
1423/* smart FIFO default values */
b4c82adc 1424#define SF_W_MARK_SISO 6144
1f3b0ff8
LE
1425#define SF_W_MARK_MIMO2 8192
1426#define SF_W_MARK_MIMO3 6144
1427#define SF_W_MARK_LEGACY 4096
1428#define SF_W_MARK_SCAN 4096
1429
f4a3ee49
EH
1430/* SF Scenarios timers for default configuration (aligned to 32 uSec) */
1431#define SF_SINGLE_UNICAST_IDLE_TIMER_DEF 160 /* 150 uSec */
1432#define SF_SINGLE_UNICAST_AGING_TIMER_DEF 400 /* 0.4 mSec */
1433#define SF_AGG_UNICAST_IDLE_TIMER_DEF 160 /* 150 uSec */
1434#define SF_AGG_UNICAST_AGING_TIMER_DEF 400 /* 0.4 mSec */
1435#define SF_MCAST_IDLE_TIMER_DEF 160 /* 150 mSec */
1436#define SF_MCAST_AGING_TIMER_DEF 400 /* 0.4 mSec */
1437#define SF_BA_IDLE_TIMER_DEF 160 /* 150 uSec */
1438#define SF_BA_AGING_TIMER_DEF 400 /* 0.4 mSec */
1439#define SF_TX_RE_IDLE_TIMER_DEF 160 /* 150 uSec */
1440#define SF_TX_RE_AGING_TIMER_DEF 400 /* 0.4 mSec */
1441
1442/* SF Scenarios timers for BSS MAC configuration (aligned to 32 uSec) */
1f3b0ff8
LE
1443#define SF_SINGLE_UNICAST_IDLE_TIMER 320 /* 300 uSec */
1444#define SF_SINGLE_UNICAST_AGING_TIMER 2016 /* 2 mSec */
1445#define SF_AGG_UNICAST_IDLE_TIMER 320 /* 300 uSec */
1446#define SF_AGG_UNICAST_AGING_TIMER 2016 /* 2 mSec */
1447#define SF_MCAST_IDLE_TIMER 2016 /* 2 mSec */
1448#define SF_MCAST_AGING_TIMER 10016 /* 10 mSec */
1449#define SF_BA_IDLE_TIMER 320 /* 300 uSec */
1450#define SF_BA_AGING_TIMER 2016 /* 2 mSec */
1451#define SF_TX_RE_IDLE_TIMER 320 /* 300 uSec */
1452#define SF_TX_RE_AGING_TIMER 2016 /* 2 mSec */
1453
1454#define SF_LONG_DELAY_AGING_TIMER 1000000 /* 1 Sec */
1455
161bdb77
EH
1456#define SF_CFG_DUMMY_NOTIF_OFF BIT(16)
1457
1f3b0ff8
LE
1458/**
1459 * Smart Fifo configuration command.
86974bff 1460 * @state: smart fifo state, types listed in enum %iwl_sf_sate.
1f3b0ff8
LE
1461 * @watermark: Minimum allowed availabe free space in RXF for transient state.
1462 * @long_delay_timeouts: aging and idle timer values for each scenario
1463 * in long delay state.
1464 * @full_on_timeouts: timer values for each scenario in full on state.
1465 */
1466struct iwl_sf_cfg_cmd {
86974bff 1467 __le32 state;
1f3b0ff8
LE
1468 __le32 watermark[SF_TRANSIENT_STATES_NUMBER];
1469 __le32 long_delay_timeouts[SF_NUM_SCENARIO][SF_NUM_TIMEOUT_TYPES];
1470 __le32 full_on_timeouts[SF_NUM_SCENARIO][SF_NUM_TIMEOUT_TYPES];
1471} __packed; /* SF_CFG_API_S_VER_2 */
1472
8ba2d7a1
EH
1473/***********************************
1474 * Location Aware Regulatory (LAR) API - MCC updates
1475 ***********************************/
1476
1477/**
1478 * struct iwl_mcc_update_cmd - Request the device to update geographic
1479 * regulatory profile according to the given MCC (Mobile Country Code).
1480 * The MCC is two letter-code, ascii upper case[A-Z] or '00' for world domain.
1481 * 'ZZ' MCC will be used to switch to NVM default profile; in this case, the
1482 * MCC in the cmd response will be the relevant MCC in the NVM.
1483 * @mcc: given mobile country code
1484 * @source_id: the source from where we got the MCC, see iwl_mcc_source
1485 * @reserved: reserved for alignment
1486 */
1487struct iwl_mcc_update_cmd {
1488 __le16 mcc;
1489 u8 source_id;
1490 u8 reserved;
1491} __packed; /* LAR_UPDATE_MCC_CMD_API_S */
1492
1493/**
1494 * iwl_mcc_update_resp - response to MCC_UPDATE_CMD.
1495 * Contains the new channel control profile map, if changed, and the new MCC
1496 * (mobile country code).
1497 * The new MCC may be different than what was requested in MCC_UPDATE_CMD.
47c8b154 1498 * @status: see &enum iwl_mcc_update_status
8ba2d7a1
EH
1499 * @mcc: the new applied MCC
1500 * @cap: capabilities for all channels which matches the MCC
1501 * @source_id: the MCC source, see iwl_mcc_source
1502 * @n_channels: number of channels in @channels_data (may be 14, 39, 50 or 51
1503 * channels, depending on platform)
1504 * @channels: channel control data map, DWORD for each channel. Only the first
1505 * 16bits are used.
1506 */
1507struct iwl_mcc_update_resp {
1508 __le32 status;
1509 __le16 mcc;
1510 u8 cap;
1511 u8 source_id;
1512 __le32 n_channels;
1513 __le32 channels[0];
1514} __packed; /* LAR_UPDATE_MCC_CMD_RESP_S */
1515
1516/**
1517 * struct iwl_mcc_chub_notif - chub notifies of mcc change
1518 * (MCC_CHUB_UPDATE_CMD = 0xc9)
1519 * The Chub (Communication Hub, CommsHUB) is a HW component that connects to
1520 * the cellular and connectivity cores that gets updates of the mcc, and
1521 * notifies the ucode directly of any mcc change.
1522 * The ucode requests the driver to request the device to update geographic
1523 * regulatory profile according to the given MCC (Mobile Country Code).
1524 * The MCC is two letter-code, ascii upper case[A-Z] or '00' for world domain.
1525 * 'ZZ' MCC will be used to switch to NVM default profile; in this case, the
1526 * MCC in the cmd response will be the relevant MCC in the NVM.
1527 * @mcc: given mobile country code
1528 * @source_id: identity of the change originator, see iwl_mcc_source
1529 * @reserved1: reserved for alignment
1530 */
1531struct iwl_mcc_chub_notif {
1532 u16 mcc;
1533 u8 source_id;
1534 u8 reserved1;
1535} __packed; /* LAR_MCC_NOTIFY_S */
1536
1537enum iwl_mcc_update_status {
1538 MCC_RESP_NEW_CHAN_PROFILE,
1539 MCC_RESP_SAME_CHAN_PROFILE,
1540 MCC_RESP_INVALID,
1541 MCC_RESP_NVM_DISABLED,
1542 MCC_RESP_ILLEGAL,
1543 MCC_RESP_LOW_PRIORITY,
1544};
1545
1546enum iwl_mcc_source {
1547 MCC_SOURCE_OLD_FW = 0,
1548 MCC_SOURCE_ME = 1,
1549 MCC_SOURCE_BIOS = 2,
1550 MCC_SOURCE_3G_LTE_HOST = 3,
1551 MCC_SOURCE_3G_LTE_DEVICE = 4,
1552 MCC_SOURCE_WIFI = 5,
1553 MCC_SOURCE_RESERVED = 6,
1554 MCC_SOURCE_DEFAULT = 7,
1555 MCC_SOURCE_UNINITIALIZED = 8,
1556 MCC_SOURCE_GET_CURRENT = 0x10
1557};
1558
a0a09243
LC
1559/* DTS measurements */
1560
1561enum iwl_dts_measurement_flags {
1562 DTS_TRIGGER_CMD_FLAGS_TEMP = BIT(0),
1563 DTS_TRIGGER_CMD_FLAGS_VOLT = BIT(1),
1564};
1565
1566/**
1567 * iwl_dts_measurement_cmd - request DTS temperature and/or voltage measurements
1568 *
1569 * @flags: indicates which measurements we want as specified in &enum
1570 * iwl_dts_measurement_flags
1571 */
1572struct iwl_dts_measurement_cmd {
1573 __le32 flags;
1574} __packed; /* TEMPERATURE_MEASUREMENT_TRIGGER_CMD_S */
1575
1576/**
1577 * iwl_dts_measurement_notif - notification received with the measurements
1578 *
1579 * @temp: the measured temperature
1580 * @voltage: the measured voltage
1581 */
1582struct iwl_dts_measurement_notif {
1583 __le32 temp;
1584 __le32 voltage;
1585} __packed; /* TEMPERATURE_MEASUREMENT_TRIGGER_NTFY_S */
1586
77c5d7ef
AN
1587/***********************************
1588 * TDLS API
1589 ***********************************/
1590
1591/* Type of TDLS request */
1592enum iwl_tdls_channel_switch_type {
1593 TDLS_SEND_CHAN_SW_REQ = 0,
1594 TDLS_SEND_CHAN_SW_RESP_AND_MOVE_CH,
1595 TDLS_MOVE_CH,
1596}; /* TDLS_STA_CHANNEL_SWITCH_CMD_TYPE_API_E_VER_1 */
1597
1598/**
1599 * Switch timing sub-element in a TDLS channel-switch command
1600 * @frame_timestamp: GP2 timestamp of channel-switch request/response packet
1601 * received from peer
1602 * @max_offchan_duration: What amount of microseconds out of a DTIM is given
1603 * to the TDLS off-channel communication. For instance if the DTIM is
1604 * 200TU and the TDLS peer is to be given 25% of the time, the value
1605 * given will be 50TU, or 50 * 1024 if translated into microseconds.
1606 * @switch_time: switch time the peer sent in its channel switch timing IE
1607 * @switch_timout: switch timeout the peer sent in its channel switch timing IE
1608 */
1609struct iwl_tdls_channel_switch_timing {
1610 __le32 frame_timestamp; /* GP2 time of peer packet Rx */
1611 __le32 max_offchan_duration; /* given in micro-seconds */
1612 __le32 switch_time; /* given in micro-seconds */
1613 __le32 switch_timeout; /* given in micro-seconds */
1614} __packed; /* TDLS_STA_CHANNEL_SWITCH_TIMING_DATA_API_S_VER_1 */
1615
1616#define IWL_TDLS_CH_SW_FRAME_MAX_SIZE 200
1617
1618/**
1619 * TDLS channel switch frame template
1620 *
1621 * A template representing a TDLS channel-switch request or response frame
1622 *
1623 * @switch_time_offset: offset to the channel switch timing IE in the template
1624 * @tx_cmd: Tx parameters for the frame
1625 * @data: frame data
1626 */
1627struct iwl_tdls_channel_switch_frame {
1628 __le32 switch_time_offset;
1629 struct iwl_tx_cmd tx_cmd;
1630 u8 data[IWL_TDLS_CH_SW_FRAME_MAX_SIZE];
1631} __packed; /* TDLS_STA_CHANNEL_SWITCH_FRAME_API_S_VER_1 */
1632
1633/**
1634 * TDLS channel switch command
1635 *
1636 * The command is sent to initiate a channel switch and also in response to
1637 * incoming TDLS channel-switch request/response packets from remote peers.
1638 *
1639 * @switch_type: see &enum iwl_tdls_channel_switch_type
1640 * @peer_sta_id: station id of TDLS peer
1641 * @ci: channel we switch to
1642 * @timing: timing related data for command
1643 * @frame: channel-switch request/response template, depending to switch_type
1644 */
1645struct iwl_tdls_channel_switch_cmd {
1646 u8 switch_type;
1647 __le32 peer_sta_id;
1648 struct iwl_fw_channel_info ci;
1649 struct iwl_tdls_channel_switch_timing timing;
1650 struct iwl_tdls_channel_switch_frame frame;
1651} __packed; /* TDLS_STA_CHANNEL_SWITCH_CMD_API_S_VER_1 */
1652
1653/**
1654 * TDLS channel switch start notification
1655 *
1656 * @status: non-zero on success
1657 * @offchannel_duration: duration given in microseconds
1658 * @sta_id: peer currently performing the channel-switch with
1659 */
1660struct iwl_tdls_channel_switch_notif {
1661 __le32 status;
1662 __le32 offchannel_duration;
1663 __le32 sta_id;
1664} __packed; /* TDLS_STA_CHANNEL_SWITCH_NTFY_API_S_VER_1 */
1665
307e4723
AN
1666/**
1667 * TDLS station info
1668 *
1669 * @sta_id: station id of the TDLS peer
1670 * @tx_to_peer_tid: TID reserved vs. the peer for FW based Tx
1671 * @tx_to_peer_ssn: initial SSN the FW should use for Tx on its TID vs the peer
1672 * @is_initiator: 1 if the peer is the TDLS link initiator, 0 otherwise
1673 */
1674struct iwl_tdls_sta_info {
1675 u8 sta_id;
1676 u8 tx_to_peer_tid;
1677 __le16 tx_to_peer_ssn;
1678 __le32 is_initiator;
1679} __packed; /* TDLS_STA_INFO_VER_1 */
1680
1681/**
1682 * TDLS basic config command
1683 *
1684 * @id_and_color: MAC id and color being configured
1685 * @tdls_peer_count: amount of currently connected TDLS peers
1686 * @tx_to_ap_tid: TID reverved vs. the AP for FW based Tx
1687 * @tx_to_ap_ssn: initial SSN the FW should use for Tx on its TID vs. the AP
1688 * @sta_info: per-station info. Only the first tdls_peer_count entries are set
1689 * @pti_req_data_offset: offset of network-level data for the PTI template
1690 * @pti_req_tx_cmd: Tx parameters for PTI request template
1691 * @pti_req_template: PTI request template data
1692 */
1693struct iwl_tdls_config_cmd {
1694 __le32 id_and_color; /* mac id and color */
1695 u8 tdls_peer_count;
1696 u8 tx_to_ap_tid;
1697 __le16 tx_to_ap_ssn;
1698 struct iwl_tdls_sta_info sta_info[IWL_MVM_TDLS_STA_COUNT];
1699
1700 __le32 pti_req_data_offset;
1701 struct iwl_tx_cmd pti_req_tx_cmd;
1702 u8 pti_req_template[0];
1703} __packed; /* TDLS_CONFIG_CMD_API_S_VER_1 */
1704
1705/**
1706 * TDLS per-station config information from FW
1707 *
1708 * @sta_id: station id of the TDLS peer
1709 * @tx_to_peer_last_seq: last sequence number used by FW during FW-based Tx to
1710 * the peer
1711 */
1712struct iwl_tdls_config_sta_info_res {
1713 __le16 sta_id;
1714 __le16 tx_to_peer_last_seq;
1715} __packed; /* TDLS_STA_INFO_RSP_VER_1 */
1716
1717/**
1718 * TDLS config information from FW
1719 *
1720 * @tx_to_ap_last_seq: last sequence number used by FW during FW-based Tx to AP
1721 * @sta_info: per-station TDLS config information
1722 */
1723struct iwl_tdls_config_res {
1724 __le32 tx_to_ap_last_seq;
1725 struct iwl_tdls_config_sta_info_res sta_info[IWL_MVM_TDLS_STA_COUNT];
1726} __packed; /* TDLS_CONFIG_RSP_API_S_VER_1 */
1727
04fd2c28
LK
1728#define TX_FIFO_MAX_NUM 8
1729#define RX_FIFO_MAX_NUM 2
1730
1731/**
1732 * Shared memory configuration information from the FW
1733 *
1734 * @shared_mem_addr: shared memory addr (pre 8000 HW set to 0x0 as MARBH is not
1735 * accessible)
1736 * @shared_mem_size: shared memory size
1737 * @sample_buff_addr: internal sample (mon/adc) buff addr (pre 8000 HW set to
1738 * 0x0 as accessible only via DBGM RDAT)
1739 * @sample_buff_size: internal sample buff size
1740 * @txfifo_addr: start addr of TXF0 (excluding the context table 0.5KB), (pre
1741 * 8000 HW set to 0x0 as not accessible)
1742 * @txfifo_size: size of TXF0 ... TXF7
1743 * @rxfifo_size: RXF1, RXF2 sizes. If there is no RXF2, it'll have a value of 0
1744 * @page_buff_addr: used by UMAC and performance debug (page miss analysis),
1745 * when paging is not supported this should be 0
1746 * @page_buff_size: size of %page_buff_addr
1747 */
1748struct iwl_shared_mem_cfg {
1749 __le32 shared_mem_addr;
1750 __le32 shared_mem_size;
1751 __le32 sample_buff_addr;
1752 __le32 sample_buff_size;
1753 __le32 txfifo_addr;
1754 __le32 txfifo_size[TX_FIFO_MAX_NUM];
1755 __le32 rxfifo_size[RX_FIFO_MAX_NUM];
1756 __le32 page_buff_addr;
1757 __le32 page_buff_size;
1758} __packed; /* SHARED_MEM_ALLOC_API_S_VER_1 */
1759
8ca151b5 1760#endif /* __fw_api_h__ */
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