iwlwifi: pcie: prevent using unmapped memory in fw monitor
[deliverable/linux.git] / drivers / net / wireless / iwlwifi / mvm / fw.c
CommitLineData
8ca151b5
JB
1/******************************************************************************
2 *
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
5 *
6 * GPL LICENSE SUMMARY
7 *
51368bf7 8 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
8b4139dc 9 * Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH
8ca151b5
JB
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of version 2 of the GNU General Public License as
13 * published by the Free Software Foundation.
14 *
15 * This program is distributed in the hope that it will be useful, but
16 * WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 * General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
23 * USA
24 *
25 * The full GNU General Public License is included in this distribution
410dc5aa 26 * in the file called COPYING.
8ca151b5
JB
27 *
28 * Contact Information:
29 * Intel Linux Wireless <ilw@linux.intel.com>
30 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
31 *
32 * BSD LICENSE
33 *
51368bf7 34 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
8b4139dc 35 * Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH
8ca151b5
JB
36 * All rights reserved.
37 *
38 * Redistribution and use in source and binary forms, with or without
39 * modification, are permitted provided that the following conditions
40 * are met:
41 *
42 * * Redistributions of source code must retain the above copyright
43 * notice, this list of conditions and the following disclaimer.
44 * * Redistributions in binary form must reproduce the above copyright
45 * notice, this list of conditions and the following disclaimer in
46 * the documentation and/or other materials provided with the
47 * distribution.
48 * * Neither the name Intel Corporation nor the names of its
49 * contributors may be used to endorse or promote products derived
50 * from this software without specific prior written permission.
51 *
52 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
53 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
54 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
55 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
56 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
57 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
58 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
59 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
60 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
61 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
62 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
63 *
64 *****************************************************************************/
65#include <net/mac80211.h>
66
67#include "iwl-trans.h"
68#include "iwl-op-mode.h"
69#include "iwl-fw.h"
70#include "iwl-debug.h"
71#include "iwl-csr.h" /* for iwl_mvm_rx_card_state_notif */
72#include "iwl-io.h" /* for iwl_mvm_rx_card_state_notif */
8c23f95c 73#include "iwl-prph.h"
8ca151b5
JB
74#include "iwl-eeprom-parse.h"
75
76#include "mvm.h"
77#include "iwl-phy-db.h"
78
79#define MVM_UCODE_ALIVE_TIMEOUT HZ
80#define MVM_UCODE_CALIB_TIMEOUT (2*HZ)
81
82#define UCODE_VALID_OK cpu_to_le32(0x1)
83
8ca151b5
JB
84struct iwl_mvm_alive_data {
85 bool valid;
86 u32 scd_base_addr;
87};
88
89static inline const struct fw_img *
90iwl_get_ucode_image(struct iwl_mvm *mvm, enum iwl_ucode_type ucode_type)
91{
92 if (ucode_type >= IWL_UCODE_TYPE_MAX)
93 return NULL;
94
95 return &mvm->fw->img[ucode_type];
96}
97
98static int iwl_send_tx_ant_cfg(struct iwl_mvm *mvm, u8 valid_tx_ant)
99{
100 struct iwl_tx_ant_cfg_cmd tx_ant_cmd = {
101 .valid = cpu_to_le32(valid_tx_ant),
102 };
103
33223542 104 IWL_DEBUG_FW(mvm, "select valid tx ant: %u\n", valid_tx_ant);
a1022927 105 return iwl_mvm_send_cmd_pdu(mvm, TX_ANT_CONFIGURATION_CMD, 0,
8ca151b5
JB
106 sizeof(tx_ant_cmd), &tx_ant_cmd);
107}
108
109static bool iwl_alive_fn(struct iwl_notif_wait_data *notif_wait,
110 struct iwl_rx_packet *pkt, void *data)
111{
112 struct iwl_mvm *mvm =
113 container_of(notif_wait, struct iwl_mvm, notif_wait);
114 struct iwl_mvm_alive_data *alive_data = data;
7e1223b5 115 struct mvm_alive_resp_ver1 *palive1;
01a9ca51 116 struct mvm_alive_resp_ver2 *palive2;
7e1223b5 117 struct mvm_alive_resp *palive;
01a9ca51 118
7e1223b5
EG
119 if (iwl_rx_packet_payload_len(pkt) == sizeof(*palive1)) {
120 palive1 = (void *)pkt->data;
01a9ca51
EH
121
122 mvm->support_umac_log = false;
123 mvm->error_event_table =
7e1223b5
EG
124 le32_to_cpu(palive1->error_event_table_ptr);
125 mvm->log_event_table =
126 le32_to_cpu(palive1->log_event_table_ptr);
127 alive_data->scd_base_addr = le32_to_cpu(palive1->scd_base_ptr);
01a9ca51 128
7e1223b5 129 alive_data->valid = le16_to_cpu(palive1->status) ==
01a9ca51
EH
130 IWL_ALIVE_STATUS_OK;
131 IWL_DEBUG_FW(mvm,
132 "Alive VER1 ucode status 0x%04x revision 0x%01X 0x%01X flags 0x%01X\n",
7e1223b5
EG
133 le16_to_cpu(palive1->status), palive1->ver_type,
134 palive1->ver_subtype, palive1->flags);
135 } else if (iwl_rx_packet_payload_len(pkt) == sizeof(*palive2)) {
01a9ca51
EH
136 palive2 = (void *)pkt->data;
137
01a9ca51
EH
138 mvm->error_event_table =
139 le32_to_cpu(palive2->error_event_table_ptr);
140 mvm->log_event_table =
141 le32_to_cpu(palive2->log_event_table_ptr);
142 alive_data->scd_base_addr = le32_to_cpu(palive2->scd_base_ptr);
143 mvm->umac_error_event_table =
144 le32_to_cpu(palive2->error_info_addr);
91479b64
EH
145 mvm->sf_space.addr = le32_to_cpu(palive2->st_fwrd_addr);
146 mvm->sf_space.size = le32_to_cpu(palive2->st_fwrd_size);
01a9ca51
EH
147
148 alive_data->valid = le16_to_cpu(palive2->status) ==
149 IWL_ALIVE_STATUS_OK;
ffa70264
EG
150 if (mvm->umac_error_event_table)
151 mvm->support_umac_log = true;
152
01a9ca51
EH
153 IWL_DEBUG_FW(mvm,
154 "Alive VER2 ucode status 0x%04x revision 0x%01X 0x%01X flags 0x%01X\n",
155 le16_to_cpu(palive2->status), palive2->ver_type,
156 palive2->ver_subtype, palive2->flags);
157
158 IWL_DEBUG_FW(mvm,
159 "UMAC version: Major - 0x%x, Minor - 0x%x\n",
160 palive2->umac_major, palive2->umac_minor);
7e1223b5
EG
161 } else if (iwl_rx_packet_payload_len(pkt) == sizeof(*palive)) {
162 palive = (void *)pkt->data;
163
164 mvm->error_event_table =
165 le32_to_cpu(palive->error_event_table_ptr);
166 mvm->log_event_table =
167 le32_to_cpu(palive->log_event_table_ptr);
168 alive_data->scd_base_addr = le32_to_cpu(palive->scd_base_ptr);
169 mvm->umac_error_event_table =
170 le32_to_cpu(palive->error_info_addr);
171 mvm->sf_space.addr = le32_to_cpu(palive->st_fwrd_addr);
172 mvm->sf_space.size = le32_to_cpu(palive->st_fwrd_size);
173
174 alive_data->valid = le16_to_cpu(palive->status) ==
175 IWL_ALIVE_STATUS_OK;
176 if (mvm->umac_error_event_table)
177 mvm->support_umac_log = true;
178
179 IWL_DEBUG_FW(mvm,
180 "Alive VER3 ucode status 0x%04x revision 0x%01X 0x%01X flags 0x%01X\n",
181 le16_to_cpu(palive->status), palive->ver_type,
182 palive->ver_subtype, palive->flags);
183
184 IWL_DEBUG_FW(mvm,
185 "UMAC version: Major - 0x%x, Minor - 0x%x\n",
186 le32_to_cpu(palive->umac_major),
187 le32_to_cpu(palive->umac_minor));
01a9ca51 188 }
8ca151b5
JB
189
190 return true;
191}
192
193static bool iwl_wait_phy_db_entry(struct iwl_notif_wait_data *notif_wait,
194 struct iwl_rx_packet *pkt, void *data)
195{
196 struct iwl_phy_db *phy_db = data;
197
198 if (pkt->hdr.cmd != CALIB_RES_NOTIF_PHY_DB) {
199 WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF);
200 return true;
201 }
202
203 WARN_ON(iwl_phy_db_set_section(phy_db, pkt, GFP_ATOMIC));
204
205 return false;
206}
207
208static int iwl_mvm_load_ucode_wait_alive(struct iwl_mvm *mvm,
209 enum iwl_ucode_type ucode_type)
210{
211 struct iwl_notification_wait alive_wait;
212 struct iwl_mvm_alive_data alive_data;
213 const struct fw_img *fw;
214 int ret, i;
215 enum iwl_ucode_type old_type = mvm->cur_ucode;
216 static const u8 alive_cmd[] = { MVM_ALIVE };
91479b64 217 struct iwl_sf_region st_fwrd_space;
8ca151b5 218
61df750c 219 if (ucode_type == IWL_UCODE_REGULAR &&
d2709ad7 220 iwl_fw_dbg_conf_usniffer(mvm->fw, FW_DBG_START_FROM_ALIVE))
61df750c
EH
221 fw = iwl_get_ucode_image(mvm, IWL_UCODE_REGULAR_USNIFFER);
222 else
223 fw = iwl_get_ucode_image(mvm, ucode_type);
befe9b6f 224 if (WARN_ON(!fw))
8ca151b5 225 return -EINVAL;
befe9b6f
JB
226 mvm->cur_ucode = ucode_type;
227 mvm->ucode_loaded = false;
8ca151b5
JB
228
229 iwl_init_notification_wait(&mvm->notif_wait, &alive_wait,
230 alive_cmd, ARRAY_SIZE(alive_cmd),
231 iwl_alive_fn, &alive_data);
232
233 ret = iwl_trans_start_fw(mvm->trans, fw, ucode_type == IWL_UCODE_INIT);
234 if (ret) {
235 mvm->cur_ucode = old_type;
236 iwl_remove_notification(&mvm->notif_wait, &alive_wait);
237 return ret;
238 }
239
240 /*
241 * Some things may run in the background now, but we
242 * just wait for the ALIVE notification here.
243 */
244 ret = iwl_wait_notification(&mvm->notif_wait, &alive_wait,
245 MVM_UCODE_ALIVE_TIMEOUT);
246 if (ret) {
247 mvm->cur_ucode = old_type;
248 return ret;
249 }
250
251 if (!alive_data.valid) {
252 IWL_ERR(mvm, "Loaded ucode is not valid!\n");
253 mvm->cur_ucode = old_type;
254 return -EIO;
255 }
256
91479b64
EH
257 /*
258 * update the sdio allocation according to the pointer we get in the
259 * alive notification.
260 */
261 st_fwrd_space.addr = mvm->sf_space.addr;
262 st_fwrd_space.size = mvm->sf_space.size;
263 ret = iwl_trans_update_sf(mvm->trans, &st_fwrd_space);
82e8aea0
ES
264 if (ret) {
265 IWL_ERR(mvm, "Failed to update SF size. ret %d\n", ret);
266 return ret;
267 }
91479b64 268
8ca151b5
JB
269 iwl_trans_fw_alive(mvm->trans, alive_data.scd_base_addr);
270
271 /*
272 * Note: all the queues are enabled as part of the interface
273 * initialization, but in firmware restart scenarios they
274 * could be stopped, so wake them up. In firmware restart,
275 * mac80211 will have the queues stopped as well until the
276 * reconfiguration completes. During normal startup, they
277 * will be empty.
278 */
279
280 for (i = 0; i < IWL_MAX_HW_QUEUES; i++) {
19e737c9 281 if (i < mvm->first_agg_queue && i != IWL_MVM_CMD_QUEUE)
8ca151b5
JB
282 mvm->queue_to_mac80211[i] = i;
283 else
284 mvm->queue_to_mac80211[i] = IWL_INVALID_MAC80211_QUEUE;
8ca151b5
JB
285 }
286
df197c00
JB
287 for (i = 0; i < IEEE80211_MAX_QUEUES; i++)
288 atomic_set(&mvm->mac80211_queue_stop_count[i], 0);
8ca151b5
JB
289
290 mvm->ucode_loaded = true;
291
292 return 0;
293}
8ca151b5
JB
294
295static int iwl_send_phy_cfg_cmd(struct iwl_mvm *mvm)
296{
297 struct iwl_phy_cfg_cmd phy_cfg_cmd;
298 enum iwl_ucode_type ucode_type = mvm->cur_ucode;
299
300 /* Set parameters */
a0544272 301 phy_cfg_cmd.phy_cfg = cpu_to_le32(iwl_mvm_get_phy_config(mvm));
8ca151b5
JB
302 phy_cfg_cmd.calib_control.event_trigger =
303 mvm->fw->default_calib[ucode_type].event_trigger;
304 phy_cfg_cmd.calib_control.flow_trigger =
305 mvm->fw->default_calib[ucode_type].flow_trigger;
306
307 IWL_DEBUG_INFO(mvm, "Sending Phy CFG command: 0x%x\n",
308 phy_cfg_cmd.phy_cfg);
309
a1022927 310 return iwl_mvm_send_cmd_pdu(mvm, PHY_CONFIGURATION_CMD, 0,
8ca151b5
JB
311 sizeof(phy_cfg_cmd), &phy_cfg_cmd);
312}
313
8ca151b5
JB
314int iwl_run_init_mvm_ucode(struct iwl_mvm *mvm, bool read_nvm)
315{
316 struct iwl_notification_wait calib_wait;
317 static const u8 init_complete[] = {
318 INIT_COMPLETE_NOTIF,
319 CALIB_RES_NOTIF_PHY_DB
320 };
321 int ret;
322
323 lockdep_assert_held(&mvm->mutex);
324
31b8b343 325 if (WARN_ON_ONCE(mvm->init_ucode_complete || mvm->calibrating))
8ca151b5
JB
326 return 0;
327
328 iwl_init_notification_wait(&mvm->notif_wait,
329 &calib_wait,
330 init_complete,
331 ARRAY_SIZE(init_complete),
332 iwl_wait_phy_db_entry,
333 mvm->phy_db);
334
335 /* Will also start the device */
336 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_INIT);
337 if (ret) {
338 IWL_ERR(mvm, "Failed to start INIT ucode: %d\n", ret);
339 goto error;
340 }
341
ae397472 342 ret = iwl_send_bt_init_conf(mvm);
931d4160
EG
343 if (ret)
344 goto error;
345
81a67e32 346 /* Read the NVM only at driver load time, no need to do this twice */
8ca151b5
JB
347 if (read_nvm) {
348 /* Read nvm */
14b485f0 349 ret = iwl_nvm_init(mvm, true);
8ca151b5
JB
350 if (ret) {
351 IWL_ERR(mvm, "Failed to read NVM: %d\n", ret);
352 goto error;
353 }
354 }
355
81a67e32 356 /* In case we read the NVM from external file, load it to the NIC */
e02a9d60 357 if (mvm->nvm_file_name)
81a67e32
EL
358 iwl_mvm_load_nvm_to_nic(mvm);
359
8ca151b5
JB
360 ret = iwl_nvm_check_version(mvm->nvm_data, mvm->trans);
361 WARN_ON(ret);
362
4f59334b
EH
363 /*
364 * abort after reading the nvm in case RF Kill is on, we will complete
365 * the init seq later when RF kill will switch to off
366 */
9ee718aa 367 if (iwl_mvm_is_radio_killed(mvm)) {
4f59334b
EH
368 IWL_DEBUG_RF_KILL(mvm,
369 "jump over all phy activities due to RF kill\n");
370 iwl_remove_notification(&mvm->notif_wait, &calib_wait);
a4082843
AN
371 ret = 1;
372 goto out;
4f59334b
EH
373 }
374
31b8b343
EG
375 mvm->calibrating = true;
376
e07cbb53 377 /* Send TX valid antennas before triggering calibrations */
a0544272 378 ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
e07cbb53
DS
379 if (ret)
380 goto error;
381
8ca151b5
JB
382 /*
383 * Send phy configurations command to init uCode
384 * to start the 16.0 uCode init image internal calibrations.
385 */
386 ret = iwl_send_phy_cfg_cmd(mvm);
387 if (ret) {
388 IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n",
389 ret);
390 goto error;
391 }
392
393 /*
394 * Some things may run in the background now, but we
395 * just wait for the calibration complete notification.
396 */
397 ret = iwl_wait_notification(&mvm->notif_wait, &calib_wait,
398 MVM_UCODE_CALIB_TIMEOUT);
399 if (!ret)
ff116373 400 mvm->init_ucode_complete = true;
31b8b343
EG
401
402 if (ret && iwl_mvm_is_radio_killed(mvm)) {
403 IWL_DEBUG_RF_KILL(mvm, "RFKILL while calibrating.\n");
404 ret = 1;
405 }
8ca151b5
JB
406 goto out;
407
408error:
409 iwl_remove_notification(&mvm->notif_wait, &calib_wait);
410out:
31b8b343 411 mvm->calibrating = false;
a4082843 412 if (iwlmvm_mod_params.init_dbg && !mvm->nvm_data) {
8ca151b5
JB
413 /* we want to debug INIT and we have no NVM - fake */
414 mvm->nvm_data = kzalloc(sizeof(struct iwl_nvm_data) +
415 sizeof(struct ieee80211_channel) +
416 sizeof(struct ieee80211_rate),
417 GFP_KERNEL);
418 if (!mvm->nvm_data)
419 return -ENOMEM;
8ca151b5
JB
420 mvm->nvm_data->bands[0].channels = mvm->nvm_data->channels;
421 mvm->nvm_data->bands[0].n_channels = 1;
422 mvm->nvm_data->bands[0].n_bitrates = 1;
423 mvm->nvm_data->bands[0].bitrates =
424 (void *)mvm->nvm_data->channels + 1;
425 mvm->nvm_data->bands[0].bitrates->hw_value = 10;
426 }
427
428 return ret;
429}
430
04fd2c28
LK
431static void iwl_mvm_get_shared_mem_conf(struct iwl_mvm *mvm)
432{
433 struct iwl_host_cmd cmd = {
434 .id = SHARED_MEM_CFG,
435 .flags = CMD_WANT_SKB,
436 .data = { NULL, },
437 .len = { 0, },
438 };
439 struct iwl_rx_packet *pkt;
440 struct iwl_shared_mem_cfg *mem_cfg;
441 u32 i;
442
443 lockdep_assert_held(&mvm->mutex);
444
445 if (WARN_ON(iwl_mvm_send_cmd(mvm, &cmd)))
446 return;
447
448 pkt = cmd.resp_pkt;
449 if (pkt->hdr.flags & IWL_CMD_FAILED_MSK) {
450 IWL_ERR(mvm, "Bad return from SHARED_MEM_CFG (0x%08X)\n",
451 pkt->hdr.flags);
452 goto exit;
453 }
454
455 mem_cfg = (void *)pkt->data;
456
457 mvm->shared_mem_cfg.shared_mem_addr =
458 le32_to_cpu(mem_cfg->shared_mem_addr);
459 mvm->shared_mem_cfg.shared_mem_size =
460 le32_to_cpu(mem_cfg->shared_mem_size);
461 mvm->shared_mem_cfg.sample_buff_addr =
462 le32_to_cpu(mem_cfg->sample_buff_addr);
463 mvm->shared_mem_cfg.sample_buff_size =
464 le32_to_cpu(mem_cfg->sample_buff_size);
465 mvm->shared_mem_cfg.txfifo_addr = le32_to_cpu(mem_cfg->txfifo_addr);
466 for (i = 0; i < ARRAY_SIZE(mvm->shared_mem_cfg.txfifo_size); i++)
467 mvm->shared_mem_cfg.txfifo_size[i] =
468 le32_to_cpu(mem_cfg->txfifo_size[i]);
469 for (i = 0; i < ARRAY_SIZE(mvm->shared_mem_cfg.rxfifo_size); i++)
470 mvm->shared_mem_cfg.rxfifo_size[i] =
471 le32_to_cpu(mem_cfg->rxfifo_size[i]);
472 mvm->shared_mem_cfg.page_buff_addr =
473 le32_to_cpu(mem_cfg->page_buff_addr);
474 mvm->shared_mem_cfg.page_buff_size =
475 le32_to_cpu(mem_cfg->page_buff_size);
476 IWL_DEBUG_INFO(mvm, "SHARED MEM CFG: got memory offsets/sizes\n");
477
478exit:
479 iwl_free_resp(&cmd);
480}
481
b6eaa45a
EG
482int iwl_mvm_fw_dbg_collect_desc(struct iwl_mvm *mvm,
483 struct iwl_mvm_dump_desc *desc,
484 unsigned int delay)
8c23f95c 485{
d2709ad7
EG
486 if (test_and_set_bit(IWL_MVM_STATUS_DUMPING_FW_LOG, &mvm->status))
487 return -EBUSY;
488
b6eaa45a
EG
489 if (WARN_ON(mvm->fw_dump_desc))
490 iwl_mvm_free_fw_dump_desc(mvm);
491
492 IWL_WARN(mvm, "Collecting data: trigger %d fired.\n",
493 le32_to_cpu(desc->trig_desc.type));
494
495 mvm->fw_dump_desc = desc;
d2709ad7 496
d2709ad7
EG
497 queue_delayed_work(system_wq, &mvm->fw_dump_wk, delay);
498
499 return 0;
500}
501
b6eaa45a
EG
502int iwl_mvm_fw_dbg_collect(struct iwl_mvm *mvm, enum iwl_fw_dbg_trigger trig,
503 const char *str, size_t len, unsigned int delay)
504{
505 struct iwl_mvm_dump_desc *desc;
506
507 desc = kzalloc(sizeof(*desc) + len, GFP_ATOMIC);
508 if (!desc)
509 return -ENOMEM;
510
511 desc->len = len;
512 desc->trig_desc.type = cpu_to_le32(trig);
513 memcpy(desc->trig_desc.data, str, len);
514
515 return iwl_mvm_fw_dbg_collect_desc(mvm, desc, delay);
516}
517
d2709ad7 518int iwl_mvm_fw_dbg_collect_trig(struct iwl_mvm *mvm,
b6eaa45a 519 struct iwl_fw_dbg_trigger_tlv *trigger,
5d4f929e 520 const char *fmt, ...)
d2709ad7
EG
521{
522 unsigned int delay = msecs_to_jiffies(le32_to_cpu(trigger->stop_delay));
523 u16 occurrences = le16_to_cpu(trigger->occurrences);
5d4f929e
JB
524 int ret, len = 0;
525 char buf[64];
d2709ad7
EG
526
527 if (!occurrences)
528 return 0;
529
5d4f929e
JB
530 if (fmt) {
531 va_list ap;
532
533 buf[sizeof(buf) - 1] = '\0';
534
535 va_start(ap, fmt);
536 vsnprintf(buf, sizeof(buf), fmt, ap);
537 va_end(ap);
538
539 /* check for truncation */
540 if (WARN_ON_ONCE(buf[sizeof(buf) - 1]))
541 buf[sizeof(buf) - 1] = '\0';
542
543 len = strlen(buf) + 1;
544 }
545
546 ret = iwl_mvm_fw_dbg_collect(mvm, le32_to_cpu(trigger->id), buf,
b6eaa45a 547 len, delay);
d2709ad7
EG
548 if (ret)
549 return ret;
550
551 trigger->occurrences = cpu_to_le16(occurrences - 1);
552 return 0;
8c23f95c
EG
553}
554
945d4202
EG
555static inline void iwl_mvm_restart_early_start(struct iwl_mvm *mvm)
556{
557 if (mvm->cfg->device_family == IWL_DEVICE_FAMILY_7000)
558 iwl_clear_bits_prph(mvm->trans, MON_BUFF_SAMPLE_CTL, 0x100);
559 else
560 iwl_write_prph(mvm->trans, DBGC_IN_SAMPLE, 1);
561}
562
d2709ad7 563int iwl_mvm_start_fw_dbg_conf(struct iwl_mvm *mvm, u8 conf_id)
6a951267
LK
564{
565 u8 *ptr;
566 int ret;
567 int i;
568
569 if (WARN_ONCE(conf_id >= ARRAY_SIZE(mvm->fw->dbg_conf_tlv),
570 "Invalid configuration %d\n", conf_id))
571 return -EINVAL;
572
945d4202
EG
573 /* EARLY START - firmware's configuration is hard coded */
574 if ((!mvm->fw->dbg_conf_tlv[conf_id] ||
575 !mvm->fw->dbg_conf_tlv[conf_id]->num_of_hcmds) &&
576 conf_id == FW_DBG_START_FROM_ALIVE) {
577 iwl_mvm_restart_early_start(mvm);
578 return 0;
579 }
580
6a951267
LK
581 if (!mvm->fw->dbg_conf_tlv[conf_id])
582 return -EINVAL;
583
584 if (mvm->fw_dbg_conf != FW_DBG_INVALID)
585 IWL_WARN(mvm, "FW already configured (%d) - re-configuring\n",
586 mvm->fw_dbg_conf);
587
588 /* Send all HCMDs for configuring the FW debug */
589 ptr = (void *)&mvm->fw->dbg_conf_tlv[conf_id]->hcmd;
590 for (i = 0; i < mvm->fw->dbg_conf_tlv[conf_id]->num_of_hcmds; i++) {
591 struct iwl_fw_dbg_conf_hcmd *cmd = (void *)ptr;
592
593 ret = iwl_mvm_send_cmd_pdu(mvm, cmd->id, 0,
594 le16_to_cpu(cmd->len), cmd->data);
595 if (ret)
596 return ret;
597
598 ptr += sizeof(*cmd);
599 ptr += le16_to_cpu(cmd->len);
600 }
601
602 mvm->fw_dbg_conf = conf_id;
603 return ret;
604}
605
84bfffa9
EG
606static int iwl_mvm_config_ltr_v1(struct iwl_mvm *mvm)
607{
608 struct iwl_ltr_config_cmd_v1 cmd_v1 = {
609 .flags = cpu_to_le32(LTR_CFG_FLAG_FEATURE_ENABLE),
610 };
611
612 if (!mvm->trans->ltr_enabled)
613 return 0;
614
615 return iwl_mvm_send_cmd_pdu(mvm, LTR_CONFIG, 0,
616 sizeof(cmd_v1), &cmd_v1);
617}
618
619static int iwl_mvm_config_ltr(struct iwl_mvm *mvm)
620{
621 struct iwl_ltr_config_cmd cmd = {
622 .flags = cpu_to_le32(LTR_CFG_FLAG_FEATURE_ENABLE),
623 };
624
625 if (!mvm->trans->ltr_enabled)
626 return 0;
627
628 if (!(mvm->fw->ucode_capa.api[0] & IWL_UCODE_TLV_API_HDC_PHASE_0))
629 return iwl_mvm_config_ltr_v1(mvm);
630
631 return iwl_mvm_send_cmd_pdu(mvm, LTR_CONFIG, 0,
632 sizeof(cmd), &cmd);
633}
634
8ca151b5
JB
635int iwl_mvm_up(struct iwl_mvm *mvm)
636{
637 int ret, i;
53a9d61e
IP
638 struct ieee80211_channel *chan;
639 struct cfg80211_chan_def chandef;
8ca151b5
JB
640
641 lockdep_assert_held(&mvm->mutex);
642
643 ret = iwl_trans_start_hw(mvm->trans);
644 if (ret)
645 return ret;
646
ff116373
EL
647 /*
648 * If we haven't completed the run of the init ucode during
649 * module loading, load init ucode now
650 * (for example, if we were in RFKILL)
651 */
652 if (!mvm->init_ucode_complete) {
8ca151b5
JB
653 ret = iwl_run_init_mvm_ucode(mvm, false);
654 if (ret && !iwlmvm_mod_params.init_dbg) {
655 IWL_ERR(mvm, "Failed to run INIT ucode: %d\n", ret);
4f59334b
EH
656 /* this can't happen */
657 if (WARN_ON(ret > 0))
658 ret = -ERFKILL;
8ca151b5
JB
659 goto error;
660 }
a4082843
AN
661 if (!iwlmvm_mod_params.init_dbg) {
662 /*
663 * should stop and start HW since that INIT
664 * image just loaded
665 */
666 iwl_trans_stop_device(mvm->trans);
667 ret = iwl_trans_start_hw(mvm->trans);
668 if (ret)
669 return ret;
670 }
8ca151b5
JB
671 }
672
673 if (iwlmvm_mod_params.init_dbg)
674 return 0;
675
676 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR);
677 if (ret) {
678 IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret);
679 goto error;
680 }
681
c38740d0
EG
682 if (IWL_UCODE_API(mvm->fw->ucode_ver) >= 10)
683 iwl_mvm_get_shared_mem_conf(mvm);
04fd2c28 684
1f3b0ff8
LE
685 ret = iwl_mvm_sf_update(mvm, NULL, false);
686 if (ret)
687 IWL_ERR(mvm, "Failed to initialize Smart Fifo\n");
688
6a951267 689 mvm->fw_dbg_conf = FW_DBG_INVALID;
945d4202
EG
690 /* if we have a destination, assume EARLY START */
691 if (mvm->fw->dbg_dest_tlv)
692 mvm->fw_dbg_conf = FW_DBG_START_FROM_ALIVE;
d2709ad7 693 iwl_mvm_start_fw_dbg_conf(mvm, FW_DBG_START_FROM_ALIVE);
6a951267 694
a0544272 695 ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
8ca151b5
JB
696 if (ret)
697 goto error;
698
931d4160
EG
699 ret = iwl_send_bt_init_conf(mvm);
700 if (ret)
701 goto error;
702
8ca151b5
JB
703 /* Send phy db control command and then phy db calibration*/
704 ret = iwl_send_phy_db_data(mvm->phy_db);
705 if (ret)
706 goto error;
707
708 ret = iwl_send_phy_cfg_cmd(mvm);
709 if (ret)
710 goto error;
711
712 /* init the fw <-> mac80211 STA mapping */
713 for (i = 0; i < IWL_MVM_STATION_COUNT; i++)
714 RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL);
715
1d3c3f63
AN
716 mvm->tdls_cs.peer.sta_id = IWL_MVM_STATION_COUNT;
717
b2b7875b
JB
718 /* reset quota debouncing buffer - 0xff will yield invalid data */
719 memset(&mvm->last_quota_cmd, 0xff, sizeof(mvm->last_quota_cmd));
720
8ca151b5
JB
721 /* Add auxiliary station for scanning */
722 ret = iwl_mvm_add_aux_sta(mvm);
723 if (ret)
724 goto error;
725
53a9d61e
IP
726 /* Add all the PHY contexts */
727 chan = &mvm->hw->wiphy->bands[IEEE80211_BAND_2GHZ]->channels[0];
728 cfg80211_chandef_create(&chandef, chan, NL80211_CHAN_NO_HT);
729 for (i = 0; i < NUM_PHY_CTX; i++) {
730 /*
731 * The channel used here isn't relevant as it's
732 * going to be overwritten in the other flows.
733 * For now use the first channel we have.
734 */
735 ret = iwl_mvm_phy_ctxt_add(mvm, &mvm->phy_ctxts[i],
736 &chandef, 1, 1);
737 if (ret)
738 goto error;
739 }
8ca151b5 740
0c0e2c71
IY
741 /* Initialize tx backoffs to the minimal possible */
742 iwl_mvm_tt_tx_backoff(mvm, 0);
743
84bfffa9 744 WARN_ON(iwl_mvm_config_ltr(mvm));
9180ac50 745
c1cb92fc 746 ret = iwl_mvm_power_update_device(mvm);
64b928c4
AB
747 if (ret)
748 goto error;
749
35af15d1
AN
750 /*
751 * RTNL is not taken during Ct-kill, but we don't need to scan/Tx
752 * anyway, so don't init MCC.
753 */
754 if (!test_bit(IWL_MVM_STATUS_HW_CTKILL, &mvm->status)) {
755 ret = iwl_mvm_init_mcc(mvm);
756 if (ret)
757 goto error;
758 }
90d4f7db 759
d2496221
DS
760 if (mvm->fw->ucode_capa.capa[0] & IWL_UCODE_TLV_CAPA_UMAC_SCAN) {
761 ret = iwl_mvm_config_scan(mvm);
762 if (ret)
763 goto error;
764 }
765
7498cf4c
EP
766 /* allow FW/transport low power modes if not during restart */
767 if (!test_bit(IWL_MVM_STATUS_IN_HW_RESTART, &mvm->status))
768 iwl_mvm_unref(mvm, IWL_MVM_REF_UCODE_DOWN);
769
53a9d61e 770 IWL_DEBUG_INFO(mvm, "RT uCode started.\n");
8ca151b5
JB
771 return 0;
772 error:
773 iwl_trans_stop_device(mvm->trans);
774 return ret;
775}
776
777int iwl_mvm_load_d3_fw(struct iwl_mvm *mvm)
778{
779 int ret, i;
780
781 lockdep_assert_held(&mvm->mutex);
782
783 ret = iwl_trans_start_hw(mvm->trans);
784 if (ret)
785 return ret;
786
787 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_WOWLAN);
788 if (ret) {
789 IWL_ERR(mvm, "Failed to start WoWLAN firmware: %d\n", ret);
790 goto error;
791 }
792
a0544272 793 ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
8ca151b5
JB
794 if (ret)
795 goto error;
796
797 /* Send phy db control command and then phy db calibration*/
798 ret = iwl_send_phy_db_data(mvm->phy_db);
799 if (ret)
800 goto error;
801
802 ret = iwl_send_phy_cfg_cmd(mvm);
803 if (ret)
804 goto error;
805
806 /* init the fw <-> mac80211 STA mapping */
807 for (i = 0; i < IWL_MVM_STATION_COUNT; i++)
808 RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL);
809
810 /* Add auxiliary station for scanning */
811 ret = iwl_mvm_add_aux_sta(mvm);
812 if (ret)
813 goto error;
814
815 return 0;
816 error:
817 iwl_trans_stop_device(mvm->trans);
818 return ret;
819}
820
821int iwl_mvm_rx_card_state_notif(struct iwl_mvm *mvm,
822 struct iwl_rx_cmd_buffer *rxb,
823 struct iwl_device_cmd *cmd)
824{
825 struct iwl_rx_packet *pkt = rxb_addr(rxb);
826 struct iwl_card_state_notif *card_state_notif = (void *)pkt->data;
827 u32 flags = le32_to_cpu(card_state_notif->flags);
828
829 IWL_DEBUG_RF_KILL(mvm, "Card state received: HW:%s SW:%s CT:%s\n",
830 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
831 (flags & SW_CARD_DISABLED) ? "Kill" : "On",
832 (flags & CT_KILL_CARD_DISABLED) ?
833 "Reached" : "Not reached");
834
8ca151b5
JB
835 return 0;
836}
837
838int iwl_mvm_rx_radio_ver(struct iwl_mvm *mvm, struct iwl_rx_cmd_buffer *rxb,
839 struct iwl_device_cmd *cmd)
840{
841 struct iwl_rx_packet *pkt = rxb_addr(rxb);
842 struct iwl_radio_version_notif *radio_version = (void *)pkt->data;
843
844 /* TODO: what to do with that? */
845 IWL_DEBUG_INFO(mvm,
846 "Radio version: flavor: 0x%08x, step 0x%08x, dash 0x%08x\n",
847 le32_to_cpu(radio_version->radio_flavor),
848 le32_to_cpu(radio_version->radio_step),
849 le32_to_cpu(radio_version->radio_dash));
850 return 0;
851}
30269c12
CRI
852
853int iwl_mvm_rx_mfuart_notif(struct iwl_mvm *mvm,
854 struct iwl_rx_cmd_buffer *rxb,
855 struct iwl_device_cmd *cmd)
856{
857 struct iwl_rx_packet *pkt = rxb_addr(rxb);
858 struct iwl_mfuart_load_notif *mfuart_notif = (void *)pkt->data;
859
860 IWL_DEBUG_INFO(mvm,
861 "MFUART: installed ver: 0x%08x, external ver: 0x%08x, status: 0x%08x, duration: 0x%08x\n",
862 le32_to_cpu(mfuart_notif->installed_ver),
863 le32_to_cpu(mfuart_notif->external_ver),
864 le32_to_cpu(mfuart_notif->status),
865 le32_to_cpu(mfuart_notif->duration));
866 return 0;
867}
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