[deliverable/linux.git] / drivers / net / wireless / iwmc3200wifi / fw.c

/*
 * Intel Wireless Multicomm 3200 WiFi driver
 *
 * Copyright (C) 2009 Intel Corporation. All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 *   * Redistributions of source code must retain the above copyright
 *     notice, this list of conditions and the following disclaimer.
 *   * Redistributions in binary form must reproduce the above copyright
 *     notice, this list of conditions and the following disclaimer in
 *     the documentation and/or other materials provided with the
 *     distribution.
 *   * Neither the name of Intel Corporation nor the names of its
 *     contributors may be used to endorse or promote products derived
 *     from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 *
 * Intel Corporation <ilw@linux.intel.com>
 * Samuel Ortiz <samuel.ortiz@intel.com>
 * Zhu Yi <yi.zhu@intel.com>
 *
 */

#include <linux/kernel.h>
#include <linux/firmware.h>

#include "iwm.h"
#include "bus.h"
#include "hal.h"
#include "umac.h"
#include "debug.h"
#include "fw.h"
#include "commands.h"

static const char fw_barker[] = "*WESTOPFORNOONE*";

/*
 * @op_code: Op code we're looking for.
 * @index: There can be several instances of the same opcode within
 *         the firmware. Index specifies which one we're looking for.
 */
static int iwm_fw_op_offset(struct iwm_priv *iwm, const struct firmware *fw,
			    u16 op_code, u32 index)
{
	int offset = -EINVAL, fw_offset;
	u32 op_index = 0;
	const u8 *fw_ptr;
	struct iwm_fw_hdr_rec *rec;

	fw_offset = 0;
	fw_ptr = fw->data;

	/* We first need to look for the firmware barker */
	if (memcmp(fw_ptr, fw_barker, IWM_HDR_BARKER_LEN)) {
		IWM_ERR(iwm, "No barker string in this FW\n");
		return -EINVAL;
	}

	if (fw->size < IWM_HDR_LEN) {
		IWM_ERR(iwm, "FW is too small (%zu)\n", fw->size);
		return -EINVAL;
	}

	fw_offset += IWM_HDR_BARKER_LEN;

	while (fw_offset < fw->size) {
		rec = (struct iwm_fw_hdr_rec *)(fw_ptr + fw_offset);

		IWM_DBG_FW(iwm, DBG, "FW: op_code: 0x%x, len: %d @ 0x%x\n",
			   rec->op_code, rec->len, fw_offset);

		if (rec->op_code == IWM_HDR_REC_OP_INVALID) {
			IWM_DBG_FW(iwm, DBG, "Reached INVALID op code\n");
			break;
		}

		if (rec->op_code == op_code) {
			if (op_index == index) {
				fw_offset += sizeof(struct iwm_fw_hdr_rec);
				offset = fw_offset;
				goto out;
			}
			op_index++;
		}

		fw_offset += sizeof(struct iwm_fw_hdr_rec) + rec->len;
	}

 out:
	return offset;
}

static int iwm_load_firmware_chunk(struct iwm_priv *iwm,
				   const struct firmware *fw,
				   struct iwm_fw_img_desc *img_desc)
{
	struct iwm_udma_nonwifi_cmd target_cmd;
	u32 chunk_size;
	const u8 *chunk_ptr;
	int ret = 0;

	IWM_DBG_FW(iwm, INFO, "Loading FW chunk: %d bytes @ 0x%x\n",
		   img_desc->length, img_desc->address);

	target_cmd.opcode = UMAC_HDI_OUT_OPCODE_WRITE;
	target_cmd.handle_by_hw = 1;
	target_cmd.op2 = 0;
	target_cmd.resp = 0;
	target_cmd.eop = 1;

	chunk_size = img_desc->length;
	chunk_ptr = fw->data + img_desc->offset;

	while (chunk_size > 0) {
		u32 tmp_chunk_size;

		tmp_chunk_size = min_t(u32, chunk_size,
				       IWM_MAX_NONWIFI_CMD_BUFF_SIZE);

		target_cmd.addr = cpu_to_le32(img_desc->address +
				    (chunk_ptr - fw->data - img_desc->offset));
		target_cmd.op1_sz = cpu_to_le32(tmp_chunk_size);

		IWM_DBG_FW(iwm, DBG, "\t%d bytes @ 0x%x\n",
			   tmp_chunk_size, target_cmd.addr);

		ret = iwm_hal_send_target_cmd(iwm, &target_cmd, chunk_ptr);
		if (ret < 0) {
			IWM_ERR(iwm, "Couldn't load FW chunk\n");
			break;
		}

		chunk_size -= tmp_chunk_size;
		chunk_ptr += tmp_chunk_size;
	}

	return ret;
}
/*
 * To load a fw image to the target, we basically go through the
 * fw, looking for OP_MEM_DESC records. Once we found one, we
 * pass it to iwm_load_firmware_chunk().
 * The OP_MEM_DESC records contain the actuall memory chunk to be
 * sent, but also the destination address.
 */
static int iwm_load_img(struct iwm_priv *iwm, const char *img_name)
{
	const struct firmware *fw;
	struct iwm_fw_img_desc *img_desc;
	struct iwm_fw_img_ver *ver;
	int ret = 0, fw_offset;
	u32 opcode_idx = 0, build_date;
	char *build_tag;

	ret = request_firmware(&fw, img_name, iwm_to_dev(iwm));
	if (ret) {
		IWM_ERR(iwm, "Request firmware failed");
		return ret;
	}

	IWM_DBG_FW(iwm, INFO, "Start to load FW %s\n", img_name);

	while (1) {
		fw_offset = iwm_fw_op_offset(iwm, fw,
					     IWM_HDR_REC_OP_MEM_DESC,
					     opcode_idx);
		if (fw_offset < 0)
			break;

		img_desc = (struct iwm_fw_img_desc *)(fw->data + fw_offset);
		ret = iwm_load_firmware_chunk(iwm, fw, img_desc);
		if (ret < 0)
			goto err_release_fw;
		opcode_idx++;
	};

	/* Read firmware version */
	fw_offset = iwm_fw_op_offset(iwm, fw, IWM_HDR_REC_OP_SW_VER, 0);
	if (fw_offset < 0)
		goto err_release_fw;

	ver = (struct iwm_fw_img_ver *)(fw->data + fw_offset);

	/* Read build tag */
	fw_offset = iwm_fw_op_offset(iwm, fw, IWM_HDR_REC_OP_BUILD_TAG, 0);
	if (fw_offset < 0)
		goto err_release_fw;

	build_tag = (char *)(fw->data + fw_offset);

	/* Read build date */
	fw_offset = iwm_fw_op_offset(iwm, fw, IWM_HDR_REC_OP_BUILD_DATE, 0);
	if (fw_offset < 0)
		goto err_release_fw;

	build_date = *(u32 *)(fw->data + fw_offset);

	IWM_INFO(iwm, "%s:\n", img_name);
	IWM_INFO(iwm, "\tVersion:    %02X.%02X\n", ver->major, ver->minor);
	IWM_INFO(iwm, "\tBuild tag:  %s\n", build_tag);
	IWM_INFO(iwm, "\tBuild date: %x-%x-%x\n",
		 IWM_BUILD_YEAR(build_date), IWM_BUILD_MONTH(build_date),
		 IWM_BUILD_DAY(build_date));


 err_release_fw:
	release_firmware(fw);

	return ret;
}

static int iwm_load_umac(struct iwm_priv *iwm)
{
	struct iwm_udma_nonwifi_cmd target_cmd;
	int ret;

	ret = iwm_load_img(iwm, iwm->bus_ops->umac_name);
	if (ret < 0)
		return ret;

	/* We've loaded the UMAC, we can tell the target to jump there */
	target_cmd.opcode = UMAC_HDI_OUT_OPCODE_JUMP;
	target_cmd.addr = cpu_to_le32(UMAC_MU_FW_INST_DATA_12_ADDR);
	target_cmd.op1_sz = 0;
	target_cmd.op2 = 0;
	target_cmd.handle_by_hw = 0;
	target_cmd.resp = 1 ;
	target_cmd.eop = 1;

	ret = iwm_hal_send_target_cmd(iwm, &target_cmd, NULL);
	if (ret < 0)
		IWM_ERR(iwm, "Couldn't send JMP command\n");

	return ret;
}

static int iwm_load_lmac(struct iwm_priv *iwm, const char *img_name)
{
	int ret;

	ret = iwm_load_img(iwm, img_name);
	if (ret < 0)
		return ret;

	return iwm_send_umac_reset(iwm,
			cpu_to_le32(UMAC_RST_CTRL_FLG_LARC_CLK_EN), 0);
}

static int iwm_init_calib(struct iwm_priv *iwm, unsigned long cfg_bitmap,
			  unsigned long expected_bitmap, u8 rx_iq_cmd)
{
	/* Read RX IQ calibration result from EEPROM */
	if (test_bit(rx_iq_cmd, &cfg_bitmap)) {
		iwm_store_rxiq_calib_result(iwm);
		set_bit(PHY_CALIBRATE_RX_IQ_CMD, &iwm->calib_done_map);
	}

	iwm_send_prio_table(iwm);
	iwm_send_init_calib_cfg(iwm, cfg_bitmap);

	while (iwm->calib_done_map != expected_bitmap) {
		if (iwm_notif_handle(iwm, CALIBRATION_RES_NOTIFICATION,
				     IWM_SRC_LMAC, WAIT_NOTIF_TIMEOUT)) {
			IWM_DBG_FW(iwm, DBG, "Initial calibration timeout\n");
			return -ETIMEDOUT;
		}

		IWM_DBG_FW(iwm, DBG, "Got calibration result. calib_done_map: "
			   "0x%lx, expected calibrations: 0x%lx\n",
			   iwm->calib_done_map, expected_bitmap);
	}

	return 0;
}

/*
 * We currently have to load 3 FWs:
 * 1) The UMAC (Upper MAC).
 * 2) The calibration LMAC (Lower MAC).
 *    We then send the calibration init command, so that the device can
 *    run a first calibration round.
 * 3) The operational LMAC, which replaces the calibration one when it's
 *    done with the first calibration round.
 *
 * Once those 3 FWs have been loaded, we send the periodic calibration
 * command, and then the device is available for regular 802.11 operations.
 */
int iwm_load_fw(struct iwm_priv *iwm)
{
	unsigned long init_calib_map, periodic_calib_map;
	unsigned long expected_calib_map;
	int ret;

	/* We first start downloading the UMAC */
	ret = iwm_load_umac(iwm);
	if (ret < 0) {
		IWM_ERR(iwm, "UMAC loading failed\n");
		return ret;
	}

	/* Handle UMAC_ALIVE notification */
	ret = iwm_notif_handle(iwm, UMAC_NOTIFY_OPCODE_ALIVE, IWM_SRC_UMAC,
			       WAIT_NOTIF_TIMEOUT);
	if (ret) {
		IWM_ERR(iwm, "Handle UMAC_ALIVE failed: %d\n", ret);
		return ret;
	}

	/* UMAC is alive, we can download the calibration LMAC */
	ret = iwm_load_lmac(iwm, iwm->bus_ops->calib_lmac_name);
	if (ret) {
		IWM_ERR(iwm, "Calibration LMAC loading failed\n");
		return ret;
	}

	/* Handle UMAC_INIT_COMPLETE notification */
	ret = iwm_notif_handle(iwm, UMAC_NOTIFY_OPCODE_INIT_COMPLETE,
			       IWM_SRC_UMAC, WAIT_NOTIF_TIMEOUT);
	if (ret) {
		IWM_ERR(iwm, "Handle INIT_COMPLETE failed for calibration "
			"LMAC: %d\n", ret);
		return ret;
	}

	/* Read EEPROM data */
	ret = iwm_eeprom_init(iwm);
	if (ret < 0) {
		IWM_ERR(iwm, "Couldn't init eeprom array\n");
		return ret;
	}

	init_calib_map = iwm->conf.calib_map & IWM_CALIB_MAP_INIT_MSK;
	expected_calib_map = iwm->conf.expected_calib_map &
		IWM_CALIB_MAP_INIT_MSK;
	periodic_calib_map = IWM_CALIB_MAP_PER_LMAC(iwm->conf.calib_map);

	ret = iwm_init_calib(iwm, init_calib_map, expected_calib_map,
			     CALIB_CFG_RX_IQ_IDX);
	if (ret < 0) {
		/* Let's try the old way */
		ret = iwm_init_calib(iwm, expected_calib_map,
				     expected_calib_map,
				     PHY_CALIBRATE_RX_IQ_CMD);
		if (ret < 0) {
			IWM_ERR(iwm, "Calibration result timeout\n");
			goto out;
		}
	}

	/* Handle LMAC CALIBRATION_COMPLETE notification */
	ret = iwm_notif_handle(iwm, CALIBRATION_COMPLETE_NOTIFICATION,
			       IWM_SRC_LMAC, WAIT_NOTIF_TIMEOUT);
	if (ret) {
		IWM_ERR(iwm, "Wait for CALIBRATION_COMPLETE timeout\n");
		goto out;
	}

	IWM_INFO(iwm, "LMAC calibration done: 0x%lx\n", iwm->calib_done_map);

	iwm_send_umac_reset(iwm, cpu_to_le32(UMAC_RST_CTRL_FLG_LARC_RESET), 1);

	ret = iwm_notif_handle(iwm, UMAC_CMD_OPCODE_RESET, IWM_SRC_UMAC,
			       WAIT_NOTIF_TIMEOUT);
	if (ret) {
		IWM_ERR(iwm, "Wait for UMAC RESET timeout\n");
		goto out;
	}

	/* Download the operational LMAC */
	ret = iwm_load_lmac(iwm, iwm->bus_ops->lmac_name);
	if (ret) {
		IWM_ERR(iwm, "LMAC loading failed\n");
		goto out;
	}

	ret = iwm_notif_handle(iwm, UMAC_NOTIFY_OPCODE_INIT_COMPLETE,
			       IWM_SRC_UMAC, WAIT_NOTIF_TIMEOUT);
	if (ret) {
		IWM_ERR(iwm, "Handle INIT_COMPLETE failed for LMAC: %d\n", ret);
		goto out;
	}

	iwm_send_prio_table(iwm);
	iwm_send_calib_results(iwm);
	iwm_send_periodic_calib_cfg(iwm, periodic_calib_map);

	return 0;

 out:
	iwm_eeprom_exit(iwm);
	return ret;
}
Commit	Line	Data
bb9f8692 ZY	1	/*
	2	* Intel Wireless Multicomm 3200 WiFi driver
	3	*
	4	* Copyright (C) 2009 Intel Corporation. All rights reserved.
	5	*
	6	* Redistribution and use in source and binary forms, with or without
	7	* modification, are permitted provided that the following conditions
	8	* are met:
	9	*
	10	* * Redistributions of source code must retain the above copyright
	11	* notice, this list of conditions and the following disclaimer.
	12	* * Redistributions in binary form must reproduce the above copyright
	13	* notice, this list of conditions and the following disclaimer in
	14	* the documentation and/or other materials provided with the
	15	* distribution.
	16	* * Neither the name of Intel Corporation nor the names of its
	17	* contributors may be used to endorse or promote products derived
	18	* from this software without specific prior written permission.
	19	*
	20	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
	21	* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
	22	* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
	23	* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
	24	* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
	25	* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
	26	* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
	27	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
	28	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
	29	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
	30	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
	31	*
	32	*
	33	* Intel Corporation <ilw@linux.intel.com>
	34	* Samuel Ortiz <samuel.ortiz@intel.com>
	35	* Zhu Yi <yi.zhu@intel.com>
	36	*
	37	*/
	38
	39	#include <linux/kernel.h>
	40	#include <linux/firmware.h>
	41
	42	#include "iwm.h"
	43	#include "bus.h"
	44	#include "hal.h"
	45	#include "umac.h"
	46	#include "debug.h"
	47	#include "fw.h"
	48	#include "commands.h"
	49
	50	static const char fw_barker[] = "WESTOPFORNOONE";
	51
	52	/*
	53	* @op_code: Op code we're looking for.
	54	* @index: There can be several instances of the same opcode within
	55	* the firmware. Index specifies which one we're looking for.
	56	*/
	57	static int iwm_fw_op_offset(struct iwm_priv iwm, const struct firmware fw,
	58	u16 op_code, u32 index)
	59	{
	60	int offset = -EINVAL, fw_offset;
	61	u32 op_index = 0;
	62	const u8 *fw_ptr;
	63	struct iwm_fw_hdr_rec *rec;
	64
65	fw_offset = 0;
66	fw_ptr = fw->data;
67
68	/* We first need to look for the firmware barker */
69	if (memcmp(fw_ptr, fw_barker, IWM_HDR_BARKER_LEN)) {
70	IWM_ERR(iwm, "No barker string in this FW\n");
71	return -EINVAL;
72	}
73
74	if (fw->size < IWM_HDR_LEN) {
1bb56333	75	IWM_ERR(iwm, "FW is too small (%zu)\n", fw->size);
bb9f8692 ZY	76	return -EINVAL;
	77	}
	78
	79	fw_offset += IWM_HDR_BARKER_LEN;
	80
	81	while (fw_offset < fw->size) {
	82	rec = (struct iwm_fw_hdr_rec *)(fw_ptr + fw_offset);
	83
	84	IWM_DBG_FW(iwm, DBG, "FW: op_code: 0x%x, len: %d @ 0x%x\n",
	85	rec->op_code, rec->len, fw_offset);
	86
	87	if (rec->op_code == IWM_HDR_REC_OP_INVALID) {
	88	IWM_DBG_FW(iwm, DBG, "Reached INVALID op code\n");
	89	break;
	90	}
	91
	92	if (rec->op_code == op_code) {
	93	if (op_index == index) {
	94	fw_offset += sizeof(struct iwm_fw_hdr_rec);
	95	offset = fw_offset;
	96	goto out;
	97	}
	98	op_index++;
	99	}
	100
	101	fw_offset += sizeof(struct iwm_fw_hdr_rec) + rec->len;
	102	}
	103
	104	out:
	105	return offset;
	106	}
	107
	108	static int iwm_load_firmware_chunk(struct iwm_priv *iwm,
	109	const struct firmware *fw,
	110	struct iwm_fw_img_desc *img_desc)
	111	{
	112	struct iwm_udma_nonwifi_cmd target_cmd;
	113	u32 chunk_size;
	114	const u8 *chunk_ptr;
	115	int ret = 0;
	116
	117	IWM_DBG_FW(iwm, INFO, "Loading FW chunk: %d bytes @ 0x%x\n",
	118	img_desc->length, img_desc->address);
	119
	120	target_cmd.opcode = UMAC_HDI_OUT_OPCODE_WRITE;
	121	target_cmd.handle_by_hw = 1;
	122	target_cmd.op2 = 0;
	123	target_cmd.resp = 0;
	124	target_cmd.eop = 1;
	125
	126	chunk_size = img_desc->length;
	127	chunk_ptr = fw->data + img_desc->offset;
	128
	129	while (chunk_size > 0) {
	130	u32 tmp_chunk_size;
	131
	132	tmp_chunk_size = min_t(u32, chunk_size,
	133	IWM_MAX_NONWIFI_CMD_BUFF_SIZE);
	134
	135	target_cmd.addr = cpu_to_le32(img_desc->address +
	136	(chunk_ptr - fw->data - img_desc->offset));
	137	target_cmd.op1_sz = cpu_to_le32(tmp_chunk_size);
	138
	139	IWM_DBG_FW(iwm, DBG, "\t%d bytes @ 0x%x\n",
140	tmp_chunk_size, target_cmd.addr);
141
142	ret = iwm_hal_send_target_cmd(iwm, &target_cmd, chunk_ptr);
143	if (ret < 0) {
144	IWM_ERR(iwm, "Couldn't load FW chunk\n");
145	break;
146	}
147
148	chunk_size -= tmp_chunk_size;
149	chunk_ptr += tmp_chunk_size;
150	}
151
152	return ret;
153	}
154	/*
155	* To load a fw image to the target, we basically go through the
156	* fw, looking for OP_MEM_DESC records. Once we found one, we
157	* pass it to iwm_load_firmware_chunk().
158	* The OP_MEM_DESC records contain the actuall memory chunk to be
159	* sent, but also the destination address.
160	*/
161	static int iwm_load_img(struct iwm_priv iwm, const char img_name)
162	{
163	const struct firmware *fw;
164	struct iwm_fw_img_desc *img_desc;
165	struct iwm_fw_img_ver *ver;
166	int ret = 0, fw_offset;
167	u32 opcode_idx = 0, build_date;
168	char *build_tag;
169
170	ret = request_firmware(&fw, img_name, iwm_to_dev(iwm));
171	if (ret) {
172	IWM_ERR(iwm, "Request firmware failed");
173	return ret;
174	}
175
176	IWM_DBG_FW(iwm, INFO, "Start to load FW %s\n", img_name);
177
178	while (1) {
179	fw_offset = iwm_fw_op_offset(iwm, fw,
180	IWM_HDR_REC_OP_MEM_DESC,
181	opcode_idx);
182	if (fw_offset < 0)
183	break;
184
185	img_desc = (struct iwm_fw_img_desc *)(fw->data + fw_offset);
186	ret = iwm_load_firmware_chunk(iwm, fw, img_desc);
187	if (ret < 0)
188	goto err_release_fw;
189	opcode_idx++;
190	};
191
192	/* Read firmware version */
193	fw_offset = iwm_fw_op_offset(iwm, fw, IWM_HDR_REC_OP_SW_VER, 0);
194	if (fw_offset < 0)
195	goto err_release_fw;
196
197	ver = (struct iwm_fw_img_ver *)(fw->data + fw_offset);
198
199	/* Read build tag */
200	fw_offset = iwm_fw_op_offset(iwm, fw, IWM_HDR_REC_OP_BUILD_TAG, 0);
201	if (fw_offset < 0)
202	goto err_release_fw;
203
204	build_tag = (char *)(fw->data + fw_offset);
205
206	/* Read build date */
207	fw_offset = iwm_fw_op_offset(iwm, fw, IWM_HDR_REC_OP_BUILD_DATE, 0);
208	if (fw_offset < 0)
209	goto err_release_fw;
210
211	build_date = (u32 )(fw->data + fw_offset);
212
213	IWM_INFO(iwm, "%s:\n", img_name);
214	IWM_INFO(iwm, "\tVersion: %02X.%02X\n", ver->major, ver->minor);
215	IWM_INFO(iwm, "\tBuild tag: %s\n", build_tag);
216	IWM_INFO(iwm, "\tBuild date: %x-%x-%x\n",
217	IWM_BUILD_YEAR(build_date), IWM_BUILD_MONTH(build_date),
218	IWM_BUILD_DAY(build_date));
219
220
221	err_release_fw:
222	release_firmware(fw);
223
224	return ret;
225	}
226
227	static int iwm_load_umac(struct iwm_priv *iwm)
228	{
229	struct iwm_udma_nonwifi_cmd target_cmd;
230	int ret;
231
232	ret = iwm_load_img(iwm, iwm->bus_ops->umac_name);
233	if (ret < 0)
234	return ret;
235
236	/* We've loaded the UMAC, we can tell the target to jump there */
237	target_cmd.opcode = UMAC_HDI_OUT_OPCODE_JUMP;
238	target_cmd.addr = cpu_to_le32(UMAC_MU_FW_INST_DATA_12_ADDR);
239	target_cmd.op1_sz = 0;
240	target_cmd.op2 = 0;
241	target_cmd.handle_by_hw = 0;
242	target_cmd.resp = 1 ;
243	target_cmd.eop = 1;
244
245	ret = iwm_hal_send_target_cmd(iwm, &target_cmd, NULL);
246	if (ret < 0)
247	IWM_ERR(iwm, "Couldn't send JMP command\n");
248
249	return ret;
250	}
251
252	static int iwm_load_lmac(struct iwm_priv iwm, const char img_name)
253	{
254	int ret;
255
256	ret = iwm_load_img(iwm, img_name);
257	if (ret < 0)
258	return ret;
259
260	return iwm_send_umac_reset(iwm,
261	cpu_to_le32(UMAC_RST_CTRL_FLG_LARC_CLK_EN), 0);
262	}
263
d04bd628 SO	264	static int iwm_init_calib(struct iwm_priv *iwm, unsigned long cfg_bitmap,
	265	unsigned long expected_bitmap, u8 rx_iq_cmd)
	266	{
	267	/* Read RX IQ calibration result from EEPROM */
	268	if (test_bit(rx_iq_cmd, &cfg_bitmap)) {
	269	iwm_store_rxiq_calib_result(iwm);
	270	set_bit(PHY_CALIBRATE_RX_IQ_CMD, &iwm->calib_done_map);
	271	}
	272
	273	iwm_send_prio_table(iwm);
	274	iwm_send_init_calib_cfg(iwm, cfg_bitmap);
	275
	276	while (iwm->calib_done_map != expected_bitmap) {
	277	if (iwm_notif_handle(iwm, CALIBRATION_RES_NOTIFICATION,
	278	IWM_SRC_LMAC, WAIT_NOTIF_TIMEOUT)) {
	279	IWM_DBG_FW(iwm, DBG, "Initial calibration timeout\n");
	280	return -ETIMEDOUT;
	281	}
	282
	283	IWM_DBG_FW(iwm, DBG, "Got calibration result. calib_done_map: "
	284	"0x%lx, expected calibrations: 0x%lx\n",
	285	iwm->calib_done_map, expected_bitmap);
	286	}
	287
	288	return 0;
	289	}
	290
bb9f8692 ZY	291	/*
	292	* We currently have to load 3 FWs:
	293	* 1) The UMAC (Upper MAC).
	294	* 2) The calibration LMAC (Lower MAC).
	295	* We then send the calibration init command, so that the device can
	296	* run a first calibration round.
	297	* 3) The operational LMAC, which replaces the calibration one when it's
	298	* done with the first calibration round.
	299	*
	300	* Once those 3 FWs have been loaded, we send the periodic calibration
	301	* command, and then the device is available for regular 802.11 operations.
	302	*/
	303	int iwm_load_fw(struct iwm_priv *iwm)
	304	{
fd2c7fe0	305	unsigned long init_calib_map, periodic_calib_map;
d04bd628	306	unsigned long expected_calib_map;
bb9f8692 ZY	307	int ret;
	308
	309	/* We first start downloading the UMAC */
	310	ret = iwm_load_umac(iwm);
	311	if (ret < 0) {
	312	IWM_ERR(iwm, "UMAC loading failed\n");
	313	return ret;
	314	}
	315
	316	/* Handle UMAC_ALIVE notification */
	317	ret = iwm_notif_handle(iwm, UMAC_NOTIFY_OPCODE_ALIVE, IWM_SRC_UMAC,
	318	WAIT_NOTIF_TIMEOUT);
	319	if (ret) {
	320	IWM_ERR(iwm, "Handle UMAC_ALIVE failed: %d\n", ret);
	321	return ret;
	322	}
	323
	324	/* UMAC is alive, we can download the calibration LMAC */
	325	ret = iwm_load_lmac(iwm, iwm->bus_ops->calib_lmac_name);
	326	if (ret) {
	327	IWM_ERR(iwm, "Calibration LMAC loading failed\n");
	328	return ret;
	329	}
	330
	331	/* Handle UMAC_INIT_COMPLETE notification */
	332	ret = iwm_notif_handle(iwm, UMAC_NOTIFY_OPCODE_INIT_COMPLETE,
	333	IWM_SRC_UMAC, WAIT_NOTIF_TIMEOUT);
	334	if (ret) {
	335	IWM_ERR(iwm, "Handle INIT_COMPLETE failed for calibration "
	336	"LMAC: %d\n", ret);
	337	return ret;
	338	}
	339
	340	/* Read EEPROM data */
	341	ret = iwm_eeprom_init(iwm);
	342	if (ret < 0) {
	343	IWM_ERR(iwm, "Couldn't init eeprom array\n");
	344	return ret;
	345	}
	346
fd2c7fe0	347	init_calib_map = iwm->conf.calib_map & IWM_CALIB_MAP_INIT_MSK;
d04bd628 SO	348	expected_calib_map = iwm->conf.expected_calib_map &
d04bd628 SO	349	IWM_CALIB_MAP_INIT_MSK;
fd2c7fe0 ZY	350	periodic_calib_map = IWM_CALIB_MAP_PER_LMAC(iwm->conf.calib_map);
fd2c7fe0 ZY	351
d04bd628 SO	352	ret = iwm_init_calib(iwm, init_calib_map, expected_calib_map,
	353	CALIB_CFG_RX_IQ_IDX);
	354	if (ret < 0) {
	355	/* Let's try the old way */
	356	ret = iwm_init_calib(iwm, expected_calib_map,
	357	expected_calib_map,
	358	PHY_CALIBRATE_RX_IQ_CMD);
	359	if (ret < 0) {
	360	IWM_ERR(iwm, "Calibration result timeout\n");
bb9f8692 ZY	361	goto out;
bb9f8692 ZY	362	}
bb9f8692 ZY	363	}
	364
	365	/* Handle LMAC CALIBRATION_COMPLETE notification */
	366	ret = iwm_notif_handle(iwm, CALIBRATION_COMPLETE_NOTIFICATION,
	367	IWM_SRC_LMAC, WAIT_NOTIF_TIMEOUT);
	368	if (ret) {
	369	IWM_ERR(iwm, "Wait for CALIBRATION_COMPLETE timeout\n");
	370	goto out;
	371	}
	372
	373	IWM_INFO(iwm, "LMAC calibration done: 0x%lx\n", iwm->calib_done_map);
	374
	375	iwm_send_umac_reset(iwm, cpu_to_le32(UMAC_RST_CTRL_FLG_LARC_RESET), 1);
	376
	377	ret = iwm_notif_handle(iwm, UMAC_CMD_OPCODE_RESET, IWM_SRC_UMAC,
	378	WAIT_NOTIF_TIMEOUT);
	379	if (ret) {
	380	IWM_ERR(iwm, "Wait for UMAC RESET timeout\n");
	381	goto out;
	382	}
	383
	384	/* Download the operational LMAC */
	385	ret = iwm_load_lmac(iwm, iwm->bus_ops->lmac_name);
	386	if (ret) {
	387	IWM_ERR(iwm, "LMAC loading failed\n");
	388	goto out;
	389	}
	390
	391	ret = iwm_notif_handle(iwm, UMAC_NOTIFY_OPCODE_INIT_COMPLETE,
	392	IWM_SRC_UMAC, WAIT_NOTIF_TIMEOUT);
	393	if (ret) {
	394	IWM_ERR(iwm, "Handle INIT_COMPLETE failed for LMAC: %d\n", ret);
	395	goto out;
	396	}
	397
	398	iwm_send_prio_table(iwm);
	399	iwm_send_calib_results(iwm);
fd2c7fe0	400	iwm_send_periodic_calib_cfg(iwm, periodic_calib_map);
bb9f8692 ZY	401
	402	return 0;
	403
	404	out:
	405	iwm_eeprom_exit(iwm);
	406	return ret;
	407	}