Commit | Line | Data |
---|---|---|
8973a6e7 RD |
1 | /* |
2 | * This file contains the handling of command. | |
3 | * It prepares command and sends it to firmware when it is ready. | |
4 | */ | |
876c9d3a | 5 | |
a6b7a407 | 6 | #include <linux/hardirq.h> |
7919b89c | 7 | #include <linux/kfifo.h> |
e93156e7 | 8 | #include <linux/sched.h> |
5a0e3ad6 | 9 | #include <linux/slab.h> |
a45b6f4f | 10 | #include <linux/if_arp.h> |
ee40fa06 | 11 | #include <linux/export.h> |
e93156e7 | 12 | |
876c9d3a | 13 | #include "decl.h" |
e86dc1ca | 14 | #include "cfg.h" |
6e66f03f | 15 | #include "cmd.h" |
876c9d3a | 16 | |
9fb7663d DW |
17 | #define CAL_NF(nf) ((s32)(-(s32)(nf))) |
18 | #define CAL_RSSI(snr, nf) ((s32)((s32)(snr) + CAL_NF(nf))) | |
e93156e7 | 19 | |
8db4a2b9 | 20 | /** |
8973a6e7 | 21 | * lbs_cmd_copyback - Simple callback that copies response back into command |
8db4a2b9 | 22 | * |
8973a6e7 RD |
23 | * @priv: A pointer to &struct lbs_private structure |
24 | * @extra: A pointer to the original command structure for which | |
25 | * 'resp' is a response | |
26 | * @resp: A pointer to the command response | |
8db4a2b9 | 27 | * |
8973a6e7 | 28 | * returns: 0 on success, error on failure |
8db4a2b9 HS |
29 | */ |
30 | int lbs_cmd_copyback(struct lbs_private *priv, unsigned long extra, | |
31 | struct cmd_header *resp) | |
32 | { | |
33 | struct cmd_header *buf = (void *)extra; | |
34 | uint16_t copy_len; | |
35 | ||
36 | copy_len = min(le16_to_cpu(buf->size), le16_to_cpu(resp->size)); | |
37 | memcpy(buf, resp, copy_len); | |
38 | return 0; | |
39 | } | |
40 | EXPORT_SYMBOL_GPL(lbs_cmd_copyback); | |
41 | ||
42 | /** | |
8973a6e7 RD |
43 | * lbs_cmd_async_callback - Simple callback that ignores the result. |
44 | * Use this if you just want to send a command to the hardware, but don't | |
8db4a2b9 HS |
45 | * care for the result. |
46 | * | |
8973a6e7 RD |
47 | * @priv: ignored |
48 | * @extra: ignored | |
49 | * @resp: ignored | |
8db4a2b9 | 50 | * |
8973a6e7 | 51 | * returns: 0 for success |
8db4a2b9 HS |
52 | */ |
53 | static int lbs_cmd_async_callback(struct lbs_private *priv, unsigned long extra, | |
54 | struct cmd_header *resp) | |
55 | { | |
56 | return 0; | |
57 | } | |
58 | ||
59 | ||
876c9d3a | 60 | /** |
8973a6e7 RD |
61 | * is_command_allowed_in_ps - tests if a command is allowed in Power Save mode |
62 | * | |
63 | * @cmd: the command ID | |
876c9d3a | 64 | * |
8973a6e7 | 65 | * returns: 1 if allowed, 0 if not allowed |
876c9d3a | 66 | */ |
852e1f2a | 67 | static u8 is_command_allowed_in_ps(u16 cmd) |
876c9d3a | 68 | { |
852e1f2a DW |
69 | switch (cmd) { |
70 | case CMD_802_11_RSSI: | |
71 | return 1; | |
66fceb69 AK |
72 | case CMD_802_11_HOST_SLEEP_CFG: |
73 | return 1; | |
852e1f2a DW |
74 | default: |
75 | break; | |
876c9d3a | 76 | } |
876c9d3a MT |
77 | return 0; |
78 | } | |
79 | ||
6e66f03f | 80 | /** |
8973a6e7 RD |
81 | * lbs_update_hw_spec - Updates the hardware details like MAC address |
82 | * and regulatory region | |
6e66f03f | 83 | * |
8973a6e7 | 84 | * @priv: A pointer to &struct lbs_private structure |
6e66f03f | 85 | * |
8973a6e7 | 86 | * returns: 0 on success, error on failure |
6e66f03f DW |
87 | */ |
88 | int lbs_update_hw_spec(struct lbs_private *priv) | |
876c9d3a | 89 | { |
6e66f03f DW |
90 | struct cmd_ds_get_hw_spec cmd; |
91 | int ret = -1; | |
92 | u32 i; | |
876c9d3a | 93 | |
9012b28a | 94 | lbs_deb_enter(LBS_DEB_CMD); |
876c9d3a | 95 | |
6e66f03f DW |
96 | memset(&cmd, 0, sizeof(cmd)); |
97 | cmd.hdr.size = cpu_to_le16(sizeof(cmd)); | |
98 | memcpy(cmd.permanentaddr, priv->current_addr, ETH_ALEN); | |
689442dc | 99 | ret = lbs_cmd_with_response(priv, CMD_GET_HW_SPEC, &cmd); |
6e66f03f DW |
100 | if (ret) |
101 | goto out; | |
102 | ||
103 | priv->fwcapinfo = le32_to_cpu(cmd.fwcapinfo); | |
6e66f03f | 104 | |
dac10a9f HS |
105 | /* The firmware release is in an interesting format: the patch |
106 | * level is in the most significant nibble ... so fix that: */ | |
107 | priv->fwrelease = le32_to_cpu(cmd.fwrelease); | |
108 | priv->fwrelease = (priv->fwrelease << 8) | | |
109 | (priv->fwrelease >> 24 & 0xff); | |
110 | ||
111 | /* Some firmware capabilities: | |
112 | * CF card firmware 5.0.16p0: cap 0x00000303 | |
113 | * USB dongle firmware 5.110.17p2: cap 0x00000303 | |
114 | */ | |
f3a57fd1 | 115 | netdev_info(priv->dev, "%pM, fw %u.%u.%up%u, cap 0x%08x\n", |
e174961c | 116 | cmd.permanentaddr, |
dac10a9f HS |
117 | priv->fwrelease >> 24 & 0xff, |
118 | priv->fwrelease >> 16 & 0xff, | |
119 | priv->fwrelease >> 8 & 0xff, | |
120 | priv->fwrelease & 0xff, | |
121 | priv->fwcapinfo); | |
6e66f03f DW |
122 | lbs_deb_cmd("GET_HW_SPEC: hardware interface 0x%x, hardware spec 0x%04x\n", |
123 | cmd.hwifversion, cmd.version); | |
124 | ||
125 | /* Clamp region code to 8-bit since FW spec indicates that it should | |
126 | * only ever be 8-bit, even though the field size is 16-bit. Some firmware | |
127 | * returns non-zero high 8 bits here. | |
15483996 MV |
128 | * |
129 | * Firmware version 4.0.102 used in CF8381 has region code shifted. We | |
130 | * need to check for this problem and handle it properly. | |
6e66f03f | 131 | */ |
15483996 MV |
132 | if (MRVL_FW_MAJOR_REV(priv->fwrelease) == MRVL_FW_V4) |
133 | priv->regioncode = (le16_to_cpu(cmd.regioncode) >> 8) & 0xFF; | |
134 | else | |
135 | priv->regioncode = le16_to_cpu(cmd.regioncode) & 0xFF; | |
6e66f03f DW |
136 | |
137 | for (i = 0; i < MRVDRV_MAX_REGION_CODE; i++) { | |
138 | /* use the region code to search for the index */ | |
139 | if (priv->regioncode == lbs_region_code_to_index[i]) | |
140 | break; | |
141 | } | |
142 | ||
143 | /* if it's unidentified region code, use the default (USA) */ | |
144 | if (i >= MRVDRV_MAX_REGION_CODE) { | |
145 | priv->regioncode = 0x10; | |
f3a57fd1 JP |
146 | netdev_info(priv->dev, |
147 | "unidentified region code; using the default (USA)\n"); | |
6e66f03f DW |
148 | } |
149 | ||
150 | if (priv->current_addr[0] == 0xff) | |
151 | memmove(priv->current_addr, cmd.permanentaddr, ETH_ALEN); | |
876c9d3a | 152 | |
75abde4d VK |
153 | if (!priv->copied_hwaddr) { |
154 | memcpy(priv->dev->dev_addr, priv->current_addr, ETH_ALEN); | |
155 | if (priv->mesh_dev) | |
156 | memcpy(priv->mesh_dev->dev_addr, | |
157 | priv->current_addr, ETH_ALEN); | |
158 | priv->copied_hwaddr = 1; | |
159 | } | |
6e66f03f | 160 | |
6e66f03f | 161 | out: |
9012b28a | 162 | lbs_deb_leave(LBS_DEB_CMD); |
6e66f03f | 163 | return ret; |
876c9d3a MT |
164 | } |
165 | ||
66fceb69 AK |
166 | static int lbs_ret_host_sleep_cfg(struct lbs_private *priv, unsigned long dummy, |
167 | struct cmd_header *resp) | |
168 | { | |
169 | lbs_deb_enter(LBS_DEB_CMD); | |
1311843c | 170 | if (priv->is_host_sleep_activated) { |
66fceb69 AK |
171 | priv->is_host_sleep_configured = 0; |
172 | if (priv->psstate == PS_STATE_FULL_POWER) { | |
173 | priv->is_host_sleep_activated = 0; | |
174 | wake_up_interruptible(&priv->host_sleep_q); | |
175 | } | |
176 | } else { | |
177 | priv->is_host_sleep_configured = 1; | |
178 | } | |
179 | lbs_deb_leave(LBS_DEB_CMD); | |
180 | return 0; | |
181 | } | |
182 | ||
582c1b53 AN |
183 | int lbs_host_sleep_cfg(struct lbs_private *priv, uint32_t criteria, |
184 | struct wol_config *p_wol_config) | |
6ce4fd2a DW |
185 | { |
186 | struct cmd_ds_host_sleep cmd_config; | |
187 | int ret; | |
188 | ||
ae63a33e DS |
189 | /* |
190 | * Certain firmware versions do not support EHS_REMOVE_WAKEUP command | |
191 | * and the card will return a failure. Since we need to be | |
192 | * able to reset the mask, in those cases we set a 0 mask instead. | |
193 | */ | |
194 | if (criteria == EHS_REMOVE_WAKEUP && !priv->ehs_remove_supported) | |
195 | criteria = 0; | |
196 | ||
9fae899c | 197 | cmd_config.hdr.size = cpu_to_le16(sizeof(cmd_config)); |
6ce4fd2a | 198 | cmd_config.criteria = cpu_to_le32(criteria); |
506e9025 DW |
199 | cmd_config.gpio = priv->wol_gpio; |
200 | cmd_config.gap = priv->wol_gap; | |
6ce4fd2a | 201 | |
582c1b53 AN |
202 | if (p_wol_config != NULL) |
203 | memcpy((uint8_t *)&cmd_config.wol_conf, (uint8_t *)p_wol_config, | |
204 | sizeof(struct wol_config)); | |
205 | else | |
206 | cmd_config.wol_conf.action = CMD_ACT_ACTION_NONE; | |
207 | ||
66fceb69 AK |
208 | ret = __lbs_cmd(priv, CMD_802_11_HOST_SLEEP_CFG, &cmd_config.hdr, |
209 | le16_to_cpu(cmd_config.hdr.size), | |
210 | lbs_ret_host_sleep_cfg, 0); | |
506e9025 | 211 | if (!ret) { |
66fceb69 | 212 | if (p_wol_config) |
582c1b53 AN |
213 | memcpy((uint8_t *) p_wol_config, |
214 | (uint8_t *)&cmd_config.wol_conf, | |
215 | sizeof(struct wol_config)); | |
506e9025 | 216 | } else { |
f3a57fd1 | 217 | netdev_info(priv->dev, "HOST_SLEEP_CFG failed %d\n", ret); |
6ce4fd2a | 218 | } |
506e9025 | 219 | |
6ce4fd2a DW |
220 | return ret; |
221 | } | |
222 | EXPORT_SYMBOL_GPL(lbs_host_sleep_cfg); | |
223 | ||
0bb64087 | 224 | /** |
8973a6e7 | 225 | * lbs_set_ps_mode - Sets the Power Save mode |
0bb64087 | 226 | * |
8973a6e7 RD |
227 | * @priv: A pointer to &struct lbs_private structure |
228 | * @cmd_action: The Power Save operation (PS_MODE_ACTION_ENTER_PS or | |
0bb64087 | 229 | * PS_MODE_ACTION_EXIT_PS) |
8973a6e7 | 230 | * @block: Whether to block on a response or not |
0bb64087 | 231 | * |
8973a6e7 | 232 | * returns: 0 on success, error on failure |
0bb64087 DW |
233 | */ |
234 | int lbs_set_ps_mode(struct lbs_private *priv, u16 cmd_action, bool block) | |
876c9d3a | 235 | { |
0bb64087 DW |
236 | struct cmd_ds_802_11_ps_mode cmd; |
237 | int ret = 0; | |
876c9d3a | 238 | |
9012b28a | 239 | lbs_deb_enter(LBS_DEB_CMD); |
876c9d3a | 240 | |
0bb64087 DW |
241 | memset(&cmd, 0, sizeof(cmd)); |
242 | cmd.hdr.size = cpu_to_le16(sizeof(cmd)); | |
243 | cmd.action = cpu_to_le16(cmd_action); | |
876c9d3a | 244 | |
0bb64087 DW |
245 | if (cmd_action == PS_MODE_ACTION_ENTER_PS) { |
246 | lbs_deb_cmd("PS_MODE: action ENTER_PS\n"); | |
247 | cmd.multipledtim = cpu_to_le16(1); /* Default DTIM multiple */ | |
248 | } else if (cmd_action == PS_MODE_ACTION_EXIT_PS) { | |
249 | lbs_deb_cmd("PS_MODE: action EXIT_PS\n"); | |
250 | } else { | |
251 | /* We don't handle CONFIRM_SLEEP here because it needs to | |
252 | * be fastpathed to the firmware. | |
253 | */ | |
254 | lbs_deb_cmd("PS_MODE: unknown action 0x%X\n", cmd_action); | |
255 | ret = -EOPNOTSUPP; | |
256 | goto out; | |
876c9d3a MT |
257 | } |
258 | ||
0bb64087 DW |
259 | if (block) |
260 | ret = lbs_cmd_with_response(priv, CMD_802_11_PS_MODE, &cmd); | |
261 | else | |
262 | lbs_cmd_async(priv, CMD_802_11_PS_MODE, &cmd.hdr, sizeof (cmd)); | |
263 | ||
264 | out: | |
265 | lbs_deb_leave_args(LBS_DEB_CMD, "ret %d", ret); | |
266 | return ret; | |
876c9d3a MT |
267 | } |
268 | ||
3fbe104c DW |
269 | int lbs_cmd_802_11_sleep_params(struct lbs_private *priv, uint16_t cmd_action, |
270 | struct sleep_params *sp) | |
876c9d3a | 271 | { |
3fbe104c DW |
272 | struct cmd_ds_802_11_sleep_params cmd; |
273 | int ret; | |
876c9d3a | 274 | |
9012b28a | 275 | lbs_deb_enter(LBS_DEB_CMD); |
876c9d3a | 276 | |
0aef64d7 | 277 | if (cmd_action == CMD_ACT_GET) { |
3fbe104c DW |
278 | memset(&cmd, 0, sizeof(cmd)); |
279 | } else { | |
280 | cmd.error = cpu_to_le16(sp->sp_error); | |
281 | cmd.offset = cpu_to_le16(sp->sp_offset); | |
282 | cmd.stabletime = cpu_to_le16(sp->sp_stabletime); | |
283 | cmd.calcontrol = sp->sp_calcontrol; | |
284 | cmd.externalsleepclk = sp->sp_extsleepclk; | |
285 | cmd.reserved = cpu_to_le16(sp->sp_reserved); | |
876c9d3a | 286 | } |
3fbe104c DW |
287 | cmd.hdr.size = cpu_to_le16(sizeof(cmd)); |
288 | cmd.action = cpu_to_le16(cmd_action); | |
876c9d3a | 289 | |
3fbe104c DW |
290 | ret = lbs_cmd_with_response(priv, CMD_802_11_SLEEP_PARAMS, &cmd); |
291 | ||
292 | if (!ret) { | |
293 | lbs_deb_cmd("error 0x%x, offset 0x%x, stabletime 0x%x, " | |
294 | "calcontrol 0x%x extsleepclk 0x%x\n", | |
295 | le16_to_cpu(cmd.error), le16_to_cpu(cmd.offset), | |
296 | le16_to_cpu(cmd.stabletime), cmd.calcontrol, | |
297 | cmd.externalsleepclk); | |
298 | ||
299 | sp->sp_error = le16_to_cpu(cmd.error); | |
300 | sp->sp_offset = le16_to_cpu(cmd.offset); | |
301 | sp->sp_stabletime = le16_to_cpu(cmd.stabletime); | |
302 | sp->sp_calcontrol = cmd.calcontrol; | |
303 | sp->sp_extsleepclk = cmd.externalsleepclk; | |
304 | sp->sp_reserved = le16_to_cpu(cmd.reserved); | |
305 | } | |
306 | ||
307 | lbs_deb_leave_args(LBS_DEB_CMD, "ret %d", ret); | |
876c9d3a MT |
308 | return 0; |
309 | } | |
310 | ||
49125454 AK |
311 | static int lbs_wait_for_ds_awake(struct lbs_private *priv) |
312 | { | |
313 | int ret = 0; | |
314 | ||
315 | lbs_deb_enter(LBS_DEB_CMD); | |
316 | ||
317 | if (priv->is_deep_sleep) { | |
318 | if (!wait_event_interruptible_timeout(priv->ds_awake_q, | |
319 | !priv->is_deep_sleep, (10 * HZ))) { | |
f3a57fd1 | 320 | netdev_err(priv->dev, "ds_awake_q: timer expired\n"); |
49125454 AK |
321 | ret = -1; |
322 | } | |
323 | } | |
324 | ||
325 | lbs_deb_leave_args(LBS_DEB_CMD, "ret %d", ret); | |
326 | return ret; | |
327 | } | |
328 | ||
329 | int lbs_set_deep_sleep(struct lbs_private *priv, int deep_sleep) | |
330 | { | |
331 | int ret = 0; | |
332 | ||
333 | lbs_deb_enter(LBS_DEB_CMD); | |
334 | ||
335 | if (deep_sleep) { | |
336 | if (priv->is_deep_sleep != 1) { | |
337 | lbs_deb_cmd("deep sleep: sleep\n"); | |
338 | BUG_ON(!priv->enter_deep_sleep); | |
339 | ret = priv->enter_deep_sleep(priv); | |
340 | if (!ret) { | |
341 | netif_stop_queue(priv->dev); | |
342 | netif_carrier_off(priv->dev); | |
343 | } | |
344 | } else { | |
f3a57fd1 | 345 | netdev_err(priv->dev, "deep sleep: already enabled\n"); |
49125454 AK |
346 | } |
347 | } else { | |
348 | if (priv->is_deep_sleep) { | |
349 | lbs_deb_cmd("deep sleep: wakeup\n"); | |
350 | BUG_ON(!priv->exit_deep_sleep); | |
351 | ret = priv->exit_deep_sleep(priv); | |
352 | if (!ret) { | |
353 | ret = lbs_wait_for_ds_awake(priv); | |
354 | if (ret) | |
f3a57fd1 JP |
355 | netdev_err(priv->dev, |
356 | "deep sleep: wakeup failed\n"); | |
49125454 AK |
357 | } |
358 | } | |
359 | } | |
360 | ||
361 | lbs_deb_leave_args(LBS_DEB_CMD, "ret %d", ret); | |
362 | return ret; | |
363 | } | |
364 | ||
1311843c AK |
365 | static int lbs_ret_host_sleep_activate(struct lbs_private *priv, |
366 | unsigned long dummy, | |
367 | struct cmd_header *cmd) | |
368 | { | |
369 | lbs_deb_enter(LBS_DEB_FW); | |
370 | priv->is_host_sleep_activated = 1; | |
371 | wake_up_interruptible(&priv->host_sleep_q); | |
372 | lbs_deb_leave(LBS_DEB_FW); | |
373 | return 0; | |
374 | } | |
375 | ||
376 | int lbs_set_host_sleep(struct lbs_private *priv, int host_sleep) | |
377 | { | |
378 | struct cmd_header cmd; | |
379 | int ret = 0; | |
380 | uint32_t criteria = EHS_REMOVE_WAKEUP; | |
381 | ||
382 | lbs_deb_enter(LBS_DEB_CMD); | |
383 | ||
384 | if (host_sleep) { | |
385 | if (priv->is_host_sleep_activated != 1) { | |
386 | memset(&cmd, 0, sizeof(cmd)); | |
387 | ret = lbs_host_sleep_cfg(priv, priv->wol_criteria, | |
388 | (struct wol_config *)NULL); | |
389 | if (ret) { | |
f3a57fd1 JP |
390 | netdev_info(priv->dev, |
391 | "Host sleep configuration failed: %d\n", | |
392 | ret); | |
1311843c AK |
393 | return ret; |
394 | } | |
395 | if (priv->psstate == PS_STATE_FULL_POWER) { | |
396 | ret = __lbs_cmd(priv, | |
397 | CMD_802_11_HOST_SLEEP_ACTIVATE, | |
398 | &cmd, | |
399 | sizeof(cmd), | |
400 | lbs_ret_host_sleep_activate, 0); | |
401 | if (ret) | |
f3a57fd1 JP |
402 | netdev_info(priv->dev, |
403 | "HOST_SLEEP_ACTIVATE failed: %d\n", | |
404 | ret); | |
1311843c AK |
405 | } |
406 | ||
407 | if (!wait_event_interruptible_timeout( | |
408 | priv->host_sleep_q, | |
409 | priv->is_host_sleep_activated, | |
410 | (10 * HZ))) { | |
f3a57fd1 JP |
411 | netdev_err(priv->dev, |
412 | "host_sleep_q: timer expired\n"); | |
1311843c AK |
413 | ret = -1; |
414 | } | |
415 | } else { | |
f3a57fd1 | 416 | netdev_err(priv->dev, "host sleep: already enabled\n"); |
1311843c AK |
417 | } |
418 | } else { | |
419 | if (priv->is_host_sleep_activated) | |
420 | ret = lbs_host_sleep_cfg(priv, criteria, | |
421 | (struct wol_config *)NULL); | |
422 | } | |
423 | ||
424 | return ret; | |
425 | } | |
426 | ||
39fcf7a3 | 427 | /** |
8973a6e7 | 428 | * lbs_set_snmp_mib - Set an SNMP MIB value |
39fcf7a3 | 429 | * |
8973a6e7 RD |
430 | * @priv: A pointer to &struct lbs_private structure |
431 | * @oid: The OID to set in the firmware | |
432 | * @val: Value to set the OID to | |
39fcf7a3 | 433 | * |
8973a6e7 | 434 | * returns: 0 on success, error on failure |
39fcf7a3 DW |
435 | */ |
436 | int lbs_set_snmp_mib(struct lbs_private *priv, u32 oid, u16 val) | |
876c9d3a | 437 | { |
39fcf7a3 DW |
438 | struct cmd_ds_802_11_snmp_mib cmd; |
439 | int ret; | |
876c9d3a | 440 | |
9012b28a | 441 | lbs_deb_enter(LBS_DEB_CMD); |
876c9d3a | 442 | |
39fcf7a3 DW |
443 | memset(&cmd, 0, sizeof (cmd)); |
444 | cmd.hdr.size = cpu_to_le16(sizeof(cmd)); | |
445 | cmd.action = cpu_to_le16(CMD_ACT_SET); | |
446 | cmd.oid = cpu_to_le16((u16) oid); | |
876c9d3a | 447 | |
39fcf7a3 DW |
448 | switch (oid) { |
449 | case SNMP_MIB_OID_BSS_TYPE: | |
450 | cmd.bufsize = cpu_to_le16(sizeof(u8)); | |
fef0640e | 451 | cmd.value[0] = val; |
39fcf7a3 DW |
452 | break; |
453 | case SNMP_MIB_OID_11D_ENABLE: | |
454 | case SNMP_MIB_OID_FRAG_THRESHOLD: | |
455 | case SNMP_MIB_OID_RTS_THRESHOLD: | |
456 | case SNMP_MIB_OID_SHORT_RETRY_LIMIT: | |
457 | case SNMP_MIB_OID_LONG_RETRY_LIMIT: | |
458 | cmd.bufsize = cpu_to_le16(sizeof(u16)); | |
459 | *((__le16 *)(&cmd.value)) = cpu_to_le16(val); | |
876c9d3a | 460 | break; |
39fcf7a3 DW |
461 | default: |
462 | lbs_deb_cmd("SNMP_CMD: (set) unhandled OID 0x%x\n", oid); | |
463 | ret = -EINVAL; | |
464 | goto out; | |
876c9d3a MT |
465 | } |
466 | ||
39fcf7a3 DW |
467 | lbs_deb_cmd("SNMP_CMD: (set) oid 0x%x, oid size 0x%x, value 0x%x\n", |
468 | le16_to_cpu(cmd.oid), le16_to_cpu(cmd.bufsize), val); | |
876c9d3a | 469 | |
39fcf7a3 | 470 | ret = lbs_cmd_with_response(priv, CMD_802_11_SNMP_MIB, &cmd); |
876c9d3a | 471 | |
39fcf7a3 DW |
472 | out: |
473 | lbs_deb_leave_args(LBS_DEB_CMD, "ret %d", ret); | |
474 | return ret; | |
475 | } | |
876c9d3a | 476 | |
39fcf7a3 | 477 | /** |
8973a6e7 | 478 | * lbs_get_snmp_mib - Get an SNMP MIB value |
39fcf7a3 | 479 | * |
8973a6e7 RD |
480 | * @priv: A pointer to &struct lbs_private structure |
481 | * @oid: The OID to retrieve from the firmware | |
482 | * @out_val: Location for the returned value | |
39fcf7a3 | 483 | * |
8973a6e7 | 484 | * returns: 0 on success, error on failure |
39fcf7a3 DW |
485 | */ |
486 | int lbs_get_snmp_mib(struct lbs_private *priv, u32 oid, u16 *out_val) | |
487 | { | |
488 | struct cmd_ds_802_11_snmp_mib cmd; | |
489 | int ret; | |
876c9d3a | 490 | |
39fcf7a3 | 491 | lbs_deb_enter(LBS_DEB_CMD); |
876c9d3a | 492 | |
39fcf7a3 DW |
493 | memset(&cmd, 0, sizeof (cmd)); |
494 | cmd.hdr.size = cpu_to_le16(sizeof(cmd)); | |
495 | cmd.action = cpu_to_le16(CMD_ACT_GET); | |
496 | cmd.oid = cpu_to_le16(oid); | |
876c9d3a | 497 | |
39fcf7a3 DW |
498 | ret = lbs_cmd_with_response(priv, CMD_802_11_SNMP_MIB, &cmd); |
499 | if (ret) | |
500 | goto out; | |
876c9d3a | 501 | |
39fcf7a3 DW |
502 | switch (le16_to_cpu(cmd.bufsize)) { |
503 | case sizeof(u8): | |
fef0640e | 504 | *out_val = cmd.value[0]; |
39fcf7a3 DW |
505 | break; |
506 | case sizeof(u16): | |
507 | *out_val = le16_to_cpu(*((__le16 *)(&cmd.value))); | |
876c9d3a MT |
508 | break; |
509 | default: | |
39fcf7a3 DW |
510 | lbs_deb_cmd("SNMP_CMD: (get) unhandled OID 0x%x size %d\n", |
511 | oid, le16_to_cpu(cmd.bufsize)); | |
876c9d3a MT |
512 | break; |
513 | } | |
514 | ||
39fcf7a3 DW |
515 | out: |
516 | lbs_deb_leave_args(LBS_DEB_CMD, "ret %d", ret); | |
517 | return ret; | |
876c9d3a MT |
518 | } |
519 | ||
87c8c72d | 520 | /** |
8973a6e7 | 521 | * lbs_get_tx_power - Get the min, max, and current TX power |
87c8c72d | 522 | * |
8973a6e7 RD |
523 | * @priv: A pointer to &struct lbs_private structure |
524 | * @curlevel: Current power level in dBm | |
525 | * @minlevel: Minimum supported power level in dBm (optional) | |
526 | * @maxlevel: Maximum supported power level in dBm (optional) | |
87c8c72d | 527 | * |
8973a6e7 | 528 | * returns: 0 on success, error on failure |
87c8c72d DW |
529 | */ |
530 | int lbs_get_tx_power(struct lbs_private *priv, s16 *curlevel, s16 *minlevel, | |
531 | s16 *maxlevel) | |
876c9d3a | 532 | { |
87c8c72d DW |
533 | struct cmd_ds_802_11_rf_tx_power cmd; |
534 | int ret; | |
876c9d3a | 535 | |
9012b28a | 536 | lbs_deb_enter(LBS_DEB_CMD); |
876c9d3a | 537 | |
87c8c72d DW |
538 | memset(&cmd, 0, sizeof(cmd)); |
539 | cmd.hdr.size = cpu_to_le16(sizeof(cmd)); | |
540 | cmd.action = cpu_to_le16(CMD_ACT_GET); | |
541 | ||
542 | ret = lbs_cmd_with_response(priv, CMD_802_11_RF_TX_POWER, &cmd); | |
543 | if (ret == 0) { | |
544 | *curlevel = le16_to_cpu(cmd.curlevel); | |
545 | if (minlevel) | |
87bf24f3 | 546 | *minlevel = cmd.minlevel; |
87c8c72d | 547 | if (maxlevel) |
87bf24f3 | 548 | *maxlevel = cmd.maxlevel; |
87c8c72d | 549 | } |
876c9d3a | 550 | |
87c8c72d DW |
551 | lbs_deb_leave(LBS_DEB_CMD); |
552 | return ret; | |
553 | } | |
876c9d3a | 554 | |
87c8c72d | 555 | /** |
8973a6e7 | 556 | * lbs_set_tx_power - Set the TX power |
87c8c72d | 557 | * |
8973a6e7 RD |
558 | * @priv: A pointer to &struct lbs_private structure |
559 | * @dbm: The desired power level in dBm | |
87c8c72d | 560 | * |
8973a6e7 | 561 | * returns: 0 on success, error on failure |
87c8c72d DW |
562 | */ |
563 | int lbs_set_tx_power(struct lbs_private *priv, s16 dbm) | |
564 | { | |
565 | struct cmd_ds_802_11_rf_tx_power cmd; | |
566 | int ret; | |
876c9d3a | 567 | |
87c8c72d | 568 | lbs_deb_enter(LBS_DEB_CMD); |
876c9d3a | 569 | |
87c8c72d DW |
570 | memset(&cmd, 0, sizeof(cmd)); |
571 | cmd.hdr.size = cpu_to_le16(sizeof(cmd)); | |
572 | cmd.action = cpu_to_le16(CMD_ACT_SET); | |
573 | cmd.curlevel = cpu_to_le16(dbm); | |
876c9d3a | 574 | |
87c8c72d DW |
575 | lbs_deb_cmd("SET_RF_TX_POWER: %d dBm\n", dbm); |
576 | ||
577 | ret = lbs_cmd_with_response(priv, CMD_802_11_RF_TX_POWER, &cmd); | |
9012b28a HS |
578 | |
579 | lbs_deb_leave(LBS_DEB_CMD); | |
87c8c72d | 580 | return ret; |
876c9d3a MT |
581 | } |
582 | ||
a45b6f4f | 583 | /** |
8973a6e7 RD |
584 | * lbs_set_monitor_mode - Enable or disable monitor mode |
585 | * (only implemented on OLPC usb8388 FW) | |
a45b6f4f | 586 | * |
8973a6e7 RD |
587 | * @priv: A pointer to &struct lbs_private structure |
588 | * @enable: 1 to enable monitor mode, 0 to disable | |
a45b6f4f | 589 | * |
8973a6e7 | 590 | * returns: 0 on success, error on failure |
a45b6f4f DW |
591 | */ |
592 | int lbs_set_monitor_mode(struct lbs_private *priv, int enable) | |
965f8bbc | 593 | { |
a45b6f4f DW |
594 | struct cmd_ds_802_11_monitor_mode cmd; |
595 | int ret; | |
965f8bbc | 596 | |
a45b6f4f DW |
597 | memset(&cmd, 0, sizeof(cmd)); |
598 | cmd.hdr.size = cpu_to_le16(sizeof(cmd)); | |
599 | cmd.action = cpu_to_le16(CMD_ACT_SET); | |
600 | if (enable) | |
601 | cmd.mode = cpu_to_le16(0x1); | |
965f8bbc | 602 | |
a45b6f4f DW |
603 | lbs_deb_cmd("SET_MONITOR_MODE: %d\n", enable); |
604 | ||
605 | ret = lbs_cmd_with_response(priv, CMD_802_11_MONITOR_MODE, &cmd); | |
606 | if (ret == 0) { | |
607 | priv->dev->type = enable ? ARPHRD_IEEE80211_RADIOTAP : | |
608 | ARPHRD_ETHER; | |
965f8bbc LCC |
609 | } |
610 | ||
a45b6f4f DW |
611 | lbs_deb_leave(LBS_DEB_CMD); |
612 | return ret; | |
965f8bbc LCC |
613 | } |
614 | ||
2dd4b262 | 615 | /** |
8973a6e7 | 616 | * lbs_get_channel - Get the radio channel |
2dd4b262 | 617 | * |
8973a6e7 | 618 | * @priv: A pointer to &struct lbs_private structure |
2dd4b262 | 619 | * |
8973a6e7 | 620 | * returns: The channel on success, error on failure |
2dd4b262 | 621 | */ |
a3cbfb08 | 622 | static int lbs_get_channel(struct lbs_private *priv) |
876c9d3a | 623 | { |
2dd4b262 DW |
624 | struct cmd_ds_802_11_rf_channel cmd; |
625 | int ret = 0; | |
876c9d3a | 626 | |
8ff12da1 | 627 | lbs_deb_enter(LBS_DEB_CMD); |
876c9d3a | 628 | |
8d0c7fad | 629 | memset(&cmd, 0, sizeof(cmd)); |
2dd4b262 DW |
630 | cmd.hdr.size = cpu_to_le16(sizeof(cmd)); |
631 | cmd.action = cpu_to_le16(CMD_OPT_802_11_RF_CHANNEL_GET); | |
876c9d3a | 632 | |
689442dc | 633 | ret = lbs_cmd_with_response(priv, CMD_802_11_RF_CHANNEL, &cmd); |
2dd4b262 DW |
634 | if (ret) |
635 | goto out; | |
876c9d3a | 636 | |
cb182a60 DW |
637 | ret = le16_to_cpu(cmd.channel); |
638 | lbs_deb_cmd("current radio channel is %d\n", ret); | |
2dd4b262 DW |
639 | |
640 | out: | |
641 | lbs_deb_leave_args(LBS_DEB_CMD, "ret %d", ret); | |
642 | return ret; | |
643 | } | |
644 | ||
73ab1f25 HS |
645 | int lbs_update_channel(struct lbs_private *priv) |
646 | { | |
647 | int ret; | |
648 | ||
649 | /* the channel in f/w could be out of sync; get the current channel */ | |
650 | lbs_deb_enter(LBS_DEB_ASSOC); | |
651 | ||
652 | ret = lbs_get_channel(priv); | |
653 | if (ret > 0) { | |
c14951fe | 654 | priv->channel = ret; |
73ab1f25 HS |
655 | ret = 0; |
656 | } | |
657 | lbs_deb_leave_args(LBS_DEB_ASSOC, "ret %d", ret); | |
658 | return ret; | |
659 | } | |
660 | ||
2dd4b262 | 661 | /** |
8973a6e7 | 662 | * lbs_set_channel - Set the radio channel |
2dd4b262 | 663 | * |
8973a6e7 RD |
664 | * @priv: A pointer to &struct lbs_private structure |
665 | * @channel: The desired channel, or 0 to clear a locked channel | |
2dd4b262 | 666 | * |
8973a6e7 | 667 | * returns: 0 on success, error on failure |
2dd4b262 DW |
668 | */ |
669 | int lbs_set_channel(struct lbs_private *priv, u8 channel) | |
670 | { | |
671 | struct cmd_ds_802_11_rf_channel cmd; | |
96d46d5d | 672 | #ifdef DEBUG |
c14951fe | 673 | u8 old_channel = priv->channel; |
96d46d5d | 674 | #endif |
2dd4b262 DW |
675 | int ret = 0; |
676 | ||
677 | lbs_deb_enter(LBS_DEB_CMD); | |
678 | ||
8d0c7fad | 679 | memset(&cmd, 0, sizeof(cmd)); |
2dd4b262 DW |
680 | cmd.hdr.size = cpu_to_le16(sizeof(cmd)); |
681 | cmd.action = cpu_to_le16(CMD_OPT_802_11_RF_CHANNEL_SET); | |
682 | cmd.channel = cpu_to_le16(channel); | |
683 | ||
689442dc | 684 | ret = lbs_cmd_with_response(priv, CMD_802_11_RF_CHANNEL, &cmd); |
2dd4b262 DW |
685 | if (ret) |
686 | goto out; | |
687 | ||
c14951fe | 688 | priv->channel = (uint8_t) le16_to_cpu(cmd.channel); |
cb182a60 | 689 | lbs_deb_cmd("channel switch from %d to %d\n", old_channel, |
c14951fe | 690 | priv->channel); |
2dd4b262 DW |
691 | |
692 | out: | |
693 | lbs_deb_leave_args(LBS_DEB_CMD, "ret %d", ret); | |
694 | return ret; | |
876c9d3a MT |
695 | } |
696 | ||
9fb7663d | 697 | /** |
8973a6e7 | 698 | * lbs_get_rssi - Get current RSSI and noise floor |
9fb7663d | 699 | * |
8973a6e7 RD |
700 | * @priv: A pointer to &struct lbs_private structure |
701 | * @rssi: On successful return, signal level in mBm | |
702 | * @nf: On successful return, Noise floor | |
9fb7663d | 703 | * |
8973a6e7 | 704 | * returns: The channel on success, error on failure |
9fb7663d DW |
705 | */ |
706 | int lbs_get_rssi(struct lbs_private *priv, s8 *rssi, s8 *nf) | |
707 | { | |
708 | struct cmd_ds_802_11_rssi cmd; | |
709 | int ret = 0; | |
710 | ||
711 | lbs_deb_enter(LBS_DEB_CMD); | |
712 | ||
713 | BUG_ON(rssi == NULL); | |
714 | BUG_ON(nf == NULL); | |
715 | ||
716 | memset(&cmd, 0, sizeof(cmd)); | |
717 | cmd.hdr.size = cpu_to_le16(sizeof(cmd)); | |
718 | /* Average SNR over last 8 beacons */ | |
719 | cmd.n_or_snr = cpu_to_le16(8); | |
720 | ||
721 | ret = lbs_cmd_with_response(priv, CMD_802_11_RSSI, &cmd); | |
722 | if (ret == 0) { | |
723 | *nf = CAL_NF(le16_to_cpu(cmd.nf)); | |
724 | *rssi = CAL_RSSI(le16_to_cpu(cmd.n_or_snr), le16_to_cpu(cmd.nf)); | |
725 | } | |
726 | ||
727 | lbs_deb_leave_args(LBS_DEB_CMD, "ret %d", ret); | |
728 | return ret; | |
729 | } | |
730 | ||
cc4b9d39 | 731 | /** |
8973a6e7 RD |
732 | * lbs_set_11d_domain_info - Send regulatory and 802.11d domain information |
733 | * to the firmware | |
cc4b9d39 | 734 | * |
8973a6e7 RD |
735 | * @priv: pointer to &struct lbs_private |
736 | * @request: cfg80211 regulatory request structure | |
737 | * @bands: the device's supported bands and channels | |
cc4b9d39 | 738 | * |
8973a6e7 | 739 | * returns: 0 on success, error code on failure |
cc4b9d39 DW |
740 | */ |
741 | int lbs_set_11d_domain_info(struct lbs_private *priv, | |
742 | struct regulatory_request *request, | |
743 | struct ieee80211_supported_band **bands) | |
744 | { | |
745 | struct cmd_ds_802_11d_domain_info cmd; | |
746 | struct mrvl_ie_domain_param_set *domain = &cmd.domain; | |
747 | struct ieee80211_country_ie_triplet *t; | |
748 | enum ieee80211_band band; | |
749 | struct ieee80211_channel *ch; | |
750 | u8 num_triplet = 0; | |
751 | u8 num_parsed_chan = 0; | |
752 | u8 first_channel = 0, next_chan = 0, max_pwr = 0; | |
753 | u8 i, flag = 0; | |
754 | size_t triplet_size; | |
755 | int ret; | |
756 | ||
757 | lbs_deb_enter(LBS_DEB_11D); | |
758 | ||
759 | memset(&cmd, 0, sizeof(cmd)); | |
760 | cmd.action = cpu_to_le16(CMD_ACT_SET); | |
761 | ||
762 | lbs_deb_11d("Setting country code '%c%c'\n", | |
763 | request->alpha2[0], request->alpha2[1]); | |
764 | ||
765 | domain->header.type = cpu_to_le16(TLV_TYPE_DOMAIN); | |
766 | ||
767 | /* Set country code */ | |
768 | domain->country_code[0] = request->alpha2[0]; | |
769 | domain->country_code[1] = request->alpha2[1]; | |
770 | domain->country_code[2] = ' '; | |
771 | ||
772 | /* Now set up the channel triplets; firmware is somewhat picky here | |
773 | * and doesn't validate channel numbers and spans; hence it would | |
774 | * interpret a triplet of (36, 4, 20) as channels 36, 37, 38, 39. Since | |
775 | * the last 3 aren't valid channels, the driver is responsible for | |
776 | * splitting that up into 4 triplet pairs of (36, 1, 20) + (40, 1, 20) | |
777 | * etc. | |
778 | */ | |
779 | for (band = 0; | |
780 | (band < IEEE80211_NUM_BANDS) && (num_triplet < MAX_11D_TRIPLETS); | |
781 | band++) { | |
782 | ||
783 | if (!bands[band]) | |
784 | continue; | |
785 | ||
786 | for (i = 0; | |
787 | (i < bands[band]->n_channels) && (num_triplet < MAX_11D_TRIPLETS); | |
788 | i++) { | |
789 | ch = &bands[band]->channels[i]; | |
790 | if (ch->flags & IEEE80211_CHAN_DISABLED) | |
791 | continue; | |
792 | ||
793 | if (!flag) { | |
794 | flag = 1; | |
795 | next_chan = first_channel = (u32) ch->hw_value; | |
796 | max_pwr = ch->max_power; | |
797 | num_parsed_chan = 1; | |
798 | continue; | |
799 | } | |
800 | ||
801 | if ((ch->hw_value == next_chan + 1) && | |
802 | (ch->max_power == max_pwr)) { | |
803 | /* Consolidate adjacent channels */ | |
804 | next_chan++; | |
805 | num_parsed_chan++; | |
806 | } else { | |
807 | /* Add this triplet */ | |
808 | lbs_deb_11d("11D triplet (%d, %d, %d)\n", | |
809 | first_channel, num_parsed_chan, | |
810 | max_pwr); | |
811 | t = &domain->triplet[num_triplet]; | |
812 | t->chans.first_channel = first_channel; | |
813 | t->chans.num_channels = num_parsed_chan; | |
814 | t->chans.max_power = max_pwr; | |
815 | num_triplet++; | |
816 | flag = 0; | |
817 | } | |
818 | } | |
819 | ||
820 | if (flag) { | |
821 | /* Add last triplet */ | |
822 | lbs_deb_11d("11D triplet (%d, %d, %d)\n", first_channel, | |
823 | num_parsed_chan, max_pwr); | |
824 | t = &domain->triplet[num_triplet]; | |
825 | t->chans.first_channel = first_channel; | |
826 | t->chans.num_channels = num_parsed_chan; | |
827 | t->chans.max_power = max_pwr; | |
828 | num_triplet++; | |
829 | } | |
830 | } | |
831 | ||
832 | lbs_deb_11d("# triplets %d\n", num_triplet); | |
833 | ||
834 | /* Set command header sizes */ | |
835 | triplet_size = num_triplet * sizeof(struct ieee80211_country_ie_triplet); | |
836 | domain->header.len = cpu_to_le16(sizeof(domain->country_code) + | |
837 | triplet_size); | |
838 | ||
839 | lbs_deb_hex(LBS_DEB_11D, "802.11D domain param set", | |
840 | (u8 *) &cmd.domain.country_code, | |
841 | le16_to_cpu(domain->header.len)); | |
842 | ||
843 | cmd.hdr.size = cpu_to_le16(sizeof(cmd.hdr) + | |
844 | sizeof(cmd.action) + | |
845 | sizeof(cmd.domain.header) + | |
846 | sizeof(cmd.domain.country_code) + | |
847 | triplet_size); | |
848 | ||
849 | ret = lbs_cmd_with_response(priv, CMD_802_11D_DOMAIN_INFO, &cmd); | |
850 | ||
851 | lbs_deb_leave_args(LBS_DEB_11D, "ret %d", ret); | |
852 | return ret; | |
853 | } | |
854 | ||
4c7c6e00 | 855 | /** |
8973a6e7 | 856 | * lbs_get_reg - Read a MAC, Baseband, or RF register |
4c7c6e00 | 857 | * |
8973a6e7 RD |
858 | * @priv: pointer to &struct lbs_private |
859 | * @reg: register command, one of CMD_MAC_REG_ACCESS, | |
860 | * CMD_BBP_REG_ACCESS, or CMD_RF_REG_ACCESS | |
861 | * @offset: byte offset of the register to get | |
862 | * @value: on success, the value of the register at 'offset' | |
4c7c6e00 | 863 | * |
8973a6e7 | 864 | * returns: 0 on success, error code on failure |
4c7c6e00 DW |
865 | */ |
866 | int lbs_get_reg(struct lbs_private *priv, u16 reg, u16 offset, u32 *value) | |
876c9d3a | 867 | { |
4c7c6e00 DW |
868 | struct cmd_ds_reg_access cmd; |
869 | int ret = 0; | |
876c9d3a | 870 | |
9012b28a | 871 | lbs_deb_enter(LBS_DEB_CMD); |
876c9d3a | 872 | |
4c7c6e00 | 873 | BUG_ON(value == NULL); |
876c9d3a | 874 | |
4c7c6e00 DW |
875 | memset(&cmd, 0, sizeof(cmd)); |
876 | cmd.hdr.size = cpu_to_le16(sizeof(cmd)); | |
877 | cmd.action = cpu_to_le16(CMD_ACT_GET); | |
edcc3604 | 878 | cmd.offset = cpu_to_le16(offset); |
876c9d3a | 879 | |
4c7c6e00 DW |
880 | if (reg != CMD_MAC_REG_ACCESS && |
881 | reg != CMD_BBP_REG_ACCESS && | |
882 | reg != CMD_RF_REG_ACCESS) { | |
883 | ret = -EINVAL; | |
884 | goto out; | |
885 | } | |
876c9d3a | 886 | |
4c7c6e00 | 887 | ret = lbs_cmd_with_response(priv, reg, &cmd); |
edcc3604 | 888 | if (!ret) { |
4c7c6e00 DW |
889 | if (reg == CMD_BBP_REG_ACCESS || reg == CMD_RF_REG_ACCESS) |
890 | *value = cmd.value.bbp_rf; | |
891 | else if (reg == CMD_MAC_REG_ACCESS) | |
892 | *value = le32_to_cpu(cmd.value.mac); | |
893 | } | |
876c9d3a | 894 | |
4c7c6e00 DW |
895 | out: |
896 | lbs_deb_leave_args(LBS_DEB_CMD, "ret %d", ret); | |
897 | return ret; | |
898 | } | |
876c9d3a | 899 | |
4c7c6e00 | 900 | /** |
8973a6e7 | 901 | * lbs_set_reg - Write a MAC, Baseband, or RF register |
4c7c6e00 | 902 | * |
8973a6e7 RD |
903 | * @priv: pointer to &struct lbs_private |
904 | * @reg: register command, one of CMD_MAC_REG_ACCESS, | |
905 | * CMD_BBP_REG_ACCESS, or CMD_RF_REG_ACCESS | |
906 | * @offset: byte offset of the register to set | |
907 | * @value: the value to write to the register at 'offset' | |
4c7c6e00 | 908 | * |
8973a6e7 | 909 | * returns: 0 on success, error code on failure |
4c7c6e00 DW |
910 | */ |
911 | int lbs_set_reg(struct lbs_private *priv, u16 reg, u16 offset, u32 value) | |
912 | { | |
913 | struct cmd_ds_reg_access cmd; | |
914 | int ret = 0; | |
876c9d3a | 915 | |
4c7c6e00 | 916 | lbs_deb_enter(LBS_DEB_CMD); |
876c9d3a | 917 | |
4c7c6e00 DW |
918 | memset(&cmd, 0, sizeof(cmd)); |
919 | cmd.hdr.size = cpu_to_le16(sizeof(cmd)); | |
920 | cmd.action = cpu_to_le16(CMD_ACT_SET); | |
edcc3604 | 921 | cmd.offset = cpu_to_le16(offset); |
876c9d3a | 922 | |
4c7c6e00 DW |
923 | if (reg == CMD_BBP_REG_ACCESS || reg == CMD_RF_REG_ACCESS) |
924 | cmd.value.bbp_rf = (u8) (value & 0xFF); | |
925 | else if (reg == CMD_MAC_REG_ACCESS) | |
926 | cmd.value.mac = cpu_to_le32(value); | |
927 | else { | |
928 | ret = -EINVAL; | |
929 | goto out; | |
876c9d3a MT |
930 | } |
931 | ||
4c7c6e00 DW |
932 | ret = lbs_cmd_with_response(priv, reg, &cmd); |
933 | ||
934 | out: | |
935 | lbs_deb_leave_args(LBS_DEB_CMD, "ret %d", ret); | |
936 | return ret; | |
876c9d3a MT |
937 | } |
938 | ||
681ffbb7 DW |
939 | static void lbs_queue_cmd(struct lbs_private *priv, |
940 | struct cmd_ctrl_node *cmdnode) | |
876c9d3a MT |
941 | { |
942 | unsigned long flags; | |
681ffbb7 | 943 | int addtail = 1; |
876c9d3a | 944 | |
8ff12da1 | 945 | lbs_deb_enter(LBS_DEB_HOST); |
876c9d3a | 946 | |
c4ab4127 DW |
947 | if (!cmdnode) { |
948 | lbs_deb_host("QUEUE_CMD: cmdnode is NULL\n"); | |
876c9d3a MT |
949 | goto done; |
950 | } | |
d9896ee1 DW |
951 | if (!cmdnode->cmdbuf->size) { |
952 | lbs_deb_host("DNLD_CMD: cmd size is zero\n"); | |
953 | goto done; | |
954 | } | |
ae125bf8 | 955 | cmdnode->result = 0; |
876c9d3a MT |
956 | |
957 | /* Exit_PS command needs to be queued in the header always. */ | |
ddac4526 | 958 | if (le16_to_cpu(cmdnode->cmdbuf->command) == CMD_802_11_PS_MODE) { |
0bb64087 | 959 | struct cmd_ds_802_11_ps_mode *psm = (void *) &cmdnode->cmdbuf; |
ddac4526 | 960 | |
0bb64087 | 961 | if (psm->action == cpu_to_le16(PS_MODE_ACTION_EXIT_PS)) { |
aa21c004 | 962 | if (priv->psstate != PS_STATE_FULL_POWER) |
876c9d3a MT |
963 | addtail = 0; |
964 | } | |
965 | } | |
966 | ||
0bb64087 | 967 | if (le16_to_cpu(cmdnode->cmdbuf->command) == CMD_802_11_WAKEUP_CONFIRM) |
66fceb69 AK |
968 | addtail = 0; |
969 | ||
aa21c004 | 970 | spin_lock_irqsave(&priv->driver_lock, flags); |
876c9d3a | 971 | |
ac47246e | 972 | if (addtail) |
aa21c004 | 973 | list_add_tail(&cmdnode->list, &priv->cmdpendingq); |
ac47246e | 974 | else |
aa21c004 | 975 | list_add(&cmdnode->list, &priv->cmdpendingq); |
876c9d3a | 976 | |
aa21c004 | 977 | spin_unlock_irqrestore(&priv->driver_lock, flags); |
876c9d3a | 978 | |
8ff12da1 | 979 | lbs_deb_host("QUEUE_CMD: inserted command 0x%04x into cmdpendingq\n", |
c4ab4127 | 980 | le16_to_cpu(cmdnode->cmdbuf->command)); |
876c9d3a MT |
981 | |
982 | done: | |
8ff12da1 | 983 | lbs_deb_leave(LBS_DEB_HOST); |
876c9d3a MT |
984 | } |
985 | ||
18c52e7c DW |
986 | static void lbs_submit_command(struct lbs_private *priv, |
987 | struct cmd_ctrl_node *cmdnode) | |
876c9d3a MT |
988 | { |
989 | unsigned long flags; | |
ddac4526 | 990 | struct cmd_header *cmd; |
18c52e7c DW |
991 | uint16_t cmdsize; |
992 | uint16_t command; | |
57962f0b | 993 | int timeo = 3 * HZ; |
18c52e7c | 994 | int ret; |
876c9d3a | 995 | |
8ff12da1 | 996 | lbs_deb_enter(LBS_DEB_HOST); |
876c9d3a | 997 | |
ddac4526 | 998 | cmd = cmdnode->cmdbuf; |
876c9d3a | 999 | |
aa21c004 | 1000 | spin_lock_irqsave(&priv->driver_lock, flags); |
71005be4 DD |
1001 | priv->seqnum++; |
1002 | cmd->seqnum = cpu_to_le16(priv->seqnum); | |
aa21c004 | 1003 | priv->cur_cmd = cmdnode; |
aa21c004 | 1004 | spin_unlock_irqrestore(&priv->driver_lock, flags); |
876c9d3a | 1005 | |
ddac4526 DW |
1006 | cmdsize = le16_to_cpu(cmd->size); |
1007 | command = le16_to_cpu(cmd->command); | |
876c9d3a | 1008 | |
18c52e7c | 1009 | /* These commands take longer */ |
be0d76e4 | 1010 | if (command == CMD_802_11_SCAN || command == CMD_802_11_ASSOCIATE) |
57962f0b | 1011 | timeo = 5 * HZ; |
18c52e7c | 1012 | |
e5225b39 HS |
1013 | lbs_deb_cmd("DNLD_CMD: command 0x%04x, seq %d, size %d\n", |
1014 | command, le16_to_cpu(cmd->seqnum), cmdsize); | |
1afc09ab | 1015 | lbs_deb_hex(LBS_DEB_CMD, "DNLD_CMD", (void *) cmdnode->cmdbuf, cmdsize); |
8ff12da1 | 1016 | |
ddac4526 | 1017 | ret = priv->hw_host_to_card(priv, MVMS_CMD, (u8 *) cmd, cmdsize); |
18c52e7c | 1018 | |
d9896ee1 | 1019 | if (ret) { |
f3a57fd1 JP |
1020 | netdev_info(priv->dev, "DNLD_CMD: hw_host_to_card failed: %d\n", |
1021 | ret); | |
18c52e7c DW |
1022 | /* Let the timer kick in and retry, and potentially reset |
1023 | the whole thing if the condition persists */ | |
57962f0b | 1024 | timeo = HZ/4; |
1afc09ab | 1025 | } |
876c9d3a | 1026 | |
49125454 AK |
1027 | if (command == CMD_802_11_DEEP_SLEEP) { |
1028 | if (priv->is_auto_deep_sleep_enabled) { | |
1029 | priv->wakeup_dev_required = 1; | |
1030 | priv->dnld_sent = 0; | |
1031 | } | |
1032 | priv->is_deep_sleep = 1; | |
1033 | lbs_complete_command(priv, cmdnode, 0); | |
1034 | } else { | |
1035 | /* Setup the timer after transmit command */ | |
1036 | mod_timer(&priv->command_timer, jiffies + timeo); | |
1037 | } | |
876c9d3a | 1038 | |
18c52e7c | 1039 | lbs_deb_leave(LBS_DEB_HOST); |
876c9d3a MT |
1040 | } |
1041 | ||
8973a6e7 | 1042 | /* |
876c9d3a | 1043 | * This function inserts command node to cmdfreeq |
aa21c004 | 1044 | * after cleans it. Requires priv->driver_lock held. |
876c9d3a | 1045 | */ |
183aeac1 | 1046 | static void __lbs_cleanup_and_insert_cmd(struct lbs_private *priv, |
5ba2f8a0 | 1047 | struct cmd_ctrl_node *cmdnode) |
876c9d3a | 1048 | { |
5ba2f8a0 DW |
1049 | lbs_deb_enter(LBS_DEB_HOST); |
1050 | ||
1051 | if (!cmdnode) | |
1052 | goto out; | |
1053 | ||
5ba2f8a0 DW |
1054 | cmdnode->callback = NULL; |
1055 | cmdnode->callback_arg = 0; | |
876c9d3a | 1056 | |
5ba2f8a0 | 1057 | memset(cmdnode->cmdbuf, 0, LBS_CMD_BUFFER_SIZE); |
876c9d3a | 1058 | |
5ba2f8a0 DW |
1059 | list_add_tail(&cmdnode->list, &priv->cmdfreeq); |
1060 | out: | |
1061 | lbs_deb_leave(LBS_DEB_HOST); | |
876c9d3a MT |
1062 | } |
1063 | ||
69f9032d HS |
1064 | static void lbs_cleanup_and_insert_cmd(struct lbs_private *priv, |
1065 | struct cmd_ctrl_node *ptempcmd) | |
876c9d3a MT |
1066 | { |
1067 | unsigned long flags; | |
1068 | ||
aa21c004 | 1069 | spin_lock_irqsave(&priv->driver_lock, flags); |
10078321 | 1070 | __lbs_cleanup_and_insert_cmd(priv, ptempcmd); |
aa21c004 | 1071 | spin_unlock_irqrestore(&priv->driver_lock, flags); |
876c9d3a MT |
1072 | } |
1073 | ||
df90d843 DD |
1074 | void __lbs_complete_command(struct lbs_private *priv, struct cmd_ctrl_node *cmd, |
1075 | int result) | |
183aeac1 | 1076 | { |
df90d843 DD |
1077 | /* |
1078 | * Normally, commands are removed from cmdpendingq before being | |
1079 | * submitted. However, we can arrive here on alternative codepaths | |
1080 | * where the command is still pending. Make sure the command really | |
1081 | * isn't part of a list at this point. | |
1082 | */ | |
1083 | list_del_init(&cmd->list); | |
1084 | ||
ae125bf8 | 1085 | cmd->result = result; |
5ba2f8a0 | 1086 | cmd->cmdwaitqwoken = 1; |
df90d843 | 1087 | wake_up(&cmd->cmdwait_q); |
5ba2f8a0 | 1088 | |
8db4a2b9 | 1089 | if (!cmd->callback || cmd->callback == lbs_cmd_async_callback) |
ad12d0f4 | 1090 | __lbs_cleanup_and_insert_cmd(priv, cmd); |
183aeac1 | 1091 | priv->cur_cmd = NULL; |
d2e7b342 | 1092 | wake_up(&priv->waitq); |
df90d843 DD |
1093 | } |
1094 | ||
1095 | void lbs_complete_command(struct lbs_private *priv, struct cmd_ctrl_node *cmd, | |
1096 | int result) | |
1097 | { | |
1098 | unsigned long flags; | |
1099 | spin_lock_irqsave(&priv->driver_lock, flags); | |
1100 | __lbs_complete_command(priv, cmd, result); | |
1101 | spin_unlock_irqrestore(&priv->driver_lock, flags); | |
183aeac1 DW |
1102 | } |
1103 | ||
d5db2dfa | 1104 | int lbs_set_radio(struct lbs_private *priv, u8 preamble, u8 radio_on) |
876c9d3a | 1105 | { |
a7c45890 | 1106 | struct cmd_ds_802_11_radio_control cmd; |
d5db2dfa | 1107 | int ret = -EINVAL; |
876c9d3a | 1108 | |
9012b28a | 1109 | lbs_deb_enter(LBS_DEB_CMD); |
876c9d3a | 1110 | |
a7c45890 DW |
1111 | cmd.hdr.size = cpu_to_le16(sizeof(cmd)); |
1112 | cmd.action = cpu_to_le16(CMD_ACT_SET); | |
1113 | ||
d5db2dfa DW |
1114 | /* Only v8 and below support setting the preamble */ |
1115 | if (priv->fwrelease < 0x09000000) { | |
1116 | switch (preamble) { | |
1117 | case RADIO_PREAMBLE_SHORT: | |
d5db2dfa DW |
1118 | case RADIO_PREAMBLE_AUTO: |
1119 | case RADIO_PREAMBLE_LONG: | |
1120 | cmd.control = cpu_to_le16(preamble); | |
1121 | break; | |
1122 | default: | |
1123 | goto out; | |
1124 | } | |
1125 | } | |
a7c45890 | 1126 | |
d5db2dfa DW |
1127 | if (radio_on) |
1128 | cmd.control |= cpu_to_le16(0x1); | |
1129 | else { | |
1130 | cmd.control &= cpu_to_le16(~0x1); | |
1131 | priv->txpower_cur = 0; | |
a7c45890 | 1132 | } |
876c9d3a | 1133 | |
d5db2dfa DW |
1134 | lbs_deb_cmd("RADIO_CONTROL: radio %s, preamble %d\n", |
1135 | radio_on ? "ON" : "OFF", preamble); | |
a7c45890 | 1136 | |
d5db2dfa | 1137 | priv->radio_on = radio_on; |
a7c45890 DW |
1138 | |
1139 | ret = lbs_cmd_with_response(priv, CMD_802_11_RADIO_CONTROL, &cmd); | |
876c9d3a | 1140 | |
d5db2dfa | 1141 | out: |
9012b28a | 1142 | lbs_deb_leave_args(LBS_DEB_CMD, "ret %d", ret); |
876c9d3a MT |
1143 | return ret; |
1144 | } | |
1145 | ||
c97329e2 | 1146 | void lbs_set_mac_control(struct lbs_private *priv) |
876c9d3a | 1147 | { |
835d3ac5 | 1148 | struct cmd_ds_mac_control cmd; |
876c9d3a | 1149 | |
9012b28a | 1150 | lbs_deb_enter(LBS_DEB_CMD); |
876c9d3a | 1151 | |
835d3ac5 | 1152 | cmd.hdr.size = cpu_to_le16(sizeof(cmd)); |
d9e9778c | 1153 | cmd.action = cpu_to_le16(priv->mac_control); |
835d3ac5 HS |
1154 | cmd.reserved = 0; |
1155 | ||
75bf45a7 | 1156 | lbs_cmd_async(priv, CMD_MAC_CONTROL, &cmd.hdr, sizeof(cmd)); |
876c9d3a | 1157 | |
c97329e2 | 1158 | lbs_deb_leave(LBS_DEB_CMD); |
876c9d3a MT |
1159 | } |
1160 | ||
876c9d3a | 1161 | /** |
8973a6e7 RD |
1162 | * lbs_allocate_cmd_buffer - allocates the command buffer and links |
1163 | * it to command free queue | |
1164 | * | |
1165 | * @priv: A pointer to &struct lbs_private structure | |
876c9d3a | 1166 | * |
8973a6e7 | 1167 | * returns: 0 for success or -1 on error |
876c9d3a | 1168 | */ |
69f9032d | 1169 | int lbs_allocate_cmd_buffer(struct lbs_private *priv) |
876c9d3a MT |
1170 | { |
1171 | int ret = 0; | |
ddac4526 | 1172 | u32 bufsize; |
876c9d3a | 1173 | u32 i; |
ddac4526 | 1174 | struct cmd_ctrl_node *cmdarray; |
876c9d3a | 1175 | |
8ff12da1 | 1176 | lbs_deb_enter(LBS_DEB_HOST); |
876c9d3a | 1177 | |
ddac4526 DW |
1178 | /* Allocate and initialize the command array */ |
1179 | bufsize = sizeof(struct cmd_ctrl_node) * LBS_NUM_CMD_BUFFERS; | |
1180 | if (!(cmdarray = kzalloc(bufsize, GFP_KERNEL))) { | |
8ff12da1 | 1181 | lbs_deb_host("ALLOC_CMD_BUF: tempcmd_array is NULL\n"); |
876c9d3a MT |
1182 | ret = -1; |
1183 | goto done; | |
1184 | } | |
ddac4526 | 1185 | priv->cmd_array = cmdarray; |
876c9d3a | 1186 | |
ddac4526 DW |
1187 | /* Allocate and initialize each command buffer in the command array */ |
1188 | for (i = 0; i < LBS_NUM_CMD_BUFFERS; i++) { | |
1189 | cmdarray[i].cmdbuf = kzalloc(LBS_CMD_BUFFER_SIZE, GFP_KERNEL); | |
1190 | if (!cmdarray[i].cmdbuf) { | |
8ff12da1 | 1191 | lbs_deb_host("ALLOC_CMD_BUF: ptempvirtualaddr is NULL\n"); |
876c9d3a MT |
1192 | ret = -1; |
1193 | goto done; | |
1194 | } | |
876c9d3a MT |
1195 | } |
1196 | ||
ddac4526 DW |
1197 | for (i = 0; i < LBS_NUM_CMD_BUFFERS; i++) { |
1198 | init_waitqueue_head(&cmdarray[i].cmdwait_q); | |
1199 | lbs_cleanup_and_insert_cmd(priv, &cmdarray[i]); | |
876c9d3a | 1200 | } |
876c9d3a | 1201 | ret = 0; |
9012b28a HS |
1202 | |
1203 | done: | |
8ff12da1 | 1204 | lbs_deb_leave_args(LBS_DEB_HOST, "ret %d", ret); |
876c9d3a MT |
1205 | return ret; |
1206 | } | |
1207 | ||
1208 | /** | |
8973a6e7 | 1209 | * lbs_free_cmd_buffer - free the command buffer |
876c9d3a | 1210 | * |
8973a6e7 RD |
1211 | * @priv: A pointer to &struct lbs_private structure |
1212 | * | |
1213 | * returns: 0 for success | |
876c9d3a | 1214 | */ |
69f9032d | 1215 | int lbs_free_cmd_buffer(struct lbs_private *priv) |
876c9d3a | 1216 | { |
ddac4526 | 1217 | struct cmd_ctrl_node *cmdarray; |
876c9d3a | 1218 | unsigned int i; |
876c9d3a | 1219 | |
8ff12da1 | 1220 | lbs_deb_enter(LBS_DEB_HOST); |
876c9d3a MT |
1221 | |
1222 | /* need to check if cmd array is allocated or not */ | |
aa21c004 | 1223 | if (priv->cmd_array == NULL) { |
8ff12da1 | 1224 | lbs_deb_host("FREE_CMD_BUF: cmd_array is NULL\n"); |
876c9d3a MT |
1225 | goto done; |
1226 | } | |
1227 | ||
ddac4526 | 1228 | cmdarray = priv->cmd_array; |
876c9d3a MT |
1229 | |
1230 | /* Release shared memory buffers */ | |
ddac4526 DW |
1231 | for (i = 0; i < LBS_NUM_CMD_BUFFERS; i++) { |
1232 | if (cmdarray[i].cmdbuf) { | |
1233 | kfree(cmdarray[i].cmdbuf); | |
1234 | cmdarray[i].cmdbuf = NULL; | |
876c9d3a MT |
1235 | } |
1236 | } | |
1237 | ||
1238 | /* Release cmd_ctrl_node */ | |
aa21c004 DW |
1239 | if (priv->cmd_array) { |
1240 | kfree(priv->cmd_array); | |
1241 | priv->cmd_array = NULL; | |
876c9d3a MT |
1242 | } |
1243 | ||
1244 | done: | |
8ff12da1 | 1245 | lbs_deb_leave(LBS_DEB_HOST); |
876c9d3a MT |
1246 | return 0; |
1247 | } | |
1248 | ||
1249 | /** | |
8973a6e7 RD |
1250 | * lbs_get_free_cmd_node - gets a free command node if available in |
1251 | * command free queue | |
1252 | * | |
1253 | * @priv: A pointer to &struct lbs_private structure | |
876c9d3a | 1254 | * |
8973a6e7 RD |
1255 | * returns: A pointer to &cmd_ctrl_node structure on success |
1256 | * or %NULL on error | |
876c9d3a | 1257 | */ |
d06956b5 | 1258 | static struct cmd_ctrl_node *lbs_get_free_cmd_node(struct lbs_private *priv) |
876c9d3a MT |
1259 | { |
1260 | struct cmd_ctrl_node *tempnode; | |
876c9d3a MT |
1261 | unsigned long flags; |
1262 | ||
8ff12da1 HS |
1263 | lbs_deb_enter(LBS_DEB_HOST); |
1264 | ||
aa21c004 | 1265 | if (!priv) |
876c9d3a MT |
1266 | return NULL; |
1267 | ||
aa21c004 | 1268 | spin_lock_irqsave(&priv->driver_lock, flags); |
876c9d3a | 1269 | |
aa21c004 DW |
1270 | if (!list_empty(&priv->cmdfreeq)) { |
1271 | tempnode = list_first_entry(&priv->cmdfreeq, | |
abe3ed14 | 1272 | struct cmd_ctrl_node, list); |
df90d843 | 1273 | list_del_init(&tempnode->list); |
876c9d3a | 1274 | } else { |
8ff12da1 | 1275 | lbs_deb_host("GET_CMD_NODE: cmd_ctrl_node is not available\n"); |
876c9d3a MT |
1276 | tempnode = NULL; |
1277 | } | |
1278 | ||
aa21c004 | 1279 | spin_unlock_irqrestore(&priv->driver_lock, flags); |
876c9d3a | 1280 | |
8ff12da1 | 1281 | lbs_deb_leave(LBS_DEB_HOST); |
876c9d3a MT |
1282 | return tempnode; |
1283 | } | |
1284 | ||
876c9d3a | 1285 | /** |
8973a6e7 RD |
1286 | * lbs_execute_next_command - execute next command in command |
1287 | * pending queue. Will put firmware back to PS mode if applicable. | |
876c9d3a | 1288 | * |
8973a6e7 RD |
1289 | * @priv: A pointer to &struct lbs_private structure |
1290 | * | |
1291 | * returns: 0 on success or -1 on error | |
876c9d3a | 1292 | */ |
69f9032d | 1293 | int lbs_execute_next_command(struct lbs_private *priv) |
876c9d3a | 1294 | { |
876c9d3a | 1295 | struct cmd_ctrl_node *cmdnode = NULL; |
ddac4526 | 1296 | struct cmd_header *cmd; |
876c9d3a MT |
1297 | unsigned long flags; |
1298 | int ret = 0; | |
1299 | ||
1afc09ab HS |
1300 | /* Debug group is LBS_DEB_THREAD and not LBS_DEB_HOST, because the |
1301 | * only caller to us is lbs_thread() and we get even when a | |
1302 | * data packet is received */ | |
8ff12da1 | 1303 | lbs_deb_enter(LBS_DEB_THREAD); |
876c9d3a | 1304 | |
aa21c004 | 1305 | spin_lock_irqsave(&priv->driver_lock, flags); |
876c9d3a | 1306 | |
aa21c004 | 1307 | if (priv->cur_cmd) { |
f3a57fd1 JP |
1308 | netdev_alert(priv->dev, |
1309 | "EXEC_NEXT_CMD: already processing command!\n"); | |
aa21c004 | 1310 | spin_unlock_irqrestore(&priv->driver_lock, flags); |
876c9d3a MT |
1311 | ret = -1; |
1312 | goto done; | |
1313 | } | |
1314 | ||
aa21c004 DW |
1315 | if (!list_empty(&priv->cmdpendingq)) { |
1316 | cmdnode = list_first_entry(&priv->cmdpendingq, | |
abe3ed14 | 1317 | struct cmd_ctrl_node, list); |
876c9d3a MT |
1318 | } |
1319 | ||
aa21c004 | 1320 | spin_unlock_irqrestore(&priv->driver_lock, flags); |
876c9d3a MT |
1321 | |
1322 | if (cmdnode) { | |
ddac4526 | 1323 | cmd = cmdnode->cmdbuf; |
876c9d3a | 1324 | |
ddac4526 | 1325 | if (is_command_allowed_in_ps(le16_to_cpu(cmd->command))) { |
aa21c004 DW |
1326 | if ((priv->psstate == PS_STATE_SLEEP) || |
1327 | (priv->psstate == PS_STATE_PRE_SLEEP)) { | |
8ff12da1 HS |
1328 | lbs_deb_host( |
1329 | "EXEC_NEXT_CMD: cannot send cmd 0x%04x in psstate %d\n", | |
ddac4526 | 1330 | le16_to_cpu(cmd->command), |
aa21c004 | 1331 | priv->psstate); |
876c9d3a MT |
1332 | ret = -1; |
1333 | goto done; | |
1334 | } | |
8ff12da1 | 1335 | lbs_deb_host("EXEC_NEXT_CMD: OK to send command " |
ddac4526 DW |
1336 | "0x%04x in psstate %d\n", |
1337 | le16_to_cpu(cmd->command), priv->psstate); | |
aa21c004 | 1338 | } else if (priv->psstate != PS_STATE_FULL_POWER) { |
876c9d3a MT |
1339 | /* |
1340 | * 1. Non-PS command: | |
1341 | * Queue it. set needtowakeup to TRUE if current state | |
0bb64087 DW |
1342 | * is SLEEP, otherwise call send EXIT_PS. |
1343 | * 2. PS command but not EXIT_PS: | |
876c9d3a | 1344 | * Ignore it. |
0bb64087 | 1345 | * 3. PS command EXIT_PS: |
876c9d3a MT |
1346 | * Set needtowakeup to TRUE if current state is SLEEP, |
1347 | * otherwise send this command down to firmware | |
1348 | * immediately. | |
1349 | */ | |
ddac4526 | 1350 | if (cmd->command != cpu_to_le16(CMD_802_11_PS_MODE)) { |
876c9d3a MT |
1351 | /* Prepare to send Exit PS, |
1352 | * this non PS command will be sent later */ | |
aa21c004 DW |
1353 | if ((priv->psstate == PS_STATE_SLEEP) |
1354 | || (priv->psstate == PS_STATE_PRE_SLEEP) | |
876c9d3a MT |
1355 | ) { |
1356 | /* w/ new scheme, it will not reach here. | |
1357 | since it is blocked in main_thread. */ | |
aa21c004 | 1358 | priv->needtowakeup = 1; |
0bb64087 DW |
1359 | } else { |
1360 | lbs_set_ps_mode(priv, | |
1361 | PS_MODE_ACTION_EXIT_PS, | |
1362 | false); | |
1363 | } | |
876c9d3a MT |
1364 | |
1365 | ret = 0; | |
1366 | goto done; | |
1367 | } else { | |
1368 | /* | |
1369 | * PS command. Ignore it if it is not Exit_PS. | |
1370 | * otherwise send it down immediately. | |
1371 | */ | |
38bfab1a | 1372 | struct cmd_ds_802_11_ps_mode *psm = (void *)&cmd[1]; |
876c9d3a | 1373 | |
8ff12da1 HS |
1374 | lbs_deb_host( |
1375 | "EXEC_NEXT_CMD: PS cmd, action 0x%02x\n", | |
876c9d3a MT |
1376 | psm->action); |
1377 | if (psm->action != | |
0bb64087 | 1378 | cpu_to_le16(PS_MODE_ACTION_EXIT_PS)) { |
8ff12da1 HS |
1379 | lbs_deb_host( |
1380 | "EXEC_NEXT_CMD: ignore ENTER_PS cmd\n"); | |
183aeac1 | 1381 | lbs_complete_command(priv, cmdnode, 0); |
876c9d3a MT |
1382 | |
1383 | ret = 0; | |
1384 | goto done; | |
1385 | } | |
1386 | ||
aa21c004 DW |
1387 | if ((priv->psstate == PS_STATE_SLEEP) || |
1388 | (priv->psstate == PS_STATE_PRE_SLEEP)) { | |
8ff12da1 HS |
1389 | lbs_deb_host( |
1390 | "EXEC_NEXT_CMD: ignore EXIT_PS cmd in sleep\n"); | |
183aeac1 | 1391 | lbs_complete_command(priv, cmdnode, 0); |
aa21c004 | 1392 | priv->needtowakeup = 1; |
876c9d3a MT |
1393 | |
1394 | ret = 0; | |
1395 | goto done; | |
1396 | } | |
1397 | ||
8ff12da1 HS |
1398 | lbs_deb_host( |
1399 | "EXEC_NEXT_CMD: sending EXIT_PS\n"); | |
876c9d3a MT |
1400 | } |
1401 | } | |
2ae1b8b3 | 1402 | spin_lock_irqsave(&priv->driver_lock, flags); |
df90d843 | 1403 | list_del_init(&cmdnode->list); |
2ae1b8b3 | 1404 | spin_unlock_irqrestore(&priv->driver_lock, flags); |
8ff12da1 | 1405 | lbs_deb_host("EXEC_NEXT_CMD: sending command 0x%04x\n", |
ddac4526 | 1406 | le16_to_cpu(cmd->command)); |
d9896ee1 | 1407 | lbs_submit_command(priv, cmdnode); |
876c9d3a MT |
1408 | } else { |
1409 | /* | |
1410 | * check if in power save mode, if yes, put the device back | |
1411 | * to PS mode | |
1412 | */ | |
e86dc1ca KD |
1413 | #ifdef TODO |
1414 | /* | |
1415 | * This was the old code for libertas+wext. Someone that | |
1416 | * understands this beast should re-code it in a sane way. | |
1417 | * | |
1418 | * I actually don't understand why this is related to WPA | |
1419 | * and to connection status, shouldn't powering should be | |
1420 | * independ of such things? | |
1421 | */ | |
aa21c004 DW |
1422 | if ((priv->psmode != LBS802_11POWERMODECAM) && |
1423 | (priv->psstate == PS_STATE_FULL_POWER) && | |
1424 | ((priv->connect_status == LBS_CONNECTED) || | |
602114ae | 1425 | lbs_mesh_connected(priv))) { |
aa21c004 DW |
1426 | if (priv->secinfo.WPAenabled || |
1427 | priv->secinfo.WPA2enabled) { | |
876c9d3a | 1428 | /* check for valid WPA group keys */ |
aa21c004 DW |
1429 | if (priv->wpa_mcast_key.len || |
1430 | priv->wpa_unicast_key.len) { | |
8ff12da1 | 1431 | lbs_deb_host( |
876c9d3a MT |
1432 | "EXEC_NEXT_CMD: WPA enabled and GTK_SET" |
1433 | " go back to PS_SLEEP"); | |
0bb64087 DW |
1434 | lbs_set_ps_mode(priv, |
1435 | PS_MODE_ACTION_ENTER_PS, | |
1436 | false); | |
876c9d3a MT |
1437 | } |
1438 | } else { | |
8ff12da1 HS |
1439 | lbs_deb_host( |
1440 | "EXEC_NEXT_CMD: cmdpendingq empty, " | |
1441 | "go back to PS_SLEEP"); | |
0bb64087 DW |
1442 | lbs_set_ps_mode(priv, PS_MODE_ACTION_ENTER_PS, |
1443 | false); | |
876c9d3a MT |
1444 | } |
1445 | } | |
e86dc1ca | 1446 | #endif |
876c9d3a MT |
1447 | } |
1448 | ||
1449 | ret = 0; | |
1450 | done: | |
8ff12da1 | 1451 | lbs_deb_leave(LBS_DEB_THREAD); |
876c9d3a MT |
1452 | return ret; |
1453 | } | |
1454 | ||
f539f2ef | 1455 | static void lbs_send_confirmsleep(struct lbs_private *priv) |
876c9d3a MT |
1456 | { |
1457 | unsigned long flags; | |
f539f2ef | 1458 | int ret; |
876c9d3a | 1459 | |
8ff12da1 | 1460 | lbs_deb_enter(LBS_DEB_HOST); |
f539f2ef HS |
1461 | lbs_deb_hex(LBS_DEB_HOST, "sleep confirm", (u8 *) &confirm_sleep, |
1462 | sizeof(confirm_sleep)); | |
876c9d3a | 1463 | |
f539f2ef HS |
1464 | ret = priv->hw_host_to_card(priv, MVMS_CMD, (u8 *) &confirm_sleep, |
1465 | sizeof(confirm_sleep)); | |
876c9d3a | 1466 | if (ret) { |
f3a57fd1 | 1467 | netdev_alert(priv->dev, "confirm_sleep failed\n"); |
7919b89c | 1468 | goto out; |
876c9d3a | 1469 | } |
7919b89c HS |
1470 | |
1471 | spin_lock_irqsave(&priv->driver_lock, flags); | |
1472 | ||
a01f5450 HS |
1473 | /* We don't get a response on the sleep-confirmation */ |
1474 | priv->dnld_sent = DNLD_RES_RECEIVED; | |
1475 | ||
66fceb69 AK |
1476 | if (priv->is_host_sleep_configured) { |
1477 | priv->is_host_sleep_activated = 1; | |
1478 | wake_up_interruptible(&priv->host_sleep_q); | |
1479 | } | |
1480 | ||
7919b89c | 1481 | /* If nothing to do, go back to sleep (?) */ |
e64c026d | 1482 | if (!kfifo_len(&priv->event_fifo) && !priv->resp_len[priv->resp_idx]) |
7919b89c HS |
1483 | priv->psstate = PS_STATE_SLEEP; |
1484 | ||
1485 | spin_unlock_irqrestore(&priv->driver_lock, flags); | |
1486 | ||
1487 | out: | |
f539f2ef | 1488 | lbs_deb_leave(LBS_DEB_HOST); |
876c9d3a MT |
1489 | } |
1490 | ||
876c9d3a | 1491 | /** |
8973a6e7 RD |
1492 | * lbs_ps_confirm_sleep - checks condition and prepares to |
1493 | * send sleep confirm command to firmware if ok | |
1494 | * | |
1495 | * @priv: A pointer to &struct lbs_private structure | |
876c9d3a | 1496 | * |
8973a6e7 | 1497 | * returns: n/a |
876c9d3a | 1498 | */ |
d4ff0ef6 | 1499 | void lbs_ps_confirm_sleep(struct lbs_private *priv) |
876c9d3a MT |
1500 | { |
1501 | unsigned long flags =0; | |
d4ff0ef6 | 1502 | int allowed = 1; |
876c9d3a | 1503 | |
8ff12da1 | 1504 | lbs_deb_enter(LBS_DEB_HOST); |
876c9d3a | 1505 | |
a01f5450 | 1506 | spin_lock_irqsave(&priv->driver_lock, flags); |
634b8f49 | 1507 | if (priv->dnld_sent) { |
876c9d3a | 1508 | allowed = 0; |
23d36eec | 1509 | lbs_deb_host("dnld_sent was set\n"); |
876c9d3a MT |
1510 | } |
1511 | ||
7919b89c | 1512 | /* In-progress command? */ |
aa21c004 | 1513 | if (priv->cur_cmd) { |
876c9d3a | 1514 | allowed = 0; |
23d36eec | 1515 | lbs_deb_host("cur_cmd was set\n"); |
876c9d3a | 1516 | } |
7919b89c HS |
1517 | |
1518 | /* Pending events or command responses? */ | |
e64c026d | 1519 | if (kfifo_len(&priv->event_fifo) || priv->resp_len[priv->resp_idx]) { |
876c9d3a | 1520 | allowed = 0; |
7919b89c | 1521 | lbs_deb_host("pending events or command responses\n"); |
876c9d3a | 1522 | } |
aa21c004 | 1523 | spin_unlock_irqrestore(&priv->driver_lock, flags); |
876c9d3a MT |
1524 | |
1525 | if (allowed) { | |
10078321 | 1526 | lbs_deb_host("sending lbs_ps_confirm_sleep\n"); |
f539f2ef | 1527 | lbs_send_confirmsleep(priv); |
876c9d3a | 1528 | } else { |
8ff12da1 | 1529 | lbs_deb_host("sleep confirm has been delayed\n"); |
876c9d3a MT |
1530 | } |
1531 | ||
8ff12da1 | 1532 | lbs_deb_leave(LBS_DEB_HOST); |
876c9d3a | 1533 | } |
675787e2 HS |
1534 | |
1535 | ||
0112c9e9 | 1536 | /** |
8973a6e7 | 1537 | * lbs_set_tpc_cfg - Configures the transmission power control functionality |
0112c9e9 | 1538 | * |
8973a6e7 RD |
1539 | * @priv: A pointer to &struct lbs_private structure |
1540 | * @enable: Transmission power control enable | |
1541 | * @p0: Power level when link quality is good (dBm). | |
1542 | * @p1: Power level when link quality is fair (dBm). | |
1543 | * @p2: Power level when link quality is poor (dBm). | |
1544 | * @usesnr: Use Signal to Noise Ratio in TPC | |
0112c9e9 | 1545 | * |
8973a6e7 | 1546 | * returns: 0 on success |
0112c9e9 AN |
1547 | */ |
1548 | int lbs_set_tpc_cfg(struct lbs_private *priv, int enable, int8_t p0, int8_t p1, | |
1549 | int8_t p2, int usesnr) | |
1550 | { | |
1551 | struct cmd_ds_802_11_tpc_cfg cmd; | |
1552 | int ret; | |
1553 | ||
1554 | memset(&cmd, 0, sizeof(cmd)); | |
1555 | cmd.hdr.size = cpu_to_le16(sizeof(cmd)); | |
1556 | cmd.action = cpu_to_le16(CMD_ACT_SET); | |
1557 | cmd.enable = !!enable; | |
3ed6e080 | 1558 | cmd.usesnr = !!usesnr; |
0112c9e9 AN |
1559 | cmd.P0 = p0; |
1560 | cmd.P1 = p1; | |
1561 | cmd.P2 = p2; | |
1562 | ||
1563 | ret = lbs_cmd_with_response(priv, CMD_802_11_TPC_CFG, &cmd); | |
1564 | ||
1565 | return ret; | |
1566 | } | |
1567 | ||
1568 | /** | |
8973a6e7 | 1569 | * lbs_set_power_adapt_cfg - Configures the power adaptation settings |
0112c9e9 | 1570 | * |
8973a6e7 RD |
1571 | * @priv: A pointer to &struct lbs_private structure |
1572 | * @enable: Power adaptation enable | |
1573 | * @p0: Power level for 1, 2, 5.5 and 11 Mbps (dBm). | |
1574 | * @p1: Power level for 6, 9, 12, 18, 22, 24 and 36 Mbps (dBm). | |
1575 | * @p2: Power level for 48 and 54 Mbps (dBm). | |
0112c9e9 | 1576 | * |
8973a6e7 | 1577 | * returns: 0 on Success |
0112c9e9 AN |
1578 | */ |
1579 | ||
1580 | int lbs_set_power_adapt_cfg(struct lbs_private *priv, int enable, int8_t p0, | |
1581 | int8_t p1, int8_t p2) | |
1582 | { | |
1583 | struct cmd_ds_802_11_pa_cfg cmd; | |
1584 | int ret; | |
1585 | ||
1586 | memset(&cmd, 0, sizeof(cmd)); | |
1587 | cmd.hdr.size = cpu_to_le16(sizeof(cmd)); | |
1588 | cmd.action = cpu_to_le16(CMD_ACT_SET); | |
1589 | cmd.enable = !!enable; | |
1590 | cmd.P0 = p0; | |
1591 | cmd.P1 = p1; | |
1592 | cmd.P2 = p2; | |
1593 | ||
1594 | ret = lbs_cmd_with_response(priv, CMD_802_11_PA_CFG , &cmd); | |
1595 | ||
1596 | return ret; | |
1597 | } | |
1598 | ||
1599 | ||
6d898b19 | 1600 | struct cmd_ctrl_node *__lbs_cmd_async(struct lbs_private *priv, |
8db4a2b9 HS |
1601 | uint16_t command, struct cmd_header *in_cmd, int in_cmd_size, |
1602 | int (*callback)(struct lbs_private *, unsigned long, struct cmd_header *), | |
1603 | unsigned long callback_arg) | |
675787e2 | 1604 | { |
675787e2 | 1605 | struct cmd_ctrl_node *cmdnode; |
675787e2 HS |
1606 | |
1607 | lbs_deb_enter(LBS_DEB_HOST); | |
675787e2 | 1608 | |
aa21c004 | 1609 | if (priv->surpriseremoved) { |
675787e2 | 1610 | lbs_deb_host("PREP_CMD: card removed\n"); |
3399ea5f | 1611 | cmdnode = ERR_PTR(-ENOENT); |
675787e2 HS |
1612 | goto done; |
1613 | } | |
1614 | ||
77ccdcf2 DW |
1615 | /* No commands are allowed in Deep Sleep until we toggle the GPIO |
1616 | * to wake up the card and it has signaled that it's ready. | |
1617 | */ | |
1618 | if (!priv->is_auto_deep_sleep_enabled) { | |
1619 | if (priv->is_deep_sleep) { | |
1620 | lbs_deb_cmd("command not allowed in deep sleep\n"); | |
1621 | cmdnode = ERR_PTR(-EBUSY); | |
1622 | goto done; | |
1623 | } | |
63f275df AK |
1624 | } |
1625 | ||
d06956b5 | 1626 | cmdnode = lbs_get_free_cmd_node(priv); |
675787e2 HS |
1627 | if (cmdnode == NULL) { |
1628 | lbs_deb_host("PREP_CMD: cmdnode is NULL\n"); | |
1629 | ||
1630 | /* Wake up main thread to execute next command */ | |
d2e7b342 | 1631 | wake_up(&priv->waitq); |
3399ea5f | 1632 | cmdnode = ERR_PTR(-ENOBUFS); |
675787e2 HS |
1633 | goto done; |
1634 | } | |
1635 | ||
448a51ae | 1636 | cmdnode->callback = callback; |
1309b55b | 1637 | cmdnode->callback_arg = callback_arg; |
675787e2 | 1638 | |
7ad994de | 1639 | /* Copy the incoming command to the buffer */ |
ddac4526 | 1640 | memcpy(cmdnode->cmdbuf, in_cmd, in_cmd_size); |
7ad994de | 1641 | |
71005be4 | 1642 | /* Set command, clean result, move to buffer */ |
ddac4526 DW |
1643 | cmdnode->cmdbuf->command = cpu_to_le16(command); |
1644 | cmdnode->cmdbuf->size = cpu_to_le16(in_cmd_size); | |
ddac4526 | 1645 | cmdnode->cmdbuf->result = 0; |
675787e2 HS |
1646 | |
1647 | lbs_deb_host("PREP_CMD: command 0x%04x\n", command); | |
1648 | ||
675787e2 | 1649 | cmdnode->cmdwaitqwoken = 0; |
681ffbb7 | 1650 | lbs_queue_cmd(priv, cmdnode); |
d2e7b342 | 1651 | wake_up(&priv->waitq); |
675787e2 | 1652 | |
3399ea5f DW |
1653 | done: |
1654 | lbs_deb_leave_args(LBS_DEB_HOST, "ret %p", cmdnode); | |
1655 | return cmdnode; | |
1656 | } | |
1657 | ||
8db4a2b9 HS |
1658 | void lbs_cmd_async(struct lbs_private *priv, uint16_t command, |
1659 | struct cmd_header *in_cmd, int in_cmd_size) | |
1660 | { | |
1661 | lbs_deb_enter(LBS_DEB_CMD); | |
1662 | __lbs_cmd_async(priv, command, in_cmd, in_cmd_size, | |
1663 | lbs_cmd_async_callback, 0); | |
1664 | lbs_deb_leave(LBS_DEB_CMD); | |
1665 | } | |
1666 | ||
3399ea5f DW |
1667 | int __lbs_cmd(struct lbs_private *priv, uint16_t command, |
1668 | struct cmd_header *in_cmd, int in_cmd_size, | |
1669 | int (*callback)(struct lbs_private *, unsigned long, struct cmd_header *), | |
1670 | unsigned long callback_arg) | |
1671 | { | |
1672 | struct cmd_ctrl_node *cmdnode; | |
1673 | unsigned long flags; | |
1674 | int ret = 0; | |
1675 | ||
1676 | lbs_deb_enter(LBS_DEB_HOST); | |
1677 | ||
1678 | cmdnode = __lbs_cmd_async(priv, command, in_cmd, in_cmd_size, | |
1679 | callback, callback_arg); | |
1680 | if (IS_ERR(cmdnode)) { | |
1681 | ret = PTR_ERR(cmdnode); | |
1682 | goto done; | |
1683 | } | |
1684 | ||
675787e2 | 1685 | might_sleep(); |
df90d843 DD |
1686 | |
1687 | /* | |
1688 | * Be careful with signals here. A signal may be received as the system | |
1689 | * goes into suspend or resume. We do not want this to interrupt the | |
1690 | * command, so we perform an uninterruptible sleep. | |
1691 | */ | |
1692 | wait_event(cmdnode->cmdwait_q, cmdnode->cmdwaitqwoken); | |
675787e2 | 1693 | |
aa21c004 | 1694 | spin_lock_irqsave(&priv->driver_lock, flags); |
ae125bf8 DW |
1695 | ret = cmdnode->result; |
1696 | if (ret) | |
f3a57fd1 JP |
1697 | netdev_info(priv->dev, "PREP_CMD: command 0x%04x failed: %d\n", |
1698 | command, ret); | |
3399ea5f | 1699 | |
ad12d0f4 | 1700 | __lbs_cleanup_and_insert_cmd(priv, cmdnode); |
aa21c004 | 1701 | spin_unlock_irqrestore(&priv->driver_lock, flags); |
675787e2 HS |
1702 | |
1703 | done: | |
1704 | lbs_deb_leave_args(LBS_DEB_HOST, "ret %d", ret); | |
1705 | return ret; | |
1706 | } | |
14e865ba | 1707 | EXPORT_SYMBOL_GPL(__lbs_cmd); |