[deliverable/linux.git] / drivers / net / wireless / marvell / mwifiex / decl.h

/*
 * Marvell Wireless LAN device driver: generic data structures and APIs
 *
 * Copyright (C) 2011-2014, Marvell International Ltd.
 *
 * This software file (the "File") is distributed by Marvell International
 * Ltd. under the terms of the GNU General Public License Version 2, June 1991
 * (the "License").  You may use, redistribute and/or modify this File in
 * accordance with the terms and conditions of the License, a copy of which
 * is available by writing to the Free Software Foundation, Inc.,
 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the
 * worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt.
 *
 * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE
 * ARE EXPRESSLY DISCLAIMED.  The License provides additional details about
 * this warranty disclaimer.
 */

#ifndef _MWIFIEX_DECL_H_
#define _MWIFIEX_DECL_H_

#undef pr_fmt
#define pr_fmt(fmt)	KBUILD_MODNAME ": " fmt

#include <linux/wait.h>
#include <linux/timer.h>
#include <linux/ieee80211.h>
#include <uapi/linux/if_arp.h>
#include <net/mac80211.h>

#define MWIFIEX_BSS_COEX_COUNT	     2
#define MWIFIEX_MAX_BSS_NUM         (3)

#define MWIFIEX_DMA_ALIGN_SZ	    64
#define MWIFIEX_RX_HEADROOM	    64
#define MAX_TXPD_SZ		    32
#define INTF_HDR_ALIGN		     4

#define MWIFIEX_MIN_DATA_HEADER_LEN (MWIFIEX_DMA_ALIGN_SZ + INTF_HDR_ALIGN + \
				     MAX_TXPD_SZ)
#define MWIFIEX_MGMT_FRAME_HEADER_SIZE	8	/* sizeof(pkt_type)
						 *   + sizeof(tx_control)
						 */

#define MWIFIEX_MAX_TX_BASTREAM_SUPPORTED	2
#define MWIFIEX_MAX_RX_BASTREAM_SUPPORTED	16
#define MWIFIEX_MAX_TDLS_PEER_SUPPORTED 8

#define MWIFIEX_STA_AMPDU_DEF_TXWINSIZE        64
#define MWIFIEX_STA_AMPDU_DEF_RXWINSIZE        64
#define MWIFIEX_STA_COEX_AMPDU_DEF_RXWINSIZE   16

#define MWIFIEX_UAP_AMPDU_DEF_TXWINSIZE        32

#define MWIFIEX_UAP_COEX_AMPDU_DEF_RXWINSIZE   16

#define MWIFIEX_UAP_AMPDU_DEF_RXWINSIZE        16
#define MWIFIEX_11AC_STA_AMPDU_DEF_TXWINSIZE   64
#define MWIFIEX_11AC_STA_AMPDU_DEF_RXWINSIZE   64
#define MWIFIEX_11AC_UAP_AMPDU_DEF_TXWINSIZE   64
#define MWIFIEX_11AC_UAP_AMPDU_DEF_RXWINSIZE   64

#define MWIFIEX_DEFAULT_BLOCK_ACK_TIMEOUT  0xffff

#define MWIFIEX_RATE_BITMAP_MCS0   32

#define MWIFIEX_RX_DATA_BUF_SIZE     (4 * 1024)
#define MWIFIEX_RX_CMD_BUF_SIZE	     (2 * 1024)

#define MAX_BEACON_PERIOD                  (4000)
#define MIN_BEACON_PERIOD                  (50)
#define MAX_DTIM_PERIOD                    (100)
#define MIN_DTIM_PERIOD                    (1)

#define MWIFIEX_RTS_MIN_VALUE              (0)
#define MWIFIEX_RTS_MAX_VALUE              (2347)
#define MWIFIEX_FRAG_MIN_VALUE             (256)
#define MWIFIEX_FRAG_MAX_VALUE             (2346)
#define MWIFIEX_WMM_VERSION                0x01
#define MWIFIEX_WMM_SUBTYPE                0x01

#define MWIFIEX_RETRY_LIMIT                14
#define MWIFIEX_SDIO_BLOCK_SIZE            256

#define MWIFIEX_BUF_FLAG_REQUEUED_PKT      BIT(0)
#define MWIFIEX_BUF_FLAG_BRIDGED_PKT	   BIT(1)
#define MWIFIEX_BUF_FLAG_TDLS_PKT	   BIT(2)
#define MWIFIEX_BUF_FLAG_EAPOL_TX_STATUS   BIT(3)
#define MWIFIEX_BUF_FLAG_ACTION_TX_STATUS  BIT(4)
#define MWIFIEX_BUF_FLAG_AGGR_PKT          BIT(5)

#define MWIFIEX_BRIDGED_PKTS_THR_HIGH      1024
#define MWIFIEX_BRIDGED_PKTS_THR_LOW        128

#define MWIFIEX_TDLS_DISABLE_LINK             0x00
#define MWIFIEX_TDLS_ENABLE_LINK              0x01
#define MWIFIEX_TDLS_CREATE_LINK              0x02
#define MWIFIEX_TDLS_CONFIG_LINK              0x03

#define MWIFIEX_TDLS_RSSI_HIGH		50
#define MWIFIEX_TDLS_RSSI_LOW		55
#define MWIFIEX_TDLS_MAX_FAIL_COUNT      4
#define MWIFIEX_AUTO_TDLS_IDLE_TIME     10

/* 54M rates, index from 0 to 11 */
#define MWIFIEX_RATE_INDEX_MCS0 12
/* 12-27=MCS0-15(BW20) */
#define MWIFIEX_BW20_MCS_NUM 15

/* Rate index for OFDM 0 */
#define MWIFIEX_RATE_INDEX_OFDM0   4

#define MWIFIEX_MAX_STA_NUM		3
#define MWIFIEX_MAX_UAP_NUM		3
#define MWIFIEX_MAX_P2P_NUM		3

#define MWIFIEX_A_BAND_START_FREQ	5000

/* SDIO Aggr data packet special info */
#define SDIO_MAX_AGGR_BUF_SIZE		(256 * 255)
#define BLOCK_NUMBER_OFFSET		15
#define SDIO_HEADER_OFFSET		28

enum mwifiex_bss_type {
	MWIFIEX_BSS_TYPE_STA = 0,
	MWIFIEX_BSS_TYPE_UAP = 1,
	MWIFIEX_BSS_TYPE_P2P = 2,
	MWIFIEX_BSS_TYPE_ANY = 0xff,
};

enum mwifiex_bss_role {
	MWIFIEX_BSS_ROLE_STA = 0,
	MWIFIEX_BSS_ROLE_UAP = 1,
	MWIFIEX_BSS_ROLE_ANY = 0xff,
};

enum mwifiex_tdls_status {
	TDLS_NOT_SETUP = 0,
	TDLS_SETUP_INPROGRESS,
	TDLS_SETUP_COMPLETE,
	TDLS_SETUP_FAILURE,
	TDLS_LINK_TEARDOWN,
	TDLS_CHAN_SWITCHING,
	TDLS_IN_BASE_CHAN,
	TDLS_IN_OFF_CHAN,
};

enum mwifiex_tdls_error_code {
	TDLS_ERR_NO_ERROR = 0,
	TDLS_ERR_INTERNAL_ERROR,
	TDLS_ERR_MAX_LINKS_EST,
	TDLS_ERR_LINK_EXISTS,
	TDLS_ERR_LINK_NONEXISTENT,
	TDLS_ERR_PEER_STA_UNREACHABLE = 25,
};

#define BSS_ROLE_BIT_MASK    BIT(0)

#define GET_BSS_ROLE(priv)   ((priv)->bss_role & BSS_ROLE_BIT_MASK)

enum mwifiex_data_frame_type {
	MWIFIEX_DATA_FRAME_TYPE_ETH_II = 0,
	MWIFIEX_DATA_FRAME_TYPE_802_11,
};

struct mwifiex_fw_image {
	u8 *helper_buf;
	u32 helper_len;
	u8 *fw_buf;
	u32 fw_len;
};

struct mwifiex_802_11_ssid {
	u32 ssid_len;
	u8 ssid[IEEE80211_MAX_SSID_LEN];
};

struct mwifiex_wait_queue {
	wait_queue_head_t wait;
	int status;
};

struct mwifiex_rxinfo {
	struct sk_buff *parent;
	u8 bss_num;
	u8 bss_type;
	u8 use_count;
	u8 buf_type;
};

struct mwifiex_txinfo {
	u32 status_code;
	u8 flags;
	u8 bss_num;
	u8 bss_type;
	u8 aggr_num;
	u32 pkt_len;
	u8 ack_frame_id;
	u64 cookie;
};

enum mwifiex_wmm_ac_e {
	WMM_AC_BK,
	WMM_AC_BE,
	WMM_AC_VI,
	WMM_AC_VO
} __packed;

struct ieee_types_wmm_ac_parameters {
	u8 aci_aifsn_bitmap;
	u8 ecw_bitmap;
	__le16 tx_op_limit;
} __packed;

struct mwifiex_types_wmm_info {
	u8 oui[4];
	u8 subtype;
	u8 version;
	u8 qos_info;
	u8 reserved;
	struct ieee_types_wmm_ac_parameters ac_params[IEEE80211_NUM_ACS];
} __packed;

struct mwifiex_arp_eth_header {
	struct arphdr hdr;
	u8 ar_sha[ETH_ALEN];
	u8 ar_sip[4];
	u8 ar_tha[ETH_ALEN];
	u8 ar_tip[4];
} __packed;

struct mwifiex_chan_stats {
	u8 chan_num;
	u8 bandcfg;
	u8 flags;
	s8 noise;
	u16 total_bss;
	u16 cca_scan_dur;
	u16 cca_busy_dur;
} __packed;

#define MWIFIEX_HIST_MAX_SAMPLES	1048576
#define MWIFIEX_MAX_RX_RATES		     44
#define MWIFIEX_MAX_AC_RX_RATES		     74
#define MWIFIEX_MAX_SNR			    256
#define MWIFIEX_MAX_NOISE_FLR		    256
#define MWIFIEX_MAX_SIG_STRENGTH	    256

struct mwifiex_histogram_data {
	atomic_t rx_rate[MWIFIEX_MAX_AC_RX_RATES];
	atomic_t snr[MWIFIEX_MAX_SNR];
	atomic_t noise_flr[MWIFIEX_MAX_NOISE_FLR];
	atomic_t sig_str[MWIFIEX_MAX_SIG_STRENGTH];
	atomic_t num_samples;
};

struct mwifiex_iface_comb {
	u8 sta_intf;
	u8 uap_intf;
	u8 p2p_intf;
};

struct mwifiex_radar_params {
	struct cfg80211_chan_def *chandef;
	u32 cac_time_ms;
} __packed;

struct mwifiex_11h_intf_state {
	bool is_11h_enabled;
	bool is_11h_active;
} __packed;
#endif /* !_MWIFIEX_DECL_H_ */
Commit	Line	Data
5e6e3a92 BZ	1	/*
	2	* Marvell Wireless LAN device driver: generic data structures and APIs
	3	*
65da33f5	4	* Copyright (C) 2011-2014, Marvell International Ltd.
5e6e3a92 BZ	5	*
	6	* This software file (the "File") is distributed by Marvell International
	7	* Ltd. under the terms of the GNU General Public License Version 2, June 1991
	8	* (the "License"). You may use, redistribute and/or modify this File in
	9	* accordance with the terms and conditions of the License, a copy of which
	10	* is available by writing to the Free Software Foundation, Inc.,
	11	* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the
	12	* worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt.
	13	*
	14	* THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE
	15	* IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE
	16	* ARE EXPRESSLY DISCLAIMED. The License provides additional details about
	17	* this warranty disclaimer.
	18	*/
	19
	20	#ifndef _MWIFIEX_DECL_H_
	21	#define _MWIFIEX_DECL_H_
	22
	23	#undef pr_fmt
	24	#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
	25
	26	#include <linux/wait.h>
	27	#include <linux/timer.h>
	28	#include <linux/ieee80211.h>
587b36d3	29	#include <uapi/linux/if_arp.h>
54428c57	30	#include <net/mac80211.h>
5e6e3a92	31
d219b7eb	32	#define MWIFIEX_BSS_COEX_COUNT 2
197f4a2e	33	#define MWIFIEX_MAX_BSS_NUM (3)
5e6e3a92	34
84b313b3	35	#define MWIFIEX_DMA_ALIGN_SZ 64
31def91b	36	#define MWIFIEX_RX_HEADROOM 64
84b313b3 XH	37	#define MAX_TXPD_SZ 32
	38	#define INTF_HDR_ALIGN 4
	39
	40	#define MWIFIEX_MIN_DATA_HEADER_LEN (MWIFIEX_DMA_ALIGN_SZ + INTF_HDR_ALIGN + \
	41	MAX_TXPD_SZ)
e39faa73 SP	42	#define MWIFIEX_MGMT_FRAME_HEADER_SIZE 8 /* sizeof(pkt_type)
	43	* + sizeof(tx_control)
	44	*/
5e6e3a92 BZ	45
	46	#define MWIFIEX_MAX_TX_BASTREAM_SUPPORTED 2
	47	#define MWIFIEX_MAX_RX_BASTREAM_SUPPORTED 16
72df6310	48	#define MWIFIEX_MAX_TDLS_PEER_SUPPORTED 8
5e6e3a92	49
42e37272 AK	50	#define MWIFIEX_STA_AMPDU_DEF_TXWINSIZE 64
42e37272 AK	51	#define MWIFIEX_STA_AMPDU_DEF_RXWINSIZE 64
d219b7eb CC	52	#define MWIFIEX_STA_COEX_AMPDU_DEF_RXWINSIZE 16
d219b7eb CC	53
04abc0a3	54	#define MWIFIEX_UAP_AMPDU_DEF_TXWINSIZE 32
d219b7eb CC	55
	56	#define MWIFIEX_UAP_COEX_AMPDU_DEF_RXWINSIZE 16
	57
04abc0a3	58	#define MWIFIEX_UAP_AMPDU_DEF_RXWINSIZE 16
258ed9f0 AK	59	#define MWIFIEX_11AC_STA_AMPDU_DEF_TXWINSIZE 64
258ed9f0 AK	60	#define MWIFIEX_11AC_STA_AMPDU_DEF_RXWINSIZE 64
50398ee0 AP	61	#define MWIFIEX_11AC_UAP_AMPDU_DEF_TXWINSIZE 64
50398ee0 AP	62	#define MWIFIEX_11AC_UAP_AMPDU_DEF_RXWINSIZE 64
04abc0a3	63
5e6e3a92 BZ	64	#define MWIFIEX_DEFAULT_BLOCK_ACK_TIMEOUT 0xffff
5e6e3a92 BZ	65
5e6e3a92	66	#define MWIFIEX_RATE_BITMAP_MCS0 32
5e6e3a92 BZ	67
5e6e3a92 BZ	68	#define MWIFIEX_RX_DATA_BUF_SIZE (4 * 1024)
4daffe35	69	#define MWIFIEX_RX_CMD_BUF_SIZE (2 * 1024)
5e6e3a92	70
12190c5d AP	71	#define MAX_BEACON_PERIOD (4000)
	72	#define MIN_BEACON_PERIOD (50)
	73	#define MAX_DTIM_PERIOD (100)
	74	#define MIN_DTIM_PERIOD (1)
	75
5e6e3a92 BZ	76	#define MWIFIEX_RTS_MIN_VALUE (0)
	77	#define MWIFIEX_RTS_MAX_VALUE (2347)
	78	#define MWIFIEX_FRAG_MIN_VALUE (256)
	79	#define MWIFIEX_FRAG_MAX_VALUE (2346)
54428c57 AP	80	#define MWIFIEX_WMM_VERSION 0x01
54428c57 AP	81	#define MWIFIEX_WMM_SUBTYPE 0x01
5e6e3a92	82
9b930eae	83	#define MWIFIEX_RETRY_LIMIT 14
5e6e3a92 BZ	84	#define MWIFIEX_SDIO_BLOCK_SIZE 256
	85
	86	#define MWIFIEX_BUF_FLAG_REQUEUED_PKT BIT(0)
838e4f44	87	#define MWIFIEX_BUF_FLAG_BRIDGED_PKT BIT(1)
b23bce29	88	#define MWIFIEX_BUF_FLAG_TDLS_PKT BIT(2)
808bbebc	89	#define MWIFIEX_BUF_FLAG_EAPOL_TX_STATUS BIT(3)
18ca4382	90	#define MWIFIEX_BUF_FLAG_ACTION_TX_STATUS BIT(4)
e35000ea	91	#define MWIFIEX_BUF_FLAG_AGGR_PKT BIT(5)
838e4f44	92
61c87304 AP	93	#define MWIFIEX_BRIDGED_PKTS_THR_HIGH 1024
61c87304 AP	94	#define MWIFIEX_BRIDGED_PKTS_THR_LOW 128
5e6e3a92	95
429d90d2 AP	96	#define MWIFIEX_TDLS_DISABLE_LINK 0x00
	97	#define MWIFIEX_TDLS_ENABLE_LINK 0x01
	98	#define MWIFIEX_TDLS_CREATE_LINK 0x02
	99	#define MWIFIEX_TDLS_CONFIG_LINK 0x03
	100
9927baa3 AP	101	#define MWIFIEX_TDLS_RSSI_HIGH 50
	102	#define MWIFIEX_TDLS_RSSI_LOW 55
	103	#define MWIFIEX_TDLS_MAX_FAIL_COUNT 4
	104	#define MWIFIEX_AUTO_TDLS_IDLE_TIME 10
	105
cbf6e055 XH	106	/* 54M rates, index from 0 to 11 */
	107	#define MWIFIEX_RATE_INDEX_MCS0 12
	108	/* 12-27=MCS0-15(BW20) */
	109	#define MWIFIEX_BW20_MCS_NUM 15
	110
	111	/* Rate index for OFDM 0 */
	112	#define MWIFIEX_RATE_INDEX_OFDM0 4
	113
5b13d3e1 SL	114	#define MWIFIEX_MAX_STA_NUM 3
	115	#define MWIFIEX_MAX_UAP_NUM 3
	116	#define MWIFIEX_MAX_P2P_NUM 3
cf052335	117
85afb186 AP	118	#define MWIFIEX_A_BAND_START_FREQ 5000
85afb186 AP	119
92263a84 ZL	120	/* SDIO Aggr data packet special info */
	121	#define SDIO_MAX_AGGR_BUF_SIZE (256 * 255)
	122	#define BLOCK_NUMBER_OFFSET 15
	123	#define SDIO_HEADER_OFFSET 28
	124
5e6e3a92 BZ	125	enum mwifiex_bss_type {
	126	MWIFIEX_BSS_TYPE_STA = 0,
	127	MWIFIEX_BSS_TYPE_UAP = 1,
197f4a2e	128	MWIFIEX_BSS_TYPE_P2P = 2,
5e6e3a92 BZ	129	MWIFIEX_BSS_TYPE_ANY = 0xff,
	130	};
	131
	132	enum mwifiex_bss_role {
	133	MWIFIEX_BSS_ROLE_STA = 0,
	134	MWIFIEX_BSS_ROLE_UAP = 1,
	135	MWIFIEX_BSS_ROLE_ANY = 0xff,
	136	};
	137
5f2caaf3 AP	138	enum mwifiex_tdls_status {
	139	TDLS_NOT_SETUP = 0,
	140	TDLS_SETUP_INPROGRESS,
	141	TDLS_SETUP_COMPLETE,
	142	TDLS_SETUP_FAILURE,
	143	TDLS_LINK_TEARDOWN,
ba101ad5 XH	144	TDLS_CHAN_SWITCHING,
	145	TDLS_IN_BASE_CHAN,
	146	TDLS_IN_OFF_CHAN,
5f2caaf3 AP	147	};
5f2caaf3 AP	148
429d90d2 AP	149	enum mwifiex_tdls_error_code {
	150	TDLS_ERR_NO_ERROR = 0,
	151	TDLS_ERR_INTERNAL_ERROR,
	152	TDLS_ERR_MAX_LINKS_EST,
	153	TDLS_ERR_LINK_EXISTS,
	154	TDLS_ERR_LINK_NONEXISTENT,
	155	TDLS_ERR_PEER_STA_UNREACHABLE = 25,
	156	};
	157
5e6e3a92 BZ	158	#define BSS_ROLE_BIT_MASK BIT(0)
	159
	160	#define GET_BSS_ROLE(priv) ((priv)->bss_role & BSS_ROLE_BIT_MASK)
	161
	162	enum mwifiex_data_frame_type {
	163	MWIFIEX_DATA_FRAME_TYPE_ETH_II = 0,
	164	MWIFIEX_DATA_FRAME_TYPE_802_11,
	165	};
	166
	167	struct mwifiex_fw_image {
	168	u8 *helper_buf;
	169	u32 helper_len;
	170	u8 *fw_buf;
	171	u32 fw_len;
	172	};
	173
12190c5d AP	174	struct mwifiex_802_11_ssid {
	175	u32 ssid_len;
	176	u8 ssid[IEEE80211_MAX_SSID_LEN];
	177	};
	178
5e6e3a92	179	struct mwifiex_wait_queue {
600f5d90	180	wait_queue_head_t wait;
5e6e3a92	181	int status;
5e6e3a92 BZ	182	};
	183
	184	struct mwifiex_rxinfo {
92263a84	185	struct sk_buff *parent;
9da9a3b2 YAP	186	u8 bss_num;
9da9a3b2 YAP	187	u8 bss_type;
5e6e3a92	188	u8 use_count;
92263a84	189	u8 buf_type;
5e6e3a92 BZ	190	};
	191
	192	struct mwifiex_txinfo {
	193	u32 status_code;
	194	u8 flags;
9da9a3b2 YAP	195	u8 bss_num;
9da9a3b2 YAP	196	u8 bss_type;
e35000ea	197	u8 aggr_num;
a1ed4849	198	u32 pkt_len;
808bbebc	199	u8 ack_frame_id;
18ca4382	200	u64 cookie;
5e6e3a92 BZ	201	};
5e6e3a92 BZ	202
5e6e3a92 BZ	203	enum mwifiex_wmm_ac_e {
	204	WMM_AC_BK,
	205	WMM_AC_BE,
	206	WMM_AC_VI,
	207	WMM_AC_VO
	208	} __packed;
54428c57 AP	209
	210	struct ieee_types_wmm_ac_parameters {
	211	u8 aci_aifsn_bitmap;
	212	u8 ecw_bitmap;
	213	__le16 tx_op_limit;
	214	} __packed;
	215
	216	struct mwifiex_types_wmm_info {
	217	u8 oui[4];
	218	u8 subtype;
	219	u8 version;
	220	u8 qos_info;
	221	u8 reserved;
	222	struct ieee_types_wmm_ac_parameters ac_params[IEEE80211_NUM_ACS];
	223	} __packed;
587b36d3 AP	224
	225	struct mwifiex_arp_eth_header {
	226	struct arphdr hdr;
	227	u8 ar_sha[ETH_ALEN];
	228	u8 ar_sip[4];
	229	u8 ar_tha[ETH_ALEN];
	230	u8 ar_tip[4];
	231	} __packed;
bf354433 AP	232
	233	struct mwifiex_chan_stats {
	234	u8 chan_num;
	235	u8 bandcfg;
	236	u8 flags;
	237	s8 noise;
	238	u16 total_bss;
	239	u16 cca_scan_dur;
	240	u16 cca_busy_dur;
	241	} __packed;
cbf6e055 XH	242
	243	#define MWIFIEX_HIST_MAX_SAMPLES 1048576
	244	#define MWIFIEX_MAX_RX_RATES 44
	245	#define MWIFIEX_MAX_AC_RX_RATES 74
	246	#define MWIFIEX_MAX_SNR 256
	247	#define MWIFIEX_MAX_NOISE_FLR 256
	248	#define MWIFIEX_MAX_SIG_STRENGTH 256
	249
	250	struct mwifiex_histogram_data {
	251	atomic_t rx_rate[MWIFIEX_MAX_AC_RX_RATES];
	252	atomic_t snr[MWIFIEX_MAX_SNR];
	253	atomic_t noise_flr[MWIFIEX_MAX_NOISE_FLR];
	254	atomic_t sig_str[MWIFIEX_MAX_SIG_STRENGTH];
	255	atomic_t num_samples;
	256	};
	257
cf052335 AP	258	struct mwifiex_iface_comb {
	259	u8 sta_intf;
	260	u8 uap_intf;
	261	u8 p2p_intf;
	262	};
	263
85afb186 AP	264	struct mwifiex_radar_params {
	265	struct cfg80211_chan_def *chandef;
	266	u32 cac_time_ms;
	267	} __packed;
cf075eac AP	268
	269	struct mwifiex_11h_intf_state {
	270	bool is_11h_enabled;
	271	bool is_11h_active;
	272	} __packed;
5e6e3a92	273	#endif /* !_MWIFIEX_DECL_H_ */