brcmfmac: remove unnecessary EXPORT_SYMBOL() usage
[deliverable/linux.git] / drivers / net / wireless / mwifiex / 11n.c
CommitLineData
5e6e3a92
BZ
1/*
2 * Marvell Wireless LAN device driver: 802.11n
3 *
4 * Copyright (C) 2011, Marvell International Ltd.
5 *
6 * This software file (the "File") is distributed by Marvell International
7 * Ltd. under the terms of the GNU General Public License Version 2, June 1991
8 * (the "License"). You may use, redistribute and/or modify this File in
9 * accordance with the terms and conditions of the License, a copy of which
10 * is available by writing to the Free Software Foundation, Inc.,
11 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the
12 * worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt.
13 *
14 * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE
15 * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE
16 * ARE EXPRESSLY DISCLAIMED. The License provides additional details about
17 * this warranty disclaimer.
18 */
19
20#include "decl.h"
21#include "ioctl.h"
22#include "util.h"
23#include "fw.h"
24#include "main.h"
25#include "wmm.h"
26#include "11n.h"
27
28/*
29 * Fills HT capability information field, AMPDU Parameters field, HT extended
30 * capability field, and supported MCS set fields.
31 *
a46b7b5c
AK
32 * HT capability information field, AMPDU Parameters field, supported MCS set
33 * fields are retrieved from cfg80211 stack
5e6e3a92 34 *
a46b7b5c 35 * RD responder bit to set to clear in the extended capability header.
5e6e3a92
BZ
36 */
37void
a46b7b5c 38mwifiex_fill_cap_info(struct mwifiex_private *priv, u8 radio_type,
5e6e3a92
BZ
39 struct mwifiex_ie_types_htcap *ht_cap)
40{
5e6e3a92 41 uint16_t ht_ext_cap = le16_to_cpu(ht_cap->ht_cap.extended_ht_cap_info);
a46b7b5c
AK
42 struct ieee80211_supported_band *sband =
43 priv->wdev->wiphy->bands[radio_type];
5e6e3a92 44
a46b7b5c
AK
45 ht_cap->ht_cap.ampdu_params_info =
46 (sband->ht_cap.ampdu_factor &
84266841 47 IEEE80211_HT_AMPDU_PARM_FACTOR) |
a46b7b5c
AK
48 ((sband->ht_cap.ampdu_density <<
49 IEEE80211_HT_AMPDU_PARM_DENSITY_SHIFT) &
50 IEEE80211_HT_AMPDU_PARM_DENSITY);
5e6e3a92 51
a46b7b5c 52 memcpy((u8 *) &ht_cap->ht_cap.mcs, &sband->ht_cap.mcs,
84266841 53 sizeof(sband->ht_cap.mcs));
5e6e3a92 54
eecd8250 55 if (priv->bss_mode == NL80211_IFTYPE_STATION ||
d35f1035
AK
56 (sband->ht_cap.cap & IEEE80211_HT_CAP_SUP_WIDTH_20_40 &&
57 (priv->adapter->sec_chan_offset !=
58 IEEE80211_HT_PARAM_CHA_SEC_NONE)))
5e6e3a92
BZ
59 /* Set MCS32 for infra mode or ad-hoc mode with 40MHz support */
60 SETHT_MCS32(ht_cap->ht_cap.mcs.rx_mask);
61
62 /* Clear RD responder bit */
a3731658 63 ht_ext_cap &= ~IEEE80211_HT_EXT_CAP_RD_RESPONDER;
5e6e3a92 64
a46b7b5c 65 ht_cap->ht_cap.cap_info = cpu_to_le16(sband->ht_cap.cap);
5e6e3a92
BZ
66 ht_cap->ht_cap.extended_ht_cap_info = cpu_to_le16(ht_ext_cap);
67}
68
5e6e3a92
BZ
69/*
70 * This function returns the pointer to an entry in BA Stream
71 * table which matches the requested BA status.
72 */
73static struct mwifiex_tx_ba_stream_tbl *
3e822635
YAP
74mwifiex_get_ba_status(struct mwifiex_private *priv,
75 enum mwifiex_ba_status ba_status)
5e6e3a92
BZ
76{
77 struct mwifiex_tx_ba_stream_tbl *tx_ba_tsr_tbl;
78 unsigned long flags;
79
80 spin_lock_irqsave(&priv->tx_ba_stream_tbl_lock, flags);
81 list_for_each_entry(tx_ba_tsr_tbl, &priv->tx_ba_stream_tbl_ptr, list) {
82 if (tx_ba_tsr_tbl->ba_status == ba_status) {
83 spin_unlock_irqrestore(&priv->tx_ba_stream_tbl_lock,
84 flags);
85 return tx_ba_tsr_tbl;
86 }
87 }
88 spin_unlock_irqrestore(&priv->tx_ba_stream_tbl_lock, flags);
89 return NULL;
90}
91
92/*
93 * This function handles the command response of delete a block
94 * ack request.
95 *
96 * The function checks the response success status and takes action
97 * accordingly (send an add BA request in case of success, or recreate
98 * the deleted stream in case of failure, if the add BA was also
99 * initiated by us).
100 */
101int mwifiex_ret_11n_delba(struct mwifiex_private *priv,
102 struct host_cmd_ds_command *resp)
103{
104 int tid;
105 struct mwifiex_tx_ba_stream_tbl *tx_ba_tbl;
2c208890 106 struct host_cmd_ds_11n_delba *del_ba = &resp->params.del_ba;
5e6e3a92
BZ
107 uint16_t del_ba_param_set = le16_to_cpu(del_ba->del_ba_param_set);
108
109 tid = del_ba_param_set >> DELBA_TID_POS;
110 if (del_ba->del_result == BA_RESULT_SUCCESS) {
3e822635
YAP
111 mwifiex_del_ba_tbl(priv, tid, del_ba->peer_mac_addr,
112 TYPE_DELBA_SENT,
113 INITIATOR_BIT(del_ba_param_set));
5e6e3a92 114
3e822635 115 tx_ba_tbl = mwifiex_get_ba_status(priv, BA_SETUP_INPROGRESS);
5e6e3a92
BZ
116 if (tx_ba_tbl)
117 mwifiex_send_addba(priv, tx_ba_tbl->tid,
118 tx_ba_tbl->ra);
119 } else { /*
120 * In case of failure, recreate the deleted stream in case
121 * we initiated the ADDBA
122 */
3e822635
YAP
123 if (!INITIATOR_BIT(del_ba_param_set))
124 return 0;
125
126 mwifiex_create_ba_tbl(priv, del_ba->peer_mac_addr, tid,
127 BA_SETUP_INPROGRESS);
128
129 tx_ba_tbl = mwifiex_get_ba_status(priv, BA_SETUP_INPROGRESS);
130
131 if (tx_ba_tbl)
132 mwifiex_del_ba_tbl(priv, tx_ba_tbl->tid, tx_ba_tbl->ra,
133 TYPE_DELBA_SENT, true);
5e6e3a92
BZ
134 }
135
136 return 0;
137}
138
139/*
140 * This function handles the command response of add a block
141 * ack request.
142 *
143 * Handling includes changing the header fields to CPU formats, checking
144 * the response success status and taking actions accordingly (delete the
145 * BA stream table in case of failure).
146 */
147int mwifiex_ret_11n_addba_req(struct mwifiex_private *priv,
148 struct host_cmd_ds_command *resp)
149{
150 int tid;
2c208890 151 struct host_cmd_ds_11n_addba_rsp *add_ba_rsp = &resp->params.add_ba_rsp;
5e6e3a92
BZ
152 struct mwifiex_tx_ba_stream_tbl *tx_ba_tbl;
153
154 add_ba_rsp->ssn = cpu_to_le16((le16_to_cpu(add_ba_rsp->ssn))
155 & SSN_MASK);
156
157 tid = (le16_to_cpu(add_ba_rsp->block_ack_param_set)
158 & IEEE80211_ADDBA_PARAM_TID_MASK)
159 >> BLOCKACKPARAM_TID_POS;
160 if (le16_to_cpu(add_ba_rsp->status_code) == BA_RESULT_SUCCESS) {
3e822635 161 tx_ba_tbl = mwifiex_get_ba_tbl(priv, tid,
5e6e3a92
BZ
162 add_ba_rsp->peer_mac_addr);
163 if (tx_ba_tbl) {
164 dev_dbg(priv->adapter->dev, "info: BA stream complete\n");
3e822635 165 tx_ba_tbl->ba_status = BA_SETUP_COMPLETE;
5e6e3a92
BZ
166 } else {
167 dev_err(priv->adapter->dev, "BA stream not created\n");
168 }
169 } else {
3e822635
YAP
170 mwifiex_del_ba_tbl(priv, tid, add_ba_rsp->peer_mac_addr,
171 TYPE_DELBA_SENT, true);
5e6e3a92
BZ
172 if (add_ba_rsp->add_rsp_result != BA_RESULT_TIMEOUT)
173 priv->aggr_prio_tbl[tid].ampdu_ap =
174 BA_STREAM_NOT_ALLOWED;
175 }
176
177 return 0;
178}
179
5e6e3a92
BZ
180/*
181 * This function prepares command of reconfigure Tx buffer.
182 *
183 * Preparation includes -
184 * - Setting command ID, action and proper size
185 * - Setting Tx buffer size (for SET only)
186 * - Ensuring correct endian-ness
187 */
188int mwifiex_cmd_recfg_tx_buf(struct mwifiex_private *priv,
189 struct host_cmd_ds_command *cmd, int cmd_action,
a5ffddb7 190 u16 *buf_size)
5e6e3a92
BZ
191{
192 struct host_cmd_ds_txbuf_cfg *tx_buf = &cmd->params.tx_buf;
193 u16 action = (u16) cmd_action;
5e6e3a92
BZ
194
195 cmd->command = cpu_to_le16(HostCmd_CMD_RECONFIGURE_TX_BUFF);
196 cmd->size =
197 cpu_to_le16(sizeof(struct host_cmd_ds_txbuf_cfg) + S_DS_GEN);
198 tx_buf->action = cpu_to_le16(action);
199 switch (action) {
200 case HostCmd_ACT_GEN_SET:
a5ffddb7
AK
201 dev_dbg(priv->adapter->dev, "cmd: set tx_buf=%d\n", *buf_size);
202 tx_buf->buff_size = cpu_to_le16(*buf_size);
5e6e3a92
BZ
203 break;
204 case HostCmd_ACT_GEN_GET:
205 default:
206 tx_buf->buff_size = 0;
207 break;
208 }
209 return 0;
210}
211
212/*
213 * This function prepares command of AMSDU aggregation control.
214 *
215 * Preparation includes -
216 * - Setting command ID, action and proper size
217 * - Setting AMSDU control parameters (for SET only)
218 * - Ensuring correct endian-ness
219 */
572e8f3e 220int mwifiex_cmd_amsdu_aggr_ctrl(struct host_cmd_ds_command *cmd,
a5ffddb7
AK
221 int cmd_action,
222 struct mwifiex_ds_11n_amsdu_aggr_ctrl *aa_ctrl)
5e6e3a92
BZ
223{
224 struct host_cmd_ds_amsdu_aggr_ctrl *amsdu_ctrl =
225 &cmd->params.amsdu_aggr_ctrl;
226 u16 action = (u16) cmd_action;
5e6e3a92
BZ
227
228 cmd->command = cpu_to_le16(HostCmd_CMD_AMSDU_AGGR_CTRL);
229 cmd->size = cpu_to_le16(sizeof(struct host_cmd_ds_amsdu_aggr_ctrl)
230 + S_DS_GEN);
231 amsdu_ctrl->action = cpu_to_le16(action);
232 switch (action) {
233 case HostCmd_ACT_GEN_SET:
234 amsdu_ctrl->enable = cpu_to_le16(aa_ctrl->enable);
235 amsdu_ctrl->curr_buf_size = 0;
236 break;
237 case HostCmd_ACT_GEN_GET:
238 default:
239 amsdu_ctrl->curr_buf_size = 0;
240 break;
241 }
242 return 0;
243}
244
5e6e3a92
BZ
245/*
246 * This function prepares 11n configuration command.
247 *
248 * Preparation includes -
249 * - Setting command ID, action and proper size
250 * - Setting HT Tx capability and HT Tx information fields
251 * - Ensuring correct endian-ness
252 */
a5f39056
YAP
253int mwifiex_cmd_11n_cfg(struct mwifiex_private *priv,
254 struct host_cmd_ds_command *cmd, u16 cmd_action,
a5ffddb7 255 struct mwifiex_ds_11n_tx_cfg *txcfg)
5e6e3a92
BZ
256{
257 struct host_cmd_ds_11n_cfg *htcfg = &cmd->params.htcfg;
5e6e3a92
BZ
258
259 cmd->command = cpu_to_le16(HostCmd_CMD_11N_CFG);
260 cmd->size = cpu_to_le16(sizeof(struct host_cmd_ds_11n_cfg) + S_DS_GEN);
261 htcfg->action = cpu_to_le16(cmd_action);
262 htcfg->ht_tx_cap = cpu_to_le16(txcfg->tx_htcap);
263 htcfg->ht_tx_info = cpu_to_le16(txcfg->tx_htinfo);
a5f39056
YAP
264
265 if (priv->adapter->is_hw_11ac_capable)
266 htcfg->misc_config = cpu_to_le16(txcfg->misc_config);
267
5e6e3a92
BZ
268 return 0;
269}
270
271/*
272 * This function appends an 11n TLV to a buffer.
273 *
274 * Buffer allocation is responsibility of the calling
275 * function. No size validation is made here.
276 *
277 * The function fills up the following sections, if applicable -
278 * - HT capability IE
279 * - HT information IE (with channel list)
280 * - 20/40 BSS Coexistence IE
281 * - HT Extended Capabilities IE
282 */
283int
284mwifiex_cmd_append_11n_tlv(struct mwifiex_private *priv,
285 struct mwifiex_bssdescriptor *bss_desc,
286 u8 **buffer)
287{
288 struct mwifiex_ie_types_htcap *ht_cap;
289 struct mwifiex_ie_types_htinfo *ht_info;
290 struct mwifiex_ie_types_chan_list_param_set *chan_list;
291 struct mwifiex_ie_types_2040bssco *bss_co_2040;
292 struct mwifiex_ie_types_extcap *ext_cap;
293 int ret_len = 0;
a46b7b5c 294 struct ieee80211_supported_band *sband;
68f95b09 295 struct ieee_types_header *hdr;
a46b7b5c 296 u8 radio_type;
5e6e3a92
BZ
297
298 if (!buffer || !*buffer)
299 return ret_len;
300
a46b7b5c
AK
301 radio_type = mwifiex_band_to_radio_type((u8) bss_desc->bss_band);
302 sband = priv->wdev->wiphy->bands[radio_type];
303
5e6e3a92
BZ
304 if (bss_desc->bcn_ht_cap) {
305 ht_cap = (struct mwifiex_ie_types_htcap *) *buffer;
306 memset(ht_cap, 0, sizeof(struct mwifiex_ie_types_htcap));
307 ht_cap->header.type = cpu_to_le16(WLAN_EID_HT_CAPABILITY);
308 ht_cap->header.len =
309 cpu_to_le16(sizeof(struct ieee80211_ht_cap));
310 memcpy((u8 *) ht_cap + sizeof(struct mwifiex_ie_types_header),
311 (u8 *) bss_desc->bcn_ht_cap +
312 sizeof(struct ieee_types_header),
313 le16_to_cpu(ht_cap->header.len));
314
a46b7b5c 315 mwifiex_fill_cap_info(priv, radio_type, ht_cap);
5e6e3a92
BZ
316
317 *buffer += sizeof(struct mwifiex_ie_types_htcap);
318 ret_len += sizeof(struct mwifiex_ie_types_htcap);
319 }
320
074d46d1 321 if (bss_desc->bcn_ht_oper) {
eecd8250 322 if (priv->bss_mode == NL80211_IFTYPE_ADHOC) {
5e6e3a92
BZ
323 ht_info = (struct mwifiex_ie_types_htinfo *) *buffer;
324 memset(ht_info, 0,
325 sizeof(struct mwifiex_ie_types_htinfo));
326 ht_info->header.type =
074d46d1 327 cpu_to_le16(WLAN_EID_HT_OPERATION);
5e6e3a92 328 ht_info->header.len =
074d46d1
JB
329 cpu_to_le16(
330 sizeof(struct ieee80211_ht_operation));
5e6e3a92
BZ
331
332 memcpy((u8 *) ht_info +
333 sizeof(struct mwifiex_ie_types_header),
074d46d1 334 (u8 *) bss_desc->bcn_ht_oper +
5e6e3a92
BZ
335 sizeof(struct ieee_types_header),
336 le16_to_cpu(ht_info->header.len));
337
a46b7b5c
AK
338 if (!(sband->ht_cap.cap &
339 IEEE80211_HT_CAP_SUP_WIDTH_20_40))
074d46d1 340 ht_info->ht_oper.ht_param &=
6d2bd916
MY
341 ~(IEEE80211_HT_PARAM_CHAN_WIDTH_ANY |
342 IEEE80211_HT_PARAM_CHA_SEC_OFFSET);
5e6e3a92
BZ
343
344 *buffer += sizeof(struct mwifiex_ie_types_htinfo);
345 ret_len += sizeof(struct mwifiex_ie_types_htinfo);
346 }
347
348 chan_list =
349 (struct mwifiex_ie_types_chan_list_param_set *) *buffer;
350 memset(chan_list, 0,
351 sizeof(struct mwifiex_ie_types_chan_list_param_set));
352 chan_list->header.type = cpu_to_le16(TLV_TYPE_CHANLIST);
353 chan_list->header.len = cpu_to_le16(
354 sizeof(struct mwifiex_ie_types_chan_list_param_set) -
355 sizeof(struct mwifiex_ie_types_header));
356 chan_list->chan_scan_param[0].chan_number =
074d46d1 357 bss_desc->bcn_ht_oper->primary_chan;
5e6e3a92
BZ
358 chan_list->chan_scan_param[0].radio_type =
359 mwifiex_band_to_radio_type((u8) bss_desc->bss_band);
360
84266841 361 if (sband->ht_cap.cap & IEEE80211_HT_CAP_SUP_WIDTH_20_40 &&
074d46d1 362 bss_desc->bcn_ht_oper->ht_param &
84266841 363 IEEE80211_HT_PARAM_CHAN_WIDTH_ANY)
5e6e3a92
BZ
364 SET_SECONDARYCHAN(chan_list->chan_scan_param[0].
365 radio_type,
074d46d1 366 (bss_desc->bcn_ht_oper->ht_param &
6d2bd916 367 IEEE80211_HT_PARAM_CHA_SEC_OFFSET));
5e6e3a92
BZ
368
369 *buffer += sizeof(struct mwifiex_ie_types_chan_list_param_set);
370 ret_len += sizeof(struct mwifiex_ie_types_chan_list_param_set);
371 }
372
373 if (bss_desc->bcn_bss_co_2040) {
374 bss_co_2040 = (struct mwifiex_ie_types_2040bssco *) *buffer;
375 memset(bss_co_2040, 0,
376 sizeof(struct mwifiex_ie_types_2040bssco));
377 bss_co_2040->header.type = cpu_to_le16(WLAN_EID_BSS_COEX_2040);
378 bss_co_2040->header.len =
379 cpu_to_le16(sizeof(bss_co_2040->bss_co_2040));
380
381 memcpy((u8 *) bss_co_2040 +
382 sizeof(struct mwifiex_ie_types_header),
2c208890 383 bss_desc->bcn_bss_co_2040 +
5e6e3a92
BZ
384 sizeof(struct ieee_types_header),
385 le16_to_cpu(bss_co_2040->header.len));
386
387 *buffer += sizeof(struct mwifiex_ie_types_2040bssco);
388 ret_len += sizeof(struct mwifiex_ie_types_2040bssco);
389 }
390
391 if (bss_desc->bcn_ext_cap) {
68f95b09 392 hdr = (void *)bss_desc->bcn_ext_cap;
5e6e3a92
BZ
393 ext_cap = (struct mwifiex_ie_types_extcap *) *buffer;
394 memset(ext_cap, 0, sizeof(struct mwifiex_ie_types_extcap));
395 ext_cap->header.type = cpu_to_le16(WLAN_EID_EXT_CAPABILITY);
68f95b09 396 ext_cap->header.len = cpu_to_le16(hdr->len);
5e6e3a92 397
68f95b09 398 memcpy((u8 *)ext_cap->ext_capab,
2c208890 399 bss_desc->bcn_ext_cap + sizeof(struct ieee_types_header),
5e6e3a92
BZ
400 le16_to_cpu(ext_cap->header.len));
401
587b36d3
AP
402 if (hdr->len > 3 &&
403 ext_cap->ext_capab[3] & WLAN_EXT_CAPA4_INTERWORKING_ENABLED)
404 priv->hs2_enabled = true;
405 else
406 priv->hs2_enabled = false;
407
68f95b09
AP
408 *buffer += sizeof(struct mwifiex_ie_types_extcap) + hdr->len;
409 ret_len += sizeof(struct mwifiex_ie_types_extcap) + hdr->len;
5e6e3a92
BZ
410 }
411
412 return ret_len;
413}
414
5e6e3a92
BZ
415/*
416 * This function checks if the given pointer is valid entry of
417 * Tx BA Stream table.
418 */
419static int mwifiex_is_tx_ba_stream_ptr_valid(struct mwifiex_private *priv,
420 struct mwifiex_tx_ba_stream_tbl *tx_tbl_ptr)
421{
422 struct mwifiex_tx_ba_stream_tbl *tx_ba_tsr_tbl;
423
424 list_for_each_entry(tx_ba_tsr_tbl, &priv->tx_ba_stream_tbl_ptr, list) {
425 if (tx_ba_tsr_tbl == tx_tbl_ptr)
426 return true;
427 }
428
429 return false;
430}
431
432/*
433 * This function deletes the given entry in Tx BA Stream table.
434 *
435 * The function also performs a validity check on the supplied
436 * pointer before trying to delete.
437 */
438void mwifiex_11n_delete_tx_ba_stream_tbl_entry(struct mwifiex_private *priv,
439 struct mwifiex_tx_ba_stream_tbl *tx_ba_tsr_tbl)
440{
441 if (!tx_ba_tsr_tbl &&
84266841 442 mwifiex_is_tx_ba_stream_ptr_valid(priv, tx_ba_tsr_tbl))
5e6e3a92
BZ
443 return;
444
445 dev_dbg(priv->adapter->dev, "info: tx_ba_tsr_tbl %p\n", tx_ba_tsr_tbl);
446
447 list_del(&tx_ba_tsr_tbl->list);
448
449 kfree(tx_ba_tsr_tbl);
5e6e3a92
BZ
450}
451
452/*
453 * This function deletes all the entries in Tx BA Stream table.
454 */
455void mwifiex_11n_delete_all_tx_ba_stream_tbl(struct mwifiex_private *priv)
456{
457 int i;
458 struct mwifiex_tx_ba_stream_tbl *del_tbl_ptr, *tmp_node;
459 unsigned long flags;
460
461 spin_lock_irqsave(&priv->tx_ba_stream_tbl_lock, flags);
462 list_for_each_entry_safe(del_tbl_ptr, tmp_node,
463 &priv->tx_ba_stream_tbl_ptr, list)
464 mwifiex_11n_delete_tx_ba_stream_tbl_entry(priv, del_tbl_ptr);
465 spin_unlock_irqrestore(&priv->tx_ba_stream_tbl_lock, flags);
466
467 INIT_LIST_HEAD(&priv->tx_ba_stream_tbl_ptr);
468
469 for (i = 0; i < MAX_NUM_TID; ++i)
470 priv->aggr_prio_tbl[i].ampdu_ap =
471 priv->aggr_prio_tbl[i].ampdu_user;
472}
473
474/*
475 * This function returns the pointer to an entry in BA Stream
476 * table which matches the given RA/TID pair.
477 */
478struct mwifiex_tx_ba_stream_tbl *
3e822635 479mwifiex_get_ba_tbl(struct mwifiex_private *priv, int tid, u8 *ra)
5e6e3a92
BZ
480{
481 struct mwifiex_tx_ba_stream_tbl *tx_ba_tsr_tbl;
482 unsigned long flags;
483
484 spin_lock_irqsave(&priv->tx_ba_stream_tbl_lock, flags);
485 list_for_each_entry(tx_ba_tsr_tbl, &priv->tx_ba_stream_tbl_ptr, list) {
84266841
YAP
486 if (!memcmp(tx_ba_tsr_tbl->ra, ra, ETH_ALEN) &&
487 tx_ba_tsr_tbl->tid == tid) {
5e6e3a92
BZ
488 spin_unlock_irqrestore(&priv->tx_ba_stream_tbl_lock,
489 flags);
490 return tx_ba_tsr_tbl;
491 }
492 }
493 spin_unlock_irqrestore(&priv->tx_ba_stream_tbl_lock, flags);
494 return NULL;
495}
496
497/*
498 * This function creates an entry in Tx BA stream table for the
499 * given RA/TID pair.
500 */
3e822635
YAP
501void mwifiex_create_ba_tbl(struct mwifiex_private *priv, u8 *ra, int tid,
502 enum mwifiex_ba_status ba_status)
5e6e3a92
BZ
503{
504 struct mwifiex_tx_ba_stream_tbl *new_node;
505 unsigned long flags;
506
3e822635 507 if (!mwifiex_get_ba_tbl(priv, tid, ra)) {
5e6e3a92
BZ
508 new_node = kzalloc(sizeof(struct mwifiex_tx_ba_stream_tbl),
509 GFP_ATOMIC);
0d2e7a5c 510 if (!new_node)
5e6e3a92 511 return;
5e6e3a92
BZ
512
513 INIT_LIST_HEAD(&new_node->list);
514
515 new_node->tid = tid;
516 new_node->ba_status = ba_status;
517 memcpy(new_node->ra, ra, ETH_ALEN);
518
519 spin_lock_irqsave(&priv->tx_ba_stream_tbl_lock, flags);
520 list_add_tail(&new_node->list, &priv->tx_ba_stream_tbl_ptr);
521 spin_unlock_irqrestore(&priv->tx_ba_stream_tbl_lock, flags);
522 }
5e6e3a92
BZ
523}
524
525/*
526 * This function sends an add BA request to the given TID/RA pair.
527 */
528int mwifiex_send_addba(struct mwifiex_private *priv, int tid, u8 *peer_mac)
529{
530 struct host_cmd_ds_11n_addba_req add_ba_req;
531 static u8 dialog_tok;
532 int ret;
533
534 dev_dbg(priv->adapter->dev, "cmd: %s: tid %d\n", __func__, tid);
535
536 add_ba_req.block_ack_param_set = cpu_to_le16(
537 (u16) ((tid << BLOCKACKPARAM_TID_POS) |
538 (priv->add_ba_param.
539 tx_win_size << BLOCKACKPARAM_WINSIZE_POS) |
540 IMMEDIATE_BLOCK_ACK));
541 add_ba_req.block_ack_tmo = cpu_to_le16((u16)priv->add_ba_param.timeout);
542
543 ++dialog_tok;
544
545 if (dialog_tok == 0)
546 dialog_tok = 1;
547
548 add_ba_req.dialog_token = dialog_tok;
549 memcpy(&add_ba_req.peer_mac_addr, peer_mac, ETH_ALEN);
550
551 /* We don't wait for the response of this command */
600f5d90
AK
552 ret = mwifiex_send_cmd_async(priv, HostCmd_CMD_11N_ADDBA_REQ,
553 0, 0, &add_ba_req);
5e6e3a92
BZ
554
555 return ret;
556}
557
558/*
559 * This function sends a delete BA request to the given TID/RA pair.
560 */
561int mwifiex_send_delba(struct mwifiex_private *priv, int tid, u8 *peer_mac,
562 int initiator)
563{
564 struct host_cmd_ds_11n_delba delba;
565 int ret;
566 uint16_t del_ba_param_set;
567
568 memset(&delba, 0, sizeof(delba));
569 delba.del_ba_param_set = cpu_to_le16(tid << DELBA_TID_POS);
570
571 del_ba_param_set = le16_to_cpu(delba.del_ba_param_set);
572 if (initiator)
573 del_ba_param_set |= IEEE80211_DELBA_PARAM_INITIATOR_MASK;
574 else
575 del_ba_param_set &= ~IEEE80211_DELBA_PARAM_INITIATOR_MASK;
576
577 memcpy(&delba.peer_mac_addr, peer_mac, ETH_ALEN);
578
579 /* We don't wait for the response of this command */
600f5d90
AK
580 ret = mwifiex_send_cmd_async(priv, HostCmd_CMD_11N_DELBA,
581 HostCmd_ACT_GEN_SET, 0, &delba);
5e6e3a92
BZ
582
583 return ret;
584}
585
586/*
587 * This function handles the command response of a delete BA request.
588 */
589void mwifiex_11n_delete_ba_stream(struct mwifiex_private *priv, u8 *del_ba)
590{
591 struct host_cmd_ds_11n_delba *cmd_del_ba =
592 (struct host_cmd_ds_11n_delba *) del_ba;
593 uint16_t del_ba_param_set = le16_to_cpu(cmd_del_ba->del_ba_param_set);
594 int tid;
595
596 tid = del_ba_param_set >> DELBA_TID_POS;
597
3e822635
YAP
598 mwifiex_del_ba_tbl(priv, tid, cmd_del_ba->peer_mac_addr,
599 TYPE_DELBA_RECEIVE, INITIATOR_BIT(del_ba_param_set));
5e6e3a92
BZ
600}
601
602/*
603 * This function retrieves the Rx reordering table.
604 */
605int mwifiex_get_rx_reorder_tbl(struct mwifiex_private *priv,
606 struct mwifiex_ds_rx_reorder_tbl *buf)
607{
608 int i;
609 struct mwifiex_ds_rx_reorder_tbl *rx_reo_tbl = buf;
610 struct mwifiex_rx_reorder_tbl *rx_reorder_tbl_ptr;
611 int count = 0;
612 unsigned long flags;
613
614 spin_lock_irqsave(&priv->rx_reorder_tbl_lock, flags);
615 list_for_each_entry(rx_reorder_tbl_ptr, &priv->rx_reorder_tbl_ptr,
616 list) {
617 rx_reo_tbl->tid = (u16) rx_reorder_tbl_ptr->tid;
618 memcpy(rx_reo_tbl->ta, rx_reorder_tbl_ptr->ta, ETH_ALEN);
619 rx_reo_tbl->start_win = rx_reorder_tbl_ptr->start_win;
620 rx_reo_tbl->win_size = rx_reorder_tbl_ptr->win_size;
621 for (i = 0; i < rx_reorder_tbl_ptr->win_size; ++i) {
622 if (rx_reorder_tbl_ptr->rx_reorder_ptr[i])
623 rx_reo_tbl->buffer[i] = true;
624 else
625 rx_reo_tbl->buffer[i] = false;
626 }
627 rx_reo_tbl++;
628 count++;
629
630 if (count >= MWIFIEX_MAX_RX_BASTREAM_SUPPORTED)
631 break;
632 }
633 spin_unlock_irqrestore(&priv->rx_reorder_tbl_lock, flags);
634
635 return count;
636}
637
638/*
639 * This function retrieves the Tx BA stream table.
640 */
641int mwifiex_get_tx_ba_stream_tbl(struct mwifiex_private *priv,
642 struct mwifiex_ds_tx_ba_stream_tbl *buf)
643{
644 struct mwifiex_tx_ba_stream_tbl *tx_ba_tsr_tbl;
645 struct mwifiex_ds_tx_ba_stream_tbl *rx_reo_tbl = buf;
646 int count = 0;
647 unsigned long flags;
648
649 spin_lock_irqsave(&priv->tx_ba_stream_tbl_lock, flags);
650 list_for_each_entry(tx_ba_tsr_tbl, &priv->tx_ba_stream_tbl_ptr, list) {
651 rx_reo_tbl->tid = (u16) tx_ba_tsr_tbl->tid;
652 dev_dbg(priv->adapter->dev, "data: %s tid=%d\n",
84266841 653 __func__, rx_reo_tbl->tid);
5e6e3a92
BZ
654 memcpy(rx_reo_tbl->ra, tx_ba_tsr_tbl->ra, ETH_ALEN);
655 rx_reo_tbl++;
656 count++;
657 if (count >= MWIFIEX_MAX_TX_BASTREAM_SUPPORTED)
658 break;
659 }
660 spin_unlock_irqrestore(&priv->tx_ba_stream_tbl_lock, flags);
661
662 return count;
663}
3e238a11
AP
664
665/*
666 * This function retrieves the entry for specific tx BA stream table by RA and
667 * deletes it.
668 */
669void mwifiex_del_tx_ba_stream_tbl_by_ra(struct mwifiex_private *priv, u8 *ra)
670{
671 struct mwifiex_tx_ba_stream_tbl *tbl, *tmp;
672 unsigned long flags;
673
674 if (!ra)
675 return;
676
677 spin_lock_irqsave(&priv->tx_ba_stream_tbl_lock, flags);
678 list_for_each_entry_safe(tbl, tmp, &priv->tx_ba_stream_tbl_ptr, list) {
679 if (!memcmp(tbl->ra, ra, ETH_ALEN)) {
680 spin_unlock_irqrestore(&priv->tx_ba_stream_tbl_lock,
681 flags);
682 mwifiex_11n_delete_tx_ba_stream_tbl_entry(priv, tbl);
683 spin_lock_irqsave(&priv->tx_ba_stream_tbl_lock, flags);
684 }
685 }
686 spin_unlock_irqrestore(&priv->tx_ba_stream_tbl_lock, flags);
687
688 return;
689}
04abc0a3
AP
690
691/* This function initializes the BlockACK setup information for given
692 * mwifiex_private structure.
693 */
694void mwifiex_set_ba_params(struct mwifiex_private *priv)
695{
696 priv->add_ba_param.timeout = MWIFIEX_DEFAULT_BLOCK_ACK_TIMEOUT;
697
698 if (GET_BSS_ROLE(priv) == MWIFIEX_BSS_ROLE_UAP) {
699 priv->add_ba_param.tx_win_size =
700 MWIFIEX_UAP_AMPDU_DEF_TXWINSIZE;
701 priv->add_ba_param.rx_win_size =
702 MWIFIEX_UAP_AMPDU_DEF_RXWINSIZE;
703 } else {
704 priv->add_ba_param.tx_win_size =
705 MWIFIEX_STA_AMPDU_DEF_TXWINSIZE;
706 priv->add_ba_param.rx_win_size =
707 MWIFIEX_STA_AMPDU_DEF_RXWINSIZE;
708 }
709
710 return;
711}
This page took 0.267056 seconds and 5 git commands to generate.