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zd1211rw: detect stalled beacon interrupt faster
[deliverable/linux.git] / drivers / net / wireless / mwifiex / 11n.c
CommitLineData
5e6e3a92
BZ		 1/*
2 * Marvell Wireless LAN device driver: 802.11n
3 *
4 * Copyright (C) 2011, Marvell International Ltd.
5 *
6 * This software file (the "File") is distributed by Marvell International
7 * Ltd. under the terms of the GNU General Public License Version 2, June 1991
8 * (the "License"). You may use, redistribute and/or modify this File in
9 * accordance with the terms and conditions of the License, a copy of which
10 * is available by writing to the Free Software Foundation, Inc.,
11 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the
12 * worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt.
13 *
14 * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE
15 * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE
16 * ARE EXPRESSLY DISCLAIMED. The License provides additional details about
17 * this warranty disclaimer.
18 */
19
20#include "decl.h"
21#include "ioctl.h"
22#include "util.h"
23#include "fw.h"
24#include "main.h"
25#include "wmm.h"
26#include "11n.h"
27
28/*
29 * Fills HT capability information field, AMPDU Parameters field, HT extended
30 * capability field, and supported MCS set fields.
31 *
a46b7b5c
AK		 32 * HT capability information field, AMPDU Parameters field, supported MCS set
33 * fields are retrieved from cfg80211 stack
5e6e3a92 34 *
a46b7b5c 35 * RD responder bit to set to clear in the extended capability header.
5e6e3a92
BZ		 36 */
37void
a46b7b5c 38mwifiex_fill_cap_info(struct mwifiex_private *priv, u8 radio_type,
5e6e3a92
BZ		 39 struct mwifiex_ie_types_htcap *ht_cap)
40{
5e6e3a92 41 uint16_t ht_ext_cap = le16_to_cpu(ht_cap->ht_cap.extended_ht_cap_info);
a46b7b5c
AK		 42 struct ieee80211_supported_band *sband =
43 priv->wdev->wiphy->bands[radio_type];
5e6e3a92 44
a46b7b5c
AK		 45 ht_cap->ht_cap.ampdu_params_info =
46 (sband->ht_cap.ampdu_factor &
47 IEEE80211_HT_AMPDU_PARM_FACTOR)|
48 ((sband->ht_cap.ampdu_density <<
49 IEEE80211_HT_AMPDU_PARM_DENSITY_SHIFT) &
50 IEEE80211_HT_AMPDU_PARM_DENSITY);
5e6e3a92 51
a46b7b5c
AK		 52 memcpy((u8 *) &ht_cap->ht_cap.mcs, &sband->ht_cap.mcs,
53 sizeof(sband->ht_cap.mcs));
5e6e3a92 54
eecd8250 55 if (priv->bss_mode == NL80211_IFTYPE_STATION ||
a46b7b5c 56 (sband->ht_cap.cap & IEEE80211_HT_CAP_SUP_WIDTH_20_40))
5e6e3a92
BZ		 57 /* Set MCS32 for infra mode or ad-hoc mode with 40MHz support */
58 SETHT_MCS32(ht_cap->ht_cap.mcs.rx_mask);
59
60 /* Clear RD responder bit */
a3731658 61 ht_ext_cap &= ~IEEE80211_HT_EXT_CAP_RD_RESPONDER;
5e6e3a92 62
a46b7b5c 63 ht_cap->ht_cap.cap_info = cpu_to_le16(sband->ht_cap.cap);
5e6e3a92
BZ		 64 ht_cap->ht_cap.extended_ht_cap_info = cpu_to_le16(ht_ext_cap);
65}
66
5e6e3a92
BZ		 67/*
68 * This function returns the pointer to an entry in BA Stream
69 * table which matches the requested BA status.
70 */
71static struct mwifiex_tx_ba_stream_tbl *
72mwifiex_11n_get_tx_ba_stream_status(struct mwifiex_private *priv,
73 enum mwifiex_ba_status ba_status)
74{
75 struct mwifiex_tx_ba_stream_tbl *tx_ba_tsr_tbl;
76 unsigned long flags;
77
78 spin_lock_irqsave(&priv->tx_ba_stream_tbl_lock, flags);
79 list_for_each_entry(tx_ba_tsr_tbl, &priv->tx_ba_stream_tbl_ptr, list) {
80 if (tx_ba_tsr_tbl->ba_status == ba_status) {
81 spin_unlock_irqrestore(&priv->tx_ba_stream_tbl_lock,
82 flags);
83 return tx_ba_tsr_tbl;
84 }
85 }
86 spin_unlock_irqrestore(&priv->tx_ba_stream_tbl_lock, flags);
87 return NULL;
88}
89
90/*
91 * This function handles the command response of delete a block
92 * ack request.
93 *
94 * The function checks the response success status and takes action
95 * accordingly (send an add BA request in case of success, or recreate
96 * the deleted stream in case of failure, if the add BA was also
97 * initiated by us).
98 */
99int mwifiex_ret_11n_delba(struct mwifiex_private *priv,
100 struct host_cmd_ds_command *resp)
101{
102 int tid;
103 struct mwifiex_tx_ba_stream_tbl *tx_ba_tbl;
104 struct host_cmd_ds_11n_delba *del_ba =
105 (struct host_cmd_ds_11n_delba *) &resp->params.del_ba;
106 uint16_t del_ba_param_set = le16_to_cpu(del_ba->del_ba_param_set);
107
108 tid = del_ba_param_set >> DELBA_TID_POS;
109 if (del_ba->del_result == BA_RESULT_SUCCESS) {
110 mwifiex_11n_delete_ba_stream_tbl(priv, tid,
111 del_ba->peer_mac_addr, TYPE_DELBA_SENT,
112 INITIATOR_BIT(del_ba_param_set));
113
114 tx_ba_tbl = mwifiex_11n_get_tx_ba_stream_status(priv,
115 BA_STREAM_SETUP_INPROGRESS);
116 if (tx_ba_tbl)
117 mwifiex_send_addba(priv, tx_ba_tbl->tid,
118 tx_ba_tbl->ra);
119 } else { /*
120 * In case of failure, recreate the deleted stream in case
121 * we initiated the ADDBA
122 */
123 if (INITIATOR_BIT(del_ba_param_set)) {
124 mwifiex_11n_create_tx_ba_stream_tbl(priv,
125 del_ba->peer_mac_addr, tid,
126 BA_STREAM_SETUP_INPROGRESS);
127
128 tx_ba_tbl = mwifiex_11n_get_tx_ba_stream_status(priv,
129 BA_STREAM_SETUP_INPROGRESS);
130 if (tx_ba_tbl)
131 mwifiex_11n_delete_ba_stream_tbl(priv,
132 tx_ba_tbl->tid, tx_ba_tbl->ra,
133 TYPE_DELBA_SENT, true);
134 }
135 }
136
137 return 0;
138}
139
140/*
141 * This function handles the command response of add a block
142 * ack request.
143 *
144 * Handling includes changing the header fields to CPU formats, checking
145 * the response success status and taking actions accordingly (delete the
146 * BA stream table in case of failure).
147 */
148int mwifiex_ret_11n_addba_req(struct mwifiex_private *priv,
149 struct host_cmd_ds_command *resp)
150{
151 int tid;
152 struct host_cmd_ds_11n_addba_rsp *add_ba_rsp =
153 (struct host_cmd_ds_11n_addba_rsp *) &resp->params.add_ba_rsp;
154 struct mwifiex_tx_ba_stream_tbl *tx_ba_tbl;
155
156 add_ba_rsp->ssn = cpu_to_le16((le16_to_cpu(add_ba_rsp->ssn))
157 & SSN_MASK);
158
159 tid = (le16_to_cpu(add_ba_rsp->block_ack_param_set)
160 & IEEE80211_ADDBA_PARAM_TID_MASK)
161 >> BLOCKACKPARAM_TID_POS;
162 if (le16_to_cpu(add_ba_rsp->status_code) == BA_RESULT_SUCCESS) {
163 tx_ba_tbl = mwifiex_11n_get_tx_ba_stream_tbl(priv, tid,
164 add_ba_rsp->peer_mac_addr);
165 if (tx_ba_tbl) {
166 dev_dbg(priv->adapter->dev, "info: BA stream complete\n");
167 tx_ba_tbl->ba_status = BA_STREAM_SETUP_COMPLETE;
168 } else {
169 dev_err(priv->adapter->dev, "BA stream not created\n");
170 }
171 } else {
172 mwifiex_11n_delete_ba_stream_tbl(priv, tid,
173 add_ba_rsp->peer_mac_addr,
174 TYPE_DELBA_SENT, true);
175 if (add_ba_rsp->add_rsp_result != BA_RESULT_TIMEOUT)
176 priv->aggr_prio_tbl[tid].ampdu_ap =
177 BA_STREAM_NOT_ALLOWED;
178 }
179
180 return 0;
181}
182
183/*
184 * This function handles the command response of 11n configuration request.
185 *
186 * Handling includes changing the header fields into CPU format.
187 */
572e8f3e 188int mwifiex_ret_11n_cfg(struct host_cmd_ds_command *resp, void *data_buf)
5e6e3a92 189{
270e58e8 190 struct mwifiex_ds_11n_tx_cfg *tx_cfg;
5e6e3a92
BZ		 191 struct host_cmd_ds_11n_cfg *htcfg = &resp->params.htcfg;
192
193 if (data_buf) {
194 tx_cfg = (struct mwifiex_ds_11n_tx_cfg *) data_buf;
195 tx_cfg->tx_htcap = le16_to_cpu(htcfg->ht_tx_cap);
196 tx_cfg->tx_htinfo = le16_to_cpu(htcfg->ht_tx_info);
197 }
198 return 0;
199}
200
201/*
202 * This function prepares command of reconfigure Tx buffer.
203 *
204 * Preparation includes -
205 * - Setting command ID, action and proper size
206 * - Setting Tx buffer size (for SET only)
207 * - Ensuring correct endian-ness
208 */
209int mwifiex_cmd_recfg_tx_buf(struct mwifiex_private *priv,
210 struct host_cmd_ds_command *cmd, int cmd_action,
211 void *data_buf)
212{
213 struct host_cmd_ds_txbuf_cfg *tx_buf = &cmd->params.tx_buf;
214 u16 action = (u16) cmd_action;
215 u16 buf_size = *((u16 *) data_buf);
216
217 cmd->command = cpu_to_le16(HostCmd_CMD_RECONFIGURE_TX_BUFF);
218 cmd->size =
219 cpu_to_le16(sizeof(struct host_cmd_ds_txbuf_cfg) + S_DS_GEN);
220 tx_buf->action = cpu_to_le16(action);
221 switch (action) {
222 case HostCmd_ACT_GEN_SET:
223 dev_dbg(priv->adapter->dev, "cmd: set tx_buf=%d\n", buf_size);
224 tx_buf->buff_size = cpu_to_le16(buf_size);
225 break;
226 case HostCmd_ACT_GEN_GET:
227 default:
228 tx_buf->buff_size = 0;
229 break;
230 }
231 return 0;
232}
233
234/*
235 * This function prepares command of AMSDU aggregation control.
236 *
237 * Preparation includes -
238 * - Setting command ID, action and proper size
239 * - Setting AMSDU control parameters (for SET only)
240 * - Ensuring correct endian-ness
241 */
572e8f3e 242int mwifiex_cmd_amsdu_aggr_ctrl(struct host_cmd_ds_command *cmd,
5e6e3a92
BZ		 243 int cmd_action, void *data_buf)
244{
245 struct host_cmd_ds_amsdu_aggr_ctrl *amsdu_ctrl =
246 &cmd->params.amsdu_aggr_ctrl;
247 u16 action = (u16) cmd_action;
248 struct mwifiex_ds_11n_amsdu_aggr_ctrl *aa_ctrl =
249 (struct mwifiex_ds_11n_amsdu_aggr_ctrl *) data_buf;
250
251 cmd->command = cpu_to_le16(HostCmd_CMD_AMSDU_AGGR_CTRL);
252 cmd->size = cpu_to_le16(sizeof(struct host_cmd_ds_amsdu_aggr_ctrl)
253 + S_DS_GEN);
254 amsdu_ctrl->action = cpu_to_le16(action);
255 switch (action) {
256 case HostCmd_ACT_GEN_SET:
257 amsdu_ctrl->enable = cpu_to_le16(aa_ctrl->enable);
258 amsdu_ctrl->curr_buf_size = 0;
259 break;
260 case HostCmd_ACT_GEN_GET:
261 default:
262 amsdu_ctrl->curr_buf_size = 0;
263 break;
264 }
265 return 0;
266}
267
268/*
269 * This function handles the command response of AMSDU aggregation
270 * control request.
271 *
272 * Handling includes changing the header fields into CPU format.
273 */
572e8f3e 274int mwifiex_ret_amsdu_aggr_ctrl(struct host_cmd_ds_command *resp,
5e6e3a92
BZ		 275 void *data_buf)
276{
270e58e8 277 struct mwifiex_ds_11n_amsdu_aggr_ctrl *amsdu_aggr_ctrl;
5e6e3a92
BZ		 278 struct host_cmd_ds_amsdu_aggr_ctrl *amsdu_ctrl =
279 &resp->params.amsdu_aggr_ctrl;
280
281 if (data_buf) {
282 amsdu_aggr_ctrl =
283 (struct mwifiex_ds_11n_amsdu_aggr_ctrl *) data_buf;
284 amsdu_aggr_ctrl->enable = le16_to_cpu(amsdu_ctrl->enable);
285 amsdu_aggr_ctrl->curr_buf_size =
286 le16_to_cpu(amsdu_ctrl->curr_buf_size);
287 }
288 return 0;
289}
290
291/*
292 * This function prepares 11n configuration command.
293 *
294 * Preparation includes -
295 * - Setting command ID, action and proper size
296 * - Setting HT Tx capability and HT Tx information fields
297 * - Ensuring correct endian-ness
298 */
572e8f3e 299int mwifiex_cmd_11n_cfg(struct host_cmd_ds_command *cmd,
5e6e3a92
BZ		 300 u16 cmd_action, void *data_buf)
301{
302 struct host_cmd_ds_11n_cfg *htcfg = &cmd->params.htcfg;
303 struct mwifiex_ds_11n_tx_cfg *txcfg =
304 (struct mwifiex_ds_11n_tx_cfg *) data_buf;
305
306 cmd->command = cpu_to_le16(HostCmd_CMD_11N_CFG);
307 cmd->size = cpu_to_le16(sizeof(struct host_cmd_ds_11n_cfg) + S_DS_GEN);
308 htcfg->action = cpu_to_le16(cmd_action);
309 htcfg->ht_tx_cap = cpu_to_le16(txcfg->tx_htcap);
310 htcfg->ht_tx_info = cpu_to_le16(txcfg->tx_htinfo);
311 return 0;
312}
313
314/*
315 * This function appends an 11n TLV to a buffer.
316 *
317 * Buffer allocation is responsibility of the calling
318 * function. No size validation is made here.
319 *
320 * The function fills up the following sections, if applicable -
321 * - HT capability IE
322 * - HT information IE (with channel list)
323 * - 20/40 BSS Coexistence IE
324 * - HT Extended Capabilities IE
325 */
326int
327mwifiex_cmd_append_11n_tlv(struct mwifiex_private *priv,
328 struct mwifiex_bssdescriptor *bss_desc,
329 u8 **buffer)
330{
331 struct mwifiex_ie_types_htcap *ht_cap;
332 struct mwifiex_ie_types_htinfo *ht_info;
333 struct mwifiex_ie_types_chan_list_param_set *chan_list;
334 struct mwifiex_ie_types_2040bssco *bss_co_2040;
335 struct mwifiex_ie_types_extcap *ext_cap;
336 int ret_len = 0;
a46b7b5c
AK		 337 struct ieee80211_supported_band *sband;
338 u8 radio_type;
5e6e3a92
BZ		 339
340 if (!buffer || !*buffer)
341 return ret_len;
342
a46b7b5c
AK		 343 radio_type = mwifiex_band_to_radio_type((u8) bss_desc->bss_band);
344 sband = priv->wdev->wiphy->bands[radio_type];
345
5e6e3a92
BZ		 346 if (bss_desc->bcn_ht_cap) {
347 ht_cap = (struct mwifiex_ie_types_htcap *) *buffer;
348 memset(ht_cap, 0, sizeof(struct mwifiex_ie_types_htcap));
349 ht_cap->header.type = cpu_to_le16(WLAN_EID_HT_CAPABILITY);
350 ht_cap->header.len =
351 cpu_to_le16(sizeof(struct ieee80211_ht_cap));
352 memcpy((u8 *) ht_cap + sizeof(struct mwifiex_ie_types_header),
353 (u8 *) bss_desc->bcn_ht_cap +
354 sizeof(struct ieee_types_header),
355 le16_to_cpu(ht_cap->header.len));
356
a46b7b5c 357 mwifiex_fill_cap_info(priv, radio_type, ht_cap);
5e6e3a92
BZ		 358
359 *buffer += sizeof(struct mwifiex_ie_types_htcap);
360 ret_len += sizeof(struct mwifiex_ie_types_htcap);
361 }
362
363 if (bss_desc->bcn_ht_info) {
eecd8250 364 if (priv->bss_mode == NL80211_IFTYPE_ADHOC) {
5e6e3a92
BZ		 365 ht_info = (struct mwifiex_ie_types_htinfo *) *buffer;
366 memset(ht_info, 0,
367 sizeof(struct mwifiex_ie_types_htinfo));
368 ht_info->header.type =
369 cpu_to_le16(WLAN_EID_HT_INFORMATION);
370 ht_info->header.len =
371 cpu_to_le16(sizeof(struct ieee80211_ht_info));
372
373 memcpy((u8 *) ht_info +
374 sizeof(struct mwifiex_ie_types_header),
375 (u8 *) bss_desc->bcn_ht_info +
376 sizeof(struct ieee_types_header),
377 le16_to_cpu(ht_info->header.len));
378
a46b7b5c
AK		 379 if (!(sband->ht_cap.cap &
380 IEEE80211_HT_CAP_SUP_WIDTH_20_40))
6d2bd916
MY		 381 ht_info->ht_info.ht_param &=
382 ~(IEEE80211_HT_PARAM_CHAN_WIDTH_ANY |
383 IEEE80211_HT_PARAM_CHA_SEC_OFFSET);
5e6e3a92
BZ		 384
385 *buffer += sizeof(struct mwifiex_ie_types_htinfo);
386 ret_len += sizeof(struct mwifiex_ie_types_htinfo);
387 }
388
389 chan_list =
390 (struct mwifiex_ie_types_chan_list_param_set *) *buffer;
391 memset(chan_list, 0,
392 sizeof(struct mwifiex_ie_types_chan_list_param_set));
393 chan_list->header.type = cpu_to_le16(TLV_TYPE_CHANLIST);
394 chan_list->header.len = cpu_to_le16(
395 sizeof(struct mwifiex_ie_types_chan_list_param_set) -
396 sizeof(struct mwifiex_ie_types_header));
397 chan_list->chan_scan_param[0].chan_number =
398 bss_desc->bcn_ht_info->control_chan;
399 chan_list->chan_scan_param[0].radio_type =
400 mwifiex_band_to_radio_type((u8) bss_desc->bss_band);
401
a46b7b5c 402 if ((sband->ht_cap.cap & IEEE80211_HT_CAP_SUP_WIDTH_20_40)
6d2bd916
MY		 403 && (bss_desc->bcn_ht_info->ht_param &
404 IEEE80211_HT_PARAM_CHAN_WIDTH_ANY))
5e6e3a92
BZ		 405 SET_SECONDARYCHAN(chan_list->chan_scan_param[0].
406 radio_type,
6d2bd916
MY		 407 (bss_desc->bcn_ht_info->ht_param &
408 IEEE80211_HT_PARAM_CHA_SEC_OFFSET));
5e6e3a92
BZ		 409
410 *buffer += sizeof(struct mwifiex_ie_types_chan_list_param_set);
411 ret_len += sizeof(struct mwifiex_ie_types_chan_list_param_set);
412 }
413
414 if (bss_desc->bcn_bss_co_2040) {
415 bss_co_2040 = (struct mwifiex_ie_types_2040bssco *) *buffer;
416 memset(bss_co_2040, 0,
417 sizeof(struct mwifiex_ie_types_2040bssco));
418 bss_co_2040->header.type = cpu_to_le16(WLAN_EID_BSS_COEX_2040);
419 bss_co_2040->header.len =
420 cpu_to_le16(sizeof(bss_co_2040->bss_co_2040));
421
422 memcpy((u8 *) bss_co_2040 +
423 sizeof(struct mwifiex_ie_types_header),
424 (u8 *) bss_desc->bcn_bss_co_2040 +
425 sizeof(struct ieee_types_header),
426 le16_to_cpu(bss_co_2040->header.len));
427
428 *buffer += sizeof(struct mwifiex_ie_types_2040bssco);
429 ret_len += sizeof(struct mwifiex_ie_types_2040bssco);
430 }
431
432 if (bss_desc->bcn_ext_cap) {
433 ext_cap = (struct mwifiex_ie_types_extcap *) *buffer;
434 memset(ext_cap, 0, sizeof(struct mwifiex_ie_types_extcap));
435 ext_cap->header.type = cpu_to_le16(WLAN_EID_EXT_CAPABILITY);
436 ext_cap->header.len = cpu_to_le16(sizeof(ext_cap->ext_cap));
437
438 memcpy((u8 *) ext_cap +
439 sizeof(struct mwifiex_ie_types_header),
440 (u8 *) bss_desc->bcn_ext_cap +
441 sizeof(struct ieee_types_header),
442 le16_to_cpu(ext_cap->header.len));
443
444 *buffer += sizeof(struct mwifiex_ie_types_extcap);
445 ret_len += sizeof(struct mwifiex_ie_types_extcap);
446 }
447
448 return ret_len;
449}
450
451/*
452 * This function reconfigures the Tx buffer size in firmware.
453 *
454 * This function prepares a firmware command and issues it, if
455 * the current Tx buffer size is different from the one requested.
456 * Maximum configurable Tx buffer size is limited by the HT capability
457 * field value.
458 */
459void
460mwifiex_cfg_tx_buf(struct mwifiex_private *priv,
461 struct mwifiex_bssdescriptor *bss_desc)
462{
463 u16 max_amsdu = MWIFIEX_TX_DATA_BUF_SIZE_2K;
270e58e8 464 u16 tx_buf, curr_tx_buf_size = 0;
5e6e3a92
BZ		 465
466 if (bss_desc->bcn_ht_cap) {
6d2bd916
MY		 467 if (le16_to_cpu(bss_desc->bcn_ht_cap->cap_info) &
468 IEEE80211_HT_CAP_MAX_AMSDU)
5e6e3a92
BZ		 469 max_amsdu = MWIFIEX_TX_DATA_BUF_SIZE_8K;
470 else
471 max_amsdu = MWIFIEX_TX_DATA_BUF_SIZE_4K;
472 }
473
474 tx_buf = min(priv->adapter->max_tx_buf_size, max_amsdu);
475
476 dev_dbg(priv->adapter->dev, "info: max_amsdu=%d, max_tx_buf=%d\n",
477 max_amsdu, priv->adapter->max_tx_buf_size);
478
479 if (priv->adapter->curr_tx_buf_size <= MWIFIEX_TX_DATA_BUF_SIZE_2K)
480 curr_tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_2K;
481 else if (priv->adapter->curr_tx_buf_size <= MWIFIEX_TX_DATA_BUF_SIZE_4K)
482 curr_tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_4K;
483 else if (priv->adapter->curr_tx_buf_size <= MWIFIEX_TX_DATA_BUF_SIZE_8K)
484 curr_tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_8K;
485 if (curr_tx_buf_size != tx_buf)
600f5d90
AK		 486 mwifiex_send_cmd_async(priv, HostCmd_CMD_RECONFIGURE_TX_BUFF,
487 HostCmd_ACT_GEN_SET, 0, &tx_buf);
5e6e3a92
BZ		 488}
489
490/*
491 * This function checks if the given pointer is valid entry of
492 * Tx BA Stream table.
493 */
494static int mwifiex_is_tx_ba_stream_ptr_valid(struct mwifiex_private *priv,
495 struct mwifiex_tx_ba_stream_tbl *tx_tbl_ptr)
496{
497 struct mwifiex_tx_ba_stream_tbl *tx_ba_tsr_tbl;
498
499 list_for_each_entry(tx_ba_tsr_tbl, &priv->tx_ba_stream_tbl_ptr, list) {
500 if (tx_ba_tsr_tbl == tx_tbl_ptr)
501 return true;
502 }
503
504 return false;
505}
506
507/*
508 * This function deletes the given entry in Tx BA Stream table.
509 *
510 * The function also performs a validity check on the supplied
511 * pointer before trying to delete.
512 */
513void mwifiex_11n_delete_tx_ba_stream_tbl_entry(struct mwifiex_private *priv,
514 struct mwifiex_tx_ba_stream_tbl *tx_ba_tsr_tbl)
515{
516 if (!tx_ba_tsr_tbl &&
517 mwifiex_is_tx_ba_stream_ptr_valid(priv, tx_ba_tsr_tbl))
518 return;
519
520 dev_dbg(priv->adapter->dev, "info: tx_ba_tsr_tbl %p\n", tx_ba_tsr_tbl);
521
522 list_del(&tx_ba_tsr_tbl->list);
523
524 kfree(tx_ba_tsr_tbl);
5e6e3a92
BZ		 525}
526
527/*
528 * This function deletes all the entries in Tx BA Stream table.
529 */
530void mwifiex_11n_delete_all_tx_ba_stream_tbl(struct mwifiex_private *priv)
531{
532 int i;
533 struct mwifiex_tx_ba_stream_tbl *del_tbl_ptr, *tmp_node;
534 unsigned long flags;
535
536 spin_lock_irqsave(&priv->tx_ba_stream_tbl_lock, flags);
537 list_for_each_entry_safe(del_tbl_ptr, tmp_node,
538 &priv->tx_ba_stream_tbl_ptr, list)
539 mwifiex_11n_delete_tx_ba_stream_tbl_entry(priv, del_tbl_ptr);
540 spin_unlock_irqrestore(&priv->tx_ba_stream_tbl_lock, flags);
541
542 INIT_LIST_HEAD(&priv->tx_ba_stream_tbl_ptr);
543
544 for (i = 0; i < MAX_NUM_TID; ++i)
545 priv->aggr_prio_tbl[i].ampdu_ap =
546 priv->aggr_prio_tbl[i].ampdu_user;
547}
548
549/*
550 * This function returns the pointer to an entry in BA Stream
551 * table which matches the given RA/TID pair.
552 */
553struct mwifiex_tx_ba_stream_tbl *
554mwifiex_11n_get_tx_ba_stream_tbl(struct mwifiex_private *priv,
555 int tid, u8 *ra)
556{
557 struct mwifiex_tx_ba_stream_tbl *tx_ba_tsr_tbl;
558 unsigned long flags;
559
560 spin_lock_irqsave(&priv->tx_ba_stream_tbl_lock, flags);
561 list_for_each_entry(tx_ba_tsr_tbl, &priv->tx_ba_stream_tbl_ptr, list) {
562 if ((!memcmp(tx_ba_tsr_tbl->ra, ra, ETH_ALEN))
563 && (tx_ba_tsr_tbl->tid == tid)) {
564 spin_unlock_irqrestore(&priv->tx_ba_stream_tbl_lock,
565 flags);
566 return tx_ba_tsr_tbl;
567 }
568 }
569 spin_unlock_irqrestore(&priv->tx_ba_stream_tbl_lock, flags);
570 return NULL;
571}
572
573/*
574 * This function creates an entry in Tx BA stream table for the
575 * given RA/TID pair.
576 */
577void mwifiex_11n_create_tx_ba_stream_tbl(struct mwifiex_private *priv,
578 u8 *ra, int tid,
579 enum mwifiex_ba_status ba_status)
580{
581 struct mwifiex_tx_ba_stream_tbl *new_node;
582 unsigned long flags;
583
584 if (!mwifiex_11n_get_tx_ba_stream_tbl(priv, tid, ra)) {
585 new_node = kzalloc(sizeof(struct mwifiex_tx_ba_stream_tbl),
586 GFP_ATOMIC);
587 if (!new_node) {
588 dev_err(priv->adapter->dev,
589 "%s: failed to alloc new_node\n", __func__);
590 return;
591 }
592
593 INIT_LIST_HEAD(&new_node->list);
594
595 new_node->tid = tid;
596 new_node->ba_status = ba_status;
597 memcpy(new_node->ra, ra, ETH_ALEN);
598
599 spin_lock_irqsave(&priv->tx_ba_stream_tbl_lock, flags);
600 list_add_tail(&new_node->list, &priv->tx_ba_stream_tbl_ptr);
601 spin_unlock_irqrestore(&priv->tx_ba_stream_tbl_lock, flags);
602 }
5e6e3a92
BZ		 603}
604
605/*
606 * This function sends an add BA request to the given TID/RA pair.
607 */
608int mwifiex_send_addba(struct mwifiex_private *priv, int tid, u8 *peer_mac)
609{
610 struct host_cmd_ds_11n_addba_req add_ba_req;
611 static u8 dialog_tok;
612 int ret;
613
614 dev_dbg(priv->adapter->dev, "cmd: %s: tid %d\n", __func__, tid);
615
616 add_ba_req.block_ack_param_set = cpu_to_le16(
617 (u16) ((tid << BLOCKACKPARAM_TID_POS) |
618 (priv->add_ba_param.
619 tx_win_size << BLOCKACKPARAM_WINSIZE_POS) |
620 IMMEDIATE_BLOCK_ACK));
621 add_ba_req.block_ack_tmo = cpu_to_le16((u16)priv->add_ba_param.timeout);
622
623 ++dialog_tok;
624
625 if (dialog_tok == 0)
626 dialog_tok = 1;
627
628 add_ba_req.dialog_token = dialog_tok;
629 memcpy(&add_ba_req.peer_mac_addr, peer_mac, ETH_ALEN);
630
631 /* We don't wait for the response of this command */
600f5d90
AK		 632 ret = mwifiex_send_cmd_async(priv, HostCmd_CMD_11N_ADDBA_REQ,
633 0, 0, &add_ba_req);
5e6e3a92
BZ		 634
635 return ret;
636}
637
638/*
639 * This function sends a delete BA request to the given TID/RA pair.
640 */
641int mwifiex_send_delba(struct mwifiex_private *priv, int tid, u8 *peer_mac,
642 int initiator)
643{
644 struct host_cmd_ds_11n_delba delba;
645 int ret;
646 uint16_t del_ba_param_set;
647
648 memset(&delba, 0, sizeof(delba));
649 delba.del_ba_param_set = cpu_to_le16(tid << DELBA_TID_POS);
650
651 del_ba_param_set = le16_to_cpu(delba.del_ba_param_set);
652 if (initiator)
653 del_ba_param_set |= IEEE80211_DELBA_PARAM_INITIATOR_MASK;
654 else
655 del_ba_param_set &= ~IEEE80211_DELBA_PARAM_INITIATOR_MASK;
656
657 memcpy(&delba.peer_mac_addr, peer_mac, ETH_ALEN);
658
659 /* We don't wait for the response of this command */
600f5d90
AK		 660 ret = mwifiex_send_cmd_async(priv, HostCmd_CMD_11N_DELBA,
661 HostCmd_ACT_GEN_SET, 0, &delba);
5e6e3a92
BZ		 662
663 return ret;
664}
665
666/*
667 * This function handles the command response of a delete BA request.
668 */
669void mwifiex_11n_delete_ba_stream(struct mwifiex_private *priv, u8 *del_ba)
670{
671 struct host_cmd_ds_11n_delba *cmd_del_ba =
672 (struct host_cmd_ds_11n_delba *) del_ba;
673 uint16_t del_ba_param_set = le16_to_cpu(cmd_del_ba->del_ba_param_set);
674 int tid;
675
676 tid = del_ba_param_set >> DELBA_TID_POS;
677
678 mwifiex_11n_delete_ba_stream_tbl(priv, tid, cmd_del_ba->peer_mac_addr,
679 TYPE_DELBA_RECEIVE,
680 INITIATOR_BIT(del_ba_param_set));
681}
682
683/*
684 * This function retrieves the Rx reordering table.
685 */
686int mwifiex_get_rx_reorder_tbl(struct mwifiex_private *priv,
687 struct mwifiex_ds_rx_reorder_tbl *buf)
688{
689 int i;
690 struct mwifiex_ds_rx_reorder_tbl *rx_reo_tbl = buf;
691 struct mwifiex_rx_reorder_tbl *rx_reorder_tbl_ptr;
692 int count = 0;
693 unsigned long flags;
694
695 spin_lock_irqsave(&priv->rx_reorder_tbl_lock, flags);
696 list_for_each_entry(rx_reorder_tbl_ptr, &priv->rx_reorder_tbl_ptr,
697 list) {
698 rx_reo_tbl->tid = (u16) rx_reorder_tbl_ptr->tid;
699 memcpy(rx_reo_tbl->ta, rx_reorder_tbl_ptr->ta, ETH_ALEN);
700 rx_reo_tbl->start_win = rx_reorder_tbl_ptr->start_win;
701 rx_reo_tbl->win_size = rx_reorder_tbl_ptr->win_size;
702 for (i = 0; i < rx_reorder_tbl_ptr->win_size; ++i) {
703 if (rx_reorder_tbl_ptr->rx_reorder_ptr[i])
704 rx_reo_tbl->buffer[i] = true;
705 else
706 rx_reo_tbl->buffer[i] = false;
707 }
708 rx_reo_tbl++;
709 count++;
710
711 if (count >= MWIFIEX_MAX_RX_BASTREAM_SUPPORTED)
712 break;
713 }
714 spin_unlock_irqrestore(&priv->rx_reorder_tbl_lock, flags);
715
716 return count;
717}
718
719/*
720 * This function retrieves the Tx BA stream table.
721 */
722int mwifiex_get_tx_ba_stream_tbl(struct mwifiex_private *priv,
723 struct mwifiex_ds_tx_ba_stream_tbl *buf)
724{
725 struct mwifiex_tx_ba_stream_tbl *tx_ba_tsr_tbl;
726 struct mwifiex_ds_tx_ba_stream_tbl *rx_reo_tbl = buf;
727 int count = 0;
728 unsigned long flags;
729
730 spin_lock_irqsave(&priv->tx_ba_stream_tbl_lock, flags);
731 list_for_each_entry(tx_ba_tsr_tbl, &priv->tx_ba_stream_tbl_ptr, list) {
732 rx_reo_tbl->tid = (u16) tx_ba_tsr_tbl->tid;
733 dev_dbg(priv->adapter->dev, "data: %s tid=%d\n",
734 __func__, rx_reo_tbl->tid);
735 memcpy(rx_reo_tbl->ra, tx_ba_tsr_tbl->ra, ETH_ALEN);
736 rx_reo_tbl++;
737 count++;
738 if (count >= MWIFIEX_MAX_TX_BASTREAM_SUPPORTED)
739 break;
740 }
741 spin_unlock_irqrestore(&priv->tx_ba_stream_tbl_lock, flags);
742
743 return count;
744}
Linux kernel - Deliverables
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