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5e6e3a92 BZ |
1 | /* |
2 | * Marvell Wireless LAN device driver: 802.11n | |
3 | * | |
4 | * Copyright (C) 2011, Marvell International Ltd. | |
5 | * | |
6 | * This software file (the "File") is distributed by Marvell International | |
7 | * Ltd. under the terms of the GNU General Public License Version 2, June 1991 | |
8 | * (the "License"). You may use, redistribute and/or modify this File in | |
9 | * accordance with the terms and conditions of the License, a copy of which | |
10 | * is available by writing to the Free Software Foundation, Inc., | |
11 | * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the | |
12 | * worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt. | |
13 | * | |
14 | * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE | |
15 | * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE | |
16 | * ARE EXPRESSLY DISCLAIMED. The License provides additional details about | |
17 | * this warranty disclaimer. | |
18 | */ | |
19 | ||
20 | #include "decl.h" | |
21 | #include "ioctl.h" | |
22 | #include "util.h" | |
23 | #include "fw.h" | |
24 | #include "main.h" | |
25 | #include "wmm.h" | |
26 | #include "11n.h" | |
27 | ||
28 | /* | |
29 | * Fills HT capability information field, AMPDU Parameters field, HT extended | |
30 | * capability field, and supported MCS set fields. | |
31 | * | |
a46b7b5c AK |
32 | * HT capability information field, AMPDU Parameters field, supported MCS set |
33 | * fields are retrieved from cfg80211 stack | |
5e6e3a92 | 34 | * |
a46b7b5c | 35 | * RD responder bit to set to clear in the extended capability header. |
5e6e3a92 BZ |
36 | */ |
37 | void | |
a46b7b5c | 38 | mwifiex_fill_cap_info(struct mwifiex_private *priv, u8 radio_type, |
5e6e3a92 BZ |
39 | struct mwifiex_ie_types_htcap *ht_cap) |
40 | { | |
5e6e3a92 | 41 | uint16_t ht_ext_cap = le16_to_cpu(ht_cap->ht_cap.extended_ht_cap_info); |
a46b7b5c AK |
42 | struct ieee80211_supported_band *sband = |
43 | priv->wdev->wiphy->bands[radio_type]; | |
5e6e3a92 | 44 | |
a46b7b5c AK |
45 | ht_cap->ht_cap.ampdu_params_info = |
46 | (sband->ht_cap.ampdu_factor & | |
84266841 | 47 | IEEE80211_HT_AMPDU_PARM_FACTOR) | |
a46b7b5c AK |
48 | ((sband->ht_cap.ampdu_density << |
49 | IEEE80211_HT_AMPDU_PARM_DENSITY_SHIFT) & | |
50 | IEEE80211_HT_AMPDU_PARM_DENSITY); | |
5e6e3a92 | 51 | |
a46b7b5c | 52 | memcpy((u8 *) &ht_cap->ht_cap.mcs, &sband->ht_cap.mcs, |
84266841 | 53 | sizeof(sband->ht_cap.mcs)); |
5e6e3a92 | 54 | |
eecd8250 | 55 | if (priv->bss_mode == NL80211_IFTYPE_STATION || |
d35f1035 AK |
56 | (sband->ht_cap.cap & IEEE80211_HT_CAP_SUP_WIDTH_20_40 && |
57 | (priv->adapter->sec_chan_offset != | |
58 | IEEE80211_HT_PARAM_CHA_SEC_NONE))) | |
5e6e3a92 BZ |
59 | /* Set MCS32 for infra mode or ad-hoc mode with 40MHz support */ |
60 | SETHT_MCS32(ht_cap->ht_cap.mcs.rx_mask); | |
61 | ||
62 | /* Clear RD responder bit */ | |
a3731658 | 63 | ht_ext_cap &= ~IEEE80211_HT_EXT_CAP_RD_RESPONDER; |
5e6e3a92 | 64 | |
a46b7b5c | 65 | ht_cap->ht_cap.cap_info = cpu_to_le16(sband->ht_cap.cap); |
5e6e3a92 | 66 | ht_cap->ht_cap.extended_ht_cap_info = cpu_to_le16(ht_ext_cap); |
645097ce AK |
67 | |
68 | if (ISSUPP_BEAMFORMING(priv->adapter->hw_dot_11n_dev_cap)) | |
69 | ht_cap->ht_cap.tx_BF_cap_info = | |
70 | cpu_to_le32(MWIFIEX_DEF_11N_TX_BF_CAP); | |
5e6e3a92 BZ |
71 | } |
72 | ||
5e6e3a92 BZ |
73 | /* |
74 | * This function returns the pointer to an entry in BA Stream | |
75 | * table which matches the requested BA status. | |
76 | */ | |
77 | static struct mwifiex_tx_ba_stream_tbl * | |
3e822635 YAP |
78 | mwifiex_get_ba_status(struct mwifiex_private *priv, |
79 | enum mwifiex_ba_status ba_status) | |
5e6e3a92 BZ |
80 | { |
81 | struct mwifiex_tx_ba_stream_tbl *tx_ba_tsr_tbl; | |
82 | unsigned long flags; | |
83 | ||
84 | spin_lock_irqsave(&priv->tx_ba_stream_tbl_lock, flags); | |
85 | list_for_each_entry(tx_ba_tsr_tbl, &priv->tx_ba_stream_tbl_ptr, list) { | |
86 | if (tx_ba_tsr_tbl->ba_status == ba_status) { | |
87 | spin_unlock_irqrestore(&priv->tx_ba_stream_tbl_lock, | |
88 | flags); | |
89 | return tx_ba_tsr_tbl; | |
90 | } | |
91 | } | |
92 | spin_unlock_irqrestore(&priv->tx_ba_stream_tbl_lock, flags); | |
93 | return NULL; | |
94 | } | |
95 | ||
96 | /* | |
97 | * This function handles the command response of delete a block | |
98 | * ack request. | |
99 | * | |
100 | * The function checks the response success status and takes action | |
101 | * accordingly (send an add BA request in case of success, or recreate | |
102 | * the deleted stream in case of failure, if the add BA was also | |
103 | * initiated by us). | |
104 | */ | |
105 | int mwifiex_ret_11n_delba(struct mwifiex_private *priv, | |
106 | struct host_cmd_ds_command *resp) | |
107 | { | |
108 | int tid; | |
109 | struct mwifiex_tx_ba_stream_tbl *tx_ba_tbl; | |
2c208890 | 110 | struct host_cmd_ds_11n_delba *del_ba = &resp->params.del_ba; |
5e6e3a92 BZ |
111 | uint16_t del_ba_param_set = le16_to_cpu(del_ba->del_ba_param_set); |
112 | ||
113 | tid = del_ba_param_set >> DELBA_TID_POS; | |
114 | if (del_ba->del_result == BA_RESULT_SUCCESS) { | |
3e822635 YAP |
115 | mwifiex_del_ba_tbl(priv, tid, del_ba->peer_mac_addr, |
116 | TYPE_DELBA_SENT, | |
117 | INITIATOR_BIT(del_ba_param_set)); | |
5e6e3a92 | 118 | |
3e822635 | 119 | tx_ba_tbl = mwifiex_get_ba_status(priv, BA_SETUP_INPROGRESS); |
5e6e3a92 BZ |
120 | if (tx_ba_tbl) |
121 | mwifiex_send_addba(priv, tx_ba_tbl->tid, | |
122 | tx_ba_tbl->ra); | |
123 | } else { /* | |
124 | * In case of failure, recreate the deleted stream in case | |
125 | * we initiated the ADDBA | |
126 | */ | |
3e822635 YAP |
127 | if (!INITIATOR_BIT(del_ba_param_set)) |
128 | return 0; | |
129 | ||
130 | mwifiex_create_ba_tbl(priv, del_ba->peer_mac_addr, tid, | |
131 | BA_SETUP_INPROGRESS); | |
132 | ||
133 | tx_ba_tbl = mwifiex_get_ba_status(priv, BA_SETUP_INPROGRESS); | |
134 | ||
135 | if (tx_ba_tbl) | |
136 | mwifiex_del_ba_tbl(priv, tx_ba_tbl->tid, tx_ba_tbl->ra, | |
137 | TYPE_DELBA_SENT, true); | |
5e6e3a92 BZ |
138 | } |
139 | ||
140 | return 0; | |
141 | } | |
142 | ||
143 | /* | |
144 | * This function handles the command response of add a block | |
145 | * ack request. | |
146 | * | |
147 | * Handling includes changing the header fields to CPU formats, checking | |
148 | * the response success status and taking actions accordingly (delete the | |
149 | * BA stream table in case of failure). | |
150 | */ | |
151 | int mwifiex_ret_11n_addba_req(struct mwifiex_private *priv, | |
152 | struct host_cmd_ds_command *resp) | |
153 | { | |
154 | int tid; | |
2c208890 | 155 | struct host_cmd_ds_11n_addba_rsp *add_ba_rsp = &resp->params.add_ba_rsp; |
5e6e3a92 BZ |
156 | struct mwifiex_tx_ba_stream_tbl *tx_ba_tbl; |
157 | ||
158 | add_ba_rsp->ssn = cpu_to_le16((le16_to_cpu(add_ba_rsp->ssn)) | |
159 | & SSN_MASK); | |
160 | ||
161 | tid = (le16_to_cpu(add_ba_rsp->block_ack_param_set) | |
162 | & IEEE80211_ADDBA_PARAM_TID_MASK) | |
163 | >> BLOCKACKPARAM_TID_POS; | |
164 | if (le16_to_cpu(add_ba_rsp->status_code) == BA_RESULT_SUCCESS) { | |
3e822635 | 165 | tx_ba_tbl = mwifiex_get_ba_tbl(priv, tid, |
5e6e3a92 BZ |
166 | add_ba_rsp->peer_mac_addr); |
167 | if (tx_ba_tbl) { | |
168 | dev_dbg(priv->adapter->dev, "info: BA stream complete\n"); | |
3e822635 | 169 | tx_ba_tbl->ba_status = BA_SETUP_COMPLETE; |
5e6e3a92 BZ |
170 | } else { |
171 | dev_err(priv->adapter->dev, "BA stream not created\n"); | |
172 | } | |
173 | } else { | |
3e822635 YAP |
174 | mwifiex_del_ba_tbl(priv, tid, add_ba_rsp->peer_mac_addr, |
175 | TYPE_DELBA_SENT, true); | |
5e6e3a92 BZ |
176 | if (add_ba_rsp->add_rsp_result != BA_RESULT_TIMEOUT) |
177 | priv->aggr_prio_tbl[tid].ampdu_ap = | |
178 | BA_STREAM_NOT_ALLOWED; | |
179 | } | |
180 | ||
181 | return 0; | |
182 | } | |
183 | ||
5e6e3a92 BZ |
184 | /* |
185 | * This function prepares command of reconfigure Tx buffer. | |
186 | * | |
187 | * Preparation includes - | |
188 | * - Setting command ID, action and proper size | |
189 | * - Setting Tx buffer size (for SET only) | |
190 | * - Ensuring correct endian-ness | |
191 | */ | |
192 | int mwifiex_cmd_recfg_tx_buf(struct mwifiex_private *priv, | |
193 | struct host_cmd_ds_command *cmd, int cmd_action, | |
a5ffddb7 | 194 | u16 *buf_size) |
5e6e3a92 BZ |
195 | { |
196 | struct host_cmd_ds_txbuf_cfg *tx_buf = &cmd->params.tx_buf; | |
197 | u16 action = (u16) cmd_action; | |
5e6e3a92 BZ |
198 | |
199 | cmd->command = cpu_to_le16(HostCmd_CMD_RECONFIGURE_TX_BUFF); | |
200 | cmd->size = | |
201 | cpu_to_le16(sizeof(struct host_cmd_ds_txbuf_cfg) + S_DS_GEN); | |
202 | tx_buf->action = cpu_to_le16(action); | |
203 | switch (action) { | |
204 | case HostCmd_ACT_GEN_SET: | |
a5ffddb7 AK |
205 | dev_dbg(priv->adapter->dev, "cmd: set tx_buf=%d\n", *buf_size); |
206 | tx_buf->buff_size = cpu_to_le16(*buf_size); | |
5e6e3a92 BZ |
207 | break; |
208 | case HostCmd_ACT_GEN_GET: | |
209 | default: | |
210 | tx_buf->buff_size = 0; | |
211 | break; | |
212 | } | |
213 | return 0; | |
214 | } | |
215 | ||
216 | /* | |
217 | * This function prepares command of AMSDU aggregation control. | |
218 | * | |
219 | * Preparation includes - | |
220 | * - Setting command ID, action and proper size | |
221 | * - Setting AMSDU control parameters (for SET only) | |
222 | * - Ensuring correct endian-ness | |
223 | */ | |
572e8f3e | 224 | int mwifiex_cmd_amsdu_aggr_ctrl(struct host_cmd_ds_command *cmd, |
a5ffddb7 AK |
225 | int cmd_action, |
226 | struct mwifiex_ds_11n_amsdu_aggr_ctrl *aa_ctrl) | |
5e6e3a92 BZ |
227 | { |
228 | struct host_cmd_ds_amsdu_aggr_ctrl *amsdu_ctrl = | |
229 | &cmd->params.amsdu_aggr_ctrl; | |
230 | u16 action = (u16) cmd_action; | |
5e6e3a92 BZ |
231 | |
232 | cmd->command = cpu_to_le16(HostCmd_CMD_AMSDU_AGGR_CTRL); | |
233 | cmd->size = cpu_to_le16(sizeof(struct host_cmd_ds_amsdu_aggr_ctrl) | |
234 | + S_DS_GEN); | |
235 | amsdu_ctrl->action = cpu_to_le16(action); | |
236 | switch (action) { | |
237 | case HostCmd_ACT_GEN_SET: | |
238 | amsdu_ctrl->enable = cpu_to_le16(aa_ctrl->enable); | |
239 | amsdu_ctrl->curr_buf_size = 0; | |
240 | break; | |
241 | case HostCmd_ACT_GEN_GET: | |
242 | default: | |
243 | amsdu_ctrl->curr_buf_size = 0; | |
244 | break; | |
245 | } | |
246 | return 0; | |
247 | } | |
248 | ||
5e6e3a92 BZ |
249 | /* |
250 | * This function prepares 11n configuration command. | |
251 | * | |
252 | * Preparation includes - | |
253 | * - Setting command ID, action and proper size | |
254 | * - Setting HT Tx capability and HT Tx information fields | |
255 | * - Ensuring correct endian-ness | |
256 | */ | |
a5f39056 YAP |
257 | int mwifiex_cmd_11n_cfg(struct mwifiex_private *priv, |
258 | struct host_cmd_ds_command *cmd, u16 cmd_action, | |
a5ffddb7 | 259 | struct mwifiex_ds_11n_tx_cfg *txcfg) |
5e6e3a92 BZ |
260 | { |
261 | struct host_cmd_ds_11n_cfg *htcfg = &cmd->params.htcfg; | |
5e6e3a92 BZ |
262 | |
263 | cmd->command = cpu_to_le16(HostCmd_CMD_11N_CFG); | |
264 | cmd->size = cpu_to_le16(sizeof(struct host_cmd_ds_11n_cfg) + S_DS_GEN); | |
265 | htcfg->action = cpu_to_le16(cmd_action); | |
266 | htcfg->ht_tx_cap = cpu_to_le16(txcfg->tx_htcap); | |
267 | htcfg->ht_tx_info = cpu_to_le16(txcfg->tx_htinfo); | |
a5f39056 YAP |
268 | |
269 | if (priv->adapter->is_hw_11ac_capable) | |
270 | htcfg->misc_config = cpu_to_le16(txcfg->misc_config); | |
271 | ||
5e6e3a92 BZ |
272 | return 0; |
273 | } | |
274 | ||
275 | /* | |
276 | * This function appends an 11n TLV to a buffer. | |
277 | * | |
278 | * Buffer allocation is responsibility of the calling | |
279 | * function. No size validation is made here. | |
280 | * | |
281 | * The function fills up the following sections, if applicable - | |
282 | * - HT capability IE | |
283 | * - HT information IE (with channel list) | |
284 | * - 20/40 BSS Coexistence IE | |
285 | * - HT Extended Capabilities IE | |
286 | */ | |
287 | int | |
288 | mwifiex_cmd_append_11n_tlv(struct mwifiex_private *priv, | |
289 | struct mwifiex_bssdescriptor *bss_desc, | |
290 | u8 **buffer) | |
291 | { | |
292 | struct mwifiex_ie_types_htcap *ht_cap; | |
293 | struct mwifiex_ie_types_htinfo *ht_info; | |
294 | struct mwifiex_ie_types_chan_list_param_set *chan_list; | |
295 | struct mwifiex_ie_types_2040bssco *bss_co_2040; | |
296 | struct mwifiex_ie_types_extcap *ext_cap; | |
297 | int ret_len = 0; | |
a46b7b5c | 298 | struct ieee80211_supported_band *sband; |
68f95b09 | 299 | struct ieee_types_header *hdr; |
a46b7b5c | 300 | u8 radio_type; |
5e6e3a92 BZ |
301 | |
302 | if (!buffer || !*buffer) | |
303 | return ret_len; | |
304 | ||
a46b7b5c AK |
305 | radio_type = mwifiex_band_to_radio_type((u8) bss_desc->bss_band); |
306 | sband = priv->wdev->wiphy->bands[radio_type]; | |
307 | ||
5e6e3a92 BZ |
308 | if (bss_desc->bcn_ht_cap) { |
309 | ht_cap = (struct mwifiex_ie_types_htcap *) *buffer; | |
310 | memset(ht_cap, 0, sizeof(struct mwifiex_ie_types_htcap)); | |
311 | ht_cap->header.type = cpu_to_le16(WLAN_EID_HT_CAPABILITY); | |
312 | ht_cap->header.len = | |
313 | cpu_to_le16(sizeof(struct ieee80211_ht_cap)); | |
314 | memcpy((u8 *) ht_cap + sizeof(struct mwifiex_ie_types_header), | |
315 | (u8 *) bss_desc->bcn_ht_cap + | |
316 | sizeof(struct ieee_types_header), | |
317 | le16_to_cpu(ht_cap->header.len)); | |
318 | ||
a46b7b5c | 319 | mwifiex_fill_cap_info(priv, radio_type, ht_cap); |
5e6e3a92 BZ |
320 | |
321 | *buffer += sizeof(struct mwifiex_ie_types_htcap); | |
322 | ret_len += sizeof(struct mwifiex_ie_types_htcap); | |
323 | } | |
324 | ||
074d46d1 | 325 | if (bss_desc->bcn_ht_oper) { |
eecd8250 | 326 | if (priv->bss_mode == NL80211_IFTYPE_ADHOC) { |
5e6e3a92 BZ |
327 | ht_info = (struct mwifiex_ie_types_htinfo *) *buffer; |
328 | memset(ht_info, 0, | |
329 | sizeof(struct mwifiex_ie_types_htinfo)); | |
330 | ht_info->header.type = | |
074d46d1 | 331 | cpu_to_le16(WLAN_EID_HT_OPERATION); |
5e6e3a92 | 332 | ht_info->header.len = |
074d46d1 JB |
333 | cpu_to_le16( |
334 | sizeof(struct ieee80211_ht_operation)); | |
5e6e3a92 BZ |
335 | |
336 | memcpy((u8 *) ht_info + | |
337 | sizeof(struct mwifiex_ie_types_header), | |
074d46d1 | 338 | (u8 *) bss_desc->bcn_ht_oper + |
5e6e3a92 BZ |
339 | sizeof(struct ieee_types_header), |
340 | le16_to_cpu(ht_info->header.len)); | |
341 | ||
a46b7b5c AK |
342 | if (!(sband->ht_cap.cap & |
343 | IEEE80211_HT_CAP_SUP_WIDTH_20_40)) | |
074d46d1 | 344 | ht_info->ht_oper.ht_param &= |
6d2bd916 MY |
345 | ~(IEEE80211_HT_PARAM_CHAN_WIDTH_ANY | |
346 | IEEE80211_HT_PARAM_CHA_SEC_OFFSET); | |
5e6e3a92 BZ |
347 | |
348 | *buffer += sizeof(struct mwifiex_ie_types_htinfo); | |
349 | ret_len += sizeof(struct mwifiex_ie_types_htinfo); | |
350 | } | |
351 | ||
352 | chan_list = | |
353 | (struct mwifiex_ie_types_chan_list_param_set *) *buffer; | |
354 | memset(chan_list, 0, | |
355 | sizeof(struct mwifiex_ie_types_chan_list_param_set)); | |
356 | chan_list->header.type = cpu_to_le16(TLV_TYPE_CHANLIST); | |
357 | chan_list->header.len = cpu_to_le16( | |
358 | sizeof(struct mwifiex_ie_types_chan_list_param_set) - | |
359 | sizeof(struct mwifiex_ie_types_header)); | |
360 | chan_list->chan_scan_param[0].chan_number = | |
074d46d1 | 361 | bss_desc->bcn_ht_oper->primary_chan; |
5e6e3a92 BZ |
362 | chan_list->chan_scan_param[0].radio_type = |
363 | mwifiex_band_to_radio_type((u8) bss_desc->bss_band); | |
364 | ||
84266841 | 365 | if (sband->ht_cap.cap & IEEE80211_HT_CAP_SUP_WIDTH_20_40 && |
074d46d1 | 366 | bss_desc->bcn_ht_oper->ht_param & |
84266841 | 367 | IEEE80211_HT_PARAM_CHAN_WIDTH_ANY) |
5e6e3a92 BZ |
368 | SET_SECONDARYCHAN(chan_list->chan_scan_param[0]. |
369 | radio_type, | |
074d46d1 | 370 | (bss_desc->bcn_ht_oper->ht_param & |
6d2bd916 | 371 | IEEE80211_HT_PARAM_CHA_SEC_OFFSET)); |
5e6e3a92 BZ |
372 | |
373 | *buffer += sizeof(struct mwifiex_ie_types_chan_list_param_set); | |
374 | ret_len += sizeof(struct mwifiex_ie_types_chan_list_param_set); | |
375 | } | |
376 | ||
377 | if (bss_desc->bcn_bss_co_2040) { | |
378 | bss_co_2040 = (struct mwifiex_ie_types_2040bssco *) *buffer; | |
379 | memset(bss_co_2040, 0, | |
380 | sizeof(struct mwifiex_ie_types_2040bssco)); | |
381 | bss_co_2040->header.type = cpu_to_le16(WLAN_EID_BSS_COEX_2040); | |
382 | bss_co_2040->header.len = | |
383 | cpu_to_le16(sizeof(bss_co_2040->bss_co_2040)); | |
384 | ||
385 | memcpy((u8 *) bss_co_2040 + | |
386 | sizeof(struct mwifiex_ie_types_header), | |
2c208890 | 387 | bss_desc->bcn_bss_co_2040 + |
5e6e3a92 BZ |
388 | sizeof(struct ieee_types_header), |
389 | le16_to_cpu(bss_co_2040->header.len)); | |
390 | ||
391 | *buffer += sizeof(struct mwifiex_ie_types_2040bssco); | |
392 | ret_len += sizeof(struct mwifiex_ie_types_2040bssco); | |
393 | } | |
394 | ||
395 | if (bss_desc->bcn_ext_cap) { | |
68f95b09 | 396 | hdr = (void *)bss_desc->bcn_ext_cap; |
5e6e3a92 BZ |
397 | ext_cap = (struct mwifiex_ie_types_extcap *) *buffer; |
398 | memset(ext_cap, 0, sizeof(struct mwifiex_ie_types_extcap)); | |
399 | ext_cap->header.type = cpu_to_le16(WLAN_EID_EXT_CAPABILITY); | |
68f95b09 | 400 | ext_cap->header.len = cpu_to_le16(hdr->len); |
5e6e3a92 | 401 | |
68f95b09 | 402 | memcpy((u8 *)ext_cap->ext_capab, |
2c208890 | 403 | bss_desc->bcn_ext_cap + sizeof(struct ieee_types_header), |
5e6e3a92 BZ |
404 | le16_to_cpu(ext_cap->header.len)); |
405 | ||
587b36d3 AP |
406 | if (hdr->len > 3 && |
407 | ext_cap->ext_capab[3] & WLAN_EXT_CAPA4_INTERWORKING_ENABLED) | |
408 | priv->hs2_enabled = true; | |
409 | else | |
410 | priv->hs2_enabled = false; | |
411 | ||
68f95b09 AP |
412 | *buffer += sizeof(struct mwifiex_ie_types_extcap) + hdr->len; |
413 | ret_len += sizeof(struct mwifiex_ie_types_extcap) + hdr->len; | |
5e6e3a92 BZ |
414 | } |
415 | ||
416 | return ret_len; | |
417 | } | |
418 | ||
5e6e3a92 BZ |
419 | /* |
420 | * This function checks if the given pointer is valid entry of | |
421 | * Tx BA Stream table. | |
422 | */ | |
423 | static int mwifiex_is_tx_ba_stream_ptr_valid(struct mwifiex_private *priv, | |
424 | struct mwifiex_tx_ba_stream_tbl *tx_tbl_ptr) | |
425 | { | |
426 | struct mwifiex_tx_ba_stream_tbl *tx_ba_tsr_tbl; | |
427 | ||
428 | list_for_each_entry(tx_ba_tsr_tbl, &priv->tx_ba_stream_tbl_ptr, list) { | |
429 | if (tx_ba_tsr_tbl == tx_tbl_ptr) | |
430 | return true; | |
431 | } | |
432 | ||
433 | return false; | |
434 | } | |
435 | ||
436 | /* | |
437 | * This function deletes the given entry in Tx BA Stream table. | |
438 | * | |
439 | * The function also performs a validity check on the supplied | |
440 | * pointer before trying to delete. | |
441 | */ | |
442 | void mwifiex_11n_delete_tx_ba_stream_tbl_entry(struct mwifiex_private *priv, | |
443 | struct mwifiex_tx_ba_stream_tbl *tx_ba_tsr_tbl) | |
444 | { | |
445 | if (!tx_ba_tsr_tbl && | |
84266841 | 446 | mwifiex_is_tx_ba_stream_ptr_valid(priv, tx_ba_tsr_tbl)) |
5e6e3a92 BZ |
447 | return; |
448 | ||
449 | dev_dbg(priv->adapter->dev, "info: tx_ba_tsr_tbl %p\n", tx_ba_tsr_tbl); | |
450 | ||
451 | list_del(&tx_ba_tsr_tbl->list); | |
452 | ||
453 | kfree(tx_ba_tsr_tbl); | |
5e6e3a92 BZ |
454 | } |
455 | ||
456 | /* | |
457 | * This function deletes all the entries in Tx BA Stream table. | |
458 | */ | |
459 | void mwifiex_11n_delete_all_tx_ba_stream_tbl(struct mwifiex_private *priv) | |
460 | { | |
461 | int i; | |
462 | struct mwifiex_tx_ba_stream_tbl *del_tbl_ptr, *tmp_node; | |
463 | unsigned long flags; | |
464 | ||
465 | spin_lock_irqsave(&priv->tx_ba_stream_tbl_lock, flags); | |
466 | list_for_each_entry_safe(del_tbl_ptr, tmp_node, | |
467 | &priv->tx_ba_stream_tbl_ptr, list) | |
468 | mwifiex_11n_delete_tx_ba_stream_tbl_entry(priv, del_tbl_ptr); | |
469 | spin_unlock_irqrestore(&priv->tx_ba_stream_tbl_lock, flags); | |
470 | ||
471 | INIT_LIST_HEAD(&priv->tx_ba_stream_tbl_ptr); | |
472 | ||
473 | for (i = 0; i < MAX_NUM_TID; ++i) | |
474 | priv->aggr_prio_tbl[i].ampdu_ap = | |
475 | priv->aggr_prio_tbl[i].ampdu_user; | |
476 | } | |
477 | ||
478 | /* | |
479 | * This function returns the pointer to an entry in BA Stream | |
480 | * table which matches the given RA/TID pair. | |
481 | */ | |
482 | struct mwifiex_tx_ba_stream_tbl * | |
3e822635 | 483 | mwifiex_get_ba_tbl(struct mwifiex_private *priv, int tid, u8 *ra) |
5e6e3a92 BZ |
484 | { |
485 | struct mwifiex_tx_ba_stream_tbl *tx_ba_tsr_tbl; | |
486 | unsigned long flags; | |
487 | ||
488 | spin_lock_irqsave(&priv->tx_ba_stream_tbl_lock, flags); | |
489 | list_for_each_entry(tx_ba_tsr_tbl, &priv->tx_ba_stream_tbl_ptr, list) { | |
fcad7668 | 490 | if (ether_addr_equal_unaligned(tx_ba_tsr_tbl->ra, ra) && |
84266841 | 491 | tx_ba_tsr_tbl->tid == tid) { |
5e6e3a92 BZ |
492 | spin_unlock_irqrestore(&priv->tx_ba_stream_tbl_lock, |
493 | flags); | |
494 | return tx_ba_tsr_tbl; | |
495 | } | |
496 | } | |
497 | spin_unlock_irqrestore(&priv->tx_ba_stream_tbl_lock, flags); | |
498 | return NULL; | |
499 | } | |
500 | ||
501 | /* | |
502 | * This function creates an entry in Tx BA stream table for the | |
503 | * given RA/TID pair. | |
504 | */ | |
3e822635 YAP |
505 | void mwifiex_create_ba_tbl(struct mwifiex_private *priv, u8 *ra, int tid, |
506 | enum mwifiex_ba_status ba_status) | |
5e6e3a92 BZ |
507 | { |
508 | struct mwifiex_tx_ba_stream_tbl *new_node; | |
509 | unsigned long flags; | |
510 | ||
3e822635 | 511 | if (!mwifiex_get_ba_tbl(priv, tid, ra)) { |
5e6e3a92 BZ |
512 | new_node = kzalloc(sizeof(struct mwifiex_tx_ba_stream_tbl), |
513 | GFP_ATOMIC); | |
0d2e7a5c | 514 | if (!new_node) |
5e6e3a92 | 515 | return; |
5e6e3a92 BZ |
516 | |
517 | INIT_LIST_HEAD(&new_node->list); | |
518 | ||
519 | new_node->tid = tid; | |
520 | new_node->ba_status = ba_status; | |
521 | memcpy(new_node->ra, ra, ETH_ALEN); | |
522 | ||
523 | spin_lock_irqsave(&priv->tx_ba_stream_tbl_lock, flags); | |
524 | list_add_tail(&new_node->list, &priv->tx_ba_stream_tbl_ptr); | |
525 | spin_unlock_irqrestore(&priv->tx_ba_stream_tbl_lock, flags); | |
526 | } | |
5e6e3a92 BZ |
527 | } |
528 | ||
529 | /* | |
530 | * This function sends an add BA request to the given TID/RA pair. | |
531 | */ | |
532 | int mwifiex_send_addba(struct mwifiex_private *priv, int tid, u8 *peer_mac) | |
533 | { | |
534 | struct host_cmd_ds_11n_addba_req add_ba_req; | |
535 | static u8 dialog_tok; | |
536 | int ret; | |
537 | ||
538 | dev_dbg(priv->adapter->dev, "cmd: %s: tid %d\n", __func__, tid); | |
539 | ||
540 | add_ba_req.block_ack_param_set = cpu_to_le16( | |
541 | (u16) ((tid << BLOCKACKPARAM_TID_POS) | | |
542 | (priv->add_ba_param. | |
543 | tx_win_size << BLOCKACKPARAM_WINSIZE_POS) | | |
544 | IMMEDIATE_BLOCK_ACK)); | |
545 | add_ba_req.block_ack_tmo = cpu_to_le16((u16)priv->add_ba_param.timeout); | |
546 | ||
547 | ++dialog_tok; | |
548 | ||
549 | if (dialog_tok == 0) | |
550 | dialog_tok = 1; | |
551 | ||
552 | add_ba_req.dialog_token = dialog_tok; | |
553 | memcpy(&add_ba_req.peer_mac_addr, peer_mac, ETH_ALEN); | |
554 | ||
555 | /* We don't wait for the response of this command */ | |
600f5d90 AK |
556 | ret = mwifiex_send_cmd_async(priv, HostCmd_CMD_11N_ADDBA_REQ, |
557 | 0, 0, &add_ba_req); | |
5e6e3a92 BZ |
558 | |
559 | return ret; | |
560 | } | |
561 | ||
562 | /* | |
563 | * This function sends a delete BA request to the given TID/RA pair. | |
564 | */ | |
565 | int mwifiex_send_delba(struct mwifiex_private *priv, int tid, u8 *peer_mac, | |
566 | int initiator) | |
567 | { | |
568 | struct host_cmd_ds_11n_delba delba; | |
569 | int ret; | |
570 | uint16_t del_ba_param_set; | |
571 | ||
572 | memset(&delba, 0, sizeof(delba)); | |
573 | delba.del_ba_param_set = cpu_to_le16(tid << DELBA_TID_POS); | |
574 | ||
575 | del_ba_param_set = le16_to_cpu(delba.del_ba_param_set); | |
576 | if (initiator) | |
577 | del_ba_param_set |= IEEE80211_DELBA_PARAM_INITIATOR_MASK; | |
578 | else | |
579 | del_ba_param_set &= ~IEEE80211_DELBA_PARAM_INITIATOR_MASK; | |
580 | ||
581 | memcpy(&delba.peer_mac_addr, peer_mac, ETH_ALEN); | |
582 | ||
583 | /* We don't wait for the response of this command */ | |
600f5d90 AK |
584 | ret = mwifiex_send_cmd_async(priv, HostCmd_CMD_11N_DELBA, |
585 | HostCmd_ACT_GEN_SET, 0, &delba); | |
5e6e3a92 BZ |
586 | |
587 | return ret; | |
588 | } | |
589 | ||
590 | /* | |
591 | * This function handles the command response of a delete BA request. | |
592 | */ | |
593 | void mwifiex_11n_delete_ba_stream(struct mwifiex_private *priv, u8 *del_ba) | |
594 | { | |
595 | struct host_cmd_ds_11n_delba *cmd_del_ba = | |
596 | (struct host_cmd_ds_11n_delba *) del_ba; | |
597 | uint16_t del_ba_param_set = le16_to_cpu(cmd_del_ba->del_ba_param_set); | |
598 | int tid; | |
599 | ||
600 | tid = del_ba_param_set >> DELBA_TID_POS; | |
601 | ||
3e822635 YAP |
602 | mwifiex_del_ba_tbl(priv, tid, cmd_del_ba->peer_mac_addr, |
603 | TYPE_DELBA_RECEIVE, INITIATOR_BIT(del_ba_param_set)); | |
5e6e3a92 BZ |
604 | } |
605 | ||
606 | /* | |
607 | * This function retrieves the Rx reordering table. | |
608 | */ | |
609 | int mwifiex_get_rx_reorder_tbl(struct mwifiex_private *priv, | |
610 | struct mwifiex_ds_rx_reorder_tbl *buf) | |
611 | { | |
612 | int i; | |
613 | struct mwifiex_ds_rx_reorder_tbl *rx_reo_tbl = buf; | |
614 | struct mwifiex_rx_reorder_tbl *rx_reorder_tbl_ptr; | |
615 | int count = 0; | |
616 | unsigned long flags; | |
617 | ||
618 | spin_lock_irqsave(&priv->rx_reorder_tbl_lock, flags); | |
619 | list_for_each_entry(rx_reorder_tbl_ptr, &priv->rx_reorder_tbl_ptr, | |
620 | list) { | |
621 | rx_reo_tbl->tid = (u16) rx_reorder_tbl_ptr->tid; | |
622 | memcpy(rx_reo_tbl->ta, rx_reorder_tbl_ptr->ta, ETH_ALEN); | |
623 | rx_reo_tbl->start_win = rx_reorder_tbl_ptr->start_win; | |
624 | rx_reo_tbl->win_size = rx_reorder_tbl_ptr->win_size; | |
625 | for (i = 0; i < rx_reorder_tbl_ptr->win_size; ++i) { | |
626 | if (rx_reorder_tbl_ptr->rx_reorder_ptr[i]) | |
627 | rx_reo_tbl->buffer[i] = true; | |
628 | else | |
629 | rx_reo_tbl->buffer[i] = false; | |
630 | } | |
631 | rx_reo_tbl++; | |
632 | count++; | |
633 | ||
634 | if (count >= MWIFIEX_MAX_RX_BASTREAM_SUPPORTED) | |
635 | break; | |
636 | } | |
637 | spin_unlock_irqrestore(&priv->rx_reorder_tbl_lock, flags); | |
638 | ||
639 | return count; | |
640 | } | |
641 | ||
642 | /* | |
643 | * This function retrieves the Tx BA stream table. | |
644 | */ | |
645 | int mwifiex_get_tx_ba_stream_tbl(struct mwifiex_private *priv, | |
646 | struct mwifiex_ds_tx_ba_stream_tbl *buf) | |
647 | { | |
648 | struct mwifiex_tx_ba_stream_tbl *tx_ba_tsr_tbl; | |
649 | struct mwifiex_ds_tx_ba_stream_tbl *rx_reo_tbl = buf; | |
650 | int count = 0; | |
651 | unsigned long flags; | |
652 | ||
653 | spin_lock_irqsave(&priv->tx_ba_stream_tbl_lock, flags); | |
654 | list_for_each_entry(tx_ba_tsr_tbl, &priv->tx_ba_stream_tbl_ptr, list) { | |
655 | rx_reo_tbl->tid = (u16) tx_ba_tsr_tbl->tid; | |
656 | dev_dbg(priv->adapter->dev, "data: %s tid=%d\n", | |
84266841 | 657 | __func__, rx_reo_tbl->tid); |
5e6e3a92 BZ |
658 | memcpy(rx_reo_tbl->ra, tx_ba_tsr_tbl->ra, ETH_ALEN); |
659 | rx_reo_tbl++; | |
660 | count++; | |
661 | if (count >= MWIFIEX_MAX_TX_BASTREAM_SUPPORTED) | |
662 | break; | |
663 | } | |
664 | spin_unlock_irqrestore(&priv->tx_ba_stream_tbl_lock, flags); | |
665 | ||
666 | return count; | |
667 | } | |
3e238a11 AP |
668 | |
669 | /* | |
670 | * This function retrieves the entry for specific tx BA stream table by RA and | |
671 | * deletes it. | |
672 | */ | |
673 | void mwifiex_del_tx_ba_stream_tbl_by_ra(struct mwifiex_private *priv, u8 *ra) | |
674 | { | |
675 | struct mwifiex_tx_ba_stream_tbl *tbl, *tmp; | |
676 | unsigned long flags; | |
677 | ||
678 | if (!ra) | |
679 | return; | |
680 | ||
681 | spin_lock_irqsave(&priv->tx_ba_stream_tbl_lock, flags); | |
682 | list_for_each_entry_safe(tbl, tmp, &priv->tx_ba_stream_tbl_ptr, list) { | |
683 | if (!memcmp(tbl->ra, ra, ETH_ALEN)) { | |
684 | spin_unlock_irqrestore(&priv->tx_ba_stream_tbl_lock, | |
685 | flags); | |
686 | mwifiex_11n_delete_tx_ba_stream_tbl_entry(priv, tbl); | |
687 | spin_lock_irqsave(&priv->tx_ba_stream_tbl_lock, flags); | |
688 | } | |
689 | } | |
690 | spin_unlock_irqrestore(&priv->tx_ba_stream_tbl_lock, flags); | |
691 | ||
692 | return; | |
693 | } | |
04abc0a3 AP |
694 | |
695 | /* This function initializes the BlockACK setup information for given | |
696 | * mwifiex_private structure. | |
697 | */ | |
698 | void mwifiex_set_ba_params(struct mwifiex_private *priv) | |
699 | { | |
700 | priv->add_ba_param.timeout = MWIFIEX_DEFAULT_BLOCK_ACK_TIMEOUT; | |
701 | ||
702 | if (GET_BSS_ROLE(priv) == MWIFIEX_BSS_ROLE_UAP) { | |
703 | priv->add_ba_param.tx_win_size = | |
704 | MWIFIEX_UAP_AMPDU_DEF_TXWINSIZE; | |
705 | priv->add_ba_param.rx_win_size = | |
706 | MWIFIEX_UAP_AMPDU_DEF_RXWINSIZE; | |
707 | } else { | |
708 | priv->add_ba_param.tx_win_size = | |
709 | MWIFIEX_STA_AMPDU_DEF_TXWINSIZE; | |
710 | priv->add_ba_param.rx_win_size = | |
711 | MWIFIEX_STA_AMPDU_DEF_RXWINSIZE; | |
712 | } | |
713 | ||
714 | return; | |
715 | } |