mwifiex: separate function for parsing head and tail IEs
[deliverable/linux.git] / drivers / net / wireless / mwifiex / decl.h
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1/*
2 * Marvell Wireless LAN device driver: generic data structures and APIs
3 *
65da33f5 4 * Copyright (C) 2011-2014, Marvell International Ltd.
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5 *
6 * This software file (the "File") is distributed by Marvell International
7 * Ltd. under the terms of the GNU General Public License Version 2, June 1991
8 * (the "License"). You may use, redistribute and/or modify this File in
9 * accordance with the terms and conditions of the License, a copy of which
10 * is available by writing to the Free Software Foundation, Inc.,
11 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the
12 * worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt.
13 *
14 * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE
15 * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE
16 * ARE EXPRESSLY DISCLAIMED. The License provides additional details about
17 * this warranty disclaimer.
18 */
19
20#ifndef _MWIFIEX_DECL_H_
21#define _MWIFIEX_DECL_H_
22
23#undef pr_fmt
24#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
25
26#include <linux/wait.h>
27#include <linux/timer.h>
28#include <linux/ieee80211.h>
587b36d3 29#include <uapi/linux/if_arp.h>
54428c57 30#include <net/mac80211.h>
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31
32
197f4a2e 33#define MWIFIEX_MAX_BSS_NUM (3)
5e6e3a92 34
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35#define MWIFIEX_DMA_ALIGN_SZ 64
36#define MAX_TXPD_SZ 32
37#define INTF_HDR_ALIGN 4
38
39#define MWIFIEX_MIN_DATA_HEADER_LEN (MWIFIEX_DMA_ALIGN_SZ + INTF_HDR_ALIGN + \
40 MAX_TXPD_SZ)
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41#define MWIFIEX_MGMT_FRAME_HEADER_SIZE 8 /* sizeof(pkt_type)
42 * + sizeof(tx_control)
43 */
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44
45#define MWIFIEX_MAX_TX_BASTREAM_SUPPORTED 2
46#define MWIFIEX_MAX_RX_BASTREAM_SUPPORTED 16
72df6310 47#define MWIFIEX_MAX_TDLS_PEER_SUPPORTED 8
5e6e3a92 48
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49#define MWIFIEX_STA_AMPDU_DEF_TXWINSIZE 64
50#define MWIFIEX_STA_AMPDU_DEF_RXWINSIZE 64
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51#define MWIFIEX_UAP_AMPDU_DEF_TXWINSIZE 32
52#define MWIFIEX_UAP_AMPDU_DEF_RXWINSIZE 16
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53#define MWIFIEX_11AC_STA_AMPDU_DEF_TXWINSIZE 64
54#define MWIFIEX_11AC_STA_AMPDU_DEF_RXWINSIZE 64
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55#define MWIFIEX_11AC_UAP_AMPDU_DEF_TXWINSIZE 64
56#define MWIFIEX_11AC_UAP_AMPDU_DEF_RXWINSIZE 64
04abc0a3 57
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58#define MWIFIEX_DEFAULT_BLOCK_ACK_TIMEOUT 0xffff
59
5e6e3a92 60#define MWIFIEX_RATE_BITMAP_MCS0 32
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61
62#define MWIFIEX_RX_DATA_BUF_SIZE (4 * 1024)
4daffe35 63#define MWIFIEX_RX_CMD_BUF_SIZE (2 * 1024)
5e6e3a92 64
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65#define MAX_BEACON_PERIOD (4000)
66#define MIN_BEACON_PERIOD (50)
67#define MAX_DTIM_PERIOD (100)
68#define MIN_DTIM_PERIOD (1)
69
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70#define MWIFIEX_RTS_MIN_VALUE (0)
71#define MWIFIEX_RTS_MAX_VALUE (2347)
72#define MWIFIEX_FRAG_MIN_VALUE (256)
73#define MWIFIEX_FRAG_MAX_VALUE (2346)
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74#define MWIFIEX_WMM_VERSION 0x01
75#define MWIFIEX_WMM_SUBTYPE 0x01
5e6e3a92 76
9b930eae 77#define MWIFIEX_RETRY_LIMIT 14
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78#define MWIFIEX_SDIO_BLOCK_SIZE 256
79
80#define MWIFIEX_BUF_FLAG_REQUEUED_PKT BIT(0)
838e4f44 81#define MWIFIEX_BUF_FLAG_BRIDGED_PKT BIT(1)
b23bce29 82#define MWIFIEX_BUF_FLAG_TDLS_PKT BIT(2)
808bbebc 83#define MWIFIEX_BUF_FLAG_EAPOL_TX_STATUS BIT(3)
18ca4382 84#define MWIFIEX_BUF_FLAG_ACTION_TX_STATUS BIT(4)
838e4f44 85
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86#define MWIFIEX_BRIDGED_PKTS_THR_HIGH 1024
87#define MWIFIEX_BRIDGED_PKTS_THR_LOW 128
5e6e3a92 88
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89#define MWIFIEX_TDLS_DISABLE_LINK 0x00
90#define MWIFIEX_TDLS_ENABLE_LINK 0x01
91#define MWIFIEX_TDLS_CREATE_LINK 0x02
92#define MWIFIEX_TDLS_CONFIG_LINK 0x03
93
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94#define MWIFIEX_TDLS_RSSI_HIGH 50
95#define MWIFIEX_TDLS_RSSI_LOW 55
96#define MWIFIEX_TDLS_MAX_FAIL_COUNT 4
97#define MWIFIEX_AUTO_TDLS_IDLE_TIME 10
98
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99/* 54M rates, index from 0 to 11 */
100#define MWIFIEX_RATE_INDEX_MCS0 12
101/* 12-27=MCS0-15(BW20) */
102#define MWIFIEX_BW20_MCS_NUM 15
103
104/* Rate index for OFDM 0 */
105#define MWIFIEX_RATE_INDEX_OFDM0 4
106
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107#define MWIFIEX_MAX_STA_NUM 1
108#define MWIFIEX_MAX_UAP_NUM 1
109#define MWIFIEX_MAX_P2P_NUM 1
110
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111enum mwifiex_bss_type {
112 MWIFIEX_BSS_TYPE_STA = 0,
113 MWIFIEX_BSS_TYPE_UAP = 1,
197f4a2e 114 MWIFIEX_BSS_TYPE_P2P = 2,
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115 MWIFIEX_BSS_TYPE_ANY = 0xff,
116};
117
118enum mwifiex_bss_role {
119 MWIFIEX_BSS_ROLE_STA = 0,
120 MWIFIEX_BSS_ROLE_UAP = 1,
121 MWIFIEX_BSS_ROLE_ANY = 0xff,
122};
123
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124enum mwifiex_tdls_status {
125 TDLS_NOT_SETUP = 0,
126 TDLS_SETUP_INPROGRESS,
127 TDLS_SETUP_COMPLETE,
128 TDLS_SETUP_FAILURE,
129 TDLS_LINK_TEARDOWN,
130};
131
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132enum mwifiex_tdls_error_code {
133 TDLS_ERR_NO_ERROR = 0,
134 TDLS_ERR_INTERNAL_ERROR,
135 TDLS_ERR_MAX_LINKS_EST,
136 TDLS_ERR_LINK_EXISTS,
137 TDLS_ERR_LINK_NONEXISTENT,
138 TDLS_ERR_PEER_STA_UNREACHABLE = 25,
139};
140
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141#define BSS_ROLE_BIT_MASK BIT(0)
142
143#define GET_BSS_ROLE(priv) ((priv)->bss_role & BSS_ROLE_BIT_MASK)
144
145enum mwifiex_data_frame_type {
146 MWIFIEX_DATA_FRAME_TYPE_ETH_II = 0,
147 MWIFIEX_DATA_FRAME_TYPE_802_11,
148};
149
150struct mwifiex_fw_image {
151 u8 *helper_buf;
152 u32 helper_len;
153 u8 *fw_buf;
154 u32 fw_len;
155};
156
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157struct mwifiex_802_11_ssid {
158 u32 ssid_len;
159 u8 ssid[IEEE80211_MAX_SSID_LEN];
160};
161
5e6e3a92 162struct mwifiex_wait_queue {
600f5d90 163 wait_queue_head_t wait;
5e6e3a92 164 int status;
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165};
166
167struct mwifiex_rxinfo {
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168 u8 bss_num;
169 u8 bss_type;
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170 struct sk_buff *parent;
171 u8 use_count;
172};
173
174struct mwifiex_txinfo {
175 u32 status_code;
176 u8 flags;
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177 u8 bss_num;
178 u8 bss_type;
a1ed4849 179 u32 pkt_len;
808bbebc 180 u8 ack_frame_id;
18ca4382 181 u64 cookie;
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182};
183
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184enum mwifiex_wmm_ac_e {
185 WMM_AC_BK,
186 WMM_AC_BE,
187 WMM_AC_VI,
188 WMM_AC_VO
189} __packed;
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190
191struct ieee_types_wmm_ac_parameters {
192 u8 aci_aifsn_bitmap;
193 u8 ecw_bitmap;
194 __le16 tx_op_limit;
195} __packed;
196
197struct mwifiex_types_wmm_info {
198 u8 oui[4];
199 u8 subtype;
200 u8 version;
201 u8 qos_info;
202 u8 reserved;
203 struct ieee_types_wmm_ac_parameters ac_params[IEEE80211_NUM_ACS];
204} __packed;
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205
206struct mwifiex_arp_eth_header {
207 struct arphdr hdr;
208 u8 ar_sha[ETH_ALEN];
209 u8 ar_sip[4];
210 u8 ar_tha[ETH_ALEN];
211 u8 ar_tip[4];
212} __packed;
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213
214struct mwifiex_chan_stats {
215 u8 chan_num;
216 u8 bandcfg;
217 u8 flags;
218 s8 noise;
219 u16 total_bss;
220 u16 cca_scan_dur;
221 u16 cca_busy_dur;
222} __packed;
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223
224#define MWIFIEX_HIST_MAX_SAMPLES 1048576
225#define MWIFIEX_MAX_RX_RATES 44
226#define MWIFIEX_MAX_AC_RX_RATES 74
227#define MWIFIEX_MAX_SNR 256
228#define MWIFIEX_MAX_NOISE_FLR 256
229#define MWIFIEX_MAX_SIG_STRENGTH 256
230
231struct mwifiex_histogram_data {
232 atomic_t rx_rate[MWIFIEX_MAX_AC_RX_RATES];
233 atomic_t snr[MWIFIEX_MAX_SNR];
234 atomic_t noise_flr[MWIFIEX_MAX_NOISE_FLR];
235 atomic_t sig_str[MWIFIEX_MAX_SIG_STRENGTH];
236 atomic_t num_samples;
237};
238
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239struct mwifiex_iface_comb {
240 u8 sta_intf;
241 u8 uap_intf;
242 u8 p2p_intf;
243};
244
5e6e3a92 245#endif /* !_MWIFIEX_DECL_H_ */
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