[deliverable/linux.git] / drivers / net / wireless / mwifiex / ioctl.h

/*
 * Marvell Wireless LAN device driver: ioctl data structures & APIs
 *
 * Copyright (C) 2011, Marvell International Ltd.
 *
 * This software file (the "File") is distributed by Marvell International
 * Ltd. under the terms of the GNU General Public License Version 2, June 1991
 * (the "License").  You may use, redistribute and/or modify this File in
 * accordance with the terms and conditions of the License, a copy of which
 * is available by writing to the Free Software Foundation, Inc.,
 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the
 * worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt.
 *
 * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE
 * ARE EXPRESSLY DISCLAIMED.  The License provides additional details about
 * this warranty disclaimer.
 */

#ifndef _MWIFIEX_IOCTL_H_
#define _MWIFIEX_IOCTL_H_

#include <net/mac80211.h>

enum {
	MWIFIEX_SCAN_TYPE_UNCHANGED = 0,
	MWIFIEX_SCAN_TYPE_ACTIVE,
	MWIFIEX_SCAN_TYPE_PASSIVE
};

struct mwifiex_user_scan {
	u32 scan_cfg_len;
	u8 scan_cfg_buf[1];
};

#define MWIFIEX_PROMISC_MODE            1
#define MWIFIEX_MULTICAST_MODE		2
#define	MWIFIEX_ALL_MULTI_MODE		4
#define MWIFIEX_MAX_MULTICAST_LIST_SIZE	32

struct mwifiex_multicast_list {
	u32 mode;
	u32 num_multicast_addr;
	u8 mac_list[MWIFIEX_MAX_MULTICAST_LIST_SIZE][ETH_ALEN];
};

struct mwifiex_chan_freq {
	u32 channel;
	u32 freq;
};

struct mwifiex_ssid_bssid {
	struct cfg80211_ssid ssid;
	u8 bssid[ETH_ALEN];
};

enum {
	BAND_B = 1,
	BAND_G = 2,
	BAND_A = 4,
	BAND_GN = 8,
	BAND_AN = 16,
};

#define BAND_CONFIG_MANUAL      0x00
struct mwifiex_uap_bss_param {
	u8 channel;
	u8 band_cfg;
};

enum {
	ADHOC_IDLE,
	ADHOC_STARTED,
	ADHOC_JOINED,
	ADHOC_COALESCED
};

struct mwifiex_ds_get_stats {
	u32 mcast_tx_frame;
	u32 failed;
	u32 retry;
	u32 multi_retry;
	u32 frame_dup;
	u32 rts_success;
	u32 rts_failure;
	u32 ack_failure;
	u32 rx_frag;
	u32 mcast_rx_frame;
	u32 fcs_error;
	u32 tx_frame;
	u32 wep_icv_error[4];
};

#define MWIFIEX_MAX_VER_STR_LEN    128

struct mwifiex_ver_ext {
	u32 version_str_sel;
	char version_str[MWIFIEX_MAX_VER_STR_LEN];
};

struct mwifiex_bss_info {
	u32 bss_mode;
	struct cfg80211_ssid ssid;
	u32 bss_chan;
	u8 country_code[3];
	u32 media_connected;
	u32 max_power_level;
	u32 min_power_level;
	u32 adhoc_state;
	signed int bcn_nf_last;
	u32 wep_status;
	u32 is_hs_configured;
	u32 is_deep_sleep;
	u8 bssid[ETH_ALEN];
};

#define MAX_NUM_TID     8

#define MAX_RX_WINSIZE  64

struct mwifiex_ds_rx_reorder_tbl {
	u16 tid;
	u8 ta[ETH_ALEN];
	u32 start_win;
	u32 win_size;
	u32 buffer[MAX_RX_WINSIZE];
};

struct mwifiex_ds_tx_ba_stream_tbl {
	u16 tid;
	u8 ra[ETH_ALEN];
};

#define DBG_CMD_NUM	5

struct mwifiex_debug_info {
	u32 int_counter;
	u32 packets_out[MAX_NUM_TID];
	u32 max_tx_buf_size;
	u32 tx_buf_size;
	u32 curr_tx_buf_size;
	u32 tx_tbl_num;
	struct mwifiex_ds_tx_ba_stream_tbl
		tx_tbl[MWIFIEX_MAX_TX_BASTREAM_SUPPORTED];
	u32 rx_tbl_num;
	struct mwifiex_ds_rx_reorder_tbl rx_tbl
		[MWIFIEX_MAX_RX_BASTREAM_SUPPORTED];
	u16 ps_mode;
	u32 ps_state;
	u8 is_deep_sleep;
	u8 pm_wakeup_card_req;
	u32 pm_wakeup_fw_try;
	u8 is_hs_configured;
	u8 hs_activated;
	u32 num_cmd_host_to_card_failure;
	u32 num_cmd_sleep_cfm_host_to_card_failure;
	u32 num_tx_host_to_card_failure;
	u32 num_event_deauth;
	u32 num_event_disassoc;
	u32 num_event_link_lost;
	u32 num_cmd_deauth;
	u32 num_cmd_assoc_success;
	u32 num_cmd_assoc_failure;
	u32 num_tx_timeout;
	u32 num_cmd_timeout;
	u16 timeout_cmd_id;
	u16 timeout_cmd_act;
	u16 last_cmd_id[DBG_CMD_NUM];
	u16 last_cmd_act[DBG_CMD_NUM];
	u16 last_cmd_index;
	u16 last_cmd_resp_id[DBG_CMD_NUM];
	u16 last_cmd_resp_index;
	u16 last_event[DBG_CMD_NUM];
	u16 last_event_index;
	u8 data_sent;
	u8 cmd_sent;
	u8 cmd_resp_received;
	u8 event_received;
};

#define MWIFIEX_KEY_INDEX_UNICAST	0x40000000
#define WAPI_RXPN_LEN			16

struct mwifiex_ds_encrypt_key {
	u32 key_disable;
	u32 key_index;
	u32 key_len;
	u8 key_material[WLAN_MAX_KEY_LEN];
	u8 mac_addr[ETH_ALEN];
	u32 is_wapi_key;
	u8 wapi_rxpn[WAPI_RXPN_LEN];
};

struct mwifiex_rate_cfg {
	u32 action;
	u32 is_rate_auto;
	u32 rate;
};

struct mwifiex_power_cfg {
	u32 is_power_auto;
	u32 power_level;
};

struct mwifiex_ds_hs_cfg {
	u32 is_invoke_hostcmd;
	/*  Bit0: non-unicast data
	 *  Bit1: unicast data
	 *  Bit2: mac events
	 *  Bit3: magic packet
	 */
	u32 conditions;
	u32 gpio;
	u32 gap;
};

#define DEEP_SLEEP_ON  1
#define DEEP_SLEEP_OFF 0
#define DEEP_SLEEP_IDLE_TIME	100
#define PS_MODE_AUTO		1

struct mwifiex_ds_auto_ds {
	u16 auto_ds;
	u16 idle_time;
};

struct mwifiex_ds_pm_cfg {
	union {
		u32 ps_mode;
		struct mwifiex_ds_hs_cfg hs_cfg;
		struct mwifiex_ds_auto_ds auto_deep_sleep;
		u32 sleep_period;
	} param;
};

struct mwifiex_ds_11n_tx_cfg {
	u16 tx_htcap;
	u16 tx_htinfo;
};

struct mwifiex_ds_11n_amsdu_aggr_ctrl {
	u16 enable;
	u16 curr_buf_size;
};

#define MWIFIEX_NUM_OF_CMD_BUFFER	20
#define MWIFIEX_SIZE_OF_CMD_BUFFER	2048

enum {
	MWIFIEX_IE_TYPE_GEN_IE = 0,
	MWIFIEX_IE_TYPE_ARP_FILTER,
};

enum {
	MWIFIEX_REG_MAC = 1,
	MWIFIEX_REG_BBP,
	MWIFIEX_REG_RF,
	MWIFIEX_REG_PMIC,
	MWIFIEX_REG_CAU,
};

struct mwifiex_ds_reg_rw {
	__le32 type;
	__le32 offset;
	__le32 value;
};

#define MAX_EEPROM_DATA 256

struct mwifiex_ds_read_eeprom {
	__le16 offset;
	__le16 byte_count;
	u8 value[MAX_EEPROM_DATA];
};

#define IEEE_MAX_IE_SIZE		256

struct mwifiex_ds_misc_gen_ie {
	u32 type;
	u32 len;
	u8 ie_data[IEEE_MAX_IE_SIZE];
};

struct mwifiex_ds_misc_cmd {
	u32 len;
	u8 cmd[MWIFIEX_SIZE_OF_CMD_BUFFER];
};

#define BITMASK_BCN_RSSI_LOW	BIT(0)
#define BITMASK_BCN_RSSI_HIGH	BIT(4)

enum subsc_evt_rssi_state {
	EVENT_HANDLED,
	RSSI_LOW_RECVD,
	RSSI_HIGH_RECVD
};

struct subsc_evt_cfg {
	u8 abs_value;
	u8 evt_freq;
};

struct mwifiex_ds_misc_subsc_evt {
	u16 action;
	u16 events;
	struct subsc_evt_cfg bcn_l_rssi_cfg;
	struct subsc_evt_cfg bcn_h_rssi_cfg;
};

#define MWIFIEX_MAX_VSIE_LEN       (256)
#define MWIFIEX_MAX_VSIE_NUM       (8)
#define MWIFIEX_VSIE_MASK_CLEAR    0x00
#define MWIFIEX_VSIE_MASK_SCAN     0x01
#define MWIFIEX_VSIE_MASK_ASSOC    0x02
#define MWIFIEX_VSIE_MASK_ADHOC    0x04

enum {
	MWIFIEX_FUNC_INIT = 1,
	MWIFIEX_FUNC_SHUTDOWN,
};

#endif /* !_MWIFIEX_IOCTL_H_ */
Commit	Line	Data
5e6e3a92 BZ	1	/*
	2	* Marvell Wireless LAN device driver: ioctl data structures & APIs
	3	*
	4	* Copyright (C) 2011, Marvell International Ltd.
	5	*
	6	* This software file (the "File") is distributed by Marvell International
	7	* Ltd. under the terms of the GNU General Public License Version 2, June 1991
	8	* (the "License"). You may use, redistribute and/or modify this File in
	9	* accordance with the terms and conditions of the License, a copy of which
	10	* is available by writing to the Free Software Foundation, Inc.,
	11	* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the
	12	* worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt.
	13	*
	14	* THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE
	15	* IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE
	16	* ARE EXPRESSLY DISCLAIMED. The License provides additional details about
	17	* this warranty disclaimer.
	18	*/
	19
	20	#ifndef _MWIFIEX_IOCTL_H_
	21	#define _MWIFIEX_IOCTL_H_
	22
	23	#include <net/mac80211.h>
	24
5e6e3a92 BZ	25	enum {
	26	MWIFIEX_SCAN_TYPE_UNCHANGED = 0,
	27	MWIFIEX_SCAN_TYPE_ACTIVE,
	28	MWIFIEX_SCAN_TYPE_PASSIVE
	29	};
	30
5e6e3a92 BZ	31	struct mwifiex_user_scan {
	32	u32 scan_cfg_len;
	33	u8 scan_cfg_buf[1];
	34	};
	35
5e6e3a92 BZ	36	#define MWIFIEX_PROMISC_MODE 1
	37	#define MWIFIEX_MULTICAST_MODE 2
	38	#define MWIFIEX_ALL_MULTI_MODE 4
	39	#define MWIFIEX_MAX_MULTICAST_LIST_SIZE 32
	40
	41	struct mwifiex_multicast_list {
	42	u32 mode;
	43	u32 num_multicast_addr;
	44	u8 mac_list[MWIFIEX_MAX_MULTICAST_LIST_SIZE][ETH_ALEN];
	45	};
	46
5e6e3a92 BZ	47	struct mwifiex_chan_freq {
	48	u32 channel;
	49	u32 freq;
	50	};
	51
5e6e3a92	52	struct mwifiex_ssid_bssid {
b9be5f39	53	struct cfg80211_ssid ssid;
5e6e3a92 BZ	54	u8 bssid[ETH_ALEN];
	55	};
	56
	57	enum {
	58	BAND_B = 1,
	59	BAND_G = 2,
	60	BAND_A = 4,
	61	BAND_GN = 8,
	62	BAND_AN = 16,
	63	};
	64
4db16a18 AP	65	#define BAND_CONFIG_MANUAL 0x00
	66	struct mwifiex_uap_bss_param {
	67	u8 channel;
	68	u8 band_cfg;
	69	};
	70
5e6e3a92 BZ	71	enum {
	72	ADHOC_IDLE,
	73	ADHOC_STARTED,
	74	ADHOC_JOINED,
	75	ADHOC_COALESCED
	76	};
	77
	78	struct mwifiex_ds_get_stats {
	79	u32 mcast_tx_frame;
	80	u32 failed;
	81	u32 retry;
	82	u32 multi_retry;
	83	u32 frame_dup;
	84	u32 rts_success;
	85	u32 rts_failure;
	86	u32 ack_failure;
	87	u32 rx_frag;
	88	u32 mcast_rx_frame;
	89	u32 fcs_error;
	90	u32 tx_frame;
	91	u32 wep_icv_error[4];
	92	};
	93
5e6e3a92 BZ	94	#define MWIFIEX_MAX_VER_STR_LEN 128
	95
	96	struct mwifiex_ver_ext {
	97	u32 version_str_sel;
	98	char version_str[MWIFIEX_MAX_VER_STR_LEN];
	99	};
	100
	101	struct mwifiex_bss_info {
	102	u32 bss_mode;
b9be5f39	103	struct cfg80211_ssid ssid;
5e6e3a92	104	u32 bss_chan;
5e218b7a	105	u8 country_code[3];
5e6e3a92	106	u32 media_connected;
5e6e3a92 BZ	107	u32 max_power_level;
	108	u32 min_power_level;
	109	u32 adhoc_state;
	110	signed int bcn_nf_last;
	111	u32 wep_status;
	112	u32 is_hs_configured;
	113	u32 is_deep_sleep;
	114	u8 bssid[ETH_ALEN];
	115	};
	116
	117	#define MAX_NUM_TID 8
	118
	119	#define MAX_RX_WINSIZE 64
	120
	121	struct mwifiex_ds_rx_reorder_tbl {
	122	u16 tid;
	123	u8 ta[ETH_ALEN];
	124	u32 start_win;
	125	u32 win_size;
	126	u32 buffer[MAX_RX_WINSIZE];
	127	};
	128
	129	struct mwifiex_ds_tx_ba_stream_tbl {
	130	u16 tid;
	131	u8 ra[ETH_ALEN];
	132	};
	133
	134	#define DBG_CMD_NUM 5
	135
	136	struct mwifiex_debug_info {
	137	u32 int_counter;
	138	u32 packets_out[MAX_NUM_TID];
	139	u32 max_tx_buf_size;
	140	u32 tx_buf_size;
	141	u32 curr_tx_buf_size;
	142	u32 tx_tbl_num;
	143	struct mwifiex_ds_tx_ba_stream_tbl
	144	tx_tbl[MWIFIEX_MAX_TX_BASTREAM_SUPPORTED];
	145	u32 rx_tbl_num;
	146	struct mwifiex_ds_rx_reorder_tbl rx_tbl
	147	[MWIFIEX_MAX_RX_BASTREAM_SUPPORTED];
	148	u16 ps_mode;
	149	u32 ps_state;
	150	u8 is_deep_sleep;
	151	u8 pm_wakeup_card_req;
	152	u32 pm_wakeup_fw_try;
	153	u8 is_hs_configured;
	154	u8 hs_activated;
	155	u32 num_cmd_host_to_card_failure;
	156	u32 num_cmd_sleep_cfm_host_to_card_failure;
	157	u32 num_tx_host_to_card_failure;
	158	u32 num_event_deauth;
	159	u32 num_event_disassoc;
	160	u32 num_event_link_lost;
	161	u32 num_cmd_deauth;
	162	u32 num_cmd_assoc_success;
	163	u32 num_cmd_assoc_failure;
	164	u32 num_tx_timeout;
	165	u32 num_cmd_timeout;
	166	u16 timeout_cmd_id;
	167	u16 timeout_cmd_act;
	168	u16 last_cmd_id[DBG_CMD_NUM];
	169	u16 last_cmd_act[DBG_CMD_NUM];
	170	u16 last_cmd_index;
171	u16 last_cmd_resp_id[DBG_CMD_NUM];
172	u16 last_cmd_resp_index;
173	u16 last_event[DBG_CMD_NUM];
174	u16 last_event_index;
175	u8 data_sent;
176	u8 cmd_sent;
177	u8 cmd_resp_received;
178	u8 event_received;
179	};
180
5e6e3a92	181	#define MWIFIEX_KEY_INDEX_UNICAST 0x40000000
5e6e3a92 BZ	182	#define WAPI_RXPN_LEN 16
	183
	184	struct mwifiex_ds_encrypt_key {
	185	u32 key_disable;
	186	u32 key_index;
	187	u32 key_len;
a3731658	188	u8 key_material[WLAN_MAX_KEY_LEN];
5e6e3a92 BZ	189	u8 mac_addr[ETH_ALEN];
	190	u32 is_wapi_key;
	191	u8 wapi_rxpn[WAPI_RXPN_LEN];
	192	};
	193
	194	struct mwifiex_rate_cfg {
	195	u32 action;
	196	u32 is_rate_auto;
	197	u32 rate;
	198	};
	199
5e6e3a92 BZ	200	struct mwifiex_power_cfg {
	201	u32 is_power_auto;
	202	u32 power_level;
	203	};
	204
	205	struct mwifiex_ds_hs_cfg {
	206	u32 is_invoke_hostcmd;
	207	/* Bit0: non-unicast data
	208	* Bit1: unicast data
	209	* Bit2: mac events
	210	* Bit3: magic packet
	211	*/
	212	u32 conditions;
	213	u32 gpio;
	214	u32 gap;
	215	};
	216
	217	#define DEEP_SLEEP_ON 1
a0490936	218	#define DEEP_SLEEP_OFF 0
5e6e3a92	219	#define DEEP_SLEEP_IDLE_TIME 100
a8c48565	220	#define PS_MODE_AUTO 1
5e6e3a92 BZ	221
	222	struct mwifiex_ds_auto_ds {
	223	u16 auto_ds;
	224	u16 idle_time;
	225	};
	226
5e6e3a92 BZ	227	struct mwifiex_ds_pm_cfg {
	228	union {
	229	u32 ps_mode;
	230	struct mwifiex_ds_hs_cfg hs_cfg;
	231	struct mwifiex_ds_auto_ds auto_deep_sleep;
	232	u32 sleep_period;
	233	} param;
	234	};
	235
5e6e3a92 BZ	236	struct mwifiex_ds_11n_tx_cfg {
	237	u16 tx_htcap;
	238	u16 tx_htinfo;
	239	};
	240
	241	struct mwifiex_ds_11n_amsdu_aggr_ctrl {
	242	u16 enable;
	243	u16 curr_buf_size;
	244	};
	245
	246	#define MWIFIEX_NUM_OF_CMD_BUFFER 20
	247	#define MWIFIEX_SIZE_OF_CMD_BUFFER 2048
	248
	249	enum {
	250	MWIFIEX_IE_TYPE_GEN_IE = 0,
	251	MWIFIEX_IE_TYPE_ARP_FILTER,
	252	};
	253
	254	enum {
	255	MWIFIEX_REG_MAC = 1,
	256	MWIFIEX_REG_BBP,
	257	MWIFIEX_REG_RF,
	258	MWIFIEX_REG_PMIC,
	259	MWIFIEX_REG_CAU,
	260	};
	261
	262	struct mwifiex_ds_reg_rw {
	263	__le32 type;
	264	__le32 offset;
	265	__le32 value;
	266	};
	267
	268	#define MAX_EEPROM_DATA 256
	269
	270	struct mwifiex_ds_read_eeprom {
	271	__le16 offset;
	272	__le16 byte_count;
	273	u8 value[MAX_EEPROM_DATA];
	274	};
	275
67a50035 BZ	276	#define IEEE_MAX_IE_SIZE 256
67a50035 BZ	277
5e6e3a92 BZ	278	struct mwifiex_ds_misc_gen_ie {
	279	u32 type;
	280	u32 len;
67a50035	281	u8 ie_data[IEEE_MAX_IE_SIZE];
5e6e3a92 BZ	282	};
	283
	284	struct mwifiex_ds_misc_cmd {
	285	u32 len;
	286	u8 cmd[MWIFIEX_SIZE_OF_CMD_BUFFER];
	287	};
	288
fa444bf8 AK	289	#define BITMASK_BCN_RSSI_LOW BIT(0)
	290	#define BITMASK_BCN_RSSI_HIGH BIT(4)
	291
	292	enum subsc_evt_rssi_state {
	293	EVENT_HANDLED,
	294	RSSI_LOW_RECVD,
	295	RSSI_HIGH_RECVD
	296	};
	297
	298	struct subsc_evt_cfg {
	299	u8 abs_value;
	300	u8 evt_freq;
	301	};
	302
	303	struct mwifiex_ds_misc_subsc_evt {
	304	u16 action;
	305	u16 events;
	306	struct subsc_evt_cfg bcn_l_rssi_cfg;
	307	struct subsc_evt_cfg bcn_h_rssi_cfg;
	308	};
	309
5e6e3a92 BZ	310	#define MWIFIEX_MAX_VSIE_LEN (256)
5e6e3a92 BZ	311	#define MWIFIEX_MAX_VSIE_NUM (8)
13d7ba78	312	#define MWIFIEX_VSIE_MASK_CLEAR 0x00
5e6e3a92 BZ	313	#define MWIFIEX_VSIE_MASK_SCAN 0x01
	314	#define MWIFIEX_VSIE_MASK_ASSOC 0x02
	315	#define MWIFIEX_VSIE_MASK_ADHOC 0x04
	316
	317	enum {
	318	MWIFIEX_FUNC_INIT = 1,
	319	MWIFIEX_FUNC_SHUTDOWN,
	320	};
	321
	322	#endif /* !_MWIFIEX_IOCTL_H_ */