mwifiex: check SDIO multi-port aggregation buffer room correctly
[deliverable/linux.git] / drivers / net / wireless / mwifiex / ioctl.h
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1/*
2 * Marvell Wireless LAN device driver: ioctl data structures & APIs
3 *
4 * Copyright (C) 2011, Marvell International Ltd.
5 *
6 * This software file (the "File") is distributed by Marvell International
7 * Ltd. under the terms of the GNU General Public License Version 2, June 1991
8 * (the "License"). You may use, redistribute and/or modify this File in
9 * accordance with the terms and conditions of the License, a copy of which
10 * is available by writing to the Free Software Foundation, Inc.,
11 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the
12 * worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt.
13 *
14 * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE
15 * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE
16 * ARE EXPRESSLY DISCLAIMED. The License provides additional details about
17 * this warranty disclaimer.
18 */
19
20#ifndef _MWIFIEX_IOCTL_H_
21#define _MWIFIEX_IOCTL_H_
22
23#include <net/mac80211.h>
24
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25enum {
26 MWIFIEX_SCAN_TYPE_UNCHANGED = 0,
27 MWIFIEX_SCAN_TYPE_ACTIVE,
28 MWIFIEX_SCAN_TYPE_PASSIVE
29};
30
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31struct mwifiex_user_scan {
32 u32 scan_cfg_len;
33 u8 scan_cfg_buf[1];
34};
35
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36#define MWIFIEX_PROMISC_MODE 1
37#define MWIFIEX_MULTICAST_MODE 2
38#define MWIFIEX_ALL_MULTI_MODE 4
39#define MWIFIEX_MAX_MULTICAST_LIST_SIZE 32
40
41struct mwifiex_multicast_list {
42 u32 mode;
43 u32 num_multicast_addr;
44 u8 mac_list[MWIFIEX_MAX_MULTICAST_LIST_SIZE][ETH_ALEN];
45};
46
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47struct mwifiex_chan_freq {
48 u32 channel;
49 u32 freq;
50};
51
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52struct mwifiex_ssid_bssid {
53 struct mwifiex_802_11_ssid ssid;
54 u8 bssid[ETH_ALEN];
55};
56
57enum {
58 BAND_B = 1,
59 BAND_G = 2,
60 BAND_A = 4,
61 BAND_GN = 8,
62 BAND_AN = 16,
63};
64
65#define NO_SEC_CHANNEL 0
66#define SEC_CHANNEL_ABOVE 1
67#define SEC_CHANNEL_BELOW 3
68
69struct mwifiex_ds_band_cfg {
70 u32 config_bands;
71 u32 adhoc_start_band;
72 u32 adhoc_channel;
73 u32 sec_chan_offset;
74};
75
76enum {
77 ADHOC_IDLE,
78 ADHOC_STARTED,
79 ADHOC_JOINED,
80 ADHOC_COALESCED
81};
82
83struct mwifiex_ds_get_stats {
84 u32 mcast_tx_frame;
85 u32 failed;
86 u32 retry;
87 u32 multi_retry;
88 u32 frame_dup;
89 u32 rts_success;
90 u32 rts_failure;
91 u32 ack_failure;
92 u32 rx_frag;
93 u32 mcast_rx_frame;
94 u32 fcs_error;
95 u32 tx_frame;
96 u32 wep_icv_error[4];
97};
98
5e6e3a92 99#define BCN_RSSI_AVG_MASK 0x00000002
5e6e3a92 100#define BCN_NF_AVG_MASK 0x00000200
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101#define ALL_RSSI_INFO_MASK 0x00000fff
102
103struct mwifiex_ds_get_signal {
104 /*
105 * Bit0: Last Beacon RSSI, Bit1: Average Beacon RSSI,
106 * Bit2: Last Data RSSI, Bit3: Average Data RSSI,
107 * Bit4: Last Beacon SNR, Bit5: Average Beacon SNR,
108 * Bit6: Last Data SNR, Bit7: Average Data SNR,
109 * Bit8: Last Beacon NF, Bit9: Average Beacon NF,
110 * Bit10: Last Data NF, Bit11: Average Data NF
111 */
112 u16 selector;
113 s16 bcn_rssi_last;
114 s16 bcn_rssi_avg;
115 s16 data_rssi_last;
116 s16 data_rssi_avg;
117 s16 bcn_snr_last;
118 s16 bcn_snr_avg;
119 s16 data_snr_last;
120 s16 data_snr_avg;
121 s16 bcn_nf_last;
122 s16 bcn_nf_avg;
123 s16 data_nf_last;
124 s16 data_nf_avg;
125};
126
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127#define MWIFIEX_MAX_VER_STR_LEN 128
128
129struct mwifiex_ver_ext {
130 u32 version_str_sel;
131 char version_str[MWIFIEX_MAX_VER_STR_LEN];
132};
133
134struct mwifiex_bss_info {
135 u32 bss_mode;
136 struct mwifiex_802_11_ssid ssid;
137 u32 scan_table_idx;
138 u32 bss_chan;
139 u32 region_code;
140 u32 media_connected;
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141 u32 max_power_level;
142 u32 min_power_level;
143 u32 adhoc_state;
144 signed int bcn_nf_last;
145 u32 wep_status;
146 u32 is_hs_configured;
147 u32 is_deep_sleep;
148 u8 bssid[ETH_ALEN];
149};
150
151#define MAX_NUM_TID 8
152
153#define MAX_RX_WINSIZE 64
154
155struct mwifiex_ds_rx_reorder_tbl {
156 u16 tid;
157 u8 ta[ETH_ALEN];
158 u32 start_win;
159 u32 win_size;
160 u32 buffer[MAX_RX_WINSIZE];
161};
162
163struct mwifiex_ds_tx_ba_stream_tbl {
164 u16 tid;
165 u8 ra[ETH_ALEN];
166};
167
168#define DBG_CMD_NUM 5
169
170struct mwifiex_debug_info {
171 u32 int_counter;
172 u32 packets_out[MAX_NUM_TID];
173 u32 max_tx_buf_size;
174 u32 tx_buf_size;
175 u32 curr_tx_buf_size;
176 u32 tx_tbl_num;
177 struct mwifiex_ds_tx_ba_stream_tbl
178 tx_tbl[MWIFIEX_MAX_TX_BASTREAM_SUPPORTED];
179 u32 rx_tbl_num;
180 struct mwifiex_ds_rx_reorder_tbl rx_tbl
181 [MWIFIEX_MAX_RX_BASTREAM_SUPPORTED];
182 u16 ps_mode;
183 u32 ps_state;
184 u8 is_deep_sleep;
185 u8 pm_wakeup_card_req;
186 u32 pm_wakeup_fw_try;
187 u8 is_hs_configured;
188 u8 hs_activated;
189 u32 num_cmd_host_to_card_failure;
190 u32 num_cmd_sleep_cfm_host_to_card_failure;
191 u32 num_tx_host_to_card_failure;
192 u32 num_event_deauth;
193 u32 num_event_disassoc;
194 u32 num_event_link_lost;
195 u32 num_cmd_deauth;
196 u32 num_cmd_assoc_success;
197 u32 num_cmd_assoc_failure;
198 u32 num_tx_timeout;
199 u32 num_cmd_timeout;
200 u16 timeout_cmd_id;
201 u16 timeout_cmd_act;
202 u16 last_cmd_id[DBG_CMD_NUM];
203 u16 last_cmd_act[DBG_CMD_NUM];
204 u16 last_cmd_index;
205 u16 last_cmd_resp_id[DBG_CMD_NUM];
206 u16 last_cmd_resp_index;
207 u16 last_event[DBG_CMD_NUM];
208 u16 last_event_index;
209 u8 data_sent;
210 u8 cmd_sent;
211 u8 cmd_resp_received;
212 u8 event_received;
213};
214
5e6e3a92 215#define MWIFIEX_KEY_INDEX_UNICAST 0x40000000
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216#define WAPI_RXPN_LEN 16
217
218struct mwifiex_ds_encrypt_key {
219 u32 key_disable;
220 u32 key_index;
221 u32 key_len;
a3731658 222 u8 key_material[WLAN_MAX_KEY_LEN];
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223 u8 mac_addr[ETH_ALEN];
224 u32 is_wapi_key;
225 u8 wapi_rxpn[WAPI_RXPN_LEN];
226};
227
228struct mwifiex_rate_cfg {
229 u32 action;
230 u32 is_rate_auto;
231 u32 rate;
232};
233
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234struct mwifiex_power_cfg {
235 u32 is_power_auto;
236 u32 power_level;
237};
238
239struct mwifiex_ds_hs_cfg {
240 u32 is_invoke_hostcmd;
241 /* Bit0: non-unicast data
242 * Bit1: unicast data
243 * Bit2: mac events
244 * Bit3: magic packet
245 */
246 u32 conditions;
247 u32 gpio;
248 u32 gap;
249};
250
251#define DEEP_SLEEP_ON 1
5e6e3a92 252#define DEEP_SLEEP_IDLE_TIME 100
a8c48565 253#define PS_MODE_AUTO 1
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254
255struct mwifiex_ds_auto_ds {
256 u16 auto_ds;
257 u16 idle_time;
258};
259
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260struct mwifiex_ds_pm_cfg {
261 union {
262 u32 ps_mode;
263 struct mwifiex_ds_hs_cfg hs_cfg;
264 struct mwifiex_ds_auto_ds auto_deep_sleep;
265 u32 sleep_period;
266 } param;
267};
268
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269struct mwifiex_ds_11n_tx_cfg {
270 u16 tx_htcap;
271 u16 tx_htinfo;
272};
273
274struct mwifiex_ds_11n_amsdu_aggr_ctrl {
275 u16 enable;
276 u16 curr_buf_size;
277};
278
279#define MWIFIEX_NUM_OF_CMD_BUFFER 20
280#define MWIFIEX_SIZE_OF_CMD_BUFFER 2048
281
282enum {
283 MWIFIEX_IE_TYPE_GEN_IE = 0,
284 MWIFIEX_IE_TYPE_ARP_FILTER,
285};
286
287enum {
288 MWIFIEX_REG_MAC = 1,
289 MWIFIEX_REG_BBP,
290 MWIFIEX_REG_RF,
291 MWIFIEX_REG_PMIC,
292 MWIFIEX_REG_CAU,
293};
294
295struct mwifiex_ds_reg_rw {
296 __le32 type;
297 __le32 offset;
298 __le32 value;
299};
300
301#define MAX_EEPROM_DATA 256
302
303struct mwifiex_ds_read_eeprom {
304 __le16 offset;
305 __le16 byte_count;
306 u8 value[MAX_EEPROM_DATA];
307};
308
309struct mwifiex_ds_misc_gen_ie {
310 u32 type;
311 u32 len;
312 u8 ie_data[IW_CUSTOM_MAX];
313};
314
315struct mwifiex_ds_misc_cmd {
316 u32 len;
317 u8 cmd[MWIFIEX_SIZE_OF_CMD_BUFFER];
318};
319
320#define MWIFIEX_MAX_VSIE_LEN (256)
321#define MWIFIEX_MAX_VSIE_NUM (8)
322#define MWIFIEX_VSIE_MASK_SCAN 0x01
323#define MWIFIEX_VSIE_MASK_ASSOC 0x02
324#define MWIFIEX_VSIE_MASK_ADHOC 0x04
325
326enum {
327 MWIFIEX_FUNC_INIT = 1,
328 MWIFIEX_FUNC_SHUTDOWN,
329};
330
331#endif /* !_MWIFIEX_IOCTL_H_ */
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