[deliverable/linux.git] / drivers / net / wireless / mwifiex / ioctl.h

/*
 * Marvell Wireless LAN device driver: ioctl data structures & APIs
 *
 * Copyright (C) 2011, Marvell International Ltd.
 *
 * This software file (the "File") is distributed by Marvell International
 * Ltd. under the terms of the GNU General Public License Version 2, June 1991
 * (the "License").  You may use, redistribute and/or modify this File in
 * accordance with the terms and conditions of the License, a copy of which
 * is available by writing to the Free Software Foundation, Inc.,
 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the
 * worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt.
 *
 * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE
 * ARE EXPRESSLY DISCLAIMED.  The License provides additional details about
 * this warranty disclaimer.
 */

#ifndef _MWIFIEX_IOCTL_H_
#define _MWIFIEX_IOCTL_H_

#include <net/mac80211.h>

enum {
	MWIFIEX_SCAN_TYPE_UNCHANGED = 0,
	MWIFIEX_SCAN_TYPE_ACTIVE,
	MWIFIEX_SCAN_TYPE_PASSIVE
};

struct mwifiex_user_scan {
	u32 scan_cfg_len;
	u8 scan_cfg_buf[1];
};

#define MWIFIEX_PROMISC_MODE            1
#define MWIFIEX_MULTICAST_MODE		2
#define	MWIFIEX_ALL_MULTI_MODE		4
#define MWIFIEX_MAX_MULTICAST_LIST_SIZE	32

struct mwifiex_multicast_list {
	u32 mode;
	u32 num_multicast_addr;
	u8 mac_list[MWIFIEX_MAX_MULTICAST_LIST_SIZE][ETH_ALEN];
};

struct mwifiex_chan_freq {
	u32 channel;
	u32 freq;
};

struct mwifiex_ssid_bssid {
	struct mwifiex_802_11_ssid ssid;
	u8 bssid[ETH_ALEN];
};

enum {
	BAND_B = 1,
	BAND_G = 2,
	BAND_A = 4,
	BAND_GN = 8,
	BAND_AN = 16,
};

enum {
	ADHOC_IDLE,
	ADHOC_STARTED,
	ADHOC_JOINED,
	ADHOC_COALESCED
};

struct mwifiex_ds_get_stats {
	u32 mcast_tx_frame;
	u32 failed;
	u32 retry;
	u32 multi_retry;
	u32 frame_dup;
	u32 rts_success;
	u32 rts_failure;
	u32 ack_failure;
	u32 rx_frag;
	u32 mcast_rx_frame;
	u32 fcs_error;
	u32 tx_frame;
	u32 wep_icv_error[4];
};

#define BCN_RSSI_AVG_MASK               0x00000002
#define BCN_NF_AVG_MASK                 0x00000200
#define ALL_RSSI_INFO_MASK              0x00000fff

struct mwifiex_ds_get_signal {
	/*
	 * Bit0:  Last Beacon RSSI,  Bit1:  Average Beacon RSSI,
	 * Bit2:  Last Data RSSI,    Bit3:  Average Data RSSI,
	 * Bit4:  Last Beacon SNR,   Bit5:  Average Beacon SNR,
	 * Bit6:  Last Data SNR,     Bit7:  Average Data SNR,
	 * Bit8:  Last Beacon NF,    Bit9:  Average Beacon NF,
	 * Bit10: Last Data NF,      Bit11: Average Data NF
	 */
	u16 selector;
	s16 bcn_rssi_last;
	s16 bcn_rssi_avg;
	s16 data_rssi_last;
	s16 data_rssi_avg;
	s16 bcn_snr_last;
	s16 bcn_snr_avg;
	s16 data_snr_last;
	s16 data_snr_avg;
	s16 bcn_nf_last;
	s16 bcn_nf_avg;
	s16 data_nf_last;
	s16 data_nf_avg;
};

#define MWIFIEX_MAX_VER_STR_LEN    128

struct mwifiex_ver_ext {
	u32 version_str_sel;
	char version_str[MWIFIEX_MAX_VER_STR_LEN];
};

struct mwifiex_bss_info {
	u32 bss_mode;
	struct mwifiex_802_11_ssid ssid;
	u32 bss_chan;
	u32 region_code;
	u32 media_connected;
	u32 max_power_level;
	u32 min_power_level;
	u32 adhoc_state;
	signed int bcn_nf_last;
	u32 wep_status;
	u32 is_hs_configured;
	u32 is_deep_sleep;
	u8 bssid[ETH_ALEN];
};

#define MAX_NUM_TID     8

#define MAX_RX_WINSIZE  64

struct mwifiex_ds_rx_reorder_tbl {
	u16 tid;
	u8 ta[ETH_ALEN];
	u32 start_win;
	u32 win_size;
	u32 buffer[MAX_RX_WINSIZE];
};

struct mwifiex_ds_tx_ba_stream_tbl {
	u16 tid;
	u8 ra[ETH_ALEN];
};

#define DBG_CMD_NUM	5

struct mwifiex_debug_info {
	u32 int_counter;
	u32 packets_out[MAX_NUM_TID];
	u32 max_tx_buf_size;
	u32 tx_buf_size;
	u32 curr_tx_buf_size;
	u32 tx_tbl_num;
	struct mwifiex_ds_tx_ba_stream_tbl
		tx_tbl[MWIFIEX_MAX_TX_BASTREAM_SUPPORTED];
	u32 rx_tbl_num;
	struct mwifiex_ds_rx_reorder_tbl rx_tbl
		[MWIFIEX_MAX_RX_BASTREAM_SUPPORTED];
	u16 ps_mode;
	u32 ps_state;
	u8 is_deep_sleep;
	u8 pm_wakeup_card_req;
	u32 pm_wakeup_fw_try;
	u8 is_hs_configured;
	u8 hs_activated;
	u32 num_cmd_host_to_card_failure;
	u32 num_cmd_sleep_cfm_host_to_card_failure;
	u32 num_tx_host_to_card_failure;
	u32 num_event_deauth;
	u32 num_event_disassoc;
	u32 num_event_link_lost;
	u32 num_cmd_deauth;
	u32 num_cmd_assoc_success;
	u32 num_cmd_assoc_failure;
	u32 num_tx_timeout;
	u32 num_cmd_timeout;
	u16 timeout_cmd_id;
	u16 timeout_cmd_act;
	u16 last_cmd_id[DBG_CMD_NUM];
	u16 last_cmd_act[DBG_CMD_NUM];
	u16 last_cmd_index;
	u16 last_cmd_resp_id[DBG_CMD_NUM];
	u16 last_cmd_resp_index;
	u16 last_event[DBG_CMD_NUM];
	u16 last_event_index;
	u8 data_sent;
	u8 cmd_sent;
	u8 cmd_resp_received;
	u8 event_received;
};

#define MWIFIEX_KEY_INDEX_UNICAST	0x40000000
#define WAPI_RXPN_LEN			16

struct mwifiex_ds_encrypt_key {
	u32 key_disable;
	u32 key_index;
	u32 key_len;
	u8 key_material[WLAN_MAX_KEY_LEN];
	u8 mac_addr[ETH_ALEN];
	u32 is_wapi_key;
	u8 wapi_rxpn[WAPI_RXPN_LEN];
};

struct mwifiex_rate_cfg {
	u32 action;
	u32 is_rate_auto;
	u32 rate;
};

struct mwifiex_power_cfg {
	u32 is_power_auto;
	u32 power_level;
};

struct mwifiex_ds_hs_cfg {
	u32 is_invoke_hostcmd;
	/*  Bit0: non-unicast data
	 *  Bit1: unicast data
	 *  Bit2: mac events
	 *  Bit3: magic packet
	 */
	u32 conditions;
	u32 gpio;
	u32 gap;
};

#define DEEP_SLEEP_ON  1
#define DEEP_SLEEP_OFF 0
#define DEEP_SLEEP_IDLE_TIME	100
#define PS_MODE_AUTO		1

struct mwifiex_ds_auto_ds {
	u16 auto_ds;
	u16 idle_time;
};

struct mwifiex_ds_pm_cfg {
	union {
		u32 ps_mode;
		struct mwifiex_ds_hs_cfg hs_cfg;
		struct mwifiex_ds_auto_ds auto_deep_sleep;
		u32 sleep_period;
	} param;
};

struct mwifiex_ds_11n_tx_cfg {
	u16 tx_htcap;
	u16 tx_htinfo;
};

struct mwifiex_ds_11n_amsdu_aggr_ctrl {
	u16 enable;
	u16 curr_buf_size;
};

#define MWIFIEX_NUM_OF_CMD_BUFFER	20
#define MWIFIEX_SIZE_OF_CMD_BUFFER	2048

enum {
	MWIFIEX_IE_TYPE_GEN_IE = 0,
	MWIFIEX_IE_TYPE_ARP_FILTER,
};

enum {
	MWIFIEX_REG_MAC = 1,
	MWIFIEX_REG_BBP,
	MWIFIEX_REG_RF,
	MWIFIEX_REG_PMIC,
	MWIFIEX_REG_CAU,
};

struct mwifiex_ds_reg_rw {
	__le32 type;
	__le32 offset;
	__le32 value;
};

#define MAX_EEPROM_DATA 256

struct mwifiex_ds_read_eeprom {
	__le16 offset;
	__le16 byte_count;
	u8 value[MAX_EEPROM_DATA];
};

#define IEEE_MAX_IE_SIZE		256

struct mwifiex_ds_misc_gen_ie {
	u32 type;
	u32 len;
	u8 ie_data[IEEE_MAX_IE_SIZE];
};

struct mwifiex_ds_misc_cmd {
	u32 len;
	u8 cmd[MWIFIEX_SIZE_OF_CMD_BUFFER];
};

#define MWIFIEX_MAX_VSIE_LEN       (256)
#define MWIFIEX_MAX_VSIE_NUM       (8)
#define MWIFIEX_VSIE_MASK_SCAN     0x01
#define MWIFIEX_VSIE_MASK_ASSOC    0x02
#define MWIFIEX_VSIE_MASK_ADHOC    0x04

enum {
	MWIFIEX_FUNC_INIT = 1,
	MWIFIEX_FUNC_SHUTDOWN,
};

#endif /* !_MWIFIEX_IOCTL_H_ */
Commit	Line	Data
5e6e3a92 BZ	1	/*
	2	* Marvell Wireless LAN device driver: ioctl data structures & APIs
	3	*
	4	* Copyright (C) 2011, Marvell International Ltd.
	5	*
	6	* This software file (the "File") is distributed by Marvell International
	7	* Ltd. under the terms of the GNU General Public License Version 2, June 1991
	8	* (the "License"). You may use, redistribute and/or modify this File in
	9	* accordance with the terms and conditions of the License, a copy of which
	10	* is available by writing to the Free Software Foundation, Inc.,
	11	* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the
	12	* worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt.
	13	*
	14	* THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE
	15	* IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE
	16	* ARE EXPRESSLY DISCLAIMED. The License provides additional details about
	17	* this warranty disclaimer.
	18	*/
	19
	20	#ifndef _MWIFIEX_IOCTL_H_
	21	#define _MWIFIEX_IOCTL_H_
	22
	23	#include <net/mac80211.h>
	24
5e6e3a92 BZ	25	enum {
	26	MWIFIEX_SCAN_TYPE_UNCHANGED = 0,
	27	MWIFIEX_SCAN_TYPE_ACTIVE,
	28	MWIFIEX_SCAN_TYPE_PASSIVE
	29	};
	30
5e6e3a92 BZ	31	struct mwifiex_user_scan {
	32	u32 scan_cfg_len;
	33	u8 scan_cfg_buf[1];
	34	};
	35
5e6e3a92 BZ	36	#define MWIFIEX_PROMISC_MODE 1
	37	#define MWIFIEX_MULTICAST_MODE 2
	38	#define MWIFIEX_ALL_MULTI_MODE 4
	39	#define MWIFIEX_MAX_MULTICAST_LIST_SIZE 32
	40
	41	struct mwifiex_multicast_list {
	42	u32 mode;
	43	u32 num_multicast_addr;
	44	u8 mac_list[MWIFIEX_MAX_MULTICAST_LIST_SIZE][ETH_ALEN];
	45	};
	46
5e6e3a92 BZ	47	struct mwifiex_chan_freq {
	48	u32 channel;
	49	u32 freq;
	50	};
	51
5e6e3a92 BZ	52	struct mwifiex_ssid_bssid {
	53	struct mwifiex_802_11_ssid ssid;
	54	u8 bssid[ETH_ALEN];
	55	};
	56
	57	enum {
	58	BAND_B = 1,
	59	BAND_G = 2,
	60	BAND_A = 4,
	61	BAND_GN = 8,
	62	BAND_AN = 16,
	63	};
	64
5e6e3a92 BZ	65	enum {
	66	ADHOC_IDLE,
	67	ADHOC_STARTED,
	68	ADHOC_JOINED,
	69	ADHOC_COALESCED
	70	};
	71
	72	struct mwifiex_ds_get_stats {
	73	u32 mcast_tx_frame;
	74	u32 failed;
	75	u32 retry;
	76	u32 multi_retry;
	77	u32 frame_dup;
	78	u32 rts_success;
	79	u32 rts_failure;
	80	u32 ack_failure;
	81	u32 rx_frag;
	82	u32 mcast_rx_frame;
	83	u32 fcs_error;
	84	u32 tx_frame;
	85	u32 wep_icv_error[4];
	86	};
	87
5e6e3a92	88	#define BCN_RSSI_AVG_MASK 0x00000002
5e6e3a92	89	#define BCN_NF_AVG_MASK 0x00000200
5e6e3a92 BZ	90	#define ALL_RSSI_INFO_MASK 0x00000fff
	91
	92	struct mwifiex_ds_get_signal {
	93	/*
	94	* Bit0: Last Beacon RSSI, Bit1: Average Beacon RSSI,
	95	* Bit2: Last Data RSSI, Bit3: Average Data RSSI,
	96	* Bit4: Last Beacon SNR, Bit5: Average Beacon SNR,
	97	* Bit6: Last Data SNR, Bit7: Average Data SNR,
	98	* Bit8: Last Beacon NF, Bit9: Average Beacon NF,
	99	* Bit10: Last Data NF, Bit11: Average Data NF
	100	*/
	101	u16 selector;
	102	s16 bcn_rssi_last;
	103	s16 bcn_rssi_avg;
	104	s16 data_rssi_last;
	105	s16 data_rssi_avg;
	106	s16 bcn_snr_last;
	107	s16 bcn_snr_avg;
	108	s16 data_snr_last;
	109	s16 data_snr_avg;
	110	s16 bcn_nf_last;
	111	s16 bcn_nf_avg;
	112	s16 data_nf_last;
	113	s16 data_nf_avg;
	114	};
	115
5e6e3a92 BZ	116	#define MWIFIEX_MAX_VER_STR_LEN 128
	117
	118	struct mwifiex_ver_ext {
	119	u32 version_str_sel;
	120	char version_str[MWIFIEX_MAX_VER_STR_LEN];
	121	};
	122
	123	struct mwifiex_bss_info {
	124	u32 bss_mode;
	125	struct mwifiex_802_11_ssid ssid;
5e6e3a92 BZ	126	u32 bss_chan;
	127	u32 region_code;
	128	u32 media_connected;
5e6e3a92 BZ	129	u32 max_power_level;
	130	u32 min_power_level;
	131	u32 adhoc_state;
	132	signed int bcn_nf_last;
	133	u32 wep_status;
	134	u32 is_hs_configured;
	135	u32 is_deep_sleep;
	136	u8 bssid[ETH_ALEN];
	137	};
	138
	139	#define MAX_NUM_TID 8
	140
	141	#define MAX_RX_WINSIZE 64
	142
	143	struct mwifiex_ds_rx_reorder_tbl {
	144	u16 tid;
	145	u8 ta[ETH_ALEN];
	146	u32 start_win;
	147	u32 win_size;
	148	u32 buffer[MAX_RX_WINSIZE];
	149	};
	150
	151	struct mwifiex_ds_tx_ba_stream_tbl {
	152	u16 tid;
	153	u8 ra[ETH_ALEN];
	154	};
	155
	156	#define DBG_CMD_NUM 5
	157
	158	struct mwifiex_debug_info {
	159	u32 int_counter;
	160	u32 packets_out[MAX_NUM_TID];
	161	u32 max_tx_buf_size;
	162	u32 tx_buf_size;
	163	u32 curr_tx_buf_size;
	164	u32 tx_tbl_num;
	165	struct mwifiex_ds_tx_ba_stream_tbl
	166	tx_tbl[MWIFIEX_MAX_TX_BASTREAM_SUPPORTED];
	167	u32 rx_tbl_num;
	168	struct mwifiex_ds_rx_reorder_tbl rx_tbl
	169	[MWIFIEX_MAX_RX_BASTREAM_SUPPORTED];
	170	u16 ps_mode;
	171	u32 ps_state;
	172	u8 is_deep_sleep;
	173	u8 pm_wakeup_card_req;
	174	u32 pm_wakeup_fw_try;
	175	u8 is_hs_configured;
	176	u8 hs_activated;
	177	u32 num_cmd_host_to_card_failure;
	178	u32 num_cmd_sleep_cfm_host_to_card_failure;
	179	u32 num_tx_host_to_card_failure;
	180	u32 num_event_deauth;
	181	u32 num_event_disassoc;
	182	u32 num_event_link_lost;
	183	u32 num_cmd_deauth;
	184	u32 num_cmd_assoc_success;
	185	u32 num_cmd_assoc_failure;
	186	u32 num_tx_timeout;
	187	u32 num_cmd_timeout;
	188	u16 timeout_cmd_id;
	189	u16 timeout_cmd_act;
	190	u16 last_cmd_id[DBG_CMD_NUM];
	191	u16 last_cmd_act[DBG_CMD_NUM];
	192	u16 last_cmd_index;
193	u16 last_cmd_resp_id[DBG_CMD_NUM];
194	u16 last_cmd_resp_index;
195	u16 last_event[DBG_CMD_NUM];
196	u16 last_event_index;
197	u8 data_sent;
198	u8 cmd_sent;
199	u8 cmd_resp_received;
200	u8 event_received;
201	};
202
5e6e3a92	203	#define MWIFIEX_KEY_INDEX_UNICAST 0x40000000
5e6e3a92 BZ	204	#define WAPI_RXPN_LEN 16
	205
	206	struct mwifiex_ds_encrypt_key {
	207	u32 key_disable;
	208	u32 key_index;
	209	u32 key_len;
a3731658	210	u8 key_material[WLAN_MAX_KEY_LEN];
5e6e3a92 BZ	211	u8 mac_addr[ETH_ALEN];
	212	u32 is_wapi_key;
	213	u8 wapi_rxpn[WAPI_RXPN_LEN];
	214	};
	215
	216	struct mwifiex_rate_cfg {
	217	u32 action;
	218	u32 is_rate_auto;
	219	u32 rate;
	220	};
	221
5e6e3a92 BZ	222	struct mwifiex_power_cfg {
	223	u32 is_power_auto;
	224	u32 power_level;
	225	};
	226
	227	struct mwifiex_ds_hs_cfg {
	228	u32 is_invoke_hostcmd;
	229	/* Bit0: non-unicast data
	230	* Bit1: unicast data
	231	* Bit2: mac events
	232	* Bit3: magic packet
	233	*/
	234	u32 conditions;
	235	u32 gpio;
	236	u32 gap;
	237	};
	238
	239	#define DEEP_SLEEP_ON 1
a0490936	240	#define DEEP_SLEEP_OFF 0
5e6e3a92	241	#define DEEP_SLEEP_IDLE_TIME 100
a8c48565	242	#define PS_MODE_AUTO 1
5e6e3a92 BZ	243
	244	struct mwifiex_ds_auto_ds {
	245	u16 auto_ds;
	246	u16 idle_time;
	247	};
	248
5e6e3a92 BZ	249	struct mwifiex_ds_pm_cfg {
	250	union {
	251	u32 ps_mode;
	252	struct mwifiex_ds_hs_cfg hs_cfg;
	253	struct mwifiex_ds_auto_ds auto_deep_sleep;
	254	u32 sleep_period;
	255	} param;
	256	};
	257
5e6e3a92 BZ	258	struct mwifiex_ds_11n_tx_cfg {
	259	u16 tx_htcap;
	260	u16 tx_htinfo;
	261	};
	262
	263	struct mwifiex_ds_11n_amsdu_aggr_ctrl {
	264	u16 enable;
	265	u16 curr_buf_size;
	266	};
	267
	268	#define MWIFIEX_NUM_OF_CMD_BUFFER 20
	269	#define MWIFIEX_SIZE_OF_CMD_BUFFER 2048
	270
	271	enum {
	272	MWIFIEX_IE_TYPE_GEN_IE = 0,
	273	MWIFIEX_IE_TYPE_ARP_FILTER,
	274	};
	275
	276	enum {
	277	MWIFIEX_REG_MAC = 1,
	278	MWIFIEX_REG_BBP,
	279	MWIFIEX_REG_RF,
	280	MWIFIEX_REG_PMIC,
	281	MWIFIEX_REG_CAU,
	282	};
	283
	284	struct mwifiex_ds_reg_rw {
	285	__le32 type;
	286	__le32 offset;
	287	__le32 value;
	288	};
	289
	290	#define MAX_EEPROM_DATA 256
	291
	292	struct mwifiex_ds_read_eeprom {
	293	__le16 offset;
	294	__le16 byte_count;
	295	u8 value[MAX_EEPROM_DATA];
	296	};
	297
67a50035 BZ	298	#define IEEE_MAX_IE_SIZE 256
67a50035 BZ	299
5e6e3a92 BZ	300	struct mwifiex_ds_misc_gen_ie {
	301	u32 type;
	302	u32 len;
67a50035	303	u8 ie_data[IEEE_MAX_IE_SIZE];
5e6e3a92 BZ	304	};
	305
	306	struct mwifiex_ds_misc_cmd {
	307	u32 len;
	308	u8 cmd[MWIFIEX_SIZE_OF_CMD_BUFFER];
	309	};
	310
	311	#define MWIFIEX_MAX_VSIE_LEN (256)
	312	#define MWIFIEX_MAX_VSIE_NUM (8)
	313	#define MWIFIEX_VSIE_MASK_SCAN 0x01
	314	#define MWIFIEX_VSIE_MASK_ASSOC 0x02
	315	#define MWIFIEX_VSIE_MASK_ADHOC 0x04
	316
	317	enum {
	318	MWIFIEX_FUNC_INIT = 1,
	319	MWIFIEX_FUNC_SHUTDOWN,
	320	};
	321
	322	#endif /* !_MWIFIEX_IOCTL_H_ */