brcmfmac: remove unnecessary EXPORT_SYMBOL() usage
[deliverable/linux.git] / drivers / net / wireless / mwifiex / pcie.c
CommitLineData
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1/*
2 * Marvell Wireless LAN device driver: PCIE specific handling
3 *
4 * Copyright (C) 2011, Marvell International Ltd.
5 *
6 * This software file (the "File") is distributed by Marvell International
7 * Ltd. under the terms of the GNU General Public License Version 2, June 1991
8 * (the "License"). You may use, redistribute and/or modify this File in
9 * accordance with the terms and conditions of the License, a copy of which
10 * is available by writing to the Free Software Foundation, Inc.,
11 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the
12 * worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt.
13 *
14 * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE
15 * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE
16 * ARE EXPRESSLY DISCLAIMED. The License provides additional details about
17 * this warranty disclaimer.
18 */
19
20#include <linux/firmware.h>
21
22#include "decl.h"
23#include "ioctl.h"
24#include "util.h"
25#include "fw.h"
26#include "main.h"
27#include "wmm.h"
28#include "11n.h"
29#include "pcie.h"
30
31#define PCIE_VERSION "1.0"
32#define DRV_NAME "Marvell mwifiex PCIe"
33
34static u8 user_rmmod;
35
36static struct mwifiex_if_ops pcie_ops;
37
38static struct semaphore add_remove_card_sem;
d930faee 39
fc331460
AP
40static int
41mwifiex_map_pci_memory(struct mwifiex_adapter *adapter, struct sk_buff *skb,
42 int size, int flags)
d930faee 43{
fc331460
AP
44 struct pcie_service_card *card = adapter->card;
45 dma_addr_t buf_pa;
d930faee 46
fc331460
AP
47 buf_pa = pci_map_single(card->dev, skb->data, size, flags);
48 if (pci_dma_mapping_error(card->dev, buf_pa)) {
49 dev_err(adapter->dev, "failed to map pci memory!\n");
50 return -1;
51 }
52 memcpy(skb->cb, &buf_pa, sizeof(dma_addr_t));
53 return 0;
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54}
55
56/*
57 * This function reads sleep cookie and checks if FW is ready
58 */
59static bool mwifiex_pcie_ok_to_access_hw(struct mwifiex_adapter *adapter)
60{
61 u32 *cookie_addr;
62 struct pcie_service_card *card = adapter->card;
52301a81
AP
63 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
64
65 if (!reg->sleep_cookie)
66 return true;
d930faee 67
fc331460
AP
68 if (card->sleep_cookie_vbase) {
69 cookie_addr = (u32 *)card->sleep_cookie_vbase;
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70 dev_dbg(adapter->dev, "info: ACCESS_HW: sleep cookie=0x%x\n",
71 *cookie_addr);
72 if (*cookie_addr == FW_AWAKE_COOKIE)
73 return true;
74 }
75
76 return false;
77}
78
3266d732 79#ifdef CONFIG_PM_SLEEP
fcca8d5a
BZ
80/*
81 * Kernel needs to suspend all functions separately. Therefore all
82 * registered functions must have drivers with suspend and resume
83 * methods. Failing that the kernel simply removes the whole card.
84 *
85 * If already not suspended, this function allocates and sends a host
86 * sleep activate request to the firmware and turns off the traffic.
87 */
3266d732 88static int mwifiex_pcie_suspend(struct device *dev)
fcca8d5a
BZ
89{
90 struct mwifiex_adapter *adapter;
91 struct pcie_service_card *card;
92 int hs_actived;
3266d732 93 struct pci_dev *pdev = to_pci_dev(dev);
fcca8d5a
BZ
94
95 if (pdev) {
b2a31204 96 card = pci_get_drvdata(pdev);
fcca8d5a
BZ
97 if (!card || !card->adapter) {
98 pr_err("Card or adapter structure is not valid\n");
99 return 0;
100 }
101 } else {
102 pr_err("PCIE device is not specified\n");
103 return 0;
104 }
105
106 adapter = card->adapter;
107
108 hs_actived = mwifiex_enable_hs(adapter);
109
110 /* Indicate device suspended */
111 adapter->is_suspended = true;
112
113 return 0;
114}
115
116/*
117 * Kernel needs to suspend all functions separately. Therefore all
118 * registered functions must have drivers with suspend and resume
119 * methods. Failing that the kernel simply removes the whole card.
120 *
121 * If already not resumed, this function turns on the traffic and
122 * sends a host sleep cancel request to the firmware.
123 */
3266d732 124static int mwifiex_pcie_resume(struct device *dev)
fcca8d5a
BZ
125{
126 struct mwifiex_adapter *adapter;
127 struct pcie_service_card *card;
3266d732 128 struct pci_dev *pdev = to_pci_dev(dev);
fcca8d5a
BZ
129
130 if (pdev) {
b2a31204 131 card = pci_get_drvdata(pdev);
fcca8d5a
BZ
132 if (!card || !card->adapter) {
133 pr_err("Card or adapter structure is not valid\n");
134 return 0;
135 }
136 } else {
137 pr_err("PCIE device is not specified\n");
138 return 0;
139 }
140
141 adapter = card->adapter;
142
143 if (!adapter->is_suspended) {
144 dev_warn(adapter->dev, "Device already resumed\n");
145 return 0;
146 }
147
148 adapter->is_suspended = false;
149
150 mwifiex_cancel_hs(mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_STA),
151 MWIFIEX_ASYNC_CMD);
152
153 return 0;
154}
8509e820 155#endif
fcca8d5a 156
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157/*
158 * This function probes an mwifiex device and registers it. It allocates
159 * the card structure, enables PCIE function number and initiates the
160 * device registration and initialization procedure by adding a logical
161 * interface.
162 */
163static int mwifiex_pcie_probe(struct pci_dev *pdev,
164 const struct pci_device_id *ent)
165{
166 struct pcie_service_card *card;
167
168 pr_debug("info: vendor=0x%4.04X device=0x%4.04X rev=%d\n",
f57c1edc 169 pdev->vendor, pdev->device, pdev->revision);
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170
171 card = kzalloc(sizeof(struct pcie_service_card), GFP_KERNEL);
e404decb 172 if (!card)
d930faee 173 return -ENOMEM;
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174
175 card->dev = pdev;
176
dd04e6ac
AP
177 if (ent->driver_data) {
178 struct mwifiex_pcie_device *data = (void *)ent->driver_data;
179 card->pcie.firmware = data->firmware;
180 card->pcie.reg = data->reg;
181 card->pcie.blksz_fw_dl = data->blksz_fw_dl;
182 }
183
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184 if (mwifiex_add_card(card, &add_remove_card_sem, &pcie_ops,
185 MWIFIEX_PCIE)) {
186 pr_err("%s failed\n", __func__);
187 kfree(card);
188 return -1;
189 }
190
191 return 0;
192}
193
194/*
195 * This function removes the interface and frees up the card structure.
196 */
197static void mwifiex_pcie_remove(struct pci_dev *pdev)
198{
199 struct pcie_service_card *card;
200 struct mwifiex_adapter *adapter;
f57c1edc 201 struct mwifiex_private *priv;
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202 int i;
203
204 card = pci_get_drvdata(pdev);
205 if (!card)
206 return;
207
208 adapter = card->adapter;
209 if (!adapter || !adapter->priv_num)
210 return;
211
59a4cc25
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212 /* In case driver is removed when asynchronous FW load is in progress */
213 wait_for_completion(&adapter->fw_load);
214
d930faee 215 if (user_rmmod) {
3266d732 216#ifdef CONFIG_PM_SLEEP
d930faee 217 if (adapter->is_suspended)
3266d732 218 mwifiex_pcie_resume(&pdev->dev);
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219#endif
220
221 for (i = 0; i < adapter->priv_num; i++)
222 if ((GET_BSS_ROLE(adapter->priv[i]) ==
f57c1edc
YAP
223 MWIFIEX_BSS_ROLE_STA) &&
224 adapter->priv[i]->media_connected)
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225 mwifiex_deauthenticate(adapter->priv[i], NULL);
226
f57c1edc 227 priv = mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_ANY);
d930faee 228
f57c1edc
YAP
229 mwifiex_disable_auto_ds(priv);
230
231 mwifiex_init_shutdown_fw(priv, MWIFIEX_FUNC_SHUTDOWN);
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232 }
233
234 mwifiex_remove_card(card->adapter, &add_remove_card_sem);
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235}
236
43ba6b9f
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237static void mwifiex_pcie_shutdown(struct pci_dev *pdev)
238{
239 user_rmmod = 1;
240 mwifiex_pcie_remove(pdev);
241
242 return;
243}
244
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245static DEFINE_PCI_DEVICE_TABLE(mwifiex_ids) = {
246 {
247 PCIE_VENDOR_ID_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8766P,
248 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
dd04e6ac 249 .driver_data = (unsigned long) &mwifiex_pcie8766,
d930faee 250 },
ca8f2112
AP
251 {
252 PCIE_VENDOR_ID_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8897,
253 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
254 .driver_data = (unsigned long) &mwifiex_pcie8897,
255 },
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256 {},
257};
258
259MODULE_DEVICE_TABLE(pci, mwifiex_ids);
260
3266d732
SK
261#ifdef CONFIG_PM_SLEEP
262/* Power Management Hooks */
263static SIMPLE_DEV_PM_OPS(mwifiex_pcie_pm_ops, mwifiex_pcie_suspend,
264 mwifiex_pcie_resume);
265#endif
266
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267/* PCI Device Driver */
268static struct pci_driver __refdata mwifiex_pcie = {
269 .name = "mwifiex_pcie",
270 .id_table = mwifiex_ids,
271 .probe = mwifiex_pcie_probe,
272 .remove = mwifiex_pcie_remove,
3266d732
SK
273#ifdef CONFIG_PM_SLEEP
274 .driver = {
275 .pm = &mwifiex_pcie_pm_ops,
276 },
d930faee 277#endif
43ba6b9f 278 .shutdown = mwifiex_pcie_shutdown,
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279};
280
281/*
282 * This function writes data into PCIE card register.
283 */
284static int mwifiex_write_reg(struct mwifiex_adapter *adapter, int reg, u32 data)
285{
286 struct pcie_service_card *card = adapter->card;
287
288 iowrite32(data, card->pci_mmap1 + reg);
289
290 return 0;
291}
292
293/*
294 * This function reads data from PCIE card register.
295 */
296static int mwifiex_read_reg(struct mwifiex_adapter *adapter, int reg, u32 *data)
297{
298 struct pcie_service_card *card = adapter->card;
299
300 *data = ioread32(card->pci_mmap1 + reg);
301
302 return 0;
303}
304
305/*
c0880a29 306 * This function adds delay loop to ensure FW is awake before proceeding.
d930faee 307 */
c0880a29 308static void mwifiex_pcie_dev_wakeup_delay(struct mwifiex_adapter *adapter)
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309{
310 int i = 0;
311
c0880a29 312 while (mwifiex_pcie_ok_to_access_hw(adapter)) {
d930faee 313 i++;
e7891ba2 314 usleep_range(10, 20);
d930faee 315 /* 50ms max wait */
3e7a4ff7 316 if (i == 5000)
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317 break;
318 }
319
c0880a29
AP
320 return;
321}
322
323/* This function wakes up the card by reading fw_status register. */
324static int mwifiex_pm_wakeup_card(struct mwifiex_adapter *adapter)
325{
326 u32 fw_status;
327 struct pcie_service_card *card = adapter->card;
328 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
329
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330 dev_dbg(adapter->dev, "event: Wakeup device...\n");
331
c0880a29
AP
332 if (reg->sleep_cookie)
333 mwifiex_pcie_dev_wakeup_delay(adapter);
334
335 /* Reading fw_status register will wakeup device */
336 if (mwifiex_read_reg(adapter, reg->fw_status, &fw_status)) {
337 dev_warn(adapter->dev, "Reading fw_status register failed\n");
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338 return -1;
339 }
340
c0880a29
AP
341 if (reg->sleep_cookie) {
342 mwifiex_pcie_dev_wakeup_delay(adapter);
343 dev_dbg(adapter->dev, "PCIE wakeup: Setting PS_STATE_AWAKE\n");
344 adapter->ps_state = PS_STATE_AWAKE;
345 }
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346
347 return 0;
348}
349
350/*
351 * This function is called after the card has woken up.
352 *
353 * The card configuration register is reset.
354 */
355static int mwifiex_pm_wakeup_card_complete(struct mwifiex_adapter *adapter)
356{
357 dev_dbg(adapter->dev, "cmd: Wakeup device completed\n");
358
359 return 0;
360}
361
362/*
363 * This function disables the host interrupt.
364 *
365 * The host interrupt mask is read, the disable bit is reset and
366 * written back to the card host interrupt mask register.
367 */
368static int mwifiex_pcie_disable_host_int(struct mwifiex_adapter *adapter)
369{
370 if (mwifiex_pcie_ok_to_access_hw(adapter)) {
371 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_MASK,
372 0x00000000)) {
373 dev_warn(adapter->dev, "Disable host interrupt failed\n");
374 return -1;
375 }
376 }
377
378 return 0;
379}
380
381/*
382 * This function enables the host interrupt.
383 *
384 * The host interrupt enable mask is written to the card
385 * host interrupt mask register.
386 */
387static int mwifiex_pcie_enable_host_int(struct mwifiex_adapter *adapter)
388{
389 if (mwifiex_pcie_ok_to_access_hw(adapter)) {
390 /* Simply write the mask to the register */
391 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_MASK,
392 HOST_INTR_MASK)) {
393 dev_warn(adapter->dev, "Enable host interrupt failed\n");
394 return -1;
395 }
396 }
397
398 return 0;
399}
400
401/*
0732484b
AP
402 * This function initializes TX buffer ring descriptors
403 */
404static int mwifiex_init_txq_ring(struct mwifiex_adapter *adapter)
405{
406 struct pcie_service_card *card = adapter->card;
ca8f2112 407 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
0732484b 408 struct mwifiex_pcie_buf_desc *desc;
ca8f2112 409 struct mwifiex_pfu_buf_desc *desc2;
0732484b
AP
410 int i;
411
412 for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) {
413 card->tx_buf_list[i] = NULL;
ca8f2112
AP
414 if (reg->pfu_enabled) {
415 card->txbd_ring[i] = (void *)card->txbd_ring_vbase +
416 (sizeof(*desc2) * i);
417 desc2 = card->txbd_ring[i];
418 memset(desc2, 0, sizeof(*desc2));
419 } else {
420 card->txbd_ring[i] = (void *)card->txbd_ring_vbase +
421 (sizeof(*desc) * i);
422 desc = card->txbd_ring[i];
423 memset(desc, 0, sizeof(*desc));
424 }
0732484b
AP
425 }
426
427 return 0;
428}
429
430/* This function initializes RX buffer ring descriptors. Each SKB is allocated
431 * here and after mapping PCI memory, its physical address is assigned to
432 * PCIE Rx buffer descriptor's physical address.
433 */
434static int mwifiex_init_rxq_ring(struct mwifiex_adapter *adapter)
435{
436 struct pcie_service_card *card = adapter->card;
ca8f2112 437 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
0732484b
AP
438 struct sk_buff *skb;
439 struct mwifiex_pcie_buf_desc *desc;
ca8f2112 440 struct mwifiex_pfu_buf_desc *desc2;
0732484b
AP
441 dma_addr_t buf_pa;
442 int i;
443
444 for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) {
445 /* Allocate skb here so that firmware can DMA data from it */
446 skb = dev_alloc_skb(MWIFIEX_RX_DATA_BUF_SIZE);
447 if (!skb) {
448 dev_err(adapter->dev,
449 "Unable to allocate skb for RX ring.\n");
450 kfree(card->rxbd_ring_vbase);
451 return -ENOMEM;
452 }
453
454 if (mwifiex_map_pci_memory(adapter, skb,
455 MWIFIEX_RX_DATA_BUF_SIZE,
456 PCI_DMA_FROMDEVICE))
457 return -1;
458
459 MWIFIEX_SKB_PACB(skb, &buf_pa);
460
461 dev_dbg(adapter->dev,
462 "info: RX ring: skb=%p len=%d data=%p buf_pa=%#x:%x\n",
463 skb, skb->len, skb->data, (u32)buf_pa,
464 (u32)((u64)buf_pa >> 32));
465
466 card->rx_buf_list[i] = skb;
ca8f2112
AP
467 if (reg->pfu_enabled) {
468 card->rxbd_ring[i] = (void *)card->rxbd_ring_vbase +
469 (sizeof(*desc2) * i);
470 desc2 = card->rxbd_ring[i];
471 desc2->paddr = buf_pa;
472 desc2->len = (u16)skb->len;
473 desc2->frag_len = (u16)skb->len;
474 desc2->flags = reg->ring_flag_eop | reg->ring_flag_sop;
475 desc2->offset = 0;
476 } else {
477 card->rxbd_ring[i] = (void *)(card->rxbd_ring_vbase +
478 (sizeof(*desc) * i));
479 desc = card->rxbd_ring[i];
480 desc->paddr = buf_pa;
481 desc->len = (u16)skb->len;
482 desc->flags = 0;
483 }
0732484b
AP
484 }
485
486 return 0;
487}
488
489/* This function initializes event buffer ring descriptors. Each SKB is
490 * allocated here and after mapping PCI memory, its physical address is assigned
491 * to PCIE Rx buffer descriptor's physical address
492 */
493static int mwifiex_pcie_init_evt_ring(struct mwifiex_adapter *adapter)
494{
495 struct pcie_service_card *card = adapter->card;
e05dc3e9 496 struct mwifiex_evt_buf_desc *desc;
0732484b
AP
497 struct sk_buff *skb;
498 dma_addr_t buf_pa;
499 int i;
500
501 for (i = 0; i < MWIFIEX_MAX_EVT_BD; i++) {
502 /* Allocate skb here so that firmware can DMA data from it */
503 skb = dev_alloc_skb(MAX_EVENT_SIZE);
504 if (!skb) {
505 dev_err(adapter->dev,
506 "Unable to allocate skb for EVENT buf.\n");
507 kfree(card->evtbd_ring_vbase);
508 return -ENOMEM;
509 }
510 skb_put(skb, MAX_EVENT_SIZE);
511
512 if (mwifiex_map_pci_memory(adapter, skb, MAX_EVENT_SIZE,
513 PCI_DMA_FROMDEVICE))
514 return -1;
515
516 MWIFIEX_SKB_PACB(skb, &buf_pa);
517
518 dev_dbg(adapter->dev,
519 "info: EVT ring: skb=%p len=%d data=%p buf_pa=%#x:%x\n",
520 skb, skb->len, skb->data, (u32)buf_pa,
521 (u32)((u64)buf_pa >> 32));
522
523 card->evt_buf_list[i] = skb;
524 card->evtbd_ring[i] = (void *)(card->evtbd_ring_vbase +
525 (sizeof(*desc) * i));
0732484b
AP
526 desc = card->evtbd_ring[i];
527 desc->paddr = buf_pa;
528 desc->len = (u16)skb->len;
529 desc->flags = 0;
530 }
531
532 return 0;
533}
534
535/* This function cleans up TX buffer rings. If any of the buffer list has valid
536 * SKB address, associated SKB is freed.
537 */
538static void mwifiex_cleanup_txq_ring(struct mwifiex_adapter *adapter)
539{
540 struct pcie_service_card *card = adapter->card;
ca8f2112 541 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
0732484b
AP
542 struct sk_buff *skb;
543 struct mwifiex_pcie_buf_desc *desc;
ca8f2112 544 struct mwifiex_pfu_buf_desc *desc2;
0732484b
AP
545 int i;
546
547 for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) {
ca8f2112
AP
548 if (reg->pfu_enabled) {
549 desc2 = card->txbd_ring[i];
550 if (card->tx_buf_list[i]) {
551 skb = card->tx_buf_list[i];
552 pci_unmap_single(card->dev, desc2->paddr,
553 skb->len, PCI_DMA_TODEVICE);
554 dev_kfree_skb_any(skb);
555 }
556 memset(desc2, 0, sizeof(*desc2));
557 } else {
558 desc = card->txbd_ring[i];
559 if (card->tx_buf_list[i]) {
560 skb = card->tx_buf_list[i];
561 pci_unmap_single(card->dev, desc->paddr,
562 skb->len, PCI_DMA_TODEVICE);
563 dev_kfree_skb_any(skb);
564 }
565 memset(desc, 0, sizeof(*desc));
0732484b
AP
566 }
567 card->tx_buf_list[i] = NULL;
0732484b
AP
568 }
569
570 return;
571}
572
573/* This function cleans up RX buffer rings. If any of the buffer list has valid
574 * SKB address, associated SKB is freed.
575 */
576static void mwifiex_cleanup_rxq_ring(struct mwifiex_adapter *adapter)
577{
578 struct pcie_service_card *card = adapter->card;
ca8f2112 579 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
0732484b 580 struct mwifiex_pcie_buf_desc *desc;
ca8f2112 581 struct mwifiex_pfu_buf_desc *desc2;
0732484b
AP
582 struct sk_buff *skb;
583 int i;
584
585 for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) {
ca8f2112
AP
586 if (reg->pfu_enabled) {
587 desc2 = card->rxbd_ring[i];
588 if (card->rx_buf_list[i]) {
589 skb = card->rx_buf_list[i];
590 pci_unmap_single(card->dev, desc2->paddr,
d033d3a6 591 skb->len, PCI_DMA_FROMDEVICE);
ca8f2112
AP
592 dev_kfree_skb_any(skb);
593 }
594 memset(desc2, 0, sizeof(*desc2));
595 } else {
596 desc = card->rxbd_ring[i];
597 if (card->rx_buf_list[i]) {
598 skb = card->rx_buf_list[i];
599 pci_unmap_single(card->dev, desc->paddr,
d033d3a6 600 skb->len, PCI_DMA_FROMDEVICE);
ca8f2112
AP
601 dev_kfree_skb_any(skb);
602 }
603 memset(desc, 0, sizeof(*desc));
0732484b 604 }
ca8f2112 605 card->rx_buf_list[i] = NULL;
0732484b
AP
606 }
607
608 return;
609}
610
611/* This function cleans up event buffer rings. If any of the buffer list has
612 * valid SKB address, associated SKB is freed.
613 */
614static void mwifiex_cleanup_evt_ring(struct mwifiex_adapter *adapter)
615{
616 struct pcie_service_card *card = adapter->card;
e05dc3e9 617 struct mwifiex_evt_buf_desc *desc;
0732484b
AP
618 struct sk_buff *skb;
619 int i;
620
621 for (i = 0; i < MWIFIEX_MAX_EVT_BD; i++) {
622 desc = card->evtbd_ring[i];
623 if (card->evt_buf_list[i]) {
624 skb = card->evt_buf_list[i];
625 pci_unmap_single(card->dev, desc->paddr, MAX_EVENT_SIZE,
626 PCI_DMA_FROMDEVICE);
627 dev_kfree_skb_any(skb);
628 }
629 card->evt_buf_list[i] = NULL;
630 memset(desc, 0, sizeof(*desc));
631 }
632
633 return;
634}
635
636/* This function creates buffer descriptor ring for TX
d930faee
AK
637 */
638static int mwifiex_pcie_create_txbd_ring(struct mwifiex_adapter *adapter)
639{
640 struct pcie_service_card *card = adapter->card;
dd04e6ac 641 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee
AK
642
643 /*
644 * driver maintaines the write pointer and firmware maintaines the read
645 * pointer. The write pointer starts at 0 (zero) while the read pointer
646 * starts at zero with rollover bit set
647 */
648 card->txbd_wrptr = 0;
ca8f2112
AP
649
650 if (reg->pfu_enabled)
651 card->txbd_rdptr = 0;
652 else
653 card->txbd_rdptr |= reg->tx_rollover_ind;
d930faee
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654
655 /* allocate shared memory for the BD ring and divide the same in to
656 several descriptors */
ca8f2112
AP
657 if (reg->pfu_enabled)
658 card->txbd_ring_size = sizeof(struct mwifiex_pfu_buf_desc) *
659 MWIFIEX_MAX_TXRX_BD;
660 else
661 card->txbd_ring_size = sizeof(struct mwifiex_pcie_buf_desc) *
662 MWIFIEX_MAX_TXRX_BD;
663
d930faee 664 dev_dbg(adapter->dev, "info: txbd_ring: Allocating %d bytes\n",
f57c1edc 665 card->txbd_ring_size);
fc331460
AP
666 card->txbd_ring_vbase = pci_alloc_consistent(card->dev,
667 card->txbd_ring_size,
668 &card->txbd_ring_pbase);
d930faee 669 if (!card->txbd_ring_vbase) {
fc331460
AP
670 dev_err(adapter->dev,
671 "allocate consistent memory (%d bytes) failed!\n",
672 card->txbd_ring_size);
8c53e42d 673 return -ENOMEM;
d930faee 674 }
f57c1edc
YAP
675 dev_dbg(adapter->dev,
676 "info: txbd_ring - base: %p, pbase: %#x:%x, len: %x\n",
fc331460 677 card->txbd_ring_vbase, (unsigned int)card->txbd_ring_pbase,
f57c1edc 678 (u32)((u64)card->txbd_ring_pbase >> 32), card->txbd_ring_size);
d930faee 679
0732484b 680 return mwifiex_init_txq_ring(adapter);
d930faee
AK
681}
682
683static int mwifiex_pcie_delete_txbd_ring(struct mwifiex_adapter *adapter)
684{
685 struct pcie_service_card *card = adapter->card;
dd04e6ac 686 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee 687
0732484b 688 mwifiex_cleanup_txq_ring(adapter);
d930faee 689
fc331460
AP
690 if (card->txbd_ring_vbase)
691 pci_free_consistent(card->dev, card->txbd_ring_size,
692 card->txbd_ring_vbase,
693 card->txbd_ring_pbase);
d930faee
AK
694 card->txbd_ring_size = 0;
695 card->txbd_wrptr = 0;
dd04e6ac 696 card->txbd_rdptr = 0 | reg->tx_rollover_ind;
d930faee 697 card->txbd_ring_vbase = NULL;
fc331460 698 card->txbd_ring_pbase = 0;
d930faee
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699
700 return 0;
701}
702
703/*
704 * This function creates buffer descriptor ring for RX
705 */
706static int mwifiex_pcie_create_rxbd_ring(struct mwifiex_adapter *adapter)
707{
708 struct pcie_service_card *card = adapter->card;
dd04e6ac 709 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee
AK
710
711 /*
712 * driver maintaines the read pointer and firmware maintaines the write
713 * pointer. The write pointer starts at 0 (zero) while the read pointer
714 * starts at zero with rollover bit set
715 */
716 card->rxbd_wrptr = 0;
dd04e6ac 717 card->rxbd_rdptr = reg->rx_rollover_ind;
d930faee 718
ca8f2112
AP
719 if (reg->pfu_enabled)
720 card->rxbd_ring_size = sizeof(struct mwifiex_pfu_buf_desc) *
721 MWIFIEX_MAX_TXRX_BD;
722 else
723 card->rxbd_ring_size = sizeof(struct mwifiex_pcie_buf_desc) *
724 MWIFIEX_MAX_TXRX_BD;
725
d930faee 726 dev_dbg(adapter->dev, "info: rxbd_ring: Allocating %d bytes\n",
f57c1edc 727 card->rxbd_ring_size);
fc331460
AP
728 card->rxbd_ring_vbase = pci_alloc_consistent(card->dev,
729 card->rxbd_ring_size,
730 &card->rxbd_ring_pbase);
d930faee 731 if (!card->rxbd_ring_vbase) {
fc331460
AP
732 dev_err(adapter->dev,
733 "allocate consistent memory (%d bytes) failed!\n",
734 card->rxbd_ring_size);
8c53e42d 735 return -ENOMEM;
d930faee 736 }
d930faee 737
f57c1edc
YAP
738 dev_dbg(adapter->dev,
739 "info: rxbd_ring - base: %p, pbase: %#x:%x, len: %#x\n",
740 card->rxbd_ring_vbase, (u32)card->rxbd_ring_pbase,
741 (u32)((u64)card->rxbd_ring_pbase >> 32),
742 card->rxbd_ring_size);
d930faee 743
0732484b 744 return mwifiex_init_rxq_ring(adapter);
d930faee
AK
745}
746
747/*
748 * This function deletes Buffer descriptor ring for RX
749 */
750static int mwifiex_pcie_delete_rxbd_ring(struct mwifiex_adapter *adapter)
751{
752 struct pcie_service_card *card = adapter->card;
dd04e6ac 753 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee 754
0732484b 755 mwifiex_cleanup_rxq_ring(adapter);
d930faee 756
fc331460
AP
757 if (card->rxbd_ring_vbase)
758 pci_free_consistent(card->dev, card->rxbd_ring_size,
759 card->rxbd_ring_vbase,
760 card->rxbd_ring_pbase);
d930faee
AK
761 card->rxbd_ring_size = 0;
762 card->rxbd_wrptr = 0;
dd04e6ac 763 card->rxbd_rdptr = 0 | reg->rx_rollover_ind;
d930faee 764 card->rxbd_ring_vbase = NULL;
fc331460 765 card->rxbd_ring_pbase = 0;
d930faee
AK
766
767 return 0;
768}
769
770/*
771 * This function creates buffer descriptor ring for Events
772 */
773static int mwifiex_pcie_create_evtbd_ring(struct mwifiex_adapter *adapter)
774{
775 struct pcie_service_card *card = adapter->card;
dd04e6ac 776 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee
AK
777
778 /*
779 * driver maintaines the read pointer and firmware maintaines the write
780 * pointer. The write pointer starts at 0 (zero) while the read pointer
781 * starts at zero with rollover bit set
782 */
783 card->evtbd_wrptr = 0;
dd04e6ac 784 card->evtbd_rdptr = reg->evt_rollover_ind;
d930faee 785
e05dc3e9 786 card->evtbd_ring_size = sizeof(struct mwifiex_evt_buf_desc) *
ca8f2112
AP
787 MWIFIEX_MAX_EVT_BD;
788
d930faee 789 dev_dbg(adapter->dev, "info: evtbd_ring: Allocating %d bytes\n",
f57c1edc 790 card->evtbd_ring_size);
fc331460
AP
791 card->evtbd_ring_vbase = pci_alloc_consistent(card->dev,
792 card->evtbd_ring_size,
793 &card->evtbd_ring_pbase);
d930faee 794 if (!card->evtbd_ring_vbase) {
f57c1edc 795 dev_err(adapter->dev,
fc331460
AP
796 "allocate consistent memory (%d bytes) failed!\n",
797 card->evtbd_ring_size);
8c53e42d 798 return -ENOMEM;
d930faee 799 }
d930faee 800
f57c1edc
YAP
801 dev_dbg(adapter->dev,
802 "info: CMDRSP/EVT bd_ring - base: %p pbase: %#x:%x len: %#x\n",
803 card->evtbd_ring_vbase, (u32)card->evtbd_ring_pbase,
804 (u32)((u64)card->evtbd_ring_pbase >> 32),
805 card->evtbd_ring_size);
d930faee 806
0732484b 807 return mwifiex_pcie_init_evt_ring(adapter);
d930faee
AK
808}
809
810/*
811 * This function deletes Buffer descriptor ring for Events
812 */
813static int mwifiex_pcie_delete_evtbd_ring(struct mwifiex_adapter *adapter)
814{
815 struct pcie_service_card *card = adapter->card;
dd04e6ac 816 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee 817
0732484b 818 mwifiex_cleanup_evt_ring(adapter);
d930faee 819
fc331460
AP
820 if (card->evtbd_ring_vbase)
821 pci_free_consistent(card->dev, card->evtbd_ring_size,
822 card->evtbd_ring_vbase,
823 card->evtbd_ring_pbase);
d930faee 824 card->evtbd_wrptr = 0;
dd04e6ac 825 card->evtbd_rdptr = 0 | reg->evt_rollover_ind;
d930faee
AK
826 card->evtbd_ring_size = 0;
827 card->evtbd_ring_vbase = NULL;
fc331460 828 card->evtbd_ring_pbase = 0;
d930faee
AK
829
830 return 0;
831}
832
833/*
834 * This function allocates a buffer for CMDRSP
835 */
836static int mwifiex_pcie_alloc_cmdrsp_buf(struct mwifiex_adapter *adapter)
837{
838 struct pcie_service_card *card = adapter->card;
839 struct sk_buff *skb;
840
841 /* Allocate memory for receiving command response data */
842 skb = dev_alloc_skb(MWIFIEX_UPLD_SIZE);
843 if (!skb) {
f57c1edc
YAP
844 dev_err(adapter->dev,
845 "Unable to allocate skb for command response data.\n");
d930faee
AK
846 return -ENOMEM;
847 }
d930faee 848 skb_put(skb, MWIFIEX_UPLD_SIZE);
fc331460
AP
849 if (mwifiex_map_pci_memory(adapter, skb, MWIFIEX_UPLD_SIZE,
850 PCI_DMA_FROMDEVICE))
851 return -1;
d930faee 852
fc331460 853 card->cmdrsp_buf = skb;
d930faee
AK
854
855 return 0;
856}
857
858/*
859 * This function deletes a buffer for CMDRSP
860 */
861static int mwifiex_pcie_delete_cmdrsp_buf(struct mwifiex_adapter *adapter)
862{
863 struct pcie_service_card *card;
fc331460 864 dma_addr_t buf_pa;
d930faee
AK
865
866 if (!adapter)
867 return 0;
868
869 card = adapter->card;
870
fc331460
AP
871 if (card && card->cmdrsp_buf) {
872 MWIFIEX_SKB_PACB(card->cmdrsp_buf, &buf_pa);
873 pci_unmap_single(card->dev, buf_pa, MWIFIEX_UPLD_SIZE,
874 PCI_DMA_FROMDEVICE);
d930faee 875 dev_kfree_skb_any(card->cmdrsp_buf);
fc331460 876 }
d930faee 877
fc331460
AP
878 if (card && card->cmd_buf) {
879 MWIFIEX_SKB_PACB(card->cmd_buf, &buf_pa);
7af1ce0e 880 pci_unmap_single(card->dev, buf_pa, card->cmd_buf->len,
fc331460 881 PCI_DMA_TODEVICE);
fc331460 882 }
d930faee
AK
883 return 0;
884}
885
886/*
887 * This function allocates a buffer for sleep cookie
888 */
889static int mwifiex_pcie_alloc_sleep_cookie_buf(struct mwifiex_adapter *adapter)
890{
d930faee
AK
891 struct pcie_service_card *card = adapter->card;
892
fc331460
AP
893 card->sleep_cookie_vbase = pci_alloc_consistent(card->dev, sizeof(u32),
894 &card->sleep_cookie_pbase);
895 if (!card->sleep_cookie_vbase) {
896 dev_err(adapter->dev, "pci_alloc_consistent failed!\n");
d930faee
AK
897 return -ENOMEM;
898 }
d930faee 899 /* Init val of Sleep Cookie */
fc331460 900 *(u32 *)card->sleep_cookie_vbase = FW_AWAKE_COOKIE;
d930faee
AK
901
902 dev_dbg(adapter->dev, "alloc_scook: sleep cookie=0x%x\n",
fc331460 903 *((u32 *)card->sleep_cookie_vbase));
d930faee
AK
904
905 return 0;
906}
907
908/*
909 * This function deletes buffer for sleep cookie
910 */
911static int mwifiex_pcie_delete_sleep_cookie_buf(struct mwifiex_adapter *adapter)
912{
913 struct pcie_service_card *card;
914
915 if (!adapter)
916 return 0;
917
918 card = adapter->card;
919
fc331460
AP
920 if (card && card->sleep_cookie_vbase) {
921 pci_free_consistent(card->dev, sizeof(u32),
922 card->sleep_cookie_vbase,
923 card->sleep_cookie_pbase);
924 card->sleep_cookie_vbase = NULL;
d930faee
AK
925 }
926
927 return 0;
928}
929
fbd7e7ac
AP
930/* This function flushes the TX buffer descriptor ring
931 * This function defined as handler is also called while cleaning TXRX
932 * during disconnect/ bss stop.
933 */
934static int mwifiex_clean_pcie_ring_buf(struct mwifiex_adapter *adapter)
935{
936 struct pcie_service_card *card = adapter->card;
fbd7e7ac 937
48f4d916 938 if (!mwifiex_pcie_txbd_empty(card, card->txbd_rdptr)) {
fbd7e7ac
AP
939 card->txbd_flush = 1;
940 /* write pointer already set at last send
941 * send dnld-rdy intr again, wait for completion.
942 */
943 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
944 CPU_INTR_DNLD_RDY)) {
945 dev_err(adapter->dev,
946 "failed to assert dnld-rdy interrupt.\n");
947 return -1;
948 }
949 }
950 return 0;
951}
952
d930faee 953/*
e7f767a7 954 * This function unmaps and frees downloaded data buffer
d930faee 955 */
e7f767a7 956static int mwifiex_pcie_send_data_complete(struct mwifiex_adapter *adapter)
d930faee 957{
e7f767a7
AP
958 struct sk_buff *skb;
959 dma_addr_t buf_pa;
ca8f2112 960 u32 wrdoneidx, rdptr, num_tx_buffs, unmap_count = 0;
e05dc3e9 961 struct mwifiex_pcie_buf_desc *desc;
ca8f2112 962 struct mwifiex_pfu_buf_desc *desc2;
d930faee 963 struct pcie_service_card *card = adapter->card;
dd04e6ac 964 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee
AK
965
966 if (!mwifiex_pcie_ok_to_access_hw(adapter))
967 mwifiex_pm_wakeup_card(adapter);
968
969 /* Read the TX ring read pointer set by firmware */
dd04e6ac 970 if (mwifiex_read_reg(adapter, reg->tx_rdptr, &rdptr)) {
f57c1edc 971 dev_err(adapter->dev,
dd04e6ac 972 "SEND COMP: failed to read reg->tx_rdptr\n");
d930faee
AK
973 return -1;
974 }
975
e7f767a7
AP
976 dev_dbg(adapter->dev, "SEND COMP: rdptr_prev=0x%x, rdptr=0x%x\n",
977 card->txbd_rdptr, rdptr);
d930faee 978
ca8f2112 979 num_tx_buffs = MWIFIEX_MAX_TXRX_BD << reg->tx_start_ptr;
e7f767a7 980 /* free from previous txbd_rdptr to current txbd_rdptr */
dd04e6ac
AP
981 while (((card->txbd_rdptr & reg->tx_mask) !=
982 (rdptr & reg->tx_mask)) ||
983 ((card->txbd_rdptr & reg->tx_rollover_ind) !=
984 (rdptr & reg->tx_rollover_ind))) {
ca8f2112
AP
985 wrdoneidx = (card->txbd_rdptr & reg->tx_mask) >>
986 reg->tx_start_ptr;
e7f767a7
AP
987
988 skb = card->tx_buf_list[wrdoneidx];
989 if (skb) {
990 dev_dbg(adapter->dev,
991 "SEND COMP: Detach skb %p at txbd_rdidx=%d\n",
992 skb, wrdoneidx);
993 MWIFIEX_SKB_PACB(skb, &buf_pa);
994 pci_unmap_single(card->dev, buf_pa, skb->len,
995 PCI_DMA_TODEVICE);
996
997 unmap_count++;
998
999 if (card->txbd_flush)
1000 mwifiex_write_data_complete(adapter, skb, 0,
1001 -1);
1002 else
1003 mwifiex_write_data_complete(adapter, skb, 0, 0);
1004 }
1005
1006 card->tx_buf_list[wrdoneidx] = NULL;
ca8f2112
AP
1007
1008 if (reg->pfu_enabled) {
1009 desc2 = (void *)card->txbd_ring[wrdoneidx];
1010 memset(desc2, 0, sizeof(*desc2));
1011 } else {
1012 desc = card->txbd_ring[wrdoneidx];
1013 memset(desc, 0, sizeof(*desc));
1014 }
1015 switch (card->dev->device) {
1016 case PCIE_DEVICE_ID_MARVELL_88W8766P:
1017 card->txbd_rdptr++;
1018 break;
1019 case PCIE_DEVICE_ID_MARVELL_88W8897:
1020 card->txbd_rdptr += reg->ring_tx_start_ptr;
1021 break;
1022 }
1023
e7f767a7 1024
dd04e6ac 1025 if ((card->txbd_rdptr & reg->tx_mask) == num_tx_buffs)
e7f767a7 1026 card->txbd_rdptr = ((card->txbd_rdptr &
dd04e6ac
AP
1027 reg->tx_rollover_ind) ^
1028 reg->tx_rollover_ind);
e7f767a7
AP
1029 }
1030
1031 if (unmap_count)
1032 adapter->data_sent = false;
1033
1034 if (card->txbd_flush) {
3d482038 1035 if (mwifiex_pcie_txbd_empty(card, card->txbd_rdptr))
e7f767a7
AP
1036 card->txbd_flush = 0;
1037 else
1038 mwifiex_clean_pcie_ring_buf(adapter);
1039 }
1040
1041 return 0;
1042}
1043
1044/* This function sends data buffer to device. First 4 bytes of payload
1045 * are filled with payload length and payload type. Then this payload
1046 * is mapped to PCI device memory. Tx ring pointers are advanced accordingly.
1047 * Download ready interrupt to FW is deffered if Tx ring is not full and
1048 * additional payload can be accomodated.
1049 */
1050static int
1051mwifiex_pcie_send_data(struct mwifiex_adapter *adapter, struct sk_buff *skb,
1052 struct mwifiex_tx_param *tx_param)
1053{
1054 struct pcie_service_card *card = adapter->card;
dd04e6ac 1055 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
ca8f2112 1056 u32 wrindx, num_tx_buffs, rx_val;
e7f767a7
AP
1057 int ret;
1058 dma_addr_t buf_pa;
9931078e
BZ
1059 struct mwifiex_pcie_buf_desc *desc = NULL;
1060 struct mwifiex_pfu_buf_desc *desc2 = NULL;
e7f767a7
AP
1061 __le16 *tmp;
1062
1063 if (!(skb->data && skb->len)) {
1064 dev_err(adapter->dev, "%s(): invalid parameter <%p, %#x>\n",
1065 __func__, skb->data, skb->len);
1066 return -1;
1067 }
1068
1069 if (!mwifiex_pcie_ok_to_access_hw(adapter))
1070 mwifiex_pm_wakeup_card(adapter);
1071
ca8f2112 1072 num_tx_buffs = MWIFIEX_MAX_TXRX_BD << reg->tx_start_ptr;
e7f767a7
AP
1073 dev_dbg(adapter->dev, "info: SEND DATA: <Rd: %#x, Wr: %#x>\n",
1074 card->txbd_rdptr, card->txbd_wrptr);
1075 if (mwifiex_pcie_txbd_not_full(card)) {
d930faee
AK
1076 u8 *payload;
1077
1078 adapter->data_sent = true;
e7f767a7 1079 payload = skb->data;
d930faee
AK
1080 tmp = (__le16 *)&payload[0];
1081 *tmp = cpu_to_le16((u16)skb->len);
1082 tmp = (__le16 *)&payload[2];
1083 *tmp = cpu_to_le16(MWIFIEX_TYPE_DATA);
e7f767a7
AP
1084
1085 if (mwifiex_map_pci_memory(adapter, skb, skb->len ,
1086 PCI_DMA_TODEVICE))
1087 return -1;
1088
ca8f2112 1089 wrindx = (card->txbd_wrptr & reg->tx_mask) >> reg->tx_start_ptr;
e7f767a7
AP
1090 MWIFIEX_SKB_PACB(skb, &buf_pa);
1091 card->tx_buf_list[wrindx] = skb;
d930faee 1092
ca8f2112
AP
1093 if (reg->pfu_enabled) {
1094 desc2 = (void *)card->txbd_ring[wrindx];
1095 desc2->paddr = buf_pa;
1096 desc2->len = (u16)skb->len;
1097 desc2->frag_len = (u16)skb->len;
1098 desc2->offset = 0;
1099 desc2->flags = MWIFIEX_BD_FLAG_FIRST_DESC |
1100 MWIFIEX_BD_FLAG_LAST_DESC;
1101 } else {
1102 desc = card->txbd_ring[wrindx];
1103 desc->paddr = buf_pa;
1104 desc->len = (u16)skb->len;
1105 desc->flags = MWIFIEX_BD_FLAG_FIRST_DESC |
1106 MWIFIEX_BD_FLAG_LAST_DESC;
1107 }
1108
1109 switch (card->dev->device) {
1110 case PCIE_DEVICE_ID_MARVELL_88W8766P:
1111 card->txbd_wrptr++;
1112 break;
1113 case PCIE_DEVICE_ID_MARVELL_88W8897:
1114 card->txbd_wrptr += reg->ring_tx_start_ptr;
1115 break;
1116 }
1117
1118 if ((card->txbd_wrptr & reg->tx_mask) == num_tx_buffs)
d930faee 1119 card->txbd_wrptr = ((card->txbd_wrptr &
dd04e6ac
AP
1120 reg->tx_rollover_ind) ^
1121 reg->tx_rollover_ind);
d930faee 1122
ca8f2112 1123 rx_val = card->rxbd_rdptr & reg->rx_wrap_mask;
dd04e6ac
AP
1124 /* Write the TX ring write pointer in to reg->tx_wrptr */
1125 if (mwifiex_write_reg(adapter, reg->tx_wrptr,
ca8f2112 1126 card->txbd_wrptr | rx_val)) {
f57c1edc 1127 dev_err(adapter->dev,
dd04e6ac 1128 "SEND DATA: failed to write reg->tx_wrptr\n");
e7f767a7
AP
1129 ret = -1;
1130 goto done_unmap;
d930faee 1131 }
e7f767a7
AP
1132 if ((mwifiex_pcie_txbd_not_full(card)) &&
1133 tx_param->next_pkt_len) {
1134 /* have more packets and TxBD still can hold more */
1135 dev_dbg(adapter->dev,
1136 "SEND DATA: delay dnld-rdy interrupt.\n");
1137 adapter->data_sent = false;
1138 } else {
1139 /* Send the TX ready interrupt */
1140 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
1141 CPU_INTR_DNLD_RDY)) {
1142 dev_err(adapter->dev,
1143 "SEND DATA: failed to assert dnld-rdy interrupt.\n");
1144 ret = -1;
1145 goto done_unmap;
1146 }
d930faee
AK
1147 }
1148 dev_dbg(adapter->dev, "info: SEND DATA: Updated <Rd: %#x, Wr: "
f57c1edc 1149 "%#x> and sent packet to firmware successfully\n",
e7f767a7 1150 card->txbd_rdptr, card->txbd_wrptr);
d930faee 1151 } else {
f57c1edc
YAP
1152 dev_dbg(adapter->dev,
1153 "info: TX Ring full, can't send packets to fw\n");
d930faee
AK
1154 adapter->data_sent = true;
1155 /* Send the TX ready interrupt */
1156 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
1157 CPU_INTR_DNLD_RDY))
f57c1edc
YAP
1158 dev_err(adapter->dev,
1159 "SEND DATA: failed to assert door-bell intr\n");
d930faee
AK
1160 return -EBUSY;
1161 }
1162
e7f767a7
AP
1163 return -EINPROGRESS;
1164done_unmap:
1165 MWIFIEX_SKB_PACB(skb, &buf_pa);
1166 pci_unmap_single(card->dev, buf_pa, skb->len, PCI_DMA_TODEVICE);
1167 card->tx_buf_list[wrindx] = NULL;
ca8f2112
AP
1168 if (reg->pfu_enabled)
1169 memset(desc2, 0, sizeof(*desc2));
1170 else
1171 memset(desc, 0, sizeof(*desc));
1172
e7f767a7 1173 return ret;
d930faee
AK
1174}
1175
1176/*
1177 * This function handles received buffer ring and
1178 * dispatches packets to upper
1179 */
1180static int mwifiex_pcie_process_recv_data(struct mwifiex_adapter *adapter)
1181{
1182 struct pcie_service_card *card = adapter->card;
dd04e6ac 1183 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
ca8f2112 1184 u32 wrptr, rd_index, tx_val;
e7f767a7 1185 dma_addr_t buf_pa;
d930faee
AK
1186 int ret = 0;
1187 struct sk_buff *skb_tmp = NULL;
e05dc3e9 1188 struct mwifiex_pcie_buf_desc *desc;
ca8f2112 1189 struct mwifiex_pfu_buf_desc *desc2;
d930faee 1190
e7f767a7
AP
1191 if (!mwifiex_pcie_ok_to_access_hw(adapter))
1192 mwifiex_pm_wakeup_card(adapter);
1193
d930faee 1194 /* Read the RX ring Write pointer set by firmware */
dd04e6ac 1195 if (mwifiex_read_reg(adapter, reg->rx_wrptr, &wrptr)) {
f57c1edc 1196 dev_err(adapter->dev,
dd04e6ac 1197 "RECV DATA: failed to read reg->rx_wrptr\n");
d930faee
AK
1198 ret = -1;
1199 goto done;
1200 }
e7f767a7 1201 card->rxbd_wrptr = wrptr;
d930faee 1202
dd04e6ac
AP
1203 while (((wrptr & reg->rx_mask) !=
1204 (card->rxbd_rdptr & reg->rx_mask)) ||
1205 ((wrptr & reg->rx_rollover_ind) ==
1206 (card->rxbd_rdptr & reg->rx_rollover_ind))) {
d930faee
AK
1207 struct sk_buff *skb_data;
1208 u16 rx_len;
e7f767a7 1209 __le16 pkt_len;
d930faee 1210
dd04e6ac 1211 rd_index = card->rxbd_rdptr & reg->rx_mask;
d930faee
AK
1212 skb_data = card->rx_buf_list[rd_index];
1213
e7f767a7
AP
1214 MWIFIEX_SKB_PACB(skb_data, &buf_pa);
1215 pci_unmap_single(card->dev, buf_pa, MWIFIEX_RX_DATA_BUF_SIZE,
1216 PCI_DMA_FROMDEVICE);
1217 card->rx_buf_list[rd_index] = NULL;
1218
d930faee 1219 /* Get data length from interface header -
e7f767a7
AP
1220 * first 2 bytes for len, next 2 bytes is for type
1221 */
1222 pkt_len = *((__le16 *)skb_data->data);
1223 rx_len = le16_to_cpu(pkt_len);
1224 skb_put(skb_data, rx_len);
f57c1edc
YAP
1225 dev_dbg(adapter->dev,
1226 "info: RECV DATA: Rd=%#x, Wr=%#x, Len=%d\n",
1227 card->rxbd_rdptr, wrptr, rx_len);
e7f767a7
AP
1228 skb_pull(skb_data, INTF_HEADER_LEN);
1229 mwifiex_handle_rx_packet(adapter, skb_data);
1230
1231 skb_tmp = dev_alloc_skb(MWIFIEX_RX_DATA_BUF_SIZE);
d930faee 1232 if (!skb_tmp) {
e7f767a7
AP
1233 dev_err(adapter->dev,
1234 "Unable to allocate skb.\n");
1235 return -ENOMEM;
d930faee
AK
1236 }
1237
e7f767a7
AP
1238 if (mwifiex_map_pci_memory(adapter, skb_tmp,
1239 MWIFIEX_RX_DATA_BUF_SIZE,
1240 PCI_DMA_FROMDEVICE))
1241 return -1;
1242
1243 MWIFIEX_SKB_PACB(skb_tmp, &buf_pa);
1244
1245 dev_dbg(adapter->dev,
1246 "RECV DATA: Attach new sk_buff %p at rxbd_rdidx=%d\n",
1247 skb_tmp, rd_index);
1248 card->rx_buf_list[rd_index] = skb_tmp;
ca8f2112
AP
1249
1250 if (reg->pfu_enabled) {
1251 desc2 = (void *)card->rxbd_ring[rd_index];
1252 desc2->paddr = buf_pa;
1253 desc2->len = skb_tmp->len;
1254 desc2->frag_len = skb_tmp->len;
1255 desc2->offset = 0;
1256 desc2->flags = reg->ring_flag_sop | reg->ring_flag_eop;
1257 } else {
1258 desc = card->rxbd_ring[rd_index];
1259 desc->paddr = buf_pa;
1260 desc->len = skb_tmp->len;
1261 desc->flags = 0;
1262 }
d930faee 1263
dd04e6ac 1264 if ((++card->rxbd_rdptr & reg->rx_mask) ==
d930faee
AK
1265 MWIFIEX_MAX_TXRX_BD) {
1266 card->rxbd_rdptr = ((card->rxbd_rdptr &
dd04e6ac
AP
1267 reg->rx_rollover_ind) ^
1268 reg->rx_rollover_ind);
d930faee
AK
1269 }
1270 dev_dbg(adapter->dev, "info: RECV DATA: <Rd: %#x, Wr: %#x>\n",
f57c1edc 1271 card->rxbd_rdptr, wrptr);
d930faee 1272
ca8f2112 1273 tx_val = card->txbd_wrptr & reg->tx_wrap_mask;
dd04e6ac
AP
1274 /* Write the RX ring read pointer in to reg->rx_rdptr */
1275 if (mwifiex_write_reg(adapter, reg->rx_rdptr,
ca8f2112 1276 card->rxbd_rdptr | tx_val)) {
f57c1edc 1277 dev_err(adapter->dev,
dd04e6ac 1278 "RECV DATA: failed to write reg->rx_rdptr\n");
d930faee
AK
1279 ret = -1;
1280 goto done;
1281 }
1282
1283 /* Read the RX ring Write pointer set by firmware */
dd04e6ac 1284 if (mwifiex_read_reg(adapter, reg->rx_wrptr, &wrptr)) {
f57c1edc 1285 dev_err(adapter->dev,
dd04e6ac 1286 "RECV DATA: failed to read reg->rx_wrptr\n");
d930faee
AK
1287 ret = -1;
1288 goto done;
1289 }
f57c1edc
YAP
1290 dev_dbg(adapter->dev,
1291 "info: RECV DATA: Rcvd packet from fw successfully\n");
e7f767a7 1292 card->rxbd_wrptr = wrptr;
d930faee
AK
1293 }
1294
1295done:
d930faee
AK
1296 return ret;
1297}
1298
1299/*
1300 * This function downloads the boot command to device
1301 */
1302static int
1303mwifiex_pcie_send_boot_cmd(struct mwifiex_adapter *adapter, struct sk_buff *skb)
1304{
fc331460
AP
1305 dma_addr_t buf_pa;
1306 struct pcie_service_card *card = adapter->card;
dd04e6ac 1307 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee 1308
fc331460 1309 if (!(skb->data && skb->len)) {
f57c1edc 1310 dev_err(adapter->dev,
fc331460
AP
1311 "Invalid parameter in %s <%p. len %d>\n",
1312 __func__, skb->data, skb->len);
d930faee
AK
1313 return -1;
1314 }
1315
fc331460
AP
1316 if (mwifiex_map_pci_memory(adapter, skb, skb->len , PCI_DMA_TODEVICE))
1317 return -1;
1318
1319 MWIFIEX_SKB_PACB(skb, &buf_pa);
1320
dd04e6ac
AP
1321 /* Write the lower 32bits of the physical address to low command
1322 * address scratch register
1323 */
1324 if (mwifiex_write_reg(adapter, reg->cmd_addr_lo, (u32)buf_pa)) {
f57c1edc
YAP
1325 dev_err(adapter->dev,
1326 "%s: failed to write download command to boot code.\n",
1327 __func__);
fc331460
AP
1328 pci_unmap_single(card->dev, buf_pa, MWIFIEX_UPLD_SIZE,
1329 PCI_DMA_TODEVICE);
d930faee
AK
1330 return -1;
1331 }
1332
dd04e6ac
AP
1333 /* Write the upper 32bits of the physical address to high command
1334 * address scratch register
1335 */
1336 if (mwifiex_write_reg(adapter, reg->cmd_addr_hi,
fc331460 1337 (u32)((u64)buf_pa >> 32))) {
f57c1edc
YAP
1338 dev_err(adapter->dev,
1339 "%s: failed to write download command to boot code.\n",
1340 __func__);
fc331460
AP
1341 pci_unmap_single(card->dev, buf_pa, MWIFIEX_UPLD_SIZE,
1342 PCI_DMA_TODEVICE);
d930faee
AK
1343 return -1;
1344 }
1345
dd04e6ac
AP
1346 /* Write the command length to cmd_size scratch register */
1347 if (mwifiex_write_reg(adapter, reg->cmd_size, skb->len)) {
f57c1edc 1348 dev_err(adapter->dev,
dd04e6ac 1349 "%s: failed to write command len to cmd_size scratch reg\n",
f57c1edc 1350 __func__);
fc331460
AP
1351 pci_unmap_single(card->dev, buf_pa, MWIFIEX_UPLD_SIZE,
1352 PCI_DMA_TODEVICE);
d930faee
AK
1353 return -1;
1354 }
1355
1356 /* Ring the door bell */
1357 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
1358 CPU_INTR_DOOR_BELL)) {
f57c1edc
YAP
1359 dev_err(adapter->dev,
1360 "%s: failed to assert door-bell intr\n", __func__);
fc331460
AP
1361 pci_unmap_single(card->dev, buf_pa,
1362 MWIFIEX_UPLD_SIZE, PCI_DMA_TODEVICE);
d930faee
AK
1363 return -1;
1364 }
1365
1366 return 0;
1367}
1368
c6d1d87a
AP
1369/* This function init rx port in firmware which in turn enables to receive data
1370 * from device before transmitting any packet.
1371 */
1372static int mwifiex_pcie_init_fw_port(struct mwifiex_adapter *adapter)
1373{
1374 struct pcie_service_card *card = adapter->card;
dd04e6ac 1375 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
ca8f2112 1376 int tx_wrap = card->txbd_wrptr & reg->tx_wrap_mask;
c6d1d87a 1377
dd04e6ac 1378 /* Write the RX ring read pointer in to reg->rx_rdptr */
ca8f2112
AP
1379 if (mwifiex_write_reg(adapter, reg->rx_rdptr, card->rxbd_rdptr |
1380 tx_wrap)) {
c6d1d87a 1381 dev_err(adapter->dev,
dd04e6ac 1382 "RECV DATA: failed to write reg->rx_rdptr\n");
c6d1d87a
AP
1383 return -1;
1384 }
1385 return 0;
1386}
1387
1388/* This function downloads commands to the device
d930faee
AK
1389 */
1390static int
1391mwifiex_pcie_send_cmd(struct mwifiex_adapter *adapter, struct sk_buff *skb)
1392{
1393 struct pcie_service_card *card = adapter->card;
dd04e6ac 1394 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee 1395 int ret = 0;
fc331460
AP
1396 dma_addr_t cmd_buf_pa, cmdrsp_buf_pa;
1397 u8 *payload = (u8 *)skb->data;
d930faee
AK
1398
1399 if (!(skb->data && skb->len)) {
1400 dev_err(adapter->dev, "Invalid parameter in %s <%p, %#x>\n",
f57c1edc 1401 __func__, skb->data, skb->len);
d930faee
AK
1402 return -1;
1403 }
1404
1405 /* Make sure a command response buffer is available */
1406 if (!card->cmdrsp_buf) {
f57c1edc
YAP
1407 dev_err(adapter->dev,
1408 "No response buffer available, send command failed\n");
d930faee
AK
1409 return -EBUSY;
1410 }
1411
fc331460
AP
1412 if (!mwifiex_pcie_ok_to_access_hw(adapter))
1413 mwifiex_pm_wakeup_card(adapter);
d930faee
AK
1414
1415 adapter->cmd_sent = true;
fc331460
AP
1416
1417 *(__le16 *)&payload[0] = cpu_to_le16((u16)skb->len);
1418 *(__le16 *)&payload[2] = cpu_to_le16(MWIFIEX_TYPE_CMD);
1419
1420 if (mwifiex_map_pci_memory(adapter, skb, skb->len, PCI_DMA_TODEVICE))
1421 return -1;
1422
1423 card->cmd_buf = skb;
d930faee
AK
1424
1425 /* To send a command, the driver will:
1426 1. Write the 64bit physical address of the data buffer to
dd04e6ac 1427 cmd response address low + cmd response address high
d930faee
AK
1428 2. Ring the door bell (i.e. set the door bell interrupt)
1429
1430 In response to door bell interrupt, the firmware will perform
1431 the DMA of the command packet (first header to obtain the total
1432 length and then rest of the command).
1433 */
1434
1435 if (card->cmdrsp_buf) {
fc331460 1436 MWIFIEX_SKB_PACB(card->cmdrsp_buf, &cmdrsp_buf_pa);
d930faee
AK
1437 /* Write the lower 32bits of the cmdrsp buffer physical
1438 address */
dd04e6ac 1439 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_lo,
fc331460 1440 (u32)cmdrsp_buf_pa)) {
f57c1edc
YAP
1441 dev_err(adapter->dev,
1442 "Failed to write download cmd to boot code.\n");
d930faee
AK
1443 ret = -1;
1444 goto done;
1445 }
1446 /* Write the upper 32bits of the cmdrsp buffer physical
1447 address */
dd04e6ac 1448 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_hi,
fc331460 1449 (u32)((u64)cmdrsp_buf_pa >> 32))) {
f57c1edc
YAP
1450 dev_err(adapter->dev,
1451 "Failed to write download cmd to boot code.\n");
d930faee
AK
1452 ret = -1;
1453 goto done;
1454 }
1455 }
1456
fc331460 1457 MWIFIEX_SKB_PACB(card->cmd_buf, &cmd_buf_pa);
dd04e6ac
AP
1458 /* Write the lower 32bits of the physical address to reg->cmd_addr_lo */
1459 if (mwifiex_write_reg(adapter, reg->cmd_addr_lo,
1460 (u32)cmd_buf_pa)) {
f57c1edc
YAP
1461 dev_err(adapter->dev,
1462 "Failed to write download cmd to boot code.\n");
d930faee
AK
1463 ret = -1;
1464 goto done;
1465 }
dd04e6ac
AP
1466 /* Write the upper 32bits of the physical address to reg->cmd_addr_hi */
1467 if (mwifiex_write_reg(adapter, reg->cmd_addr_hi,
fc331460 1468 (u32)((u64)cmd_buf_pa >> 32))) {
f57c1edc
YAP
1469 dev_err(adapter->dev,
1470 "Failed to write download cmd to boot code.\n");
d930faee
AK
1471 ret = -1;
1472 goto done;
1473 }
1474
dd04e6ac
AP
1475 /* Write the command length to reg->cmd_size */
1476 if (mwifiex_write_reg(adapter, reg->cmd_size,
1477 card->cmd_buf->len)) {
f57c1edc 1478 dev_err(adapter->dev,
dd04e6ac 1479 "Failed to write cmd len to reg->cmd_size\n");
d930faee
AK
1480 ret = -1;
1481 goto done;
1482 }
1483
1484 /* Ring the door bell */
1485 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
1486 CPU_INTR_DOOR_BELL)) {
f57c1edc
YAP
1487 dev_err(adapter->dev,
1488 "Failed to assert door-bell intr\n");
d930faee
AK
1489 ret = -1;
1490 goto done;
1491 }
1492
1493done:
1494 if (ret)
1495 adapter->cmd_sent = false;
1496
1497 return 0;
1498}
1499
1500/*
1501 * This function handles command complete interrupt
1502 */
1503static int mwifiex_pcie_process_cmd_complete(struct mwifiex_adapter *adapter)
1504{
1505 struct pcie_service_card *card = adapter->card;
dd04e6ac 1506 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
f57c1edc 1507 struct sk_buff *skb = card->cmdrsp_buf;
d930faee 1508 int count = 0;
fc331460
AP
1509 u16 rx_len;
1510 __le16 pkt_len;
1511 dma_addr_t buf_pa;
d930faee
AK
1512
1513 dev_dbg(adapter->dev, "info: Rx CMD Response\n");
1514
fc331460
AP
1515 MWIFIEX_SKB_PACB(skb, &buf_pa);
1516 pci_unmap_single(card->dev, buf_pa, MWIFIEX_UPLD_SIZE,
1517 PCI_DMA_FROMDEVICE);
1518
1519 pkt_len = *((__le16 *)skb->data);
1520 rx_len = le16_to_cpu(pkt_len);
1521 skb_trim(skb, rx_len);
1522 skb_pull(skb, INTF_HEADER_LEN);
1523
d930faee 1524 if (!adapter->curr_cmd) {
d930faee 1525 if (adapter->ps_state == PS_STATE_SLEEP_CFM) {
f57c1edc
YAP
1526 mwifiex_process_sleep_confirm_resp(adapter, skb->data,
1527 skb->len);
52301a81
AP
1528 while (reg->sleep_cookie && (count++ < 10) &&
1529 mwifiex_pcie_ok_to_access_hw(adapter))
e7891ba2 1530 usleep_range(50, 60);
d930faee 1531 } else {
f57c1edc
YAP
1532 dev_err(adapter->dev,
1533 "There is no command but got cmdrsp\n");
d930faee 1534 }
f57c1edc
YAP
1535 memcpy(adapter->upld_buf, skb->data,
1536 min_t(u32, MWIFIEX_SIZE_OF_CMD_BUFFER, skb->len));
0f49d64c 1537 skb_push(skb, INTF_HEADER_LEN);
fc331460
AP
1538 if (mwifiex_map_pci_memory(adapter, skb, MWIFIEX_UPLD_SIZE,
1539 PCI_DMA_FROMDEVICE))
1540 return -1;
1541
1542 MWIFIEX_SKB_PACB(skb, &buf_pa);
d930faee 1543 } else if (mwifiex_pcie_ok_to_access_hw(adapter)) {
f57c1edc 1544 adapter->curr_cmd->resp_skb = skb;
d930faee
AK
1545 adapter->cmd_resp_received = true;
1546 /* Take the pointer and set it to CMD node and will
1547 return in the response complete callback */
1548 card->cmdrsp_buf = NULL;
1549
1550 /* Clear the cmd-rsp buffer address in scratch registers. This
1551 will prevent firmware from writing to the same response
1552 buffer again. */
dd04e6ac 1553 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_lo, 0)) {
f57c1edc
YAP
1554 dev_err(adapter->dev,
1555 "cmd_done: failed to clear cmd_rsp_addr_lo\n");
d930faee
AK
1556 return -1;
1557 }
1558 /* Write the upper 32bits of the cmdrsp buffer physical
1559 address */
dd04e6ac 1560 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_hi, 0)) {
f57c1edc
YAP
1561 dev_err(adapter->dev,
1562 "cmd_done: failed to clear cmd_rsp_addr_hi\n");
d930faee
AK
1563 return -1;
1564 }
1565 }
1566
1567 return 0;
1568}
1569
1570/*
1571 * Command Response processing complete handler
1572 */
1573static int mwifiex_pcie_cmdrsp_complete(struct mwifiex_adapter *adapter,
1574 struct sk_buff *skb)
1575{
1576 struct pcie_service_card *card = adapter->card;
fc331460
AP
1577 dma_addr_t buf_pa;
1578 struct sk_buff *skb_tmp;
d930faee
AK
1579
1580 if (skb) {
1581 card->cmdrsp_buf = skb;
1582 skb_push(card->cmdrsp_buf, INTF_HEADER_LEN);
fc331460
AP
1583 if (mwifiex_map_pci_memory(adapter, skb, MWIFIEX_UPLD_SIZE,
1584 PCI_DMA_FROMDEVICE))
1585 return -1;
1586 }
1587
1588 skb_tmp = card->cmd_buf;
1589 if (skb_tmp) {
1590 MWIFIEX_SKB_PACB(skb_tmp, &buf_pa);
7af1ce0e 1591 pci_unmap_single(card->dev, buf_pa, skb_tmp->len,
fc331460
AP
1592 PCI_DMA_FROMDEVICE);
1593 card->cmd_buf = NULL;
d930faee
AK
1594 }
1595
1596 return 0;
1597}
1598
1599/*
1600 * This function handles firmware event ready interrupt
1601 */
1602static int mwifiex_pcie_process_event_ready(struct mwifiex_adapter *adapter)
1603{
1604 struct pcie_service_card *card = adapter->card;
dd04e6ac 1605 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee
AK
1606 u32 rdptr = card->evtbd_rdptr & MWIFIEX_EVTBD_MASK;
1607 u32 wrptr, event;
fc331460 1608 dma_addr_t buf_pa;
e05dc3e9 1609 struct mwifiex_evt_buf_desc *desc;
fc331460
AP
1610
1611 if (!mwifiex_pcie_ok_to_access_hw(adapter))
1612 mwifiex_pm_wakeup_card(adapter);
d930faee
AK
1613
1614 if (adapter->event_received) {
f57c1edc
YAP
1615 dev_dbg(adapter->dev, "info: Event being processed, "
1616 "do not process this interrupt just yet\n");
d930faee
AK
1617 return 0;
1618 }
1619
1620 if (rdptr >= MWIFIEX_MAX_EVT_BD) {
1621 dev_dbg(adapter->dev, "info: Invalid read pointer...\n");
1622 return -1;
1623 }
1624
1625 /* Read the event ring write pointer set by firmware */
dd04e6ac 1626 if (mwifiex_read_reg(adapter, reg->evt_wrptr, &wrptr)) {
f57c1edc 1627 dev_err(adapter->dev,
dd04e6ac 1628 "EventReady: failed to read reg->evt_wrptr\n");
d930faee
AK
1629 return -1;
1630 }
1631
1632 dev_dbg(adapter->dev, "info: EventReady: Initial <Rd: 0x%x, Wr: 0x%x>",
f57c1edc
YAP
1633 card->evtbd_rdptr, wrptr);
1634 if (((wrptr & MWIFIEX_EVTBD_MASK) != (card->evtbd_rdptr
1635 & MWIFIEX_EVTBD_MASK)) ||
dd04e6ac
AP
1636 ((wrptr & reg->evt_rollover_ind) ==
1637 (card->evtbd_rdptr & reg->evt_rollover_ind))) {
d930faee
AK
1638 struct sk_buff *skb_cmd;
1639 __le16 data_len = 0;
1640 u16 evt_len;
1641
1642 dev_dbg(adapter->dev, "info: Read Index: %d\n", rdptr);
1643 skb_cmd = card->evt_buf_list[rdptr];
fc331460
AP
1644 MWIFIEX_SKB_PACB(skb_cmd, &buf_pa);
1645 pci_unmap_single(card->dev, buf_pa, MAX_EVENT_SIZE,
1646 PCI_DMA_FROMDEVICE);
1647
d930faee
AK
1648 /* Take the pointer and set it to event pointer in adapter
1649 and will return back after event handling callback */
1650 card->evt_buf_list[rdptr] = NULL;
e05dc3e9
AP
1651 desc = card->evtbd_ring[rdptr];
1652 memset(desc, 0, sizeof(*desc));
d930faee
AK
1653
1654 event = *(u32 *) &skb_cmd->data[INTF_HEADER_LEN];
1655 adapter->event_cause = event;
1656 /* The first 4bytes will be the event transfer header
1657 len is 2 bytes followed by type which is 2 bytes */
1658 memcpy(&data_len, skb_cmd->data, sizeof(__le16));
1659 evt_len = le16_to_cpu(data_len);
1660
1661 skb_pull(skb_cmd, INTF_HEADER_LEN);
1662 dev_dbg(adapter->dev, "info: Event length: %d\n", evt_len);
1663
1664 if ((evt_len > 0) && (evt_len < MAX_EVENT_SIZE))
1665 memcpy(adapter->event_body, skb_cmd->data +
1666 MWIFIEX_EVENT_HEADER_LEN, evt_len -
1667 MWIFIEX_EVENT_HEADER_LEN);
1668
1669 adapter->event_received = true;
1670 adapter->event_skb = skb_cmd;
1671
1672 /* Do not update the event read pointer here, wait till the
1673 buffer is released. This is just to make things simpler,
1674 we need to find a better method of managing these buffers.
1675 */
1676 }
1677
1678 return 0;
1679}
1680
1681/*
1682 * Event processing complete handler
1683 */
1684static int mwifiex_pcie_event_complete(struct mwifiex_adapter *adapter,
1685 struct sk_buff *skb)
1686{
1687 struct pcie_service_card *card = adapter->card;
dd04e6ac 1688 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee
AK
1689 int ret = 0;
1690 u32 rdptr = card->evtbd_rdptr & MWIFIEX_EVTBD_MASK;
1691 u32 wrptr;
fc331460 1692 dma_addr_t buf_pa;
e05dc3e9 1693 struct mwifiex_evt_buf_desc *desc;
d930faee
AK
1694
1695 if (!skb)
1696 return 0;
1697
1eb54c8a 1698 if (rdptr >= MWIFIEX_MAX_EVT_BD) {
d930faee 1699 dev_err(adapter->dev, "event_complete: Invalid rdptr 0x%x\n",
f57c1edc 1700 rdptr);
8c53e42d 1701 return -EINVAL;
1eb54c8a 1702 }
d930faee
AK
1703
1704 /* Read the event ring write pointer set by firmware */
dd04e6ac 1705 if (mwifiex_read_reg(adapter, reg->evt_wrptr, &wrptr)) {
f57c1edc 1706 dev_err(adapter->dev,
dd04e6ac 1707 "event_complete: failed to read reg->evt_wrptr\n");
8c53e42d 1708 return -1;
d930faee
AK
1709 }
1710
1711 if (!card->evt_buf_list[rdptr]) {
1712 skb_push(skb, INTF_HEADER_LEN);
fc331460
AP
1713 if (mwifiex_map_pci_memory(adapter, skb,
1714 MAX_EVENT_SIZE,
1715 PCI_DMA_FROMDEVICE))
1716 return -1;
1717 MWIFIEX_SKB_PACB(skb, &buf_pa);
d930faee 1718 card->evt_buf_list[rdptr] = skb;
fc331460 1719 MWIFIEX_SKB_PACB(skb, &buf_pa);
e05dc3e9
AP
1720 desc = card->evtbd_ring[rdptr];
1721 desc->paddr = buf_pa;
1722 desc->len = (u16)skb->len;
1723 desc->flags = 0;
d930faee
AK
1724 skb = NULL;
1725 } else {
f57c1edc
YAP
1726 dev_dbg(adapter->dev,
1727 "info: ERROR: buf still valid at index %d, <%p, %p>\n",
1728 rdptr, card->evt_buf_list[rdptr], skb);
d930faee
AK
1729 }
1730
1731 if ((++card->evtbd_rdptr & MWIFIEX_EVTBD_MASK) == MWIFIEX_MAX_EVT_BD) {
1732 card->evtbd_rdptr = ((card->evtbd_rdptr &
dd04e6ac
AP
1733 reg->evt_rollover_ind) ^
1734 reg->evt_rollover_ind);
d930faee
AK
1735 }
1736
1737 dev_dbg(adapter->dev, "info: Updated <Rd: 0x%x, Wr: 0x%x>",
f57c1edc 1738 card->evtbd_rdptr, wrptr);
d930faee 1739
dd04e6ac
AP
1740 /* Write the event ring read pointer in to reg->evt_rdptr */
1741 if (mwifiex_write_reg(adapter, reg->evt_rdptr,
1742 card->evtbd_rdptr)) {
f57c1edc 1743 dev_err(adapter->dev,
dd04e6ac 1744 "event_complete: failed to read reg->evt_rdptr\n");
8c53e42d 1745 return -1;
d930faee
AK
1746 }
1747
d930faee
AK
1748 dev_dbg(adapter->dev, "info: Check Events Again\n");
1749 ret = mwifiex_pcie_process_event_ready(adapter);
1750
1751 return ret;
1752}
1753
1754/*
1755 * This function downloads the firmware to the card.
1756 *
1757 * Firmware is downloaded to the card in blocks. Every block download
1758 * is tested for CRC errors, and retried a number of times before
1759 * returning failure.
1760 */
1761static int mwifiex_prog_fw_w_helper(struct mwifiex_adapter *adapter,
1762 struct mwifiex_fw_image *fw)
1763{
1764 int ret;
1765 u8 *firmware = fw->fw_buf;
1766 u32 firmware_len = fw->fw_len;
1767 u32 offset = 0;
1768 struct sk_buff *skb;
1769 u32 txlen, tx_blocks = 0, tries, len;
1770 u32 block_retry_cnt = 0;
fc331460
AP
1771 dma_addr_t buf_pa;
1772 struct pcie_service_card *card = adapter->card;
dd04e6ac 1773 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee
AK
1774
1775 if (!firmware || !firmware_len) {
f57c1edc
YAP
1776 dev_err(adapter->dev,
1777 "No firmware image found! Terminating download\n");
d930faee
AK
1778 return -1;
1779 }
1780
1781 dev_dbg(adapter->dev, "info: Downloading FW image (%d bytes)\n",
f57c1edc 1782 firmware_len);
d930faee
AK
1783
1784 if (mwifiex_pcie_disable_host_int(adapter)) {
f57c1edc
YAP
1785 dev_err(adapter->dev,
1786 "%s: Disabling interrupts failed.\n", __func__);
d930faee
AK
1787 return -1;
1788 }
1789
1790 skb = dev_alloc_skb(MWIFIEX_UPLD_SIZE);
1791 if (!skb) {
1792 ret = -ENOMEM;
1793 goto done;
1794 }
d930faee
AK
1795
1796 /* Perform firmware data transfer */
1797 do {
1798 u32 ireg_intr = 0;
1799
1800 /* More data? */
1801 if (offset >= firmware_len)
1802 break;
1803
1804 for (tries = 0; tries < MAX_POLL_TRIES; tries++) {
dd04e6ac 1805 ret = mwifiex_read_reg(adapter, reg->cmd_size,
d930faee
AK
1806 &len);
1807 if (ret) {
f57c1edc
YAP
1808 dev_warn(adapter->dev,
1809 "Failed reading len from boot code\n");
d930faee
AK
1810 goto done;
1811 }
1812 if (len)
1813 break;
e7891ba2 1814 usleep_range(10, 20);
d930faee
AK
1815 }
1816
1817 if (!len) {
1818 break;
1819 } else if (len > MWIFIEX_UPLD_SIZE) {
1820 pr_err("FW download failure @ %d, invalid length %d\n",
f57c1edc 1821 offset, len);
d930faee
AK
1822 ret = -1;
1823 goto done;
1824 }
1825
1826 txlen = len;
1827
1828 if (len & BIT(0)) {
1829 block_retry_cnt++;
1830 if (block_retry_cnt > MAX_WRITE_IOMEM_RETRY) {
1831 pr_err("FW download failure @ %d, over max "
1832 "retry count\n", offset);
1833 ret = -1;
1834 goto done;
1835 }
1836 dev_err(adapter->dev, "FW CRC error indicated by the "
f57c1edc
YAP
1837 "helper: len = 0x%04X, txlen = %d\n",
1838 len, txlen);
d930faee
AK
1839 len &= ~BIT(0);
1840 /* Setting this to 0 to resend from same offset */
1841 txlen = 0;
1842 } else {
1843 block_retry_cnt = 0;
1844 /* Set blocksize to transfer - checking for
1845 last block */
1846 if (firmware_len - offset < txlen)
1847 txlen = firmware_len - offset;
1848
1849 dev_dbg(adapter->dev, ".");
1850
dd04e6ac
AP
1851 tx_blocks = (txlen + card->pcie.blksz_fw_dl - 1) /
1852 card->pcie.blksz_fw_dl;
d930faee
AK
1853
1854 /* Copy payload to buffer */
1855 memmove(skb->data, &firmware[offset], txlen);
1856 }
1857
1858 skb_put(skb, MWIFIEX_UPLD_SIZE - skb->len);
dd04e6ac 1859 skb_trim(skb, tx_blocks * card->pcie.blksz_fw_dl);
d930faee
AK
1860
1861 /* Send the boot command to device */
1862 if (mwifiex_pcie_send_boot_cmd(adapter, skb)) {
f57c1edc
YAP
1863 dev_err(adapter->dev,
1864 "Failed to send firmware download command\n");
d930faee
AK
1865 ret = -1;
1866 goto done;
1867 }
fc331460
AP
1868
1869 MWIFIEX_SKB_PACB(skb, &buf_pa);
1870
d930faee
AK
1871 /* Wait for the command done interrupt */
1872 do {
1873 if (mwifiex_read_reg(adapter, PCIE_CPU_INT_STATUS,
1874 &ireg_intr)) {
1875 dev_err(adapter->dev, "%s: Failed to read "
f57c1edc
YAP
1876 "interrupt status during fw dnld.\n",
1877 __func__);
fc331460
AP
1878 pci_unmap_single(card->dev, buf_pa, skb->len,
1879 PCI_DMA_TODEVICE);
d930faee
AK
1880 ret = -1;
1881 goto done;
1882 }
1883 } while ((ireg_intr & CPU_INTR_DOOR_BELL) ==
1884 CPU_INTR_DOOR_BELL);
fc331460
AP
1885
1886 pci_unmap_single(card->dev, buf_pa, skb->len,
1887 PCI_DMA_TODEVICE);
1888
d930faee
AK
1889 offset += txlen;
1890 } while (true);
1891
1892 dev_dbg(adapter->dev, "info:\nFW download over, size %d bytes\n",
f57c1edc 1893 offset);
d930faee
AK
1894
1895 ret = 0;
1896
1897done:
1898 dev_kfree_skb_any(skb);
1899 return ret;
1900}
1901
1902/*
1903 * This function checks the firmware status in card.
1904 *
1905 * The winner interface is also determined by this function.
1906 */
1907static int
1908mwifiex_check_fw_status(struct mwifiex_adapter *adapter, u32 poll_num)
1909{
1910 int ret = 0;
1911 u32 firmware_stat, winner_status;
dd04e6ac
AP
1912 struct pcie_service_card *card = adapter->card;
1913 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee
AK
1914 u32 tries;
1915
1916 /* Mask spurios interrupts */
1917 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_STATUS_MASK,
f57c1edc 1918 HOST_INTR_MASK)) {
d930faee
AK
1919 dev_warn(adapter->dev, "Write register failed\n");
1920 return -1;
1921 }
1922
1923 dev_dbg(adapter->dev, "Setting driver ready signature\n");
dd04e6ac
AP
1924 if (mwifiex_write_reg(adapter, reg->drv_rdy,
1925 FIRMWARE_READY_PCIE)) {
f57c1edc
YAP
1926 dev_err(adapter->dev,
1927 "Failed to write driver ready signature\n");
d930faee
AK
1928 return -1;
1929 }
1930
1931 /* Wait for firmware initialization event */
1932 for (tries = 0; tries < poll_num; tries++) {
dd04e6ac 1933 if (mwifiex_read_reg(adapter, reg->fw_status,
d930faee
AK
1934 &firmware_stat))
1935 ret = -1;
1936 else
1937 ret = 0;
1938 if (ret)
1939 continue;
1940 if (firmware_stat == FIRMWARE_READY_PCIE) {
1941 ret = 0;
1942 break;
1943 } else {
a76b20e5 1944 msleep(100);
d930faee
AK
1945 ret = -1;
1946 }
1947 }
1948
1949 if (ret) {
dd04e6ac 1950 if (mwifiex_read_reg(adapter, reg->fw_status,
d930faee
AK
1951 &winner_status))
1952 ret = -1;
1953 else if (!winner_status) {
1954 dev_err(adapter->dev, "PCI-E is the winner\n");
1955 adapter->winner = 1;
d930faee 1956 } else {
f57c1edc
YAP
1957 dev_err(adapter->dev,
1958 "PCI-E is not the winner <%#x,%d>, exit dnld\n",
1959 ret, adapter->winner);
d930faee
AK
1960 }
1961 }
1962
1963 return ret;
1964}
1965
1966/*
1967 * This function reads the interrupt status from card.
1968 */
1969static void mwifiex_interrupt_status(struct mwifiex_adapter *adapter)
1970{
1971 u32 pcie_ireg;
1972 unsigned long flags;
1973
1974 if (!mwifiex_pcie_ok_to_access_hw(adapter))
1975 return;
1976
1977 if (mwifiex_read_reg(adapter, PCIE_HOST_INT_STATUS, &pcie_ireg)) {
1978 dev_warn(adapter->dev, "Read register failed\n");
1979 return;
1980 }
1981
1982 if ((pcie_ireg != 0xFFFFFFFF) && (pcie_ireg)) {
1983
1984 mwifiex_pcie_disable_host_int(adapter);
1985
1986 /* Clear the pending interrupts */
1987 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_STATUS,
1988 ~pcie_ireg)) {
1989 dev_warn(adapter->dev, "Write register failed\n");
1990 return;
1991 }
1992 spin_lock_irqsave(&adapter->int_lock, flags);
1993 adapter->int_status |= pcie_ireg;
1994 spin_unlock_irqrestore(&adapter->int_lock, flags);
1995
1996 if (pcie_ireg & HOST_INTR_CMD_DONE) {
1997 if ((adapter->ps_state == PS_STATE_SLEEP_CFM) ||
1998 (adapter->ps_state == PS_STATE_SLEEP)) {
1999 mwifiex_pcie_enable_host_int(adapter);
2000 if (mwifiex_write_reg(adapter,
f57c1edc
YAP
2001 PCIE_CPU_INT_EVENT,
2002 CPU_INTR_SLEEP_CFM_DONE)
2003 ) {
2004 dev_warn(adapter->dev,
2005 "Write register failed\n");
d930faee
AK
2006 return;
2007
2008 }
2009 }
2010 } else if (!adapter->pps_uapsd_mode &&
c24d992a
AP
2011 adapter->ps_state == PS_STATE_SLEEP &&
2012 mwifiex_pcie_ok_to_access_hw(adapter)) {
d930faee
AK
2013 /* Potentially for PCIe we could get other
2014 * interrupts like shared. Don't change power
2015 * state until cookie is set */
c24d992a
AP
2016 adapter->ps_state = PS_STATE_AWAKE;
2017 adapter->pm_wakeup_fw_try = false;
d930faee
AK
2018 }
2019 }
2020}
2021
2022/*
2023 * Interrupt handler for PCIe root port
2024 *
2025 * This function reads the interrupt status from firmware and assigns
2026 * the main process in workqueue which will handle the interrupt.
2027 */
2028static irqreturn_t mwifiex_pcie_interrupt(int irq, void *context)
2029{
2030 struct pci_dev *pdev = (struct pci_dev *)context;
2031 struct pcie_service_card *card;
2032 struct mwifiex_adapter *adapter;
2033
2034 if (!pdev) {
2035 pr_debug("info: %s: pdev is NULL\n", (u8 *)pdev);
2036 goto exit;
2037 }
2038
b2a31204 2039 card = pci_get_drvdata(pdev);
d930faee
AK
2040 if (!card || !card->adapter) {
2041 pr_debug("info: %s: card=%p adapter=%p\n", __func__, card,
f57c1edc 2042 card ? card->adapter : NULL);
d930faee
AK
2043 goto exit;
2044 }
2045 adapter = card->adapter;
2046
2047 if (adapter->surprise_removed)
2048 goto exit;
2049
2050 mwifiex_interrupt_status(adapter);
2051 queue_work(adapter->workqueue, &adapter->main_work);
2052
2053exit:
2054 return IRQ_HANDLED;
2055}
2056
2057/*
2058 * This function checks the current interrupt status.
2059 *
2060 * The following interrupts are checked and handled by this function -
2061 * - Data sent
2062 * - Command sent
2063 * - Command received
2064 * - Packets received
2065 * - Events received
2066 *
2067 * In case of Rx packets received, the packets are uploaded from card to
2068 * host and processed accordingly.
2069 */
2070static int mwifiex_process_int_status(struct mwifiex_adapter *adapter)
2071{
2072 int ret;
659c4788 2073 u32 pcie_ireg;
d930faee
AK
2074 unsigned long flags;
2075
2076 spin_lock_irqsave(&adapter->int_lock, flags);
2077 /* Clear out unused interrupts */
659c4788
AP
2078 pcie_ireg = adapter->int_status;
2079 adapter->int_status = 0;
d930faee
AK
2080 spin_unlock_irqrestore(&adapter->int_lock, flags);
2081
659c4788
AP
2082 while (pcie_ireg & HOST_INTR_MASK) {
2083 if (pcie_ireg & HOST_INTR_DNLD_DONE) {
2084 pcie_ireg &= ~HOST_INTR_DNLD_DONE;
e7f767a7
AP
2085 dev_dbg(adapter->dev, "info: TX DNLD Done\n");
2086 ret = mwifiex_pcie_send_data_complete(adapter);
2087 if (ret)
2088 return ret;
d930faee 2089 }
659c4788
AP
2090 if (pcie_ireg & HOST_INTR_UPLD_RDY) {
2091 pcie_ireg &= ~HOST_INTR_UPLD_RDY;
d930faee
AK
2092 dev_dbg(adapter->dev, "info: Rx DATA\n");
2093 ret = mwifiex_pcie_process_recv_data(adapter);
2094 if (ret)
2095 return ret;
2096 }
659c4788
AP
2097 if (pcie_ireg & HOST_INTR_EVENT_RDY) {
2098 pcie_ireg &= ~HOST_INTR_EVENT_RDY;
d930faee
AK
2099 dev_dbg(adapter->dev, "info: Rx EVENT\n");
2100 ret = mwifiex_pcie_process_event_ready(adapter);
2101 if (ret)
2102 return ret;
2103 }
2104
659c4788
AP
2105 if (pcie_ireg & HOST_INTR_CMD_DONE) {
2106 pcie_ireg &= ~HOST_INTR_CMD_DONE;
d930faee 2107 if (adapter->cmd_sent) {
f57c1edc
YAP
2108 dev_dbg(adapter->dev,
2109 "info: CMD sent Interrupt\n");
d930faee
AK
2110 adapter->cmd_sent = false;
2111 }
2112 /* Handle command response */
2113 ret = mwifiex_pcie_process_cmd_complete(adapter);
2114 if (ret)
2115 return ret;
2116 }
2117
2118 if (mwifiex_pcie_ok_to_access_hw(adapter)) {
2119 if (mwifiex_read_reg(adapter, PCIE_HOST_INT_STATUS,
2120 &pcie_ireg)) {
f57c1edc
YAP
2121 dev_warn(adapter->dev,
2122 "Read register failed\n");
d930faee
AK
2123 return -1;
2124 }
2125
2126 if ((pcie_ireg != 0xFFFFFFFF) && (pcie_ireg)) {
2127 if (mwifiex_write_reg(adapter,
f57c1edc
YAP
2128 PCIE_HOST_INT_STATUS,
2129 ~pcie_ireg)) {
2130 dev_warn(adapter->dev,
2131 "Write register failed\n");
d930faee
AK
2132 return -1;
2133 }
d930faee
AK
2134 }
2135
2136 }
2137 }
2138 dev_dbg(adapter->dev, "info: cmd_sent=%d data_sent=%d\n",
f57c1edc 2139 adapter->cmd_sent, adapter->data_sent);
b2fda1f6
AP
2140 if (adapter->ps_state != PS_STATE_SLEEP)
2141 mwifiex_pcie_enable_host_int(adapter);
d930faee
AK
2142
2143 return 0;
2144}
2145
2146/*
2147 * This function downloads data from driver to card.
2148 *
2149 * Both commands and data packets are transferred to the card by this
2150 * function.
2151 *
2152 * This function adds the PCIE specific header to the front of the buffer
2153 * before transferring. The header contains the length of the packet and
2154 * the type. The firmware handles the packets based upon this set type.
2155 */
2156static int mwifiex_pcie_host_to_card(struct mwifiex_adapter *adapter, u8 type,
2157 struct sk_buff *skb,
2158 struct mwifiex_tx_param *tx_param)
2159{
fa161cb7
DC
2160 if (!skb) {
2161 dev_err(adapter->dev, "Passed NULL skb to %s\n", __func__);
d930faee
AK
2162 return -1;
2163 }
2164
2165 if (type == MWIFIEX_TYPE_DATA)
e7f767a7 2166 return mwifiex_pcie_send_data(adapter, skb, tx_param);
d930faee
AK
2167 else if (type == MWIFIEX_TYPE_CMD)
2168 return mwifiex_pcie_send_cmd(adapter, skb);
2169
2170 return 0;
2171}
2172
2173/*
2174 * This function initializes the PCI-E host memory space, WCB rings, etc.
2175 *
2176 * The following initializations steps are followed -
2177 * - Allocate TXBD ring buffers
2178 * - Allocate RXBD ring buffers
2179 * - Allocate event BD ring buffers
2180 * - Allocate command response ring buffer
2181 * - Allocate sleep cookie buffer
2182 */
2183static int mwifiex_pcie_init(struct mwifiex_adapter *adapter)
2184{
2185 struct pcie_service_card *card = adapter->card;
2186 int ret;
2187 struct pci_dev *pdev = card->dev;
52301a81 2188 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee
AK
2189
2190 pci_set_drvdata(pdev, card);
2191
2192 ret = pci_enable_device(pdev);
2193 if (ret)
2194 goto err_enable_dev;
2195
2196 pci_set_master(pdev);
2197
2198 dev_dbg(adapter->dev, "try set_consistent_dma_mask(32)\n");
2199 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
2200 if (ret) {
2201 dev_err(adapter->dev, "set_dma_mask(32) failed\n");
2202 goto err_set_dma_mask;
2203 }
2204
2205 ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
2206 if (ret) {
2207 dev_err(adapter->dev, "set_consistent_dma_mask(64) failed\n");
2208 goto err_set_dma_mask;
2209 }
2210
2211 ret = pci_request_region(pdev, 0, DRV_NAME);
2212 if (ret) {
2213 dev_err(adapter->dev, "req_reg(0) error\n");
2214 goto err_req_region0;
2215 }
2216 card->pci_mmap = pci_iomap(pdev, 0, 0);
2217 if (!card->pci_mmap) {
2218 dev_err(adapter->dev, "iomap(0) error\n");
3220712d 2219 ret = -EIO;
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2220 goto err_iomap0;
2221 }
2222 ret = pci_request_region(pdev, 2, DRV_NAME);
2223 if (ret) {
2224 dev_err(adapter->dev, "req_reg(2) error\n");
2225 goto err_req_region2;
2226 }
2227 card->pci_mmap1 = pci_iomap(pdev, 2, 0);
2228 if (!card->pci_mmap1) {
2229 dev_err(adapter->dev, "iomap(2) error\n");
3220712d 2230 ret = -EIO;
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2231 goto err_iomap2;
2232 }
2233
f57c1edc
YAP
2234 dev_dbg(adapter->dev,
2235 "PCI memory map Virt0: %p PCI memory map Virt2: %p\n",
2236 card->pci_mmap, card->pci_mmap1);
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2237
2238 card->cmdrsp_buf = NULL;
2239 ret = mwifiex_pcie_create_txbd_ring(adapter);
2240 if (ret)
2241 goto err_cre_txbd;
2242 ret = mwifiex_pcie_create_rxbd_ring(adapter);
2243 if (ret)
2244 goto err_cre_rxbd;
2245 ret = mwifiex_pcie_create_evtbd_ring(adapter);
2246 if (ret)
2247 goto err_cre_evtbd;
2248 ret = mwifiex_pcie_alloc_cmdrsp_buf(adapter);
2249 if (ret)
2250 goto err_alloc_cmdbuf;
52301a81
AP
2251 if (reg->sleep_cookie) {
2252 ret = mwifiex_pcie_alloc_sleep_cookie_buf(adapter);
2253 if (ret)
2254 goto err_alloc_cookie;
2255 } else {
2256 card->sleep_cookie_vbase = NULL;
2257 }
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2258 return ret;
2259
2260err_alloc_cookie:
2261 mwifiex_pcie_delete_cmdrsp_buf(adapter);
2262err_alloc_cmdbuf:
2263 mwifiex_pcie_delete_evtbd_ring(adapter);
2264err_cre_evtbd:
2265 mwifiex_pcie_delete_rxbd_ring(adapter);
2266err_cre_rxbd:
2267 mwifiex_pcie_delete_txbd_ring(adapter);
2268err_cre_txbd:
2269 pci_iounmap(pdev, card->pci_mmap1);
2270err_iomap2:
2271 pci_release_region(pdev, 2);
2272err_req_region2:
2273 pci_iounmap(pdev, card->pci_mmap);
2274err_iomap0:
2275 pci_release_region(pdev, 0);
2276err_req_region0:
2277err_set_dma_mask:
2278 pci_disable_device(pdev);
2279err_enable_dev:
2280 pci_set_drvdata(pdev, NULL);
2281 return ret;
2282}
2283
2284/*
2285 * This function cleans up the allocated card buffers.
2286 *
2287 * The following are freed by this function -
2288 * - TXBD ring buffers
2289 * - RXBD ring buffers
2290 * - Event BD ring buffers
2291 * - Command response ring buffer
2292 * - Sleep cookie buffer
2293 */
2294static void mwifiex_pcie_cleanup(struct mwifiex_adapter *adapter)
2295{
2296 struct pcie_service_card *card = adapter->card;
2297 struct pci_dev *pdev = card->dev;
dd04e6ac 2298 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee 2299
d930faee 2300 if (user_rmmod) {
fc331460 2301 dev_dbg(adapter->dev, "Clearing driver ready signature\n");
dd04e6ac 2302 if (mwifiex_write_reg(adapter, reg->drv_rdy, 0x00000000))
f57c1edc
YAP
2303 dev_err(adapter->dev,
2304 "Failed to write driver not-ready signature\n");
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2305 }
2306
2307 if (pdev) {
2308 pci_iounmap(pdev, card->pci_mmap);
2309 pci_iounmap(pdev, card->pci_mmap1);
5b0d9b21 2310 pci_disable_device(pdev);
c380aafb
YAP
2311 pci_release_region(pdev, 2);
2312 pci_release_region(pdev, 0);
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AK
2313 pci_set_drvdata(pdev, NULL);
2314 }
3c59e328 2315 kfree(card);
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2316}
2317
2318/*
2319 * This function registers the PCIE device.
2320 *
2321 * PCIE IRQ is claimed, block size is set and driver data is initialized.
2322 */
2323static int mwifiex_register_dev(struct mwifiex_adapter *adapter)
2324{
2325 int ret;
2326 struct pcie_service_card *card = adapter->card;
2327 struct pci_dev *pdev = card->dev;
2328
2329 /* save adapter pointer in card */
2330 card->adapter = adapter;
2331
2332 ret = request_irq(pdev->irq, mwifiex_pcie_interrupt, IRQF_SHARED,
2333 "MRVL_PCIE", pdev);
2334 if (ret) {
2335 pr_err("request_irq failed: ret=%d\n", ret);
2336 adapter->card = NULL;
2337 return -1;
2338 }
2339
2340 adapter->dev = &pdev->dev;
dd04e6ac 2341 strcpy(adapter->fw_name, card->pcie.firmware);
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2342
2343 return 0;
2344}
2345
2346/*
2347 * This function unregisters the PCIE device.
2348 *
2349 * The PCIE IRQ is released, the function is disabled and driver
2350 * data is set to null.
2351 */
2352static void mwifiex_unregister_dev(struct mwifiex_adapter *adapter)
2353{
2354 struct pcie_service_card *card = adapter->card;
52301a81 2355 const struct mwifiex_pcie_card_reg *reg;
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2356
2357 if (card) {
2358 dev_dbg(adapter->dev, "%s(): calling free_irq()\n", __func__);
2359 free_irq(card->dev->irq, card->dev);
fc331460 2360
52301a81
AP
2361 reg = card->pcie.reg;
2362 if (reg->sleep_cookie)
2363 mwifiex_pcie_delete_sleep_cookie_buf(adapter);
2364
fc331460
AP
2365 mwifiex_pcie_delete_cmdrsp_buf(adapter);
2366 mwifiex_pcie_delete_evtbd_ring(adapter);
2367 mwifiex_pcie_delete_rxbd_ring(adapter);
2368 mwifiex_pcie_delete_txbd_ring(adapter);
2369 card->cmdrsp_buf = NULL;
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2370 }
2371}
2372
2373static struct mwifiex_if_ops pcie_ops = {
2374 .init_if = mwifiex_pcie_init,
2375 .cleanup_if = mwifiex_pcie_cleanup,
2376 .check_fw_status = mwifiex_check_fw_status,
2377 .prog_fw = mwifiex_prog_fw_w_helper,
2378 .register_dev = mwifiex_register_dev,
2379 .unregister_dev = mwifiex_unregister_dev,
2380 .enable_int = mwifiex_pcie_enable_host_int,
2381 .process_int_status = mwifiex_process_int_status,
2382 .host_to_card = mwifiex_pcie_host_to_card,
2383 .wakeup = mwifiex_pm_wakeup_card,
2384 .wakeup_complete = mwifiex_pm_wakeup_card_complete,
2385
2386 /* PCIE specific */
2387 .cmdrsp_complete = mwifiex_pcie_cmdrsp_complete,
2388 .event_complete = mwifiex_pcie_event_complete,
2389 .update_mp_end_port = NULL,
2390 .cleanup_mpa_buf = NULL,
c6d1d87a 2391 .init_fw_port = mwifiex_pcie_init_fw_port,
fbd7e7ac 2392 .clean_pcie_ring = mwifiex_clean_pcie_ring_buf,
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2393};
2394
2395/*
2396 * This function initializes the PCIE driver module.
2397 *
2398 * This initiates the semaphore and registers the device with
2399 * PCIE bus.
2400 */
2401static int mwifiex_pcie_init_module(void)
2402{
2403 int ret;
2404
ca8f2112 2405 pr_debug("Marvell PCIe Driver\n");
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2406
2407 sema_init(&add_remove_card_sem, 1);
2408
2409 /* Clear the flag in case user removes the card. */
2410 user_rmmod = 0;
2411
2412 ret = pci_register_driver(&mwifiex_pcie);
2413 if (ret)
2414 pr_err("Driver register failed!\n");
2415 else
2416 pr_debug("info: Driver registered successfully!\n");
2417
2418 return ret;
2419}
2420
2421/*
2422 * This function cleans up the PCIE driver.
2423 *
2424 * The following major steps are followed for cleanup -
2425 * - Resume the device if its suspended
2426 * - Disconnect the device if connected
2427 * - Shutdown the firmware
2428 * - Unregister the device from PCIE bus.
2429 */
2430static void mwifiex_pcie_cleanup_module(void)
2431{
2432 if (!down_interruptible(&add_remove_card_sem))
2433 up(&add_remove_card_sem);
2434
2435 /* Set the flag as user is removing this module. */
2436 user_rmmod = 1;
2437
2438 pci_unregister_driver(&mwifiex_pcie);
2439}
2440
2441module_init(mwifiex_pcie_init_module);
2442module_exit(mwifiex_pcie_cleanup_module);
2443
2444MODULE_AUTHOR("Marvell International Ltd.");
2445MODULE_DESCRIPTION("Marvell WiFi-Ex PCI-Express Driver version " PCIE_VERSION);
2446MODULE_VERSION(PCIE_VERSION);
2447MODULE_LICENSE("GPL v2");
ca8f2112
AP
2448MODULE_FIRMWARE(PCIE8766_DEFAULT_FW_NAME);
2449MODULE_FIRMWARE(PCIE8897_DEFAULT_FW_NAME);
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