rtlwifi: Rework Kconfig
[deliverable/linux.git] / drivers / net / wireless / mwifiex / pcie.c
CommitLineData
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1/*
2 * Marvell Wireless LAN device driver: PCIE specific handling
3 *
4 * Copyright (C) 2011, Marvell International Ltd.
5 *
6 * This software file (the "File") is distributed by Marvell International
7 * Ltd. under the terms of the GNU General Public License Version 2, June 1991
8 * (the "License"). You may use, redistribute and/or modify this File in
9 * accordance with the terms and conditions of the License, a copy of which
10 * is available by writing to the Free Software Foundation, Inc.,
11 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the
12 * worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt.
13 *
14 * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE
15 * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE
16 * ARE EXPRESSLY DISCLAIMED. The License provides additional details about
17 * this warranty disclaimer.
18 */
19
20#include <linux/firmware.h>
21
22#include "decl.h"
23#include "ioctl.h"
24#include "util.h"
25#include "fw.h"
26#include "main.h"
27#include "wmm.h"
28#include "11n.h"
29#include "pcie.h"
30
31#define PCIE_VERSION "1.0"
32#define DRV_NAME "Marvell mwifiex PCIe"
33
34static u8 user_rmmod;
35
36static struct mwifiex_if_ops pcie_ops;
37
38static struct semaphore add_remove_card_sem;
39static int mwifiex_pcie_enable_host_int(struct mwifiex_adapter *adapter);
40static int mwifiex_pcie_resume(struct pci_dev *pdev);
41
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42static int
43mwifiex_map_pci_memory(struct mwifiex_adapter *adapter, struct sk_buff *skb,
44 int size, int flags)
d930faee 45{
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46 struct pcie_service_card *card = adapter->card;
47 dma_addr_t buf_pa;
d930faee 48
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49 buf_pa = pci_map_single(card->dev, skb->data, size, flags);
50 if (pci_dma_mapping_error(card->dev, buf_pa)) {
51 dev_err(adapter->dev, "failed to map pci memory!\n");
52 return -1;
53 }
54 memcpy(skb->cb, &buf_pa, sizeof(dma_addr_t));
55 return 0;
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56}
57
58/*
59 * This function reads sleep cookie and checks if FW is ready
60 */
61static bool mwifiex_pcie_ok_to_access_hw(struct mwifiex_adapter *adapter)
62{
63 u32 *cookie_addr;
64 struct pcie_service_card *card = adapter->card;
65
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66 if (card->sleep_cookie_vbase) {
67 cookie_addr = (u32 *)card->sleep_cookie_vbase;
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68 dev_dbg(adapter->dev, "info: ACCESS_HW: sleep cookie=0x%x\n",
69 *cookie_addr);
70 if (*cookie_addr == FW_AWAKE_COOKIE)
71 return true;
72 }
73
74 return false;
75}
76
77/*
78 * This function probes an mwifiex device and registers it. It allocates
79 * the card structure, enables PCIE function number and initiates the
80 * device registration and initialization procedure by adding a logical
81 * interface.
82 */
83static int mwifiex_pcie_probe(struct pci_dev *pdev,
84 const struct pci_device_id *ent)
85{
86 struct pcie_service_card *card;
87
88 pr_debug("info: vendor=0x%4.04X device=0x%4.04X rev=%d\n",
f57c1edc 89 pdev->vendor, pdev->device, pdev->revision);
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90
91 card = kzalloc(sizeof(struct pcie_service_card), GFP_KERNEL);
e404decb 92 if (!card)
d930faee 93 return -ENOMEM;
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94
95 card->dev = pdev;
96
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97 if (ent->driver_data) {
98 struct mwifiex_pcie_device *data = (void *)ent->driver_data;
99 card->pcie.firmware = data->firmware;
100 card->pcie.reg = data->reg;
101 card->pcie.blksz_fw_dl = data->blksz_fw_dl;
102 }
103
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104 if (mwifiex_add_card(card, &add_remove_card_sem, &pcie_ops,
105 MWIFIEX_PCIE)) {
106 pr_err("%s failed\n", __func__);
107 kfree(card);
108 return -1;
109 }
110
111 return 0;
112}
113
114/*
115 * This function removes the interface and frees up the card structure.
116 */
117static void mwifiex_pcie_remove(struct pci_dev *pdev)
118{
119 struct pcie_service_card *card;
120 struct mwifiex_adapter *adapter;
f57c1edc 121 struct mwifiex_private *priv;
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122 int i;
123
124 card = pci_get_drvdata(pdev);
125 if (!card)
126 return;
127
128 adapter = card->adapter;
129 if (!adapter || !adapter->priv_num)
130 return;
131
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132 /* In case driver is removed when asynchronous FW load is in progress */
133 wait_for_completion(&adapter->fw_load);
134
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135 if (user_rmmod) {
136#ifdef CONFIG_PM
137 if (adapter->is_suspended)
138 mwifiex_pcie_resume(pdev);
139#endif
140
141 for (i = 0; i < adapter->priv_num; i++)
142 if ((GET_BSS_ROLE(adapter->priv[i]) ==
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143 MWIFIEX_BSS_ROLE_STA) &&
144 adapter->priv[i]->media_connected)
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145 mwifiex_deauthenticate(adapter->priv[i], NULL);
146
f57c1edc 147 priv = mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_ANY);
d930faee 148
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149 mwifiex_disable_auto_ds(priv);
150
151 mwifiex_init_shutdown_fw(priv, MWIFIEX_FUNC_SHUTDOWN);
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152 }
153
154 mwifiex_remove_card(card->adapter, &add_remove_card_sem);
155 kfree(card);
156}
157
158/*
159 * Kernel needs to suspend all functions separately. Therefore all
160 * registered functions must have drivers with suspend and resume
161 * methods. Failing that the kernel simply removes the whole card.
162 *
163 * If already not suspended, this function allocates and sends a host
164 * sleep activate request to the firmware and turns off the traffic.
165 */
166static int mwifiex_pcie_suspend(struct pci_dev *pdev, pm_message_t state)
167{
168 struct mwifiex_adapter *adapter;
169 struct pcie_service_card *card;
170 int hs_actived, i;
171
172 if (pdev) {
173 card = (struct pcie_service_card *) pci_get_drvdata(pdev);
83f0c6d1 174 if (!card || !card->adapter) {
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175 pr_err("Card or adapter structure is not valid\n");
176 return 0;
177 }
178 } else {
179 pr_err("PCIE device is not specified\n");
180 return 0;
181 }
182
183 adapter = card->adapter;
184
185 hs_actived = mwifiex_enable_hs(adapter);
186
187 /* Indicate device suspended */
188 adapter->is_suspended = true;
189
190 for (i = 0; i < adapter->priv_num; i++)
191 netif_carrier_off(adapter->priv[i]->netdev);
192
193 return 0;
194}
195
196/*
197 * Kernel needs to suspend all functions separately. Therefore all
198 * registered functions must have drivers with suspend and resume
199 * methods. Failing that the kernel simply removes the whole card.
200 *
201 * If already not resumed, this function turns on the traffic and
202 * sends a host sleep cancel request to the firmware.
203 */
204static int mwifiex_pcie_resume(struct pci_dev *pdev)
205{
206 struct mwifiex_adapter *adapter;
207 struct pcie_service_card *card;
208 int i;
209
210 if (pdev) {
211 card = (struct pcie_service_card *) pci_get_drvdata(pdev);
212 if (!card || !card->adapter) {
213 pr_err("Card or adapter structure is not valid\n");
214 return 0;
215 }
216 } else {
217 pr_err("PCIE device is not specified\n");
218 return 0;
219 }
220
221 adapter = card->adapter;
222
223 if (!adapter->is_suspended) {
224 dev_warn(adapter->dev, "Device already resumed\n");
225 return 0;
226 }
227
228 adapter->is_suspended = false;
229
230 for (i = 0; i < adapter->priv_num; i++)
231 if (adapter->priv[i]->media_connected)
232 netif_carrier_on(adapter->priv[i]->netdev);
233
234 mwifiex_cancel_hs(mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_STA),
f57c1edc 235 MWIFIEX_ASYNC_CMD);
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236
237 return 0;
238}
239
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240static DEFINE_PCI_DEVICE_TABLE(mwifiex_ids) = {
241 {
242 PCIE_VENDOR_ID_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8766P,
243 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
dd04e6ac 244 .driver_data = (unsigned long) &mwifiex_pcie8766,
d930faee 245 },
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246 {
247 PCIE_VENDOR_ID_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8897,
248 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
249 .driver_data = (unsigned long) &mwifiex_pcie8897,
250 },
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251 {},
252};
253
254MODULE_DEVICE_TABLE(pci, mwifiex_ids);
255
256/* PCI Device Driver */
257static struct pci_driver __refdata mwifiex_pcie = {
258 .name = "mwifiex_pcie",
259 .id_table = mwifiex_ids,
260 .probe = mwifiex_pcie_probe,
261 .remove = mwifiex_pcie_remove,
262#ifdef CONFIG_PM
263 /* Power Management Hooks */
264 .suspend = mwifiex_pcie_suspend,
265 .resume = mwifiex_pcie_resume,
266#endif
267};
268
269/*
270 * This function writes data into PCIE card register.
271 */
272static int mwifiex_write_reg(struct mwifiex_adapter *adapter, int reg, u32 data)
273{
274 struct pcie_service_card *card = adapter->card;
275
276 iowrite32(data, card->pci_mmap1 + reg);
277
278 return 0;
279}
280
281/*
282 * This function reads data from PCIE card register.
283 */
284static int mwifiex_read_reg(struct mwifiex_adapter *adapter, int reg, u32 *data)
285{
286 struct pcie_service_card *card = adapter->card;
287
288 *data = ioread32(card->pci_mmap1 + reg);
289
290 return 0;
291}
292
293/*
294 * This function wakes up the card.
295 *
296 * A host power up command is written to the card configuration
297 * register to wake up the card.
298 */
299static int mwifiex_pm_wakeup_card(struct mwifiex_adapter *adapter)
300{
301 int i = 0;
302
303 while (mwifiex_pcie_ok_to_access_hw(adapter)) {
304 i++;
e7891ba2 305 usleep_range(10, 20);
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306 /* 50ms max wait */
307 if (i == 50000)
308 break;
309 }
310
311 dev_dbg(adapter->dev, "event: Wakeup device...\n");
312
313 /* Enable interrupts or any chip access will wakeup device */
314 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_MASK, HOST_INTR_MASK)) {
315 dev_warn(adapter->dev, "Enable host interrupt failed\n");
316 return -1;
317 }
318
319 dev_dbg(adapter->dev, "PCIE wakeup: Setting PS_STATE_AWAKE\n");
320 adapter->ps_state = PS_STATE_AWAKE;
321
322 return 0;
323}
324
325/*
326 * This function is called after the card has woken up.
327 *
328 * The card configuration register is reset.
329 */
330static int mwifiex_pm_wakeup_card_complete(struct mwifiex_adapter *adapter)
331{
332 dev_dbg(adapter->dev, "cmd: Wakeup device completed\n");
333
334 return 0;
335}
336
337/*
338 * This function disables the host interrupt.
339 *
340 * The host interrupt mask is read, the disable bit is reset and
341 * written back to the card host interrupt mask register.
342 */
343static int mwifiex_pcie_disable_host_int(struct mwifiex_adapter *adapter)
344{
345 if (mwifiex_pcie_ok_to_access_hw(adapter)) {
346 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_MASK,
347 0x00000000)) {
348 dev_warn(adapter->dev, "Disable host interrupt failed\n");
349 return -1;
350 }
351 }
352
353 return 0;
354}
355
356/*
357 * This function enables the host interrupt.
358 *
359 * The host interrupt enable mask is written to the card
360 * host interrupt mask register.
361 */
362static int mwifiex_pcie_enable_host_int(struct mwifiex_adapter *adapter)
363{
364 if (mwifiex_pcie_ok_to_access_hw(adapter)) {
365 /* Simply write the mask to the register */
366 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_MASK,
367 HOST_INTR_MASK)) {
368 dev_warn(adapter->dev, "Enable host interrupt failed\n");
369 return -1;
370 }
371 }
372
373 return 0;
374}
375
376/*
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377 * This function initializes TX buffer ring descriptors
378 */
379static int mwifiex_init_txq_ring(struct mwifiex_adapter *adapter)
380{
381 struct pcie_service_card *card = adapter->card;
ca8f2112 382 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
0732484b 383 struct mwifiex_pcie_buf_desc *desc;
ca8f2112 384 struct mwifiex_pfu_buf_desc *desc2;
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385 int i;
386
387 for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) {
388 card->tx_buf_list[i] = NULL;
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389 if (reg->pfu_enabled) {
390 card->txbd_ring[i] = (void *)card->txbd_ring_vbase +
391 (sizeof(*desc2) * i);
392 desc2 = card->txbd_ring[i];
393 memset(desc2, 0, sizeof(*desc2));
394 } else {
395 card->txbd_ring[i] = (void *)card->txbd_ring_vbase +
396 (sizeof(*desc) * i);
397 desc = card->txbd_ring[i];
398 memset(desc, 0, sizeof(*desc));
399 }
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400 }
401
402 return 0;
403}
404
405/* This function initializes RX buffer ring descriptors. Each SKB is allocated
406 * here and after mapping PCI memory, its physical address is assigned to
407 * PCIE Rx buffer descriptor's physical address.
408 */
409static int mwifiex_init_rxq_ring(struct mwifiex_adapter *adapter)
410{
411 struct pcie_service_card *card = adapter->card;
ca8f2112 412 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
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413 struct sk_buff *skb;
414 struct mwifiex_pcie_buf_desc *desc;
ca8f2112 415 struct mwifiex_pfu_buf_desc *desc2;
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416 dma_addr_t buf_pa;
417 int i;
418
419 for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) {
420 /* Allocate skb here so that firmware can DMA data from it */
421 skb = dev_alloc_skb(MWIFIEX_RX_DATA_BUF_SIZE);
422 if (!skb) {
423 dev_err(adapter->dev,
424 "Unable to allocate skb for RX ring.\n");
425 kfree(card->rxbd_ring_vbase);
426 return -ENOMEM;
427 }
428
429 if (mwifiex_map_pci_memory(adapter, skb,
430 MWIFIEX_RX_DATA_BUF_SIZE,
431 PCI_DMA_FROMDEVICE))
432 return -1;
433
434 MWIFIEX_SKB_PACB(skb, &buf_pa);
435
436 dev_dbg(adapter->dev,
437 "info: RX ring: skb=%p len=%d data=%p buf_pa=%#x:%x\n",
438 skb, skb->len, skb->data, (u32)buf_pa,
439 (u32)((u64)buf_pa >> 32));
440
441 card->rx_buf_list[i] = skb;
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442 if (reg->pfu_enabled) {
443 card->rxbd_ring[i] = (void *)card->rxbd_ring_vbase +
444 (sizeof(*desc2) * i);
445 desc2 = card->rxbd_ring[i];
446 desc2->paddr = buf_pa;
447 desc2->len = (u16)skb->len;
448 desc2->frag_len = (u16)skb->len;
449 desc2->flags = reg->ring_flag_eop | reg->ring_flag_sop;
450 desc2->offset = 0;
451 } else {
452 card->rxbd_ring[i] = (void *)(card->rxbd_ring_vbase +
453 (sizeof(*desc) * i));
454 desc = card->rxbd_ring[i];
455 desc->paddr = buf_pa;
456 desc->len = (u16)skb->len;
457 desc->flags = 0;
458 }
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459 }
460
461 return 0;
462}
463
464/* This function initializes event buffer ring descriptors. Each SKB is
465 * allocated here and after mapping PCI memory, its physical address is assigned
466 * to PCIE Rx buffer descriptor's physical address
467 */
468static int mwifiex_pcie_init_evt_ring(struct mwifiex_adapter *adapter)
469{
470 struct pcie_service_card *card = adapter->card;
e05dc3e9 471 struct mwifiex_evt_buf_desc *desc;
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472 struct sk_buff *skb;
473 dma_addr_t buf_pa;
474 int i;
475
476 for (i = 0; i < MWIFIEX_MAX_EVT_BD; i++) {
477 /* Allocate skb here so that firmware can DMA data from it */
478 skb = dev_alloc_skb(MAX_EVENT_SIZE);
479 if (!skb) {
480 dev_err(adapter->dev,
481 "Unable to allocate skb for EVENT buf.\n");
482 kfree(card->evtbd_ring_vbase);
483 return -ENOMEM;
484 }
485 skb_put(skb, MAX_EVENT_SIZE);
486
487 if (mwifiex_map_pci_memory(adapter, skb, MAX_EVENT_SIZE,
488 PCI_DMA_FROMDEVICE))
489 return -1;
490
491 MWIFIEX_SKB_PACB(skb, &buf_pa);
492
493 dev_dbg(adapter->dev,
494 "info: EVT ring: skb=%p len=%d data=%p buf_pa=%#x:%x\n",
495 skb, skb->len, skb->data, (u32)buf_pa,
496 (u32)((u64)buf_pa >> 32));
497
498 card->evt_buf_list[i] = skb;
499 card->evtbd_ring[i] = (void *)(card->evtbd_ring_vbase +
500 (sizeof(*desc) * i));
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501 desc = card->evtbd_ring[i];
502 desc->paddr = buf_pa;
503 desc->len = (u16)skb->len;
504 desc->flags = 0;
505 }
506
507 return 0;
508}
509
510/* This function cleans up TX buffer rings. If any of the buffer list has valid
511 * SKB address, associated SKB is freed.
512 */
513static void mwifiex_cleanup_txq_ring(struct mwifiex_adapter *adapter)
514{
515 struct pcie_service_card *card = adapter->card;
ca8f2112 516 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
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517 struct sk_buff *skb;
518 struct mwifiex_pcie_buf_desc *desc;
ca8f2112 519 struct mwifiex_pfu_buf_desc *desc2;
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520 int i;
521
522 for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) {
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523 if (reg->pfu_enabled) {
524 desc2 = card->txbd_ring[i];
525 if (card->tx_buf_list[i]) {
526 skb = card->tx_buf_list[i];
527 pci_unmap_single(card->dev, desc2->paddr,
528 skb->len, PCI_DMA_TODEVICE);
529 dev_kfree_skb_any(skb);
530 }
531 memset(desc2, 0, sizeof(*desc2));
532 } else {
533 desc = card->txbd_ring[i];
534 if (card->tx_buf_list[i]) {
535 skb = card->tx_buf_list[i];
536 pci_unmap_single(card->dev, desc->paddr,
537 skb->len, PCI_DMA_TODEVICE);
538 dev_kfree_skb_any(skb);
539 }
540 memset(desc, 0, sizeof(*desc));
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541 }
542 card->tx_buf_list[i] = NULL;
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543 }
544
545 return;
546}
547
548/* This function cleans up RX buffer rings. If any of the buffer list has valid
549 * SKB address, associated SKB is freed.
550 */
551static void mwifiex_cleanup_rxq_ring(struct mwifiex_adapter *adapter)
552{
553 struct pcie_service_card *card = adapter->card;
ca8f2112 554 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
0732484b 555 struct mwifiex_pcie_buf_desc *desc;
ca8f2112 556 struct mwifiex_pfu_buf_desc *desc2;
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557 struct sk_buff *skb;
558 int i;
559
560 for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) {
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561 if (reg->pfu_enabled) {
562 desc2 = card->rxbd_ring[i];
563 if (card->rx_buf_list[i]) {
564 skb = card->rx_buf_list[i];
565 pci_unmap_single(card->dev, desc2->paddr,
566 skb->len, PCI_DMA_TODEVICE);
567 dev_kfree_skb_any(skb);
568 }
569 memset(desc2, 0, sizeof(*desc2));
570 } else {
571 desc = card->rxbd_ring[i];
572 if (card->rx_buf_list[i]) {
573 skb = card->rx_buf_list[i];
574 pci_unmap_single(card->dev, desc->paddr,
575 skb->len, PCI_DMA_TODEVICE);
576 dev_kfree_skb_any(skb);
577 }
578 memset(desc, 0, sizeof(*desc));
0732484b 579 }
ca8f2112 580 card->rx_buf_list[i] = NULL;
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581 }
582
583 return;
584}
585
586/* This function cleans up event buffer rings. If any of the buffer list has
587 * valid SKB address, associated SKB is freed.
588 */
589static void mwifiex_cleanup_evt_ring(struct mwifiex_adapter *adapter)
590{
591 struct pcie_service_card *card = adapter->card;
e05dc3e9 592 struct mwifiex_evt_buf_desc *desc;
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593 struct sk_buff *skb;
594 int i;
595
596 for (i = 0; i < MWIFIEX_MAX_EVT_BD; i++) {
597 desc = card->evtbd_ring[i];
598 if (card->evt_buf_list[i]) {
599 skb = card->evt_buf_list[i];
600 pci_unmap_single(card->dev, desc->paddr, MAX_EVENT_SIZE,
601 PCI_DMA_FROMDEVICE);
602 dev_kfree_skb_any(skb);
603 }
604 card->evt_buf_list[i] = NULL;
605 memset(desc, 0, sizeof(*desc));
606 }
607
608 return;
609}
610
611/* This function creates buffer descriptor ring for TX
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612 */
613static int mwifiex_pcie_create_txbd_ring(struct mwifiex_adapter *adapter)
614{
615 struct pcie_service_card *card = adapter->card;
dd04e6ac 616 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
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617
618 /*
619 * driver maintaines the write pointer and firmware maintaines the read
620 * pointer. The write pointer starts at 0 (zero) while the read pointer
621 * starts at zero with rollover bit set
622 */
623 card->txbd_wrptr = 0;
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624
625 if (reg->pfu_enabled)
626 card->txbd_rdptr = 0;
627 else
628 card->txbd_rdptr |= reg->tx_rollover_ind;
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629
630 /* allocate shared memory for the BD ring and divide the same in to
631 several descriptors */
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632 if (reg->pfu_enabled)
633 card->txbd_ring_size = sizeof(struct mwifiex_pfu_buf_desc) *
634 MWIFIEX_MAX_TXRX_BD;
635 else
636 card->txbd_ring_size = sizeof(struct mwifiex_pcie_buf_desc) *
637 MWIFIEX_MAX_TXRX_BD;
638
d930faee 639 dev_dbg(adapter->dev, "info: txbd_ring: Allocating %d bytes\n",
f57c1edc 640 card->txbd_ring_size);
fc331460
AP
641 card->txbd_ring_vbase = pci_alloc_consistent(card->dev,
642 card->txbd_ring_size,
643 &card->txbd_ring_pbase);
d930faee 644 if (!card->txbd_ring_vbase) {
fc331460
AP
645 dev_err(adapter->dev,
646 "allocate consistent memory (%d bytes) failed!\n",
647 card->txbd_ring_size);
8c53e42d 648 return -ENOMEM;
d930faee 649 }
f57c1edc
YAP
650 dev_dbg(adapter->dev,
651 "info: txbd_ring - base: %p, pbase: %#x:%x, len: %x\n",
fc331460 652 card->txbd_ring_vbase, (unsigned int)card->txbd_ring_pbase,
f57c1edc 653 (u32)((u64)card->txbd_ring_pbase >> 32), card->txbd_ring_size);
d930faee 654
0732484b 655 return mwifiex_init_txq_ring(adapter);
d930faee
AK
656}
657
658static int mwifiex_pcie_delete_txbd_ring(struct mwifiex_adapter *adapter)
659{
660 struct pcie_service_card *card = adapter->card;
dd04e6ac 661 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee 662
0732484b 663 mwifiex_cleanup_txq_ring(adapter);
d930faee 664
fc331460
AP
665 if (card->txbd_ring_vbase)
666 pci_free_consistent(card->dev, card->txbd_ring_size,
667 card->txbd_ring_vbase,
668 card->txbd_ring_pbase);
d930faee
AK
669 card->txbd_ring_size = 0;
670 card->txbd_wrptr = 0;
dd04e6ac 671 card->txbd_rdptr = 0 | reg->tx_rollover_ind;
d930faee 672 card->txbd_ring_vbase = NULL;
fc331460 673 card->txbd_ring_pbase = 0;
d930faee
AK
674
675 return 0;
676}
677
678/*
679 * This function creates buffer descriptor ring for RX
680 */
681static int mwifiex_pcie_create_rxbd_ring(struct mwifiex_adapter *adapter)
682{
683 struct pcie_service_card *card = adapter->card;
dd04e6ac 684 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee
AK
685
686 /*
687 * driver maintaines the read pointer and firmware maintaines the write
688 * pointer. The write pointer starts at 0 (zero) while the read pointer
689 * starts at zero with rollover bit set
690 */
691 card->rxbd_wrptr = 0;
dd04e6ac 692 card->rxbd_rdptr = reg->rx_rollover_ind;
d930faee 693
ca8f2112
AP
694 if (reg->pfu_enabled)
695 card->rxbd_ring_size = sizeof(struct mwifiex_pfu_buf_desc) *
696 MWIFIEX_MAX_TXRX_BD;
697 else
698 card->rxbd_ring_size = sizeof(struct mwifiex_pcie_buf_desc) *
699 MWIFIEX_MAX_TXRX_BD;
700
d930faee 701 dev_dbg(adapter->dev, "info: rxbd_ring: Allocating %d bytes\n",
f57c1edc 702 card->rxbd_ring_size);
fc331460
AP
703 card->rxbd_ring_vbase = pci_alloc_consistent(card->dev,
704 card->rxbd_ring_size,
705 &card->rxbd_ring_pbase);
d930faee 706 if (!card->rxbd_ring_vbase) {
fc331460
AP
707 dev_err(adapter->dev,
708 "allocate consistent memory (%d bytes) failed!\n",
709 card->rxbd_ring_size);
8c53e42d 710 return -ENOMEM;
d930faee 711 }
d930faee 712
f57c1edc
YAP
713 dev_dbg(adapter->dev,
714 "info: rxbd_ring - base: %p, pbase: %#x:%x, len: %#x\n",
715 card->rxbd_ring_vbase, (u32)card->rxbd_ring_pbase,
716 (u32)((u64)card->rxbd_ring_pbase >> 32),
717 card->rxbd_ring_size);
d930faee 718
0732484b 719 return mwifiex_init_rxq_ring(adapter);
d930faee
AK
720}
721
722/*
723 * This function deletes Buffer descriptor ring for RX
724 */
725static int mwifiex_pcie_delete_rxbd_ring(struct mwifiex_adapter *adapter)
726{
727 struct pcie_service_card *card = adapter->card;
dd04e6ac 728 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee 729
0732484b 730 mwifiex_cleanup_rxq_ring(adapter);
d930faee 731
fc331460
AP
732 if (card->rxbd_ring_vbase)
733 pci_free_consistent(card->dev, card->rxbd_ring_size,
734 card->rxbd_ring_vbase,
735 card->rxbd_ring_pbase);
d930faee
AK
736 card->rxbd_ring_size = 0;
737 card->rxbd_wrptr = 0;
dd04e6ac 738 card->rxbd_rdptr = 0 | reg->rx_rollover_ind;
d930faee 739 card->rxbd_ring_vbase = NULL;
fc331460 740 card->rxbd_ring_pbase = 0;
d930faee
AK
741
742 return 0;
743}
744
745/*
746 * This function creates buffer descriptor ring for Events
747 */
748static int mwifiex_pcie_create_evtbd_ring(struct mwifiex_adapter *adapter)
749{
750 struct pcie_service_card *card = adapter->card;
dd04e6ac 751 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee
AK
752
753 /*
754 * driver maintaines the read pointer and firmware maintaines the write
755 * pointer. The write pointer starts at 0 (zero) while the read pointer
756 * starts at zero with rollover bit set
757 */
758 card->evtbd_wrptr = 0;
dd04e6ac 759 card->evtbd_rdptr = reg->evt_rollover_ind;
d930faee 760
e05dc3e9 761 card->evtbd_ring_size = sizeof(struct mwifiex_evt_buf_desc) *
ca8f2112
AP
762 MWIFIEX_MAX_EVT_BD;
763
d930faee 764 dev_dbg(adapter->dev, "info: evtbd_ring: Allocating %d bytes\n",
f57c1edc 765 card->evtbd_ring_size);
fc331460
AP
766 card->evtbd_ring_vbase = pci_alloc_consistent(card->dev,
767 card->evtbd_ring_size,
768 &card->evtbd_ring_pbase);
d930faee 769 if (!card->evtbd_ring_vbase) {
f57c1edc 770 dev_err(adapter->dev,
fc331460
AP
771 "allocate consistent memory (%d bytes) failed!\n",
772 card->evtbd_ring_size);
8c53e42d 773 return -ENOMEM;
d930faee 774 }
d930faee 775
f57c1edc
YAP
776 dev_dbg(adapter->dev,
777 "info: CMDRSP/EVT bd_ring - base: %p pbase: %#x:%x len: %#x\n",
778 card->evtbd_ring_vbase, (u32)card->evtbd_ring_pbase,
779 (u32)((u64)card->evtbd_ring_pbase >> 32),
780 card->evtbd_ring_size);
d930faee 781
0732484b 782 return mwifiex_pcie_init_evt_ring(adapter);
d930faee
AK
783}
784
785/*
786 * This function deletes Buffer descriptor ring for Events
787 */
788static int mwifiex_pcie_delete_evtbd_ring(struct mwifiex_adapter *adapter)
789{
790 struct pcie_service_card *card = adapter->card;
dd04e6ac 791 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee 792
0732484b 793 mwifiex_cleanup_evt_ring(adapter);
d930faee 794
fc331460
AP
795 if (card->evtbd_ring_vbase)
796 pci_free_consistent(card->dev, card->evtbd_ring_size,
797 card->evtbd_ring_vbase,
798 card->evtbd_ring_pbase);
d930faee 799 card->evtbd_wrptr = 0;
dd04e6ac 800 card->evtbd_rdptr = 0 | reg->evt_rollover_ind;
d930faee
AK
801 card->evtbd_ring_size = 0;
802 card->evtbd_ring_vbase = NULL;
fc331460 803 card->evtbd_ring_pbase = 0;
d930faee
AK
804
805 return 0;
806}
807
808/*
809 * This function allocates a buffer for CMDRSP
810 */
811static int mwifiex_pcie_alloc_cmdrsp_buf(struct mwifiex_adapter *adapter)
812{
813 struct pcie_service_card *card = adapter->card;
814 struct sk_buff *skb;
815
816 /* Allocate memory for receiving command response data */
817 skb = dev_alloc_skb(MWIFIEX_UPLD_SIZE);
818 if (!skb) {
f57c1edc
YAP
819 dev_err(adapter->dev,
820 "Unable to allocate skb for command response data.\n");
d930faee
AK
821 return -ENOMEM;
822 }
d930faee 823 skb_put(skb, MWIFIEX_UPLD_SIZE);
fc331460
AP
824 if (mwifiex_map_pci_memory(adapter, skb, MWIFIEX_UPLD_SIZE,
825 PCI_DMA_FROMDEVICE))
826 return -1;
d930faee 827
fc331460 828 card->cmdrsp_buf = skb;
d930faee
AK
829
830 return 0;
831}
832
833/*
834 * This function deletes a buffer for CMDRSP
835 */
836static int mwifiex_pcie_delete_cmdrsp_buf(struct mwifiex_adapter *adapter)
837{
838 struct pcie_service_card *card;
fc331460 839 dma_addr_t buf_pa;
d930faee
AK
840
841 if (!adapter)
842 return 0;
843
844 card = adapter->card;
845
fc331460
AP
846 if (card && card->cmdrsp_buf) {
847 MWIFIEX_SKB_PACB(card->cmdrsp_buf, &buf_pa);
848 pci_unmap_single(card->dev, buf_pa, MWIFIEX_UPLD_SIZE,
849 PCI_DMA_FROMDEVICE);
d930faee 850 dev_kfree_skb_any(card->cmdrsp_buf);
fc331460 851 }
d930faee 852
fc331460
AP
853 if (card && card->cmd_buf) {
854 MWIFIEX_SKB_PACB(card->cmd_buf, &buf_pa);
855 pci_unmap_single(card->dev, buf_pa, MWIFIEX_SIZE_OF_CMD_BUFFER,
856 PCI_DMA_TODEVICE);
d930faee 857 dev_kfree_skb_any(card->cmd_buf);
fc331460 858 }
d930faee
AK
859 return 0;
860}
861
862/*
863 * This function allocates a buffer for sleep cookie
864 */
865static int mwifiex_pcie_alloc_sleep_cookie_buf(struct mwifiex_adapter *adapter)
866{
d930faee
AK
867 struct pcie_service_card *card = adapter->card;
868
fc331460
AP
869 card->sleep_cookie_vbase = pci_alloc_consistent(card->dev, sizeof(u32),
870 &card->sleep_cookie_pbase);
871 if (!card->sleep_cookie_vbase) {
872 dev_err(adapter->dev, "pci_alloc_consistent failed!\n");
d930faee
AK
873 return -ENOMEM;
874 }
d930faee 875 /* Init val of Sleep Cookie */
fc331460 876 *(u32 *)card->sleep_cookie_vbase = FW_AWAKE_COOKIE;
d930faee
AK
877
878 dev_dbg(adapter->dev, "alloc_scook: sleep cookie=0x%x\n",
fc331460 879 *((u32 *)card->sleep_cookie_vbase));
d930faee
AK
880
881 return 0;
882}
883
884/*
885 * This function deletes buffer for sleep cookie
886 */
887static int mwifiex_pcie_delete_sleep_cookie_buf(struct mwifiex_adapter *adapter)
888{
889 struct pcie_service_card *card;
890
891 if (!adapter)
892 return 0;
893
894 card = adapter->card;
895
fc331460
AP
896 if (card && card->sleep_cookie_vbase) {
897 pci_free_consistent(card->dev, sizeof(u32),
898 card->sleep_cookie_vbase,
899 card->sleep_cookie_pbase);
900 card->sleep_cookie_vbase = NULL;
d930faee
AK
901 }
902
903 return 0;
904}
905
fbd7e7ac
AP
906/* This function flushes the TX buffer descriptor ring
907 * This function defined as handler is also called while cleaning TXRX
908 * during disconnect/ bss stop.
909 */
910static int mwifiex_clean_pcie_ring_buf(struct mwifiex_adapter *adapter)
911{
912 struct pcie_service_card *card = adapter->card;
dd04e6ac 913 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
fbd7e7ac
AP
914 u32 rdptr;
915
916 /* Read the TX ring read pointer set by firmware */
dd04e6ac 917 if (mwifiex_read_reg(adapter, reg->tx_rdptr, &rdptr)) {
fbd7e7ac 918 dev_err(adapter->dev,
dd04e6ac 919 "Flush TXBD: failed to read reg->tx_rdptr\n");
fbd7e7ac
AP
920 return -1;
921 }
922
923 if (!mwifiex_pcie_txbd_empty(card, rdptr)) {
924 card->txbd_flush = 1;
925 /* write pointer already set at last send
926 * send dnld-rdy intr again, wait for completion.
927 */
928 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
929 CPU_INTR_DNLD_RDY)) {
930 dev_err(adapter->dev,
931 "failed to assert dnld-rdy interrupt.\n");
932 return -1;
933 }
934 }
935 return 0;
936}
937
d930faee 938/*
e7f767a7 939 * This function unmaps and frees downloaded data buffer
d930faee 940 */
e7f767a7 941static int mwifiex_pcie_send_data_complete(struct mwifiex_adapter *adapter)
d930faee 942{
e7f767a7
AP
943 struct sk_buff *skb;
944 dma_addr_t buf_pa;
ca8f2112 945 u32 wrdoneidx, rdptr, num_tx_buffs, unmap_count = 0;
e05dc3e9 946 struct mwifiex_pcie_buf_desc *desc;
ca8f2112 947 struct mwifiex_pfu_buf_desc *desc2;
d930faee 948 struct pcie_service_card *card = adapter->card;
dd04e6ac 949 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee
AK
950
951 if (!mwifiex_pcie_ok_to_access_hw(adapter))
952 mwifiex_pm_wakeup_card(adapter);
953
954 /* Read the TX ring read pointer set by firmware */
dd04e6ac 955 if (mwifiex_read_reg(adapter, reg->tx_rdptr, &rdptr)) {
f57c1edc 956 dev_err(adapter->dev,
dd04e6ac 957 "SEND COMP: failed to read reg->tx_rdptr\n");
d930faee
AK
958 return -1;
959 }
960
e7f767a7
AP
961 dev_dbg(adapter->dev, "SEND COMP: rdptr_prev=0x%x, rdptr=0x%x\n",
962 card->txbd_rdptr, rdptr);
d930faee 963
ca8f2112 964 num_tx_buffs = MWIFIEX_MAX_TXRX_BD << reg->tx_start_ptr;
e7f767a7 965 /* free from previous txbd_rdptr to current txbd_rdptr */
dd04e6ac
AP
966 while (((card->txbd_rdptr & reg->tx_mask) !=
967 (rdptr & reg->tx_mask)) ||
968 ((card->txbd_rdptr & reg->tx_rollover_ind) !=
969 (rdptr & reg->tx_rollover_ind))) {
ca8f2112
AP
970 wrdoneidx = (card->txbd_rdptr & reg->tx_mask) >>
971 reg->tx_start_ptr;
e7f767a7
AP
972
973 skb = card->tx_buf_list[wrdoneidx];
974 if (skb) {
975 dev_dbg(adapter->dev,
976 "SEND COMP: Detach skb %p at txbd_rdidx=%d\n",
977 skb, wrdoneidx);
978 MWIFIEX_SKB_PACB(skb, &buf_pa);
979 pci_unmap_single(card->dev, buf_pa, skb->len,
980 PCI_DMA_TODEVICE);
981
982 unmap_count++;
983
984 if (card->txbd_flush)
985 mwifiex_write_data_complete(adapter, skb, 0,
986 -1);
987 else
988 mwifiex_write_data_complete(adapter, skb, 0, 0);
989 }
990
991 card->tx_buf_list[wrdoneidx] = NULL;
ca8f2112
AP
992
993 if (reg->pfu_enabled) {
994 desc2 = (void *)card->txbd_ring[wrdoneidx];
995 memset(desc2, 0, sizeof(*desc2));
996 } else {
997 desc = card->txbd_ring[wrdoneidx];
998 memset(desc, 0, sizeof(*desc));
999 }
1000 switch (card->dev->device) {
1001 case PCIE_DEVICE_ID_MARVELL_88W8766P:
1002 card->txbd_rdptr++;
1003 break;
1004 case PCIE_DEVICE_ID_MARVELL_88W8897:
1005 card->txbd_rdptr += reg->ring_tx_start_ptr;
1006 break;
1007 }
1008
e7f767a7 1009
dd04e6ac 1010 if ((card->txbd_rdptr & reg->tx_mask) == num_tx_buffs)
e7f767a7 1011 card->txbd_rdptr = ((card->txbd_rdptr &
dd04e6ac
AP
1012 reg->tx_rollover_ind) ^
1013 reg->tx_rollover_ind);
e7f767a7
AP
1014 }
1015
1016 if (unmap_count)
1017 adapter->data_sent = false;
1018
1019 if (card->txbd_flush) {
dd04e6ac
AP
1020 if (((card->txbd_wrptr & reg->tx_mask) ==
1021 (card->txbd_rdptr & reg->tx_mask)) &&
1022 ((card->txbd_wrptr & reg->tx_rollover_ind) !=
1023 (card->txbd_rdptr & reg->tx_rollover_ind)))
e7f767a7
AP
1024 card->txbd_flush = 0;
1025 else
1026 mwifiex_clean_pcie_ring_buf(adapter);
1027 }
1028
1029 return 0;
1030}
1031
1032/* This function sends data buffer to device. First 4 bytes of payload
1033 * are filled with payload length and payload type. Then this payload
1034 * is mapped to PCI device memory. Tx ring pointers are advanced accordingly.
1035 * Download ready interrupt to FW is deffered if Tx ring is not full and
1036 * additional payload can be accomodated.
1037 */
1038static int
1039mwifiex_pcie_send_data(struct mwifiex_adapter *adapter, struct sk_buff *skb,
1040 struct mwifiex_tx_param *tx_param)
1041{
1042 struct pcie_service_card *card = adapter->card;
dd04e6ac 1043 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
ca8f2112 1044 u32 wrindx, num_tx_buffs, rx_val;
e7f767a7
AP
1045 int ret;
1046 dma_addr_t buf_pa;
e05dc3e9 1047 struct mwifiex_pcie_buf_desc *desc;
ca8f2112 1048 struct mwifiex_pfu_buf_desc *desc2;
e7f767a7
AP
1049 __le16 *tmp;
1050
1051 if (!(skb->data && skb->len)) {
1052 dev_err(adapter->dev, "%s(): invalid parameter <%p, %#x>\n",
1053 __func__, skb->data, skb->len);
1054 return -1;
1055 }
1056
1057 if (!mwifiex_pcie_ok_to_access_hw(adapter))
1058 mwifiex_pm_wakeup_card(adapter);
1059
ca8f2112 1060 num_tx_buffs = MWIFIEX_MAX_TXRX_BD << reg->tx_start_ptr;
e7f767a7
AP
1061 dev_dbg(adapter->dev, "info: SEND DATA: <Rd: %#x, Wr: %#x>\n",
1062 card->txbd_rdptr, card->txbd_wrptr);
1063 if (mwifiex_pcie_txbd_not_full(card)) {
d930faee
AK
1064 u8 *payload;
1065
1066 adapter->data_sent = true;
e7f767a7 1067 payload = skb->data;
d930faee
AK
1068 tmp = (__le16 *)&payload[0];
1069 *tmp = cpu_to_le16((u16)skb->len);
1070 tmp = (__le16 *)&payload[2];
1071 *tmp = cpu_to_le16(MWIFIEX_TYPE_DATA);
e7f767a7
AP
1072
1073 if (mwifiex_map_pci_memory(adapter, skb, skb->len ,
1074 PCI_DMA_TODEVICE))
1075 return -1;
1076
ca8f2112 1077 wrindx = (card->txbd_wrptr & reg->tx_mask) >> reg->tx_start_ptr;
e7f767a7
AP
1078 MWIFIEX_SKB_PACB(skb, &buf_pa);
1079 card->tx_buf_list[wrindx] = skb;
d930faee 1080
ca8f2112
AP
1081 if (reg->pfu_enabled) {
1082 desc2 = (void *)card->txbd_ring[wrindx];
1083 desc2->paddr = buf_pa;
1084 desc2->len = (u16)skb->len;
1085 desc2->frag_len = (u16)skb->len;
1086 desc2->offset = 0;
1087 desc2->flags = MWIFIEX_BD_FLAG_FIRST_DESC |
1088 MWIFIEX_BD_FLAG_LAST_DESC;
1089 } else {
1090 desc = card->txbd_ring[wrindx];
1091 desc->paddr = buf_pa;
1092 desc->len = (u16)skb->len;
1093 desc->flags = MWIFIEX_BD_FLAG_FIRST_DESC |
1094 MWIFIEX_BD_FLAG_LAST_DESC;
1095 }
1096
1097 switch (card->dev->device) {
1098 case PCIE_DEVICE_ID_MARVELL_88W8766P:
1099 card->txbd_wrptr++;
1100 break;
1101 case PCIE_DEVICE_ID_MARVELL_88W8897:
1102 card->txbd_wrptr += reg->ring_tx_start_ptr;
1103 break;
1104 }
1105
1106 if ((card->txbd_wrptr & reg->tx_mask) == num_tx_buffs)
d930faee 1107 card->txbd_wrptr = ((card->txbd_wrptr &
dd04e6ac
AP
1108 reg->tx_rollover_ind) ^
1109 reg->tx_rollover_ind);
d930faee 1110
ca8f2112 1111 rx_val = card->rxbd_rdptr & reg->rx_wrap_mask;
dd04e6ac
AP
1112 /* Write the TX ring write pointer in to reg->tx_wrptr */
1113 if (mwifiex_write_reg(adapter, reg->tx_wrptr,
ca8f2112 1114 card->txbd_wrptr | rx_val)) {
f57c1edc 1115 dev_err(adapter->dev,
dd04e6ac 1116 "SEND DATA: failed to write reg->tx_wrptr\n");
e7f767a7
AP
1117 ret = -1;
1118 goto done_unmap;
d930faee 1119 }
e7f767a7
AP
1120 if ((mwifiex_pcie_txbd_not_full(card)) &&
1121 tx_param->next_pkt_len) {
1122 /* have more packets and TxBD still can hold more */
1123 dev_dbg(adapter->dev,
1124 "SEND DATA: delay dnld-rdy interrupt.\n");
1125 adapter->data_sent = false;
1126 } else {
1127 /* Send the TX ready interrupt */
1128 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
1129 CPU_INTR_DNLD_RDY)) {
1130 dev_err(adapter->dev,
1131 "SEND DATA: failed to assert dnld-rdy interrupt.\n");
1132 ret = -1;
1133 goto done_unmap;
1134 }
d930faee
AK
1135 }
1136 dev_dbg(adapter->dev, "info: SEND DATA: Updated <Rd: %#x, Wr: "
f57c1edc 1137 "%#x> and sent packet to firmware successfully\n",
e7f767a7 1138 card->txbd_rdptr, card->txbd_wrptr);
d930faee 1139 } else {
f57c1edc
YAP
1140 dev_dbg(adapter->dev,
1141 "info: TX Ring full, can't send packets to fw\n");
d930faee
AK
1142 adapter->data_sent = true;
1143 /* Send the TX ready interrupt */
1144 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
1145 CPU_INTR_DNLD_RDY))
f57c1edc
YAP
1146 dev_err(adapter->dev,
1147 "SEND DATA: failed to assert door-bell intr\n");
d930faee
AK
1148 return -EBUSY;
1149 }
1150
e7f767a7
AP
1151 return -EINPROGRESS;
1152done_unmap:
1153 MWIFIEX_SKB_PACB(skb, &buf_pa);
1154 pci_unmap_single(card->dev, buf_pa, skb->len, PCI_DMA_TODEVICE);
1155 card->tx_buf_list[wrindx] = NULL;
ca8f2112
AP
1156 if (reg->pfu_enabled)
1157 memset(desc2, 0, sizeof(*desc2));
1158 else
1159 memset(desc, 0, sizeof(*desc));
1160
e7f767a7 1161 return ret;
d930faee
AK
1162}
1163
1164/*
1165 * This function handles received buffer ring and
1166 * dispatches packets to upper
1167 */
1168static int mwifiex_pcie_process_recv_data(struct mwifiex_adapter *adapter)
1169{
1170 struct pcie_service_card *card = adapter->card;
dd04e6ac 1171 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
ca8f2112 1172 u32 wrptr, rd_index, tx_val;
e7f767a7 1173 dma_addr_t buf_pa;
d930faee
AK
1174 int ret = 0;
1175 struct sk_buff *skb_tmp = NULL;
e05dc3e9 1176 struct mwifiex_pcie_buf_desc *desc;
ca8f2112 1177 struct mwifiex_pfu_buf_desc *desc2;
d930faee 1178
e7f767a7
AP
1179 if (!mwifiex_pcie_ok_to_access_hw(adapter))
1180 mwifiex_pm_wakeup_card(adapter);
1181
d930faee 1182 /* Read the RX ring Write pointer set by firmware */
dd04e6ac 1183 if (mwifiex_read_reg(adapter, reg->rx_wrptr, &wrptr)) {
f57c1edc 1184 dev_err(adapter->dev,
dd04e6ac 1185 "RECV DATA: failed to read reg->rx_wrptr\n");
d930faee
AK
1186 ret = -1;
1187 goto done;
1188 }
e7f767a7 1189 card->rxbd_wrptr = wrptr;
d930faee 1190
dd04e6ac
AP
1191 while (((wrptr & reg->rx_mask) !=
1192 (card->rxbd_rdptr & reg->rx_mask)) ||
1193 ((wrptr & reg->rx_rollover_ind) ==
1194 (card->rxbd_rdptr & reg->rx_rollover_ind))) {
d930faee
AK
1195 struct sk_buff *skb_data;
1196 u16 rx_len;
e7f767a7 1197 __le16 pkt_len;
d930faee 1198
dd04e6ac 1199 rd_index = card->rxbd_rdptr & reg->rx_mask;
d930faee
AK
1200 skb_data = card->rx_buf_list[rd_index];
1201
e7f767a7
AP
1202 MWIFIEX_SKB_PACB(skb_data, &buf_pa);
1203 pci_unmap_single(card->dev, buf_pa, MWIFIEX_RX_DATA_BUF_SIZE,
1204 PCI_DMA_FROMDEVICE);
1205 card->rx_buf_list[rd_index] = NULL;
1206
d930faee 1207 /* Get data length from interface header -
e7f767a7
AP
1208 * first 2 bytes for len, next 2 bytes is for type
1209 */
1210 pkt_len = *((__le16 *)skb_data->data);
1211 rx_len = le16_to_cpu(pkt_len);
1212 skb_put(skb_data, rx_len);
f57c1edc
YAP
1213 dev_dbg(adapter->dev,
1214 "info: RECV DATA: Rd=%#x, Wr=%#x, Len=%d\n",
1215 card->rxbd_rdptr, wrptr, rx_len);
e7f767a7
AP
1216 skb_pull(skb_data, INTF_HEADER_LEN);
1217 mwifiex_handle_rx_packet(adapter, skb_data);
1218
1219 skb_tmp = dev_alloc_skb(MWIFIEX_RX_DATA_BUF_SIZE);
d930faee 1220 if (!skb_tmp) {
e7f767a7
AP
1221 dev_err(adapter->dev,
1222 "Unable to allocate skb.\n");
1223 return -ENOMEM;
d930faee
AK
1224 }
1225
e7f767a7
AP
1226 if (mwifiex_map_pci_memory(adapter, skb_tmp,
1227 MWIFIEX_RX_DATA_BUF_SIZE,
1228 PCI_DMA_FROMDEVICE))
1229 return -1;
1230
1231 MWIFIEX_SKB_PACB(skb_tmp, &buf_pa);
1232
1233 dev_dbg(adapter->dev,
1234 "RECV DATA: Attach new sk_buff %p at rxbd_rdidx=%d\n",
1235 skb_tmp, rd_index);
1236 card->rx_buf_list[rd_index] = skb_tmp;
ca8f2112
AP
1237
1238 if (reg->pfu_enabled) {
1239 desc2 = (void *)card->rxbd_ring[rd_index];
1240 desc2->paddr = buf_pa;
1241 desc2->len = skb_tmp->len;
1242 desc2->frag_len = skb_tmp->len;
1243 desc2->offset = 0;
1244 desc2->flags = reg->ring_flag_sop | reg->ring_flag_eop;
1245 } else {
1246 desc = card->rxbd_ring[rd_index];
1247 desc->paddr = buf_pa;
1248 desc->len = skb_tmp->len;
1249 desc->flags = 0;
1250 }
d930faee 1251
dd04e6ac 1252 if ((++card->rxbd_rdptr & reg->rx_mask) ==
d930faee
AK
1253 MWIFIEX_MAX_TXRX_BD) {
1254 card->rxbd_rdptr = ((card->rxbd_rdptr &
dd04e6ac
AP
1255 reg->rx_rollover_ind) ^
1256 reg->rx_rollover_ind);
d930faee
AK
1257 }
1258 dev_dbg(adapter->dev, "info: RECV DATA: <Rd: %#x, Wr: %#x>\n",
f57c1edc 1259 card->rxbd_rdptr, wrptr);
d930faee 1260
ca8f2112 1261 tx_val = card->txbd_wrptr & reg->tx_wrap_mask;
dd04e6ac
AP
1262 /* Write the RX ring read pointer in to reg->rx_rdptr */
1263 if (mwifiex_write_reg(adapter, reg->rx_rdptr,
ca8f2112 1264 card->rxbd_rdptr | tx_val)) {
f57c1edc 1265 dev_err(adapter->dev,
dd04e6ac 1266 "RECV DATA: failed to write reg->rx_rdptr\n");
d930faee
AK
1267 ret = -1;
1268 goto done;
1269 }
1270
1271 /* Read the RX ring Write pointer set by firmware */
dd04e6ac 1272 if (mwifiex_read_reg(adapter, reg->rx_wrptr, &wrptr)) {
f57c1edc 1273 dev_err(adapter->dev,
dd04e6ac 1274 "RECV DATA: failed to read reg->rx_wrptr\n");
d930faee
AK
1275 ret = -1;
1276 goto done;
1277 }
f57c1edc
YAP
1278 dev_dbg(adapter->dev,
1279 "info: RECV DATA: Rcvd packet from fw successfully\n");
e7f767a7 1280 card->rxbd_wrptr = wrptr;
d930faee
AK
1281 }
1282
1283done:
d930faee
AK
1284 return ret;
1285}
1286
1287/*
1288 * This function downloads the boot command to device
1289 */
1290static int
1291mwifiex_pcie_send_boot_cmd(struct mwifiex_adapter *adapter, struct sk_buff *skb)
1292{
fc331460
AP
1293 dma_addr_t buf_pa;
1294 struct pcie_service_card *card = adapter->card;
dd04e6ac 1295 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee 1296
fc331460 1297 if (!(skb->data && skb->len)) {
f57c1edc 1298 dev_err(adapter->dev,
fc331460
AP
1299 "Invalid parameter in %s <%p. len %d>\n",
1300 __func__, skb->data, skb->len);
d930faee
AK
1301 return -1;
1302 }
1303
fc331460
AP
1304 if (mwifiex_map_pci_memory(adapter, skb, skb->len , PCI_DMA_TODEVICE))
1305 return -1;
1306
1307 MWIFIEX_SKB_PACB(skb, &buf_pa);
1308
dd04e6ac
AP
1309 /* Write the lower 32bits of the physical address to low command
1310 * address scratch register
1311 */
1312 if (mwifiex_write_reg(adapter, reg->cmd_addr_lo, (u32)buf_pa)) {
f57c1edc
YAP
1313 dev_err(adapter->dev,
1314 "%s: failed to write download command to boot code.\n",
1315 __func__);
fc331460
AP
1316 pci_unmap_single(card->dev, buf_pa, MWIFIEX_UPLD_SIZE,
1317 PCI_DMA_TODEVICE);
d930faee
AK
1318 return -1;
1319 }
1320
dd04e6ac
AP
1321 /* Write the upper 32bits of the physical address to high command
1322 * address scratch register
1323 */
1324 if (mwifiex_write_reg(adapter, reg->cmd_addr_hi,
fc331460 1325 (u32)((u64)buf_pa >> 32))) {
f57c1edc
YAP
1326 dev_err(adapter->dev,
1327 "%s: failed to write download command to boot code.\n",
1328 __func__);
fc331460
AP
1329 pci_unmap_single(card->dev, buf_pa, MWIFIEX_UPLD_SIZE,
1330 PCI_DMA_TODEVICE);
d930faee
AK
1331 return -1;
1332 }
1333
dd04e6ac
AP
1334 /* Write the command length to cmd_size scratch register */
1335 if (mwifiex_write_reg(adapter, reg->cmd_size, skb->len)) {
f57c1edc 1336 dev_err(adapter->dev,
dd04e6ac 1337 "%s: failed to write command len to cmd_size scratch reg\n",
f57c1edc 1338 __func__);
fc331460
AP
1339 pci_unmap_single(card->dev, buf_pa, MWIFIEX_UPLD_SIZE,
1340 PCI_DMA_TODEVICE);
d930faee
AK
1341 return -1;
1342 }
1343
1344 /* Ring the door bell */
1345 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
1346 CPU_INTR_DOOR_BELL)) {
f57c1edc
YAP
1347 dev_err(adapter->dev,
1348 "%s: failed to assert door-bell intr\n", __func__);
fc331460
AP
1349 pci_unmap_single(card->dev, buf_pa,
1350 MWIFIEX_UPLD_SIZE, PCI_DMA_TODEVICE);
d930faee
AK
1351 return -1;
1352 }
1353
1354 return 0;
1355}
1356
c6d1d87a
AP
1357/* This function init rx port in firmware which in turn enables to receive data
1358 * from device before transmitting any packet.
1359 */
1360static int mwifiex_pcie_init_fw_port(struct mwifiex_adapter *adapter)
1361{
1362 struct pcie_service_card *card = adapter->card;
dd04e6ac 1363 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
ca8f2112 1364 int tx_wrap = card->txbd_wrptr & reg->tx_wrap_mask;
c6d1d87a 1365
dd04e6ac 1366 /* Write the RX ring read pointer in to reg->rx_rdptr */
ca8f2112
AP
1367 if (mwifiex_write_reg(adapter, reg->rx_rdptr, card->rxbd_rdptr |
1368 tx_wrap)) {
c6d1d87a 1369 dev_err(adapter->dev,
dd04e6ac 1370 "RECV DATA: failed to write reg->rx_rdptr\n");
c6d1d87a
AP
1371 return -1;
1372 }
1373 return 0;
1374}
1375
1376/* This function downloads commands to the device
d930faee
AK
1377 */
1378static int
1379mwifiex_pcie_send_cmd(struct mwifiex_adapter *adapter, struct sk_buff *skb)
1380{
1381 struct pcie_service_card *card = adapter->card;
dd04e6ac 1382 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee 1383 int ret = 0;
fc331460
AP
1384 dma_addr_t cmd_buf_pa, cmdrsp_buf_pa;
1385 u8 *payload = (u8 *)skb->data;
d930faee
AK
1386
1387 if (!(skb->data && skb->len)) {
1388 dev_err(adapter->dev, "Invalid parameter in %s <%p, %#x>\n",
f57c1edc 1389 __func__, skb->data, skb->len);
d930faee
AK
1390 return -1;
1391 }
1392
1393 /* Make sure a command response buffer is available */
1394 if (!card->cmdrsp_buf) {
f57c1edc
YAP
1395 dev_err(adapter->dev,
1396 "No response buffer available, send command failed\n");
d930faee
AK
1397 return -EBUSY;
1398 }
1399
fc331460
AP
1400 if (!mwifiex_pcie_ok_to_access_hw(adapter))
1401 mwifiex_pm_wakeup_card(adapter);
d930faee
AK
1402
1403 adapter->cmd_sent = true;
fc331460
AP
1404
1405 *(__le16 *)&payload[0] = cpu_to_le16((u16)skb->len);
1406 *(__le16 *)&payload[2] = cpu_to_le16(MWIFIEX_TYPE_CMD);
1407
1408 if (mwifiex_map_pci_memory(adapter, skb, skb->len, PCI_DMA_TODEVICE))
1409 return -1;
1410
1411 card->cmd_buf = skb;
d930faee
AK
1412
1413 /* To send a command, the driver will:
1414 1. Write the 64bit physical address of the data buffer to
dd04e6ac 1415 cmd response address low + cmd response address high
d930faee
AK
1416 2. Ring the door bell (i.e. set the door bell interrupt)
1417
1418 In response to door bell interrupt, the firmware will perform
1419 the DMA of the command packet (first header to obtain the total
1420 length and then rest of the command).
1421 */
1422
1423 if (card->cmdrsp_buf) {
fc331460 1424 MWIFIEX_SKB_PACB(card->cmdrsp_buf, &cmdrsp_buf_pa);
d930faee
AK
1425 /* Write the lower 32bits of the cmdrsp buffer physical
1426 address */
dd04e6ac 1427 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_lo,
fc331460 1428 (u32)cmdrsp_buf_pa)) {
f57c1edc
YAP
1429 dev_err(adapter->dev,
1430 "Failed to write download cmd to boot code.\n");
d930faee
AK
1431 ret = -1;
1432 goto done;
1433 }
1434 /* Write the upper 32bits of the cmdrsp buffer physical
1435 address */
dd04e6ac 1436 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_hi,
fc331460 1437 (u32)((u64)cmdrsp_buf_pa >> 32))) {
f57c1edc
YAP
1438 dev_err(adapter->dev,
1439 "Failed to write download cmd to boot code.\n");
d930faee
AK
1440 ret = -1;
1441 goto done;
1442 }
1443 }
1444
fc331460 1445 MWIFIEX_SKB_PACB(card->cmd_buf, &cmd_buf_pa);
dd04e6ac
AP
1446 /* Write the lower 32bits of the physical address to reg->cmd_addr_lo */
1447 if (mwifiex_write_reg(adapter, reg->cmd_addr_lo,
1448 (u32)cmd_buf_pa)) {
f57c1edc
YAP
1449 dev_err(adapter->dev,
1450 "Failed to write download cmd to boot code.\n");
d930faee
AK
1451 ret = -1;
1452 goto done;
1453 }
dd04e6ac
AP
1454 /* Write the upper 32bits of the physical address to reg->cmd_addr_hi */
1455 if (mwifiex_write_reg(adapter, reg->cmd_addr_hi,
fc331460 1456 (u32)((u64)cmd_buf_pa >> 32))) {
f57c1edc
YAP
1457 dev_err(adapter->dev,
1458 "Failed to write download cmd to boot code.\n");
d930faee
AK
1459 ret = -1;
1460 goto done;
1461 }
1462
dd04e6ac
AP
1463 /* Write the command length to reg->cmd_size */
1464 if (mwifiex_write_reg(adapter, reg->cmd_size,
1465 card->cmd_buf->len)) {
f57c1edc 1466 dev_err(adapter->dev,
dd04e6ac 1467 "Failed to write cmd len to reg->cmd_size\n");
d930faee
AK
1468 ret = -1;
1469 goto done;
1470 }
1471
1472 /* Ring the door bell */
1473 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
1474 CPU_INTR_DOOR_BELL)) {
f57c1edc
YAP
1475 dev_err(adapter->dev,
1476 "Failed to assert door-bell intr\n");
d930faee
AK
1477 ret = -1;
1478 goto done;
1479 }
1480
1481done:
1482 if (ret)
1483 adapter->cmd_sent = false;
1484
1485 return 0;
1486}
1487
1488/*
1489 * This function handles command complete interrupt
1490 */
1491static int mwifiex_pcie_process_cmd_complete(struct mwifiex_adapter *adapter)
1492{
1493 struct pcie_service_card *card = adapter->card;
dd04e6ac 1494 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
f57c1edc 1495 struct sk_buff *skb = card->cmdrsp_buf;
d930faee 1496 int count = 0;
fc331460
AP
1497 u16 rx_len;
1498 __le16 pkt_len;
1499 dma_addr_t buf_pa;
d930faee
AK
1500
1501 dev_dbg(adapter->dev, "info: Rx CMD Response\n");
1502
fc331460
AP
1503 MWIFIEX_SKB_PACB(skb, &buf_pa);
1504 pci_unmap_single(card->dev, buf_pa, MWIFIEX_UPLD_SIZE,
1505 PCI_DMA_FROMDEVICE);
1506
1507 pkt_len = *((__le16 *)skb->data);
1508 rx_len = le16_to_cpu(pkt_len);
1509 skb_trim(skb, rx_len);
1510 skb_pull(skb, INTF_HEADER_LEN);
1511
d930faee 1512 if (!adapter->curr_cmd) {
d930faee 1513 if (adapter->ps_state == PS_STATE_SLEEP_CFM) {
f57c1edc
YAP
1514 mwifiex_process_sleep_confirm_resp(adapter, skb->data,
1515 skb->len);
d930faee
AK
1516 while (mwifiex_pcie_ok_to_access_hw(adapter) &&
1517 (count++ < 10))
e7891ba2 1518 usleep_range(50, 60);
d930faee 1519 } else {
f57c1edc
YAP
1520 dev_err(adapter->dev,
1521 "There is no command but got cmdrsp\n");
d930faee 1522 }
f57c1edc
YAP
1523 memcpy(adapter->upld_buf, skb->data,
1524 min_t(u32, MWIFIEX_SIZE_OF_CMD_BUFFER, skb->len));
fc331460
AP
1525 if (mwifiex_map_pci_memory(adapter, skb, MWIFIEX_UPLD_SIZE,
1526 PCI_DMA_FROMDEVICE))
1527 return -1;
1528
1529 MWIFIEX_SKB_PACB(skb, &buf_pa);
d930faee 1530 } else if (mwifiex_pcie_ok_to_access_hw(adapter)) {
f57c1edc 1531 adapter->curr_cmd->resp_skb = skb;
d930faee
AK
1532 adapter->cmd_resp_received = true;
1533 /* Take the pointer and set it to CMD node and will
1534 return in the response complete callback */
1535 card->cmdrsp_buf = NULL;
1536
1537 /* Clear the cmd-rsp buffer address in scratch registers. This
1538 will prevent firmware from writing to the same response
1539 buffer again. */
dd04e6ac 1540 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_lo, 0)) {
f57c1edc
YAP
1541 dev_err(adapter->dev,
1542 "cmd_done: failed to clear cmd_rsp_addr_lo\n");
d930faee
AK
1543 return -1;
1544 }
1545 /* Write the upper 32bits of the cmdrsp buffer physical
1546 address */
dd04e6ac 1547 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_hi, 0)) {
f57c1edc
YAP
1548 dev_err(adapter->dev,
1549 "cmd_done: failed to clear cmd_rsp_addr_hi\n");
d930faee
AK
1550 return -1;
1551 }
1552 }
1553
1554 return 0;
1555}
1556
1557/*
1558 * Command Response processing complete handler
1559 */
1560static int mwifiex_pcie_cmdrsp_complete(struct mwifiex_adapter *adapter,
1561 struct sk_buff *skb)
1562{
1563 struct pcie_service_card *card = adapter->card;
fc331460
AP
1564 dma_addr_t buf_pa;
1565 struct sk_buff *skb_tmp;
d930faee
AK
1566
1567 if (skb) {
1568 card->cmdrsp_buf = skb;
1569 skb_push(card->cmdrsp_buf, INTF_HEADER_LEN);
fc331460
AP
1570 if (mwifiex_map_pci_memory(adapter, skb, MWIFIEX_UPLD_SIZE,
1571 PCI_DMA_FROMDEVICE))
1572 return -1;
1573 }
1574
1575 skb_tmp = card->cmd_buf;
1576 if (skb_tmp) {
1577 MWIFIEX_SKB_PACB(skb_tmp, &buf_pa);
1578 pci_unmap_single(card->dev, buf_pa, MWIFIEX_UPLD_SIZE,
1579 PCI_DMA_FROMDEVICE);
1580 card->cmd_buf = NULL;
d930faee
AK
1581 }
1582
1583 return 0;
1584}
1585
1586/*
1587 * This function handles firmware event ready interrupt
1588 */
1589static int mwifiex_pcie_process_event_ready(struct mwifiex_adapter *adapter)
1590{
1591 struct pcie_service_card *card = adapter->card;
dd04e6ac 1592 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee
AK
1593 u32 rdptr = card->evtbd_rdptr & MWIFIEX_EVTBD_MASK;
1594 u32 wrptr, event;
fc331460 1595 dma_addr_t buf_pa;
e05dc3e9 1596 struct mwifiex_evt_buf_desc *desc;
fc331460
AP
1597
1598 if (!mwifiex_pcie_ok_to_access_hw(adapter))
1599 mwifiex_pm_wakeup_card(adapter);
d930faee
AK
1600
1601 if (adapter->event_received) {
f57c1edc
YAP
1602 dev_dbg(adapter->dev, "info: Event being processed, "
1603 "do not process this interrupt just yet\n");
d930faee
AK
1604 return 0;
1605 }
1606
1607 if (rdptr >= MWIFIEX_MAX_EVT_BD) {
1608 dev_dbg(adapter->dev, "info: Invalid read pointer...\n");
1609 return -1;
1610 }
1611
1612 /* Read the event ring write pointer set by firmware */
dd04e6ac 1613 if (mwifiex_read_reg(adapter, reg->evt_wrptr, &wrptr)) {
f57c1edc 1614 dev_err(adapter->dev,
dd04e6ac 1615 "EventReady: failed to read reg->evt_wrptr\n");
d930faee
AK
1616 return -1;
1617 }
1618
1619 dev_dbg(adapter->dev, "info: EventReady: Initial <Rd: 0x%x, Wr: 0x%x>",
f57c1edc
YAP
1620 card->evtbd_rdptr, wrptr);
1621 if (((wrptr & MWIFIEX_EVTBD_MASK) != (card->evtbd_rdptr
1622 & MWIFIEX_EVTBD_MASK)) ||
dd04e6ac
AP
1623 ((wrptr & reg->evt_rollover_ind) ==
1624 (card->evtbd_rdptr & reg->evt_rollover_ind))) {
d930faee
AK
1625 struct sk_buff *skb_cmd;
1626 __le16 data_len = 0;
1627 u16 evt_len;
1628
1629 dev_dbg(adapter->dev, "info: Read Index: %d\n", rdptr);
1630 skb_cmd = card->evt_buf_list[rdptr];
fc331460
AP
1631 MWIFIEX_SKB_PACB(skb_cmd, &buf_pa);
1632 pci_unmap_single(card->dev, buf_pa, MAX_EVENT_SIZE,
1633 PCI_DMA_FROMDEVICE);
1634
d930faee
AK
1635 /* Take the pointer and set it to event pointer in adapter
1636 and will return back after event handling callback */
1637 card->evt_buf_list[rdptr] = NULL;
e05dc3e9
AP
1638 desc = card->evtbd_ring[rdptr];
1639 memset(desc, 0, sizeof(*desc));
d930faee
AK
1640
1641 event = *(u32 *) &skb_cmd->data[INTF_HEADER_LEN];
1642 adapter->event_cause = event;
1643 /* The first 4bytes will be the event transfer header
1644 len is 2 bytes followed by type which is 2 bytes */
1645 memcpy(&data_len, skb_cmd->data, sizeof(__le16));
1646 evt_len = le16_to_cpu(data_len);
1647
1648 skb_pull(skb_cmd, INTF_HEADER_LEN);
1649 dev_dbg(adapter->dev, "info: Event length: %d\n", evt_len);
1650
1651 if ((evt_len > 0) && (evt_len < MAX_EVENT_SIZE))
1652 memcpy(adapter->event_body, skb_cmd->data +
1653 MWIFIEX_EVENT_HEADER_LEN, evt_len -
1654 MWIFIEX_EVENT_HEADER_LEN);
1655
1656 adapter->event_received = true;
1657 adapter->event_skb = skb_cmd;
1658
1659 /* Do not update the event read pointer here, wait till the
1660 buffer is released. This is just to make things simpler,
1661 we need to find a better method of managing these buffers.
1662 */
1663 }
1664
1665 return 0;
1666}
1667
1668/*
1669 * Event processing complete handler
1670 */
1671static int mwifiex_pcie_event_complete(struct mwifiex_adapter *adapter,
1672 struct sk_buff *skb)
1673{
1674 struct pcie_service_card *card = adapter->card;
dd04e6ac 1675 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee
AK
1676 int ret = 0;
1677 u32 rdptr = card->evtbd_rdptr & MWIFIEX_EVTBD_MASK;
1678 u32 wrptr;
fc331460 1679 dma_addr_t buf_pa;
e05dc3e9 1680 struct mwifiex_evt_buf_desc *desc;
d930faee
AK
1681
1682 if (!skb)
1683 return 0;
1684
1eb54c8a 1685 if (rdptr >= MWIFIEX_MAX_EVT_BD) {
d930faee 1686 dev_err(adapter->dev, "event_complete: Invalid rdptr 0x%x\n",
f57c1edc 1687 rdptr);
8c53e42d 1688 return -EINVAL;
1eb54c8a 1689 }
d930faee
AK
1690
1691 /* Read the event ring write pointer set by firmware */
dd04e6ac 1692 if (mwifiex_read_reg(adapter, reg->evt_wrptr, &wrptr)) {
f57c1edc 1693 dev_err(adapter->dev,
dd04e6ac 1694 "event_complete: failed to read reg->evt_wrptr\n");
8c53e42d 1695 return -1;
d930faee
AK
1696 }
1697
1698 if (!card->evt_buf_list[rdptr]) {
1699 skb_push(skb, INTF_HEADER_LEN);
fc331460
AP
1700 if (mwifiex_map_pci_memory(adapter, skb,
1701 MAX_EVENT_SIZE,
1702 PCI_DMA_FROMDEVICE))
1703 return -1;
1704 MWIFIEX_SKB_PACB(skb, &buf_pa);
d930faee 1705 card->evt_buf_list[rdptr] = skb;
fc331460 1706 MWIFIEX_SKB_PACB(skb, &buf_pa);
e05dc3e9
AP
1707 desc = card->evtbd_ring[rdptr];
1708 desc->paddr = buf_pa;
1709 desc->len = (u16)skb->len;
1710 desc->flags = 0;
d930faee
AK
1711 skb = NULL;
1712 } else {
f57c1edc
YAP
1713 dev_dbg(adapter->dev,
1714 "info: ERROR: buf still valid at index %d, <%p, %p>\n",
1715 rdptr, card->evt_buf_list[rdptr], skb);
d930faee
AK
1716 }
1717
1718 if ((++card->evtbd_rdptr & MWIFIEX_EVTBD_MASK) == MWIFIEX_MAX_EVT_BD) {
1719 card->evtbd_rdptr = ((card->evtbd_rdptr &
dd04e6ac
AP
1720 reg->evt_rollover_ind) ^
1721 reg->evt_rollover_ind);
d930faee
AK
1722 }
1723
1724 dev_dbg(adapter->dev, "info: Updated <Rd: 0x%x, Wr: 0x%x>",
f57c1edc 1725 card->evtbd_rdptr, wrptr);
d930faee 1726
dd04e6ac
AP
1727 /* Write the event ring read pointer in to reg->evt_rdptr */
1728 if (mwifiex_write_reg(adapter, reg->evt_rdptr,
1729 card->evtbd_rdptr)) {
f57c1edc 1730 dev_err(adapter->dev,
dd04e6ac 1731 "event_complete: failed to read reg->evt_rdptr\n");
8c53e42d 1732 return -1;
d930faee
AK
1733 }
1734
d930faee
AK
1735 dev_dbg(adapter->dev, "info: Check Events Again\n");
1736 ret = mwifiex_pcie_process_event_ready(adapter);
1737
1738 return ret;
1739}
1740
1741/*
1742 * This function downloads the firmware to the card.
1743 *
1744 * Firmware is downloaded to the card in blocks. Every block download
1745 * is tested for CRC errors, and retried a number of times before
1746 * returning failure.
1747 */
1748static int mwifiex_prog_fw_w_helper(struct mwifiex_adapter *adapter,
1749 struct mwifiex_fw_image *fw)
1750{
1751 int ret;
1752 u8 *firmware = fw->fw_buf;
1753 u32 firmware_len = fw->fw_len;
1754 u32 offset = 0;
1755 struct sk_buff *skb;
1756 u32 txlen, tx_blocks = 0, tries, len;
1757 u32 block_retry_cnt = 0;
fc331460
AP
1758 dma_addr_t buf_pa;
1759 struct pcie_service_card *card = adapter->card;
dd04e6ac 1760 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee
AK
1761
1762 if (!firmware || !firmware_len) {
f57c1edc
YAP
1763 dev_err(adapter->dev,
1764 "No firmware image found! Terminating download\n");
d930faee
AK
1765 return -1;
1766 }
1767
1768 dev_dbg(adapter->dev, "info: Downloading FW image (%d bytes)\n",
f57c1edc 1769 firmware_len);
d930faee
AK
1770
1771 if (mwifiex_pcie_disable_host_int(adapter)) {
f57c1edc
YAP
1772 dev_err(adapter->dev,
1773 "%s: Disabling interrupts failed.\n", __func__);
d930faee
AK
1774 return -1;
1775 }
1776
1777 skb = dev_alloc_skb(MWIFIEX_UPLD_SIZE);
1778 if (!skb) {
1779 ret = -ENOMEM;
1780 goto done;
1781 }
d930faee
AK
1782
1783 /* Perform firmware data transfer */
1784 do {
1785 u32 ireg_intr = 0;
1786
1787 /* More data? */
1788 if (offset >= firmware_len)
1789 break;
1790
1791 for (tries = 0; tries < MAX_POLL_TRIES; tries++) {
dd04e6ac 1792 ret = mwifiex_read_reg(adapter, reg->cmd_size,
d930faee
AK
1793 &len);
1794 if (ret) {
f57c1edc
YAP
1795 dev_warn(adapter->dev,
1796 "Failed reading len from boot code\n");
d930faee
AK
1797 goto done;
1798 }
1799 if (len)
1800 break;
e7891ba2 1801 usleep_range(10, 20);
d930faee
AK
1802 }
1803
1804 if (!len) {
1805 break;
1806 } else if (len > MWIFIEX_UPLD_SIZE) {
1807 pr_err("FW download failure @ %d, invalid length %d\n",
f57c1edc 1808 offset, len);
d930faee
AK
1809 ret = -1;
1810 goto done;
1811 }
1812
1813 txlen = len;
1814
1815 if (len & BIT(0)) {
1816 block_retry_cnt++;
1817 if (block_retry_cnt > MAX_WRITE_IOMEM_RETRY) {
1818 pr_err("FW download failure @ %d, over max "
1819 "retry count\n", offset);
1820 ret = -1;
1821 goto done;
1822 }
1823 dev_err(adapter->dev, "FW CRC error indicated by the "
f57c1edc
YAP
1824 "helper: len = 0x%04X, txlen = %d\n",
1825 len, txlen);
d930faee
AK
1826 len &= ~BIT(0);
1827 /* Setting this to 0 to resend from same offset */
1828 txlen = 0;
1829 } else {
1830 block_retry_cnt = 0;
1831 /* Set blocksize to transfer - checking for
1832 last block */
1833 if (firmware_len - offset < txlen)
1834 txlen = firmware_len - offset;
1835
1836 dev_dbg(adapter->dev, ".");
1837
dd04e6ac
AP
1838 tx_blocks = (txlen + card->pcie.blksz_fw_dl - 1) /
1839 card->pcie.blksz_fw_dl;
d930faee
AK
1840
1841 /* Copy payload to buffer */
1842 memmove(skb->data, &firmware[offset], txlen);
1843 }
1844
1845 skb_put(skb, MWIFIEX_UPLD_SIZE - skb->len);
dd04e6ac 1846 skb_trim(skb, tx_blocks * card->pcie.blksz_fw_dl);
d930faee
AK
1847
1848 /* Send the boot command to device */
1849 if (mwifiex_pcie_send_boot_cmd(adapter, skb)) {
f57c1edc
YAP
1850 dev_err(adapter->dev,
1851 "Failed to send firmware download command\n");
d930faee
AK
1852 ret = -1;
1853 goto done;
1854 }
fc331460
AP
1855
1856 MWIFIEX_SKB_PACB(skb, &buf_pa);
1857
d930faee
AK
1858 /* Wait for the command done interrupt */
1859 do {
1860 if (mwifiex_read_reg(adapter, PCIE_CPU_INT_STATUS,
1861 &ireg_intr)) {
1862 dev_err(adapter->dev, "%s: Failed to read "
f57c1edc
YAP
1863 "interrupt status during fw dnld.\n",
1864 __func__);
fc331460
AP
1865 pci_unmap_single(card->dev, buf_pa, skb->len,
1866 PCI_DMA_TODEVICE);
d930faee
AK
1867 ret = -1;
1868 goto done;
1869 }
1870 } while ((ireg_intr & CPU_INTR_DOOR_BELL) ==
1871 CPU_INTR_DOOR_BELL);
fc331460
AP
1872
1873 pci_unmap_single(card->dev, buf_pa, skb->len,
1874 PCI_DMA_TODEVICE);
1875
d930faee
AK
1876 offset += txlen;
1877 } while (true);
1878
1879 dev_dbg(adapter->dev, "info:\nFW download over, size %d bytes\n",
f57c1edc 1880 offset);
d930faee
AK
1881
1882 ret = 0;
1883
1884done:
1885 dev_kfree_skb_any(skb);
1886 return ret;
1887}
1888
1889/*
1890 * This function checks the firmware status in card.
1891 *
1892 * The winner interface is also determined by this function.
1893 */
1894static int
1895mwifiex_check_fw_status(struct mwifiex_adapter *adapter, u32 poll_num)
1896{
1897 int ret = 0;
1898 u32 firmware_stat, winner_status;
dd04e6ac
AP
1899 struct pcie_service_card *card = adapter->card;
1900 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee
AK
1901 u32 tries;
1902
1903 /* Mask spurios interrupts */
1904 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_STATUS_MASK,
f57c1edc 1905 HOST_INTR_MASK)) {
d930faee
AK
1906 dev_warn(adapter->dev, "Write register failed\n");
1907 return -1;
1908 }
1909
1910 dev_dbg(adapter->dev, "Setting driver ready signature\n");
dd04e6ac
AP
1911 if (mwifiex_write_reg(adapter, reg->drv_rdy,
1912 FIRMWARE_READY_PCIE)) {
f57c1edc
YAP
1913 dev_err(adapter->dev,
1914 "Failed to write driver ready signature\n");
d930faee
AK
1915 return -1;
1916 }
1917
1918 /* Wait for firmware initialization event */
1919 for (tries = 0; tries < poll_num; tries++) {
dd04e6ac 1920 if (mwifiex_read_reg(adapter, reg->fw_status,
d930faee
AK
1921 &firmware_stat))
1922 ret = -1;
1923 else
1924 ret = 0;
1925 if (ret)
1926 continue;
1927 if (firmware_stat == FIRMWARE_READY_PCIE) {
1928 ret = 0;
1929 break;
1930 } else {
1931 mdelay(100);
1932 ret = -1;
1933 }
1934 }
1935
1936 if (ret) {
dd04e6ac 1937 if (mwifiex_read_reg(adapter, reg->fw_status,
d930faee
AK
1938 &winner_status))
1939 ret = -1;
1940 else if (!winner_status) {
1941 dev_err(adapter->dev, "PCI-E is the winner\n");
1942 adapter->winner = 1;
1943 ret = -1;
1944 } else {
f57c1edc
YAP
1945 dev_err(adapter->dev,
1946 "PCI-E is not the winner <%#x,%d>, exit dnld\n",
1947 ret, adapter->winner);
d930faee
AK
1948 ret = 0;
1949 }
1950 }
1951
1952 return ret;
1953}
1954
1955/*
1956 * This function reads the interrupt status from card.
1957 */
1958static void mwifiex_interrupt_status(struct mwifiex_adapter *adapter)
1959{
1960 u32 pcie_ireg;
1961 unsigned long flags;
1962
1963 if (!mwifiex_pcie_ok_to_access_hw(adapter))
1964 return;
1965
1966 if (mwifiex_read_reg(adapter, PCIE_HOST_INT_STATUS, &pcie_ireg)) {
1967 dev_warn(adapter->dev, "Read register failed\n");
1968 return;
1969 }
1970
1971 if ((pcie_ireg != 0xFFFFFFFF) && (pcie_ireg)) {
1972
1973 mwifiex_pcie_disable_host_int(adapter);
1974
1975 /* Clear the pending interrupts */
1976 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_STATUS,
1977 ~pcie_ireg)) {
1978 dev_warn(adapter->dev, "Write register failed\n");
1979 return;
1980 }
1981 spin_lock_irqsave(&adapter->int_lock, flags);
1982 adapter->int_status |= pcie_ireg;
1983 spin_unlock_irqrestore(&adapter->int_lock, flags);
1984
1985 if (pcie_ireg & HOST_INTR_CMD_DONE) {
1986 if ((adapter->ps_state == PS_STATE_SLEEP_CFM) ||
1987 (adapter->ps_state == PS_STATE_SLEEP)) {
1988 mwifiex_pcie_enable_host_int(adapter);
1989 if (mwifiex_write_reg(adapter,
f57c1edc
YAP
1990 PCIE_CPU_INT_EVENT,
1991 CPU_INTR_SLEEP_CFM_DONE)
1992 ) {
1993 dev_warn(adapter->dev,
1994 "Write register failed\n");
d930faee
AK
1995 return;
1996
1997 }
1998 }
1999 } else if (!adapter->pps_uapsd_mode &&
2000 adapter->ps_state == PS_STATE_SLEEP) {
2001 /* Potentially for PCIe we could get other
2002 * interrupts like shared. Don't change power
2003 * state until cookie is set */
2004 if (mwifiex_pcie_ok_to_access_hw(adapter))
2005 adapter->ps_state = PS_STATE_AWAKE;
2006 }
2007 }
2008}
2009
2010/*
2011 * Interrupt handler for PCIe root port
2012 *
2013 * This function reads the interrupt status from firmware and assigns
2014 * the main process in workqueue which will handle the interrupt.
2015 */
2016static irqreturn_t mwifiex_pcie_interrupt(int irq, void *context)
2017{
2018 struct pci_dev *pdev = (struct pci_dev *)context;
2019 struct pcie_service_card *card;
2020 struct mwifiex_adapter *adapter;
2021
2022 if (!pdev) {
2023 pr_debug("info: %s: pdev is NULL\n", (u8 *)pdev);
2024 goto exit;
2025 }
2026
2027 card = (struct pcie_service_card *) pci_get_drvdata(pdev);
2028 if (!card || !card->adapter) {
2029 pr_debug("info: %s: card=%p adapter=%p\n", __func__, card,
f57c1edc 2030 card ? card->adapter : NULL);
d930faee
AK
2031 goto exit;
2032 }
2033 adapter = card->adapter;
2034
2035 if (adapter->surprise_removed)
2036 goto exit;
2037
2038 mwifiex_interrupt_status(adapter);
2039 queue_work(adapter->workqueue, &adapter->main_work);
2040
2041exit:
2042 return IRQ_HANDLED;
2043}
2044
2045/*
2046 * This function checks the current interrupt status.
2047 *
2048 * The following interrupts are checked and handled by this function -
2049 * - Data sent
2050 * - Command sent
2051 * - Command received
2052 * - Packets received
2053 * - Events received
2054 *
2055 * In case of Rx packets received, the packets are uploaded from card to
2056 * host and processed accordingly.
2057 */
2058static int mwifiex_process_int_status(struct mwifiex_adapter *adapter)
2059{
2060 int ret;
659c4788 2061 u32 pcie_ireg;
d930faee
AK
2062 unsigned long flags;
2063
2064 spin_lock_irqsave(&adapter->int_lock, flags);
2065 /* Clear out unused interrupts */
659c4788
AP
2066 pcie_ireg = adapter->int_status;
2067 adapter->int_status = 0;
d930faee
AK
2068 spin_unlock_irqrestore(&adapter->int_lock, flags);
2069
659c4788
AP
2070 while (pcie_ireg & HOST_INTR_MASK) {
2071 if (pcie_ireg & HOST_INTR_DNLD_DONE) {
2072 pcie_ireg &= ~HOST_INTR_DNLD_DONE;
e7f767a7
AP
2073 dev_dbg(adapter->dev, "info: TX DNLD Done\n");
2074 ret = mwifiex_pcie_send_data_complete(adapter);
2075 if (ret)
2076 return ret;
d930faee 2077 }
659c4788
AP
2078 if (pcie_ireg & HOST_INTR_UPLD_RDY) {
2079 pcie_ireg &= ~HOST_INTR_UPLD_RDY;
d930faee
AK
2080 dev_dbg(adapter->dev, "info: Rx DATA\n");
2081 ret = mwifiex_pcie_process_recv_data(adapter);
2082 if (ret)
2083 return ret;
2084 }
659c4788
AP
2085 if (pcie_ireg & HOST_INTR_EVENT_RDY) {
2086 pcie_ireg &= ~HOST_INTR_EVENT_RDY;
d930faee
AK
2087 dev_dbg(adapter->dev, "info: Rx EVENT\n");
2088 ret = mwifiex_pcie_process_event_ready(adapter);
2089 if (ret)
2090 return ret;
2091 }
2092
659c4788
AP
2093 if (pcie_ireg & HOST_INTR_CMD_DONE) {
2094 pcie_ireg &= ~HOST_INTR_CMD_DONE;
d930faee 2095 if (adapter->cmd_sent) {
f57c1edc
YAP
2096 dev_dbg(adapter->dev,
2097 "info: CMD sent Interrupt\n");
d930faee
AK
2098 adapter->cmd_sent = false;
2099 }
2100 /* Handle command response */
2101 ret = mwifiex_pcie_process_cmd_complete(adapter);
2102 if (ret)
2103 return ret;
2104 }
2105
2106 if (mwifiex_pcie_ok_to_access_hw(adapter)) {
2107 if (mwifiex_read_reg(adapter, PCIE_HOST_INT_STATUS,
2108 &pcie_ireg)) {
f57c1edc
YAP
2109 dev_warn(adapter->dev,
2110 "Read register failed\n");
d930faee
AK
2111 return -1;
2112 }
2113
2114 if ((pcie_ireg != 0xFFFFFFFF) && (pcie_ireg)) {
2115 if (mwifiex_write_reg(adapter,
f57c1edc
YAP
2116 PCIE_HOST_INT_STATUS,
2117 ~pcie_ireg)) {
2118 dev_warn(adapter->dev,
2119 "Write register failed\n");
d930faee
AK
2120 return -1;
2121 }
d930faee
AK
2122 }
2123
2124 }
2125 }
2126 dev_dbg(adapter->dev, "info: cmd_sent=%d data_sent=%d\n",
f57c1edc 2127 adapter->cmd_sent, adapter->data_sent);
d930faee
AK
2128 mwifiex_pcie_enable_host_int(adapter);
2129
2130 return 0;
2131}
2132
2133/*
2134 * This function downloads data from driver to card.
2135 *
2136 * Both commands and data packets are transferred to the card by this
2137 * function.
2138 *
2139 * This function adds the PCIE specific header to the front of the buffer
2140 * before transferring. The header contains the length of the packet and
2141 * the type. The firmware handles the packets based upon this set type.
2142 */
2143static int mwifiex_pcie_host_to_card(struct mwifiex_adapter *adapter, u8 type,
2144 struct sk_buff *skb,
2145 struct mwifiex_tx_param *tx_param)
2146{
fa161cb7
DC
2147 if (!skb) {
2148 dev_err(adapter->dev, "Passed NULL skb to %s\n", __func__);
d930faee
AK
2149 return -1;
2150 }
2151
2152 if (type == MWIFIEX_TYPE_DATA)
e7f767a7 2153 return mwifiex_pcie_send_data(adapter, skb, tx_param);
d930faee
AK
2154 else if (type == MWIFIEX_TYPE_CMD)
2155 return mwifiex_pcie_send_cmd(adapter, skb);
2156
2157 return 0;
2158}
2159
2160/*
2161 * This function initializes the PCI-E host memory space, WCB rings, etc.
2162 *
2163 * The following initializations steps are followed -
2164 * - Allocate TXBD ring buffers
2165 * - Allocate RXBD ring buffers
2166 * - Allocate event BD ring buffers
2167 * - Allocate command response ring buffer
2168 * - Allocate sleep cookie buffer
2169 */
2170static int mwifiex_pcie_init(struct mwifiex_adapter *adapter)
2171{
2172 struct pcie_service_card *card = adapter->card;
2173 int ret;
2174 struct pci_dev *pdev = card->dev;
2175
2176 pci_set_drvdata(pdev, card);
2177
2178 ret = pci_enable_device(pdev);
2179 if (ret)
2180 goto err_enable_dev;
2181
2182 pci_set_master(pdev);
2183
2184 dev_dbg(adapter->dev, "try set_consistent_dma_mask(32)\n");
2185 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
2186 if (ret) {
2187 dev_err(adapter->dev, "set_dma_mask(32) failed\n");
2188 goto err_set_dma_mask;
2189 }
2190
2191 ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
2192 if (ret) {
2193 dev_err(adapter->dev, "set_consistent_dma_mask(64) failed\n");
2194 goto err_set_dma_mask;
2195 }
2196
2197 ret = pci_request_region(pdev, 0, DRV_NAME);
2198 if (ret) {
2199 dev_err(adapter->dev, "req_reg(0) error\n");
2200 goto err_req_region0;
2201 }
2202 card->pci_mmap = pci_iomap(pdev, 0, 0);
2203 if (!card->pci_mmap) {
2204 dev_err(adapter->dev, "iomap(0) error\n");
3220712d 2205 ret = -EIO;
d930faee
AK
2206 goto err_iomap0;
2207 }
2208 ret = pci_request_region(pdev, 2, DRV_NAME);
2209 if (ret) {
2210 dev_err(adapter->dev, "req_reg(2) error\n");
2211 goto err_req_region2;
2212 }
2213 card->pci_mmap1 = pci_iomap(pdev, 2, 0);
2214 if (!card->pci_mmap1) {
2215 dev_err(adapter->dev, "iomap(2) error\n");
3220712d 2216 ret = -EIO;
d930faee
AK
2217 goto err_iomap2;
2218 }
2219
f57c1edc
YAP
2220 dev_dbg(adapter->dev,
2221 "PCI memory map Virt0: %p PCI memory map Virt2: %p\n",
2222 card->pci_mmap, card->pci_mmap1);
d930faee
AK
2223
2224 card->cmdrsp_buf = NULL;
2225 ret = mwifiex_pcie_create_txbd_ring(adapter);
2226 if (ret)
2227 goto err_cre_txbd;
2228 ret = mwifiex_pcie_create_rxbd_ring(adapter);
2229 if (ret)
2230 goto err_cre_rxbd;
2231 ret = mwifiex_pcie_create_evtbd_ring(adapter);
2232 if (ret)
2233 goto err_cre_evtbd;
2234 ret = mwifiex_pcie_alloc_cmdrsp_buf(adapter);
2235 if (ret)
2236 goto err_alloc_cmdbuf;
2237 ret = mwifiex_pcie_alloc_sleep_cookie_buf(adapter);
2238 if (ret)
2239 goto err_alloc_cookie;
2240
2241 return ret;
2242
2243err_alloc_cookie:
2244 mwifiex_pcie_delete_cmdrsp_buf(adapter);
2245err_alloc_cmdbuf:
2246 mwifiex_pcie_delete_evtbd_ring(adapter);
2247err_cre_evtbd:
2248 mwifiex_pcie_delete_rxbd_ring(adapter);
2249err_cre_rxbd:
2250 mwifiex_pcie_delete_txbd_ring(adapter);
2251err_cre_txbd:
2252 pci_iounmap(pdev, card->pci_mmap1);
2253err_iomap2:
2254 pci_release_region(pdev, 2);
2255err_req_region2:
2256 pci_iounmap(pdev, card->pci_mmap);
2257err_iomap0:
2258 pci_release_region(pdev, 0);
2259err_req_region0:
2260err_set_dma_mask:
2261 pci_disable_device(pdev);
2262err_enable_dev:
2263 pci_set_drvdata(pdev, NULL);
2264 return ret;
2265}
2266
2267/*
2268 * This function cleans up the allocated card buffers.
2269 *
2270 * The following are freed by this function -
2271 * - TXBD ring buffers
2272 * - RXBD ring buffers
2273 * - Event BD ring buffers
2274 * - Command response ring buffer
2275 * - Sleep cookie buffer
2276 */
2277static void mwifiex_pcie_cleanup(struct mwifiex_adapter *adapter)
2278{
2279 struct pcie_service_card *card = adapter->card;
2280 struct pci_dev *pdev = card->dev;
dd04e6ac 2281 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee 2282
d930faee 2283 if (user_rmmod) {
fc331460 2284 dev_dbg(adapter->dev, "Clearing driver ready signature\n");
dd04e6ac 2285 if (mwifiex_write_reg(adapter, reg->drv_rdy, 0x00000000))
f57c1edc
YAP
2286 dev_err(adapter->dev,
2287 "Failed to write driver not-ready signature\n");
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2288 }
2289
2290 if (pdev) {
2291 pci_iounmap(pdev, card->pci_mmap);
2292 pci_iounmap(pdev, card->pci_mmap1);
2293
2294 pci_release_regions(pdev);
2295 pci_disable_device(pdev);
2296 pci_set_drvdata(pdev, NULL);
2297 }
2298}
2299
2300/*
2301 * This function registers the PCIE device.
2302 *
2303 * PCIE IRQ is claimed, block size is set and driver data is initialized.
2304 */
2305static int mwifiex_register_dev(struct mwifiex_adapter *adapter)
2306{
2307 int ret;
2308 struct pcie_service_card *card = adapter->card;
2309 struct pci_dev *pdev = card->dev;
2310
2311 /* save adapter pointer in card */
2312 card->adapter = adapter;
2313
2314 ret = request_irq(pdev->irq, mwifiex_pcie_interrupt, IRQF_SHARED,
2315 "MRVL_PCIE", pdev);
2316 if (ret) {
2317 pr_err("request_irq failed: ret=%d\n", ret);
2318 adapter->card = NULL;
2319 return -1;
2320 }
2321
2322 adapter->dev = &pdev->dev;
dd04e6ac 2323 strcpy(adapter->fw_name, card->pcie.firmware);
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2324
2325 return 0;
2326}
2327
2328/*
2329 * This function unregisters the PCIE device.
2330 *
2331 * The PCIE IRQ is released, the function is disabled and driver
2332 * data is set to null.
2333 */
2334static void mwifiex_unregister_dev(struct mwifiex_adapter *adapter)
2335{
2336 struct pcie_service_card *card = adapter->card;
2337
2338 if (card) {
2339 dev_dbg(adapter->dev, "%s(): calling free_irq()\n", __func__);
2340 free_irq(card->dev->irq, card->dev);
fc331460
AP
2341
2342 mwifiex_pcie_delete_sleep_cookie_buf(adapter);
2343 mwifiex_pcie_delete_cmdrsp_buf(adapter);
2344 mwifiex_pcie_delete_evtbd_ring(adapter);
2345 mwifiex_pcie_delete_rxbd_ring(adapter);
2346 mwifiex_pcie_delete_txbd_ring(adapter);
2347 card->cmdrsp_buf = NULL;
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2348 }
2349}
2350
2351static struct mwifiex_if_ops pcie_ops = {
2352 .init_if = mwifiex_pcie_init,
2353 .cleanup_if = mwifiex_pcie_cleanup,
2354 .check_fw_status = mwifiex_check_fw_status,
2355 .prog_fw = mwifiex_prog_fw_w_helper,
2356 .register_dev = mwifiex_register_dev,
2357 .unregister_dev = mwifiex_unregister_dev,
2358 .enable_int = mwifiex_pcie_enable_host_int,
2359 .process_int_status = mwifiex_process_int_status,
2360 .host_to_card = mwifiex_pcie_host_to_card,
2361 .wakeup = mwifiex_pm_wakeup_card,
2362 .wakeup_complete = mwifiex_pm_wakeup_card_complete,
2363
2364 /* PCIE specific */
2365 .cmdrsp_complete = mwifiex_pcie_cmdrsp_complete,
2366 .event_complete = mwifiex_pcie_event_complete,
2367 .update_mp_end_port = NULL,
2368 .cleanup_mpa_buf = NULL,
c6d1d87a 2369 .init_fw_port = mwifiex_pcie_init_fw_port,
fbd7e7ac 2370 .clean_pcie_ring = mwifiex_clean_pcie_ring_buf,
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2371};
2372
2373/*
2374 * This function initializes the PCIE driver module.
2375 *
2376 * This initiates the semaphore and registers the device with
2377 * PCIE bus.
2378 */
2379static int mwifiex_pcie_init_module(void)
2380{
2381 int ret;
2382
ca8f2112 2383 pr_debug("Marvell PCIe Driver\n");
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2384
2385 sema_init(&add_remove_card_sem, 1);
2386
2387 /* Clear the flag in case user removes the card. */
2388 user_rmmod = 0;
2389
2390 ret = pci_register_driver(&mwifiex_pcie);
2391 if (ret)
2392 pr_err("Driver register failed!\n");
2393 else
2394 pr_debug("info: Driver registered successfully!\n");
2395
2396 return ret;
2397}
2398
2399/*
2400 * This function cleans up the PCIE driver.
2401 *
2402 * The following major steps are followed for cleanup -
2403 * - Resume the device if its suspended
2404 * - Disconnect the device if connected
2405 * - Shutdown the firmware
2406 * - Unregister the device from PCIE bus.
2407 */
2408static void mwifiex_pcie_cleanup_module(void)
2409{
2410 if (!down_interruptible(&add_remove_card_sem))
2411 up(&add_remove_card_sem);
2412
2413 /* Set the flag as user is removing this module. */
2414 user_rmmod = 1;
2415
2416 pci_unregister_driver(&mwifiex_pcie);
2417}
2418
2419module_init(mwifiex_pcie_init_module);
2420module_exit(mwifiex_pcie_cleanup_module);
2421
2422MODULE_AUTHOR("Marvell International Ltd.");
2423MODULE_DESCRIPTION("Marvell WiFi-Ex PCI-Express Driver version " PCIE_VERSION);
2424MODULE_VERSION(PCIE_VERSION);
2425MODULE_LICENSE("GPL v2");
ca8f2112
AP
2426MODULE_FIRMWARE(PCIE8766_DEFAULT_FW_NAME);
2427MODULE_FIRMWARE(PCIE8897_DEFAULT_FW_NAME);
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