mwifiex: don't drop carrier flag over suspend
[deliverable/linux.git] / drivers / net / wireless / mwifiex / pcie.c
CommitLineData
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1/*
2 * Marvell Wireless LAN device driver: PCIE specific handling
3 *
4 * Copyright (C) 2011, Marvell International Ltd.
5 *
6 * This software file (the "File") is distributed by Marvell International
7 * Ltd. under the terms of the GNU General Public License Version 2, June 1991
8 * (the "License"). You may use, redistribute and/or modify this File in
9 * accordance with the terms and conditions of the License, a copy of which
10 * is available by writing to the Free Software Foundation, Inc.,
11 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the
12 * worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt.
13 *
14 * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE
15 * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE
16 * ARE EXPRESSLY DISCLAIMED. The License provides additional details about
17 * this warranty disclaimer.
18 */
19
20#include <linux/firmware.h>
21
22#include "decl.h"
23#include "ioctl.h"
24#include "util.h"
25#include "fw.h"
26#include "main.h"
27#include "wmm.h"
28#include "11n.h"
29#include "pcie.h"
30
31#define PCIE_VERSION "1.0"
32#define DRV_NAME "Marvell mwifiex PCIe"
33
34static u8 user_rmmod;
35
36static struct mwifiex_if_ops pcie_ops;
37
38static struct semaphore add_remove_card_sem;
39static int mwifiex_pcie_enable_host_int(struct mwifiex_adapter *adapter);
40static int mwifiex_pcie_resume(struct pci_dev *pdev);
41
fc331460
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42static int
43mwifiex_map_pci_memory(struct mwifiex_adapter *adapter, struct sk_buff *skb,
44 int size, int flags)
d930faee 45{
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46 struct pcie_service_card *card = adapter->card;
47 dma_addr_t buf_pa;
d930faee 48
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49 buf_pa = pci_map_single(card->dev, skb->data, size, flags);
50 if (pci_dma_mapping_error(card->dev, buf_pa)) {
51 dev_err(adapter->dev, "failed to map pci memory!\n");
52 return -1;
53 }
54 memcpy(skb->cb, &buf_pa, sizeof(dma_addr_t));
55 return 0;
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56}
57
58/*
59 * This function reads sleep cookie and checks if FW is ready
60 */
61static bool mwifiex_pcie_ok_to_access_hw(struct mwifiex_adapter *adapter)
62{
63 u32 *cookie_addr;
64 struct pcie_service_card *card = adapter->card;
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65 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
66
67 if (!reg->sleep_cookie)
68 return true;
d930faee 69
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70 if (card->sleep_cookie_vbase) {
71 cookie_addr = (u32 *)card->sleep_cookie_vbase;
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72 dev_dbg(adapter->dev, "info: ACCESS_HW: sleep cookie=0x%x\n",
73 *cookie_addr);
74 if (*cookie_addr == FW_AWAKE_COOKIE)
75 return true;
76 }
77
78 return false;
79}
80
81/*
82 * This function probes an mwifiex device and registers it. It allocates
83 * the card structure, enables PCIE function number and initiates the
84 * device registration and initialization procedure by adding a logical
85 * interface.
86 */
87static int mwifiex_pcie_probe(struct pci_dev *pdev,
88 const struct pci_device_id *ent)
89{
90 struct pcie_service_card *card;
91
92 pr_debug("info: vendor=0x%4.04X device=0x%4.04X rev=%d\n",
f57c1edc 93 pdev->vendor, pdev->device, pdev->revision);
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94
95 card = kzalloc(sizeof(struct pcie_service_card), GFP_KERNEL);
e404decb 96 if (!card)
d930faee 97 return -ENOMEM;
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98
99 card->dev = pdev;
100
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101 if (ent->driver_data) {
102 struct mwifiex_pcie_device *data = (void *)ent->driver_data;
103 card->pcie.firmware = data->firmware;
104 card->pcie.reg = data->reg;
105 card->pcie.blksz_fw_dl = data->blksz_fw_dl;
106 }
107
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108 if (mwifiex_add_card(card, &add_remove_card_sem, &pcie_ops,
109 MWIFIEX_PCIE)) {
110 pr_err("%s failed\n", __func__);
111 kfree(card);
112 return -1;
113 }
114
115 return 0;
116}
117
118/*
119 * This function removes the interface and frees up the card structure.
120 */
121static void mwifiex_pcie_remove(struct pci_dev *pdev)
122{
123 struct pcie_service_card *card;
124 struct mwifiex_adapter *adapter;
f57c1edc 125 struct mwifiex_private *priv;
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126 int i;
127
128 card = pci_get_drvdata(pdev);
129 if (!card)
130 return;
131
132 adapter = card->adapter;
133 if (!adapter || !adapter->priv_num)
134 return;
135
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136 /* In case driver is removed when asynchronous FW load is in progress */
137 wait_for_completion(&adapter->fw_load);
138
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139 if (user_rmmod) {
140#ifdef CONFIG_PM
141 if (adapter->is_suspended)
142 mwifiex_pcie_resume(pdev);
143#endif
144
145 for (i = 0; i < adapter->priv_num; i++)
146 if ((GET_BSS_ROLE(adapter->priv[i]) ==
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147 MWIFIEX_BSS_ROLE_STA) &&
148 adapter->priv[i]->media_connected)
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149 mwifiex_deauthenticate(adapter->priv[i], NULL);
150
f57c1edc 151 priv = mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_ANY);
d930faee 152
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153 mwifiex_disable_auto_ds(priv);
154
155 mwifiex_init_shutdown_fw(priv, MWIFIEX_FUNC_SHUTDOWN);
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156 }
157
158 mwifiex_remove_card(card->adapter, &add_remove_card_sem);
159 kfree(card);
160}
161
162/*
163 * Kernel needs to suspend all functions separately. Therefore all
164 * registered functions must have drivers with suspend and resume
165 * methods. Failing that the kernel simply removes the whole card.
166 *
167 * If already not suspended, this function allocates and sends a host
168 * sleep activate request to the firmware and turns off the traffic.
169 */
170static int mwifiex_pcie_suspend(struct pci_dev *pdev, pm_message_t state)
171{
172 struct mwifiex_adapter *adapter;
173 struct pcie_service_card *card;
1499d9fa 174 int hs_actived;
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175
176 if (pdev) {
177 card = (struct pcie_service_card *) pci_get_drvdata(pdev);
83f0c6d1 178 if (!card || !card->adapter) {
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179 pr_err("Card or adapter structure is not valid\n");
180 return 0;
181 }
182 } else {
183 pr_err("PCIE device is not specified\n");
184 return 0;
185 }
186
187 adapter = card->adapter;
188
189 hs_actived = mwifiex_enable_hs(adapter);
190
191 /* Indicate device suspended */
192 adapter->is_suspended = true;
193
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194 return 0;
195}
196
197/*
198 * Kernel needs to suspend all functions separately. Therefore all
199 * registered functions must have drivers with suspend and resume
200 * methods. Failing that the kernel simply removes the whole card.
201 *
202 * If already not resumed, this function turns on the traffic and
203 * sends a host sleep cancel request to the firmware.
204 */
205static int mwifiex_pcie_resume(struct pci_dev *pdev)
206{
207 struct mwifiex_adapter *adapter;
208 struct pcie_service_card *card;
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209
210 if (pdev) {
211 card = (struct pcie_service_card *) pci_get_drvdata(pdev);
212 if (!card || !card->adapter) {
213 pr_err("Card or adapter structure is not valid\n");
214 return 0;
215 }
216 } else {
217 pr_err("PCIE device is not specified\n");
218 return 0;
219 }
220
221 adapter = card->adapter;
222
223 if (!adapter->is_suspended) {
224 dev_warn(adapter->dev, "Device already resumed\n");
225 return 0;
226 }
227
228 adapter->is_suspended = false;
229
d930faee 230 mwifiex_cancel_hs(mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_STA),
f57c1edc 231 MWIFIEX_ASYNC_CMD);
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232
233 return 0;
234}
235
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236static DEFINE_PCI_DEVICE_TABLE(mwifiex_ids) = {
237 {
238 PCIE_VENDOR_ID_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8766P,
239 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
dd04e6ac 240 .driver_data = (unsigned long) &mwifiex_pcie8766,
d930faee 241 },
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242 {
243 PCIE_VENDOR_ID_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8897,
244 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
245 .driver_data = (unsigned long) &mwifiex_pcie8897,
246 },
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247 {},
248};
249
250MODULE_DEVICE_TABLE(pci, mwifiex_ids);
251
252/* PCI Device Driver */
253static struct pci_driver __refdata mwifiex_pcie = {
254 .name = "mwifiex_pcie",
255 .id_table = mwifiex_ids,
256 .probe = mwifiex_pcie_probe,
257 .remove = mwifiex_pcie_remove,
258#ifdef CONFIG_PM
259 /* Power Management Hooks */
260 .suspend = mwifiex_pcie_suspend,
261 .resume = mwifiex_pcie_resume,
262#endif
263};
264
265/*
266 * This function writes data into PCIE card register.
267 */
268static int mwifiex_write_reg(struct mwifiex_adapter *adapter, int reg, u32 data)
269{
270 struct pcie_service_card *card = adapter->card;
271
272 iowrite32(data, card->pci_mmap1 + reg);
273
274 return 0;
275}
276
277/*
278 * This function reads data from PCIE card register.
279 */
280static int mwifiex_read_reg(struct mwifiex_adapter *adapter, int reg, u32 *data)
281{
282 struct pcie_service_card *card = adapter->card;
283
284 *data = ioread32(card->pci_mmap1 + reg);
285
286 return 0;
287}
288
289/*
290 * This function wakes up the card.
291 *
292 * A host power up command is written to the card configuration
293 * register to wake up the card.
294 */
295static int mwifiex_pm_wakeup_card(struct mwifiex_adapter *adapter)
296{
297 int i = 0;
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298 struct pcie_service_card *card = adapter->card;
299 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee 300
52301a81 301 while (reg->sleep_cookie && mwifiex_pcie_ok_to_access_hw(adapter)) {
d930faee 302 i++;
e7891ba2 303 usleep_range(10, 20);
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304 /* 50ms max wait */
305 if (i == 50000)
306 break;
307 }
308
309 dev_dbg(adapter->dev, "event: Wakeup device...\n");
310
311 /* Enable interrupts or any chip access will wakeup device */
312 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_MASK, HOST_INTR_MASK)) {
313 dev_warn(adapter->dev, "Enable host interrupt failed\n");
314 return -1;
315 }
316
317 dev_dbg(adapter->dev, "PCIE wakeup: Setting PS_STATE_AWAKE\n");
318 adapter->ps_state = PS_STATE_AWAKE;
319
320 return 0;
321}
322
323/*
324 * This function is called after the card has woken up.
325 *
326 * The card configuration register is reset.
327 */
328static int mwifiex_pm_wakeup_card_complete(struct mwifiex_adapter *adapter)
329{
330 dev_dbg(adapter->dev, "cmd: Wakeup device completed\n");
331
332 return 0;
333}
334
335/*
336 * This function disables the host interrupt.
337 *
338 * The host interrupt mask is read, the disable bit is reset and
339 * written back to the card host interrupt mask register.
340 */
341static int mwifiex_pcie_disable_host_int(struct mwifiex_adapter *adapter)
342{
343 if (mwifiex_pcie_ok_to_access_hw(adapter)) {
344 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_MASK,
345 0x00000000)) {
346 dev_warn(adapter->dev, "Disable host interrupt failed\n");
347 return -1;
348 }
349 }
350
351 return 0;
352}
353
354/*
355 * This function enables the host interrupt.
356 *
357 * The host interrupt enable mask is written to the card
358 * host interrupt mask register.
359 */
360static int mwifiex_pcie_enable_host_int(struct mwifiex_adapter *adapter)
361{
362 if (mwifiex_pcie_ok_to_access_hw(adapter)) {
363 /* Simply write the mask to the register */
364 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_MASK,
365 HOST_INTR_MASK)) {
366 dev_warn(adapter->dev, "Enable host interrupt failed\n");
367 return -1;
368 }
369 }
370
371 return 0;
372}
373
374/*
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375 * This function initializes TX buffer ring descriptors
376 */
377static int mwifiex_init_txq_ring(struct mwifiex_adapter *adapter)
378{
379 struct pcie_service_card *card = adapter->card;
ca8f2112 380 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
0732484b 381 struct mwifiex_pcie_buf_desc *desc;
ca8f2112 382 struct mwifiex_pfu_buf_desc *desc2;
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AP
383 int i;
384
385 for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) {
386 card->tx_buf_list[i] = NULL;
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AP
387 if (reg->pfu_enabled) {
388 card->txbd_ring[i] = (void *)card->txbd_ring_vbase +
389 (sizeof(*desc2) * i);
390 desc2 = card->txbd_ring[i];
391 memset(desc2, 0, sizeof(*desc2));
392 } else {
393 card->txbd_ring[i] = (void *)card->txbd_ring_vbase +
394 (sizeof(*desc) * i);
395 desc = card->txbd_ring[i];
396 memset(desc, 0, sizeof(*desc));
397 }
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398 }
399
400 return 0;
401}
402
403/* This function initializes RX buffer ring descriptors. Each SKB is allocated
404 * here and after mapping PCI memory, its physical address is assigned to
405 * PCIE Rx buffer descriptor's physical address.
406 */
407static int mwifiex_init_rxq_ring(struct mwifiex_adapter *adapter)
408{
409 struct pcie_service_card *card = adapter->card;
ca8f2112 410 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
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411 struct sk_buff *skb;
412 struct mwifiex_pcie_buf_desc *desc;
ca8f2112 413 struct mwifiex_pfu_buf_desc *desc2;
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414 dma_addr_t buf_pa;
415 int i;
416
417 for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) {
418 /* Allocate skb here so that firmware can DMA data from it */
419 skb = dev_alloc_skb(MWIFIEX_RX_DATA_BUF_SIZE);
420 if (!skb) {
421 dev_err(adapter->dev,
422 "Unable to allocate skb for RX ring.\n");
423 kfree(card->rxbd_ring_vbase);
424 return -ENOMEM;
425 }
426
427 if (mwifiex_map_pci_memory(adapter, skb,
428 MWIFIEX_RX_DATA_BUF_SIZE,
429 PCI_DMA_FROMDEVICE))
430 return -1;
431
432 MWIFIEX_SKB_PACB(skb, &buf_pa);
433
434 dev_dbg(adapter->dev,
435 "info: RX ring: skb=%p len=%d data=%p buf_pa=%#x:%x\n",
436 skb, skb->len, skb->data, (u32)buf_pa,
437 (u32)((u64)buf_pa >> 32));
438
439 card->rx_buf_list[i] = skb;
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AP
440 if (reg->pfu_enabled) {
441 card->rxbd_ring[i] = (void *)card->rxbd_ring_vbase +
442 (sizeof(*desc2) * i);
443 desc2 = card->rxbd_ring[i];
444 desc2->paddr = buf_pa;
445 desc2->len = (u16)skb->len;
446 desc2->frag_len = (u16)skb->len;
447 desc2->flags = reg->ring_flag_eop | reg->ring_flag_sop;
448 desc2->offset = 0;
449 } else {
450 card->rxbd_ring[i] = (void *)(card->rxbd_ring_vbase +
451 (sizeof(*desc) * i));
452 desc = card->rxbd_ring[i];
453 desc->paddr = buf_pa;
454 desc->len = (u16)skb->len;
455 desc->flags = 0;
456 }
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457 }
458
459 return 0;
460}
461
462/* This function initializes event buffer ring descriptors. Each SKB is
463 * allocated here and after mapping PCI memory, its physical address is assigned
464 * to PCIE Rx buffer descriptor's physical address
465 */
466static int mwifiex_pcie_init_evt_ring(struct mwifiex_adapter *adapter)
467{
468 struct pcie_service_card *card = adapter->card;
e05dc3e9 469 struct mwifiex_evt_buf_desc *desc;
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470 struct sk_buff *skb;
471 dma_addr_t buf_pa;
472 int i;
473
474 for (i = 0; i < MWIFIEX_MAX_EVT_BD; i++) {
475 /* Allocate skb here so that firmware can DMA data from it */
476 skb = dev_alloc_skb(MAX_EVENT_SIZE);
477 if (!skb) {
478 dev_err(adapter->dev,
479 "Unable to allocate skb for EVENT buf.\n");
480 kfree(card->evtbd_ring_vbase);
481 return -ENOMEM;
482 }
483 skb_put(skb, MAX_EVENT_SIZE);
484
485 if (mwifiex_map_pci_memory(adapter, skb, MAX_EVENT_SIZE,
486 PCI_DMA_FROMDEVICE))
487 return -1;
488
489 MWIFIEX_SKB_PACB(skb, &buf_pa);
490
491 dev_dbg(adapter->dev,
492 "info: EVT ring: skb=%p len=%d data=%p buf_pa=%#x:%x\n",
493 skb, skb->len, skb->data, (u32)buf_pa,
494 (u32)((u64)buf_pa >> 32));
495
496 card->evt_buf_list[i] = skb;
497 card->evtbd_ring[i] = (void *)(card->evtbd_ring_vbase +
498 (sizeof(*desc) * i));
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499 desc = card->evtbd_ring[i];
500 desc->paddr = buf_pa;
501 desc->len = (u16)skb->len;
502 desc->flags = 0;
503 }
504
505 return 0;
506}
507
508/* This function cleans up TX buffer rings. If any of the buffer list has valid
509 * SKB address, associated SKB is freed.
510 */
511static void mwifiex_cleanup_txq_ring(struct mwifiex_adapter *adapter)
512{
513 struct pcie_service_card *card = adapter->card;
ca8f2112 514 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
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515 struct sk_buff *skb;
516 struct mwifiex_pcie_buf_desc *desc;
ca8f2112 517 struct mwifiex_pfu_buf_desc *desc2;
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518 int i;
519
520 for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) {
ca8f2112
AP
521 if (reg->pfu_enabled) {
522 desc2 = card->txbd_ring[i];
523 if (card->tx_buf_list[i]) {
524 skb = card->tx_buf_list[i];
525 pci_unmap_single(card->dev, desc2->paddr,
526 skb->len, PCI_DMA_TODEVICE);
527 dev_kfree_skb_any(skb);
528 }
529 memset(desc2, 0, sizeof(*desc2));
530 } else {
531 desc = card->txbd_ring[i];
532 if (card->tx_buf_list[i]) {
533 skb = card->tx_buf_list[i];
534 pci_unmap_single(card->dev, desc->paddr,
535 skb->len, PCI_DMA_TODEVICE);
536 dev_kfree_skb_any(skb);
537 }
538 memset(desc, 0, sizeof(*desc));
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539 }
540 card->tx_buf_list[i] = NULL;
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541 }
542
543 return;
544}
545
546/* This function cleans up RX buffer rings. If any of the buffer list has valid
547 * SKB address, associated SKB is freed.
548 */
549static void mwifiex_cleanup_rxq_ring(struct mwifiex_adapter *adapter)
550{
551 struct pcie_service_card *card = adapter->card;
ca8f2112 552 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
0732484b 553 struct mwifiex_pcie_buf_desc *desc;
ca8f2112 554 struct mwifiex_pfu_buf_desc *desc2;
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555 struct sk_buff *skb;
556 int i;
557
558 for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) {
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559 if (reg->pfu_enabled) {
560 desc2 = card->rxbd_ring[i];
561 if (card->rx_buf_list[i]) {
562 skb = card->rx_buf_list[i];
563 pci_unmap_single(card->dev, desc2->paddr,
564 skb->len, PCI_DMA_TODEVICE);
565 dev_kfree_skb_any(skb);
566 }
567 memset(desc2, 0, sizeof(*desc2));
568 } else {
569 desc = card->rxbd_ring[i];
570 if (card->rx_buf_list[i]) {
571 skb = card->rx_buf_list[i];
572 pci_unmap_single(card->dev, desc->paddr,
573 skb->len, PCI_DMA_TODEVICE);
574 dev_kfree_skb_any(skb);
575 }
576 memset(desc, 0, sizeof(*desc));
0732484b 577 }
ca8f2112 578 card->rx_buf_list[i] = NULL;
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579 }
580
581 return;
582}
583
584/* This function cleans up event buffer rings. If any of the buffer list has
585 * valid SKB address, associated SKB is freed.
586 */
587static void mwifiex_cleanup_evt_ring(struct mwifiex_adapter *adapter)
588{
589 struct pcie_service_card *card = adapter->card;
e05dc3e9 590 struct mwifiex_evt_buf_desc *desc;
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591 struct sk_buff *skb;
592 int i;
593
594 for (i = 0; i < MWIFIEX_MAX_EVT_BD; i++) {
595 desc = card->evtbd_ring[i];
596 if (card->evt_buf_list[i]) {
597 skb = card->evt_buf_list[i];
598 pci_unmap_single(card->dev, desc->paddr, MAX_EVENT_SIZE,
599 PCI_DMA_FROMDEVICE);
600 dev_kfree_skb_any(skb);
601 }
602 card->evt_buf_list[i] = NULL;
603 memset(desc, 0, sizeof(*desc));
604 }
605
606 return;
607}
608
609/* This function creates buffer descriptor ring for TX
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610 */
611static int mwifiex_pcie_create_txbd_ring(struct mwifiex_adapter *adapter)
612{
613 struct pcie_service_card *card = adapter->card;
dd04e6ac 614 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
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615
616 /*
617 * driver maintaines the write pointer and firmware maintaines the read
618 * pointer. The write pointer starts at 0 (zero) while the read pointer
619 * starts at zero with rollover bit set
620 */
621 card->txbd_wrptr = 0;
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622
623 if (reg->pfu_enabled)
624 card->txbd_rdptr = 0;
625 else
626 card->txbd_rdptr |= reg->tx_rollover_ind;
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627
628 /* allocate shared memory for the BD ring and divide the same in to
629 several descriptors */
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630 if (reg->pfu_enabled)
631 card->txbd_ring_size = sizeof(struct mwifiex_pfu_buf_desc) *
632 MWIFIEX_MAX_TXRX_BD;
633 else
634 card->txbd_ring_size = sizeof(struct mwifiex_pcie_buf_desc) *
635 MWIFIEX_MAX_TXRX_BD;
636
d930faee 637 dev_dbg(adapter->dev, "info: txbd_ring: Allocating %d bytes\n",
f57c1edc 638 card->txbd_ring_size);
fc331460
AP
639 card->txbd_ring_vbase = pci_alloc_consistent(card->dev,
640 card->txbd_ring_size,
641 &card->txbd_ring_pbase);
d930faee 642 if (!card->txbd_ring_vbase) {
fc331460
AP
643 dev_err(adapter->dev,
644 "allocate consistent memory (%d bytes) failed!\n",
645 card->txbd_ring_size);
8c53e42d 646 return -ENOMEM;
d930faee 647 }
f57c1edc
YAP
648 dev_dbg(adapter->dev,
649 "info: txbd_ring - base: %p, pbase: %#x:%x, len: %x\n",
fc331460 650 card->txbd_ring_vbase, (unsigned int)card->txbd_ring_pbase,
f57c1edc 651 (u32)((u64)card->txbd_ring_pbase >> 32), card->txbd_ring_size);
d930faee 652
0732484b 653 return mwifiex_init_txq_ring(adapter);
d930faee
AK
654}
655
656static int mwifiex_pcie_delete_txbd_ring(struct mwifiex_adapter *adapter)
657{
658 struct pcie_service_card *card = adapter->card;
dd04e6ac 659 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee 660
0732484b 661 mwifiex_cleanup_txq_ring(adapter);
d930faee 662
fc331460
AP
663 if (card->txbd_ring_vbase)
664 pci_free_consistent(card->dev, card->txbd_ring_size,
665 card->txbd_ring_vbase,
666 card->txbd_ring_pbase);
d930faee
AK
667 card->txbd_ring_size = 0;
668 card->txbd_wrptr = 0;
dd04e6ac 669 card->txbd_rdptr = 0 | reg->tx_rollover_ind;
d930faee 670 card->txbd_ring_vbase = NULL;
fc331460 671 card->txbd_ring_pbase = 0;
d930faee
AK
672
673 return 0;
674}
675
676/*
677 * This function creates buffer descriptor ring for RX
678 */
679static int mwifiex_pcie_create_rxbd_ring(struct mwifiex_adapter *adapter)
680{
681 struct pcie_service_card *card = adapter->card;
dd04e6ac 682 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee
AK
683
684 /*
685 * driver maintaines the read pointer and firmware maintaines the write
686 * pointer. The write pointer starts at 0 (zero) while the read pointer
687 * starts at zero with rollover bit set
688 */
689 card->rxbd_wrptr = 0;
dd04e6ac 690 card->rxbd_rdptr = reg->rx_rollover_ind;
d930faee 691
ca8f2112
AP
692 if (reg->pfu_enabled)
693 card->rxbd_ring_size = sizeof(struct mwifiex_pfu_buf_desc) *
694 MWIFIEX_MAX_TXRX_BD;
695 else
696 card->rxbd_ring_size = sizeof(struct mwifiex_pcie_buf_desc) *
697 MWIFIEX_MAX_TXRX_BD;
698
d930faee 699 dev_dbg(adapter->dev, "info: rxbd_ring: Allocating %d bytes\n",
f57c1edc 700 card->rxbd_ring_size);
fc331460
AP
701 card->rxbd_ring_vbase = pci_alloc_consistent(card->dev,
702 card->rxbd_ring_size,
703 &card->rxbd_ring_pbase);
d930faee 704 if (!card->rxbd_ring_vbase) {
fc331460
AP
705 dev_err(adapter->dev,
706 "allocate consistent memory (%d bytes) failed!\n",
707 card->rxbd_ring_size);
8c53e42d 708 return -ENOMEM;
d930faee 709 }
d930faee 710
f57c1edc
YAP
711 dev_dbg(adapter->dev,
712 "info: rxbd_ring - base: %p, pbase: %#x:%x, len: %#x\n",
713 card->rxbd_ring_vbase, (u32)card->rxbd_ring_pbase,
714 (u32)((u64)card->rxbd_ring_pbase >> 32),
715 card->rxbd_ring_size);
d930faee 716
0732484b 717 return mwifiex_init_rxq_ring(adapter);
d930faee
AK
718}
719
720/*
721 * This function deletes Buffer descriptor ring for RX
722 */
723static int mwifiex_pcie_delete_rxbd_ring(struct mwifiex_adapter *adapter)
724{
725 struct pcie_service_card *card = adapter->card;
dd04e6ac 726 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee 727
0732484b 728 mwifiex_cleanup_rxq_ring(adapter);
d930faee 729
fc331460
AP
730 if (card->rxbd_ring_vbase)
731 pci_free_consistent(card->dev, card->rxbd_ring_size,
732 card->rxbd_ring_vbase,
733 card->rxbd_ring_pbase);
d930faee
AK
734 card->rxbd_ring_size = 0;
735 card->rxbd_wrptr = 0;
dd04e6ac 736 card->rxbd_rdptr = 0 | reg->rx_rollover_ind;
d930faee 737 card->rxbd_ring_vbase = NULL;
fc331460 738 card->rxbd_ring_pbase = 0;
d930faee
AK
739
740 return 0;
741}
742
743/*
744 * This function creates buffer descriptor ring for Events
745 */
746static int mwifiex_pcie_create_evtbd_ring(struct mwifiex_adapter *adapter)
747{
748 struct pcie_service_card *card = adapter->card;
dd04e6ac 749 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee
AK
750
751 /*
752 * driver maintaines the read pointer and firmware maintaines the write
753 * pointer. The write pointer starts at 0 (zero) while the read pointer
754 * starts at zero with rollover bit set
755 */
756 card->evtbd_wrptr = 0;
dd04e6ac 757 card->evtbd_rdptr = reg->evt_rollover_ind;
d930faee 758
e05dc3e9 759 card->evtbd_ring_size = sizeof(struct mwifiex_evt_buf_desc) *
ca8f2112
AP
760 MWIFIEX_MAX_EVT_BD;
761
d930faee 762 dev_dbg(adapter->dev, "info: evtbd_ring: Allocating %d bytes\n",
f57c1edc 763 card->evtbd_ring_size);
fc331460
AP
764 card->evtbd_ring_vbase = pci_alloc_consistent(card->dev,
765 card->evtbd_ring_size,
766 &card->evtbd_ring_pbase);
d930faee 767 if (!card->evtbd_ring_vbase) {
f57c1edc 768 dev_err(adapter->dev,
fc331460
AP
769 "allocate consistent memory (%d bytes) failed!\n",
770 card->evtbd_ring_size);
8c53e42d 771 return -ENOMEM;
d930faee 772 }
d930faee 773
f57c1edc
YAP
774 dev_dbg(adapter->dev,
775 "info: CMDRSP/EVT bd_ring - base: %p pbase: %#x:%x len: %#x\n",
776 card->evtbd_ring_vbase, (u32)card->evtbd_ring_pbase,
777 (u32)((u64)card->evtbd_ring_pbase >> 32),
778 card->evtbd_ring_size);
d930faee 779
0732484b 780 return mwifiex_pcie_init_evt_ring(adapter);
d930faee
AK
781}
782
783/*
784 * This function deletes Buffer descriptor ring for Events
785 */
786static int mwifiex_pcie_delete_evtbd_ring(struct mwifiex_adapter *adapter)
787{
788 struct pcie_service_card *card = adapter->card;
dd04e6ac 789 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee 790
0732484b 791 mwifiex_cleanup_evt_ring(adapter);
d930faee 792
fc331460
AP
793 if (card->evtbd_ring_vbase)
794 pci_free_consistent(card->dev, card->evtbd_ring_size,
795 card->evtbd_ring_vbase,
796 card->evtbd_ring_pbase);
d930faee 797 card->evtbd_wrptr = 0;
dd04e6ac 798 card->evtbd_rdptr = 0 | reg->evt_rollover_ind;
d930faee
AK
799 card->evtbd_ring_size = 0;
800 card->evtbd_ring_vbase = NULL;
fc331460 801 card->evtbd_ring_pbase = 0;
d930faee
AK
802
803 return 0;
804}
805
806/*
807 * This function allocates a buffer for CMDRSP
808 */
809static int mwifiex_pcie_alloc_cmdrsp_buf(struct mwifiex_adapter *adapter)
810{
811 struct pcie_service_card *card = adapter->card;
812 struct sk_buff *skb;
813
814 /* Allocate memory for receiving command response data */
815 skb = dev_alloc_skb(MWIFIEX_UPLD_SIZE);
816 if (!skb) {
f57c1edc
YAP
817 dev_err(adapter->dev,
818 "Unable to allocate skb for command response data.\n");
d930faee
AK
819 return -ENOMEM;
820 }
d930faee 821 skb_put(skb, MWIFIEX_UPLD_SIZE);
fc331460
AP
822 if (mwifiex_map_pci_memory(adapter, skb, MWIFIEX_UPLD_SIZE,
823 PCI_DMA_FROMDEVICE))
824 return -1;
d930faee 825
fc331460 826 card->cmdrsp_buf = skb;
d930faee
AK
827
828 return 0;
829}
830
831/*
832 * This function deletes a buffer for CMDRSP
833 */
834static int mwifiex_pcie_delete_cmdrsp_buf(struct mwifiex_adapter *adapter)
835{
836 struct pcie_service_card *card;
fc331460 837 dma_addr_t buf_pa;
d930faee
AK
838
839 if (!adapter)
840 return 0;
841
842 card = adapter->card;
843
fc331460
AP
844 if (card && card->cmdrsp_buf) {
845 MWIFIEX_SKB_PACB(card->cmdrsp_buf, &buf_pa);
846 pci_unmap_single(card->dev, buf_pa, MWIFIEX_UPLD_SIZE,
847 PCI_DMA_FROMDEVICE);
d930faee 848 dev_kfree_skb_any(card->cmdrsp_buf);
fc331460 849 }
d930faee 850
fc331460
AP
851 if (card && card->cmd_buf) {
852 MWIFIEX_SKB_PACB(card->cmd_buf, &buf_pa);
853 pci_unmap_single(card->dev, buf_pa, MWIFIEX_SIZE_OF_CMD_BUFFER,
854 PCI_DMA_TODEVICE);
d930faee 855 dev_kfree_skb_any(card->cmd_buf);
fc331460 856 }
d930faee
AK
857 return 0;
858}
859
860/*
861 * This function allocates a buffer for sleep cookie
862 */
863static int mwifiex_pcie_alloc_sleep_cookie_buf(struct mwifiex_adapter *adapter)
864{
d930faee
AK
865 struct pcie_service_card *card = adapter->card;
866
fc331460
AP
867 card->sleep_cookie_vbase = pci_alloc_consistent(card->dev, sizeof(u32),
868 &card->sleep_cookie_pbase);
869 if (!card->sleep_cookie_vbase) {
870 dev_err(adapter->dev, "pci_alloc_consistent failed!\n");
d930faee
AK
871 return -ENOMEM;
872 }
d930faee 873 /* Init val of Sleep Cookie */
fc331460 874 *(u32 *)card->sleep_cookie_vbase = FW_AWAKE_COOKIE;
d930faee
AK
875
876 dev_dbg(adapter->dev, "alloc_scook: sleep cookie=0x%x\n",
fc331460 877 *((u32 *)card->sleep_cookie_vbase));
d930faee
AK
878
879 return 0;
880}
881
882/*
883 * This function deletes buffer for sleep cookie
884 */
885static int mwifiex_pcie_delete_sleep_cookie_buf(struct mwifiex_adapter *adapter)
886{
887 struct pcie_service_card *card;
888
889 if (!adapter)
890 return 0;
891
892 card = adapter->card;
893
fc331460
AP
894 if (card && card->sleep_cookie_vbase) {
895 pci_free_consistent(card->dev, sizeof(u32),
896 card->sleep_cookie_vbase,
897 card->sleep_cookie_pbase);
898 card->sleep_cookie_vbase = NULL;
d930faee
AK
899 }
900
901 return 0;
902}
903
fbd7e7ac
AP
904/* This function flushes the TX buffer descriptor ring
905 * This function defined as handler is also called while cleaning TXRX
906 * during disconnect/ bss stop.
907 */
908static int mwifiex_clean_pcie_ring_buf(struct mwifiex_adapter *adapter)
909{
910 struct pcie_service_card *card = adapter->card;
dd04e6ac 911 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
fbd7e7ac
AP
912 u32 rdptr;
913
914 /* Read the TX ring read pointer set by firmware */
dd04e6ac 915 if (mwifiex_read_reg(adapter, reg->tx_rdptr, &rdptr)) {
fbd7e7ac 916 dev_err(adapter->dev,
dd04e6ac 917 "Flush TXBD: failed to read reg->tx_rdptr\n");
fbd7e7ac
AP
918 return -1;
919 }
920
921 if (!mwifiex_pcie_txbd_empty(card, rdptr)) {
922 card->txbd_flush = 1;
923 /* write pointer already set at last send
924 * send dnld-rdy intr again, wait for completion.
925 */
926 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
927 CPU_INTR_DNLD_RDY)) {
928 dev_err(adapter->dev,
929 "failed to assert dnld-rdy interrupt.\n");
930 return -1;
931 }
932 }
933 return 0;
934}
935
d930faee 936/*
e7f767a7 937 * This function unmaps and frees downloaded data buffer
d930faee 938 */
e7f767a7 939static int mwifiex_pcie_send_data_complete(struct mwifiex_adapter *adapter)
d930faee 940{
e7f767a7
AP
941 struct sk_buff *skb;
942 dma_addr_t buf_pa;
ca8f2112 943 u32 wrdoneidx, rdptr, num_tx_buffs, unmap_count = 0;
e05dc3e9 944 struct mwifiex_pcie_buf_desc *desc;
ca8f2112 945 struct mwifiex_pfu_buf_desc *desc2;
d930faee 946 struct pcie_service_card *card = adapter->card;
dd04e6ac 947 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee
AK
948
949 if (!mwifiex_pcie_ok_to_access_hw(adapter))
950 mwifiex_pm_wakeup_card(adapter);
951
952 /* Read the TX ring read pointer set by firmware */
dd04e6ac 953 if (mwifiex_read_reg(adapter, reg->tx_rdptr, &rdptr)) {
f57c1edc 954 dev_err(adapter->dev,
dd04e6ac 955 "SEND COMP: failed to read reg->tx_rdptr\n");
d930faee
AK
956 return -1;
957 }
958
e7f767a7
AP
959 dev_dbg(adapter->dev, "SEND COMP: rdptr_prev=0x%x, rdptr=0x%x\n",
960 card->txbd_rdptr, rdptr);
d930faee 961
ca8f2112 962 num_tx_buffs = MWIFIEX_MAX_TXRX_BD << reg->tx_start_ptr;
e7f767a7 963 /* free from previous txbd_rdptr to current txbd_rdptr */
dd04e6ac
AP
964 while (((card->txbd_rdptr & reg->tx_mask) !=
965 (rdptr & reg->tx_mask)) ||
966 ((card->txbd_rdptr & reg->tx_rollover_ind) !=
967 (rdptr & reg->tx_rollover_ind))) {
ca8f2112
AP
968 wrdoneidx = (card->txbd_rdptr & reg->tx_mask) >>
969 reg->tx_start_ptr;
e7f767a7
AP
970
971 skb = card->tx_buf_list[wrdoneidx];
972 if (skb) {
973 dev_dbg(adapter->dev,
974 "SEND COMP: Detach skb %p at txbd_rdidx=%d\n",
975 skb, wrdoneidx);
976 MWIFIEX_SKB_PACB(skb, &buf_pa);
977 pci_unmap_single(card->dev, buf_pa, skb->len,
978 PCI_DMA_TODEVICE);
979
980 unmap_count++;
981
982 if (card->txbd_flush)
983 mwifiex_write_data_complete(adapter, skb, 0,
984 -1);
985 else
986 mwifiex_write_data_complete(adapter, skb, 0, 0);
987 }
988
989 card->tx_buf_list[wrdoneidx] = NULL;
ca8f2112
AP
990
991 if (reg->pfu_enabled) {
992 desc2 = (void *)card->txbd_ring[wrdoneidx];
993 memset(desc2, 0, sizeof(*desc2));
994 } else {
995 desc = card->txbd_ring[wrdoneidx];
996 memset(desc, 0, sizeof(*desc));
997 }
998 switch (card->dev->device) {
999 case PCIE_DEVICE_ID_MARVELL_88W8766P:
1000 card->txbd_rdptr++;
1001 break;
1002 case PCIE_DEVICE_ID_MARVELL_88W8897:
1003 card->txbd_rdptr += reg->ring_tx_start_ptr;
1004 break;
1005 }
1006
e7f767a7 1007
dd04e6ac 1008 if ((card->txbd_rdptr & reg->tx_mask) == num_tx_buffs)
e7f767a7 1009 card->txbd_rdptr = ((card->txbd_rdptr &
dd04e6ac
AP
1010 reg->tx_rollover_ind) ^
1011 reg->tx_rollover_ind);
e7f767a7
AP
1012 }
1013
1014 if (unmap_count)
1015 adapter->data_sent = false;
1016
1017 if (card->txbd_flush) {
3d482038 1018 if (mwifiex_pcie_txbd_empty(card, card->txbd_rdptr))
e7f767a7
AP
1019 card->txbd_flush = 0;
1020 else
1021 mwifiex_clean_pcie_ring_buf(adapter);
1022 }
1023
1024 return 0;
1025}
1026
1027/* This function sends data buffer to device. First 4 bytes of payload
1028 * are filled with payload length and payload type. Then this payload
1029 * is mapped to PCI device memory. Tx ring pointers are advanced accordingly.
1030 * Download ready interrupt to FW is deffered if Tx ring is not full and
1031 * additional payload can be accomodated.
1032 */
1033static int
1034mwifiex_pcie_send_data(struct mwifiex_adapter *adapter, struct sk_buff *skb,
1035 struct mwifiex_tx_param *tx_param)
1036{
1037 struct pcie_service_card *card = adapter->card;
dd04e6ac 1038 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
ca8f2112 1039 u32 wrindx, num_tx_buffs, rx_val;
e7f767a7
AP
1040 int ret;
1041 dma_addr_t buf_pa;
e05dc3e9 1042 struct mwifiex_pcie_buf_desc *desc;
ca8f2112 1043 struct mwifiex_pfu_buf_desc *desc2;
e7f767a7
AP
1044 __le16 *tmp;
1045
1046 if (!(skb->data && skb->len)) {
1047 dev_err(adapter->dev, "%s(): invalid parameter <%p, %#x>\n",
1048 __func__, skb->data, skb->len);
1049 return -1;
1050 }
1051
1052 if (!mwifiex_pcie_ok_to_access_hw(adapter))
1053 mwifiex_pm_wakeup_card(adapter);
1054
ca8f2112 1055 num_tx_buffs = MWIFIEX_MAX_TXRX_BD << reg->tx_start_ptr;
e7f767a7
AP
1056 dev_dbg(adapter->dev, "info: SEND DATA: <Rd: %#x, Wr: %#x>\n",
1057 card->txbd_rdptr, card->txbd_wrptr);
1058 if (mwifiex_pcie_txbd_not_full(card)) {
d930faee
AK
1059 u8 *payload;
1060
1061 adapter->data_sent = true;
e7f767a7 1062 payload = skb->data;
d930faee
AK
1063 tmp = (__le16 *)&payload[0];
1064 *tmp = cpu_to_le16((u16)skb->len);
1065 tmp = (__le16 *)&payload[2];
1066 *tmp = cpu_to_le16(MWIFIEX_TYPE_DATA);
e7f767a7
AP
1067
1068 if (mwifiex_map_pci_memory(adapter, skb, skb->len ,
1069 PCI_DMA_TODEVICE))
1070 return -1;
1071
ca8f2112 1072 wrindx = (card->txbd_wrptr & reg->tx_mask) >> reg->tx_start_ptr;
e7f767a7
AP
1073 MWIFIEX_SKB_PACB(skb, &buf_pa);
1074 card->tx_buf_list[wrindx] = skb;
d930faee 1075
ca8f2112
AP
1076 if (reg->pfu_enabled) {
1077 desc2 = (void *)card->txbd_ring[wrindx];
1078 desc2->paddr = buf_pa;
1079 desc2->len = (u16)skb->len;
1080 desc2->frag_len = (u16)skb->len;
1081 desc2->offset = 0;
1082 desc2->flags = MWIFIEX_BD_FLAG_FIRST_DESC |
1083 MWIFIEX_BD_FLAG_LAST_DESC;
1084 } else {
1085 desc = card->txbd_ring[wrindx];
1086 desc->paddr = buf_pa;
1087 desc->len = (u16)skb->len;
1088 desc->flags = MWIFIEX_BD_FLAG_FIRST_DESC |
1089 MWIFIEX_BD_FLAG_LAST_DESC;
1090 }
1091
1092 switch (card->dev->device) {
1093 case PCIE_DEVICE_ID_MARVELL_88W8766P:
1094 card->txbd_wrptr++;
1095 break;
1096 case PCIE_DEVICE_ID_MARVELL_88W8897:
1097 card->txbd_wrptr += reg->ring_tx_start_ptr;
1098 break;
1099 }
1100
1101 if ((card->txbd_wrptr & reg->tx_mask) == num_tx_buffs)
d930faee 1102 card->txbd_wrptr = ((card->txbd_wrptr &
dd04e6ac
AP
1103 reg->tx_rollover_ind) ^
1104 reg->tx_rollover_ind);
d930faee 1105
ca8f2112 1106 rx_val = card->rxbd_rdptr & reg->rx_wrap_mask;
dd04e6ac
AP
1107 /* Write the TX ring write pointer in to reg->tx_wrptr */
1108 if (mwifiex_write_reg(adapter, reg->tx_wrptr,
ca8f2112 1109 card->txbd_wrptr | rx_val)) {
f57c1edc 1110 dev_err(adapter->dev,
dd04e6ac 1111 "SEND DATA: failed to write reg->tx_wrptr\n");
e7f767a7
AP
1112 ret = -1;
1113 goto done_unmap;
d930faee 1114 }
e7f767a7
AP
1115 if ((mwifiex_pcie_txbd_not_full(card)) &&
1116 tx_param->next_pkt_len) {
1117 /* have more packets and TxBD still can hold more */
1118 dev_dbg(adapter->dev,
1119 "SEND DATA: delay dnld-rdy interrupt.\n");
1120 adapter->data_sent = false;
1121 } else {
1122 /* Send the TX ready interrupt */
1123 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
1124 CPU_INTR_DNLD_RDY)) {
1125 dev_err(adapter->dev,
1126 "SEND DATA: failed to assert dnld-rdy interrupt.\n");
1127 ret = -1;
1128 goto done_unmap;
1129 }
d930faee
AK
1130 }
1131 dev_dbg(adapter->dev, "info: SEND DATA: Updated <Rd: %#x, Wr: "
f57c1edc 1132 "%#x> and sent packet to firmware successfully\n",
e7f767a7 1133 card->txbd_rdptr, card->txbd_wrptr);
d930faee 1134 } else {
f57c1edc
YAP
1135 dev_dbg(adapter->dev,
1136 "info: TX Ring full, can't send packets to fw\n");
d930faee
AK
1137 adapter->data_sent = true;
1138 /* Send the TX ready interrupt */
1139 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
1140 CPU_INTR_DNLD_RDY))
f57c1edc
YAP
1141 dev_err(adapter->dev,
1142 "SEND DATA: failed to assert door-bell intr\n");
d930faee
AK
1143 return -EBUSY;
1144 }
1145
e7f767a7
AP
1146 return -EINPROGRESS;
1147done_unmap:
1148 MWIFIEX_SKB_PACB(skb, &buf_pa);
1149 pci_unmap_single(card->dev, buf_pa, skb->len, PCI_DMA_TODEVICE);
1150 card->tx_buf_list[wrindx] = NULL;
ca8f2112
AP
1151 if (reg->pfu_enabled)
1152 memset(desc2, 0, sizeof(*desc2));
1153 else
1154 memset(desc, 0, sizeof(*desc));
1155
e7f767a7 1156 return ret;
d930faee
AK
1157}
1158
1159/*
1160 * This function handles received buffer ring and
1161 * dispatches packets to upper
1162 */
1163static int mwifiex_pcie_process_recv_data(struct mwifiex_adapter *adapter)
1164{
1165 struct pcie_service_card *card = adapter->card;
dd04e6ac 1166 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
ca8f2112 1167 u32 wrptr, rd_index, tx_val;
e7f767a7 1168 dma_addr_t buf_pa;
d930faee
AK
1169 int ret = 0;
1170 struct sk_buff *skb_tmp = NULL;
e05dc3e9 1171 struct mwifiex_pcie_buf_desc *desc;
ca8f2112 1172 struct mwifiex_pfu_buf_desc *desc2;
d930faee 1173
e7f767a7
AP
1174 if (!mwifiex_pcie_ok_to_access_hw(adapter))
1175 mwifiex_pm_wakeup_card(adapter);
1176
d930faee 1177 /* Read the RX ring Write pointer set by firmware */
dd04e6ac 1178 if (mwifiex_read_reg(adapter, reg->rx_wrptr, &wrptr)) {
f57c1edc 1179 dev_err(adapter->dev,
dd04e6ac 1180 "RECV DATA: failed to read reg->rx_wrptr\n");
d930faee
AK
1181 ret = -1;
1182 goto done;
1183 }
e7f767a7 1184 card->rxbd_wrptr = wrptr;
d930faee 1185
dd04e6ac
AP
1186 while (((wrptr & reg->rx_mask) !=
1187 (card->rxbd_rdptr & reg->rx_mask)) ||
1188 ((wrptr & reg->rx_rollover_ind) ==
1189 (card->rxbd_rdptr & reg->rx_rollover_ind))) {
d930faee
AK
1190 struct sk_buff *skb_data;
1191 u16 rx_len;
e7f767a7 1192 __le16 pkt_len;
d930faee 1193
dd04e6ac 1194 rd_index = card->rxbd_rdptr & reg->rx_mask;
d930faee
AK
1195 skb_data = card->rx_buf_list[rd_index];
1196
e7f767a7
AP
1197 MWIFIEX_SKB_PACB(skb_data, &buf_pa);
1198 pci_unmap_single(card->dev, buf_pa, MWIFIEX_RX_DATA_BUF_SIZE,
1199 PCI_DMA_FROMDEVICE);
1200 card->rx_buf_list[rd_index] = NULL;
1201
d930faee 1202 /* Get data length from interface header -
e7f767a7
AP
1203 * first 2 bytes for len, next 2 bytes is for type
1204 */
1205 pkt_len = *((__le16 *)skb_data->data);
1206 rx_len = le16_to_cpu(pkt_len);
1207 skb_put(skb_data, rx_len);
f57c1edc
YAP
1208 dev_dbg(adapter->dev,
1209 "info: RECV DATA: Rd=%#x, Wr=%#x, Len=%d\n",
1210 card->rxbd_rdptr, wrptr, rx_len);
e7f767a7
AP
1211 skb_pull(skb_data, INTF_HEADER_LEN);
1212 mwifiex_handle_rx_packet(adapter, skb_data);
1213
1214 skb_tmp = dev_alloc_skb(MWIFIEX_RX_DATA_BUF_SIZE);
d930faee 1215 if (!skb_tmp) {
e7f767a7
AP
1216 dev_err(adapter->dev,
1217 "Unable to allocate skb.\n");
1218 return -ENOMEM;
d930faee
AK
1219 }
1220
e7f767a7
AP
1221 if (mwifiex_map_pci_memory(adapter, skb_tmp,
1222 MWIFIEX_RX_DATA_BUF_SIZE,
1223 PCI_DMA_FROMDEVICE))
1224 return -1;
1225
1226 MWIFIEX_SKB_PACB(skb_tmp, &buf_pa);
1227
1228 dev_dbg(adapter->dev,
1229 "RECV DATA: Attach new sk_buff %p at rxbd_rdidx=%d\n",
1230 skb_tmp, rd_index);
1231 card->rx_buf_list[rd_index] = skb_tmp;
ca8f2112
AP
1232
1233 if (reg->pfu_enabled) {
1234 desc2 = (void *)card->rxbd_ring[rd_index];
1235 desc2->paddr = buf_pa;
1236 desc2->len = skb_tmp->len;
1237 desc2->frag_len = skb_tmp->len;
1238 desc2->offset = 0;
1239 desc2->flags = reg->ring_flag_sop | reg->ring_flag_eop;
1240 } else {
1241 desc = card->rxbd_ring[rd_index];
1242 desc->paddr = buf_pa;
1243 desc->len = skb_tmp->len;
1244 desc->flags = 0;
1245 }
d930faee 1246
dd04e6ac 1247 if ((++card->rxbd_rdptr & reg->rx_mask) ==
d930faee
AK
1248 MWIFIEX_MAX_TXRX_BD) {
1249 card->rxbd_rdptr = ((card->rxbd_rdptr &
dd04e6ac
AP
1250 reg->rx_rollover_ind) ^
1251 reg->rx_rollover_ind);
d930faee
AK
1252 }
1253 dev_dbg(adapter->dev, "info: RECV DATA: <Rd: %#x, Wr: %#x>\n",
f57c1edc 1254 card->rxbd_rdptr, wrptr);
d930faee 1255
ca8f2112 1256 tx_val = card->txbd_wrptr & reg->tx_wrap_mask;
dd04e6ac
AP
1257 /* Write the RX ring read pointer in to reg->rx_rdptr */
1258 if (mwifiex_write_reg(adapter, reg->rx_rdptr,
ca8f2112 1259 card->rxbd_rdptr | tx_val)) {
f57c1edc 1260 dev_err(adapter->dev,
dd04e6ac 1261 "RECV DATA: failed to write reg->rx_rdptr\n");
d930faee
AK
1262 ret = -1;
1263 goto done;
1264 }
1265
1266 /* Read the RX ring Write pointer set by firmware */
dd04e6ac 1267 if (mwifiex_read_reg(adapter, reg->rx_wrptr, &wrptr)) {
f57c1edc 1268 dev_err(adapter->dev,
dd04e6ac 1269 "RECV DATA: failed to read reg->rx_wrptr\n");
d930faee
AK
1270 ret = -1;
1271 goto done;
1272 }
f57c1edc
YAP
1273 dev_dbg(adapter->dev,
1274 "info: RECV DATA: Rcvd packet from fw successfully\n");
e7f767a7 1275 card->rxbd_wrptr = wrptr;
d930faee
AK
1276 }
1277
1278done:
d930faee
AK
1279 return ret;
1280}
1281
1282/*
1283 * This function downloads the boot command to device
1284 */
1285static int
1286mwifiex_pcie_send_boot_cmd(struct mwifiex_adapter *adapter, struct sk_buff *skb)
1287{
fc331460
AP
1288 dma_addr_t buf_pa;
1289 struct pcie_service_card *card = adapter->card;
dd04e6ac 1290 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee 1291
fc331460 1292 if (!(skb->data && skb->len)) {
f57c1edc 1293 dev_err(adapter->dev,
fc331460
AP
1294 "Invalid parameter in %s <%p. len %d>\n",
1295 __func__, skb->data, skb->len);
d930faee
AK
1296 return -1;
1297 }
1298
fc331460
AP
1299 if (mwifiex_map_pci_memory(adapter, skb, skb->len , PCI_DMA_TODEVICE))
1300 return -1;
1301
1302 MWIFIEX_SKB_PACB(skb, &buf_pa);
1303
dd04e6ac
AP
1304 /* Write the lower 32bits of the physical address to low command
1305 * address scratch register
1306 */
1307 if (mwifiex_write_reg(adapter, reg->cmd_addr_lo, (u32)buf_pa)) {
f57c1edc
YAP
1308 dev_err(adapter->dev,
1309 "%s: failed to write download command to boot code.\n",
1310 __func__);
fc331460
AP
1311 pci_unmap_single(card->dev, buf_pa, MWIFIEX_UPLD_SIZE,
1312 PCI_DMA_TODEVICE);
d930faee
AK
1313 return -1;
1314 }
1315
dd04e6ac
AP
1316 /* Write the upper 32bits of the physical address to high command
1317 * address scratch register
1318 */
1319 if (mwifiex_write_reg(adapter, reg->cmd_addr_hi,
fc331460 1320 (u32)((u64)buf_pa >> 32))) {
f57c1edc
YAP
1321 dev_err(adapter->dev,
1322 "%s: failed to write download command to boot code.\n",
1323 __func__);
fc331460
AP
1324 pci_unmap_single(card->dev, buf_pa, MWIFIEX_UPLD_SIZE,
1325 PCI_DMA_TODEVICE);
d930faee
AK
1326 return -1;
1327 }
1328
dd04e6ac
AP
1329 /* Write the command length to cmd_size scratch register */
1330 if (mwifiex_write_reg(adapter, reg->cmd_size, skb->len)) {
f57c1edc 1331 dev_err(adapter->dev,
dd04e6ac 1332 "%s: failed to write command len to cmd_size scratch reg\n",
f57c1edc 1333 __func__);
fc331460
AP
1334 pci_unmap_single(card->dev, buf_pa, MWIFIEX_UPLD_SIZE,
1335 PCI_DMA_TODEVICE);
d930faee
AK
1336 return -1;
1337 }
1338
1339 /* Ring the door bell */
1340 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
1341 CPU_INTR_DOOR_BELL)) {
f57c1edc
YAP
1342 dev_err(adapter->dev,
1343 "%s: failed to assert door-bell intr\n", __func__);
fc331460
AP
1344 pci_unmap_single(card->dev, buf_pa,
1345 MWIFIEX_UPLD_SIZE, PCI_DMA_TODEVICE);
d930faee
AK
1346 return -1;
1347 }
1348
1349 return 0;
1350}
1351
c6d1d87a
AP
1352/* This function init rx port in firmware which in turn enables to receive data
1353 * from device before transmitting any packet.
1354 */
1355static int mwifiex_pcie_init_fw_port(struct mwifiex_adapter *adapter)
1356{
1357 struct pcie_service_card *card = adapter->card;
dd04e6ac 1358 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
ca8f2112 1359 int tx_wrap = card->txbd_wrptr & reg->tx_wrap_mask;
c6d1d87a 1360
dd04e6ac 1361 /* Write the RX ring read pointer in to reg->rx_rdptr */
ca8f2112
AP
1362 if (mwifiex_write_reg(adapter, reg->rx_rdptr, card->rxbd_rdptr |
1363 tx_wrap)) {
c6d1d87a 1364 dev_err(adapter->dev,
dd04e6ac 1365 "RECV DATA: failed to write reg->rx_rdptr\n");
c6d1d87a
AP
1366 return -1;
1367 }
1368 return 0;
1369}
1370
1371/* This function downloads commands to the device
d930faee
AK
1372 */
1373static int
1374mwifiex_pcie_send_cmd(struct mwifiex_adapter *adapter, struct sk_buff *skb)
1375{
1376 struct pcie_service_card *card = adapter->card;
dd04e6ac 1377 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee 1378 int ret = 0;
fc331460
AP
1379 dma_addr_t cmd_buf_pa, cmdrsp_buf_pa;
1380 u8 *payload = (u8 *)skb->data;
d930faee
AK
1381
1382 if (!(skb->data && skb->len)) {
1383 dev_err(adapter->dev, "Invalid parameter in %s <%p, %#x>\n",
f57c1edc 1384 __func__, skb->data, skb->len);
d930faee
AK
1385 return -1;
1386 }
1387
1388 /* Make sure a command response buffer is available */
1389 if (!card->cmdrsp_buf) {
f57c1edc
YAP
1390 dev_err(adapter->dev,
1391 "No response buffer available, send command failed\n");
d930faee
AK
1392 return -EBUSY;
1393 }
1394
fc331460
AP
1395 if (!mwifiex_pcie_ok_to_access_hw(adapter))
1396 mwifiex_pm_wakeup_card(adapter);
d930faee
AK
1397
1398 adapter->cmd_sent = true;
fc331460
AP
1399
1400 *(__le16 *)&payload[0] = cpu_to_le16((u16)skb->len);
1401 *(__le16 *)&payload[2] = cpu_to_le16(MWIFIEX_TYPE_CMD);
1402
1403 if (mwifiex_map_pci_memory(adapter, skb, skb->len, PCI_DMA_TODEVICE))
1404 return -1;
1405
1406 card->cmd_buf = skb;
d930faee
AK
1407
1408 /* To send a command, the driver will:
1409 1. Write the 64bit physical address of the data buffer to
dd04e6ac 1410 cmd response address low + cmd response address high
d930faee
AK
1411 2. Ring the door bell (i.e. set the door bell interrupt)
1412
1413 In response to door bell interrupt, the firmware will perform
1414 the DMA of the command packet (first header to obtain the total
1415 length and then rest of the command).
1416 */
1417
1418 if (card->cmdrsp_buf) {
fc331460 1419 MWIFIEX_SKB_PACB(card->cmdrsp_buf, &cmdrsp_buf_pa);
d930faee
AK
1420 /* Write the lower 32bits of the cmdrsp buffer physical
1421 address */
dd04e6ac 1422 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_lo,
fc331460 1423 (u32)cmdrsp_buf_pa)) {
f57c1edc
YAP
1424 dev_err(adapter->dev,
1425 "Failed to write download cmd to boot code.\n");
d930faee
AK
1426 ret = -1;
1427 goto done;
1428 }
1429 /* Write the upper 32bits of the cmdrsp buffer physical
1430 address */
dd04e6ac 1431 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_hi,
fc331460 1432 (u32)((u64)cmdrsp_buf_pa >> 32))) {
f57c1edc
YAP
1433 dev_err(adapter->dev,
1434 "Failed to write download cmd to boot code.\n");
d930faee
AK
1435 ret = -1;
1436 goto done;
1437 }
1438 }
1439
fc331460 1440 MWIFIEX_SKB_PACB(card->cmd_buf, &cmd_buf_pa);
dd04e6ac
AP
1441 /* Write the lower 32bits of the physical address to reg->cmd_addr_lo */
1442 if (mwifiex_write_reg(adapter, reg->cmd_addr_lo,
1443 (u32)cmd_buf_pa)) {
f57c1edc
YAP
1444 dev_err(adapter->dev,
1445 "Failed to write download cmd to boot code.\n");
d930faee
AK
1446 ret = -1;
1447 goto done;
1448 }
dd04e6ac
AP
1449 /* Write the upper 32bits of the physical address to reg->cmd_addr_hi */
1450 if (mwifiex_write_reg(adapter, reg->cmd_addr_hi,
fc331460 1451 (u32)((u64)cmd_buf_pa >> 32))) {
f57c1edc
YAP
1452 dev_err(adapter->dev,
1453 "Failed to write download cmd to boot code.\n");
d930faee
AK
1454 ret = -1;
1455 goto done;
1456 }
1457
dd04e6ac
AP
1458 /* Write the command length to reg->cmd_size */
1459 if (mwifiex_write_reg(adapter, reg->cmd_size,
1460 card->cmd_buf->len)) {
f57c1edc 1461 dev_err(adapter->dev,
dd04e6ac 1462 "Failed to write cmd len to reg->cmd_size\n");
d930faee
AK
1463 ret = -1;
1464 goto done;
1465 }
1466
1467 /* Ring the door bell */
1468 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
1469 CPU_INTR_DOOR_BELL)) {
f57c1edc
YAP
1470 dev_err(adapter->dev,
1471 "Failed to assert door-bell intr\n");
d930faee
AK
1472 ret = -1;
1473 goto done;
1474 }
1475
1476done:
1477 if (ret)
1478 adapter->cmd_sent = false;
1479
1480 return 0;
1481}
1482
1483/*
1484 * This function handles command complete interrupt
1485 */
1486static int mwifiex_pcie_process_cmd_complete(struct mwifiex_adapter *adapter)
1487{
1488 struct pcie_service_card *card = adapter->card;
dd04e6ac 1489 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
f57c1edc 1490 struct sk_buff *skb = card->cmdrsp_buf;
d930faee 1491 int count = 0;
fc331460
AP
1492 u16 rx_len;
1493 __le16 pkt_len;
1494 dma_addr_t buf_pa;
d930faee
AK
1495
1496 dev_dbg(adapter->dev, "info: Rx CMD Response\n");
1497
fc331460
AP
1498 MWIFIEX_SKB_PACB(skb, &buf_pa);
1499 pci_unmap_single(card->dev, buf_pa, MWIFIEX_UPLD_SIZE,
1500 PCI_DMA_FROMDEVICE);
1501
1502 pkt_len = *((__le16 *)skb->data);
1503 rx_len = le16_to_cpu(pkt_len);
1504 skb_trim(skb, rx_len);
1505 skb_pull(skb, INTF_HEADER_LEN);
1506
d930faee 1507 if (!adapter->curr_cmd) {
d930faee 1508 if (adapter->ps_state == PS_STATE_SLEEP_CFM) {
f57c1edc
YAP
1509 mwifiex_process_sleep_confirm_resp(adapter, skb->data,
1510 skb->len);
52301a81
AP
1511 while (reg->sleep_cookie && (count++ < 10) &&
1512 mwifiex_pcie_ok_to_access_hw(adapter))
e7891ba2 1513 usleep_range(50, 60);
d930faee 1514 } else {
f57c1edc
YAP
1515 dev_err(adapter->dev,
1516 "There is no command but got cmdrsp\n");
d930faee 1517 }
f57c1edc
YAP
1518 memcpy(adapter->upld_buf, skb->data,
1519 min_t(u32, MWIFIEX_SIZE_OF_CMD_BUFFER, skb->len));
fc331460
AP
1520 if (mwifiex_map_pci_memory(adapter, skb, MWIFIEX_UPLD_SIZE,
1521 PCI_DMA_FROMDEVICE))
1522 return -1;
1523
1524 MWIFIEX_SKB_PACB(skb, &buf_pa);
d930faee 1525 } else if (mwifiex_pcie_ok_to_access_hw(adapter)) {
f57c1edc 1526 adapter->curr_cmd->resp_skb = skb;
d930faee
AK
1527 adapter->cmd_resp_received = true;
1528 /* Take the pointer and set it to CMD node and will
1529 return in the response complete callback */
1530 card->cmdrsp_buf = NULL;
1531
1532 /* Clear the cmd-rsp buffer address in scratch registers. This
1533 will prevent firmware from writing to the same response
1534 buffer again. */
dd04e6ac 1535 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_lo, 0)) {
f57c1edc
YAP
1536 dev_err(adapter->dev,
1537 "cmd_done: failed to clear cmd_rsp_addr_lo\n");
d930faee
AK
1538 return -1;
1539 }
1540 /* Write the upper 32bits of the cmdrsp buffer physical
1541 address */
dd04e6ac 1542 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_hi, 0)) {
f57c1edc
YAP
1543 dev_err(adapter->dev,
1544 "cmd_done: failed to clear cmd_rsp_addr_hi\n");
d930faee
AK
1545 return -1;
1546 }
1547 }
1548
1549 return 0;
1550}
1551
1552/*
1553 * Command Response processing complete handler
1554 */
1555static int mwifiex_pcie_cmdrsp_complete(struct mwifiex_adapter *adapter,
1556 struct sk_buff *skb)
1557{
1558 struct pcie_service_card *card = adapter->card;
fc331460
AP
1559 dma_addr_t buf_pa;
1560 struct sk_buff *skb_tmp;
d930faee
AK
1561
1562 if (skb) {
1563 card->cmdrsp_buf = skb;
1564 skb_push(card->cmdrsp_buf, INTF_HEADER_LEN);
fc331460
AP
1565 if (mwifiex_map_pci_memory(adapter, skb, MWIFIEX_UPLD_SIZE,
1566 PCI_DMA_FROMDEVICE))
1567 return -1;
1568 }
1569
1570 skb_tmp = card->cmd_buf;
1571 if (skb_tmp) {
1572 MWIFIEX_SKB_PACB(skb_tmp, &buf_pa);
1573 pci_unmap_single(card->dev, buf_pa, MWIFIEX_UPLD_SIZE,
1574 PCI_DMA_FROMDEVICE);
1575 card->cmd_buf = NULL;
d930faee
AK
1576 }
1577
1578 return 0;
1579}
1580
1581/*
1582 * This function handles firmware event ready interrupt
1583 */
1584static int mwifiex_pcie_process_event_ready(struct mwifiex_adapter *adapter)
1585{
1586 struct pcie_service_card *card = adapter->card;
dd04e6ac 1587 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee
AK
1588 u32 rdptr = card->evtbd_rdptr & MWIFIEX_EVTBD_MASK;
1589 u32 wrptr, event;
fc331460 1590 dma_addr_t buf_pa;
e05dc3e9 1591 struct mwifiex_evt_buf_desc *desc;
fc331460
AP
1592
1593 if (!mwifiex_pcie_ok_to_access_hw(adapter))
1594 mwifiex_pm_wakeup_card(adapter);
d930faee
AK
1595
1596 if (adapter->event_received) {
f57c1edc
YAP
1597 dev_dbg(adapter->dev, "info: Event being processed, "
1598 "do not process this interrupt just yet\n");
d930faee
AK
1599 return 0;
1600 }
1601
1602 if (rdptr >= MWIFIEX_MAX_EVT_BD) {
1603 dev_dbg(adapter->dev, "info: Invalid read pointer...\n");
1604 return -1;
1605 }
1606
1607 /* Read the event ring write pointer set by firmware */
dd04e6ac 1608 if (mwifiex_read_reg(adapter, reg->evt_wrptr, &wrptr)) {
f57c1edc 1609 dev_err(adapter->dev,
dd04e6ac 1610 "EventReady: failed to read reg->evt_wrptr\n");
d930faee
AK
1611 return -1;
1612 }
1613
1614 dev_dbg(adapter->dev, "info: EventReady: Initial <Rd: 0x%x, Wr: 0x%x>",
f57c1edc
YAP
1615 card->evtbd_rdptr, wrptr);
1616 if (((wrptr & MWIFIEX_EVTBD_MASK) != (card->evtbd_rdptr
1617 & MWIFIEX_EVTBD_MASK)) ||
dd04e6ac
AP
1618 ((wrptr & reg->evt_rollover_ind) ==
1619 (card->evtbd_rdptr & reg->evt_rollover_ind))) {
d930faee
AK
1620 struct sk_buff *skb_cmd;
1621 __le16 data_len = 0;
1622 u16 evt_len;
1623
1624 dev_dbg(adapter->dev, "info: Read Index: %d\n", rdptr);
1625 skb_cmd = card->evt_buf_list[rdptr];
fc331460
AP
1626 MWIFIEX_SKB_PACB(skb_cmd, &buf_pa);
1627 pci_unmap_single(card->dev, buf_pa, MAX_EVENT_SIZE,
1628 PCI_DMA_FROMDEVICE);
1629
d930faee
AK
1630 /* Take the pointer and set it to event pointer in adapter
1631 and will return back after event handling callback */
1632 card->evt_buf_list[rdptr] = NULL;
e05dc3e9
AP
1633 desc = card->evtbd_ring[rdptr];
1634 memset(desc, 0, sizeof(*desc));
d930faee
AK
1635
1636 event = *(u32 *) &skb_cmd->data[INTF_HEADER_LEN];
1637 adapter->event_cause = event;
1638 /* The first 4bytes will be the event transfer header
1639 len is 2 bytes followed by type which is 2 bytes */
1640 memcpy(&data_len, skb_cmd->data, sizeof(__le16));
1641 evt_len = le16_to_cpu(data_len);
1642
1643 skb_pull(skb_cmd, INTF_HEADER_LEN);
1644 dev_dbg(adapter->dev, "info: Event length: %d\n", evt_len);
1645
1646 if ((evt_len > 0) && (evt_len < MAX_EVENT_SIZE))
1647 memcpy(adapter->event_body, skb_cmd->data +
1648 MWIFIEX_EVENT_HEADER_LEN, evt_len -
1649 MWIFIEX_EVENT_HEADER_LEN);
1650
1651 adapter->event_received = true;
1652 adapter->event_skb = skb_cmd;
1653
1654 /* Do not update the event read pointer here, wait till the
1655 buffer is released. This is just to make things simpler,
1656 we need to find a better method of managing these buffers.
1657 */
1658 }
1659
1660 return 0;
1661}
1662
1663/*
1664 * Event processing complete handler
1665 */
1666static int mwifiex_pcie_event_complete(struct mwifiex_adapter *adapter,
1667 struct sk_buff *skb)
1668{
1669 struct pcie_service_card *card = adapter->card;
dd04e6ac 1670 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee
AK
1671 int ret = 0;
1672 u32 rdptr = card->evtbd_rdptr & MWIFIEX_EVTBD_MASK;
1673 u32 wrptr;
fc331460 1674 dma_addr_t buf_pa;
e05dc3e9 1675 struct mwifiex_evt_buf_desc *desc;
d930faee
AK
1676
1677 if (!skb)
1678 return 0;
1679
1eb54c8a 1680 if (rdptr >= MWIFIEX_MAX_EVT_BD) {
d930faee 1681 dev_err(adapter->dev, "event_complete: Invalid rdptr 0x%x\n",
f57c1edc 1682 rdptr);
8c53e42d 1683 return -EINVAL;
1eb54c8a 1684 }
d930faee
AK
1685
1686 /* Read the event ring write pointer set by firmware */
dd04e6ac 1687 if (mwifiex_read_reg(adapter, reg->evt_wrptr, &wrptr)) {
f57c1edc 1688 dev_err(adapter->dev,
dd04e6ac 1689 "event_complete: failed to read reg->evt_wrptr\n");
8c53e42d 1690 return -1;
d930faee
AK
1691 }
1692
1693 if (!card->evt_buf_list[rdptr]) {
1694 skb_push(skb, INTF_HEADER_LEN);
fc331460
AP
1695 if (mwifiex_map_pci_memory(adapter, skb,
1696 MAX_EVENT_SIZE,
1697 PCI_DMA_FROMDEVICE))
1698 return -1;
1699 MWIFIEX_SKB_PACB(skb, &buf_pa);
d930faee 1700 card->evt_buf_list[rdptr] = skb;
fc331460 1701 MWIFIEX_SKB_PACB(skb, &buf_pa);
e05dc3e9
AP
1702 desc = card->evtbd_ring[rdptr];
1703 desc->paddr = buf_pa;
1704 desc->len = (u16)skb->len;
1705 desc->flags = 0;
d930faee
AK
1706 skb = NULL;
1707 } else {
f57c1edc
YAP
1708 dev_dbg(adapter->dev,
1709 "info: ERROR: buf still valid at index %d, <%p, %p>\n",
1710 rdptr, card->evt_buf_list[rdptr], skb);
d930faee
AK
1711 }
1712
1713 if ((++card->evtbd_rdptr & MWIFIEX_EVTBD_MASK) == MWIFIEX_MAX_EVT_BD) {
1714 card->evtbd_rdptr = ((card->evtbd_rdptr &
dd04e6ac
AP
1715 reg->evt_rollover_ind) ^
1716 reg->evt_rollover_ind);
d930faee
AK
1717 }
1718
1719 dev_dbg(adapter->dev, "info: Updated <Rd: 0x%x, Wr: 0x%x>",
f57c1edc 1720 card->evtbd_rdptr, wrptr);
d930faee 1721
dd04e6ac
AP
1722 /* Write the event ring read pointer in to reg->evt_rdptr */
1723 if (mwifiex_write_reg(adapter, reg->evt_rdptr,
1724 card->evtbd_rdptr)) {
f57c1edc 1725 dev_err(adapter->dev,
dd04e6ac 1726 "event_complete: failed to read reg->evt_rdptr\n");
8c53e42d 1727 return -1;
d930faee
AK
1728 }
1729
d930faee
AK
1730 dev_dbg(adapter->dev, "info: Check Events Again\n");
1731 ret = mwifiex_pcie_process_event_ready(adapter);
1732
1733 return ret;
1734}
1735
1736/*
1737 * This function downloads the firmware to the card.
1738 *
1739 * Firmware is downloaded to the card in blocks. Every block download
1740 * is tested for CRC errors, and retried a number of times before
1741 * returning failure.
1742 */
1743static int mwifiex_prog_fw_w_helper(struct mwifiex_adapter *adapter,
1744 struct mwifiex_fw_image *fw)
1745{
1746 int ret;
1747 u8 *firmware = fw->fw_buf;
1748 u32 firmware_len = fw->fw_len;
1749 u32 offset = 0;
1750 struct sk_buff *skb;
1751 u32 txlen, tx_blocks = 0, tries, len;
1752 u32 block_retry_cnt = 0;
fc331460
AP
1753 dma_addr_t buf_pa;
1754 struct pcie_service_card *card = adapter->card;
dd04e6ac 1755 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee
AK
1756
1757 if (!firmware || !firmware_len) {
f57c1edc
YAP
1758 dev_err(adapter->dev,
1759 "No firmware image found! Terminating download\n");
d930faee
AK
1760 return -1;
1761 }
1762
1763 dev_dbg(adapter->dev, "info: Downloading FW image (%d bytes)\n",
f57c1edc 1764 firmware_len);
d930faee
AK
1765
1766 if (mwifiex_pcie_disable_host_int(adapter)) {
f57c1edc
YAP
1767 dev_err(adapter->dev,
1768 "%s: Disabling interrupts failed.\n", __func__);
d930faee
AK
1769 return -1;
1770 }
1771
1772 skb = dev_alloc_skb(MWIFIEX_UPLD_SIZE);
1773 if (!skb) {
1774 ret = -ENOMEM;
1775 goto done;
1776 }
d930faee
AK
1777
1778 /* Perform firmware data transfer */
1779 do {
1780 u32 ireg_intr = 0;
1781
1782 /* More data? */
1783 if (offset >= firmware_len)
1784 break;
1785
1786 for (tries = 0; tries < MAX_POLL_TRIES; tries++) {
dd04e6ac 1787 ret = mwifiex_read_reg(adapter, reg->cmd_size,
d930faee
AK
1788 &len);
1789 if (ret) {
f57c1edc
YAP
1790 dev_warn(adapter->dev,
1791 "Failed reading len from boot code\n");
d930faee
AK
1792 goto done;
1793 }
1794 if (len)
1795 break;
e7891ba2 1796 usleep_range(10, 20);
d930faee
AK
1797 }
1798
1799 if (!len) {
1800 break;
1801 } else if (len > MWIFIEX_UPLD_SIZE) {
1802 pr_err("FW download failure @ %d, invalid length %d\n",
f57c1edc 1803 offset, len);
d930faee
AK
1804 ret = -1;
1805 goto done;
1806 }
1807
1808 txlen = len;
1809
1810 if (len & BIT(0)) {
1811 block_retry_cnt++;
1812 if (block_retry_cnt > MAX_WRITE_IOMEM_RETRY) {
1813 pr_err("FW download failure @ %d, over max "
1814 "retry count\n", offset);
1815 ret = -1;
1816 goto done;
1817 }
1818 dev_err(adapter->dev, "FW CRC error indicated by the "
f57c1edc
YAP
1819 "helper: len = 0x%04X, txlen = %d\n",
1820 len, txlen);
d930faee
AK
1821 len &= ~BIT(0);
1822 /* Setting this to 0 to resend from same offset */
1823 txlen = 0;
1824 } else {
1825 block_retry_cnt = 0;
1826 /* Set blocksize to transfer - checking for
1827 last block */
1828 if (firmware_len - offset < txlen)
1829 txlen = firmware_len - offset;
1830
1831 dev_dbg(adapter->dev, ".");
1832
dd04e6ac
AP
1833 tx_blocks = (txlen + card->pcie.blksz_fw_dl - 1) /
1834 card->pcie.blksz_fw_dl;
d930faee
AK
1835
1836 /* Copy payload to buffer */
1837 memmove(skb->data, &firmware[offset], txlen);
1838 }
1839
1840 skb_put(skb, MWIFIEX_UPLD_SIZE - skb->len);
dd04e6ac 1841 skb_trim(skb, tx_blocks * card->pcie.blksz_fw_dl);
d930faee
AK
1842
1843 /* Send the boot command to device */
1844 if (mwifiex_pcie_send_boot_cmd(adapter, skb)) {
f57c1edc
YAP
1845 dev_err(adapter->dev,
1846 "Failed to send firmware download command\n");
d930faee
AK
1847 ret = -1;
1848 goto done;
1849 }
fc331460
AP
1850
1851 MWIFIEX_SKB_PACB(skb, &buf_pa);
1852
d930faee
AK
1853 /* Wait for the command done interrupt */
1854 do {
1855 if (mwifiex_read_reg(adapter, PCIE_CPU_INT_STATUS,
1856 &ireg_intr)) {
1857 dev_err(adapter->dev, "%s: Failed to read "
f57c1edc
YAP
1858 "interrupt status during fw dnld.\n",
1859 __func__);
fc331460
AP
1860 pci_unmap_single(card->dev, buf_pa, skb->len,
1861 PCI_DMA_TODEVICE);
d930faee
AK
1862 ret = -1;
1863 goto done;
1864 }
1865 } while ((ireg_intr & CPU_INTR_DOOR_BELL) ==
1866 CPU_INTR_DOOR_BELL);
fc331460
AP
1867
1868 pci_unmap_single(card->dev, buf_pa, skb->len,
1869 PCI_DMA_TODEVICE);
1870
d930faee
AK
1871 offset += txlen;
1872 } while (true);
1873
1874 dev_dbg(adapter->dev, "info:\nFW download over, size %d bytes\n",
f57c1edc 1875 offset);
d930faee
AK
1876
1877 ret = 0;
1878
1879done:
1880 dev_kfree_skb_any(skb);
1881 return ret;
1882}
1883
1884/*
1885 * This function checks the firmware status in card.
1886 *
1887 * The winner interface is also determined by this function.
1888 */
1889static int
1890mwifiex_check_fw_status(struct mwifiex_adapter *adapter, u32 poll_num)
1891{
1892 int ret = 0;
1893 u32 firmware_stat, winner_status;
dd04e6ac
AP
1894 struct pcie_service_card *card = adapter->card;
1895 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee
AK
1896 u32 tries;
1897
1898 /* Mask spurios interrupts */
1899 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_STATUS_MASK,
f57c1edc 1900 HOST_INTR_MASK)) {
d930faee
AK
1901 dev_warn(adapter->dev, "Write register failed\n");
1902 return -1;
1903 }
1904
1905 dev_dbg(adapter->dev, "Setting driver ready signature\n");
dd04e6ac
AP
1906 if (mwifiex_write_reg(adapter, reg->drv_rdy,
1907 FIRMWARE_READY_PCIE)) {
f57c1edc
YAP
1908 dev_err(adapter->dev,
1909 "Failed to write driver ready signature\n");
d930faee
AK
1910 return -1;
1911 }
1912
1913 /* Wait for firmware initialization event */
1914 for (tries = 0; tries < poll_num; tries++) {
dd04e6ac 1915 if (mwifiex_read_reg(adapter, reg->fw_status,
d930faee
AK
1916 &firmware_stat))
1917 ret = -1;
1918 else
1919 ret = 0;
1920 if (ret)
1921 continue;
1922 if (firmware_stat == FIRMWARE_READY_PCIE) {
1923 ret = 0;
1924 break;
1925 } else {
1926 mdelay(100);
1927 ret = -1;
1928 }
1929 }
1930
1931 if (ret) {
dd04e6ac 1932 if (mwifiex_read_reg(adapter, reg->fw_status,
d930faee
AK
1933 &winner_status))
1934 ret = -1;
1935 else if (!winner_status) {
1936 dev_err(adapter->dev, "PCI-E is the winner\n");
1937 adapter->winner = 1;
1938 ret = -1;
1939 } else {
f57c1edc
YAP
1940 dev_err(adapter->dev,
1941 "PCI-E is not the winner <%#x,%d>, exit dnld\n",
1942 ret, adapter->winner);
d930faee
AK
1943 ret = 0;
1944 }
1945 }
1946
1947 return ret;
1948}
1949
1950/*
1951 * This function reads the interrupt status from card.
1952 */
1953static void mwifiex_interrupt_status(struct mwifiex_adapter *adapter)
1954{
1955 u32 pcie_ireg;
1956 unsigned long flags;
1957
1958 if (!mwifiex_pcie_ok_to_access_hw(adapter))
1959 return;
1960
1961 if (mwifiex_read_reg(adapter, PCIE_HOST_INT_STATUS, &pcie_ireg)) {
1962 dev_warn(adapter->dev, "Read register failed\n");
1963 return;
1964 }
1965
1966 if ((pcie_ireg != 0xFFFFFFFF) && (pcie_ireg)) {
1967
1968 mwifiex_pcie_disable_host_int(adapter);
1969
1970 /* Clear the pending interrupts */
1971 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_STATUS,
1972 ~pcie_ireg)) {
1973 dev_warn(adapter->dev, "Write register failed\n");
1974 return;
1975 }
1976 spin_lock_irqsave(&adapter->int_lock, flags);
1977 adapter->int_status |= pcie_ireg;
1978 spin_unlock_irqrestore(&adapter->int_lock, flags);
1979
1980 if (pcie_ireg & HOST_INTR_CMD_DONE) {
1981 if ((adapter->ps_state == PS_STATE_SLEEP_CFM) ||
1982 (adapter->ps_state == PS_STATE_SLEEP)) {
1983 mwifiex_pcie_enable_host_int(adapter);
1984 if (mwifiex_write_reg(adapter,
f57c1edc
YAP
1985 PCIE_CPU_INT_EVENT,
1986 CPU_INTR_SLEEP_CFM_DONE)
1987 ) {
1988 dev_warn(adapter->dev,
1989 "Write register failed\n");
d930faee
AK
1990 return;
1991
1992 }
1993 }
1994 } else if (!adapter->pps_uapsd_mode &&
1995 adapter->ps_state == PS_STATE_SLEEP) {
1996 /* Potentially for PCIe we could get other
1997 * interrupts like shared. Don't change power
1998 * state until cookie is set */
1999 if (mwifiex_pcie_ok_to_access_hw(adapter))
2000 adapter->ps_state = PS_STATE_AWAKE;
2001 }
2002 }
2003}
2004
2005/*
2006 * Interrupt handler for PCIe root port
2007 *
2008 * This function reads the interrupt status from firmware and assigns
2009 * the main process in workqueue which will handle the interrupt.
2010 */
2011static irqreturn_t mwifiex_pcie_interrupt(int irq, void *context)
2012{
2013 struct pci_dev *pdev = (struct pci_dev *)context;
2014 struct pcie_service_card *card;
2015 struct mwifiex_adapter *adapter;
2016
2017 if (!pdev) {
2018 pr_debug("info: %s: pdev is NULL\n", (u8 *)pdev);
2019 goto exit;
2020 }
2021
2022 card = (struct pcie_service_card *) pci_get_drvdata(pdev);
2023 if (!card || !card->adapter) {
2024 pr_debug("info: %s: card=%p adapter=%p\n", __func__, card,
f57c1edc 2025 card ? card->adapter : NULL);
d930faee
AK
2026 goto exit;
2027 }
2028 adapter = card->adapter;
2029
2030 if (adapter->surprise_removed)
2031 goto exit;
2032
2033 mwifiex_interrupt_status(adapter);
2034 queue_work(adapter->workqueue, &adapter->main_work);
2035
2036exit:
2037 return IRQ_HANDLED;
2038}
2039
2040/*
2041 * This function checks the current interrupt status.
2042 *
2043 * The following interrupts are checked and handled by this function -
2044 * - Data sent
2045 * - Command sent
2046 * - Command received
2047 * - Packets received
2048 * - Events received
2049 *
2050 * In case of Rx packets received, the packets are uploaded from card to
2051 * host and processed accordingly.
2052 */
2053static int mwifiex_process_int_status(struct mwifiex_adapter *adapter)
2054{
2055 int ret;
659c4788 2056 u32 pcie_ireg;
d930faee
AK
2057 unsigned long flags;
2058
2059 spin_lock_irqsave(&adapter->int_lock, flags);
2060 /* Clear out unused interrupts */
659c4788
AP
2061 pcie_ireg = adapter->int_status;
2062 adapter->int_status = 0;
d930faee
AK
2063 spin_unlock_irqrestore(&adapter->int_lock, flags);
2064
659c4788
AP
2065 while (pcie_ireg & HOST_INTR_MASK) {
2066 if (pcie_ireg & HOST_INTR_DNLD_DONE) {
2067 pcie_ireg &= ~HOST_INTR_DNLD_DONE;
e7f767a7
AP
2068 dev_dbg(adapter->dev, "info: TX DNLD Done\n");
2069 ret = mwifiex_pcie_send_data_complete(adapter);
2070 if (ret)
2071 return ret;
d930faee 2072 }
659c4788
AP
2073 if (pcie_ireg & HOST_INTR_UPLD_RDY) {
2074 pcie_ireg &= ~HOST_INTR_UPLD_RDY;
d930faee
AK
2075 dev_dbg(adapter->dev, "info: Rx DATA\n");
2076 ret = mwifiex_pcie_process_recv_data(adapter);
2077 if (ret)
2078 return ret;
2079 }
659c4788
AP
2080 if (pcie_ireg & HOST_INTR_EVENT_RDY) {
2081 pcie_ireg &= ~HOST_INTR_EVENT_RDY;
d930faee
AK
2082 dev_dbg(adapter->dev, "info: Rx EVENT\n");
2083 ret = mwifiex_pcie_process_event_ready(adapter);
2084 if (ret)
2085 return ret;
2086 }
2087
659c4788
AP
2088 if (pcie_ireg & HOST_INTR_CMD_DONE) {
2089 pcie_ireg &= ~HOST_INTR_CMD_DONE;
d930faee 2090 if (adapter->cmd_sent) {
f57c1edc
YAP
2091 dev_dbg(adapter->dev,
2092 "info: CMD sent Interrupt\n");
d930faee
AK
2093 adapter->cmd_sent = false;
2094 }
2095 /* Handle command response */
2096 ret = mwifiex_pcie_process_cmd_complete(adapter);
2097 if (ret)
2098 return ret;
2099 }
2100
2101 if (mwifiex_pcie_ok_to_access_hw(adapter)) {
2102 if (mwifiex_read_reg(adapter, PCIE_HOST_INT_STATUS,
2103 &pcie_ireg)) {
f57c1edc
YAP
2104 dev_warn(adapter->dev,
2105 "Read register failed\n");
d930faee
AK
2106 return -1;
2107 }
2108
2109 if ((pcie_ireg != 0xFFFFFFFF) && (pcie_ireg)) {
2110 if (mwifiex_write_reg(adapter,
f57c1edc
YAP
2111 PCIE_HOST_INT_STATUS,
2112 ~pcie_ireg)) {
2113 dev_warn(adapter->dev,
2114 "Write register failed\n");
d930faee
AK
2115 return -1;
2116 }
d930faee
AK
2117 }
2118
2119 }
2120 }
2121 dev_dbg(adapter->dev, "info: cmd_sent=%d data_sent=%d\n",
f57c1edc 2122 adapter->cmd_sent, adapter->data_sent);
d930faee
AK
2123 mwifiex_pcie_enable_host_int(adapter);
2124
2125 return 0;
2126}
2127
2128/*
2129 * This function downloads data from driver to card.
2130 *
2131 * Both commands and data packets are transferred to the card by this
2132 * function.
2133 *
2134 * This function adds the PCIE specific header to the front of the buffer
2135 * before transferring. The header contains the length of the packet and
2136 * the type. The firmware handles the packets based upon this set type.
2137 */
2138static int mwifiex_pcie_host_to_card(struct mwifiex_adapter *adapter, u8 type,
2139 struct sk_buff *skb,
2140 struct mwifiex_tx_param *tx_param)
2141{
fa161cb7
DC
2142 if (!skb) {
2143 dev_err(adapter->dev, "Passed NULL skb to %s\n", __func__);
d930faee
AK
2144 return -1;
2145 }
2146
2147 if (type == MWIFIEX_TYPE_DATA)
e7f767a7 2148 return mwifiex_pcie_send_data(adapter, skb, tx_param);
d930faee
AK
2149 else if (type == MWIFIEX_TYPE_CMD)
2150 return mwifiex_pcie_send_cmd(adapter, skb);
2151
2152 return 0;
2153}
2154
2155/*
2156 * This function initializes the PCI-E host memory space, WCB rings, etc.
2157 *
2158 * The following initializations steps are followed -
2159 * - Allocate TXBD ring buffers
2160 * - Allocate RXBD ring buffers
2161 * - Allocate event BD ring buffers
2162 * - Allocate command response ring buffer
2163 * - Allocate sleep cookie buffer
2164 */
2165static int mwifiex_pcie_init(struct mwifiex_adapter *adapter)
2166{
2167 struct pcie_service_card *card = adapter->card;
2168 int ret;
2169 struct pci_dev *pdev = card->dev;
52301a81 2170 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee
AK
2171
2172 pci_set_drvdata(pdev, card);
2173
2174 ret = pci_enable_device(pdev);
2175 if (ret)
2176 goto err_enable_dev;
2177
2178 pci_set_master(pdev);
2179
2180 dev_dbg(adapter->dev, "try set_consistent_dma_mask(32)\n");
2181 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
2182 if (ret) {
2183 dev_err(adapter->dev, "set_dma_mask(32) failed\n");
2184 goto err_set_dma_mask;
2185 }
2186
2187 ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
2188 if (ret) {
2189 dev_err(adapter->dev, "set_consistent_dma_mask(64) failed\n");
2190 goto err_set_dma_mask;
2191 }
2192
2193 ret = pci_request_region(pdev, 0, DRV_NAME);
2194 if (ret) {
2195 dev_err(adapter->dev, "req_reg(0) error\n");
2196 goto err_req_region0;
2197 }
2198 card->pci_mmap = pci_iomap(pdev, 0, 0);
2199 if (!card->pci_mmap) {
2200 dev_err(adapter->dev, "iomap(0) error\n");
3220712d 2201 ret = -EIO;
d930faee
AK
2202 goto err_iomap0;
2203 }
2204 ret = pci_request_region(pdev, 2, DRV_NAME);
2205 if (ret) {
2206 dev_err(adapter->dev, "req_reg(2) error\n");
2207 goto err_req_region2;
2208 }
2209 card->pci_mmap1 = pci_iomap(pdev, 2, 0);
2210 if (!card->pci_mmap1) {
2211 dev_err(adapter->dev, "iomap(2) error\n");
3220712d 2212 ret = -EIO;
d930faee
AK
2213 goto err_iomap2;
2214 }
2215
f57c1edc
YAP
2216 dev_dbg(adapter->dev,
2217 "PCI memory map Virt0: %p PCI memory map Virt2: %p\n",
2218 card->pci_mmap, card->pci_mmap1);
d930faee
AK
2219
2220 card->cmdrsp_buf = NULL;
2221 ret = mwifiex_pcie_create_txbd_ring(adapter);
2222 if (ret)
2223 goto err_cre_txbd;
2224 ret = mwifiex_pcie_create_rxbd_ring(adapter);
2225 if (ret)
2226 goto err_cre_rxbd;
2227 ret = mwifiex_pcie_create_evtbd_ring(adapter);
2228 if (ret)
2229 goto err_cre_evtbd;
2230 ret = mwifiex_pcie_alloc_cmdrsp_buf(adapter);
2231 if (ret)
2232 goto err_alloc_cmdbuf;
52301a81
AP
2233 if (reg->sleep_cookie) {
2234 ret = mwifiex_pcie_alloc_sleep_cookie_buf(adapter);
2235 if (ret)
2236 goto err_alloc_cookie;
2237 } else {
2238 card->sleep_cookie_vbase = NULL;
2239 }
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2240 return ret;
2241
2242err_alloc_cookie:
2243 mwifiex_pcie_delete_cmdrsp_buf(adapter);
2244err_alloc_cmdbuf:
2245 mwifiex_pcie_delete_evtbd_ring(adapter);
2246err_cre_evtbd:
2247 mwifiex_pcie_delete_rxbd_ring(adapter);
2248err_cre_rxbd:
2249 mwifiex_pcie_delete_txbd_ring(adapter);
2250err_cre_txbd:
2251 pci_iounmap(pdev, card->pci_mmap1);
2252err_iomap2:
2253 pci_release_region(pdev, 2);
2254err_req_region2:
2255 pci_iounmap(pdev, card->pci_mmap);
2256err_iomap0:
2257 pci_release_region(pdev, 0);
2258err_req_region0:
2259err_set_dma_mask:
2260 pci_disable_device(pdev);
2261err_enable_dev:
2262 pci_set_drvdata(pdev, NULL);
2263 return ret;
2264}
2265
2266/*
2267 * This function cleans up the allocated card buffers.
2268 *
2269 * The following are freed by this function -
2270 * - TXBD ring buffers
2271 * - RXBD ring buffers
2272 * - Event BD ring buffers
2273 * - Command response ring buffer
2274 * - Sleep cookie buffer
2275 */
2276static void mwifiex_pcie_cleanup(struct mwifiex_adapter *adapter)
2277{
2278 struct pcie_service_card *card = adapter->card;
2279 struct pci_dev *pdev = card->dev;
dd04e6ac 2280 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee 2281
d930faee 2282 if (user_rmmod) {
fc331460 2283 dev_dbg(adapter->dev, "Clearing driver ready signature\n");
dd04e6ac 2284 if (mwifiex_write_reg(adapter, reg->drv_rdy, 0x00000000))
f57c1edc
YAP
2285 dev_err(adapter->dev,
2286 "Failed to write driver not-ready signature\n");
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AK
2287 }
2288
2289 if (pdev) {
2290 pci_iounmap(pdev, card->pci_mmap);
2291 pci_iounmap(pdev, card->pci_mmap1);
2292
2293 pci_release_regions(pdev);
2294 pci_disable_device(pdev);
2295 pci_set_drvdata(pdev, NULL);
2296 }
2297}
2298
2299/*
2300 * This function registers the PCIE device.
2301 *
2302 * PCIE IRQ is claimed, block size is set and driver data is initialized.
2303 */
2304static int mwifiex_register_dev(struct mwifiex_adapter *adapter)
2305{
2306 int ret;
2307 struct pcie_service_card *card = adapter->card;
2308 struct pci_dev *pdev = card->dev;
2309
2310 /* save adapter pointer in card */
2311 card->adapter = adapter;
2312
2313 ret = request_irq(pdev->irq, mwifiex_pcie_interrupt, IRQF_SHARED,
2314 "MRVL_PCIE", pdev);
2315 if (ret) {
2316 pr_err("request_irq failed: ret=%d\n", ret);
2317 adapter->card = NULL;
2318 return -1;
2319 }
2320
2321 adapter->dev = &pdev->dev;
dd04e6ac 2322 strcpy(adapter->fw_name, card->pcie.firmware);
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2323
2324 return 0;
2325}
2326
2327/*
2328 * This function unregisters the PCIE device.
2329 *
2330 * The PCIE IRQ is released, the function is disabled and driver
2331 * data is set to null.
2332 */
2333static void mwifiex_unregister_dev(struct mwifiex_adapter *adapter)
2334{
2335 struct pcie_service_card *card = adapter->card;
52301a81 2336 const struct mwifiex_pcie_card_reg *reg;
d930faee
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2337
2338 if (card) {
2339 dev_dbg(adapter->dev, "%s(): calling free_irq()\n", __func__);
2340 free_irq(card->dev->irq, card->dev);
fc331460 2341
52301a81
AP
2342 reg = card->pcie.reg;
2343 if (reg->sleep_cookie)
2344 mwifiex_pcie_delete_sleep_cookie_buf(adapter);
2345
fc331460
AP
2346 mwifiex_pcie_delete_cmdrsp_buf(adapter);
2347 mwifiex_pcie_delete_evtbd_ring(adapter);
2348 mwifiex_pcie_delete_rxbd_ring(adapter);
2349 mwifiex_pcie_delete_txbd_ring(adapter);
2350 card->cmdrsp_buf = NULL;
d930faee
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2351 }
2352}
2353
2354static struct mwifiex_if_ops pcie_ops = {
2355 .init_if = mwifiex_pcie_init,
2356 .cleanup_if = mwifiex_pcie_cleanup,
2357 .check_fw_status = mwifiex_check_fw_status,
2358 .prog_fw = mwifiex_prog_fw_w_helper,
2359 .register_dev = mwifiex_register_dev,
2360 .unregister_dev = mwifiex_unregister_dev,
2361 .enable_int = mwifiex_pcie_enable_host_int,
2362 .process_int_status = mwifiex_process_int_status,
2363 .host_to_card = mwifiex_pcie_host_to_card,
2364 .wakeup = mwifiex_pm_wakeup_card,
2365 .wakeup_complete = mwifiex_pm_wakeup_card_complete,
2366
2367 /* PCIE specific */
2368 .cmdrsp_complete = mwifiex_pcie_cmdrsp_complete,
2369 .event_complete = mwifiex_pcie_event_complete,
2370 .update_mp_end_port = NULL,
2371 .cleanup_mpa_buf = NULL,
c6d1d87a 2372 .init_fw_port = mwifiex_pcie_init_fw_port,
fbd7e7ac 2373 .clean_pcie_ring = mwifiex_clean_pcie_ring_buf,
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2374};
2375
2376/*
2377 * This function initializes the PCIE driver module.
2378 *
2379 * This initiates the semaphore and registers the device with
2380 * PCIE bus.
2381 */
2382static int mwifiex_pcie_init_module(void)
2383{
2384 int ret;
2385
ca8f2112 2386 pr_debug("Marvell PCIe Driver\n");
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2387
2388 sema_init(&add_remove_card_sem, 1);
2389
2390 /* Clear the flag in case user removes the card. */
2391 user_rmmod = 0;
2392
2393 ret = pci_register_driver(&mwifiex_pcie);
2394 if (ret)
2395 pr_err("Driver register failed!\n");
2396 else
2397 pr_debug("info: Driver registered successfully!\n");
2398
2399 return ret;
2400}
2401
2402/*
2403 * This function cleans up the PCIE driver.
2404 *
2405 * The following major steps are followed for cleanup -
2406 * - Resume the device if its suspended
2407 * - Disconnect the device if connected
2408 * - Shutdown the firmware
2409 * - Unregister the device from PCIE bus.
2410 */
2411static void mwifiex_pcie_cleanup_module(void)
2412{
2413 if (!down_interruptible(&add_remove_card_sem))
2414 up(&add_remove_card_sem);
2415
2416 /* Set the flag as user is removing this module. */
2417 user_rmmod = 1;
2418
2419 pci_unregister_driver(&mwifiex_pcie);
2420}
2421
2422module_init(mwifiex_pcie_init_module);
2423module_exit(mwifiex_pcie_cleanup_module);
2424
2425MODULE_AUTHOR("Marvell International Ltd.");
2426MODULE_DESCRIPTION("Marvell WiFi-Ex PCI-Express Driver version " PCIE_VERSION);
2427MODULE_VERSION(PCIE_VERSION);
2428MODULE_LICENSE("GPL v2");
ca8f2112
AP
2429MODULE_FIRMWARE(PCIE8766_DEFAULT_FW_NAME);
2430MODULE_FIRMWARE(PCIE8897_DEFAULT_FW_NAME);
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