mwifiex: correct max IE length check for WPS IE
[deliverable/linux.git] / drivers / net / wireless / mwifiex / pcie.c
CommitLineData
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1/*
2 * Marvell Wireless LAN device driver: PCIE specific handling
3 *
4 * Copyright (C) 2011, Marvell International Ltd.
5 *
6 * This software file (the "File") is distributed by Marvell International
7 * Ltd. under the terms of the GNU General Public License Version 2, June 1991
8 * (the "License"). You may use, redistribute and/or modify this File in
9 * accordance with the terms and conditions of the License, a copy of which
10 * is available by writing to the Free Software Foundation, Inc.,
11 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the
12 * worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt.
13 *
14 * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE
15 * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE
16 * ARE EXPRESSLY DISCLAIMED. The License provides additional details about
17 * this warranty disclaimer.
18 */
19
20#include <linux/firmware.h>
21
22#include "decl.h"
23#include "ioctl.h"
24#include "util.h"
25#include "fw.h"
26#include "main.h"
27#include "wmm.h"
28#include "11n.h"
29#include "pcie.h"
30
31#define PCIE_VERSION "1.0"
32#define DRV_NAME "Marvell mwifiex PCIe"
33
34static u8 user_rmmod;
35
36static struct mwifiex_if_ops pcie_ops;
37
38static struct semaphore add_remove_card_sem;
d930faee 39
fc331460
AP
40static int
41mwifiex_map_pci_memory(struct mwifiex_adapter *adapter, struct sk_buff *skb,
42 int size, int flags)
d930faee 43{
fc331460
AP
44 struct pcie_service_card *card = adapter->card;
45 dma_addr_t buf_pa;
d930faee 46
fc331460
AP
47 buf_pa = pci_map_single(card->dev, skb->data, size, flags);
48 if (pci_dma_mapping_error(card->dev, buf_pa)) {
49 dev_err(adapter->dev, "failed to map pci memory!\n");
50 return -1;
51 }
52 memcpy(skb->cb, &buf_pa, sizeof(dma_addr_t));
53 return 0;
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54}
55
56/*
57 * This function reads sleep cookie and checks if FW is ready
58 */
59static bool mwifiex_pcie_ok_to_access_hw(struct mwifiex_adapter *adapter)
60{
61 u32 *cookie_addr;
62 struct pcie_service_card *card = adapter->card;
52301a81
AP
63 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
64
65 if (!reg->sleep_cookie)
66 return true;
d930faee 67
fc331460
AP
68 if (card->sleep_cookie_vbase) {
69 cookie_addr = (u32 *)card->sleep_cookie_vbase;
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70 dev_dbg(adapter->dev, "info: ACCESS_HW: sleep cookie=0x%x\n",
71 *cookie_addr);
72 if (*cookie_addr == FW_AWAKE_COOKIE)
73 return true;
74 }
75
76 return false;
77}
78
3266d732 79#ifdef CONFIG_PM_SLEEP
fcca8d5a
BZ
80/*
81 * Kernel needs to suspend all functions separately. Therefore all
82 * registered functions must have drivers with suspend and resume
83 * methods. Failing that the kernel simply removes the whole card.
84 *
85 * If already not suspended, this function allocates and sends a host
86 * sleep activate request to the firmware and turns off the traffic.
87 */
3266d732 88static int mwifiex_pcie_suspend(struct device *dev)
fcca8d5a
BZ
89{
90 struct mwifiex_adapter *adapter;
91 struct pcie_service_card *card;
92 int hs_actived;
3266d732 93 struct pci_dev *pdev = to_pci_dev(dev);
fcca8d5a
BZ
94
95 if (pdev) {
96 card = (struct pcie_service_card *) pci_get_drvdata(pdev);
97 if (!card || !card->adapter) {
98 pr_err("Card or adapter structure is not valid\n");
99 return 0;
100 }
101 } else {
102 pr_err("PCIE device is not specified\n");
103 return 0;
104 }
105
106 adapter = card->adapter;
107
108 hs_actived = mwifiex_enable_hs(adapter);
109
110 /* Indicate device suspended */
111 adapter->is_suspended = true;
112
113 return 0;
114}
115
116/*
117 * Kernel needs to suspend all functions separately. Therefore all
118 * registered functions must have drivers with suspend and resume
119 * methods. Failing that the kernel simply removes the whole card.
120 *
121 * If already not resumed, this function turns on the traffic and
122 * sends a host sleep cancel request to the firmware.
123 */
3266d732 124static int mwifiex_pcie_resume(struct device *dev)
fcca8d5a
BZ
125{
126 struct mwifiex_adapter *adapter;
127 struct pcie_service_card *card;
3266d732 128 struct pci_dev *pdev = to_pci_dev(dev);
fcca8d5a
BZ
129
130 if (pdev) {
131 card = (struct pcie_service_card *) pci_get_drvdata(pdev);
132 if (!card || !card->adapter) {
133 pr_err("Card or adapter structure is not valid\n");
134 return 0;
135 }
136 } else {
137 pr_err("PCIE device is not specified\n");
138 return 0;
139 }
140
141 adapter = card->adapter;
142
143 if (!adapter->is_suspended) {
144 dev_warn(adapter->dev, "Device already resumed\n");
145 return 0;
146 }
147
148 adapter->is_suspended = false;
149
150 mwifiex_cancel_hs(mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_STA),
151 MWIFIEX_ASYNC_CMD);
152
153 return 0;
154}
8509e820 155#endif
fcca8d5a 156
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157/*
158 * This function probes an mwifiex device and registers it. It allocates
159 * the card structure, enables PCIE function number and initiates the
160 * device registration and initialization procedure by adding a logical
161 * interface.
162 */
163static int mwifiex_pcie_probe(struct pci_dev *pdev,
164 const struct pci_device_id *ent)
165{
166 struct pcie_service_card *card;
167
168 pr_debug("info: vendor=0x%4.04X device=0x%4.04X rev=%d\n",
f57c1edc 169 pdev->vendor, pdev->device, pdev->revision);
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170
171 card = kzalloc(sizeof(struct pcie_service_card), GFP_KERNEL);
e404decb 172 if (!card)
d930faee 173 return -ENOMEM;
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174
175 card->dev = pdev;
176
dd04e6ac
AP
177 if (ent->driver_data) {
178 struct mwifiex_pcie_device *data = (void *)ent->driver_data;
179 card->pcie.firmware = data->firmware;
180 card->pcie.reg = data->reg;
181 card->pcie.blksz_fw_dl = data->blksz_fw_dl;
182 }
183
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184 if (mwifiex_add_card(card, &add_remove_card_sem, &pcie_ops,
185 MWIFIEX_PCIE)) {
186 pr_err("%s failed\n", __func__);
187 kfree(card);
188 return -1;
189 }
190
191 return 0;
192}
193
194/*
195 * This function removes the interface and frees up the card structure.
196 */
197static void mwifiex_pcie_remove(struct pci_dev *pdev)
198{
199 struct pcie_service_card *card;
200 struct mwifiex_adapter *adapter;
f57c1edc 201 struct mwifiex_private *priv;
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202 int i;
203
204 card = pci_get_drvdata(pdev);
205 if (!card)
206 return;
207
208 adapter = card->adapter;
209 if (!adapter || !adapter->priv_num)
210 return;
211
59a4cc25
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212 /* In case driver is removed when asynchronous FW load is in progress */
213 wait_for_completion(&adapter->fw_load);
214
d930faee 215 if (user_rmmod) {
3266d732 216#ifdef CONFIG_PM_SLEEP
d930faee 217 if (adapter->is_suspended)
3266d732 218 mwifiex_pcie_resume(&pdev->dev);
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219#endif
220
221 for (i = 0; i < adapter->priv_num; i++)
222 if ((GET_BSS_ROLE(adapter->priv[i]) ==
f57c1edc
YAP
223 MWIFIEX_BSS_ROLE_STA) &&
224 adapter->priv[i]->media_connected)
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225 mwifiex_deauthenticate(adapter->priv[i], NULL);
226
f57c1edc 227 priv = mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_ANY);
d930faee 228
f57c1edc
YAP
229 mwifiex_disable_auto_ds(priv);
230
231 mwifiex_init_shutdown_fw(priv, MWIFIEX_FUNC_SHUTDOWN);
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232 }
233
234 mwifiex_remove_card(card->adapter, &add_remove_card_sem);
235 kfree(card);
236}
237
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238static DEFINE_PCI_DEVICE_TABLE(mwifiex_ids) = {
239 {
240 PCIE_VENDOR_ID_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8766P,
241 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
dd04e6ac 242 .driver_data = (unsigned long) &mwifiex_pcie8766,
d930faee 243 },
ca8f2112
AP
244 {
245 PCIE_VENDOR_ID_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8897,
246 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
247 .driver_data = (unsigned long) &mwifiex_pcie8897,
248 },
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249 {},
250};
251
252MODULE_DEVICE_TABLE(pci, mwifiex_ids);
253
3266d732
SK
254#ifdef CONFIG_PM_SLEEP
255/* Power Management Hooks */
256static SIMPLE_DEV_PM_OPS(mwifiex_pcie_pm_ops, mwifiex_pcie_suspend,
257 mwifiex_pcie_resume);
258#endif
259
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260/* PCI Device Driver */
261static struct pci_driver __refdata mwifiex_pcie = {
262 .name = "mwifiex_pcie",
263 .id_table = mwifiex_ids,
264 .probe = mwifiex_pcie_probe,
265 .remove = mwifiex_pcie_remove,
3266d732
SK
266#ifdef CONFIG_PM_SLEEP
267 .driver = {
268 .pm = &mwifiex_pcie_pm_ops,
269 },
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270#endif
271};
272
273/*
274 * This function writes data into PCIE card register.
275 */
276static int mwifiex_write_reg(struct mwifiex_adapter *adapter, int reg, u32 data)
277{
278 struct pcie_service_card *card = adapter->card;
279
280 iowrite32(data, card->pci_mmap1 + reg);
281
282 return 0;
283}
284
285/*
286 * This function reads data from PCIE card register.
287 */
288static int mwifiex_read_reg(struct mwifiex_adapter *adapter, int reg, u32 *data)
289{
290 struct pcie_service_card *card = adapter->card;
291
292 *data = ioread32(card->pci_mmap1 + reg);
293
294 return 0;
295}
296
297/*
c0880a29 298 * This function adds delay loop to ensure FW is awake before proceeding.
d930faee 299 */
c0880a29 300static void mwifiex_pcie_dev_wakeup_delay(struct mwifiex_adapter *adapter)
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301{
302 int i = 0;
303
c0880a29 304 while (mwifiex_pcie_ok_to_access_hw(adapter)) {
d930faee 305 i++;
e7891ba2 306 usleep_range(10, 20);
d930faee 307 /* 50ms max wait */
3e7a4ff7 308 if (i == 5000)
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309 break;
310 }
311
c0880a29
AP
312 return;
313}
314
315/* This function wakes up the card by reading fw_status register. */
316static int mwifiex_pm_wakeup_card(struct mwifiex_adapter *adapter)
317{
318 u32 fw_status;
319 struct pcie_service_card *card = adapter->card;
320 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
321
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322 dev_dbg(adapter->dev, "event: Wakeup device...\n");
323
c0880a29
AP
324 if (reg->sleep_cookie)
325 mwifiex_pcie_dev_wakeup_delay(adapter);
326
327 /* Reading fw_status register will wakeup device */
328 if (mwifiex_read_reg(adapter, reg->fw_status, &fw_status)) {
329 dev_warn(adapter->dev, "Reading fw_status register failed\n");
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330 return -1;
331 }
332
c0880a29
AP
333 if (reg->sleep_cookie) {
334 mwifiex_pcie_dev_wakeup_delay(adapter);
335 dev_dbg(adapter->dev, "PCIE wakeup: Setting PS_STATE_AWAKE\n");
336 adapter->ps_state = PS_STATE_AWAKE;
337 }
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338
339 return 0;
340}
341
342/*
343 * This function is called after the card has woken up.
344 *
345 * The card configuration register is reset.
346 */
347static int mwifiex_pm_wakeup_card_complete(struct mwifiex_adapter *adapter)
348{
349 dev_dbg(adapter->dev, "cmd: Wakeup device completed\n");
350
351 return 0;
352}
353
354/*
355 * This function disables the host interrupt.
356 *
357 * The host interrupt mask is read, the disable bit is reset and
358 * written back to the card host interrupt mask register.
359 */
360static int mwifiex_pcie_disable_host_int(struct mwifiex_adapter *adapter)
361{
362 if (mwifiex_pcie_ok_to_access_hw(adapter)) {
363 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_MASK,
364 0x00000000)) {
365 dev_warn(adapter->dev, "Disable host interrupt failed\n");
366 return -1;
367 }
368 }
369
370 return 0;
371}
372
373/*
374 * This function enables the host interrupt.
375 *
376 * The host interrupt enable mask is written to the card
377 * host interrupt mask register.
378 */
379static int mwifiex_pcie_enable_host_int(struct mwifiex_adapter *adapter)
380{
381 if (mwifiex_pcie_ok_to_access_hw(adapter)) {
382 /* Simply write the mask to the register */
383 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_MASK,
384 HOST_INTR_MASK)) {
385 dev_warn(adapter->dev, "Enable host interrupt failed\n");
386 return -1;
387 }
388 }
389
390 return 0;
391}
392
393/*
0732484b
AP
394 * This function initializes TX buffer ring descriptors
395 */
396static int mwifiex_init_txq_ring(struct mwifiex_adapter *adapter)
397{
398 struct pcie_service_card *card = adapter->card;
ca8f2112 399 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
0732484b 400 struct mwifiex_pcie_buf_desc *desc;
ca8f2112 401 struct mwifiex_pfu_buf_desc *desc2;
0732484b
AP
402 int i;
403
404 for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) {
405 card->tx_buf_list[i] = NULL;
ca8f2112
AP
406 if (reg->pfu_enabled) {
407 card->txbd_ring[i] = (void *)card->txbd_ring_vbase +
408 (sizeof(*desc2) * i);
409 desc2 = card->txbd_ring[i];
410 memset(desc2, 0, sizeof(*desc2));
411 } else {
412 card->txbd_ring[i] = (void *)card->txbd_ring_vbase +
413 (sizeof(*desc) * i);
414 desc = card->txbd_ring[i];
415 memset(desc, 0, sizeof(*desc));
416 }
0732484b
AP
417 }
418
419 return 0;
420}
421
422/* This function initializes RX buffer ring descriptors. Each SKB is allocated
423 * here and after mapping PCI memory, its physical address is assigned to
424 * PCIE Rx buffer descriptor's physical address.
425 */
426static int mwifiex_init_rxq_ring(struct mwifiex_adapter *adapter)
427{
428 struct pcie_service_card *card = adapter->card;
ca8f2112 429 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
0732484b
AP
430 struct sk_buff *skb;
431 struct mwifiex_pcie_buf_desc *desc;
ca8f2112 432 struct mwifiex_pfu_buf_desc *desc2;
0732484b
AP
433 dma_addr_t buf_pa;
434 int i;
435
436 for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) {
437 /* Allocate skb here so that firmware can DMA data from it */
438 skb = dev_alloc_skb(MWIFIEX_RX_DATA_BUF_SIZE);
439 if (!skb) {
440 dev_err(adapter->dev,
441 "Unable to allocate skb for RX ring.\n");
442 kfree(card->rxbd_ring_vbase);
443 return -ENOMEM;
444 }
445
446 if (mwifiex_map_pci_memory(adapter, skb,
447 MWIFIEX_RX_DATA_BUF_SIZE,
448 PCI_DMA_FROMDEVICE))
449 return -1;
450
451 MWIFIEX_SKB_PACB(skb, &buf_pa);
452
453 dev_dbg(adapter->dev,
454 "info: RX ring: skb=%p len=%d data=%p buf_pa=%#x:%x\n",
455 skb, skb->len, skb->data, (u32)buf_pa,
456 (u32)((u64)buf_pa >> 32));
457
458 card->rx_buf_list[i] = skb;
ca8f2112
AP
459 if (reg->pfu_enabled) {
460 card->rxbd_ring[i] = (void *)card->rxbd_ring_vbase +
461 (sizeof(*desc2) * i);
462 desc2 = card->rxbd_ring[i];
463 desc2->paddr = buf_pa;
464 desc2->len = (u16)skb->len;
465 desc2->frag_len = (u16)skb->len;
466 desc2->flags = reg->ring_flag_eop | reg->ring_flag_sop;
467 desc2->offset = 0;
468 } else {
469 card->rxbd_ring[i] = (void *)(card->rxbd_ring_vbase +
470 (sizeof(*desc) * i));
471 desc = card->rxbd_ring[i];
472 desc->paddr = buf_pa;
473 desc->len = (u16)skb->len;
474 desc->flags = 0;
475 }
0732484b
AP
476 }
477
478 return 0;
479}
480
481/* This function initializes event buffer ring descriptors. Each SKB is
482 * allocated here and after mapping PCI memory, its physical address is assigned
483 * to PCIE Rx buffer descriptor's physical address
484 */
485static int mwifiex_pcie_init_evt_ring(struct mwifiex_adapter *adapter)
486{
487 struct pcie_service_card *card = adapter->card;
e05dc3e9 488 struct mwifiex_evt_buf_desc *desc;
0732484b
AP
489 struct sk_buff *skb;
490 dma_addr_t buf_pa;
491 int i;
492
493 for (i = 0; i < MWIFIEX_MAX_EVT_BD; i++) {
494 /* Allocate skb here so that firmware can DMA data from it */
495 skb = dev_alloc_skb(MAX_EVENT_SIZE);
496 if (!skb) {
497 dev_err(adapter->dev,
498 "Unable to allocate skb for EVENT buf.\n");
499 kfree(card->evtbd_ring_vbase);
500 return -ENOMEM;
501 }
502 skb_put(skb, MAX_EVENT_SIZE);
503
504 if (mwifiex_map_pci_memory(adapter, skb, MAX_EVENT_SIZE,
505 PCI_DMA_FROMDEVICE))
506 return -1;
507
508 MWIFIEX_SKB_PACB(skb, &buf_pa);
509
510 dev_dbg(adapter->dev,
511 "info: EVT ring: skb=%p len=%d data=%p buf_pa=%#x:%x\n",
512 skb, skb->len, skb->data, (u32)buf_pa,
513 (u32)((u64)buf_pa >> 32));
514
515 card->evt_buf_list[i] = skb;
516 card->evtbd_ring[i] = (void *)(card->evtbd_ring_vbase +
517 (sizeof(*desc) * i));
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AP
518 desc = card->evtbd_ring[i];
519 desc->paddr = buf_pa;
520 desc->len = (u16)skb->len;
521 desc->flags = 0;
522 }
523
524 return 0;
525}
526
527/* This function cleans up TX buffer rings. If any of the buffer list has valid
528 * SKB address, associated SKB is freed.
529 */
530static void mwifiex_cleanup_txq_ring(struct mwifiex_adapter *adapter)
531{
532 struct pcie_service_card *card = adapter->card;
ca8f2112 533 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
0732484b
AP
534 struct sk_buff *skb;
535 struct mwifiex_pcie_buf_desc *desc;
ca8f2112 536 struct mwifiex_pfu_buf_desc *desc2;
0732484b
AP
537 int i;
538
539 for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) {
ca8f2112
AP
540 if (reg->pfu_enabled) {
541 desc2 = card->txbd_ring[i];
542 if (card->tx_buf_list[i]) {
543 skb = card->tx_buf_list[i];
544 pci_unmap_single(card->dev, desc2->paddr,
545 skb->len, PCI_DMA_TODEVICE);
546 dev_kfree_skb_any(skb);
547 }
548 memset(desc2, 0, sizeof(*desc2));
549 } else {
550 desc = card->txbd_ring[i];
551 if (card->tx_buf_list[i]) {
552 skb = card->tx_buf_list[i];
553 pci_unmap_single(card->dev, desc->paddr,
554 skb->len, PCI_DMA_TODEVICE);
555 dev_kfree_skb_any(skb);
556 }
557 memset(desc, 0, sizeof(*desc));
0732484b
AP
558 }
559 card->tx_buf_list[i] = NULL;
0732484b
AP
560 }
561
562 return;
563}
564
565/* This function cleans up RX buffer rings. If any of the buffer list has valid
566 * SKB address, associated SKB is freed.
567 */
568static void mwifiex_cleanup_rxq_ring(struct mwifiex_adapter *adapter)
569{
570 struct pcie_service_card *card = adapter->card;
ca8f2112 571 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
0732484b 572 struct mwifiex_pcie_buf_desc *desc;
ca8f2112 573 struct mwifiex_pfu_buf_desc *desc2;
0732484b
AP
574 struct sk_buff *skb;
575 int i;
576
577 for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) {
ca8f2112
AP
578 if (reg->pfu_enabled) {
579 desc2 = card->rxbd_ring[i];
580 if (card->rx_buf_list[i]) {
581 skb = card->rx_buf_list[i];
582 pci_unmap_single(card->dev, desc2->paddr,
d033d3a6 583 skb->len, PCI_DMA_FROMDEVICE);
ca8f2112
AP
584 dev_kfree_skb_any(skb);
585 }
586 memset(desc2, 0, sizeof(*desc2));
587 } else {
588 desc = card->rxbd_ring[i];
589 if (card->rx_buf_list[i]) {
590 skb = card->rx_buf_list[i];
591 pci_unmap_single(card->dev, desc->paddr,
d033d3a6 592 skb->len, PCI_DMA_FROMDEVICE);
ca8f2112
AP
593 dev_kfree_skb_any(skb);
594 }
595 memset(desc, 0, sizeof(*desc));
0732484b 596 }
ca8f2112 597 card->rx_buf_list[i] = NULL;
0732484b
AP
598 }
599
600 return;
601}
602
603/* This function cleans up event buffer rings. If any of the buffer list has
604 * valid SKB address, associated SKB is freed.
605 */
606static void mwifiex_cleanup_evt_ring(struct mwifiex_adapter *adapter)
607{
608 struct pcie_service_card *card = adapter->card;
e05dc3e9 609 struct mwifiex_evt_buf_desc *desc;
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AP
610 struct sk_buff *skb;
611 int i;
612
613 for (i = 0; i < MWIFIEX_MAX_EVT_BD; i++) {
614 desc = card->evtbd_ring[i];
615 if (card->evt_buf_list[i]) {
616 skb = card->evt_buf_list[i];
617 pci_unmap_single(card->dev, desc->paddr, MAX_EVENT_SIZE,
618 PCI_DMA_FROMDEVICE);
619 dev_kfree_skb_any(skb);
620 }
621 card->evt_buf_list[i] = NULL;
622 memset(desc, 0, sizeof(*desc));
623 }
624
625 return;
626}
627
628/* This function creates buffer descriptor ring for TX
d930faee
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629 */
630static int mwifiex_pcie_create_txbd_ring(struct mwifiex_adapter *adapter)
631{
632 struct pcie_service_card *card = adapter->card;
dd04e6ac 633 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee
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634
635 /*
636 * driver maintaines the write pointer and firmware maintaines the read
637 * pointer. The write pointer starts at 0 (zero) while the read pointer
638 * starts at zero with rollover bit set
639 */
640 card->txbd_wrptr = 0;
ca8f2112
AP
641
642 if (reg->pfu_enabled)
643 card->txbd_rdptr = 0;
644 else
645 card->txbd_rdptr |= reg->tx_rollover_ind;
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646
647 /* allocate shared memory for the BD ring and divide the same in to
648 several descriptors */
ca8f2112
AP
649 if (reg->pfu_enabled)
650 card->txbd_ring_size = sizeof(struct mwifiex_pfu_buf_desc) *
651 MWIFIEX_MAX_TXRX_BD;
652 else
653 card->txbd_ring_size = sizeof(struct mwifiex_pcie_buf_desc) *
654 MWIFIEX_MAX_TXRX_BD;
655
d930faee 656 dev_dbg(adapter->dev, "info: txbd_ring: Allocating %d bytes\n",
f57c1edc 657 card->txbd_ring_size);
fc331460
AP
658 card->txbd_ring_vbase = pci_alloc_consistent(card->dev,
659 card->txbd_ring_size,
660 &card->txbd_ring_pbase);
d930faee 661 if (!card->txbd_ring_vbase) {
fc331460
AP
662 dev_err(adapter->dev,
663 "allocate consistent memory (%d bytes) failed!\n",
664 card->txbd_ring_size);
8c53e42d 665 return -ENOMEM;
d930faee 666 }
f57c1edc
YAP
667 dev_dbg(adapter->dev,
668 "info: txbd_ring - base: %p, pbase: %#x:%x, len: %x\n",
fc331460 669 card->txbd_ring_vbase, (unsigned int)card->txbd_ring_pbase,
f57c1edc 670 (u32)((u64)card->txbd_ring_pbase >> 32), card->txbd_ring_size);
d930faee 671
0732484b 672 return mwifiex_init_txq_ring(adapter);
d930faee
AK
673}
674
675static int mwifiex_pcie_delete_txbd_ring(struct mwifiex_adapter *adapter)
676{
677 struct pcie_service_card *card = adapter->card;
dd04e6ac 678 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee 679
0732484b 680 mwifiex_cleanup_txq_ring(adapter);
d930faee 681
fc331460
AP
682 if (card->txbd_ring_vbase)
683 pci_free_consistent(card->dev, card->txbd_ring_size,
684 card->txbd_ring_vbase,
685 card->txbd_ring_pbase);
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686 card->txbd_ring_size = 0;
687 card->txbd_wrptr = 0;
dd04e6ac 688 card->txbd_rdptr = 0 | reg->tx_rollover_ind;
d930faee 689 card->txbd_ring_vbase = NULL;
fc331460 690 card->txbd_ring_pbase = 0;
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691
692 return 0;
693}
694
695/*
696 * This function creates buffer descriptor ring for RX
697 */
698static int mwifiex_pcie_create_rxbd_ring(struct mwifiex_adapter *adapter)
699{
700 struct pcie_service_card *card = adapter->card;
dd04e6ac 701 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
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702
703 /*
704 * driver maintaines the read pointer and firmware maintaines the write
705 * pointer. The write pointer starts at 0 (zero) while the read pointer
706 * starts at zero with rollover bit set
707 */
708 card->rxbd_wrptr = 0;
dd04e6ac 709 card->rxbd_rdptr = reg->rx_rollover_ind;
d930faee 710
ca8f2112
AP
711 if (reg->pfu_enabled)
712 card->rxbd_ring_size = sizeof(struct mwifiex_pfu_buf_desc) *
713 MWIFIEX_MAX_TXRX_BD;
714 else
715 card->rxbd_ring_size = sizeof(struct mwifiex_pcie_buf_desc) *
716 MWIFIEX_MAX_TXRX_BD;
717
d930faee 718 dev_dbg(adapter->dev, "info: rxbd_ring: Allocating %d bytes\n",
f57c1edc 719 card->rxbd_ring_size);
fc331460
AP
720 card->rxbd_ring_vbase = pci_alloc_consistent(card->dev,
721 card->rxbd_ring_size,
722 &card->rxbd_ring_pbase);
d930faee 723 if (!card->rxbd_ring_vbase) {
fc331460
AP
724 dev_err(adapter->dev,
725 "allocate consistent memory (%d bytes) failed!\n",
726 card->rxbd_ring_size);
8c53e42d 727 return -ENOMEM;
d930faee 728 }
d930faee 729
f57c1edc
YAP
730 dev_dbg(adapter->dev,
731 "info: rxbd_ring - base: %p, pbase: %#x:%x, len: %#x\n",
732 card->rxbd_ring_vbase, (u32)card->rxbd_ring_pbase,
733 (u32)((u64)card->rxbd_ring_pbase >> 32),
734 card->rxbd_ring_size);
d930faee 735
0732484b 736 return mwifiex_init_rxq_ring(adapter);
d930faee
AK
737}
738
739/*
740 * This function deletes Buffer descriptor ring for RX
741 */
742static int mwifiex_pcie_delete_rxbd_ring(struct mwifiex_adapter *adapter)
743{
744 struct pcie_service_card *card = adapter->card;
dd04e6ac 745 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee 746
0732484b 747 mwifiex_cleanup_rxq_ring(adapter);
d930faee 748
fc331460
AP
749 if (card->rxbd_ring_vbase)
750 pci_free_consistent(card->dev, card->rxbd_ring_size,
751 card->rxbd_ring_vbase,
752 card->rxbd_ring_pbase);
d930faee
AK
753 card->rxbd_ring_size = 0;
754 card->rxbd_wrptr = 0;
dd04e6ac 755 card->rxbd_rdptr = 0 | reg->rx_rollover_ind;
d930faee 756 card->rxbd_ring_vbase = NULL;
fc331460 757 card->rxbd_ring_pbase = 0;
d930faee
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758
759 return 0;
760}
761
762/*
763 * This function creates buffer descriptor ring for Events
764 */
765static int mwifiex_pcie_create_evtbd_ring(struct mwifiex_adapter *adapter)
766{
767 struct pcie_service_card *card = adapter->card;
dd04e6ac 768 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee
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769
770 /*
771 * driver maintaines the read pointer and firmware maintaines the write
772 * pointer. The write pointer starts at 0 (zero) while the read pointer
773 * starts at zero with rollover bit set
774 */
775 card->evtbd_wrptr = 0;
dd04e6ac 776 card->evtbd_rdptr = reg->evt_rollover_ind;
d930faee 777
e05dc3e9 778 card->evtbd_ring_size = sizeof(struct mwifiex_evt_buf_desc) *
ca8f2112
AP
779 MWIFIEX_MAX_EVT_BD;
780
d930faee 781 dev_dbg(adapter->dev, "info: evtbd_ring: Allocating %d bytes\n",
f57c1edc 782 card->evtbd_ring_size);
fc331460
AP
783 card->evtbd_ring_vbase = pci_alloc_consistent(card->dev,
784 card->evtbd_ring_size,
785 &card->evtbd_ring_pbase);
d930faee 786 if (!card->evtbd_ring_vbase) {
f57c1edc 787 dev_err(adapter->dev,
fc331460
AP
788 "allocate consistent memory (%d bytes) failed!\n",
789 card->evtbd_ring_size);
8c53e42d 790 return -ENOMEM;
d930faee 791 }
d930faee 792
f57c1edc
YAP
793 dev_dbg(adapter->dev,
794 "info: CMDRSP/EVT bd_ring - base: %p pbase: %#x:%x len: %#x\n",
795 card->evtbd_ring_vbase, (u32)card->evtbd_ring_pbase,
796 (u32)((u64)card->evtbd_ring_pbase >> 32),
797 card->evtbd_ring_size);
d930faee 798
0732484b 799 return mwifiex_pcie_init_evt_ring(adapter);
d930faee
AK
800}
801
802/*
803 * This function deletes Buffer descriptor ring for Events
804 */
805static int mwifiex_pcie_delete_evtbd_ring(struct mwifiex_adapter *adapter)
806{
807 struct pcie_service_card *card = adapter->card;
dd04e6ac 808 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee 809
0732484b 810 mwifiex_cleanup_evt_ring(adapter);
d930faee 811
fc331460
AP
812 if (card->evtbd_ring_vbase)
813 pci_free_consistent(card->dev, card->evtbd_ring_size,
814 card->evtbd_ring_vbase,
815 card->evtbd_ring_pbase);
d930faee 816 card->evtbd_wrptr = 0;
dd04e6ac 817 card->evtbd_rdptr = 0 | reg->evt_rollover_ind;
d930faee
AK
818 card->evtbd_ring_size = 0;
819 card->evtbd_ring_vbase = NULL;
fc331460 820 card->evtbd_ring_pbase = 0;
d930faee
AK
821
822 return 0;
823}
824
825/*
826 * This function allocates a buffer for CMDRSP
827 */
828static int mwifiex_pcie_alloc_cmdrsp_buf(struct mwifiex_adapter *adapter)
829{
830 struct pcie_service_card *card = adapter->card;
831 struct sk_buff *skb;
832
833 /* Allocate memory for receiving command response data */
834 skb = dev_alloc_skb(MWIFIEX_UPLD_SIZE);
835 if (!skb) {
f57c1edc
YAP
836 dev_err(adapter->dev,
837 "Unable to allocate skb for command response data.\n");
d930faee
AK
838 return -ENOMEM;
839 }
d930faee 840 skb_put(skb, MWIFIEX_UPLD_SIZE);
fc331460
AP
841 if (mwifiex_map_pci_memory(adapter, skb, MWIFIEX_UPLD_SIZE,
842 PCI_DMA_FROMDEVICE))
843 return -1;
d930faee 844
fc331460 845 card->cmdrsp_buf = skb;
d930faee
AK
846
847 return 0;
848}
849
850/*
851 * This function deletes a buffer for CMDRSP
852 */
853static int mwifiex_pcie_delete_cmdrsp_buf(struct mwifiex_adapter *adapter)
854{
855 struct pcie_service_card *card;
fc331460 856 dma_addr_t buf_pa;
d930faee
AK
857
858 if (!adapter)
859 return 0;
860
861 card = adapter->card;
862
fc331460
AP
863 if (card && card->cmdrsp_buf) {
864 MWIFIEX_SKB_PACB(card->cmdrsp_buf, &buf_pa);
865 pci_unmap_single(card->dev, buf_pa, MWIFIEX_UPLD_SIZE,
866 PCI_DMA_FROMDEVICE);
d930faee 867 dev_kfree_skb_any(card->cmdrsp_buf);
fc331460 868 }
d930faee 869
fc331460
AP
870 if (card && card->cmd_buf) {
871 MWIFIEX_SKB_PACB(card->cmd_buf, &buf_pa);
7af1ce0e 872 pci_unmap_single(card->dev, buf_pa, card->cmd_buf->len,
fc331460 873 PCI_DMA_TODEVICE);
fc331460 874 }
d930faee
AK
875 return 0;
876}
877
878/*
879 * This function allocates a buffer for sleep cookie
880 */
881static int mwifiex_pcie_alloc_sleep_cookie_buf(struct mwifiex_adapter *adapter)
882{
d930faee
AK
883 struct pcie_service_card *card = adapter->card;
884
fc331460
AP
885 card->sleep_cookie_vbase = pci_alloc_consistent(card->dev, sizeof(u32),
886 &card->sleep_cookie_pbase);
887 if (!card->sleep_cookie_vbase) {
888 dev_err(adapter->dev, "pci_alloc_consistent failed!\n");
d930faee
AK
889 return -ENOMEM;
890 }
d930faee 891 /* Init val of Sleep Cookie */
fc331460 892 *(u32 *)card->sleep_cookie_vbase = FW_AWAKE_COOKIE;
d930faee
AK
893
894 dev_dbg(adapter->dev, "alloc_scook: sleep cookie=0x%x\n",
fc331460 895 *((u32 *)card->sleep_cookie_vbase));
d930faee
AK
896
897 return 0;
898}
899
900/*
901 * This function deletes buffer for sleep cookie
902 */
903static int mwifiex_pcie_delete_sleep_cookie_buf(struct mwifiex_adapter *adapter)
904{
905 struct pcie_service_card *card;
906
907 if (!adapter)
908 return 0;
909
910 card = adapter->card;
911
fc331460
AP
912 if (card && card->sleep_cookie_vbase) {
913 pci_free_consistent(card->dev, sizeof(u32),
914 card->sleep_cookie_vbase,
915 card->sleep_cookie_pbase);
916 card->sleep_cookie_vbase = NULL;
d930faee
AK
917 }
918
919 return 0;
920}
921
fbd7e7ac
AP
922/* This function flushes the TX buffer descriptor ring
923 * This function defined as handler is also called while cleaning TXRX
924 * during disconnect/ bss stop.
925 */
926static int mwifiex_clean_pcie_ring_buf(struct mwifiex_adapter *adapter)
927{
928 struct pcie_service_card *card = adapter->card;
fbd7e7ac 929
48f4d916 930 if (!mwifiex_pcie_txbd_empty(card, card->txbd_rdptr)) {
fbd7e7ac
AP
931 card->txbd_flush = 1;
932 /* write pointer already set at last send
933 * send dnld-rdy intr again, wait for completion.
934 */
935 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
936 CPU_INTR_DNLD_RDY)) {
937 dev_err(adapter->dev,
938 "failed to assert dnld-rdy interrupt.\n");
939 return -1;
940 }
941 }
942 return 0;
943}
944
d930faee 945/*
e7f767a7 946 * This function unmaps and frees downloaded data buffer
d930faee 947 */
e7f767a7 948static int mwifiex_pcie_send_data_complete(struct mwifiex_adapter *adapter)
d930faee 949{
e7f767a7
AP
950 struct sk_buff *skb;
951 dma_addr_t buf_pa;
ca8f2112 952 u32 wrdoneidx, rdptr, num_tx_buffs, unmap_count = 0;
e05dc3e9 953 struct mwifiex_pcie_buf_desc *desc;
ca8f2112 954 struct mwifiex_pfu_buf_desc *desc2;
d930faee 955 struct pcie_service_card *card = adapter->card;
dd04e6ac 956 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee
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957
958 if (!mwifiex_pcie_ok_to_access_hw(adapter))
959 mwifiex_pm_wakeup_card(adapter);
960
961 /* Read the TX ring read pointer set by firmware */
dd04e6ac 962 if (mwifiex_read_reg(adapter, reg->tx_rdptr, &rdptr)) {
f57c1edc 963 dev_err(adapter->dev,
dd04e6ac 964 "SEND COMP: failed to read reg->tx_rdptr\n");
d930faee
AK
965 return -1;
966 }
967
e7f767a7
AP
968 dev_dbg(adapter->dev, "SEND COMP: rdptr_prev=0x%x, rdptr=0x%x\n",
969 card->txbd_rdptr, rdptr);
d930faee 970
ca8f2112 971 num_tx_buffs = MWIFIEX_MAX_TXRX_BD << reg->tx_start_ptr;
e7f767a7 972 /* free from previous txbd_rdptr to current txbd_rdptr */
dd04e6ac
AP
973 while (((card->txbd_rdptr & reg->tx_mask) !=
974 (rdptr & reg->tx_mask)) ||
975 ((card->txbd_rdptr & reg->tx_rollover_ind) !=
976 (rdptr & reg->tx_rollover_ind))) {
ca8f2112
AP
977 wrdoneidx = (card->txbd_rdptr & reg->tx_mask) >>
978 reg->tx_start_ptr;
e7f767a7
AP
979
980 skb = card->tx_buf_list[wrdoneidx];
981 if (skb) {
982 dev_dbg(adapter->dev,
983 "SEND COMP: Detach skb %p at txbd_rdidx=%d\n",
984 skb, wrdoneidx);
985 MWIFIEX_SKB_PACB(skb, &buf_pa);
986 pci_unmap_single(card->dev, buf_pa, skb->len,
987 PCI_DMA_TODEVICE);
988
989 unmap_count++;
990
991 if (card->txbd_flush)
992 mwifiex_write_data_complete(adapter, skb, 0,
993 -1);
994 else
995 mwifiex_write_data_complete(adapter, skb, 0, 0);
996 }
997
998 card->tx_buf_list[wrdoneidx] = NULL;
ca8f2112
AP
999
1000 if (reg->pfu_enabled) {
1001 desc2 = (void *)card->txbd_ring[wrdoneidx];
1002 memset(desc2, 0, sizeof(*desc2));
1003 } else {
1004 desc = card->txbd_ring[wrdoneidx];
1005 memset(desc, 0, sizeof(*desc));
1006 }
1007 switch (card->dev->device) {
1008 case PCIE_DEVICE_ID_MARVELL_88W8766P:
1009 card->txbd_rdptr++;
1010 break;
1011 case PCIE_DEVICE_ID_MARVELL_88W8897:
1012 card->txbd_rdptr += reg->ring_tx_start_ptr;
1013 break;
1014 }
1015
e7f767a7 1016
dd04e6ac 1017 if ((card->txbd_rdptr & reg->tx_mask) == num_tx_buffs)
e7f767a7 1018 card->txbd_rdptr = ((card->txbd_rdptr &
dd04e6ac
AP
1019 reg->tx_rollover_ind) ^
1020 reg->tx_rollover_ind);
e7f767a7
AP
1021 }
1022
1023 if (unmap_count)
1024 adapter->data_sent = false;
1025
1026 if (card->txbd_flush) {
3d482038 1027 if (mwifiex_pcie_txbd_empty(card, card->txbd_rdptr))
e7f767a7
AP
1028 card->txbd_flush = 0;
1029 else
1030 mwifiex_clean_pcie_ring_buf(adapter);
1031 }
1032
1033 return 0;
1034}
1035
1036/* This function sends data buffer to device. First 4 bytes of payload
1037 * are filled with payload length and payload type. Then this payload
1038 * is mapped to PCI device memory. Tx ring pointers are advanced accordingly.
1039 * Download ready interrupt to FW is deffered if Tx ring is not full and
1040 * additional payload can be accomodated.
1041 */
1042static int
1043mwifiex_pcie_send_data(struct mwifiex_adapter *adapter, struct sk_buff *skb,
1044 struct mwifiex_tx_param *tx_param)
1045{
1046 struct pcie_service_card *card = adapter->card;
dd04e6ac 1047 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
ca8f2112 1048 u32 wrindx, num_tx_buffs, rx_val;
e7f767a7
AP
1049 int ret;
1050 dma_addr_t buf_pa;
9931078e
BZ
1051 struct mwifiex_pcie_buf_desc *desc = NULL;
1052 struct mwifiex_pfu_buf_desc *desc2 = NULL;
e7f767a7
AP
1053 __le16 *tmp;
1054
1055 if (!(skb->data && skb->len)) {
1056 dev_err(adapter->dev, "%s(): invalid parameter <%p, %#x>\n",
1057 __func__, skb->data, skb->len);
1058 return -1;
1059 }
1060
1061 if (!mwifiex_pcie_ok_to_access_hw(adapter))
1062 mwifiex_pm_wakeup_card(adapter);
1063
ca8f2112 1064 num_tx_buffs = MWIFIEX_MAX_TXRX_BD << reg->tx_start_ptr;
e7f767a7
AP
1065 dev_dbg(adapter->dev, "info: SEND DATA: <Rd: %#x, Wr: %#x>\n",
1066 card->txbd_rdptr, card->txbd_wrptr);
1067 if (mwifiex_pcie_txbd_not_full(card)) {
d930faee
AK
1068 u8 *payload;
1069
1070 adapter->data_sent = true;
e7f767a7 1071 payload = skb->data;
d930faee
AK
1072 tmp = (__le16 *)&payload[0];
1073 *tmp = cpu_to_le16((u16)skb->len);
1074 tmp = (__le16 *)&payload[2];
1075 *tmp = cpu_to_le16(MWIFIEX_TYPE_DATA);
e7f767a7
AP
1076
1077 if (mwifiex_map_pci_memory(adapter, skb, skb->len ,
1078 PCI_DMA_TODEVICE))
1079 return -1;
1080
ca8f2112 1081 wrindx = (card->txbd_wrptr & reg->tx_mask) >> reg->tx_start_ptr;
e7f767a7
AP
1082 MWIFIEX_SKB_PACB(skb, &buf_pa);
1083 card->tx_buf_list[wrindx] = skb;
d930faee 1084
ca8f2112
AP
1085 if (reg->pfu_enabled) {
1086 desc2 = (void *)card->txbd_ring[wrindx];
1087 desc2->paddr = buf_pa;
1088 desc2->len = (u16)skb->len;
1089 desc2->frag_len = (u16)skb->len;
1090 desc2->offset = 0;
1091 desc2->flags = MWIFIEX_BD_FLAG_FIRST_DESC |
1092 MWIFIEX_BD_FLAG_LAST_DESC;
1093 } else {
1094 desc = card->txbd_ring[wrindx];
1095 desc->paddr = buf_pa;
1096 desc->len = (u16)skb->len;
1097 desc->flags = MWIFIEX_BD_FLAG_FIRST_DESC |
1098 MWIFIEX_BD_FLAG_LAST_DESC;
1099 }
1100
1101 switch (card->dev->device) {
1102 case PCIE_DEVICE_ID_MARVELL_88W8766P:
1103 card->txbd_wrptr++;
1104 break;
1105 case PCIE_DEVICE_ID_MARVELL_88W8897:
1106 card->txbd_wrptr += reg->ring_tx_start_ptr;
1107 break;
1108 }
1109
1110 if ((card->txbd_wrptr & reg->tx_mask) == num_tx_buffs)
d930faee 1111 card->txbd_wrptr = ((card->txbd_wrptr &
dd04e6ac
AP
1112 reg->tx_rollover_ind) ^
1113 reg->tx_rollover_ind);
d930faee 1114
ca8f2112 1115 rx_val = card->rxbd_rdptr & reg->rx_wrap_mask;
dd04e6ac
AP
1116 /* Write the TX ring write pointer in to reg->tx_wrptr */
1117 if (mwifiex_write_reg(adapter, reg->tx_wrptr,
ca8f2112 1118 card->txbd_wrptr | rx_val)) {
f57c1edc 1119 dev_err(adapter->dev,
dd04e6ac 1120 "SEND DATA: failed to write reg->tx_wrptr\n");
e7f767a7
AP
1121 ret = -1;
1122 goto done_unmap;
d930faee 1123 }
e7f767a7
AP
1124 if ((mwifiex_pcie_txbd_not_full(card)) &&
1125 tx_param->next_pkt_len) {
1126 /* have more packets and TxBD still can hold more */
1127 dev_dbg(adapter->dev,
1128 "SEND DATA: delay dnld-rdy interrupt.\n");
1129 adapter->data_sent = false;
1130 } else {
1131 /* Send the TX ready interrupt */
1132 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
1133 CPU_INTR_DNLD_RDY)) {
1134 dev_err(adapter->dev,
1135 "SEND DATA: failed to assert dnld-rdy interrupt.\n");
1136 ret = -1;
1137 goto done_unmap;
1138 }
d930faee
AK
1139 }
1140 dev_dbg(adapter->dev, "info: SEND DATA: Updated <Rd: %#x, Wr: "
f57c1edc 1141 "%#x> and sent packet to firmware successfully\n",
e7f767a7 1142 card->txbd_rdptr, card->txbd_wrptr);
d930faee 1143 } else {
f57c1edc
YAP
1144 dev_dbg(adapter->dev,
1145 "info: TX Ring full, can't send packets to fw\n");
d930faee
AK
1146 adapter->data_sent = true;
1147 /* Send the TX ready interrupt */
1148 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
1149 CPU_INTR_DNLD_RDY))
f57c1edc
YAP
1150 dev_err(adapter->dev,
1151 "SEND DATA: failed to assert door-bell intr\n");
d930faee
AK
1152 return -EBUSY;
1153 }
1154
e7f767a7
AP
1155 return -EINPROGRESS;
1156done_unmap:
1157 MWIFIEX_SKB_PACB(skb, &buf_pa);
1158 pci_unmap_single(card->dev, buf_pa, skb->len, PCI_DMA_TODEVICE);
1159 card->tx_buf_list[wrindx] = NULL;
ca8f2112
AP
1160 if (reg->pfu_enabled)
1161 memset(desc2, 0, sizeof(*desc2));
1162 else
1163 memset(desc, 0, sizeof(*desc));
1164
e7f767a7 1165 return ret;
d930faee
AK
1166}
1167
1168/*
1169 * This function handles received buffer ring and
1170 * dispatches packets to upper
1171 */
1172static int mwifiex_pcie_process_recv_data(struct mwifiex_adapter *adapter)
1173{
1174 struct pcie_service_card *card = adapter->card;
dd04e6ac 1175 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
ca8f2112 1176 u32 wrptr, rd_index, tx_val;
e7f767a7 1177 dma_addr_t buf_pa;
d930faee
AK
1178 int ret = 0;
1179 struct sk_buff *skb_tmp = NULL;
e05dc3e9 1180 struct mwifiex_pcie_buf_desc *desc;
ca8f2112 1181 struct mwifiex_pfu_buf_desc *desc2;
d930faee 1182
e7f767a7
AP
1183 if (!mwifiex_pcie_ok_to_access_hw(adapter))
1184 mwifiex_pm_wakeup_card(adapter);
1185
d930faee 1186 /* Read the RX ring Write pointer set by firmware */
dd04e6ac 1187 if (mwifiex_read_reg(adapter, reg->rx_wrptr, &wrptr)) {
f57c1edc 1188 dev_err(adapter->dev,
dd04e6ac 1189 "RECV DATA: failed to read reg->rx_wrptr\n");
d930faee
AK
1190 ret = -1;
1191 goto done;
1192 }
e7f767a7 1193 card->rxbd_wrptr = wrptr;
d930faee 1194
dd04e6ac
AP
1195 while (((wrptr & reg->rx_mask) !=
1196 (card->rxbd_rdptr & reg->rx_mask)) ||
1197 ((wrptr & reg->rx_rollover_ind) ==
1198 (card->rxbd_rdptr & reg->rx_rollover_ind))) {
d930faee
AK
1199 struct sk_buff *skb_data;
1200 u16 rx_len;
e7f767a7 1201 __le16 pkt_len;
d930faee 1202
dd04e6ac 1203 rd_index = card->rxbd_rdptr & reg->rx_mask;
d930faee
AK
1204 skb_data = card->rx_buf_list[rd_index];
1205
e7f767a7
AP
1206 MWIFIEX_SKB_PACB(skb_data, &buf_pa);
1207 pci_unmap_single(card->dev, buf_pa, MWIFIEX_RX_DATA_BUF_SIZE,
1208 PCI_DMA_FROMDEVICE);
1209 card->rx_buf_list[rd_index] = NULL;
1210
d930faee 1211 /* Get data length from interface header -
e7f767a7
AP
1212 * first 2 bytes for len, next 2 bytes is for type
1213 */
1214 pkt_len = *((__le16 *)skb_data->data);
1215 rx_len = le16_to_cpu(pkt_len);
1216 skb_put(skb_data, rx_len);
f57c1edc
YAP
1217 dev_dbg(adapter->dev,
1218 "info: RECV DATA: Rd=%#x, Wr=%#x, Len=%d\n",
1219 card->rxbd_rdptr, wrptr, rx_len);
e7f767a7
AP
1220 skb_pull(skb_data, INTF_HEADER_LEN);
1221 mwifiex_handle_rx_packet(adapter, skb_data);
1222
1223 skb_tmp = dev_alloc_skb(MWIFIEX_RX_DATA_BUF_SIZE);
d930faee 1224 if (!skb_tmp) {
e7f767a7
AP
1225 dev_err(adapter->dev,
1226 "Unable to allocate skb.\n");
1227 return -ENOMEM;
d930faee
AK
1228 }
1229
e7f767a7
AP
1230 if (mwifiex_map_pci_memory(adapter, skb_tmp,
1231 MWIFIEX_RX_DATA_BUF_SIZE,
1232 PCI_DMA_FROMDEVICE))
1233 return -1;
1234
1235 MWIFIEX_SKB_PACB(skb_tmp, &buf_pa);
1236
1237 dev_dbg(adapter->dev,
1238 "RECV DATA: Attach new sk_buff %p at rxbd_rdidx=%d\n",
1239 skb_tmp, rd_index);
1240 card->rx_buf_list[rd_index] = skb_tmp;
ca8f2112
AP
1241
1242 if (reg->pfu_enabled) {
1243 desc2 = (void *)card->rxbd_ring[rd_index];
1244 desc2->paddr = buf_pa;
1245 desc2->len = skb_tmp->len;
1246 desc2->frag_len = skb_tmp->len;
1247 desc2->offset = 0;
1248 desc2->flags = reg->ring_flag_sop | reg->ring_flag_eop;
1249 } else {
1250 desc = card->rxbd_ring[rd_index];
1251 desc->paddr = buf_pa;
1252 desc->len = skb_tmp->len;
1253 desc->flags = 0;
1254 }
d930faee 1255
dd04e6ac 1256 if ((++card->rxbd_rdptr & reg->rx_mask) ==
d930faee
AK
1257 MWIFIEX_MAX_TXRX_BD) {
1258 card->rxbd_rdptr = ((card->rxbd_rdptr &
dd04e6ac
AP
1259 reg->rx_rollover_ind) ^
1260 reg->rx_rollover_ind);
d930faee
AK
1261 }
1262 dev_dbg(adapter->dev, "info: RECV DATA: <Rd: %#x, Wr: %#x>\n",
f57c1edc 1263 card->rxbd_rdptr, wrptr);
d930faee 1264
ca8f2112 1265 tx_val = card->txbd_wrptr & reg->tx_wrap_mask;
dd04e6ac
AP
1266 /* Write the RX ring read pointer in to reg->rx_rdptr */
1267 if (mwifiex_write_reg(adapter, reg->rx_rdptr,
ca8f2112 1268 card->rxbd_rdptr | tx_val)) {
f57c1edc 1269 dev_err(adapter->dev,
dd04e6ac 1270 "RECV DATA: failed to write reg->rx_rdptr\n");
d930faee
AK
1271 ret = -1;
1272 goto done;
1273 }
1274
1275 /* Read the RX ring Write pointer set by firmware */
dd04e6ac 1276 if (mwifiex_read_reg(adapter, reg->rx_wrptr, &wrptr)) {
f57c1edc 1277 dev_err(adapter->dev,
dd04e6ac 1278 "RECV DATA: failed to read reg->rx_wrptr\n");
d930faee
AK
1279 ret = -1;
1280 goto done;
1281 }
f57c1edc
YAP
1282 dev_dbg(adapter->dev,
1283 "info: RECV DATA: Rcvd packet from fw successfully\n");
e7f767a7 1284 card->rxbd_wrptr = wrptr;
d930faee
AK
1285 }
1286
1287done:
d930faee
AK
1288 return ret;
1289}
1290
1291/*
1292 * This function downloads the boot command to device
1293 */
1294static int
1295mwifiex_pcie_send_boot_cmd(struct mwifiex_adapter *adapter, struct sk_buff *skb)
1296{
fc331460
AP
1297 dma_addr_t buf_pa;
1298 struct pcie_service_card *card = adapter->card;
dd04e6ac 1299 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee 1300
fc331460 1301 if (!(skb->data && skb->len)) {
f57c1edc 1302 dev_err(adapter->dev,
fc331460
AP
1303 "Invalid parameter in %s <%p. len %d>\n",
1304 __func__, skb->data, skb->len);
d930faee
AK
1305 return -1;
1306 }
1307
fc331460
AP
1308 if (mwifiex_map_pci_memory(adapter, skb, skb->len , PCI_DMA_TODEVICE))
1309 return -1;
1310
1311 MWIFIEX_SKB_PACB(skb, &buf_pa);
1312
dd04e6ac
AP
1313 /* Write the lower 32bits of the physical address to low command
1314 * address scratch register
1315 */
1316 if (mwifiex_write_reg(adapter, reg->cmd_addr_lo, (u32)buf_pa)) {
f57c1edc
YAP
1317 dev_err(adapter->dev,
1318 "%s: failed to write download command to boot code.\n",
1319 __func__);
fc331460
AP
1320 pci_unmap_single(card->dev, buf_pa, MWIFIEX_UPLD_SIZE,
1321 PCI_DMA_TODEVICE);
d930faee
AK
1322 return -1;
1323 }
1324
dd04e6ac
AP
1325 /* Write the upper 32bits of the physical address to high command
1326 * address scratch register
1327 */
1328 if (mwifiex_write_reg(adapter, reg->cmd_addr_hi,
fc331460 1329 (u32)((u64)buf_pa >> 32))) {
f57c1edc
YAP
1330 dev_err(adapter->dev,
1331 "%s: failed to write download command to boot code.\n",
1332 __func__);
fc331460
AP
1333 pci_unmap_single(card->dev, buf_pa, MWIFIEX_UPLD_SIZE,
1334 PCI_DMA_TODEVICE);
d930faee
AK
1335 return -1;
1336 }
1337
dd04e6ac
AP
1338 /* Write the command length to cmd_size scratch register */
1339 if (mwifiex_write_reg(adapter, reg->cmd_size, skb->len)) {
f57c1edc 1340 dev_err(adapter->dev,
dd04e6ac 1341 "%s: failed to write command len to cmd_size scratch reg\n",
f57c1edc 1342 __func__);
fc331460
AP
1343 pci_unmap_single(card->dev, buf_pa, MWIFIEX_UPLD_SIZE,
1344 PCI_DMA_TODEVICE);
d930faee
AK
1345 return -1;
1346 }
1347
1348 /* Ring the door bell */
1349 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
1350 CPU_INTR_DOOR_BELL)) {
f57c1edc
YAP
1351 dev_err(adapter->dev,
1352 "%s: failed to assert door-bell intr\n", __func__);
fc331460
AP
1353 pci_unmap_single(card->dev, buf_pa,
1354 MWIFIEX_UPLD_SIZE, PCI_DMA_TODEVICE);
d930faee
AK
1355 return -1;
1356 }
1357
1358 return 0;
1359}
1360
c6d1d87a
AP
1361/* This function init rx port in firmware which in turn enables to receive data
1362 * from device before transmitting any packet.
1363 */
1364static int mwifiex_pcie_init_fw_port(struct mwifiex_adapter *adapter)
1365{
1366 struct pcie_service_card *card = adapter->card;
dd04e6ac 1367 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
ca8f2112 1368 int tx_wrap = card->txbd_wrptr & reg->tx_wrap_mask;
c6d1d87a 1369
dd04e6ac 1370 /* Write the RX ring read pointer in to reg->rx_rdptr */
ca8f2112
AP
1371 if (mwifiex_write_reg(adapter, reg->rx_rdptr, card->rxbd_rdptr |
1372 tx_wrap)) {
c6d1d87a 1373 dev_err(adapter->dev,
dd04e6ac 1374 "RECV DATA: failed to write reg->rx_rdptr\n");
c6d1d87a
AP
1375 return -1;
1376 }
1377 return 0;
1378}
1379
1380/* This function downloads commands to the device
d930faee
AK
1381 */
1382static int
1383mwifiex_pcie_send_cmd(struct mwifiex_adapter *adapter, struct sk_buff *skb)
1384{
1385 struct pcie_service_card *card = adapter->card;
dd04e6ac 1386 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee 1387 int ret = 0;
fc331460
AP
1388 dma_addr_t cmd_buf_pa, cmdrsp_buf_pa;
1389 u8 *payload = (u8 *)skb->data;
d930faee
AK
1390
1391 if (!(skb->data && skb->len)) {
1392 dev_err(adapter->dev, "Invalid parameter in %s <%p, %#x>\n",
f57c1edc 1393 __func__, skb->data, skb->len);
d930faee
AK
1394 return -1;
1395 }
1396
1397 /* Make sure a command response buffer is available */
1398 if (!card->cmdrsp_buf) {
f57c1edc
YAP
1399 dev_err(adapter->dev,
1400 "No response buffer available, send command failed\n");
d930faee
AK
1401 return -EBUSY;
1402 }
1403
fc331460
AP
1404 if (!mwifiex_pcie_ok_to_access_hw(adapter))
1405 mwifiex_pm_wakeup_card(adapter);
d930faee
AK
1406
1407 adapter->cmd_sent = true;
fc331460
AP
1408
1409 *(__le16 *)&payload[0] = cpu_to_le16((u16)skb->len);
1410 *(__le16 *)&payload[2] = cpu_to_le16(MWIFIEX_TYPE_CMD);
1411
1412 if (mwifiex_map_pci_memory(adapter, skb, skb->len, PCI_DMA_TODEVICE))
1413 return -1;
1414
1415 card->cmd_buf = skb;
d930faee
AK
1416
1417 /* To send a command, the driver will:
1418 1. Write the 64bit physical address of the data buffer to
dd04e6ac 1419 cmd response address low + cmd response address high
d930faee
AK
1420 2. Ring the door bell (i.e. set the door bell interrupt)
1421
1422 In response to door bell interrupt, the firmware will perform
1423 the DMA of the command packet (first header to obtain the total
1424 length and then rest of the command).
1425 */
1426
1427 if (card->cmdrsp_buf) {
fc331460 1428 MWIFIEX_SKB_PACB(card->cmdrsp_buf, &cmdrsp_buf_pa);
d930faee
AK
1429 /* Write the lower 32bits of the cmdrsp buffer physical
1430 address */
dd04e6ac 1431 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_lo,
fc331460 1432 (u32)cmdrsp_buf_pa)) {
f57c1edc
YAP
1433 dev_err(adapter->dev,
1434 "Failed to write download cmd to boot code.\n");
d930faee
AK
1435 ret = -1;
1436 goto done;
1437 }
1438 /* Write the upper 32bits of the cmdrsp buffer physical
1439 address */
dd04e6ac 1440 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_hi,
fc331460 1441 (u32)((u64)cmdrsp_buf_pa >> 32))) {
f57c1edc
YAP
1442 dev_err(adapter->dev,
1443 "Failed to write download cmd to boot code.\n");
d930faee
AK
1444 ret = -1;
1445 goto done;
1446 }
1447 }
1448
fc331460 1449 MWIFIEX_SKB_PACB(card->cmd_buf, &cmd_buf_pa);
dd04e6ac
AP
1450 /* Write the lower 32bits of the physical address to reg->cmd_addr_lo */
1451 if (mwifiex_write_reg(adapter, reg->cmd_addr_lo,
1452 (u32)cmd_buf_pa)) {
f57c1edc
YAP
1453 dev_err(adapter->dev,
1454 "Failed to write download cmd to boot code.\n");
d930faee
AK
1455 ret = -1;
1456 goto done;
1457 }
dd04e6ac
AP
1458 /* Write the upper 32bits of the physical address to reg->cmd_addr_hi */
1459 if (mwifiex_write_reg(adapter, reg->cmd_addr_hi,
fc331460 1460 (u32)((u64)cmd_buf_pa >> 32))) {
f57c1edc
YAP
1461 dev_err(adapter->dev,
1462 "Failed to write download cmd to boot code.\n");
d930faee
AK
1463 ret = -1;
1464 goto done;
1465 }
1466
dd04e6ac
AP
1467 /* Write the command length to reg->cmd_size */
1468 if (mwifiex_write_reg(adapter, reg->cmd_size,
1469 card->cmd_buf->len)) {
f57c1edc 1470 dev_err(adapter->dev,
dd04e6ac 1471 "Failed to write cmd len to reg->cmd_size\n");
d930faee
AK
1472 ret = -1;
1473 goto done;
1474 }
1475
1476 /* Ring the door bell */
1477 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
1478 CPU_INTR_DOOR_BELL)) {
f57c1edc
YAP
1479 dev_err(adapter->dev,
1480 "Failed to assert door-bell intr\n");
d930faee
AK
1481 ret = -1;
1482 goto done;
1483 }
1484
1485done:
1486 if (ret)
1487 adapter->cmd_sent = false;
1488
1489 return 0;
1490}
1491
1492/*
1493 * This function handles command complete interrupt
1494 */
1495static int mwifiex_pcie_process_cmd_complete(struct mwifiex_adapter *adapter)
1496{
1497 struct pcie_service_card *card = adapter->card;
dd04e6ac 1498 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
f57c1edc 1499 struct sk_buff *skb = card->cmdrsp_buf;
d930faee 1500 int count = 0;
fc331460
AP
1501 u16 rx_len;
1502 __le16 pkt_len;
1503 dma_addr_t buf_pa;
d930faee
AK
1504
1505 dev_dbg(adapter->dev, "info: Rx CMD Response\n");
1506
fc331460
AP
1507 MWIFIEX_SKB_PACB(skb, &buf_pa);
1508 pci_unmap_single(card->dev, buf_pa, MWIFIEX_UPLD_SIZE,
1509 PCI_DMA_FROMDEVICE);
1510
1511 pkt_len = *((__le16 *)skb->data);
1512 rx_len = le16_to_cpu(pkt_len);
1513 skb_trim(skb, rx_len);
1514 skb_pull(skb, INTF_HEADER_LEN);
1515
d930faee 1516 if (!adapter->curr_cmd) {
d930faee 1517 if (adapter->ps_state == PS_STATE_SLEEP_CFM) {
f57c1edc
YAP
1518 mwifiex_process_sleep_confirm_resp(adapter, skb->data,
1519 skb->len);
52301a81
AP
1520 while (reg->sleep_cookie && (count++ < 10) &&
1521 mwifiex_pcie_ok_to_access_hw(adapter))
e7891ba2 1522 usleep_range(50, 60);
d930faee 1523 } else {
f57c1edc
YAP
1524 dev_err(adapter->dev,
1525 "There is no command but got cmdrsp\n");
d930faee 1526 }
f57c1edc
YAP
1527 memcpy(adapter->upld_buf, skb->data,
1528 min_t(u32, MWIFIEX_SIZE_OF_CMD_BUFFER, skb->len));
0f49d64c 1529 skb_push(skb, INTF_HEADER_LEN);
fc331460
AP
1530 if (mwifiex_map_pci_memory(adapter, skb, MWIFIEX_UPLD_SIZE,
1531 PCI_DMA_FROMDEVICE))
1532 return -1;
1533
1534 MWIFIEX_SKB_PACB(skb, &buf_pa);
d930faee 1535 } else if (mwifiex_pcie_ok_to_access_hw(adapter)) {
f57c1edc 1536 adapter->curr_cmd->resp_skb = skb;
d930faee
AK
1537 adapter->cmd_resp_received = true;
1538 /* Take the pointer and set it to CMD node and will
1539 return in the response complete callback */
1540 card->cmdrsp_buf = NULL;
1541
1542 /* Clear the cmd-rsp buffer address in scratch registers. This
1543 will prevent firmware from writing to the same response
1544 buffer again. */
dd04e6ac 1545 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_lo, 0)) {
f57c1edc
YAP
1546 dev_err(adapter->dev,
1547 "cmd_done: failed to clear cmd_rsp_addr_lo\n");
d930faee
AK
1548 return -1;
1549 }
1550 /* Write the upper 32bits of the cmdrsp buffer physical
1551 address */
dd04e6ac 1552 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_hi, 0)) {
f57c1edc
YAP
1553 dev_err(adapter->dev,
1554 "cmd_done: failed to clear cmd_rsp_addr_hi\n");
d930faee
AK
1555 return -1;
1556 }
1557 }
1558
1559 return 0;
1560}
1561
1562/*
1563 * Command Response processing complete handler
1564 */
1565static int mwifiex_pcie_cmdrsp_complete(struct mwifiex_adapter *adapter,
1566 struct sk_buff *skb)
1567{
1568 struct pcie_service_card *card = adapter->card;
fc331460
AP
1569 dma_addr_t buf_pa;
1570 struct sk_buff *skb_tmp;
d930faee
AK
1571
1572 if (skb) {
1573 card->cmdrsp_buf = skb;
1574 skb_push(card->cmdrsp_buf, INTF_HEADER_LEN);
fc331460
AP
1575 if (mwifiex_map_pci_memory(adapter, skb, MWIFIEX_UPLD_SIZE,
1576 PCI_DMA_FROMDEVICE))
1577 return -1;
1578 }
1579
1580 skb_tmp = card->cmd_buf;
1581 if (skb_tmp) {
1582 MWIFIEX_SKB_PACB(skb_tmp, &buf_pa);
7af1ce0e 1583 pci_unmap_single(card->dev, buf_pa, skb_tmp->len,
fc331460
AP
1584 PCI_DMA_FROMDEVICE);
1585 card->cmd_buf = NULL;
d930faee
AK
1586 }
1587
1588 return 0;
1589}
1590
1591/*
1592 * This function handles firmware event ready interrupt
1593 */
1594static int mwifiex_pcie_process_event_ready(struct mwifiex_adapter *adapter)
1595{
1596 struct pcie_service_card *card = adapter->card;
dd04e6ac 1597 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee
AK
1598 u32 rdptr = card->evtbd_rdptr & MWIFIEX_EVTBD_MASK;
1599 u32 wrptr, event;
fc331460 1600 dma_addr_t buf_pa;
e05dc3e9 1601 struct mwifiex_evt_buf_desc *desc;
fc331460
AP
1602
1603 if (!mwifiex_pcie_ok_to_access_hw(adapter))
1604 mwifiex_pm_wakeup_card(adapter);
d930faee
AK
1605
1606 if (adapter->event_received) {
f57c1edc
YAP
1607 dev_dbg(adapter->dev, "info: Event being processed, "
1608 "do not process this interrupt just yet\n");
d930faee
AK
1609 return 0;
1610 }
1611
1612 if (rdptr >= MWIFIEX_MAX_EVT_BD) {
1613 dev_dbg(adapter->dev, "info: Invalid read pointer...\n");
1614 return -1;
1615 }
1616
1617 /* Read the event ring write pointer set by firmware */
dd04e6ac 1618 if (mwifiex_read_reg(adapter, reg->evt_wrptr, &wrptr)) {
f57c1edc 1619 dev_err(adapter->dev,
dd04e6ac 1620 "EventReady: failed to read reg->evt_wrptr\n");
d930faee
AK
1621 return -1;
1622 }
1623
1624 dev_dbg(adapter->dev, "info: EventReady: Initial <Rd: 0x%x, Wr: 0x%x>",
f57c1edc
YAP
1625 card->evtbd_rdptr, wrptr);
1626 if (((wrptr & MWIFIEX_EVTBD_MASK) != (card->evtbd_rdptr
1627 & MWIFIEX_EVTBD_MASK)) ||
dd04e6ac
AP
1628 ((wrptr & reg->evt_rollover_ind) ==
1629 (card->evtbd_rdptr & reg->evt_rollover_ind))) {
d930faee
AK
1630 struct sk_buff *skb_cmd;
1631 __le16 data_len = 0;
1632 u16 evt_len;
1633
1634 dev_dbg(adapter->dev, "info: Read Index: %d\n", rdptr);
1635 skb_cmd = card->evt_buf_list[rdptr];
fc331460
AP
1636 MWIFIEX_SKB_PACB(skb_cmd, &buf_pa);
1637 pci_unmap_single(card->dev, buf_pa, MAX_EVENT_SIZE,
1638 PCI_DMA_FROMDEVICE);
1639
d930faee
AK
1640 /* Take the pointer and set it to event pointer in adapter
1641 and will return back after event handling callback */
1642 card->evt_buf_list[rdptr] = NULL;
e05dc3e9
AP
1643 desc = card->evtbd_ring[rdptr];
1644 memset(desc, 0, sizeof(*desc));
d930faee
AK
1645
1646 event = *(u32 *) &skb_cmd->data[INTF_HEADER_LEN];
1647 adapter->event_cause = event;
1648 /* The first 4bytes will be the event transfer header
1649 len is 2 bytes followed by type which is 2 bytes */
1650 memcpy(&data_len, skb_cmd->data, sizeof(__le16));
1651 evt_len = le16_to_cpu(data_len);
1652
1653 skb_pull(skb_cmd, INTF_HEADER_LEN);
1654 dev_dbg(adapter->dev, "info: Event length: %d\n", evt_len);
1655
1656 if ((evt_len > 0) && (evt_len < MAX_EVENT_SIZE))
1657 memcpy(adapter->event_body, skb_cmd->data +
1658 MWIFIEX_EVENT_HEADER_LEN, evt_len -
1659 MWIFIEX_EVENT_HEADER_LEN);
1660
1661 adapter->event_received = true;
1662 adapter->event_skb = skb_cmd;
1663
1664 /* Do not update the event read pointer here, wait till the
1665 buffer is released. This is just to make things simpler,
1666 we need to find a better method of managing these buffers.
1667 */
1668 }
1669
1670 return 0;
1671}
1672
1673/*
1674 * Event processing complete handler
1675 */
1676static int mwifiex_pcie_event_complete(struct mwifiex_adapter *adapter,
1677 struct sk_buff *skb)
1678{
1679 struct pcie_service_card *card = adapter->card;
dd04e6ac 1680 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee
AK
1681 int ret = 0;
1682 u32 rdptr = card->evtbd_rdptr & MWIFIEX_EVTBD_MASK;
1683 u32 wrptr;
fc331460 1684 dma_addr_t buf_pa;
e05dc3e9 1685 struct mwifiex_evt_buf_desc *desc;
d930faee
AK
1686
1687 if (!skb)
1688 return 0;
1689
1eb54c8a 1690 if (rdptr >= MWIFIEX_MAX_EVT_BD) {
d930faee 1691 dev_err(adapter->dev, "event_complete: Invalid rdptr 0x%x\n",
f57c1edc 1692 rdptr);
8c53e42d 1693 return -EINVAL;
1eb54c8a 1694 }
d930faee
AK
1695
1696 /* Read the event ring write pointer set by firmware */
dd04e6ac 1697 if (mwifiex_read_reg(adapter, reg->evt_wrptr, &wrptr)) {
f57c1edc 1698 dev_err(adapter->dev,
dd04e6ac 1699 "event_complete: failed to read reg->evt_wrptr\n");
8c53e42d 1700 return -1;
d930faee
AK
1701 }
1702
1703 if (!card->evt_buf_list[rdptr]) {
1704 skb_push(skb, INTF_HEADER_LEN);
fc331460
AP
1705 if (mwifiex_map_pci_memory(adapter, skb,
1706 MAX_EVENT_SIZE,
1707 PCI_DMA_FROMDEVICE))
1708 return -1;
1709 MWIFIEX_SKB_PACB(skb, &buf_pa);
d930faee 1710 card->evt_buf_list[rdptr] = skb;
fc331460 1711 MWIFIEX_SKB_PACB(skb, &buf_pa);
e05dc3e9
AP
1712 desc = card->evtbd_ring[rdptr];
1713 desc->paddr = buf_pa;
1714 desc->len = (u16)skb->len;
1715 desc->flags = 0;
d930faee
AK
1716 skb = NULL;
1717 } else {
f57c1edc
YAP
1718 dev_dbg(adapter->dev,
1719 "info: ERROR: buf still valid at index %d, <%p, %p>\n",
1720 rdptr, card->evt_buf_list[rdptr], skb);
d930faee
AK
1721 }
1722
1723 if ((++card->evtbd_rdptr & MWIFIEX_EVTBD_MASK) == MWIFIEX_MAX_EVT_BD) {
1724 card->evtbd_rdptr = ((card->evtbd_rdptr &
dd04e6ac
AP
1725 reg->evt_rollover_ind) ^
1726 reg->evt_rollover_ind);
d930faee
AK
1727 }
1728
1729 dev_dbg(adapter->dev, "info: Updated <Rd: 0x%x, Wr: 0x%x>",
f57c1edc 1730 card->evtbd_rdptr, wrptr);
d930faee 1731
dd04e6ac
AP
1732 /* Write the event ring read pointer in to reg->evt_rdptr */
1733 if (mwifiex_write_reg(adapter, reg->evt_rdptr,
1734 card->evtbd_rdptr)) {
f57c1edc 1735 dev_err(adapter->dev,
dd04e6ac 1736 "event_complete: failed to read reg->evt_rdptr\n");
8c53e42d 1737 return -1;
d930faee
AK
1738 }
1739
d930faee
AK
1740 dev_dbg(adapter->dev, "info: Check Events Again\n");
1741 ret = mwifiex_pcie_process_event_ready(adapter);
1742
1743 return ret;
1744}
1745
1746/*
1747 * This function downloads the firmware to the card.
1748 *
1749 * Firmware is downloaded to the card in blocks. Every block download
1750 * is tested for CRC errors, and retried a number of times before
1751 * returning failure.
1752 */
1753static int mwifiex_prog_fw_w_helper(struct mwifiex_adapter *adapter,
1754 struct mwifiex_fw_image *fw)
1755{
1756 int ret;
1757 u8 *firmware = fw->fw_buf;
1758 u32 firmware_len = fw->fw_len;
1759 u32 offset = 0;
1760 struct sk_buff *skb;
1761 u32 txlen, tx_blocks = 0, tries, len;
1762 u32 block_retry_cnt = 0;
fc331460
AP
1763 dma_addr_t buf_pa;
1764 struct pcie_service_card *card = adapter->card;
dd04e6ac 1765 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee
AK
1766
1767 if (!firmware || !firmware_len) {
f57c1edc
YAP
1768 dev_err(adapter->dev,
1769 "No firmware image found! Terminating download\n");
d930faee
AK
1770 return -1;
1771 }
1772
1773 dev_dbg(adapter->dev, "info: Downloading FW image (%d bytes)\n",
f57c1edc 1774 firmware_len);
d930faee
AK
1775
1776 if (mwifiex_pcie_disable_host_int(adapter)) {
f57c1edc
YAP
1777 dev_err(adapter->dev,
1778 "%s: Disabling interrupts failed.\n", __func__);
d930faee
AK
1779 return -1;
1780 }
1781
1782 skb = dev_alloc_skb(MWIFIEX_UPLD_SIZE);
1783 if (!skb) {
1784 ret = -ENOMEM;
1785 goto done;
1786 }
d930faee
AK
1787
1788 /* Perform firmware data transfer */
1789 do {
1790 u32 ireg_intr = 0;
1791
1792 /* More data? */
1793 if (offset >= firmware_len)
1794 break;
1795
1796 for (tries = 0; tries < MAX_POLL_TRIES; tries++) {
dd04e6ac 1797 ret = mwifiex_read_reg(adapter, reg->cmd_size,
d930faee
AK
1798 &len);
1799 if (ret) {
f57c1edc
YAP
1800 dev_warn(adapter->dev,
1801 "Failed reading len from boot code\n");
d930faee
AK
1802 goto done;
1803 }
1804 if (len)
1805 break;
e7891ba2 1806 usleep_range(10, 20);
d930faee
AK
1807 }
1808
1809 if (!len) {
1810 break;
1811 } else if (len > MWIFIEX_UPLD_SIZE) {
1812 pr_err("FW download failure @ %d, invalid length %d\n",
f57c1edc 1813 offset, len);
d930faee
AK
1814 ret = -1;
1815 goto done;
1816 }
1817
1818 txlen = len;
1819
1820 if (len & BIT(0)) {
1821 block_retry_cnt++;
1822 if (block_retry_cnt > MAX_WRITE_IOMEM_RETRY) {
1823 pr_err("FW download failure @ %d, over max "
1824 "retry count\n", offset);
1825 ret = -1;
1826 goto done;
1827 }
1828 dev_err(adapter->dev, "FW CRC error indicated by the "
f57c1edc
YAP
1829 "helper: len = 0x%04X, txlen = %d\n",
1830 len, txlen);
d930faee
AK
1831 len &= ~BIT(0);
1832 /* Setting this to 0 to resend from same offset */
1833 txlen = 0;
1834 } else {
1835 block_retry_cnt = 0;
1836 /* Set blocksize to transfer - checking for
1837 last block */
1838 if (firmware_len - offset < txlen)
1839 txlen = firmware_len - offset;
1840
1841 dev_dbg(adapter->dev, ".");
1842
dd04e6ac
AP
1843 tx_blocks = (txlen + card->pcie.blksz_fw_dl - 1) /
1844 card->pcie.blksz_fw_dl;
d930faee
AK
1845
1846 /* Copy payload to buffer */
1847 memmove(skb->data, &firmware[offset], txlen);
1848 }
1849
1850 skb_put(skb, MWIFIEX_UPLD_SIZE - skb->len);
dd04e6ac 1851 skb_trim(skb, tx_blocks * card->pcie.blksz_fw_dl);
d930faee
AK
1852
1853 /* Send the boot command to device */
1854 if (mwifiex_pcie_send_boot_cmd(adapter, skb)) {
f57c1edc
YAP
1855 dev_err(adapter->dev,
1856 "Failed to send firmware download command\n");
d930faee
AK
1857 ret = -1;
1858 goto done;
1859 }
fc331460
AP
1860
1861 MWIFIEX_SKB_PACB(skb, &buf_pa);
1862
d930faee
AK
1863 /* Wait for the command done interrupt */
1864 do {
1865 if (mwifiex_read_reg(adapter, PCIE_CPU_INT_STATUS,
1866 &ireg_intr)) {
1867 dev_err(adapter->dev, "%s: Failed to read "
f57c1edc
YAP
1868 "interrupt status during fw dnld.\n",
1869 __func__);
fc331460
AP
1870 pci_unmap_single(card->dev, buf_pa, skb->len,
1871 PCI_DMA_TODEVICE);
d930faee
AK
1872 ret = -1;
1873 goto done;
1874 }
1875 } while ((ireg_intr & CPU_INTR_DOOR_BELL) ==
1876 CPU_INTR_DOOR_BELL);
fc331460
AP
1877
1878 pci_unmap_single(card->dev, buf_pa, skb->len,
1879 PCI_DMA_TODEVICE);
1880
d930faee
AK
1881 offset += txlen;
1882 } while (true);
1883
1884 dev_dbg(adapter->dev, "info:\nFW download over, size %d bytes\n",
f57c1edc 1885 offset);
d930faee
AK
1886
1887 ret = 0;
1888
1889done:
1890 dev_kfree_skb_any(skb);
1891 return ret;
1892}
1893
1894/*
1895 * This function checks the firmware status in card.
1896 *
1897 * The winner interface is also determined by this function.
1898 */
1899static int
1900mwifiex_check_fw_status(struct mwifiex_adapter *adapter, u32 poll_num)
1901{
1902 int ret = 0;
1903 u32 firmware_stat, winner_status;
dd04e6ac
AP
1904 struct pcie_service_card *card = adapter->card;
1905 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee
AK
1906 u32 tries;
1907
1908 /* Mask spurios interrupts */
1909 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_STATUS_MASK,
f57c1edc 1910 HOST_INTR_MASK)) {
d930faee
AK
1911 dev_warn(adapter->dev, "Write register failed\n");
1912 return -1;
1913 }
1914
1915 dev_dbg(adapter->dev, "Setting driver ready signature\n");
dd04e6ac
AP
1916 if (mwifiex_write_reg(adapter, reg->drv_rdy,
1917 FIRMWARE_READY_PCIE)) {
f57c1edc
YAP
1918 dev_err(adapter->dev,
1919 "Failed to write driver ready signature\n");
d930faee
AK
1920 return -1;
1921 }
1922
1923 /* Wait for firmware initialization event */
1924 for (tries = 0; tries < poll_num; tries++) {
dd04e6ac 1925 if (mwifiex_read_reg(adapter, reg->fw_status,
d930faee
AK
1926 &firmware_stat))
1927 ret = -1;
1928 else
1929 ret = 0;
1930 if (ret)
1931 continue;
1932 if (firmware_stat == FIRMWARE_READY_PCIE) {
1933 ret = 0;
1934 break;
1935 } else {
1936 mdelay(100);
1937 ret = -1;
1938 }
1939 }
1940
1941 if (ret) {
dd04e6ac 1942 if (mwifiex_read_reg(adapter, reg->fw_status,
d930faee
AK
1943 &winner_status))
1944 ret = -1;
1945 else if (!winner_status) {
1946 dev_err(adapter->dev, "PCI-E is the winner\n");
1947 adapter->winner = 1;
1948 ret = -1;
1949 } else {
f57c1edc
YAP
1950 dev_err(adapter->dev,
1951 "PCI-E is not the winner <%#x,%d>, exit dnld\n",
1952 ret, adapter->winner);
d930faee
AK
1953 ret = 0;
1954 }
1955 }
1956
1957 return ret;
1958}
1959
1960/*
1961 * This function reads the interrupt status from card.
1962 */
1963static void mwifiex_interrupt_status(struct mwifiex_adapter *adapter)
1964{
1965 u32 pcie_ireg;
1966 unsigned long flags;
1967
1968 if (!mwifiex_pcie_ok_to_access_hw(adapter))
1969 return;
1970
1971 if (mwifiex_read_reg(adapter, PCIE_HOST_INT_STATUS, &pcie_ireg)) {
1972 dev_warn(adapter->dev, "Read register failed\n");
1973 return;
1974 }
1975
1976 if ((pcie_ireg != 0xFFFFFFFF) && (pcie_ireg)) {
1977
1978 mwifiex_pcie_disable_host_int(adapter);
1979
1980 /* Clear the pending interrupts */
1981 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_STATUS,
1982 ~pcie_ireg)) {
1983 dev_warn(adapter->dev, "Write register failed\n");
1984 return;
1985 }
1986 spin_lock_irqsave(&adapter->int_lock, flags);
1987 adapter->int_status |= pcie_ireg;
1988 spin_unlock_irqrestore(&adapter->int_lock, flags);
1989
1990 if (pcie_ireg & HOST_INTR_CMD_DONE) {
1991 if ((adapter->ps_state == PS_STATE_SLEEP_CFM) ||
1992 (adapter->ps_state == PS_STATE_SLEEP)) {
1993 mwifiex_pcie_enable_host_int(adapter);
1994 if (mwifiex_write_reg(adapter,
f57c1edc
YAP
1995 PCIE_CPU_INT_EVENT,
1996 CPU_INTR_SLEEP_CFM_DONE)
1997 ) {
1998 dev_warn(adapter->dev,
1999 "Write register failed\n");
d930faee
AK
2000 return;
2001
2002 }
2003 }
2004 } else if (!adapter->pps_uapsd_mode &&
c24d992a
AP
2005 adapter->ps_state == PS_STATE_SLEEP &&
2006 mwifiex_pcie_ok_to_access_hw(adapter)) {
d930faee
AK
2007 /* Potentially for PCIe we could get other
2008 * interrupts like shared. Don't change power
2009 * state until cookie is set */
c24d992a
AP
2010 adapter->ps_state = PS_STATE_AWAKE;
2011 adapter->pm_wakeup_fw_try = false;
d930faee
AK
2012 }
2013 }
2014}
2015
2016/*
2017 * Interrupt handler for PCIe root port
2018 *
2019 * This function reads the interrupt status from firmware and assigns
2020 * the main process in workqueue which will handle the interrupt.
2021 */
2022static irqreturn_t mwifiex_pcie_interrupt(int irq, void *context)
2023{
2024 struct pci_dev *pdev = (struct pci_dev *)context;
2025 struct pcie_service_card *card;
2026 struct mwifiex_adapter *adapter;
2027
2028 if (!pdev) {
2029 pr_debug("info: %s: pdev is NULL\n", (u8 *)pdev);
2030 goto exit;
2031 }
2032
2033 card = (struct pcie_service_card *) pci_get_drvdata(pdev);
2034 if (!card || !card->adapter) {
2035 pr_debug("info: %s: card=%p adapter=%p\n", __func__, card,
f57c1edc 2036 card ? card->adapter : NULL);
d930faee
AK
2037 goto exit;
2038 }
2039 adapter = card->adapter;
2040
2041 if (adapter->surprise_removed)
2042 goto exit;
2043
2044 mwifiex_interrupt_status(adapter);
2045 queue_work(adapter->workqueue, &adapter->main_work);
2046
2047exit:
2048 return IRQ_HANDLED;
2049}
2050
2051/*
2052 * This function checks the current interrupt status.
2053 *
2054 * The following interrupts are checked and handled by this function -
2055 * - Data sent
2056 * - Command sent
2057 * - Command received
2058 * - Packets received
2059 * - Events received
2060 *
2061 * In case of Rx packets received, the packets are uploaded from card to
2062 * host and processed accordingly.
2063 */
2064static int mwifiex_process_int_status(struct mwifiex_adapter *adapter)
2065{
2066 int ret;
659c4788 2067 u32 pcie_ireg;
d930faee
AK
2068 unsigned long flags;
2069
2070 spin_lock_irqsave(&adapter->int_lock, flags);
2071 /* Clear out unused interrupts */
659c4788
AP
2072 pcie_ireg = adapter->int_status;
2073 adapter->int_status = 0;
d930faee
AK
2074 spin_unlock_irqrestore(&adapter->int_lock, flags);
2075
659c4788
AP
2076 while (pcie_ireg & HOST_INTR_MASK) {
2077 if (pcie_ireg & HOST_INTR_DNLD_DONE) {
2078 pcie_ireg &= ~HOST_INTR_DNLD_DONE;
e7f767a7
AP
2079 dev_dbg(adapter->dev, "info: TX DNLD Done\n");
2080 ret = mwifiex_pcie_send_data_complete(adapter);
2081 if (ret)
2082 return ret;
d930faee 2083 }
659c4788
AP
2084 if (pcie_ireg & HOST_INTR_UPLD_RDY) {
2085 pcie_ireg &= ~HOST_INTR_UPLD_RDY;
d930faee
AK
2086 dev_dbg(adapter->dev, "info: Rx DATA\n");
2087 ret = mwifiex_pcie_process_recv_data(adapter);
2088 if (ret)
2089 return ret;
2090 }
659c4788
AP
2091 if (pcie_ireg & HOST_INTR_EVENT_RDY) {
2092 pcie_ireg &= ~HOST_INTR_EVENT_RDY;
d930faee
AK
2093 dev_dbg(adapter->dev, "info: Rx EVENT\n");
2094 ret = mwifiex_pcie_process_event_ready(adapter);
2095 if (ret)
2096 return ret;
2097 }
2098
659c4788
AP
2099 if (pcie_ireg & HOST_INTR_CMD_DONE) {
2100 pcie_ireg &= ~HOST_INTR_CMD_DONE;
d930faee 2101 if (adapter->cmd_sent) {
f57c1edc
YAP
2102 dev_dbg(adapter->dev,
2103 "info: CMD sent Interrupt\n");
d930faee
AK
2104 adapter->cmd_sent = false;
2105 }
2106 /* Handle command response */
2107 ret = mwifiex_pcie_process_cmd_complete(adapter);
2108 if (ret)
2109 return ret;
2110 }
2111
2112 if (mwifiex_pcie_ok_to_access_hw(adapter)) {
2113 if (mwifiex_read_reg(adapter, PCIE_HOST_INT_STATUS,
2114 &pcie_ireg)) {
f57c1edc
YAP
2115 dev_warn(adapter->dev,
2116 "Read register failed\n");
d930faee
AK
2117 return -1;
2118 }
2119
2120 if ((pcie_ireg != 0xFFFFFFFF) && (pcie_ireg)) {
2121 if (mwifiex_write_reg(adapter,
f57c1edc
YAP
2122 PCIE_HOST_INT_STATUS,
2123 ~pcie_ireg)) {
2124 dev_warn(adapter->dev,
2125 "Write register failed\n");
d930faee
AK
2126 return -1;
2127 }
d930faee
AK
2128 }
2129
2130 }
2131 }
2132 dev_dbg(adapter->dev, "info: cmd_sent=%d data_sent=%d\n",
f57c1edc 2133 adapter->cmd_sent, adapter->data_sent);
b2fda1f6
AP
2134 if (adapter->ps_state != PS_STATE_SLEEP)
2135 mwifiex_pcie_enable_host_int(adapter);
d930faee
AK
2136
2137 return 0;
2138}
2139
2140/*
2141 * This function downloads data from driver to card.
2142 *
2143 * Both commands and data packets are transferred to the card by this
2144 * function.
2145 *
2146 * This function adds the PCIE specific header to the front of the buffer
2147 * before transferring. The header contains the length of the packet and
2148 * the type. The firmware handles the packets based upon this set type.
2149 */
2150static int mwifiex_pcie_host_to_card(struct mwifiex_adapter *adapter, u8 type,
2151 struct sk_buff *skb,
2152 struct mwifiex_tx_param *tx_param)
2153{
fa161cb7
DC
2154 if (!skb) {
2155 dev_err(adapter->dev, "Passed NULL skb to %s\n", __func__);
d930faee
AK
2156 return -1;
2157 }
2158
2159 if (type == MWIFIEX_TYPE_DATA)
e7f767a7 2160 return mwifiex_pcie_send_data(adapter, skb, tx_param);
d930faee
AK
2161 else if (type == MWIFIEX_TYPE_CMD)
2162 return mwifiex_pcie_send_cmd(adapter, skb);
2163
2164 return 0;
2165}
2166
2167/*
2168 * This function initializes the PCI-E host memory space, WCB rings, etc.
2169 *
2170 * The following initializations steps are followed -
2171 * - Allocate TXBD ring buffers
2172 * - Allocate RXBD ring buffers
2173 * - Allocate event BD ring buffers
2174 * - Allocate command response ring buffer
2175 * - Allocate sleep cookie buffer
2176 */
2177static int mwifiex_pcie_init(struct mwifiex_adapter *adapter)
2178{
2179 struct pcie_service_card *card = adapter->card;
2180 int ret;
2181 struct pci_dev *pdev = card->dev;
52301a81 2182 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee
AK
2183
2184 pci_set_drvdata(pdev, card);
2185
2186 ret = pci_enable_device(pdev);
2187 if (ret)
2188 goto err_enable_dev;
2189
2190 pci_set_master(pdev);
2191
2192 dev_dbg(adapter->dev, "try set_consistent_dma_mask(32)\n");
2193 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
2194 if (ret) {
2195 dev_err(adapter->dev, "set_dma_mask(32) failed\n");
2196 goto err_set_dma_mask;
2197 }
2198
2199 ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
2200 if (ret) {
2201 dev_err(adapter->dev, "set_consistent_dma_mask(64) failed\n");
2202 goto err_set_dma_mask;
2203 }
2204
2205 ret = pci_request_region(pdev, 0, DRV_NAME);
2206 if (ret) {
2207 dev_err(adapter->dev, "req_reg(0) error\n");
2208 goto err_req_region0;
2209 }
2210 card->pci_mmap = pci_iomap(pdev, 0, 0);
2211 if (!card->pci_mmap) {
2212 dev_err(adapter->dev, "iomap(0) error\n");
3220712d 2213 ret = -EIO;
d930faee
AK
2214 goto err_iomap0;
2215 }
2216 ret = pci_request_region(pdev, 2, DRV_NAME);
2217 if (ret) {
2218 dev_err(adapter->dev, "req_reg(2) error\n");
2219 goto err_req_region2;
2220 }
2221 card->pci_mmap1 = pci_iomap(pdev, 2, 0);
2222 if (!card->pci_mmap1) {
2223 dev_err(adapter->dev, "iomap(2) error\n");
3220712d 2224 ret = -EIO;
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2225 goto err_iomap2;
2226 }
2227
f57c1edc
YAP
2228 dev_dbg(adapter->dev,
2229 "PCI memory map Virt0: %p PCI memory map Virt2: %p\n",
2230 card->pci_mmap, card->pci_mmap1);
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2231
2232 card->cmdrsp_buf = NULL;
2233 ret = mwifiex_pcie_create_txbd_ring(adapter);
2234 if (ret)
2235 goto err_cre_txbd;
2236 ret = mwifiex_pcie_create_rxbd_ring(adapter);
2237 if (ret)
2238 goto err_cre_rxbd;
2239 ret = mwifiex_pcie_create_evtbd_ring(adapter);
2240 if (ret)
2241 goto err_cre_evtbd;
2242 ret = mwifiex_pcie_alloc_cmdrsp_buf(adapter);
2243 if (ret)
2244 goto err_alloc_cmdbuf;
52301a81
AP
2245 if (reg->sleep_cookie) {
2246 ret = mwifiex_pcie_alloc_sleep_cookie_buf(adapter);
2247 if (ret)
2248 goto err_alloc_cookie;
2249 } else {
2250 card->sleep_cookie_vbase = NULL;
2251 }
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2252 return ret;
2253
2254err_alloc_cookie:
2255 mwifiex_pcie_delete_cmdrsp_buf(adapter);
2256err_alloc_cmdbuf:
2257 mwifiex_pcie_delete_evtbd_ring(adapter);
2258err_cre_evtbd:
2259 mwifiex_pcie_delete_rxbd_ring(adapter);
2260err_cre_rxbd:
2261 mwifiex_pcie_delete_txbd_ring(adapter);
2262err_cre_txbd:
2263 pci_iounmap(pdev, card->pci_mmap1);
2264err_iomap2:
2265 pci_release_region(pdev, 2);
2266err_req_region2:
2267 pci_iounmap(pdev, card->pci_mmap);
2268err_iomap0:
2269 pci_release_region(pdev, 0);
2270err_req_region0:
2271err_set_dma_mask:
2272 pci_disable_device(pdev);
2273err_enable_dev:
2274 pci_set_drvdata(pdev, NULL);
2275 return ret;
2276}
2277
2278/*
2279 * This function cleans up the allocated card buffers.
2280 *
2281 * The following are freed by this function -
2282 * - TXBD ring buffers
2283 * - RXBD ring buffers
2284 * - Event BD ring buffers
2285 * - Command response ring buffer
2286 * - Sleep cookie buffer
2287 */
2288static void mwifiex_pcie_cleanup(struct mwifiex_adapter *adapter)
2289{
2290 struct pcie_service_card *card = adapter->card;
2291 struct pci_dev *pdev = card->dev;
dd04e6ac 2292 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee 2293
d930faee 2294 if (user_rmmod) {
fc331460 2295 dev_dbg(adapter->dev, "Clearing driver ready signature\n");
dd04e6ac 2296 if (mwifiex_write_reg(adapter, reg->drv_rdy, 0x00000000))
f57c1edc
YAP
2297 dev_err(adapter->dev,
2298 "Failed to write driver not-ready signature\n");
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2299 }
2300
2301 if (pdev) {
2302 pci_iounmap(pdev, card->pci_mmap);
2303 pci_iounmap(pdev, card->pci_mmap1);
5b0d9b21 2304 pci_disable_device(pdev);
c380aafb
YAP
2305 pci_release_region(pdev, 2);
2306 pci_release_region(pdev, 0);
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2307 pci_set_drvdata(pdev, NULL);
2308 }
2309}
2310
2311/*
2312 * This function registers the PCIE device.
2313 *
2314 * PCIE IRQ is claimed, block size is set and driver data is initialized.
2315 */
2316static int mwifiex_register_dev(struct mwifiex_adapter *adapter)
2317{
2318 int ret;
2319 struct pcie_service_card *card = adapter->card;
2320 struct pci_dev *pdev = card->dev;
2321
2322 /* save adapter pointer in card */
2323 card->adapter = adapter;
2324
2325 ret = request_irq(pdev->irq, mwifiex_pcie_interrupt, IRQF_SHARED,
2326 "MRVL_PCIE", pdev);
2327 if (ret) {
2328 pr_err("request_irq failed: ret=%d\n", ret);
2329 adapter->card = NULL;
2330 return -1;
2331 }
2332
2333 adapter->dev = &pdev->dev;
dd04e6ac 2334 strcpy(adapter->fw_name, card->pcie.firmware);
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2335
2336 return 0;
2337}
2338
2339/*
2340 * This function unregisters the PCIE device.
2341 *
2342 * The PCIE IRQ is released, the function is disabled and driver
2343 * data is set to null.
2344 */
2345static void mwifiex_unregister_dev(struct mwifiex_adapter *adapter)
2346{
2347 struct pcie_service_card *card = adapter->card;
52301a81 2348 const struct mwifiex_pcie_card_reg *reg;
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2349
2350 if (card) {
2351 dev_dbg(adapter->dev, "%s(): calling free_irq()\n", __func__);
2352 free_irq(card->dev->irq, card->dev);
fc331460 2353
52301a81
AP
2354 reg = card->pcie.reg;
2355 if (reg->sleep_cookie)
2356 mwifiex_pcie_delete_sleep_cookie_buf(adapter);
2357
fc331460
AP
2358 mwifiex_pcie_delete_cmdrsp_buf(adapter);
2359 mwifiex_pcie_delete_evtbd_ring(adapter);
2360 mwifiex_pcie_delete_rxbd_ring(adapter);
2361 mwifiex_pcie_delete_txbd_ring(adapter);
2362 card->cmdrsp_buf = NULL;
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2363 }
2364}
2365
2366static struct mwifiex_if_ops pcie_ops = {
2367 .init_if = mwifiex_pcie_init,
2368 .cleanup_if = mwifiex_pcie_cleanup,
2369 .check_fw_status = mwifiex_check_fw_status,
2370 .prog_fw = mwifiex_prog_fw_w_helper,
2371 .register_dev = mwifiex_register_dev,
2372 .unregister_dev = mwifiex_unregister_dev,
2373 .enable_int = mwifiex_pcie_enable_host_int,
2374 .process_int_status = mwifiex_process_int_status,
2375 .host_to_card = mwifiex_pcie_host_to_card,
2376 .wakeup = mwifiex_pm_wakeup_card,
2377 .wakeup_complete = mwifiex_pm_wakeup_card_complete,
2378
2379 /* PCIE specific */
2380 .cmdrsp_complete = mwifiex_pcie_cmdrsp_complete,
2381 .event_complete = mwifiex_pcie_event_complete,
2382 .update_mp_end_port = NULL,
2383 .cleanup_mpa_buf = NULL,
c6d1d87a 2384 .init_fw_port = mwifiex_pcie_init_fw_port,
fbd7e7ac 2385 .clean_pcie_ring = mwifiex_clean_pcie_ring_buf,
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2386};
2387
2388/*
2389 * This function initializes the PCIE driver module.
2390 *
2391 * This initiates the semaphore and registers the device with
2392 * PCIE bus.
2393 */
2394static int mwifiex_pcie_init_module(void)
2395{
2396 int ret;
2397
ca8f2112 2398 pr_debug("Marvell PCIe Driver\n");
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2399
2400 sema_init(&add_remove_card_sem, 1);
2401
2402 /* Clear the flag in case user removes the card. */
2403 user_rmmod = 0;
2404
2405 ret = pci_register_driver(&mwifiex_pcie);
2406 if (ret)
2407 pr_err("Driver register failed!\n");
2408 else
2409 pr_debug("info: Driver registered successfully!\n");
2410
2411 return ret;
2412}
2413
2414/*
2415 * This function cleans up the PCIE driver.
2416 *
2417 * The following major steps are followed for cleanup -
2418 * - Resume the device if its suspended
2419 * - Disconnect the device if connected
2420 * - Shutdown the firmware
2421 * - Unregister the device from PCIE bus.
2422 */
2423static void mwifiex_pcie_cleanup_module(void)
2424{
2425 if (!down_interruptible(&add_remove_card_sem))
2426 up(&add_remove_card_sem);
2427
2428 /* Set the flag as user is removing this module. */
2429 user_rmmod = 1;
2430
2431 pci_unregister_driver(&mwifiex_pcie);
2432}
2433
2434module_init(mwifiex_pcie_init_module);
2435module_exit(mwifiex_pcie_cleanup_module);
2436
2437MODULE_AUTHOR("Marvell International Ltd.");
2438MODULE_DESCRIPTION("Marvell WiFi-Ex PCI-Express Driver version " PCIE_VERSION);
2439MODULE_VERSION(PCIE_VERSION);
2440MODULE_LICENSE("GPL v2");
ca8f2112
AP
2441MODULE_FIRMWARE(PCIE8766_DEFAULT_FW_NAME);
2442MODULE_FIRMWARE(PCIE8897_DEFAULT_FW_NAME);
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