mwifiex: Use pci_release_region() instead of a pci_release_regions()
[deliverable/linux.git] / drivers / net / wireless / mwifiex / pcie.c
CommitLineData
d930faee
AK
1/*
2 * Marvell Wireless LAN device driver: PCIE specific handling
3 *
4 * Copyright (C) 2011, Marvell International Ltd.
5 *
6 * This software file (the "File") is distributed by Marvell International
7 * Ltd. under the terms of the GNU General Public License Version 2, June 1991
8 * (the "License"). You may use, redistribute and/or modify this File in
9 * accordance with the terms and conditions of the License, a copy of which
10 * is available by writing to the Free Software Foundation, Inc.,
11 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the
12 * worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt.
13 *
14 * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE
15 * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE
16 * ARE EXPRESSLY DISCLAIMED. The License provides additional details about
17 * this warranty disclaimer.
18 */
19
20#include <linux/firmware.h>
21
22#include "decl.h"
23#include "ioctl.h"
24#include "util.h"
25#include "fw.h"
26#include "main.h"
27#include "wmm.h"
28#include "11n.h"
29#include "pcie.h"
30
31#define PCIE_VERSION "1.0"
32#define DRV_NAME "Marvell mwifiex PCIe"
33
34static u8 user_rmmod;
35
36static struct mwifiex_if_ops pcie_ops;
37
38static struct semaphore add_remove_card_sem;
d930faee 39
fc331460
AP
40static int
41mwifiex_map_pci_memory(struct mwifiex_adapter *adapter, struct sk_buff *skb,
42 int size, int flags)
d930faee 43{
fc331460
AP
44 struct pcie_service_card *card = adapter->card;
45 dma_addr_t buf_pa;
d930faee 46
fc331460
AP
47 buf_pa = pci_map_single(card->dev, skb->data, size, flags);
48 if (pci_dma_mapping_error(card->dev, buf_pa)) {
49 dev_err(adapter->dev, "failed to map pci memory!\n");
50 return -1;
51 }
52 memcpy(skb->cb, &buf_pa, sizeof(dma_addr_t));
53 return 0;
d930faee
AK
54}
55
56/*
57 * This function reads sleep cookie and checks if FW is ready
58 */
59static bool mwifiex_pcie_ok_to_access_hw(struct mwifiex_adapter *adapter)
60{
61 u32 *cookie_addr;
62 struct pcie_service_card *card = adapter->card;
52301a81
AP
63 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
64
65 if (!reg->sleep_cookie)
66 return true;
d930faee 67
fc331460
AP
68 if (card->sleep_cookie_vbase) {
69 cookie_addr = (u32 *)card->sleep_cookie_vbase;
d930faee
AK
70 dev_dbg(adapter->dev, "info: ACCESS_HW: sleep cookie=0x%x\n",
71 *cookie_addr);
72 if (*cookie_addr == FW_AWAKE_COOKIE)
73 return true;
74 }
75
76 return false;
77}
78
8509e820 79#ifdef CONFIG_PM
fcca8d5a
BZ
80/*
81 * Kernel needs to suspend all functions separately. Therefore all
82 * registered functions must have drivers with suspend and resume
83 * methods. Failing that the kernel simply removes the whole card.
84 *
85 * If already not suspended, this function allocates and sends a host
86 * sleep activate request to the firmware and turns off the traffic.
87 */
88static int mwifiex_pcie_suspend(struct pci_dev *pdev, pm_message_t state)
89{
90 struct mwifiex_adapter *adapter;
91 struct pcie_service_card *card;
92 int hs_actived;
93
94 if (pdev) {
95 card = (struct pcie_service_card *) pci_get_drvdata(pdev);
96 if (!card || !card->adapter) {
97 pr_err("Card or adapter structure is not valid\n");
98 return 0;
99 }
100 } else {
101 pr_err("PCIE device is not specified\n");
102 return 0;
103 }
104
105 adapter = card->adapter;
106
107 hs_actived = mwifiex_enable_hs(adapter);
108
109 /* Indicate device suspended */
110 adapter->is_suspended = true;
111
112 return 0;
113}
114
115/*
116 * Kernel needs to suspend all functions separately. Therefore all
117 * registered functions must have drivers with suspend and resume
118 * methods. Failing that the kernel simply removes the whole card.
119 *
120 * If already not resumed, this function turns on the traffic and
121 * sends a host sleep cancel request to the firmware.
122 */
123static int mwifiex_pcie_resume(struct pci_dev *pdev)
124{
125 struct mwifiex_adapter *adapter;
126 struct pcie_service_card *card;
127
128 if (pdev) {
129 card = (struct pcie_service_card *) pci_get_drvdata(pdev);
130 if (!card || !card->adapter) {
131 pr_err("Card or adapter structure is not valid\n");
132 return 0;
133 }
134 } else {
135 pr_err("PCIE device is not specified\n");
136 return 0;
137 }
138
139 adapter = card->adapter;
140
141 if (!adapter->is_suspended) {
142 dev_warn(adapter->dev, "Device already resumed\n");
143 return 0;
144 }
145
146 adapter->is_suspended = false;
147
148 mwifiex_cancel_hs(mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_STA),
149 MWIFIEX_ASYNC_CMD);
150
151 return 0;
152}
8509e820 153#endif
fcca8d5a 154
d930faee
AK
155/*
156 * This function probes an mwifiex device and registers it. It allocates
157 * the card structure, enables PCIE function number and initiates the
158 * device registration and initialization procedure by adding a logical
159 * interface.
160 */
161static int mwifiex_pcie_probe(struct pci_dev *pdev,
162 const struct pci_device_id *ent)
163{
164 struct pcie_service_card *card;
165
166 pr_debug("info: vendor=0x%4.04X device=0x%4.04X rev=%d\n",
f57c1edc 167 pdev->vendor, pdev->device, pdev->revision);
d930faee
AK
168
169 card = kzalloc(sizeof(struct pcie_service_card), GFP_KERNEL);
e404decb 170 if (!card)
d930faee 171 return -ENOMEM;
d930faee
AK
172
173 card->dev = pdev;
174
dd04e6ac
AP
175 if (ent->driver_data) {
176 struct mwifiex_pcie_device *data = (void *)ent->driver_data;
177 card->pcie.firmware = data->firmware;
178 card->pcie.reg = data->reg;
179 card->pcie.blksz_fw_dl = data->blksz_fw_dl;
180 }
181
d930faee
AK
182 if (mwifiex_add_card(card, &add_remove_card_sem, &pcie_ops,
183 MWIFIEX_PCIE)) {
184 pr_err("%s failed\n", __func__);
185 kfree(card);
186 return -1;
187 }
188
189 return 0;
190}
191
192/*
193 * This function removes the interface and frees up the card structure.
194 */
195static void mwifiex_pcie_remove(struct pci_dev *pdev)
196{
197 struct pcie_service_card *card;
198 struct mwifiex_adapter *adapter;
f57c1edc 199 struct mwifiex_private *priv;
d930faee
AK
200 int i;
201
202 card = pci_get_drvdata(pdev);
203 if (!card)
204 return;
205
206 adapter = card->adapter;
207 if (!adapter || !adapter->priv_num)
208 return;
209
59a4cc25
AK
210 /* In case driver is removed when asynchronous FW load is in progress */
211 wait_for_completion(&adapter->fw_load);
212
d930faee
AK
213 if (user_rmmod) {
214#ifdef CONFIG_PM
215 if (adapter->is_suspended)
216 mwifiex_pcie_resume(pdev);
217#endif
218
219 for (i = 0; i < adapter->priv_num; i++)
220 if ((GET_BSS_ROLE(adapter->priv[i]) ==
f57c1edc
YAP
221 MWIFIEX_BSS_ROLE_STA) &&
222 adapter->priv[i]->media_connected)
d930faee
AK
223 mwifiex_deauthenticate(adapter->priv[i], NULL);
224
f57c1edc 225 priv = mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_ANY);
d930faee 226
f57c1edc
YAP
227 mwifiex_disable_auto_ds(priv);
228
229 mwifiex_init_shutdown_fw(priv, MWIFIEX_FUNC_SHUTDOWN);
d930faee
AK
230 }
231
232 mwifiex_remove_card(card->adapter, &add_remove_card_sem);
233 kfree(card);
234}
235
d930faee
AK
236static DEFINE_PCI_DEVICE_TABLE(mwifiex_ids) = {
237 {
238 PCIE_VENDOR_ID_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8766P,
239 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
dd04e6ac 240 .driver_data = (unsigned long) &mwifiex_pcie8766,
d930faee 241 },
ca8f2112
AP
242 {
243 PCIE_VENDOR_ID_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8897,
244 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
245 .driver_data = (unsigned long) &mwifiex_pcie8897,
246 },
d930faee
AK
247 {},
248};
249
250MODULE_DEVICE_TABLE(pci, mwifiex_ids);
251
252/* PCI Device Driver */
253static struct pci_driver __refdata mwifiex_pcie = {
254 .name = "mwifiex_pcie",
255 .id_table = mwifiex_ids,
256 .probe = mwifiex_pcie_probe,
257 .remove = mwifiex_pcie_remove,
258#ifdef CONFIG_PM
259 /* Power Management Hooks */
260 .suspend = mwifiex_pcie_suspend,
261 .resume = mwifiex_pcie_resume,
262#endif
263};
264
265/*
266 * This function writes data into PCIE card register.
267 */
268static int mwifiex_write_reg(struct mwifiex_adapter *adapter, int reg, u32 data)
269{
270 struct pcie_service_card *card = adapter->card;
271
272 iowrite32(data, card->pci_mmap1 + reg);
273
274 return 0;
275}
276
277/*
278 * This function reads data from PCIE card register.
279 */
280static int mwifiex_read_reg(struct mwifiex_adapter *adapter, int reg, u32 *data)
281{
282 struct pcie_service_card *card = adapter->card;
283
284 *data = ioread32(card->pci_mmap1 + reg);
285
286 return 0;
287}
288
289/*
c0880a29 290 * This function adds delay loop to ensure FW is awake before proceeding.
d930faee 291 */
c0880a29 292static void mwifiex_pcie_dev_wakeup_delay(struct mwifiex_adapter *adapter)
d930faee
AK
293{
294 int i = 0;
295
c0880a29 296 while (mwifiex_pcie_ok_to_access_hw(adapter)) {
d930faee 297 i++;
e7891ba2 298 usleep_range(10, 20);
d930faee 299 /* 50ms max wait */
3e7a4ff7 300 if (i == 5000)
d930faee
AK
301 break;
302 }
303
c0880a29
AP
304 return;
305}
306
307/* This function wakes up the card by reading fw_status register. */
308static int mwifiex_pm_wakeup_card(struct mwifiex_adapter *adapter)
309{
310 u32 fw_status;
311 struct pcie_service_card *card = adapter->card;
312 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
313
d930faee
AK
314 dev_dbg(adapter->dev, "event: Wakeup device...\n");
315
c0880a29
AP
316 if (reg->sleep_cookie)
317 mwifiex_pcie_dev_wakeup_delay(adapter);
318
319 /* Reading fw_status register will wakeup device */
320 if (mwifiex_read_reg(adapter, reg->fw_status, &fw_status)) {
321 dev_warn(adapter->dev, "Reading fw_status register failed\n");
d930faee
AK
322 return -1;
323 }
324
c0880a29
AP
325 if (reg->sleep_cookie) {
326 mwifiex_pcie_dev_wakeup_delay(adapter);
327 dev_dbg(adapter->dev, "PCIE wakeup: Setting PS_STATE_AWAKE\n");
328 adapter->ps_state = PS_STATE_AWAKE;
329 }
d930faee
AK
330
331 return 0;
332}
333
334/*
335 * This function is called after the card has woken up.
336 *
337 * The card configuration register is reset.
338 */
339static int mwifiex_pm_wakeup_card_complete(struct mwifiex_adapter *adapter)
340{
341 dev_dbg(adapter->dev, "cmd: Wakeup device completed\n");
342
343 return 0;
344}
345
346/*
347 * This function disables the host interrupt.
348 *
349 * The host interrupt mask is read, the disable bit is reset and
350 * written back to the card host interrupt mask register.
351 */
352static int mwifiex_pcie_disable_host_int(struct mwifiex_adapter *adapter)
353{
354 if (mwifiex_pcie_ok_to_access_hw(adapter)) {
355 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_MASK,
356 0x00000000)) {
357 dev_warn(adapter->dev, "Disable host interrupt failed\n");
358 return -1;
359 }
360 }
361
362 return 0;
363}
364
365/*
366 * This function enables the host interrupt.
367 *
368 * The host interrupt enable mask is written to the card
369 * host interrupt mask register.
370 */
371static int mwifiex_pcie_enable_host_int(struct mwifiex_adapter *adapter)
372{
373 if (mwifiex_pcie_ok_to_access_hw(adapter)) {
374 /* Simply write the mask to the register */
375 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_MASK,
376 HOST_INTR_MASK)) {
377 dev_warn(adapter->dev, "Enable host interrupt failed\n");
378 return -1;
379 }
380 }
381
382 return 0;
383}
384
385/*
0732484b
AP
386 * This function initializes TX buffer ring descriptors
387 */
388static int mwifiex_init_txq_ring(struct mwifiex_adapter *adapter)
389{
390 struct pcie_service_card *card = adapter->card;
ca8f2112 391 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
0732484b 392 struct mwifiex_pcie_buf_desc *desc;
ca8f2112 393 struct mwifiex_pfu_buf_desc *desc2;
0732484b
AP
394 int i;
395
396 for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) {
397 card->tx_buf_list[i] = NULL;
ca8f2112
AP
398 if (reg->pfu_enabled) {
399 card->txbd_ring[i] = (void *)card->txbd_ring_vbase +
400 (sizeof(*desc2) * i);
401 desc2 = card->txbd_ring[i];
402 memset(desc2, 0, sizeof(*desc2));
403 } else {
404 card->txbd_ring[i] = (void *)card->txbd_ring_vbase +
405 (sizeof(*desc) * i);
406 desc = card->txbd_ring[i];
407 memset(desc, 0, sizeof(*desc));
408 }
0732484b
AP
409 }
410
411 return 0;
412}
413
414/* This function initializes RX buffer ring descriptors. Each SKB is allocated
415 * here and after mapping PCI memory, its physical address is assigned to
416 * PCIE Rx buffer descriptor's physical address.
417 */
418static int mwifiex_init_rxq_ring(struct mwifiex_adapter *adapter)
419{
420 struct pcie_service_card *card = adapter->card;
ca8f2112 421 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
0732484b
AP
422 struct sk_buff *skb;
423 struct mwifiex_pcie_buf_desc *desc;
ca8f2112 424 struct mwifiex_pfu_buf_desc *desc2;
0732484b
AP
425 dma_addr_t buf_pa;
426 int i;
427
428 for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) {
429 /* Allocate skb here so that firmware can DMA data from it */
430 skb = dev_alloc_skb(MWIFIEX_RX_DATA_BUF_SIZE);
431 if (!skb) {
432 dev_err(adapter->dev,
433 "Unable to allocate skb for RX ring.\n");
434 kfree(card->rxbd_ring_vbase);
435 return -ENOMEM;
436 }
437
438 if (mwifiex_map_pci_memory(adapter, skb,
439 MWIFIEX_RX_DATA_BUF_SIZE,
440 PCI_DMA_FROMDEVICE))
441 return -1;
442
443 MWIFIEX_SKB_PACB(skb, &buf_pa);
444
445 dev_dbg(adapter->dev,
446 "info: RX ring: skb=%p len=%d data=%p buf_pa=%#x:%x\n",
447 skb, skb->len, skb->data, (u32)buf_pa,
448 (u32)((u64)buf_pa >> 32));
449
450 card->rx_buf_list[i] = skb;
ca8f2112
AP
451 if (reg->pfu_enabled) {
452 card->rxbd_ring[i] = (void *)card->rxbd_ring_vbase +
453 (sizeof(*desc2) * i);
454 desc2 = card->rxbd_ring[i];
455 desc2->paddr = buf_pa;
456 desc2->len = (u16)skb->len;
457 desc2->frag_len = (u16)skb->len;
458 desc2->flags = reg->ring_flag_eop | reg->ring_flag_sop;
459 desc2->offset = 0;
460 } else {
461 card->rxbd_ring[i] = (void *)(card->rxbd_ring_vbase +
462 (sizeof(*desc) * i));
463 desc = card->rxbd_ring[i];
464 desc->paddr = buf_pa;
465 desc->len = (u16)skb->len;
466 desc->flags = 0;
467 }
0732484b
AP
468 }
469
470 return 0;
471}
472
473/* This function initializes event buffer ring descriptors. Each SKB is
474 * allocated here and after mapping PCI memory, its physical address is assigned
475 * to PCIE Rx buffer descriptor's physical address
476 */
477static int mwifiex_pcie_init_evt_ring(struct mwifiex_adapter *adapter)
478{
479 struct pcie_service_card *card = adapter->card;
e05dc3e9 480 struct mwifiex_evt_buf_desc *desc;
0732484b
AP
481 struct sk_buff *skb;
482 dma_addr_t buf_pa;
483 int i;
484
485 for (i = 0; i < MWIFIEX_MAX_EVT_BD; i++) {
486 /* Allocate skb here so that firmware can DMA data from it */
487 skb = dev_alloc_skb(MAX_EVENT_SIZE);
488 if (!skb) {
489 dev_err(adapter->dev,
490 "Unable to allocate skb for EVENT buf.\n");
491 kfree(card->evtbd_ring_vbase);
492 return -ENOMEM;
493 }
494 skb_put(skb, MAX_EVENT_SIZE);
495
496 if (mwifiex_map_pci_memory(adapter, skb, MAX_EVENT_SIZE,
497 PCI_DMA_FROMDEVICE))
498 return -1;
499
500 MWIFIEX_SKB_PACB(skb, &buf_pa);
501
502 dev_dbg(adapter->dev,
503 "info: EVT ring: skb=%p len=%d data=%p buf_pa=%#x:%x\n",
504 skb, skb->len, skb->data, (u32)buf_pa,
505 (u32)((u64)buf_pa >> 32));
506
507 card->evt_buf_list[i] = skb;
508 card->evtbd_ring[i] = (void *)(card->evtbd_ring_vbase +
509 (sizeof(*desc) * i));
0732484b
AP
510 desc = card->evtbd_ring[i];
511 desc->paddr = buf_pa;
512 desc->len = (u16)skb->len;
513 desc->flags = 0;
514 }
515
516 return 0;
517}
518
519/* This function cleans up TX buffer rings. If any of the buffer list has valid
520 * SKB address, associated SKB is freed.
521 */
522static void mwifiex_cleanup_txq_ring(struct mwifiex_adapter *adapter)
523{
524 struct pcie_service_card *card = adapter->card;
ca8f2112 525 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
0732484b
AP
526 struct sk_buff *skb;
527 struct mwifiex_pcie_buf_desc *desc;
ca8f2112 528 struct mwifiex_pfu_buf_desc *desc2;
0732484b
AP
529 int i;
530
531 for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) {
ca8f2112
AP
532 if (reg->pfu_enabled) {
533 desc2 = card->txbd_ring[i];
534 if (card->tx_buf_list[i]) {
535 skb = card->tx_buf_list[i];
536 pci_unmap_single(card->dev, desc2->paddr,
537 skb->len, PCI_DMA_TODEVICE);
538 dev_kfree_skb_any(skb);
539 }
540 memset(desc2, 0, sizeof(*desc2));
541 } else {
542 desc = card->txbd_ring[i];
543 if (card->tx_buf_list[i]) {
544 skb = card->tx_buf_list[i];
545 pci_unmap_single(card->dev, desc->paddr,
546 skb->len, PCI_DMA_TODEVICE);
547 dev_kfree_skb_any(skb);
548 }
549 memset(desc, 0, sizeof(*desc));
0732484b
AP
550 }
551 card->tx_buf_list[i] = NULL;
0732484b
AP
552 }
553
554 return;
555}
556
557/* This function cleans up RX buffer rings. If any of the buffer list has valid
558 * SKB address, associated SKB is freed.
559 */
560static void mwifiex_cleanup_rxq_ring(struct mwifiex_adapter *adapter)
561{
562 struct pcie_service_card *card = adapter->card;
ca8f2112 563 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
0732484b 564 struct mwifiex_pcie_buf_desc *desc;
ca8f2112 565 struct mwifiex_pfu_buf_desc *desc2;
0732484b
AP
566 struct sk_buff *skb;
567 int i;
568
569 for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) {
ca8f2112
AP
570 if (reg->pfu_enabled) {
571 desc2 = card->rxbd_ring[i];
572 if (card->rx_buf_list[i]) {
573 skb = card->rx_buf_list[i];
574 pci_unmap_single(card->dev, desc2->paddr,
d033d3a6 575 skb->len, PCI_DMA_FROMDEVICE);
ca8f2112
AP
576 dev_kfree_skb_any(skb);
577 }
578 memset(desc2, 0, sizeof(*desc2));
579 } else {
580 desc = card->rxbd_ring[i];
581 if (card->rx_buf_list[i]) {
582 skb = card->rx_buf_list[i];
583 pci_unmap_single(card->dev, desc->paddr,
d033d3a6 584 skb->len, PCI_DMA_FROMDEVICE);
ca8f2112
AP
585 dev_kfree_skb_any(skb);
586 }
587 memset(desc, 0, sizeof(*desc));
0732484b 588 }
ca8f2112 589 card->rx_buf_list[i] = NULL;
0732484b
AP
590 }
591
592 return;
593}
594
595/* This function cleans up event buffer rings. If any of the buffer list has
596 * valid SKB address, associated SKB is freed.
597 */
598static void mwifiex_cleanup_evt_ring(struct mwifiex_adapter *adapter)
599{
600 struct pcie_service_card *card = adapter->card;
e05dc3e9 601 struct mwifiex_evt_buf_desc *desc;
0732484b
AP
602 struct sk_buff *skb;
603 int i;
604
605 for (i = 0; i < MWIFIEX_MAX_EVT_BD; i++) {
606 desc = card->evtbd_ring[i];
607 if (card->evt_buf_list[i]) {
608 skb = card->evt_buf_list[i];
609 pci_unmap_single(card->dev, desc->paddr, MAX_EVENT_SIZE,
610 PCI_DMA_FROMDEVICE);
611 dev_kfree_skb_any(skb);
612 }
613 card->evt_buf_list[i] = NULL;
614 memset(desc, 0, sizeof(*desc));
615 }
616
617 return;
618}
619
620/* This function creates buffer descriptor ring for TX
d930faee
AK
621 */
622static int mwifiex_pcie_create_txbd_ring(struct mwifiex_adapter *adapter)
623{
624 struct pcie_service_card *card = adapter->card;
dd04e6ac 625 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee
AK
626
627 /*
628 * driver maintaines the write pointer and firmware maintaines the read
629 * pointer. The write pointer starts at 0 (zero) while the read pointer
630 * starts at zero with rollover bit set
631 */
632 card->txbd_wrptr = 0;
ca8f2112
AP
633
634 if (reg->pfu_enabled)
635 card->txbd_rdptr = 0;
636 else
637 card->txbd_rdptr |= reg->tx_rollover_ind;
d930faee
AK
638
639 /* allocate shared memory for the BD ring and divide the same in to
640 several descriptors */
ca8f2112
AP
641 if (reg->pfu_enabled)
642 card->txbd_ring_size = sizeof(struct mwifiex_pfu_buf_desc) *
643 MWIFIEX_MAX_TXRX_BD;
644 else
645 card->txbd_ring_size = sizeof(struct mwifiex_pcie_buf_desc) *
646 MWIFIEX_MAX_TXRX_BD;
647
d930faee 648 dev_dbg(adapter->dev, "info: txbd_ring: Allocating %d bytes\n",
f57c1edc 649 card->txbd_ring_size);
fc331460
AP
650 card->txbd_ring_vbase = pci_alloc_consistent(card->dev,
651 card->txbd_ring_size,
652 &card->txbd_ring_pbase);
d930faee 653 if (!card->txbd_ring_vbase) {
fc331460
AP
654 dev_err(adapter->dev,
655 "allocate consistent memory (%d bytes) failed!\n",
656 card->txbd_ring_size);
8c53e42d 657 return -ENOMEM;
d930faee 658 }
f57c1edc
YAP
659 dev_dbg(adapter->dev,
660 "info: txbd_ring - base: %p, pbase: %#x:%x, len: %x\n",
fc331460 661 card->txbd_ring_vbase, (unsigned int)card->txbd_ring_pbase,
f57c1edc 662 (u32)((u64)card->txbd_ring_pbase >> 32), card->txbd_ring_size);
d930faee 663
0732484b 664 return mwifiex_init_txq_ring(adapter);
d930faee
AK
665}
666
667static int mwifiex_pcie_delete_txbd_ring(struct mwifiex_adapter *adapter)
668{
669 struct pcie_service_card *card = adapter->card;
dd04e6ac 670 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee 671
0732484b 672 mwifiex_cleanup_txq_ring(adapter);
d930faee 673
fc331460
AP
674 if (card->txbd_ring_vbase)
675 pci_free_consistent(card->dev, card->txbd_ring_size,
676 card->txbd_ring_vbase,
677 card->txbd_ring_pbase);
d930faee
AK
678 card->txbd_ring_size = 0;
679 card->txbd_wrptr = 0;
dd04e6ac 680 card->txbd_rdptr = 0 | reg->tx_rollover_ind;
d930faee 681 card->txbd_ring_vbase = NULL;
fc331460 682 card->txbd_ring_pbase = 0;
d930faee
AK
683
684 return 0;
685}
686
687/*
688 * This function creates buffer descriptor ring for RX
689 */
690static int mwifiex_pcie_create_rxbd_ring(struct mwifiex_adapter *adapter)
691{
692 struct pcie_service_card *card = adapter->card;
dd04e6ac 693 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee
AK
694
695 /*
696 * driver maintaines the read pointer and firmware maintaines the write
697 * pointer. The write pointer starts at 0 (zero) while the read pointer
698 * starts at zero with rollover bit set
699 */
700 card->rxbd_wrptr = 0;
dd04e6ac 701 card->rxbd_rdptr = reg->rx_rollover_ind;
d930faee 702
ca8f2112
AP
703 if (reg->pfu_enabled)
704 card->rxbd_ring_size = sizeof(struct mwifiex_pfu_buf_desc) *
705 MWIFIEX_MAX_TXRX_BD;
706 else
707 card->rxbd_ring_size = sizeof(struct mwifiex_pcie_buf_desc) *
708 MWIFIEX_MAX_TXRX_BD;
709
d930faee 710 dev_dbg(adapter->dev, "info: rxbd_ring: Allocating %d bytes\n",
f57c1edc 711 card->rxbd_ring_size);
fc331460
AP
712 card->rxbd_ring_vbase = pci_alloc_consistent(card->dev,
713 card->rxbd_ring_size,
714 &card->rxbd_ring_pbase);
d930faee 715 if (!card->rxbd_ring_vbase) {
fc331460
AP
716 dev_err(adapter->dev,
717 "allocate consistent memory (%d bytes) failed!\n",
718 card->rxbd_ring_size);
8c53e42d 719 return -ENOMEM;
d930faee 720 }
d930faee 721
f57c1edc
YAP
722 dev_dbg(adapter->dev,
723 "info: rxbd_ring - base: %p, pbase: %#x:%x, len: %#x\n",
724 card->rxbd_ring_vbase, (u32)card->rxbd_ring_pbase,
725 (u32)((u64)card->rxbd_ring_pbase >> 32),
726 card->rxbd_ring_size);
d930faee 727
0732484b 728 return mwifiex_init_rxq_ring(adapter);
d930faee
AK
729}
730
731/*
732 * This function deletes Buffer descriptor ring for RX
733 */
734static int mwifiex_pcie_delete_rxbd_ring(struct mwifiex_adapter *adapter)
735{
736 struct pcie_service_card *card = adapter->card;
dd04e6ac 737 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee 738
0732484b 739 mwifiex_cleanup_rxq_ring(adapter);
d930faee 740
fc331460
AP
741 if (card->rxbd_ring_vbase)
742 pci_free_consistent(card->dev, card->rxbd_ring_size,
743 card->rxbd_ring_vbase,
744 card->rxbd_ring_pbase);
d930faee
AK
745 card->rxbd_ring_size = 0;
746 card->rxbd_wrptr = 0;
dd04e6ac 747 card->rxbd_rdptr = 0 | reg->rx_rollover_ind;
d930faee 748 card->rxbd_ring_vbase = NULL;
fc331460 749 card->rxbd_ring_pbase = 0;
d930faee
AK
750
751 return 0;
752}
753
754/*
755 * This function creates buffer descriptor ring for Events
756 */
757static int mwifiex_pcie_create_evtbd_ring(struct mwifiex_adapter *adapter)
758{
759 struct pcie_service_card *card = adapter->card;
dd04e6ac 760 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee
AK
761
762 /*
763 * driver maintaines the read pointer and firmware maintaines the write
764 * pointer. The write pointer starts at 0 (zero) while the read pointer
765 * starts at zero with rollover bit set
766 */
767 card->evtbd_wrptr = 0;
dd04e6ac 768 card->evtbd_rdptr = reg->evt_rollover_ind;
d930faee 769
e05dc3e9 770 card->evtbd_ring_size = sizeof(struct mwifiex_evt_buf_desc) *
ca8f2112
AP
771 MWIFIEX_MAX_EVT_BD;
772
d930faee 773 dev_dbg(adapter->dev, "info: evtbd_ring: Allocating %d bytes\n",
f57c1edc 774 card->evtbd_ring_size);
fc331460
AP
775 card->evtbd_ring_vbase = pci_alloc_consistent(card->dev,
776 card->evtbd_ring_size,
777 &card->evtbd_ring_pbase);
d930faee 778 if (!card->evtbd_ring_vbase) {
f57c1edc 779 dev_err(adapter->dev,
fc331460
AP
780 "allocate consistent memory (%d bytes) failed!\n",
781 card->evtbd_ring_size);
8c53e42d 782 return -ENOMEM;
d930faee 783 }
d930faee 784
f57c1edc
YAP
785 dev_dbg(adapter->dev,
786 "info: CMDRSP/EVT bd_ring - base: %p pbase: %#x:%x len: %#x\n",
787 card->evtbd_ring_vbase, (u32)card->evtbd_ring_pbase,
788 (u32)((u64)card->evtbd_ring_pbase >> 32),
789 card->evtbd_ring_size);
d930faee 790
0732484b 791 return mwifiex_pcie_init_evt_ring(adapter);
d930faee
AK
792}
793
794/*
795 * This function deletes Buffer descriptor ring for Events
796 */
797static int mwifiex_pcie_delete_evtbd_ring(struct mwifiex_adapter *adapter)
798{
799 struct pcie_service_card *card = adapter->card;
dd04e6ac 800 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee 801
0732484b 802 mwifiex_cleanup_evt_ring(adapter);
d930faee 803
fc331460
AP
804 if (card->evtbd_ring_vbase)
805 pci_free_consistent(card->dev, card->evtbd_ring_size,
806 card->evtbd_ring_vbase,
807 card->evtbd_ring_pbase);
d930faee 808 card->evtbd_wrptr = 0;
dd04e6ac 809 card->evtbd_rdptr = 0 | reg->evt_rollover_ind;
d930faee
AK
810 card->evtbd_ring_size = 0;
811 card->evtbd_ring_vbase = NULL;
fc331460 812 card->evtbd_ring_pbase = 0;
d930faee
AK
813
814 return 0;
815}
816
817/*
818 * This function allocates a buffer for CMDRSP
819 */
820static int mwifiex_pcie_alloc_cmdrsp_buf(struct mwifiex_adapter *adapter)
821{
822 struct pcie_service_card *card = adapter->card;
823 struct sk_buff *skb;
824
825 /* Allocate memory for receiving command response data */
826 skb = dev_alloc_skb(MWIFIEX_UPLD_SIZE);
827 if (!skb) {
f57c1edc
YAP
828 dev_err(adapter->dev,
829 "Unable to allocate skb for command response data.\n");
d930faee
AK
830 return -ENOMEM;
831 }
d930faee 832 skb_put(skb, MWIFIEX_UPLD_SIZE);
fc331460
AP
833 if (mwifiex_map_pci_memory(adapter, skb, MWIFIEX_UPLD_SIZE,
834 PCI_DMA_FROMDEVICE))
835 return -1;
d930faee 836
fc331460 837 card->cmdrsp_buf = skb;
d930faee
AK
838
839 return 0;
840}
841
842/*
843 * This function deletes a buffer for CMDRSP
844 */
845static int mwifiex_pcie_delete_cmdrsp_buf(struct mwifiex_adapter *adapter)
846{
847 struct pcie_service_card *card;
fc331460 848 dma_addr_t buf_pa;
d930faee
AK
849
850 if (!adapter)
851 return 0;
852
853 card = adapter->card;
854
fc331460
AP
855 if (card && card->cmdrsp_buf) {
856 MWIFIEX_SKB_PACB(card->cmdrsp_buf, &buf_pa);
857 pci_unmap_single(card->dev, buf_pa, MWIFIEX_UPLD_SIZE,
858 PCI_DMA_FROMDEVICE);
d930faee 859 dev_kfree_skb_any(card->cmdrsp_buf);
fc331460 860 }
d930faee 861
fc331460
AP
862 if (card && card->cmd_buf) {
863 MWIFIEX_SKB_PACB(card->cmd_buf, &buf_pa);
864 pci_unmap_single(card->dev, buf_pa, MWIFIEX_SIZE_OF_CMD_BUFFER,
865 PCI_DMA_TODEVICE);
d930faee 866 dev_kfree_skb_any(card->cmd_buf);
fc331460 867 }
d930faee
AK
868 return 0;
869}
870
871/*
872 * This function allocates a buffer for sleep cookie
873 */
874static int mwifiex_pcie_alloc_sleep_cookie_buf(struct mwifiex_adapter *adapter)
875{
d930faee
AK
876 struct pcie_service_card *card = adapter->card;
877
fc331460
AP
878 card->sleep_cookie_vbase = pci_alloc_consistent(card->dev, sizeof(u32),
879 &card->sleep_cookie_pbase);
880 if (!card->sleep_cookie_vbase) {
881 dev_err(adapter->dev, "pci_alloc_consistent failed!\n");
d930faee
AK
882 return -ENOMEM;
883 }
d930faee 884 /* Init val of Sleep Cookie */
fc331460 885 *(u32 *)card->sleep_cookie_vbase = FW_AWAKE_COOKIE;
d930faee
AK
886
887 dev_dbg(adapter->dev, "alloc_scook: sleep cookie=0x%x\n",
fc331460 888 *((u32 *)card->sleep_cookie_vbase));
d930faee
AK
889
890 return 0;
891}
892
893/*
894 * This function deletes buffer for sleep cookie
895 */
896static int mwifiex_pcie_delete_sleep_cookie_buf(struct mwifiex_adapter *adapter)
897{
898 struct pcie_service_card *card;
899
900 if (!adapter)
901 return 0;
902
903 card = adapter->card;
904
fc331460
AP
905 if (card && card->sleep_cookie_vbase) {
906 pci_free_consistent(card->dev, sizeof(u32),
907 card->sleep_cookie_vbase,
908 card->sleep_cookie_pbase);
909 card->sleep_cookie_vbase = NULL;
d930faee
AK
910 }
911
912 return 0;
913}
914
fbd7e7ac
AP
915/* This function flushes the TX buffer descriptor ring
916 * This function defined as handler is also called while cleaning TXRX
917 * during disconnect/ bss stop.
918 */
919static int mwifiex_clean_pcie_ring_buf(struct mwifiex_adapter *adapter)
920{
921 struct pcie_service_card *card = adapter->card;
fbd7e7ac 922
48f4d916 923 if (!mwifiex_pcie_txbd_empty(card, card->txbd_rdptr)) {
fbd7e7ac
AP
924 card->txbd_flush = 1;
925 /* write pointer already set at last send
926 * send dnld-rdy intr again, wait for completion.
927 */
928 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
929 CPU_INTR_DNLD_RDY)) {
930 dev_err(adapter->dev,
931 "failed to assert dnld-rdy interrupt.\n");
932 return -1;
933 }
934 }
935 return 0;
936}
937
d930faee 938/*
e7f767a7 939 * This function unmaps and frees downloaded data buffer
d930faee 940 */
e7f767a7 941static int mwifiex_pcie_send_data_complete(struct mwifiex_adapter *adapter)
d930faee 942{
e7f767a7
AP
943 struct sk_buff *skb;
944 dma_addr_t buf_pa;
ca8f2112 945 u32 wrdoneidx, rdptr, num_tx_buffs, unmap_count = 0;
e05dc3e9 946 struct mwifiex_pcie_buf_desc *desc;
ca8f2112 947 struct mwifiex_pfu_buf_desc *desc2;
d930faee 948 struct pcie_service_card *card = adapter->card;
dd04e6ac 949 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee
AK
950
951 if (!mwifiex_pcie_ok_to_access_hw(adapter))
952 mwifiex_pm_wakeup_card(adapter);
953
954 /* Read the TX ring read pointer set by firmware */
dd04e6ac 955 if (mwifiex_read_reg(adapter, reg->tx_rdptr, &rdptr)) {
f57c1edc 956 dev_err(adapter->dev,
dd04e6ac 957 "SEND COMP: failed to read reg->tx_rdptr\n");
d930faee
AK
958 return -1;
959 }
960
e7f767a7
AP
961 dev_dbg(adapter->dev, "SEND COMP: rdptr_prev=0x%x, rdptr=0x%x\n",
962 card->txbd_rdptr, rdptr);
d930faee 963
ca8f2112 964 num_tx_buffs = MWIFIEX_MAX_TXRX_BD << reg->tx_start_ptr;
e7f767a7 965 /* free from previous txbd_rdptr to current txbd_rdptr */
dd04e6ac
AP
966 while (((card->txbd_rdptr & reg->tx_mask) !=
967 (rdptr & reg->tx_mask)) ||
968 ((card->txbd_rdptr & reg->tx_rollover_ind) !=
969 (rdptr & reg->tx_rollover_ind))) {
ca8f2112
AP
970 wrdoneidx = (card->txbd_rdptr & reg->tx_mask) >>
971 reg->tx_start_ptr;
e7f767a7
AP
972
973 skb = card->tx_buf_list[wrdoneidx];
974 if (skb) {
975 dev_dbg(adapter->dev,
976 "SEND COMP: Detach skb %p at txbd_rdidx=%d\n",
977 skb, wrdoneidx);
978 MWIFIEX_SKB_PACB(skb, &buf_pa);
979 pci_unmap_single(card->dev, buf_pa, skb->len,
980 PCI_DMA_TODEVICE);
981
982 unmap_count++;
983
984 if (card->txbd_flush)
985 mwifiex_write_data_complete(adapter, skb, 0,
986 -1);
987 else
988 mwifiex_write_data_complete(adapter, skb, 0, 0);
989 }
990
991 card->tx_buf_list[wrdoneidx] = NULL;
ca8f2112
AP
992
993 if (reg->pfu_enabled) {
994 desc2 = (void *)card->txbd_ring[wrdoneidx];
995 memset(desc2, 0, sizeof(*desc2));
996 } else {
997 desc = card->txbd_ring[wrdoneidx];
998 memset(desc, 0, sizeof(*desc));
999 }
1000 switch (card->dev->device) {
1001 case PCIE_DEVICE_ID_MARVELL_88W8766P:
1002 card->txbd_rdptr++;
1003 break;
1004 case PCIE_DEVICE_ID_MARVELL_88W8897:
1005 card->txbd_rdptr += reg->ring_tx_start_ptr;
1006 break;
1007 }
1008
e7f767a7 1009
dd04e6ac 1010 if ((card->txbd_rdptr & reg->tx_mask) == num_tx_buffs)
e7f767a7 1011 card->txbd_rdptr = ((card->txbd_rdptr &
dd04e6ac
AP
1012 reg->tx_rollover_ind) ^
1013 reg->tx_rollover_ind);
e7f767a7
AP
1014 }
1015
1016 if (unmap_count)
1017 adapter->data_sent = false;
1018
1019 if (card->txbd_flush) {
3d482038 1020 if (mwifiex_pcie_txbd_empty(card, card->txbd_rdptr))
e7f767a7
AP
1021 card->txbd_flush = 0;
1022 else
1023 mwifiex_clean_pcie_ring_buf(adapter);
1024 }
1025
1026 return 0;
1027}
1028
1029/* This function sends data buffer to device. First 4 bytes of payload
1030 * are filled with payload length and payload type. Then this payload
1031 * is mapped to PCI device memory. Tx ring pointers are advanced accordingly.
1032 * Download ready interrupt to FW is deffered if Tx ring is not full and
1033 * additional payload can be accomodated.
1034 */
1035static int
1036mwifiex_pcie_send_data(struct mwifiex_adapter *adapter, struct sk_buff *skb,
1037 struct mwifiex_tx_param *tx_param)
1038{
1039 struct pcie_service_card *card = adapter->card;
dd04e6ac 1040 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
ca8f2112 1041 u32 wrindx, num_tx_buffs, rx_val;
e7f767a7
AP
1042 int ret;
1043 dma_addr_t buf_pa;
9931078e
BZ
1044 struct mwifiex_pcie_buf_desc *desc = NULL;
1045 struct mwifiex_pfu_buf_desc *desc2 = NULL;
e7f767a7
AP
1046 __le16 *tmp;
1047
1048 if (!(skb->data && skb->len)) {
1049 dev_err(adapter->dev, "%s(): invalid parameter <%p, %#x>\n",
1050 __func__, skb->data, skb->len);
1051 return -1;
1052 }
1053
1054 if (!mwifiex_pcie_ok_to_access_hw(adapter))
1055 mwifiex_pm_wakeup_card(adapter);
1056
ca8f2112 1057 num_tx_buffs = MWIFIEX_MAX_TXRX_BD << reg->tx_start_ptr;
e7f767a7
AP
1058 dev_dbg(adapter->dev, "info: SEND DATA: <Rd: %#x, Wr: %#x>\n",
1059 card->txbd_rdptr, card->txbd_wrptr);
1060 if (mwifiex_pcie_txbd_not_full(card)) {
d930faee
AK
1061 u8 *payload;
1062
1063 adapter->data_sent = true;
e7f767a7 1064 payload = skb->data;
d930faee
AK
1065 tmp = (__le16 *)&payload[0];
1066 *tmp = cpu_to_le16((u16)skb->len);
1067 tmp = (__le16 *)&payload[2];
1068 *tmp = cpu_to_le16(MWIFIEX_TYPE_DATA);
e7f767a7
AP
1069
1070 if (mwifiex_map_pci_memory(adapter, skb, skb->len ,
1071 PCI_DMA_TODEVICE))
1072 return -1;
1073
ca8f2112 1074 wrindx = (card->txbd_wrptr & reg->tx_mask) >> reg->tx_start_ptr;
e7f767a7
AP
1075 MWIFIEX_SKB_PACB(skb, &buf_pa);
1076 card->tx_buf_list[wrindx] = skb;
d930faee 1077
ca8f2112
AP
1078 if (reg->pfu_enabled) {
1079 desc2 = (void *)card->txbd_ring[wrindx];
1080 desc2->paddr = buf_pa;
1081 desc2->len = (u16)skb->len;
1082 desc2->frag_len = (u16)skb->len;
1083 desc2->offset = 0;
1084 desc2->flags = MWIFIEX_BD_FLAG_FIRST_DESC |
1085 MWIFIEX_BD_FLAG_LAST_DESC;
1086 } else {
1087 desc = card->txbd_ring[wrindx];
1088 desc->paddr = buf_pa;
1089 desc->len = (u16)skb->len;
1090 desc->flags = MWIFIEX_BD_FLAG_FIRST_DESC |
1091 MWIFIEX_BD_FLAG_LAST_DESC;
1092 }
1093
1094 switch (card->dev->device) {
1095 case PCIE_DEVICE_ID_MARVELL_88W8766P:
1096 card->txbd_wrptr++;
1097 break;
1098 case PCIE_DEVICE_ID_MARVELL_88W8897:
1099 card->txbd_wrptr += reg->ring_tx_start_ptr;
1100 break;
1101 }
1102
1103 if ((card->txbd_wrptr & reg->tx_mask) == num_tx_buffs)
d930faee 1104 card->txbd_wrptr = ((card->txbd_wrptr &
dd04e6ac
AP
1105 reg->tx_rollover_ind) ^
1106 reg->tx_rollover_ind);
d930faee 1107
ca8f2112 1108 rx_val = card->rxbd_rdptr & reg->rx_wrap_mask;
dd04e6ac
AP
1109 /* Write the TX ring write pointer in to reg->tx_wrptr */
1110 if (mwifiex_write_reg(adapter, reg->tx_wrptr,
ca8f2112 1111 card->txbd_wrptr | rx_val)) {
f57c1edc 1112 dev_err(adapter->dev,
dd04e6ac 1113 "SEND DATA: failed to write reg->tx_wrptr\n");
e7f767a7
AP
1114 ret = -1;
1115 goto done_unmap;
d930faee 1116 }
e7f767a7
AP
1117 if ((mwifiex_pcie_txbd_not_full(card)) &&
1118 tx_param->next_pkt_len) {
1119 /* have more packets and TxBD still can hold more */
1120 dev_dbg(adapter->dev,
1121 "SEND DATA: delay dnld-rdy interrupt.\n");
1122 adapter->data_sent = false;
1123 } else {
1124 /* Send the TX ready interrupt */
1125 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
1126 CPU_INTR_DNLD_RDY)) {
1127 dev_err(adapter->dev,
1128 "SEND DATA: failed to assert dnld-rdy interrupt.\n");
1129 ret = -1;
1130 goto done_unmap;
1131 }
d930faee
AK
1132 }
1133 dev_dbg(adapter->dev, "info: SEND DATA: Updated <Rd: %#x, Wr: "
f57c1edc 1134 "%#x> and sent packet to firmware successfully\n",
e7f767a7 1135 card->txbd_rdptr, card->txbd_wrptr);
d930faee 1136 } else {
f57c1edc
YAP
1137 dev_dbg(adapter->dev,
1138 "info: TX Ring full, can't send packets to fw\n");
d930faee
AK
1139 adapter->data_sent = true;
1140 /* Send the TX ready interrupt */
1141 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
1142 CPU_INTR_DNLD_RDY))
f57c1edc
YAP
1143 dev_err(adapter->dev,
1144 "SEND DATA: failed to assert door-bell intr\n");
d930faee
AK
1145 return -EBUSY;
1146 }
1147
e7f767a7
AP
1148 return -EINPROGRESS;
1149done_unmap:
1150 MWIFIEX_SKB_PACB(skb, &buf_pa);
1151 pci_unmap_single(card->dev, buf_pa, skb->len, PCI_DMA_TODEVICE);
1152 card->tx_buf_list[wrindx] = NULL;
ca8f2112
AP
1153 if (reg->pfu_enabled)
1154 memset(desc2, 0, sizeof(*desc2));
1155 else
1156 memset(desc, 0, sizeof(*desc));
1157
e7f767a7 1158 return ret;
d930faee
AK
1159}
1160
1161/*
1162 * This function handles received buffer ring and
1163 * dispatches packets to upper
1164 */
1165static int mwifiex_pcie_process_recv_data(struct mwifiex_adapter *adapter)
1166{
1167 struct pcie_service_card *card = adapter->card;
dd04e6ac 1168 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
ca8f2112 1169 u32 wrptr, rd_index, tx_val;
e7f767a7 1170 dma_addr_t buf_pa;
d930faee
AK
1171 int ret = 0;
1172 struct sk_buff *skb_tmp = NULL;
e05dc3e9 1173 struct mwifiex_pcie_buf_desc *desc;
ca8f2112 1174 struct mwifiex_pfu_buf_desc *desc2;
d930faee 1175
e7f767a7
AP
1176 if (!mwifiex_pcie_ok_to_access_hw(adapter))
1177 mwifiex_pm_wakeup_card(adapter);
1178
d930faee 1179 /* Read the RX ring Write pointer set by firmware */
dd04e6ac 1180 if (mwifiex_read_reg(adapter, reg->rx_wrptr, &wrptr)) {
f57c1edc 1181 dev_err(adapter->dev,
dd04e6ac 1182 "RECV DATA: failed to read reg->rx_wrptr\n");
d930faee
AK
1183 ret = -1;
1184 goto done;
1185 }
e7f767a7 1186 card->rxbd_wrptr = wrptr;
d930faee 1187
dd04e6ac
AP
1188 while (((wrptr & reg->rx_mask) !=
1189 (card->rxbd_rdptr & reg->rx_mask)) ||
1190 ((wrptr & reg->rx_rollover_ind) ==
1191 (card->rxbd_rdptr & reg->rx_rollover_ind))) {
d930faee
AK
1192 struct sk_buff *skb_data;
1193 u16 rx_len;
e7f767a7 1194 __le16 pkt_len;
d930faee 1195
dd04e6ac 1196 rd_index = card->rxbd_rdptr & reg->rx_mask;
d930faee
AK
1197 skb_data = card->rx_buf_list[rd_index];
1198
e7f767a7
AP
1199 MWIFIEX_SKB_PACB(skb_data, &buf_pa);
1200 pci_unmap_single(card->dev, buf_pa, MWIFIEX_RX_DATA_BUF_SIZE,
1201 PCI_DMA_FROMDEVICE);
1202 card->rx_buf_list[rd_index] = NULL;
1203
d930faee 1204 /* Get data length from interface header -
e7f767a7
AP
1205 * first 2 bytes for len, next 2 bytes is for type
1206 */
1207 pkt_len = *((__le16 *)skb_data->data);
1208 rx_len = le16_to_cpu(pkt_len);
1209 skb_put(skb_data, rx_len);
f57c1edc
YAP
1210 dev_dbg(adapter->dev,
1211 "info: RECV DATA: Rd=%#x, Wr=%#x, Len=%d\n",
1212 card->rxbd_rdptr, wrptr, rx_len);
e7f767a7
AP
1213 skb_pull(skb_data, INTF_HEADER_LEN);
1214 mwifiex_handle_rx_packet(adapter, skb_data);
1215
1216 skb_tmp = dev_alloc_skb(MWIFIEX_RX_DATA_BUF_SIZE);
d930faee 1217 if (!skb_tmp) {
e7f767a7
AP
1218 dev_err(adapter->dev,
1219 "Unable to allocate skb.\n");
1220 return -ENOMEM;
d930faee
AK
1221 }
1222
e7f767a7
AP
1223 if (mwifiex_map_pci_memory(adapter, skb_tmp,
1224 MWIFIEX_RX_DATA_BUF_SIZE,
1225 PCI_DMA_FROMDEVICE))
1226 return -1;
1227
1228 MWIFIEX_SKB_PACB(skb_tmp, &buf_pa);
1229
1230 dev_dbg(adapter->dev,
1231 "RECV DATA: Attach new sk_buff %p at rxbd_rdidx=%d\n",
1232 skb_tmp, rd_index);
1233 card->rx_buf_list[rd_index] = skb_tmp;
ca8f2112
AP
1234
1235 if (reg->pfu_enabled) {
1236 desc2 = (void *)card->rxbd_ring[rd_index];
1237 desc2->paddr = buf_pa;
1238 desc2->len = skb_tmp->len;
1239 desc2->frag_len = skb_tmp->len;
1240 desc2->offset = 0;
1241 desc2->flags = reg->ring_flag_sop | reg->ring_flag_eop;
1242 } else {
1243 desc = card->rxbd_ring[rd_index];
1244 desc->paddr = buf_pa;
1245 desc->len = skb_tmp->len;
1246 desc->flags = 0;
1247 }
d930faee 1248
dd04e6ac 1249 if ((++card->rxbd_rdptr & reg->rx_mask) ==
d930faee
AK
1250 MWIFIEX_MAX_TXRX_BD) {
1251 card->rxbd_rdptr = ((card->rxbd_rdptr &
dd04e6ac
AP
1252 reg->rx_rollover_ind) ^
1253 reg->rx_rollover_ind);
d930faee
AK
1254 }
1255 dev_dbg(adapter->dev, "info: RECV DATA: <Rd: %#x, Wr: %#x>\n",
f57c1edc 1256 card->rxbd_rdptr, wrptr);
d930faee 1257
ca8f2112 1258 tx_val = card->txbd_wrptr & reg->tx_wrap_mask;
dd04e6ac
AP
1259 /* Write the RX ring read pointer in to reg->rx_rdptr */
1260 if (mwifiex_write_reg(adapter, reg->rx_rdptr,
ca8f2112 1261 card->rxbd_rdptr | tx_val)) {
f57c1edc 1262 dev_err(adapter->dev,
dd04e6ac 1263 "RECV DATA: failed to write reg->rx_rdptr\n");
d930faee
AK
1264 ret = -1;
1265 goto done;
1266 }
1267
1268 /* Read the RX ring Write pointer set by firmware */
dd04e6ac 1269 if (mwifiex_read_reg(adapter, reg->rx_wrptr, &wrptr)) {
f57c1edc 1270 dev_err(adapter->dev,
dd04e6ac 1271 "RECV DATA: failed to read reg->rx_wrptr\n");
d930faee
AK
1272 ret = -1;
1273 goto done;
1274 }
f57c1edc
YAP
1275 dev_dbg(adapter->dev,
1276 "info: RECV DATA: Rcvd packet from fw successfully\n");
e7f767a7 1277 card->rxbd_wrptr = wrptr;
d930faee
AK
1278 }
1279
1280done:
d930faee
AK
1281 return ret;
1282}
1283
1284/*
1285 * This function downloads the boot command to device
1286 */
1287static int
1288mwifiex_pcie_send_boot_cmd(struct mwifiex_adapter *adapter, struct sk_buff *skb)
1289{
fc331460
AP
1290 dma_addr_t buf_pa;
1291 struct pcie_service_card *card = adapter->card;
dd04e6ac 1292 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee 1293
fc331460 1294 if (!(skb->data && skb->len)) {
f57c1edc 1295 dev_err(adapter->dev,
fc331460
AP
1296 "Invalid parameter in %s <%p. len %d>\n",
1297 __func__, skb->data, skb->len);
d930faee
AK
1298 return -1;
1299 }
1300
fc331460
AP
1301 if (mwifiex_map_pci_memory(adapter, skb, skb->len , PCI_DMA_TODEVICE))
1302 return -1;
1303
1304 MWIFIEX_SKB_PACB(skb, &buf_pa);
1305
dd04e6ac
AP
1306 /* Write the lower 32bits of the physical address to low command
1307 * address scratch register
1308 */
1309 if (mwifiex_write_reg(adapter, reg->cmd_addr_lo, (u32)buf_pa)) {
f57c1edc
YAP
1310 dev_err(adapter->dev,
1311 "%s: failed to write download command to boot code.\n",
1312 __func__);
fc331460
AP
1313 pci_unmap_single(card->dev, buf_pa, MWIFIEX_UPLD_SIZE,
1314 PCI_DMA_TODEVICE);
d930faee
AK
1315 return -1;
1316 }
1317
dd04e6ac
AP
1318 /* Write the upper 32bits of the physical address to high command
1319 * address scratch register
1320 */
1321 if (mwifiex_write_reg(adapter, reg->cmd_addr_hi,
fc331460 1322 (u32)((u64)buf_pa >> 32))) {
f57c1edc
YAP
1323 dev_err(adapter->dev,
1324 "%s: failed to write download command to boot code.\n",
1325 __func__);
fc331460
AP
1326 pci_unmap_single(card->dev, buf_pa, MWIFIEX_UPLD_SIZE,
1327 PCI_DMA_TODEVICE);
d930faee
AK
1328 return -1;
1329 }
1330
dd04e6ac
AP
1331 /* Write the command length to cmd_size scratch register */
1332 if (mwifiex_write_reg(adapter, reg->cmd_size, skb->len)) {
f57c1edc 1333 dev_err(adapter->dev,
dd04e6ac 1334 "%s: failed to write command len to cmd_size scratch reg\n",
f57c1edc 1335 __func__);
fc331460
AP
1336 pci_unmap_single(card->dev, buf_pa, MWIFIEX_UPLD_SIZE,
1337 PCI_DMA_TODEVICE);
d930faee
AK
1338 return -1;
1339 }
1340
1341 /* Ring the door bell */
1342 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
1343 CPU_INTR_DOOR_BELL)) {
f57c1edc
YAP
1344 dev_err(adapter->dev,
1345 "%s: failed to assert door-bell intr\n", __func__);
fc331460
AP
1346 pci_unmap_single(card->dev, buf_pa,
1347 MWIFIEX_UPLD_SIZE, PCI_DMA_TODEVICE);
d930faee
AK
1348 return -1;
1349 }
1350
1351 return 0;
1352}
1353
c6d1d87a
AP
1354/* This function init rx port in firmware which in turn enables to receive data
1355 * from device before transmitting any packet.
1356 */
1357static int mwifiex_pcie_init_fw_port(struct mwifiex_adapter *adapter)
1358{
1359 struct pcie_service_card *card = adapter->card;
dd04e6ac 1360 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
ca8f2112 1361 int tx_wrap = card->txbd_wrptr & reg->tx_wrap_mask;
c6d1d87a 1362
dd04e6ac 1363 /* Write the RX ring read pointer in to reg->rx_rdptr */
ca8f2112
AP
1364 if (mwifiex_write_reg(adapter, reg->rx_rdptr, card->rxbd_rdptr |
1365 tx_wrap)) {
c6d1d87a 1366 dev_err(adapter->dev,
dd04e6ac 1367 "RECV DATA: failed to write reg->rx_rdptr\n");
c6d1d87a
AP
1368 return -1;
1369 }
1370 return 0;
1371}
1372
1373/* This function downloads commands to the device
d930faee
AK
1374 */
1375static int
1376mwifiex_pcie_send_cmd(struct mwifiex_adapter *adapter, struct sk_buff *skb)
1377{
1378 struct pcie_service_card *card = adapter->card;
dd04e6ac 1379 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee 1380 int ret = 0;
fc331460
AP
1381 dma_addr_t cmd_buf_pa, cmdrsp_buf_pa;
1382 u8 *payload = (u8 *)skb->data;
d930faee
AK
1383
1384 if (!(skb->data && skb->len)) {
1385 dev_err(adapter->dev, "Invalid parameter in %s <%p, %#x>\n",
f57c1edc 1386 __func__, skb->data, skb->len);
d930faee
AK
1387 return -1;
1388 }
1389
1390 /* Make sure a command response buffer is available */
1391 if (!card->cmdrsp_buf) {
f57c1edc
YAP
1392 dev_err(adapter->dev,
1393 "No response buffer available, send command failed\n");
d930faee
AK
1394 return -EBUSY;
1395 }
1396
fc331460
AP
1397 if (!mwifiex_pcie_ok_to_access_hw(adapter))
1398 mwifiex_pm_wakeup_card(adapter);
d930faee
AK
1399
1400 adapter->cmd_sent = true;
fc331460
AP
1401
1402 *(__le16 *)&payload[0] = cpu_to_le16((u16)skb->len);
1403 *(__le16 *)&payload[2] = cpu_to_le16(MWIFIEX_TYPE_CMD);
1404
1405 if (mwifiex_map_pci_memory(adapter, skb, skb->len, PCI_DMA_TODEVICE))
1406 return -1;
1407
1408 card->cmd_buf = skb;
d930faee
AK
1409
1410 /* To send a command, the driver will:
1411 1. Write the 64bit physical address of the data buffer to
dd04e6ac 1412 cmd response address low + cmd response address high
d930faee
AK
1413 2. Ring the door bell (i.e. set the door bell interrupt)
1414
1415 In response to door bell interrupt, the firmware will perform
1416 the DMA of the command packet (first header to obtain the total
1417 length and then rest of the command).
1418 */
1419
1420 if (card->cmdrsp_buf) {
fc331460 1421 MWIFIEX_SKB_PACB(card->cmdrsp_buf, &cmdrsp_buf_pa);
d930faee
AK
1422 /* Write the lower 32bits of the cmdrsp buffer physical
1423 address */
dd04e6ac 1424 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_lo,
fc331460 1425 (u32)cmdrsp_buf_pa)) {
f57c1edc
YAP
1426 dev_err(adapter->dev,
1427 "Failed to write download cmd to boot code.\n");
d930faee
AK
1428 ret = -1;
1429 goto done;
1430 }
1431 /* Write the upper 32bits of the cmdrsp buffer physical
1432 address */
dd04e6ac 1433 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_hi,
fc331460 1434 (u32)((u64)cmdrsp_buf_pa >> 32))) {
f57c1edc
YAP
1435 dev_err(adapter->dev,
1436 "Failed to write download cmd to boot code.\n");
d930faee
AK
1437 ret = -1;
1438 goto done;
1439 }
1440 }
1441
fc331460 1442 MWIFIEX_SKB_PACB(card->cmd_buf, &cmd_buf_pa);
dd04e6ac
AP
1443 /* Write the lower 32bits of the physical address to reg->cmd_addr_lo */
1444 if (mwifiex_write_reg(adapter, reg->cmd_addr_lo,
1445 (u32)cmd_buf_pa)) {
f57c1edc
YAP
1446 dev_err(adapter->dev,
1447 "Failed to write download cmd to boot code.\n");
d930faee
AK
1448 ret = -1;
1449 goto done;
1450 }
dd04e6ac
AP
1451 /* Write the upper 32bits of the physical address to reg->cmd_addr_hi */
1452 if (mwifiex_write_reg(adapter, reg->cmd_addr_hi,
fc331460 1453 (u32)((u64)cmd_buf_pa >> 32))) {
f57c1edc
YAP
1454 dev_err(adapter->dev,
1455 "Failed to write download cmd to boot code.\n");
d930faee
AK
1456 ret = -1;
1457 goto done;
1458 }
1459
dd04e6ac
AP
1460 /* Write the command length to reg->cmd_size */
1461 if (mwifiex_write_reg(adapter, reg->cmd_size,
1462 card->cmd_buf->len)) {
f57c1edc 1463 dev_err(adapter->dev,
dd04e6ac 1464 "Failed to write cmd len to reg->cmd_size\n");
d930faee
AK
1465 ret = -1;
1466 goto done;
1467 }
1468
1469 /* Ring the door bell */
1470 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
1471 CPU_INTR_DOOR_BELL)) {
f57c1edc
YAP
1472 dev_err(adapter->dev,
1473 "Failed to assert door-bell intr\n");
d930faee
AK
1474 ret = -1;
1475 goto done;
1476 }
1477
1478done:
1479 if (ret)
1480 adapter->cmd_sent = false;
1481
1482 return 0;
1483}
1484
1485/*
1486 * This function handles command complete interrupt
1487 */
1488static int mwifiex_pcie_process_cmd_complete(struct mwifiex_adapter *adapter)
1489{
1490 struct pcie_service_card *card = adapter->card;
dd04e6ac 1491 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
f57c1edc 1492 struct sk_buff *skb = card->cmdrsp_buf;
d930faee 1493 int count = 0;
fc331460
AP
1494 u16 rx_len;
1495 __le16 pkt_len;
1496 dma_addr_t buf_pa;
d930faee
AK
1497
1498 dev_dbg(adapter->dev, "info: Rx CMD Response\n");
1499
fc331460
AP
1500 MWIFIEX_SKB_PACB(skb, &buf_pa);
1501 pci_unmap_single(card->dev, buf_pa, MWIFIEX_UPLD_SIZE,
1502 PCI_DMA_FROMDEVICE);
1503
1504 pkt_len = *((__le16 *)skb->data);
1505 rx_len = le16_to_cpu(pkt_len);
1506 skb_trim(skb, rx_len);
1507 skb_pull(skb, INTF_HEADER_LEN);
1508
d930faee 1509 if (!adapter->curr_cmd) {
d930faee 1510 if (adapter->ps_state == PS_STATE_SLEEP_CFM) {
f57c1edc
YAP
1511 mwifiex_process_sleep_confirm_resp(adapter, skb->data,
1512 skb->len);
52301a81
AP
1513 while (reg->sleep_cookie && (count++ < 10) &&
1514 mwifiex_pcie_ok_to_access_hw(adapter))
e7891ba2 1515 usleep_range(50, 60);
d930faee 1516 } else {
f57c1edc
YAP
1517 dev_err(adapter->dev,
1518 "There is no command but got cmdrsp\n");
d930faee 1519 }
f57c1edc
YAP
1520 memcpy(adapter->upld_buf, skb->data,
1521 min_t(u32, MWIFIEX_SIZE_OF_CMD_BUFFER, skb->len));
0f49d64c 1522 skb_push(skb, INTF_HEADER_LEN);
fc331460
AP
1523 if (mwifiex_map_pci_memory(adapter, skb, MWIFIEX_UPLD_SIZE,
1524 PCI_DMA_FROMDEVICE))
1525 return -1;
1526
1527 MWIFIEX_SKB_PACB(skb, &buf_pa);
d930faee 1528 } else if (mwifiex_pcie_ok_to_access_hw(adapter)) {
f57c1edc 1529 adapter->curr_cmd->resp_skb = skb;
d930faee
AK
1530 adapter->cmd_resp_received = true;
1531 /* Take the pointer and set it to CMD node and will
1532 return in the response complete callback */
1533 card->cmdrsp_buf = NULL;
1534
1535 /* Clear the cmd-rsp buffer address in scratch registers. This
1536 will prevent firmware from writing to the same response
1537 buffer again. */
dd04e6ac 1538 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_lo, 0)) {
f57c1edc
YAP
1539 dev_err(adapter->dev,
1540 "cmd_done: failed to clear cmd_rsp_addr_lo\n");
d930faee
AK
1541 return -1;
1542 }
1543 /* Write the upper 32bits of the cmdrsp buffer physical
1544 address */
dd04e6ac 1545 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_hi, 0)) {
f57c1edc
YAP
1546 dev_err(adapter->dev,
1547 "cmd_done: failed to clear cmd_rsp_addr_hi\n");
d930faee
AK
1548 return -1;
1549 }
1550 }
1551
1552 return 0;
1553}
1554
1555/*
1556 * Command Response processing complete handler
1557 */
1558static int mwifiex_pcie_cmdrsp_complete(struct mwifiex_adapter *adapter,
1559 struct sk_buff *skb)
1560{
1561 struct pcie_service_card *card = adapter->card;
fc331460
AP
1562 dma_addr_t buf_pa;
1563 struct sk_buff *skb_tmp;
d930faee
AK
1564
1565 if (skb) {
1566 card->cmdrsp_buf = skb;
1567 skb_push(card->cmdrsp_buf, INTF_HEADER_LEN);
fc331460
AP
1568 if (mwifiex_map_pci_memory(adapter, skb, MWIFIEX_UPLD_SIZE,
1569 PCI_DMA_FROMDEVICE))
1570 return -1;
1571 }
1572
1573 skb_tmp = card->cmd_buf;
1574 if (skb_tmp) {
1575 MWIFIEX_SKB_PACB(skb_tmp, &buf_pa);
1576 pci_unmap_single(card->dev, buf_pa, MWIFIEX_UPLD_SIZE,
1577 PCI_DMA_FROMDEVICE);
1578 card->cmd_buf = NULL;
d930faee
AK
1579 }
1580
1581 return 0;
1582}
1583
1584/*
1585 * This function handles firmware event ready interrupt
1586 */
1587static int mwifiex_pcie_process_event_ready(struct mwifiex_adapter *adapter)
1588{
1589 struct pcie_service_card *card = adapter->card;
dd04e6ac 1590 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee
AK
1591 u32 rdptr = card->evtbd_rdptr & MWIFIEX_EVTBD_MASK;
1592 u32 wrptr, event;
fc331460 1593 dma_addr_t buf_pa;
e05dc3e9 1594 struct mwifiex_evt_buf_desc *desc;
fc331460
AP
1595
1596 if (!mwifiex_pcie_ok_to_access_hw(adapter))
1597 mwifiex_pm_wakeup_card(adapter);
d930faee
AK
1598
1599 if (adapter->event_received) {
f57c1edc
YAP
1600 dev_dbg(adapter->dev, "info: Event being processed, "
1601 "do not process this interrupt just yet\n");
d930faee
AK
1602 return 0;
1603 }
1604
1605 if (rdptr >= MWIFIEX_MAX_EVT_BD) {
1606 dev_dbg(adapter->dev, "info: Invalid read pointer...\n");
1607 return -1;
1608 }
1609
1610 /* Read the event ring write pointer set by firmware */
dd04e6ac 1611 if (mwifiex_read_reg(adapter, reg->evt_wrptr, &wrptr)) {
f57c1edc 1612 dev_err(adapter->dev,
dd04e6ac 1613 "EventReady: failed to read reg->evt_wrptr\n");
d930faee
AK
1614 return -1;
1615 }
1616
1617 dev_dbg(adapter->dev, "info: EventReady: Initial <Rd: 0x%x, Wr: 0x%x>",
f57c1edc
YAP
1618 card->evtbd_rdptr, wrptr);
1619 if (((wrptr & MWIFIEX_EVTBD_MASK) != (card->evtbd_rdptr
1620 & MWIFIEX_EVTBD_MASK)) ||
dd04e6ac
AP
1621 ((wrptr & reg->evt_rollover_ind) ==
1622 (card->evtbd_rdptr & reg->evt_rollover_ind))) {
d930faee
AK
1623 struct sk_buff *skb_cmd;
1624 __le16 data_len = 0;
1625 u16 evt_len;
1626
1627 dev_dbg(adapter->dev, "info: Read Index: %d\n", rdptr);
1628 skb_cmd = card->evt_buf_list[rdptr];
fc331460
AP
1629 MWIFIEX_SKB_PACB(skb_cmd, &buf_pa);
1630 pci_unmap_single(card->dev, buf_pa, MAX_EVENT_SIZE,
1631 PCI_DMA_FROMDEVICE);
1632
d930faee
AK
1633 /* Take the pointer and set it to event pointer in adapter
1634 and will return back after event handling callback */
1635 card->evt_buf_list[rdptr] = NULL;
e05dc3e9
AP
1636 desc = card->evtbd_ring[rdptr];
1637 memset(desc, 0, sizeof(*desc));
d930faee
AK
1638
1639 event = *(u32 *) &skb_cmd->data[INTF_HEADER_LEN];
1640 adapter->event_cause = event;
1641 /* The first 4bytes will be the event transfer header
1642 len is 2 bytes followed by type which is 2 bytes */
1643 memcpy(&data_len, skb_cmd->data, sizeof(__le16));
1644 evt_len = le16_to_cpu(data_len);
1645
1646 skb_pull(skb_cmd, INTF_HEADER_LEN);
1647 dev_dbg(adapter->dev, "info: Event length: %d\n", evt_len);
1648
1649 if ((evt_len > 0) && (evt_len < MAX_EVENT_SIZE))
1650 memcpy(adapter->event_body, skb_cmd->data +
1651 MWIFIEX_EVENT_HEADER_LEN, evt_len -
1652 MWIFIEX_EVENT_HEADER_LEN);
1653
1654 adapter->event_received = true;
1655 adapter->event_skb = skb_cmd;
1656
1657 /* Do not update the event read pointer here, wait till the
1658 buffer is released. This is just to make things simpler,
1659 we need to find a better method of managing these buffers.
1660 */
1661 }
1662
1663 return 0;
1664}
1665
1666/*
1667 * Event processing complete handler
1668 */
1669static int mwifiex_pcie_event_complete(struct mwifiex_adapter *adapter,
1670 struct sk_buff *skb)
1671{
1672 struct pcie_service_card *card = adapter->card;
dd04e6ac 1673 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee
AK
1674 int ret = 0;
1675 u32 rdptr = card->evtbd_rdptr & MWIFIEX_EVTBD_MASK;
1676 u32 wrptr;
fc331460 1677 dma_addr_t buf_pa;
e05dc3e9 1678 struct mwifiex_evt_buf_desc *desc;
d930faee
AK
1679
1680 if (!skb)
1681 return 0;
1682
1eb54c8a 1683 if (rdptr >= MWIFIEX_MAX_EVT_BD) {
d930faee 1684 dev_err(adapter->dev, "event_complete: Invalid rdptr 0x%x\n",
f57c1edc 1685 rdptr);
8c53e42d 1686 return -EINVAL;
1eb54c8a 1687 }
d930faee
AK
1688
1689 /* Read the event ring write pointer set by firmware */
dd04e6ac 1690 if (mwifiex_read_reg(adapter, reg->evt_wrptr, &wrptr)) {
f57c1edc 1691 dev_err(adapter->dev,
dd04e6ac 1692 "event_complete: failed to read reg->evt_wrptr\n");
8c53e42d 1693 return -1;
d930faee
AK
1694 }
1695
1696 if (!card->evt_buf_list[rdptr]) {
1697 skb_push(skb, INTF_HEADER_LEN);
fc331460
AP
1698 if (mwifiex_map_pci_memory(adapter, skb,
1699 MAX_EVENT_SIZE,
1700 PCI_DMA_FROMDEVICE))
1701 return -1;
1702 MWIFIEX_SKB_PACB(skb, &buf_pa);
d930faee 1703 card->evt_buf_list[rdptr] = skb;
fc331460 1704 MWIFIEX_SKB_PACB(skb, &buf_pa);
e05dc3e9
AP
1705 desc = card->evtbd_ring[rdptr];
1706 desc->paddr = buf_pa;
1707 desc->len = (u16)skb->len;
1708 desc->flags = 0;
d930faee
AK
1709 skb = NULL;
1710 } else {
f57c1edc
YAP
1711 dev_dbg(adapter->dev,
1712 "info: ERROR: buf still valid at index %d, <%p, %p>\n",
1713 rdptr, card->evt_buf_list[rdptr], skb);
d930faee
AK
1714 }
1715
1716 if ((++card->evtbd_rdptr & MWIFIEX_EVTBD_MASK) == MWIFIEX_MAX_EVT_BD) {
1717 card->evtbd_rdptr = ((card->evtbd_rdptr &
dd04e6ac
AP
1718 reg->evt_rollover_ind) ^
1719 reg->evt_rollover_ind);
d930faee
AK
1720 }
1721
1722 dev_dbg(adapter->dev, "info: Updated <Rd: 0x%x, Wr: 0x%x>",
f57c1edc 1723 card->evtbd_rdptr, wrptr);
d930faee 1724
dd04e6ac
AP
1725 /* Write the event ring read pointer in to reg->evt_rdptr */
1726 if (mwifiex_write_reg(adapter, reg->evt_rdptr,
1727 card->evtbd_rdptr)) {
f57c1edc 1728 dev_err(adapter->dev,
dd04e6ac 1729 "event_complete: failed to read reg->evt_rdptr\n");
8c53e42d 1730 return -1;
d930faee
AK
1731 }
1732
d930faee
AK
1733 dev_dbg(adapter->dev, "info: Check Events Again\n");
1734 ret = mwifiex_pcie_process_event_ready(adapter);
1735
1736 return ret;
1737}
1738
1739/*
1740 * This function downloads the firmware to the card.
1741 *
1742 * Firmware is downloaded to the card in blocks. Every block download
1743 * is tested for CRC errors, and retried a number of times before
1744 * returning failure.
1745 */
1746static int mwifiex_prog_fw_w_helper(struct mwifiex_adapter *adapter,
1747 struct mwifiex_fw_image *fw)
1748{
1749 int ret;
1750 u8 *firmware = fw->fw_buf;
1751 u32 firmware_len = fw->fw_len;
1752 u32 offset = 0;
1753 struct sk_buff *skb;
1754 u32 txlen, tx_blocks = 0, tries, len;
1755 u32 block_retry_cnt = 0;
fc331460
AP
1756 dma_addr_t buf_pa;
1757 struct pcie_service_card *card = adapter->card;
dd04e6ac 1758 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee
AK
1759
1760 if (!firmware || !firmware_len) {
f57c1edc
YAP
1761 dev_err(adapter->dev,
1762 "No firmware image found! Terminating download\n");
d930faee
AK
1763 return -1;
1764 }
1765
1766 dev_dbg(adapter->dev, "info: Downloading FW image (%d bytes)\n",
f57c1edc 1767 firmware_len);
d930faee
AK
1768
1769 if (mwifiex_pcie_disable_host_int(adapter)) {
f57c1edc
YAP
1770 dev_err(adapter->dev,
1771 "%s: Disabling interrupts failed.\n", __func__);
d930faee
AK
1772 return -1;
1773 }
1774
1775 skb = dev_alloc_skb(MWIFIEX_UPLD_SIZE);
1776 if (!skb) {
1777 ret = -ENOMEM;
1778 goto done;
1779 }
d930faee
AK
1780
1781 /* Perform firmware data transfer */
1782 do {
1783 u32 ireg_intr = 0;
1784
1785 /* More data? */
1786 if (offset >= firmware_len)
1787 break;
1788
1789 for (tries = 0; tries < MAX_POLL_TRIES; tries++) {
dd04e6ac 1790 ret = mwifiex_read_reg(adapter, reg->cmd_size,
d930faee
AK
1791 &len);
1792 if (ret) {
f57c1edc
YAP
1793 dev_warn(adapter->dev,
1794 "Failed reading len from boot code\n");
d930faee
AK
1795 goto done;
1796 }
1797 if (len)
1798 break;
e7891ba2 1799 usleep_range(10, 20);
d930faee
AK
1800 }
1801
1802 if (!len) {
1803 break;
1804 } else if (len > MWIFIEX_UPLD_SIZE) {
1805 pr_err("FW download failure @ %d, invalid length %d\n",
f57c1edc 1806 offset, len);
d930faee
AK
1807 ret = -1;
1808 goto done;
1809 }
1810
1811 txlen = len;
1812
1813 if (len & BIT(0)) {
1814 block_retry_cnt++;
1815 if (block_retry_cnt > MAX_WRITE_IOMEM_RETRY) {
1816 pr_err("FW download failure @ %d, over max "
1817 "retry count\n", offset);
1818 ret = -1;
1819 goto done;
1820 }
1821 dev_err(adapter->dev, "FW CRC error indicated by the "
f57c1edc
YAP
1822 "helper: len = 0x%04X, txlen = %d\n",
1823 len, txlen);
d930faee
AK
1824 len &= ~BIT(0);
1825 /* Setting this to 0 to resend from same offset */
1826 txlen = 0;
1827 } else {
1828 block_retry_cnt = 0;
1829 /* Set blocksize to transfer - checking for
1830 last block */
1831 if (firmware_len - offset < txlen)
1832 txlen = firmware_len - offset;
1833
1834 dev_dbg(adapter->dev, ".");
1835
dd04e6ac
AP
1836 tx_blocks = (txlen + card->pcie.blksz_fw_dl - 1) /
1837 card->pcie.blksz_fw_dl;
d930faee
AK
1838
1839 /* Copy payload to buffer */
1840 memmove(skb->data, &firmware[offset], txlen);
1841 }
1842
1843 skb_put(skb, MWIFIEX_UPLD_SIZE - skb->len);
dd04e6ac 1844 skb_trim(skb, tx_blocks * card->pcie.blksz_fw_dl);
d930faee
AK
1845
1846 /* Send the boot command to device */
1847 if (mwifiex_pcie_send_boot_cmd(adapter, skb)) {
f57c1edc
YAP
1848 dev_err(adapter->dev,
1849 "Failed to send firmware download command\n");
d930faee
AK
1850 ret = -1;
1851 goto done;
1852 }
fc331460
AP
1853
1854 MWIFIEX_SKB_PACB(skb, &buf_pa);
1855
d930faee
AK
1856 /* Wait for the command done interrupt */
1857 do {
1858 if (mwifiex_read_reg(adapter, PCIE_CPU_INT_STATUS,
1859 &ireg_intr)) {
1860 dev_err(adapter->dev, "%s: Failed to read "
f57c1edc
YAP
1861 "interrupt status during fw dnld.\n",
1862 __func__);
fc331460
AP
1863 pci_unmap_single(card->dev, buf_pa, skb->len,
1864 PCI_DMA_TODEVICE);
d930faee
AK
1865 ret = -1;
1866 goto done;
1867 }
1868 } while ((ireg_intr & CPU_INTR_DOOR_BELL) ==
1869 CPU_INTR_DOOR_BELL);
fc331460
AP
1870
1871 pci_unmap_single(card->dev, buf_pa, skb->len,
1872 PCI_DMA_TODEVICE);
1873
d930faee
AK
1874 offset += txlen;
1875 } while (true);
1876
1877 dev_dbg(adapter->dev, "info:\nFW download over, size %d bytes\n",
f57c1edc 1878 offset);
d930faee
AK
1879
1880 ret = 0;
1881
1882done:
1883 dev_kfree_skb_any(skb);
1884 return ret;
1885}
1886
1887/*
1888 * This function checks the firmware status in card.
1889 *
1890 * The winner interface is also determined by this function.
1891 */
1892static int
1893mwifiex_check_fw_status(struct mwifiex_adapter *adapter, u32 poll_num)
1894{
1895 int ret = 0;
1896 u32 firmware_stat, winner_status;
dd04e6ac
AP
1897 struct pcie_service_card *card = adapter->card;
1898 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee
AK
1899 u32 tries;
1900
1901 /* Mask spurios interrupts */
1902 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_STATUS_MASK,
f57c1edc 1903 HOST_INTR_MASK)) {
d930faee
AK
1904 dev_warn(adapter->dev, "Write register failed\n");
1905 return -1;
1906 }
1907
1908 dev_dbg(adapter->dev, "Setting driver ready signature\n");
dd04e6ac
AP
1909 if (mwifiex_write_reg(adapter, reg->drv_rdy,
1910 FIRMWARE_READY_PCIE)) {
f57c1edc
YAP
1911 dev_err(adapter->dev,
1912 "Failed to write driver ready signature\n");
d930faee
AK
1913 return -1;
1914 }
1915
1916 /* Wait for firmware initialization event */
1917 for (tries = 0; tries < poll_num; tries++) {
dd04e6ac 1918 if (mwifiex_read_reg(adapter, reg->fw_status,
d930faee
AK
1919 &firmware_stat))
1920 ret = -1;
1921 else
1922 ret = 0;
1923 if (ret)
1924 continue;
1925 if (firmware_stat == FIRMWARE_READY_PCIE) {
1926 ret = 0;
1927 break;
1928 } else {
1929 mdelay(100);
1930 ret = -1;
1931 }
1932 }
1933
1934 if (ret) {
dd04e6ac 1935 if (mwifiex_read_reg(adapter, reg->fw_status,
d930faee
AK
1936 &winner_status))
1937 ret = -1;
1938 else if (!winner_status) {
1939 dev_err(adapter->dev, "PCI-E is the winner\n");
1940 adapter->winner = 1;
1941 ret = -1;
1942 } else {
f57c1edc
YAP
1943 dev_err(adapter->dev,
1944 "PCI-E is not the winner <%#x,%d>, exit dnld\n",
1945 ret, adapter->winner);
d930faee
AK
1946 ret = 0;
1947 }
1948 }
1949
1950 return ret;
1951}
1952
1953/*
1954 * This function reads the interrupt status from card.
1955 */
1956static void mwifiex_interrupt_status(struct mwifiex_adapter *adapter)
1957{
1958 u32 pcie_ireg;
1959 unsigned long flags;
1960
1961 if (!mwifiex_pcie_ok_to_access_hw(adapter))
1962 return;
1963
1964 if (mwifiex_read_reg(adapter, PCIE_HOST_INT_STATUS, &pcie_ireg)) {
1965 dev_warn(adapter->dev, "Read register failed\n");
1966 return;
1967 }
1968
1969 if ((pcie_ireg != 0xFFFFFFFF) && (pcie_ireg)) {
1970
1971 mwifiex_pcie_disable_host_int(adapter);
1972
1973 /* Clear the pending interrupts */
1974 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_STATUS,
1975 ~pcie_ireg)) {
1976 dev_warn(adapter->dev, "Write register failed\n");
1977 return;
1978 }
1979 spin_lock_irqsave(&adapter->int_lock, flags);
1980 adapter->int_status |= pcie_ireg;
1981 spin_unlock_irqrestore(&adapter->int_lock, flags);
1982
1983 if (pcie_ireg & HOST_INTR_CMD_DONE) {
1984 if ((adapter->ps_state == PS_STATE_SLEEP_CFM) ||
1985 (adapter->ps_state == PS_STATE_SLEEP)) {
1986 mwifiex_pcie_enable_host_int(adapter);
1987 if (mwifiex_write_reg(adapter,
f57c1edc
YAP
1988 PCIE_CPU_INT_EVENT,
1989 CPU_INTR_SLEEP_CFM_DONE)
1990 ) {
1991 dev_warn(adapter->dev,
1992 "Write register failed\n");
d930faee
AK
1993 return;
1994
1995 }
1996 }
1997 } else if (!adapter->pps_uapsd_mode &&
c24d992a
AP
1998 adapter->ps_state == PS_STATE_SLEEP &&
1999 mwifiex_pcie_ok_to_access_hw(adapter)) {
d930faee
AK
2000 /* Potentially for PCIe we could get other
2001 * interrupts like shared. Don't change power
2002 * state until cookie is set */
c24d992a
AP
2003 adapter->ps_state = PS_STATE_AWAKE;
2004 adapter->pm_wakeup_fw_try = false;
d930faee
AK
2005 }
2006 }
2007}
2008
2009/*
2010 * Interrupt handler for PCIe root port
2011 *
2012 * This function reads the interrupt status from firmware and assigns
2013 * the main process in workqueue which will handle the interrupt.
2014 */
2015static irqreturn_t mwifiex_pcie_interrupt(int irq, void *context)
2016{
2017 struct pci_dev *pdev = (struct pci_dev *)context;
2018 struct pcie_service_card *card;
2019 struct mwifiex_adapter *adapter;
2020
2021 if (!pdev) {
2022 pr_debug("info: %s: pdev is NULL\n", (u8 *)pdev);
2023 goto exit;
2024 }
2025
2026 card = (struct pcie_service_card *) pci_get_drvdata(pdev);
2027 if (!card || !card->adapter) {
2028 pr_debug("info: %s: card=%p adapter=%p\n", __func__, card,
f57c1edc 2029 card ? card->adapter : NULL);
d930faee
AK
2030 goto exit;
2031 }
2032 adapter = card->adapter;
2033
2034 if (adapter->surprise_removed)
2035 goto exit;
2036
2037 mwifiex_interrupt_status(adapter);
2038 queue_work(adapter->workqueue, &adapter->main_work);
2039
2040exit:
2041 return IRQ_HANDLED;
2042}
2043
2044/*
2045 * This function checks the current interrupt status.
2046 *
2047 * The following interrupts are checked and handled by this function -
2048 * - Data sent
2049 * - Command sent
2050 * - Command received
2051 * - Packets received
2052 * - Events received
2053 *
2054 * In case of Rx packets received, the packets are uploaded from card to
2055 * host and processed accordingly.
2056 */
2057static int mwifiex_process_int_status(struct mwifiex_adapter *adapter)
2058{
2059 int ret;
659c4788 2060 u32 pcie_ireg;
d930faee
AK
2061 unsigned long flags;
2062
2063 spin_lock_irqsave(&adapter->int_lock, flags);
2064 /* Clear out unused interrupts */
659c4788
AP
2065 pcie_ireg = adapter->int_status;
2066 adapter->int_status = 0;
d930faee
AK
2067 spin_unlock_irqrestore(&adapter->int_lock, flags);
2068
659c4788
AP
2069 while (pcie_ireg & HOST_INTR_MASK) {
2070 if (pcie_ireg & HOST_INTR_DNLD_DONE) {
2071 pcie_ireg &= ~HOST_INTR_DNLD_DONE;
e7f767a7
AP
2072 dev_dbg(adapter->dev, "info: TX DNLD Done\n");
2073 ret = mwifiex_pcie_send_data_complete(adapter);
2074 if (ret)
2075 return ret;
d930faee 2076 }
659c4788
AP
2077 if (pcie_ireg & HOST_INTR_UPLD_RDY) {
2078 pcie_ireg &= ~HOST_INTR_UPLD_RDY;
d930faee
AK
2079 dev_dbg(adapter->dev, "info: Rx DATA\n");
2080 ret = mwifiex_pcie_process_recv_data(adapter);
2081 if (ret)
2082 return ret;
2083 }
659c4788
AP
2084 if (pcie_ireg & HOST_INTR_EVENT_RDY) {
2085 pcie_ireg &= ~HOST_INTR_EVENT_RDY;
d930faee
AK
2086 dev_dbg(adapter->dev, "info: Rx EVENT\n");
2087 ret = mwifiex_pcie_process_event_ready(adapter);
2088 if (ret)
2089 return ret;
2090 }
2091
659c4788
AP
2092 if (pcie_ireg & HOST_INTR_CMD_DONE) {
2093 pcie_ireg &= ~HOST_INTR_CMD_DONE;
d930faee 2094 if (adapter->cmd_sent) {
f57c1edc
YAP
2095 dev_dbg(adapter->dev,
2096 "info: CMD sent Interrupt\n");
d930faee
AK
2097 adapter->cmd_sent = false;
2098 }
2099 /* Handle command response */
2100 ret = mwifiex_pcie_process_cmd_complete(adapter);
2101 if (ret)
2102 return ret;
2103 }
2104
2105 if (mwifiex_pcie_ok_to_access_hw(adapter)) {
2106 if (mwifiex_read_reg(adapter, PCIE_HOST_INT_STATUS,
2107 &pcie_ireg)) {
f57c1edc
YAP
2108 dev_warn(adapter->dev,
2109 "Read register failed\n");
d930faee
AK
2110 return -1;
2111 }
2112
2113 if ((pcie_ireg != 0xFFFFFFFF) && (pcie_ireg)) {
2114 if (mwifiex_write_reg(adapter,
f57c1edc
YAP
2115 PCIE_HOST_INT_STATUS,
2116 ~pcie_ireg)) {
2117 dev_warn(adapter->dev,
2118 "Write register failed\n");
d930faee
AK
2119 return -1;
2120 }
d930faee
AK
2121 }
2122
2123 }
2124 }
2125 dev_dbg(adapter->dev, "info: cmd_sent=%d data_sent=%d\n",
f57c1edc 2126 adapter->cmd_sent, adapter->data_sent);
b2fda1f6
AP
2127 if (adapter->ps_state != PS_STATE_SLEEP)
2128 mwifiex_pcie_enable_host_int(adapter);
d930faee
AK
2129
2130 return 0;
2131}
2132
2133/*
2134 * This function downloads data from driver to card.
2135 *
2136 * Both commands and data packets are transferred to the card by this
2137 * function.
2138 *
2139 * This function adds the PCIE specific header to the front of the buffer
2140 * before transferring. The header contains the length of the packet and
2141 * the type. The firmware handles the packets based upon this set type.
2142 */
2143static int mwifiex_pcie_host_to_card(struct mwifiex_adapter *adapter, u8 type,
2144 struct sk_buff *skb,
2145 struct mwifiex_tx_param *tx_param)
2146{
fa161cb7
DC
2147 if (!skb) {
2148 dev_err(adapter->dev, "Passed NULL skb to %s\n", __func__);
d930faee
AK
2149 return -1;
2150 }
2151
2152 if (type == MWIFIEX_TYPE_DATA)
e7f767a7 2153 return mwifiex_pcie_send_data(adapter, skb, tx_param);
d930faee
AK
2154 else if (type == MWIFIEX_TYPE_CMD)
2155 return mwifiex_pcie_send_cmd(adapter, skb);
2156
2157 return 0;
2158}
2159
2160/*
2161 * This function initializes the PCI-E host memory space, WCB rings, etc.
2162 *
2163 * The following initializations steps are followed -
2164 * - Allocate TXBD ring buffers
2165 * - Allocate RXBD ring buffers
2166 * - Allocate event BD ring buffers
2167 * - Allocate command response ring buffer
2168 * - Allocate sleep cookie buffer
2169 */
2170static int mwifiex_pcie_init(struct mwifiex_adapter *adapter)
2171{
2172 struct pcie_service_card *card = adapter->card;
2173 int ret;
2174 struct pci_dev *pdev = card->dev;
52301a81 2175 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee
AK
2176
2177 pci_set_drvdata(pdev, card);
2178
2179 ret = pci_enable_device(pdev);
2180 if (ret)
2181 goto err_enable_dev;
2182
2183 pci_set_master(pdev);
2184
2185 dev_dbg(adapter->dev, "try set_consistent_dma_mask(32)\n");
2186 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
2187 if (ret) {
2188 dev_err(adapter->dev, "set_dma_mask(32) failed\n");
2189 goto err_set_dma_mask;
2190 }
2191
2192 ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
2193 if (ret) {
2194 dev_err(adapter->dev, "set_consistent_dma_mask(64) failed\n");
2195 goto err_set_dma_mask;
2196 }
2197
2198 ret = pci_request_region(pdev, 0, DRV_NAME);
2199 if (ret) {
2200 dev_err(adapter->dev, "req_reg(0) error\n");
2201 goto err_req_region0;
2202 }
2203 card->pci_mmap = pci_iomap(pdev, 0, 0);
2204 if (!card->pci_mmap) {
2205 dev_err(adapter->dev, "iomap(0) error\n");
3220712d 2206 ret = -EIO;
d930faee
AK
2207 goto err_iomap0;
2208 }
2209 ret = pci_request_region(pdev, 2, DRV_NAME);
2210 if (ret) {
2211 dev_err(adapter->dev, "req_reg(2) error\n");
2212 goto err_req_region2;
2213 }
2214 card->pci_mmap1 = pci_iomap(pdev, 2, 0);
2215 if (!card->pci_mmap1) {
2216 dev_err(adapter->dev, "iomap(2) error\n");
3220712d 2217 ret = -EIO;
d930faee
AK
2218 goto err_iomap2;
2219 }
2220
f57c1edc
YAP
2221 dev_dbg(adapter->dev,
2222 "PCI memory map Virt0: %p PCI memory map Virt2: %p\n",
2223 card->pci_mmap, card->pci_mmap1);
d930faee
AK
2224
2225 card->cmdrsp_buf = NULL;
2226 ret = mwifiex_pcie_create_txbd_ring(adapter);
2227 if (ret)
2228 goto err_cre_txbd;
2229 ret = mwifiex_pcie_create_rxbd_ring(adapter);
2230 if (ret)
2231 goto err_cre_rxbd;
2232 ret = mwifiex_pcie_create_evtbd_ring(adapter);
2233 if (ret)
2234 goto err_cre_evtbd;
2235 ret = mwifiex_pcie_alloc_cmdrsp_buf(adapter);
2236 if (ret)
2237 goto err_alloc_cmdbuf;
52301a81
AP
2238 if (reg->sleep_cookie) {
2239 ret = mwifiex_pcie_alloc_sleep_cookie_buf(adapter);
2240 if (ret)
2241 goto err_alloc_cookie;
2242 } else {
2243 card->sleep_cookie_vbase = NULL;
2244 }
d930faee
AK
2245 return ret;
2246
2247err_alloc_cookie:
2248 mwifiex_pcie_delete_cmdrsp_buf(adapter);
2249err_alloc_cmdbuf:
2250 mwifiex_pcie_delete_evtbd_ring(adapter);
2251err_cre_evtbd:
2252 mwifiex_pcie_delete_rxbd_ring(adapter);
2253err_cre_rxbd:
2254 mwifiex_pcie_delete_txbd_ring(adapter);
2255err_cre_txbd:
2256 pci_iounmap(pdev, card->pci_mmap1);
2257err_iomap2:
2258 pci_release_region(pdev, 2);
2259err_req_region2:
2260 pci_iounmap(pdev, card->pci_mmap);
2261err_iomap0:
2262 pci_release_region(pdev, 0);
2263err_req_region0:
2264err_set_dma_mask:
2265 pci_disable_device(pdev);
2266err_enable_dev:
2267 pci_set_drvdata(pdev, NULL);
2268 return ret;
2269}
2270
2271/*
2272 * This function cleans up the allocated card buffers.
2273 *
2274 * The following are freed by this function -
2275 * - TXBD ring buffers
2276 * - RXBD ring buffers
2277 * - Event BD ring buffers
2278 * - Command response ring buffer
2279 * - Sleep cookie buffer
2280 */
2281static void mwifiex_pcie_cleanup(struct mwifiex_adapter *adapter)
2282{
2283 struct pcie_service_card *card = adapter->card;
2284 struct pci_dev *pdev = card->dev;
dd04e6ac 2285 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee 2286
d930faee 2287 if (user_rmmod) {
fc331460 2288 dev_dbg(adapter->dev, "Clearing driver ready signature\n");
dd04e6ac 2289 if (mwifiex_write_reg(adapter, reg->drv_rdy, 0x00000000))
f57c1edc
YAP
2290 dev_err(adapter->dev,
2291 "Failed to write driver not-ready signature\n");
d930faee
AK
2292 }
2293
2294 if (pdev) {
2295 pci_iounmap(pdev, card->pci_mmap);
2296 pci_iounmap(pdev, card->pci_mmap1);
c380aafb
YAP
2297 pci_release_region(pdev, 2);
2298 pci_release_region(pdev, 0);
d930faee
AK
2299 pci_disable_device(pdev);
2300 pci_set_drvdata(pdev, NULL);
2301 }
2302}
2303
2304/*
2305 * This function registers the PCIE device.
2306 *
2307 * PCIE IRQ is claimed, block size is set and driver data is initialized.
2308 */
2309static int mwifiex_register_dev(struct mwifiex_adapter *adapter)
2310{
2311 int ret;
2312 struct pcie_service_card *card = adapter->card;
2313 struct pci_dev *pdev = card->dev;
2314
2315 /* save adapter pointer in card */
2316 card->adapter = adapter;
2317
2318 ret = request_irq(pdev->irq, mwifiex_pcie_interrupt, IRQF_SHARED,
2319 "MRVL_PCIE", pdev);
2320 if (ret) {
2321 pr_err("request_irq failed: ret=%d\n", ret);
2322 adapter->card = NULL;
2323 return -1;
2324 }
2325
2326 adapter->dev = &pdev->dev;
dd04e6ac 2327 strcpy(adapter->fw_name, card->pcie.firmware);
d930faee
AK
2328
2329 return 0;
2330}
2331
2332/*
2333 * This function unregisters the PCIE device.
2334 *
2335 * The PCIE IRQ is released, the function is disabled and driver
2336 * data is set to null.
2337 */
2338static void mwifiex_unregister_dev(struct mwifiex_adapter *adapter)
2339{
2340 struct pcie_service_card *card = adapter->card;
52301a81 2341 const struct mwifiex_pcie_card_reg *reg;
d930faee
AK
2342
2343 if (card) {
2344 dev_dbg(adapter->dev, "%s(): calling free_irq()\n", __func__);
2345 free_irq(card->dev->irq, card->dev);
fc331460 2346
52301a81
AP
2347 reg = card->pcie.reg;
2348 if (reg->sleep_cookie)
2349 mwifiex_pcie_delete_sleep_cookie_buf(adapter);
2350
fc331460
AP
2351 mwifiex_pcie_delete_cmdrsp_buf(adapter);
2352 mwifiex_pcie_delete_evtbd_ring(adapter);
2353 mwifiex_pcie_delete_rxbd_ring(adapter);
2354 mwifiex_pcie_delete_txbd_ring(adapter);
2355 card->cmdrsp_buf = NULL;
d930faee
AK
2356 }
2357}
2358
2359static struct mwifiex_if_ops pcie_ops = {
2360 .init_if = mwifiex_pcie_init,
2361 .cleanup_if = mwifiex_pcie_cleanup,
2362 .check_fw_status = mwifiex_check_fw_status,
2363 .prog_fw = mwifiex_prog_fw_w_helper,
2364 .register_dev = mwifiex_register_dev,
2365 .unregister_dev = mwifiex_unregister_dev,
2366 .enable_int = mwifiex_pcie_enable_host_int,
2367 .process_int_status = mwifiex_process_int_status,
2368 .host_to_card = mwifiex_pcie_host_to_card,
2369 .wakeup = mwifiex_pm_wakeup_card,
2370 .wakeup_complete = mwifiex_pm_wakeup_card_complete,
2371
2372 /* PCIE specific */
2373 .cmdrsp_complete = mwifiex_pcie_cmdrsp_complete,
2374 .event_complete = mwifiex_pcie_event_complete,
2375 .update_mp_end_port = NULL,
2376 .cleanup_mpa_buf = NULL,
c6d1d87a 2377 .init_fw_port = mwifiex_pcie_init_fw_port,
fbd7e7ac 2378 .clean_pcie_ring = mwifiex_clean_pcie_ring_buf,
d930faee
AK
2379};
2380
2381/*
2382 * This function initializes the PCIE driver module.
2383 *
2384 * This initiates the semaphore and registers the device with
2385 * PCIE bus.
2386 */
2387static int mwifiex_pcie_init_module(void)
2388{
2389 int ret;
2390
ca8f2112 2391 pr_debug("Marvell PCIe Driver\n");
d930faee
AK
2392
2393 sema_init(&add_remove_card_sem, 1);
2394
2395 /* Clear the flag in case user removes the card. */
2396 user_rmmod = 0;
2397
2398 ret = pci_register_driver(&mwifiex_pcie);
2399 if (ret)
2400 pr_err("Driver register failed!\n");
2401 else
2402 pr_debug("info: Driver registered successfully!\n");
2403
2404 return ret;
2405}
2406
2407/*
2408 * This function cleans up the PCIE driver.
2409 *
2410 * The following major steps are followed for cleanup -
2411 * - Resume the device if its suspended
2412 * - Disconnect the device if connected
2413 * - Shutdown the firmware
2414 * - Unregister the device from PCIE bus.
2415 */
2416static void mwifiex_pcie_cleanup_module(void)
2417{
2418 if (!down_interruptible(&add_remove_card_sem))
2419 up(&add_remove_card_sem);
2420
2421 /* Set the flag as user is removing this module. */
2422 user_rmmod = 1;
2423
2424 pci_unregister_driver(&mwifiex_pcie);
2425}
2426
2427module_init(mwifiex_pcie_init_module);
2428module_exit(mwifiex_pcie_cleanup_module);
2429
2430MODULE_AUTHOR("Marvell International Ltd.");
2431MODULE_DESCRIPTION("Marvell WiFi-Ex PCI-Express Driver version " PCIE_VERSION);
2432MODULE_VERSION(PCIE_VERSION);
2433MODULE_LICENSE("GPL v2");
ca8f2112
AP
2434MODULE_FIRMWARE(PCIE8766_DEFAULT_FW_NAME);
2435MODULE_FIRMWARE(PCIE8897_DEFAULT_FW_NAME);
This page took 0.425754 seconds and 5 git commands to generate.