mwifiex: define generic data type for PCIe ring buffers
[deliverable/linux.git] / drivers / net / wireless / mwifiex / pcie.c
CommitLineData
d930faee
AK
1/*
2 * Marvell Wireless LAN device driver: PCIE specific handling
3 *
4 * Copyright (C) 2011, Marvell International Ltd.
5 *
6 * This software file (the "File") is distributed by Marvell International
7 * Ltd. under the terms of the GNU General Public License Version 2, June 1991
8 * (the "License"). You may use, redistribute and/or modify this File in
9 * accordance with the terms and conditions of the License, a copy of which
10 * is available by writing to the Free Software Foundation, Inc.,
11 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the
12 * worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt.
13 *
14 * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE
15 * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE
16 * ARE EXPRESSLY DISCLAIMED. The License provides additional details about
17 * this warranty disclaimer.
18 */
19
20#include <linux/firmware.h>
21
22#include "decl.h"
23#include "ioctl.h"
24#include "util.h"
25#include "fw.h"
26#include "main.h"
27#include "wmm.h"
28#include "11n.h"
29#include "pcie.h"
30
31#define PCIE_VERSION "1.0"
32#define DRV_NAME "Marvell mwifiex PCIe"
33
34static u8 user_rmmod;
35
36static struct mwifiex_if_ops pcie_ops;
37
38static struct semaphore add_remove_card_sem;
39static int mwifiex_pcie_enable_host_int(struct mwifiex_adapter *adapter);
40static int mwifiex_pcie_resume(struct pci_dev *pdev);
41
fc331460
AP
42static int
43mwifiex_map_pci_memory(struct mwifiex_adapter *adapter, struct sk_buff *skb,
44 int size, int flags)
d930faee 45{
fc331460
AP
46 struct pcie_service_card *card = adapter->card;
47 dma_addr_t buf_pa;
d930faee 48
fc331460
AP
49 buf_pa = pci_map_single(card->dev, skb->data, size, flags);
50 if (pci_dma_mapping_error(card->dev, buf_pa)) {
51 dev_err(adapter->dev, "failed to map pci memory!\n");
52 return -1;
53 }
54 memcpy(skb->cb, &buf_pa, sizeof(dma_addr_t));
55 return 0;
d930faee
AK
56}
57
58/*
59 * This function reads sleep cookie and checks if FW is ready
60 */
61static bool mwifiex_pcie_ok_to_access_hw(struct mwifiex_adapter *adapter)
62{
63 u32 *cookie_addr;
64 struct pcie_service_card *card = adapter->card;
65
fc331460
AP
66 if (card->sleep_cookie_vbase) {
67 cookie_addr = (u32 *)card->sleep_cookie_vbase;
d930faee
AK
68 dev_dbg(adapter->dev, "info: ACCESS_HW: sleep cookie=0x%x\n",
69 *cookie_addr);
70 if (*cookie_addr == FW_AWAKE_COOKIE)
71 return true;
72 }
73
74 return false;
75}
76
77/*
78 * This function probes an mwifiex device and registers it. It allocates
79 * the card structure, enables PCIE function number and initiates the
80 * device registration and initialization procedure by adding a logical
81 * interface.
82 */
83static int mwifiex_pcie_probe(struct pci_dev *pdev,
84 const struct pci_device_id *ent)
85{
86 struct pcie_service_card *card;
87
88 pr_debug("info: vendor=0x%4.04X device=0x%4.04X rev=%d\n",
f57c1edc 89 pdev->vendor, pdev->device, pdev->revision);
d930faee
AK
90
91 card = kzalloc(sizeof(struct pcie_service_card), GFP_KERNEL);
e404decb 92 if (!card)
d930faee 93 return -ENOMEM;
d930faee
AK
94
95 card->dev = pdev;
96
dd04e6ac
AP
97 if (ent->driver_data) {
98 struct mwifiex_pcie_device *data = (void *)ent->driver_data;
99 card->pcie.firmware = data->firmware;
100 card->pcie.reg = data->reg;
101 card->pcie.blksz_fw_dl = data->blksz_fw_dl;
102 }
103
d930faee
AK
104 if (mwifiex_add_card(card, &add_remove_card_sem, &pcie_ops,
105 MWIFIEX_PCIE)) {
106 pr_err("%s failed\n", __func__);
107 kfree(card);
108 return -1;
109 }
110
111 return 0;
112}
113
114/*
115 * This function removes the interface and frees up the card structure.
116 */
117static void mwifiex_pcie_remove(struct pci_dev *pdev)
118{
119 struct pcie_service_card *card;
120 struct mwifiex_adapter *adapter;
f57c1edc 121 struct mwifiex_private *priv;
d930faee
AK
122 int i;
123
124 card = pci_get_drvdata(pdev);
125 if (!card)
126 return;
127
128 adapter = card->adapter;
129 if (!adapter || !adapter->priv_num)
130 return;
131
59a4cc25
AK
132 /* In case driver is removed when asynchronous FW load is in progress */
133 wait_for_completion(&adapter->fw_load);
134
d930faee
AK
135 if (user_rmmod) {
136#ifdef CONFIG_PM
137 if (adapter->is_suspended)
138 mwifiex_pcie_resume(pdev);
139#endif
140
141 for (i = 0; i < adapter->priv_num; i++)
142 if ((GET_BSS_ROLE(adapter->priv[i]) ==
f57c1edc
YAP
143 MWIFIEX_BSS_ROLE_STA) &&
144 adapter->priv[i]->media_connected)
d930faee
AK
145 mwifiex_deauthenticate(adapter->priv[i], NULL);
146
f57c1edc 147 priv = mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_ANY);
d930faee 148
f57c1edc
YAP
149 mwifiex_disable_auto_ds(priv);
150
151 mwifiex_init_shutdown_fw(priv, MWIFIEX_FUNC_SHUTDOWN);
d930faee
AK
152 }
153
154 mwifiex_remove_card(card->adapter, &add_remove_card_sem);
155 kfree(card);
156}
157
158/*
159 * Kernel needs to suspend all functions separately. Therefore all
160 * registered functions must have drivers with suspend and resume
161 * methods. Failing that the kernel simply removes the whole card.
162 *
163 * If already not suspended, this function allocates and sends a host
164 * sleep activate request to the firmware and turns off the traffic.
165 */
166static int mwifiex_pcie_suspend(struct pci_dev *pdev, pm_message_t state)
167{
168 struct mwifiex_adapter *adapter;
169 struct pcie_service_card *card;
170 int hs_actived, i;
171
172 if (pdev) {
173 card = (struct pcie_service_card *) pci_get_drvdata(pdev);
83f0c6d1 174 if (!card || !card->adapter) {
d930faee
AK
175 pr_err("Card or adapter structure is not valid\n");
176 return 0;
177 }
178 } else {
179 pr_err("PCIE device is not specified\n");
180 return 0;
181 }
182
183 adapter = card->adapter;
184
185 hs_actived = mwifiex_enable_hs(adapter);
186
187 /* Indicate device suspended */
188 adapter->is_suspended = true;
189
190 for (i = 0; i < adapter->priv_num; i++)
191 netif_carrier_off(adapter->priv[i]->netdev);
192
193 return 0;
194}
195
196/*
197 * Kernel needs to suspend all functions separately. Therefore all
198 * registered functions must have drivers with suspend and resume
199 * methods. Failing that the kernel simply removes the whole card.
200 *
201 * If already not resumed, this function turns on the traffic and
202 * sends a host sleep cancel request to the firmware.
203 */
204static int mwifiex_pcie_resume(struct pci_dev *pdev)
205{
206 struct mwifiex_adapter *adapter;
207 struct pcie_service_card *card;
208 int i;
209
210 if (pdev) {
211 card = (struct pcie_service_card *) pci_get_drvdata(pdev);
212 if (!card || !card->adapter) {
213 pr_err("Card or adapter structure is not valid\n");
214 return 0;
215 }
216 } else {
217 pr_err("PCIE device is not specified\n");
218 return 0;
219 }
220
221 adapter = card->adapter;
222
223 if (!adapter->is_suspended) {
224 dev_warn(adapter->dev, "Device already resumed\n");
225 return 0;
226 }
227
228 adapter->is_suspended = false;
229
230 for (i = 0; i < adapter->priv_num; i++)
231 if (adapter->priv[i]->media_connected)
232 netif_carrier_on(adapter->priv[i]->netdev);
233
234 mwifiex_cancel_hs(mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_STA),
f57c1edc 235 MWIFIEX_ASYNC_CMD);
d930faee
AK
236
237 return 0;
238}
239
240#define PCIE_VENDOR_ID_MARVELL (0x11ab)
241#define PCIE_DEVICE_ID_MARVELL_88W8766P (0x2b30)
242
243static DEFINE_PCI_DEVICE_TABLE(mwifiex_ids) = {
244 {
245 PCIE_VENDOR_ID_MARVELL, PCIE_DEVICE_ID_MARVELL_88W8766P,
246 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
dd04e6ac 247 .driver_data = (unsigned long) &mwifiex_pcie8766,
d930faee
AK
248 },
249 {},
250};
251
252MODULE_DEVICE_TABLE(pci, mwifiex_ids);
253
254/* PCI Device Driver */
255static struct pci_driver __refdata mwifiex_pcie = {
256 .name = "mwifiex_pcie",
257 .id_table = mwifiex_ids,
258 .probe = mwifiex_pcie_probe,
259 .remove = mwifiex_pcie_remove,
260#ifdef CONFIG_PM
261 /* Power Management Hooks */
262 .suspend = mwifiex_pcie_suspend,
263 .resume = mwifiex_pcie_resume,
264#endif
265};
266
267/*
268 * This function writes data into PCIE card register.
269 */
270static int mwifiex_write_reg(struct mwifiex_adapter *adapter, int reg, u32 data)
271{
272 struct pcie_service_card *card = adapter->card;
273
274 iowrite32(data, card->pci_mmap1 + reg);
275
276 return 0;
277}
278
279/*
280 * This function reads data from PCIE card register.
281 */
282static int mwifiex_read_reg(struct mwifiex_adapter *adapter, int reg, u32 *data)
283{
284 struct pcie_service_card *card = adapter->card;
285
286 *data = ioread32(card->pci_mmap1 + reg);
287
288 return 0;
289}
290
291/*
292 * This function wakes up the card.
293 *
294 * A host power up command is written to the card configuration
295 * register to wake up the card.
296 */
297static int mwifiex_pm_wakeup_card(struct mwifiex_adapter *adapter)
298{
299 int i = 0;
300
301 while (mwifiex_pcie_ok_to_access_hw(adapter)) {
302 i++;
e7891ba2 303 usleep_range(10, 20);
d930faee
AK
304 /* 50ms max wait */
305 if (i == 50000)
306 break;
307 }
308
309 dev_dbg(adapter->dev, "event: Wakeup device...\n");
310
311 /* Enable interrupts or any chip access will wakeup device */
312 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_MASK, HOST_INTR_MASK)) {
313 dev_warn(adapter->dev, "Enable host interrupt failed\n");
314 return -1;
315 }
316
317 dev_dbg(adapter->dev, "PCIE wakeup: Setting PS_STATE_AWAKE\n");
318 adapter->ps_state = PS_STATE_AWAKE;
319
320 return 0;
321}
322
323/*
324 * This function is called after the card has woken up.
325 *
326 * The card configuration register is reset.
327 */
328static int mwifiex_pm_wakeup_card_complete(struct mwifiex_adapter *adapter)
329{
330 dev_dbg(adapter->dev, "cmd: Wakeup device completed\n");
331
332 return 0;
333}
334
335/*
336 * This function disables the host interrupt.
337 *
338 * The host interrupt mask is read, the disable bit is reset and
339 * written back to the card host interrupt mask register.
340 */
341static int mwifiex_pcie_disable_host_int(struct mwifiex_adapter *adapter)
342{
343 if (mwifiex_pcie_ok_to_access_hw(adapter)) {
344 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_MASK,
345 0x00000000)) {
346 dev_warn(adapter->dev, "Disable host interrupt failed\n");
347 return -1;
348 }
349 }
350
351 return 0;
352}
353
354/*
355 * This function enables the host interrupt.
356 *
357 * The host interrupt enable mask is written to the card
358 * host interrupt mask register.
359 */
360static int mwifiex_pcie_enable_host_int(struct mwifiex_adapter *adapter)
361{
362 if (mwifiex_pcie_ok_to_access_hw(adapter)) {
363 /* Simply write the mask to the register */
364 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_MASK,
365 HOST_INTR_MASK)) {
366 dev_warn(adapter->dev, "Enable host interrupt failed\n");
367 return -1;
368 }
369 }
370
371 return 0;
372}
373
374/*
0732484b
AP
375 * This function initializes TX buffer ring descriptors
376 */
377static int mwifiex_init_txq_ring(struct mwifiex_adapter *adapter)
378{
379 struct pcie_service_card *card = adapter->card;
380 struct mwifiex_pcie_buf_desc *desc;
381 int i;
382
383 for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) {
384 card->tx_buf_list[i] = NULL;
385 card->txbd_ring[i] = (void *)(card->txbd_ring_vbase +
386 (sizeof(*desc) * i));
387 desc = card->txbd_ring[i];
388 memset(desc, 0, sizeof(*desc));
389 }
390
391 return 0;
392}
393
394/* This function initializes RX buffer ring descriptors. Each SKB is allocated
395 * here and after mapping PCI memory, its physical address is assigned to
396 * PCIE Rx buffer descriptor's physical address.
397 */
398static int mwifiex_init_rxq_ring(struct mwifiex_adapter *adapter)
399{
400 struct pcie_service_card *card = adapter->card;
401 struct sk_buff *skb;
402 struct mwifiex_pcie_buf_desc *desc;
403 dma_addr_t buf_pa;
404 int i;
405
406 for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) {
407 /* Allocate skb here so that firmware can DMA data from it */
408 skb = dev_alloc_skb(MWIFIEX_RX_DATA_BUF_SIZE);
409 if (!skb) {
410 dev_err(adapter->dev,
411 "Unable to allocate skb for RX ring.\n");
412 kfree(card->rxbd_ring_vbase);
413 return -ENOMEM;
414 }
415
416 if (mwifiex_map_pci_memory(adapter, skb,
417 MWIFIEX_RX_DATA_BUF_SIZE,
418 PCI_DMA_FROMDEVICE))
419 return -1;
420
421 MWIFIEX_SKB_PACB(skb, &buf_pa);
422
423 dev_dbg(adapter->dev,
424 "info: RX ring: skb=%p len=%d data=%p buf_pa=%#x:%x\n",
425 skb, skb->len, skb->data, (u32)buf_pa,
426 (u32)((u64)buf_pa >> 32));
427
428 card->rx_buf_list[i] = skb;
429 card->rxbd_ring[i] = (void *)(card->rxbd_ring_vbase +
430 (sizeof(*desc) * i));
431 desc = card->rxbd_ring[i];
432 desc->paddr = buf_pa;
433 desc->len = (u16)skb->len;
434 desc->flags = 0;
435 }
436
437 return 0;
438}
439
440/* This function initializes event buffer ring descriptors. Each SKB is
441 * allocated here and after mapping PCI memory, its physical address is assigned
442 * to PCIE Rx buffer descriptor's physical address
443 */
444static int mwifiex_pcie_init_evt_ring(struct mwifiex_adapter *adapter)
445{
446 struct pcie_service_card *card = adapter->card;
e05dc3e9 447 struct mwifiex_evt_buf_desc *desc;
0732484b
AP
448 struct sk_buff *skb;
449 dma_addr_t buf_pa;
450 int i;
451
452 for (i = 0; i < MWIFIEX_MAX_EVT_BD; i++) {
453 /* Allocate skb here so that firmware can DMA data from it */
454 skb = dev_alloc_skb(MAX_EVENT_SIZE);
455 if (!skb) {
456 dev_err(adapter->dev,
457 "Unable to allocate skb for EVENT buf.\n");
458 kfree(card->evtbd_ring_vbase);
459 return -ENOMEM;
460 }
461 skb_put(skb, MAX_EVENT_SIZE);
462
463 if (mwifiex_map_pci_memory(adapter, skb, MAX_EVENT_SIZE,
464 PCI_DMA_FROMDEVICE))
465 return -1;
466
467 MWIFIEX_SKB_PACB(skb, &buf_pa);
468
469 dev_dbg(adapter->dev,
470 "info: EVT ring: skb=%p len=%d data=%p buf_pa=%#x:%x\n",
471 skb, skb->len, skb->data, (u32)buf_pa,
472 (u32)((u64)buf_pa >> 32));
473
474 card->evt_buf_list[i] = skb;
475 card->evtbd_ring[i] = (void *)(card->evtbd_ring_vbase +
476 (sizeof(*desc) * i));
0732484b
AP
477 desc = card->evtbd_ring[i];
478 desc->paddr = buf_pa;
479 desc->len = (u16)skb->len;
480 desc->flags = 0;
481 }
482
483 return 0;
484}
485
486/* This function cleans up TX buffer rings. If any of the buffer list has valid
487 * SKB address, associated SKB is freed.
488 */
489static void mwifiex_cleanup_txq_ring(struct mwifiex_adapter *adapter)
490{
491 struct pcie_service_card *card = adapter->card;
492 struct sk_buff *skb;
493 struct mwifiex_pcie_buf_desc *desc;
494 int i;
495
496 for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) {
497 desc = card->txbd_ring[i];
498 if (card->tx_buf_list[i]) {
499 skb = card->tx_buf_list[i];
500 pci_unmap_single(card->dev, desc->paddr, skb->len,
501 PCI_DMA_TODEVICE);
502 dev_kfree_skb_any(skb);
503 }
504 card->tx_buf_list[i] = NULL;
505 memset(desc, 0, sizeof(*desc));
506 }
507
508 return;
509}
510
511/* This function cleans up RX buffer rings. If any of the buffer list has valid
512 * SKB address, associated SKB is freed.
513 */
514static void mwifiex_cleanup_rxq_ring(struct mwifiex_adapter *adapter)
515{
516 struct pcie_service_card *card = adapter->card;
517 struct mwifiex_pcie_buf_desc *desc;
518 struct sk_buff *skb;
519 int i;
520
521 for (i = 0; i < MWIFIEX_MAX_TXRX_BD; i++) {
522 desc = card->rxbd_ring[i];
523 if (card->rx_buf_list[i]) {
524 skb = card->rx_buf_list[i];
525 pci_unmap_single(card->dev, desc->paddr,
526 MWIFIEX_RX_DATA_BUF_SIZE,
527 PCI_DMA_FROMDEVICE);
528 dev_kfree_skb_any(skb);
529 }
530 memset(desc, 0, sizeof(*desc));
531 }
532
533 return;
534}
535
536/* This function cleans up event buffer rings. If any of the buffer list has
537 * valid SKB address, associated SKB is freed.
538 */
539static void mwifiex_cleanup_evt_ring(struct mwifiex_adapter *adapter)
540{
541 struct pcie_service_card *card = adapter->card;
e05dc3e9 542 struct mwifiex_evt_buf_desc *desc;
0732484b
AP
543 struct sk_buff *skb;
544 int i;
545
546 for (i = 0; i < MWIFIEX_MAX_EVT_BD; i++) {
547 desc = card->evtbd_ring[i];
548 if (card->evt_buf_list[i]) {
549 skb = card->evt_buf_list[i];
550 pci_unmap_single(card->dev, desc->paddr, MAX_EVENT_SIZE,
551 PCI_DMA_FROMDEVICE);
552 dev_kfree_skb_any(skb);
553 }
554 card->evt_buf_list[i] = NULL;
555 memset(desc, 0, sizeof(*desc));
556 }
557
558 return;
559}
560
561/* This function creates buffer descriptor ring for TX
d930faee
AK
562 */
563static int mwifiex_pcie_create_txbd_ring(struct mwifiex_adapter *adapter)
564{
565 struct pcie_service_card *card = adapter->card;
dd04e6ac 566 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee
AK
567
568 /*
569 * driver maintaines the write pointer and firmware maintaines the read
570 * pointer. The write pointer starts at 0 (zero) while the read pointer
571 * starts at zero with rollover bit set
572 */
573 card->txbd_wrptr = 0;
dd04e6ac 574 card->txbd_rdptr |= reg->tx_rollover_ind;
d930faee
AK
575
576 /* allocate shared memory for the BD ring and divide the same in to
577 several descriptors */
578 card->txbd_ring_size = sizeof(struct mwifiex_pcie_buf_desc) *
f57c1edc 579 MWIFIEX_MAX_TXRX_BD;
d930faee 580 dev_dbg(adapter->dev, "info: txbd_ring: Allocating %d bytes\n",
f57c1edc 581 card->txbd_ring_size);
fc331460
AP
582 card->txbd_ring_vbase = pci_alloc_consistent(card->dev,
583 card->txbd_ring_size,
584 &card->txbd_ring_pbase);
d930faee 585 if (!card->txbd_ring_vbase) {
fc331460
AP
586 dev_err(adapter->dev,
587 "allocate consistent memory (%d bytes) failed!\n",
588 card->txbd_ring_size);
8c53e42d 589 return -ENOMEM;
d930faee 590 }
f57c1edc
YAP
591 dev_dbg(adapter->dev,
592 "info: txbd_ring - base: %p, pbase: %#x:%x, len: %x\n",
fc331460 593 card->txbd_ring_vbase, (unsigned int)card->txbd_ring_pbase,
f57c1edc 594 (u32)((u64)card->txbd_ring_pbase >> 32), card->txbd_ring_size);
d930faee 595
0732484b 596 return mwifiex_init_txq_ring(adapter);
d930faee
AK
597}
598
599static int mwifiex_pcie_delete_txbd_ring(struct mwifiex_adapter *adapter)
600{
601 struct pcie_service_card *card = adapter->card;
dd04e6ac 602 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee 603
0732484b 604 mwifiex_cleanup_txq_ring(adapter);
d930faee 605
fc331460
AP
606 if (card->txbd_ring_vbase)
607 pci_free_consistent(card->dev, card->txbd_ring_size,
608 card->txbd_ring_vbase,
609 card->txbd_ring_pbase);
d930faee
AK
610 card->txbd_ring_size = 0;
611 card->txbd_wrptr = 0;
dd04e6ac 612 card->txbd_rdptr = 0 | reg->tx_rollover_ind;
d930faee 613 card->txbd_ring_vbase = NULL;
fc331460 614 card->txbd_ring_pbase = 0;
d930faee
AK
615
616 return 0;
617}
618
619/*
620 * This function creates buffer descriptor ring for RX
621 */
622static int mwifiex_pcie_create_rxbd_ring(struct mwifiex_adapter *adapter)
623{
624 struct pcie_service_card *card = adapter->card;
dd04e6ac 625 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee
AK
626
627 /*
628 * driver maintaines the read pointer and firmware maintaines the write
629 * pointer. The write pointer starts at 0 (zero) while the read pointer
630 * starts at zero with rollover bit set
631 */
632 card->rxbd_wrptr = 0;
dd04e6ac 633 card->rxbd_rdptr = reg->rx_rollover_ind;
d930faee
AK
634
635 card->rxbd_ring_size = sizeof(struct mwifiex_pcie_buf_desc) *
f57c1edc 636 MWIFIEX_MAX_TXRX_BD;
d930faee 637 dev_dbg(adapter->dev, "info: rxbd_ring: Allocating %d bytes\n",
f57c1edc 638 card->rxbd_ring_size);
fc331460
AP
639 card->rxbd_ring_vbase = pci_alloc_consistent(card->dev,
640 card->rxbd_ring_size,
641 &card->rxbd_ring_pbase);
d930faee 642 if (!card->rxbd_ring_vbase) {
fc331460
AP
643 dev_err(adapter->dev,
644 "allocate consistent memory (%d bytes) failed!\n",
645 card->rxbd_ring_size);
8c53e42d 646 return -ENOMEM;
d930faee 647 }
d930faee 648
f57c1edc
YAP
649 dev_dbg(adapter->dev,
650 "info: rxbd_ring - base: %p, pbase: %#x:%x, len: %#x\n",
651 card->rxbd_ring_vbase, (u32)card->rxbd_ring_pbase,
652 (u32)((u64)card->rxbd_ring_pbase >> 32),
653 card->rxbd_ring_size);
d930faee 654
0732484b 655 return mwifiex_init_rxq_ring(adapter);
d930faee
AK
656}
657
658/*
659 * This function deletes Buffer descriptor ring for RX
660 */
661static int mwifiex_pcie_delete_rxbd_ring(struct mwifiex_adapter *adapter)
662{
663 struct pcie_service_card *card = adapter->card;
dd04e6ac 664 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee 665
0732484b 666 mwifiex_cleanup_rxq_ring(adapter);
d930faee 667
fc331460
AP
668 if (card->rxbd_ring_vbase)
669 pci_free_consistent(card->dev, card->rxbd_ring_size,
670 card->rxbd_ring_vbase,
671 card->rxbd_ring_pbase);
d930faee
AK
672 card->rxbd_ring_size = 0;
673 card->rxbd_wrptr = 0;
dd04e6ac 674 card->rxbd_rdptr = 0 | reg->rx_rollover_ind;
d930faee 675 card->rxbd_ring_vbase = NULL;
fc331460 676 card->rxbd_ring_pbase = 0;
d930faee
AK
677
678 return 0;
679}
680
681/*
682 * This function creates buffer descriptor ring for Events
683 */
684static int mwifiex_pcie_create_evtbd_ring(struct mwifiex_adapter *adapter)
685{
686 struct pcie_service_card *card = adapter->card;
dd04e6ac 687 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee
AK
688
689 /*
690 * driver maintaines the read pointer and firmware maintaines the write
691 * pointer. The write pointer starts at 0 (zero) while the read pointer
692 * starts at zero with rollover bit set
693 */
694 card->evtbd_wrptr = 0;
dd04e6ac 695 card->evtbd_rdptr = reg->evt_rollover_ind;
d930faee 696
e05dc3e9 697 card->evtbd_ring_size = sizeof(struct mwifiex_evt_buf_desc) *
f57c1edc 698 MWIFIEX_MAX_EVT_BD;
d930faee 699 dev_dbg(adapter->dev, "info: evtbd_ring: Allocating %d bytes\n",
f57c1edc 700 card->evtbd_ring_size);
fc331460
AP
701 card->evtbd_ring_vbase = pci_alloc_consistent(card->dev,
702 card->evtbd_ring_size,
703 &card->evtbd_ring_pbase);
d930faee 704 if (!card->evtbd_ring_vbase) {
f57c1edc 705 dev_err(adapter->dev,
fc331460
AP
706 "allocate consistent memory (%d bytes) failed!\n",
707 card->evtbd_ring_size);
8c53e42d 708 return -ENOMEM;
d930faee 709 }
d930faee 710
f57c1edc
YAP
711 dev_dbg(adapter->dev,
712 "info: CMDRSP/EVT bd_ring - base: %p pbase: %#x:%x len: %#x\n",
713 card->evtbd_ring_vbase, (u32)card->evtbd_ring_pbase,
714 (u32)((u64)card->evtbd_ring_pbase >> 32),
715 card->evtbd_ring_size);
d930faee 716
0732484b 717 return mwifiex_pcie_init_evt_ring(adapter);
d930faee
AK
718}
719
720/*
721 * This function deletes Buffer descriptor ring for Events
722 */
723static int mwifiex_pcie_delete_evtbd_ring(struct mwifiex_adapter *adapter)
724{
725 struct pcie_service_card *card = adapter->card;
dd04e6ac 726 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee 727
0732484b 728 mwifiex_cleanup_evt_ring(adapter);
d930faee 729
fc331460
AP
730 if (card->evtbd_ring_vbase)
731 pci_free_consistent(card->dev, card->evtbd_ring_size,
732 card->evtbd_ring_vbase,
733 card->evtbd_ring_pbase);
d930faee 734 card->evtbd_wrptr = 0;
dd04e6ac 735 card->evtbd_rdptr = 0 | reg->evt_rollover_ind;
d930faee
AK
736 card->evtbd_ring_size = 0;
737 card->evtbd_ring_vbase = NULL;
fc331460 738 card->evtbd_ring_pbase = 0;
d930faee
AK
739
740 return 0;
741}
742
743/*
744 * This function allocates a buffer for CMDRSP
745 */
746static int mwifiex_pcie_alloc_cmdrsp_buf(struct mwifiex_adapter *adapter)
747{
748 struct pcie_service_card *card = adapter->card;
749 struct sk_buff *skb;
750
751 /* Allocate memory for receiving command response data */
752 skb = dev_alloc_skb(MWIFIEX_UPLD_SIZE);
753 if (!skb) {
f57c1edc
YAP
754 dev_err(adapter->dev,
755 "Unable to allocate skb for command response data.\n");
d930faee
AK
756 return -ENOMEM;
757 }
d930faee 758 skb_put(skb, MWIFIEX_UPLD_SIZE);
fc331460
AP
759 if (mwifiex_map_pci_memory(adapter, skb, MWIFIEX_UPLD_SIZE,
760 PCI_DMA_FROMDEVICE))
761 return -1;
d930faee 762
fc331460 763 card->cmdrsp_buf = skb;
d930faee
AK
764
765 return 0;
766}
767
768/*
769 * This function deletes a buffer for CMDRSP
770 */
771static int mwifiex_pcie_delete_cmdrsp_buf(struct mwifiex_adapter *adapter)
772{
773 struct pcie_service_card *card;
fc331460 774 dma_addr_t buf_pa;
d930faee
AK
775
776 if (!adapter)
777 return 0;
778
779 card = adapter->card;
780
fc331460
AP
781 if (card && card->cmdrsp_buf) {
782 MWIFIEX_SKB_PACB(card->cmdrsp_buf, &buf_pa);
783 pci_unmap_single(card->dev, buf_pa, MWIFIEX_UPLD_SIZE,
784 PCI_DMA_FROMDEVICE);
d930faee 785 dev_kfree_skb_any(card->cmdrsp_buf);
fc331460 786 }
d930faee 787
fc331460
AP
788 if (card && card->cmd_buf) {
789 MWIFIEX_SKB_PACB(card->cmd_buf, &buf_pa);
790 pci_unmap_single(card->dev, buf_pa, MWIFIEX_SIZE_OF_CMD_BUFFER,
791 PCI_DMA_TODEVICE);
d930faee 792 dev_kfree_skb_any(card->cmd_buf);
fc331460 793 }
d930faee
AK
794 return 0;
795}
796
797/*
798 * This function allocates a buffer for sleep cookie
799 */
800static int mwifiex_pcie_alloc_sleep_cookie_buf(struct mwifiex_adapter *adapter)
801{
d930faee
AK
802 struct pcie_service_card *card = adapter->card;
803
fc331460
AP
804 card->sleep_cookie_vbase = pci_alloc_consistent(card->dev, sizeof(u32),
805 &card->sleep_cookie_pbase);
806 if (!card->sleep_cookie_vbase) {
807 dev_err(adapter->dev, "pci_alloc_consistent failed!\n");
d930faee
AK
808 return -ENOMEM;
809 }
d930faee 810 /* Init val of Sleep Cookie */
fc331460 811 *(u32 *)card->sleep_cookie_vbase = FW_AWAKE_COOKIE;
d930faee
AK
812
813 dev_dbg(adapter->dev, "alloc_scook: sleep cookie=0x%x\n",
fc331460 814 *((u32 *)card->sleep_cookie_vbase));
d930faee
AK
815
816 return 0;
817}
818
819/*
820 * This function deletes buffer for sleep cookie
821 */
822static int mwifiex_pcie_delete_sleep_cookie_buf(struct mwifiex_adapter *adapter)
823{
824 struct pcie_service_card *card;
825
826 if (!adapter)
827 return 0;
828
829 card = adapter->card;
830
fc331460
AP
831 if (card && card->sleep_cookie_vbase) {
832 pci_free_consistent(card->dev, sizeof(u32),
833 card->sleep_cookie_vbase,
834 card->sleep_cookie_pbase);
835 card->sleep_cookie_vbase = NULL;
d930faee
AK
836 }
837
838 return 0;
839}
840
fbd7e7ac
AP
841/* This function flushes the TX buffer descriptor ring
842 * This function defined as handler is also called while cleaning TXRX
843 * during disconnect/ bss stop.
844 */
845static int mwifiex_clean_pcie_ring_buf(struct mwifiex_adapter *adapter)
846{
847 struct pcie_service_card *card = adapter->card;
dd04e6ac 848 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
fbd7e7ac
AP
849 u32 rdptr;
850
851 /* Read the TX ring read pointer set by firmware */
dd04e6ac 852 if (mwifiex_read_reg(adapter, reg->tx_rdptr, &rdptr)) {
fbd7e7ac 853 dev_err(adapter->dev,
dd04e6ac 854 "Flush TXBD: failed to read reg->tx_rdptr\n");
fbd7e7ac
AP
855 return -1;
856 }
857
858 if (!mwifiex_pcie_txbd_empty(card, rdptr)) {
859 card->txbd_flush = 1;
860 /* write pointer already set at last send
861 * send dnld-rdy intr again, wait for completion.
862 */
863 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
864 CPU_INTR_DNLD_RDY)) {
865 dev_err(adapter->dev,
866 "failed to assert dnld-rdy interrupt.\n");
867 return -1;
868 }
869 }
870 return 0;
871}
872
d930faee 873/*
e7f767a7 874 * This function unmaps and frees downloaded data buffer
d930faee 875 */
e7f767a7 876static int mwifiex_pcie_send_data_complete(struct mwifiex_adapter *adapter)
d930faee 877{
e7f767a7
AP
878 const u32 num_tx_buffs = MWIFIEX_MAX_TXRX_BD;
879 struct sk_buff *skb;
880 dma_addr_t buf_pa;
881 u32 wrdoneidx, rdptr, unmap_count = 0;
e05dc3e9 882 struct mwifiex_pcie_buf_desc *desc;
d930faee 883 struct pcie_service_card *card = adapter->card;
dd04e6ac 884 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee
AK
885
886 if (!mwifiex_pcie_ok_to_access_hw(adapter))
887 mwifiex_pm_wakeup_card(adapter);
888
889 /* Read the TX ring read pointer set by firmware */
dd04e6ac 890 if (mwifiex_read_reg(adapter, reg->tx_rdptr, &rdptr)) {
f57c1edc 891 dev_err(adapter->dev,
dd04e6ac 892 "SEND COMP: failed to read reg->tx_rdptr\n");
d930faee
AK
893 return -1;
894 }
895
e7f767a7
AP
896 dev_dbg(adapter->dev, "SEND COMP: rdptr_prev=0x%x, rdptr=0x%x\n",
897 card->txbd_rdptr, rdptr);
d930faee 898
e7f767a7 899 /* free from previous txbd_rdptr to current txbd_rdptr */
dd04e6ac
AP
900 while (((card->txbd_rdptr & reg->tx_mask) !=
901 (rdptr & reg->tx_mask)) ||
902 ((card->txbd_rdptr & reg->tx_rollover_ind) !=
903 (rdptr & reg->tx_rollover_ind))) {
904 wrdoneidx = card->txbd_rdptr & reg->tx_mask;
e7f767a7
AP
905
906 skb = card->tx_buf_list[wrdoneidx];
907 if (skb) {
908 dev_dbg(adapter->dev,
909 "SEND COMP: Detach skb %p at txbd_rdidx=%d\n",
910 skb, wrdoneidx);
911 MWIFIEX_SKB_PACB(skb, &buf_pa);
912 pci_unmap_single(card->dev, buf_pa, skb->len,
913 PCI_DMA_TODEVICE);
914
915 unmap_count++;
916
917 if (card->txbd_flush)
918 mwifiex_write_data_complete(adapter, skb, 0,
919 -1);
920 else
921 mwifiex_write_data_complete(adapter, skb, 0, 0);
922 }
923
924 card->tx_buf_list[wrdoneidx] = NULL;
e05dc3e9
AP
925 desc = card->txbd_ring[wrdoneidx];
926 memset(desc, 0, sizeof(*desc));
e7f767a7
AP
927 card->txbd_rdptr++;
928
dd04e6ac 929 if ((card->txbd_rdptr & reg->tx_mask) == num_tx_buffs)
e7f767a7 930 card->txbd_rdptr = ((card->txbd_rdptr &
dd04e6ac
AP
931 reg->tx_rollover_ind) ^
932 reg->tx_rollover_ind);
e7f767a7
AP
933 }
934
935 if (unmap_count)
936 adapter->data_sent = false;
937
938 if (card->txbd_flush) {
dd04e6ac
AP
939 if (((card->txbd_wrptr & reg->tx_mask) ==
940 (card->txbd_rdptr & reg->tx_mask)) &&
941 ((card->txbd_wrptr & reg->tx_rollover_ind) !=
942 (card->txbd_rdptr & reg->tx_rollover_ind)))
e7f767a7
AP
943 card->txbd_flush = 0;
944 else
945 mwifiex_clean_pcie_ring_buf(adapter);
946 }
947
948 return 0;
949}
950
951/* This function sends data buffer to device. First 4 bytes of payload
952 * are filled with payload length and payload type. Then this payload
953 * is mapped to PCI device memory. Tx ring pointers are advanced accordingly.
954 * Download ready interrupt to FW is deffered if Tx ring is not full and
955 * additional payload can be accomodated.
956 */
957static int
958mwifiex_pcie_send_data(struct mwifiex_adapter *adapter, struct sk_buff *skb,
959 struct mwifiex_tx_param *tx_param)
960{
961 struct pcie_service_card *card = adapter->card;
dd04e6ac 962 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
e7f767a7
AP
963 u32 wrindx;
964 int ret;
965 dma_addr_t buf_pa;
e05dc3e9 966 struct mwifiex_pcie_buf_desc *desc;
e7f767a7
AP
967 __le16 *tmp;
968
969 if (!(skb->data && skb->len)) {
970 dev_err(adapter->dev, "%s(): invalid parameter <%p, %#x>\n",
971 __func__, skb->data, skb->len);
972 return -1;
973 }
974
975 if (!mwifiex_pcie_ok_to_access_hw(adapter))
976 mwifiex_pm_wakeup_card(adapter);
977
978 dev_dbg(adapter->dev, "info: SEND DATA: <Rd: %#x, Wr: %#x>\n",
979 card->txbd_rdptr, card->txbd_wrptr);
980 if (mwifiex_pcie_txbd_not_full(card)) {
d930faee
AK
981 u8 *payload;
982
983 adapter->data_sent = true;
e7f767a7 984 payload = skb->data;
d930faee
AK
985 tmp = (__le16 *)&payload[0];
986 *tmp = cpu_to_le16((u16)skb->len);
987 tmp = (__le16 *)&payload[2];
988 *tmp = cpu_to_le16(MWIFIEX_TYPE_DATA);
e7f767a7
AP
989
990 if (mwifiex_map_pci_memory(adapter, skb, skb->len ,
991 PCI_DMA_TODEVICE))
992 return -1;
993
dd04e6ac 994 wrindx = card->txbd_wrptr & reg->tx_mask;
e7f767a7
AP
995 MWIFIEX_SKB_PACB(skb, &buf_pa);
996 card->tx_buf_list[wrindx] = skb;
e05dc3e9
AP
997 desc = card->txbd_ring[wrindx];
998 desc->paddr = buf_pa;
999 desc->len = (u16)skb->len;
1000 desc->flags = MWIFIEX_BD_FLAG_FIRST_DESC |
1001 MWIFIEX_BD_FLAG_LAST_DESC;
d930faee 1002
dd04e6ac 1003 if ((++card->txbd_wrptr & reg->tx_mask) ==
d930faee
AK
1004 MWIFIEX_MAX_TXRX_BD)
1005 card->txbd_wrptr = ((card->txbd_wrptr &
dd04e6ac
AP
1006 reg->tx_rollover_ind) ^
1007 reg->tx_rollover_ind);
d930faee 1008
dd04e6ac
AP
1009 /* Write the TX ring write pointer in to reg->tx_wrptr */
1010 if (mwifiex_write_reg(adapter, reg->tx_wrptr,
f57c1edc
YAP
1011 card->txbd_wrptr)) {
1012 dev_err(adapter->dev,
dd04e6ac 1013 "SEND DATA: failed to write reg->tx_wrptr\n");
e7f767a7
AP
1014 ret = -1;
1015 goto done_unmap;
d930faee 1016 }
e7f767a7
AP
1017 if ((mwifiex_pcie_txbd_not_full(card)) &&
1018 tx_param->next_pkt_len) {
1019 /* have more packets and TxBD still can hold more */
1020 dev_dbg(adapter->dev,
1021 "SEND DATA: delay dnld-rdy interrupt.\n");
1022 adapter->data_sent = false;
1023 } else {
1024 /* Send the TX ready interrupt */
1025 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
1026 CPU_INTR_DNLD_RDY)) {
1027 dev_err(adapter->dev,
1028 "SEND DATA: failed to assert dnld-rdy interrupt.\n");
1029 ret = -1;
1030 goto done_unmap;
1031 }
d930faee
AK
1032 }
1033 dev_dbg(adapter->dev, "info: SEND DATA: Updated <Rd: %#x, Wr: "
f57c1edc 1034 "%#x> and sent packet to firmware successfully\n",
e7f767a7 1035 card->txbd_rdptr, card->txbd_wrptr);
d930faee 1036 } else {
f57c1edc
YAP
1037 dev_dbg(adapter->dev,
1038 "info: TX Ring full, can't send packets to fw\n");
d930faee
AK
1039 adapter->data_sent = true;
1040 /* Send the TX ready interrupt */
1041 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
1042 CPU_INTR_DNLD_RDY))
f57c1edc
YAP
1043 dev_err(adapter->dev,
1044 "SEND DATA: failed to assert door-bell intr\n");
d930faee
AK
1045 return -EBUSY;
1046 }
1047
e7f767a7
AP
1048 return -EINPROGRESS;
1049done_unmap:
1050 MWIFIEX_SKB_PACB(skb, &buf_pa);
1051 pci_unmap_single(card->dev, buf_pa, skb->len, PCI_DMA_TODEVICE);
1052 card->tx_buf_list[wrindx] = NULL;
e05dc3e9 1053 memset(desc, 0, sizeof(*desc));
e7f767a7 1054 return ret;
d930faee
AK
1055}
1056
1057/*
1058 * This function handles received buffer ring and
1059 * dispatches packets to upper
1060 */
1061static int mwifiex_pcie_process_recv_data(struct mwifiex_adapter *adapter)
1062{
1063 struct pcie_service_card *card = adapter->card;
dd04e6ac 1064 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee 1065 u32 wrptr, rd_index;
e7f767a7 1066 dma_addr_t buf_pa;
d930faee
AK
1067 int ret = 0;
1068 struct sk_buff *skb_tmp = NULL;
e05dc3e9 1069 struct mwifiex_pcie_buf_desc *desc;
d930faee 1070
e7f767a7
AP
1071 if (!mwifiex_pcie_ok_to_access_hw(adapter))
1072 mwifiex_pm_wakeup_card(adapter);
1073
d930faee 1074 /* Read the RX ring Write pointer set by firmware */
dd04e6ac 1075 if (mwifiex_read_reg(adapter, reg->rx_wrptr, &wrptr)) {
f57c1edc 1076 dev_err(adapter->dev,
dd04e6ac 1077 "RECV DATA: failed to read reg->rx_wrptr\n");
d930faee
AK
1078 ret = -1;
1079 goto done;
1080 }
e7f767a7 1081 card->rxbd_wrptr = wrptr;
d930faee 1082
dd04e6ac
AP
1083 while (((wrptr & reg->rx_mask) !=
1084 (card->rxbd_rdptr & reg->rx_mask)) ||
1085 ((wrptr & reg->rx_rollover_ind) ==
1086 (card->rxbd_rdptr & reg->rx_rollover_ind))) {
d930faee
AK
1087 struct sk_buff *skb_data;
1088 u16 rx_len;
e7f767a7 1089 __le16 pkt_len;
d930faee 1090
dd04e6ac 1091 rd_index = card->rxbd_rdptr & reg->rx_mask;
d930faee
AK
1092 skb_data = card->rx_buf_list[rd_index];
1093
e7f767a7
AP
1094 MWIFIEX_SKB_PACB(skb_data, &buf_pa);
1095 pci_unmap_single(card->dev, buf_pa, MWIFIEX_RX_DATA_BUF_SIZE,
1096 PCI_DMA_FROMDEVICE);
1097 card->rx_buf_list[rd_index] = NULL;
1098
d930faee 1099 /* Get data length from interface header -
e7f767a7
AP
1100 * first 2 bytes for len, next 2 bytes is for type
1101 */
1102 pkt_len = *((__le16 *)skb_data->data);
1103 rx_len = le16_to_cpu(pkt_len);
1104 skb_put(skb_data, rx_len);
f57c1edc
YAP
1105 dev_dbg(adapter->dev,
1106 "info: RECV DATA: Rd=%#x, Wr=%#x, Len=%d\n",
1107 card->rxbd_rdptr, wrptr, rx_len);
e7f767a7
AP
1108 skb_pull(skb_data, INTF_HEADER_LEN);
1109 mwifiex_handle_rx_packet(adapter, skb_data);
1110
1111 skb_tmp = dev_alloc_skb(MWIFIEX_RX_DATA_BUF_SIZE);
d930faee 1112 if (!skb_tmp) {
e7f767a7
AP
1113 dev_err(adapter->dev,
1114 "Unable to allocate skb.\n");
1115 return -ENOMEM;
d930faee
AK
1116 }
1117
e7f767a7
AP
1118 if (mwifiex_map_pci_memory(adapter, skb_tmp,
1119 MWIFIEX_RX_DATA_BUF_SIZE,
1120 PCI_DMA_FROMDEVICE))
1121 return -1;
1122
1123 MWIFIEX_SKB_PACB(skb_tmp, &buf_pa);
1124
1125 dev_dbg(adapter->dev,
1126 "RECV DATA: Attach new sk_buff %p at rxbd_rdidx=%d\n",
1127 skb_tmp, rd_index);
1128 card->rx_buf_list[rd_index] = skb_tmp;
e05dc3e9
AP
1129 desc = card->rxbd_ring[rd_index];
1130 desc->paddr = buf_pa;
1131 desc->len = skb_tmp->len;
1132 desc->flags = 0;
d930faee 1133
dd04e6ac 1134 if ((++card->rxbd_rdptr & reg->rx_mask) ==
d930faee
AK
1135 MWIFIEX_MAX_TXRX_BD) {
1136 card->rxbd_rdptr = ((card->rxbd_rdptr &
dd04e6ac
AP
1137 reg->rx_rollover_ind) ^
1138 reg->rx_rollover_ind);
d930faee
AK
1139 }
1140 dev_dbg(adapter->dev, "info: RECV DATA: <Rd: %#x, Wr: %#x>\n",
f57c1edc 1141 card->rxbd_rdptr, wrptr);
d930faee 1142
dd04e6ac
AP
1143 /* Write the RX ring read pointer in to reg->rx_rdptr */
1144 if (mwifiex_write_reg(adapter, reg->rx_rdptr,
d930faee 1145 card->rxbd_rdptr)) {
f57c1edc 1146 dev_err(adapter->dev,
dd04e6ac 1147 "RECV DATA: failed to write reg->rx_rdptr\n");
d930faee
AK
1148 ret = -1;
1149 goto done;
1150 }
1151
1152 /* Read the RX ring Write pointer set by firmware */
dd04e6ac 1153 if (mwifiex_read_reg(adapter, reg->rx_wrptr, &wrptr)) {
f57c1edc 1154 dev_err(adapter->dev,
dd04e6ac 1155 "RECV DATA: failed to read reg->rx_wrptr\n");
d930faee
AK
1156 ret = -1;
1157 goto done;
1158 }
f57c1edc
YAP
1159 dev_dbg(adapter->dev,
1160 "info: RECV DATA: Rcvd packet from fw successfully\n");
e7f767a7 1161 card->rxbd_wrptr = wrptr;
d930faee
AK
1162 }
1163
1164done:
d930faee
AK
1165 return ret;
1166}
1167
1168/*
1169 * This function downloads the boot command to device
1170 */
1171static int
1172mwifiex_pcie_send_boot_cmd(struct mwifiex_adapter *adapter, struct sk_buff *skb)
1173{
fc331460
AP
1174 dma_addr_t buf_pa;
1175 struct pcie_service_card *card = adapter->card;
dd04e6ac 1176 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee 1177
fc331460 1178 if (!(skb->data && skb->len)) {
f57c1edc 1179 dev_err(adapter->dev,
fc331460
AP
1180 "Invalid parameter in %s <%p. len %d>\n",
1181 __func__, skb->data, skb->len);
d930faee
AK
1182 return -1;
1183 }
1184
fc331460
AP
1185 if (mwifiex_map_pci_memory(adapter, skb, skb->len , PCI_DMA_TODEVICE))
1186 return -1;
1187
1188 MWIFIEX_SKB_PACB(skb, &buf_pa);
1189
dd04e6ac
AP
1190 /* Write the lower 32bits of the physical address to low command
1191 * address scratch register
1192 */
1193 if (mwifiex_write_reg(adapter, reg->cmd_addr_lo, (u32)buf_pa)) {
f57c1edc
YAP
1194 dev_err(adapter->dev,
1195 "%s: failed to write download command to boot code.\n",
1196 __func__);
fc331460
AP
1197 pci_unmap_single(card->dev, buf_pa, MWIFIEX_UPLD_SIZE,
1198 PCI_DMA_TODEVICE);
d930faee
AK
1199 return -1;
1200 }
1201
dd04e6ac
AP
1202 /* Write the upper 32bits of the physical address to high command
1203 * address scratch register
1204 */
1205 if (mwifiex_write_reg(adapter, reg->cmd_addr_hi,
fc331460 1206 (u32)((u64)buf_pa >> 32))) {
f57c1edc
YAP
1207 dev_err(adapter->dev,
1208 "%s: failed to write download command to boot code.\n",
1209 __func__);
fc331460
AP
1210 pci_unmap_single(card->dev, buf_pa, MWIFIEX_UPLD_SIZE,
1211 PCI_DMA_TODEVICE);
d930faee
AK
1212 return -1;
1213 }
1214
dd04e6ac
AP
1215 /* Write the command length to cmd_size scratch register */
1216 if (mwifiex_write_reg(adapter, reg->cmd_size, skb->len)) {
f57c1edc 1217 dev_err(adapter->dev,
dd04e6ac 1218 "%s: failed to write command len to cmd_size scratch reg\n",
f57c1edc 1219 __func__);
fc331460
AP
1220 pci_unmap_single(card->dev, buf_pa, MWIFIEX_UPLD_SIZE,
1221 PCI_DMA_TODEVICE);
d930faee
AK
1222 return -1;
1223 }
1224
1225 /* Ring the door bell */
1226 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
1227 CPU_INTR_DOOR_BELL)) {
f57c1edc
YAP
1228 dev_err(adapter->dev,
1229 "%s: failed to assert door-bell intr\n", __func__);
fc331460
AP
1230 pci_unmap_single(card->dev, buf_pa,
1231 MWIFIEX_UPLD_SIZE, PCI_DMA_TODEVICE);
d930faee
AK
1232 return -1;
1233 }
1234
1235 return 0;
1236}
1237
c6d1d87a
AP
1238/* This function init rx port in firmware which in turn enables to receive data
1239 * from device before transmitting any packet.
1240 */
1241static int mwifiex_pcie_init_fw_port(struct mwifiex_adapter *adapter)
1242{
1243 struct pcie_service_card *card = adapter->card;
dd04e6ac 1244 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
c6d1d87a 1245
dd04e6ac
AP
1246 /* Write the RX ring read pointer in to reg->rx_rdptr */
1247 if (mwifiex_write_reg(adapter, reg->rx_rdptr, card->rxbd_rdptr)) {
c6d1d87a 1248 dev_err(adapter->dev,
dd04e6ac 1249 "RECV DATA: failed to write reg->rx_rdptr\n");
c6d1d87a
AP
1250 return -1;
1251 }
1252 return 0;
1253}
1254
1255/* This function downloads commands to the device
d930faee
AK
1256 */
1257static int
1258mwifiex_pcie_send_cmd(struct mwifiex_adapter *adapter, struct sk_buff *skb)
1259{
1260 struct pcie_service_card *card = adapter->card;
dd04e6ac 1261 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee 1262 int ret = 0;
fc331460
AP
1263 dma_addr_t cmd_buf_pa, cmdrsp_buf_pa;
1264 u8 *payload = (u8 *)skb->data;
d930faee
AK
1265
1266 if (!(skb->data && skb->len)) {
1267 dev_err(adapter->dev, "Invalid parameter in %s <%p, %#x>\n",
f57c1edc 1268 __func__, skb->data, skb->len);
d930faee
AK
1269 return -1;
1270 }
1271
1272 /* Make sure a command response buffer is available */
1273 if (!card->cmdrsp_buf) {
f57c1edc
YAP
1274 dev_err(adapter->dev,
1275 "No response buffer available, send command failed\n");
d930faee
AK
1276 return -EBUSY;
1277 }
1278
fc331460
AP
1279 if (!mwifiex_pcie_ok_to_access_hw(adapter))
1280 mwifiex_pm_wakeup_card(adapter);
d930faee
AK
1281
1282 adapter->cmd_sent = true;
fc331460
AP
1283
1284 *(__le16 *)&payload[0] = cpu_to_le16((u16)skb->len);
1285 *(__le16 *)&payload[2] = cpu_to_le16(MWIFIEX_TYPE_CMD);
1286
1287 if (mwifiex_map_pci_memory(adapter, skb, skb->len, PCI_DMA_TODEVICE))
1288 return -1;
1289
1290 card->cmd_buf = skb;
d930faee
AK
1291
1292 /* To send a command, the driver will:
1293 1. Write the 64bit physical address of the data buffer to
dd04e6ac 1294 cmd response address low + cmd response address high
d930faee
AK
1295 2. Ring the door bell (i.e. set the door bell interrupt)
1296
1297 In response to door bell interrupt, the firmware will perform
1298 the DMA of the command packet (first header to obtain the total
1299 length and then rest of the command).
1300 */
1301
1302 if (card->cmdrsp_buf) {
fc331460 1303 MWIFIEX_SKB_PACB(card->cmdrsp_buf, &cmdrsp_buf_pa);
d930faee
AK
1304 /* Write the lower 32bits of the cmdrsp buffer physical
1305 address */
dd04e6ac 1306 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_lo,
fc331460 1307 (u32)cmdrsp_buf_pa)) {
f57c1edc
YAP
1308 dev_err(adapter->dev,
1309 "Failed to write download cmd to boot code.\n");
d930faee
AK
1310 ret = -1;
1311 goto done;
1312 }
1313 /* Write the upper 32bits of the cmdrsp buffer physical
1314 address */
dd04e6ac 1315 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_hi,
fc331460 1316 (u32)((u64)cmdrsp_buf_pa >> 32))) {
f57c1edc
YAP
1317 dev_err(adapter->dev,
1318 "Failed to write download cmd to boot code.\n");
d930faee
AK
1319 ret = -1;
1320 goto done;
1321 }
1322 }
1323
fc331460 1324 MWIFIEX_SKB_PACB(card->cmd_buf, &cmd_buf_pa);
dd04e6ac
AP
1325 /* Write the lower 32bits of the physical address to reg->cmd_addr_lo */
1326 if (mwifiex_write_reg(adapter, reg->cmd_addr_lo,
1327 (u32)cmd_buf_pa)) {
f57c1edc
YAP
1328 dev_err(adapter->dev,
1329 "Failed to write download cmd to boot code.\n");
d930faee
AK
1330 ret = -1;
1331 goto done;
1332 }
dd04e6ac
AP
1333 /* Write the upper 32bits of the physical address to reg->cmd_addr_hi */
1334 if (mwifiex_write_reg(adapter, reg->cmd_addr_hi,
fc331460 1335 (u32)((u64)cmd_buf_pa >> 32))) {
f57c1edc
YAP
1336 dev_err(adapter->dev,
1337 "Failed to write download cmd to boot code.\n");
d930faee
AK
1338 ret = -1;
1339 goto done;
1340 }
1341
dd04e6ac
AP
1342 /* Write the command length to reg->cmd_size */
1343 if (mwifiex_write_reg(adapter, reg->cmd_size,
1344 card->cmd_buf->len)) {
f57c1edc 1345 dev_err(adapter->dev,
dd04e6ac 1346 "Failed to write cmd len to reg->cmd_size\n");
d930faee
AK
1347 ret = -1;
1348 goto done;
1349 }
1350
1351 /* Ring the door bell */
1352 if (mwifiex_write_reg(adapter, PCIE_CPU_INT_EVENT,
1353 CPU_INTR_DOOR_BELL)) {
f57c1edc
YAP
1354 dev_err(adapter->dev,
1355 "Failed to assert door-bell intr\n");
d930faee
AK
1356 ret = -1;
1357 goto done;
1358 }
1359
1360done:
1361 if (ret)
1362 adapter->cmd_sent = false;
1363
1364 return 0;
1365}
1366
1367/*
1368 * This function handles command complete interrupt
1369 */
1370static int mwifiex_pcie_process_cmd_complete(struct mwifiex_adapter *adapter)
1371{
1372 struct pcie_service_card *card = adapter->card;
dd04e6ac 1373 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
f57c1edc 1374 struct sk_buff *skb = card->cmdrsp_buf;
d930faee 1375 int count = 0;
fc331460
AP
1376 u16 rx_len;
1377 __le16 pkt_len;
1378 dma_addr_t buf_pa;
d930faee
AK
1379
1380 dev_dbg(adapter->dev, "info: Rx CMD Response\n");
1381
fc331460
AP
1382 MWIFIEX_SKB_PACB(skb, &buf_pa);
1383 pci_unmap_single(card->dev, buf_pa, MWIFIEX_UPLD_SIZE,
1384 PCI_DMA_FROMDEVICE);
1385
1386 pkt_len = *((__le16 *)skb->data);
1387 rx_len = le16_to_cpu(pkt_len);
1388 skb_trim(skb, rx_len);
1389 skb_pull(skb, INTF_HEADER_LEN);
1390
d930faee 1391 if (!adapter->curr_cmd) {
d930faee 1392 if (adapter->ps_state == PS_STATE_SLEEP_CFM) {
f57c1edc
YAP
1393 mwifiex_process_sleep_confirm_resp(adapter, skb->data,
1394 skb->len);
d930faee
AK
1395 while (mwifiex_pcie_ok_to_access_hw(adapter) &&
1396 (count++ < 10))
e7891ba2 1397 usleep_range(50, 60);
d930faee 1398 } else {
f57c1edc
YAP
1399 dev_err(adapter->dev,
1400 "There is no command but got cmdrsp\n");
d930faee 1401 }
f57c1edc
YAP
1402 memcpy(adapter->upld_buf, skb->data,
1403 min_t(u32, MWIFIEX_SIZE_OF_CMD_BUFFER, skb->len));
fc331460
AP
1404 if (mwifiex_map_pci_memory(adapter, skb, MWIFIEX_UPLD_SIZE,
1405 PCI_DMA_FROMDEVICE))
1406 return -1;
1407
1408 MWIFIEX_SKB_PACB(skb, &buf_pa);
d930faee 1409 } else if (mwifiex_pcie_ok_to_access_hw(adapter)) {
f57c1edc 1410 adapter->curr_cmd->resp_skb = skb;
d930faee
AK
1411 adapter->cmd_resp_received = true;
1412 /* Take the pointer and set it to CMD node and will
1413 return in the response complete callback */
1414 card->cmdrsp_buf = NULL;
1415
1416 /* Clear the cmd-rsp buffer address in scratch registers. This
1417 will prevent firmware from writing to the same response
1418 buffer again. */
dd04e6ac 1419 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_lo, 0)) {
f57c1edc
YAP
1420 dev_err(adapter->dev,
1421 "cmd_done: failed to clear cmd_rsp_addr_lo\n");
d930faee
AK
1422 return -1;
1423 }
1424 /* Write the upper 32bits of the cmdrsp buffer physical
1425 address */
dd04e6ac 1426 if (mwifiex_write_reg(adapter, reg->cmdrsp_addr_hi, 0)) {
f57c1edc
YAP
1427 dev_err(adapter->dev,
1428 "cmd_done: failed to clear cmd_rsp_addr_hi\n");
d930faee
AK
1429 return -1;
1430 }
1431 }
1432
1433 return 0;
1434}
1435
1436/*
1437 * Command Response processing complete handler
1438 */
1439static int mwifiex_pcie_cmdrsp_complete(struct mwifiex_adapter *adapter,
1440 struct sk_buff *skb)
1441{
1442 struct pcie_service_card *card = adapter->card;
fc331460
AP
1443 dma_addr_t buf_pa;
1444 struct sk_buff *skb_tmp;
d930faee
AK
1445
1446 if (skb) {
1447 card->cmdrsp_buf = skb;
1448 skb_push(card->cmdrsp_buf, INTF_HEADER_LEN);
fc331460
AP
1449 if (mwifiex_map_pci_memory(adapter, skb, MWIFIEX_UPLD_SIZE,
1450 PCI_DMA_FROMDEVICE))
1451 return -1;
1452 }
1453
1454 skb_tmp = card->cmd_buf;
1455 if (skb_tmp) {
1456 MWIFIEX_SKB_PACB(skb_tmp, &buf_pa);
1457 pci_unmap_single(card->dev, buf_pa, MWIFIEX_UPLD_SIZE,
1458 PCI_DMA_FROMDEVICE);
1459 card->cmd_buf = NULL;
d930faee
AK
1460 }
1461
1462 return 0;
1463}
1464
1465/*
1466 * This function handles firmware event ready interrupt
1467 */
1468static int mwifiex_pcie_process_event_ready(struct mwifiex_adapter *adapter)
1469{
1470 struct pcie_service_card *card = adapter->card;
dd04e6ac 1471 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee
AK
1472 u32 rdptr = card->evtbd_rdptr & MWIFIEX_EVTBD_MASK;
1473 u32 wrptr, event;
fc331460 1474 dma_addr_t buf_pa;
e05dc3e9 1475 struct mwifiex_evt_buf_desc *desc;
fc331460
AP
1476
1477 if (!mwifiex_pcie_ok_to_access_hw(adapter))
1478 mwifiex_pm_wakeup_card(adapter);
d930faee
AK
1479
1480 if (adapter->event_received) {
f57c1edc
YAP
1481 dev_dbg(adapter->dev, "info: Event being processed, "
1482 "do not process this interrupt just yet\n");
d930faee
AK
1483 return 0;
1484 }
1485
1486 if (rdptr >= MWIFIEX_MAX_EVT_BD) {
1487 dev_dbg(adapter->dev, "info: Invalid read pointer...\n");
1488 return -1;
1489 }
1490
1491 /* Read the event ring write pointer set by firmware */
dd04e6ac 1492 if (mwifiex_read_reg(adapter, reg->evt_wrptr, &wrptr)) {
f57c1edc 1493 dev_err(adapter->dev,
dd04e6ac 1494 "EventReady: failed to read reg->evt_wrptr\n");
d930faee
AK
1495 return -1;
1496 }
1497
1498 dev_dbg(adapter->dev, "info: EventReady: Initial <Rd: 0x%x, Wr: 0x%x>",
f57c1edc
YAP
1499 card->evtbd_rdptr, wrptr);
1500 if (((wrptr & MWIFIEX_EVTBD_MASK) != (card->evtbd_rdptr
1501 & MWIFIEX_EVTBD_MASK)) ||
dd04e6ac
AP
1502 ((wrptr & reg->evt_rollover_ind) ==
1503 (card->evtbd_rdptr & reg->evt_rollover_ind))) {
d930faee
AK
1504 struct sk_buff *skb_cmd;
1505 __le16 data_len = 0;
1506 u16 evt_len;
1507
1508 dev_dbg(adapter->dev, "info: Read Index: %d\n", rdptr);
1509 skb_cmd = card->evt_buf_list[rdptr];
fc331460
AP
1510 MWIFIEX_SKB_PACB(skb_cmd, &buf_pa);
1511 pci_unmap_single(card->dev, buf_pa, MAX_EVENT_SIZE,
1512 PCI_DMA_FROMDEVICE);
1513
d930faee
AK
1514 /* Take the pointer and set it to event pointer in adapter
1515 and will return back after event handling callback */
1516 card->evt_buf_list[rdptr] = NULL;
e05dc3e9
AP
1517 desc = card->evtbd_ring[rdptr];
1518 memset(desc, 0, sizeof(*desc));
d930faee
AK
1519
1520 event = *(u32 *) &skb_cmd->data[INTF_HEADER_LEN];
1521 adapter->event_cause = event;
1522 /* The first 4bytes will be the event transfer header
1523 len is 2 bytes followed by type which is 2 bytes */
1524 memcpy(&data_len, skb_cmd->data, sizeof(__le16));
1525 evt_len = le16_to_cpu(data_len);
1526
1527 skb_pull(skb_cmd, INTF_HEADER_LEN);
1528 dev_dbg(adapter->dev, "info: Event length: %d\n", evt_len);
1529
1530 if ((evt_len > 0) && (evt_len < MAX_EVENT_SIZE))
1531 memcpy(adapter->event_body, skb_cmd->data +
1532 MWIFIEX_EVENT_HEADER_LEN, evt_len -
1533 MWIFIEX_EVENT_HEADER_LEN);
1534
1535 adapter->event_received = true;
1536 adapter->event_skb = skb_cmd;
1537
1538 /* Do not update the event read pointer here, wait till the
1539 buffer is released. This is just to make things simpler,
1540 we need to find a better method of managing these buffers.
1541 */
1542 }
1543
1544 return 0;
1545}
1546
1547/*
1548 * Event processing complete handler
1549 */
1550static int mwifiex_pcie_event_complete(struct mwifiex_adapter *adapter,
1551 struct sk_buff *skb)
1552{
1553 struct pcie_service_card *card = adapter->card;
dd04e6ac 1554 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee
AK
1555 int ret = 0;
1556 u32 rdptr = card->evtbd_rdptr & MWIFIEX_EVTBD_MASK;
1557 u32 wrptr;
fc331460 1558 dma_addr_t buf_pa;
e05dc3e9 1559 struct mwifiex_evt_buf_desc *desc;
d930faee
AK
1560
1561 if (!skb)
1562 return 0;
1563
1eb54c8a 1564 if (rdptr >= MWIFIEX_MAX_EVT_BD) {
d930faee 1565 dev_err(adapter->dev, "event_complete: Invalid rdptr 0x%x\n",
f57c1edc 1566 rdptr);
8c53e42d 1567 return -EINVAL;
1eb54c8a 1568 }
d930faee
AK
1569
1570 /* Read the event ring write pointer set by firmware */
dd04e6ac 1571 if (mwifiex_read_reg(adapter, reg->evt_wrptr, &wrptr)) {
f57c1edc 1572 dev_err(adapter->dev,
dd04e6ac 1573 "event_complete: failed to read reg->evt_wrptr\n");
8c53e42d 1574 return -1;
d930faee
AK
1575 }
1576
1577 if (!card->evt_buf_list[rdptr]) {
1578 skb_push(skb, INTF_HEADER_LEN);
fc331460
AP
1579 if (mwifiex_map_pci_memory(adapter, skb,
1580 MAX_EVENT_SIZE,
1581 PCI_DMA_FROMDEVICE))
1582 return -1;
1583 MWIFIEX_SKB_PACB(skb, &buf_pa);
d930faee 1584 card->evt_buf_list[rdptr] = skb;
fc331460 1585 MWIFIEX_SKB_PACB(skb, &buf_pa);
e05dc3e9
AP
1586 desc = card->evtbd_ring[rdptr];
1587 desc->paddr = buf_pa;
1588 desc->len = (u16)skb->len;
1589 desc->flags = 0;
d930faee
AK
1590 skb = NULL;
1591 } else {
f57c1edc
YAP
1592 dev_dbg(adapter->dev,
1593 "info: ERROR: buf still valid at index %d, <%p, %p>\n",
1594 rdptr, card->evt_buf_list[rdptr], skb);
d930faee
AK
1595 }
1596
1597 if ((++card->evtbd_rdptr & MWIFIEX_EVTBD_MASK) == MWIFIEX_MAX_EVT_BD) {
1598 card->evtbd_rdptr = ((card->evtbd_rdptr &
dd04e6ac
AP
1599 reg->evt_rollover_ind) ^
1600 reg->evt_rollover_ind);
d930faee
AK
1601 }
1602
1603 dev_dbg(adapter->dev, "info: Updated <Rd: 0x%x, Wr: 0x%x>",
f57c1edc 1604 card->evtbd_rdptr, wrptr);
d930faee 1605
dd04e6ac
AP
1606 /* Write the event ring read pointer in to reg->evt_rdptr */
1607 if (mwifiex_write_reg(adapter, reg->evt_rdptr,
1608 card->evtbd_rdptr)) {
f57c1edc 1609 dev_err(adapter->dev,
dd04e6ac 1610 "event_complete: failed to read reg->evt_rdptr\n");
8c53e42d 1611 return -1;
d930faee
AK
1612 }
1613
d930faee
AK
1614 dev_dbg(adapter->dev, "info: Check Events Again\n");
1615 ret = mwifiex_pcie_process_event_ready(adapter);
1616
1617 return ret;
1618}
1619
1620/*
1621 * This function downloads the firmware to the card.
1622 *
1623 * Firmware is downloaded to the card in blocks. Every block download
1624 * is tested for CRC errors, and retried a number of times before
1625 * returning failure.
1626 */
1627static int mwifiex_prog_fw_w_helper(struct mwifiex_adapter *adapter,
1628 struct mwifiex_fw_image *fw)
1629{
1630 int ret;
1631 u8 *firmware = fw->fw_buf;
1632 u32 firmware_len = fw->fw_len;
1633 u32 offset = 0;
1634 struct sk_buff *skb;
1635 u32 txlen, tx_blocks = 0, tries, len;
1636 u32 block_retry_cnt = 0;
fc331460
AP
1637 dma_addr_t buf_pa;
1638 struct pcie_service_card *card = adapter->card;
dd04e6ac 1639 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee
AK
1640
1641 if (!firmware || !firmware_len) {
f57c1edc
YAP
1642 dev_err(adapter->dev,
1643 "No firmware image found! Terminating download\n");
d930faee
AK
1644 return -1;
1645 }
1646
1647 dev_dbg(adapter->dev, "info: Downloading FW image (%d bytes)\n",
f57c1edc 1648 firmware_len);
d930faee
AK
1649
1650 if (mwifiex_pcie_disable_host_int(adapter)) {
f57c1edc
YAP
1651 dev_err(adapter->dev,
1652 "%s: Disabling interrupts failed.\n", __func__);
d930faee
AK
1653 return -1;
1654 }
1655
1656 skb = dev_alloc_skb(MWIFIEX_UPLD_SIZE);
1657 if (!skb) {
1658 ret = -ENOMEM;
1659 goto done;
1660 }
d930faee
AK
1661
1662 /* Perform firmware data transfer */
1663 do {
1664 u32 ireg_intr = 0;
1665
1666 /* More data? */
1667 if (offset >= firmware_len)
1668 break;
1669
1670 for (tries = 0; tries < MAX_POLL_TRIES; tries++) {
dd04e6ac 1671 ret = mwifiex_read_reg(adapter, reg->cmd_size,
d930faee
AK
1672 &len);
1673 if (ret) {
f57c1edc
YAP
1674 dev_warn(adapter->dev,
1675 "Failed reading len from boot code\n");
d930faee
AK
1676 goto done;
1677 }
1678 if (len)
1679 break;
e7891ba2 1680 usleep_range(10, 20);
d930faee
AK
1681 }
1682
1683 if (!len) {
1684 break;
1685 } else if (len > MWIFIEX_UPLD_SIZE) {
1686 pr_err("FW download failure @ %d, invalid length %d\n",
f57c1edc 1687 offset, len);
d930faee
AK
1688 ret = -1;
1689 goto done;
1690 }
1691
1692 txlen = len;
1693
1694 if (len & BIT(0)) {
1695 block_retry_cnt++;
1696 if (block_retry_cnt > MAX_WRITE_IOMEM_RETRY) {
1697 pr_err("FW download failure @ %d, over max "
1698 "retry count\n", offset);
1699 ret = -1;
1700 goto done;
1701 }
1702 dev_err(adapter->dev, "FW CRC error indicated by the "
f57c1edc
YAP
1703 "helper: len = 0x%04X, txlen = %d\n",
1704 len, txlen);
d930faee
AK
1705 len &= ~BIT(0);
1706 /* Setting this to 0 to resend from same offset */
1707 txlen = 0;
1708 } else {
1709 block_retry_cnt = 0;
1710 /* Set blocksize to transfer - checking for
1711 last block */
1712 if (firmware_len - offset < txlen)
1713 txlen = firmware_len - offset;
1714
1715 dev_dbg(adapter->dev, ".");
1716
dd04e6ac
AP
1717 tx_blocks = (txlen + card->pcie.blksz_fw_dl - 1) /
1718 card->pcie.blksz_fw_dl;
d930faee
AK
1719
1720 /* Copy payload to buffer */
1721 memmove(skb->data, &firmware[offset], txlen);
1722 }
1723
1724 skb_put(skb, MWIFIEX_UPLD_SIZE - skb->len);
dd04e6ac 1725 skb_trim(skb, tx_blocks * card->pcie.blksz_fw_dl);
d930faee
AK
1726
1727 /* Send the boot command to device */
1728 if (mwifiex_pcie_send_boot_cmd(adapter, skb)) {
f57c1edc
YAP
1729 dev_err(adapter->dev,
1730 "Failed to send firmware download command\n");
d930faee
AK
1731 ret = -1;
1732 goto done;
1733 }
fc331460
AP
1734
1735 MWIFIEX_SKB_PACB(skb, &buf_pa);
1736
d930faee
AK
1737 /* Wait for the command done interrupt */
1738 do {
1739 if (mwifiex_read_reg(adapter, PCIE_CPU_INT_STATUS,
1740 &ireg_intr)) {
1741 dev_err(adapter->dev, "%s: Failed to read "
f57c1edc
YAP
1742 "interrupt status during fw dnld.\n",
1743 __func__);
fc331460
AP
1744 pci_unmap_single(card->dev, buf_pa, skb->len,
1745 PCI_DMA_TODEVICE);
d930faee
AK
1746 ret = -1;
1747 goto done;
1748 }
1749 } while ((ireg_intr & CPU_INTR_DOOR_BELL) ==
1750 CPU_INTR_DOOR_BELL);
fc331460
AP
1751
1752 pci_unmap_single(card->dev, buf_pa, skb->len,
1753 PCI_DMA_TODEVICE);
1754
d930faee
AK
1755 offset += txlen;
1756 } while (true);
1757
1758 dev_dbg(adapter->dev, "info:\nFW download over, size %d bytes\n",
f57c1edc 1759 offset);
d930faee
AK
1760
1761 ret = 0;
1762
1763done:
1764 dev_kfree_skb_any(skb);
1765 return ret;
1766}
1767
1768/*
1769 * This function checks the firmware status in card.
1770 *
1771 * The winner interface is also determined by this function.
1772 */
1773static int
1774mwifiex_check_fw_status(struct mwifiex_adapter *adapter, u32 poll_num)
1775{
1776 int ret = 0;
1777 u32 firmware_stat, winner_status;
dd04e6ac
AP
1778 struct pcie_service_card *card = adapter->card;
1779 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee
AK
1780 u32 tries;
1781
1782 /* Mask spurios interrupts */
1783 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_STATUS_MASK,
f57c1edc 1784 HOST_INTR_MASK)) {
d930faee
AK
1785 dev_warn(adapter->dev, "Write register failed\n");
1786 return -1;
1787 }
1788
1789 dev_dbg(adapter->dev, "Setting driver ready signature\n");
dd04e6ac
AP
1790 if (mwifiex_write_reg(adapter, reg->drv_rdy,
1791 FIRMWARE_READY_PCIE)) {
f57c1edc
YAP
1792 dev_err(adapter->dev,
1793 "Failed to write driver ready signature\n");
d930faee
AK
1794 return -1;
1795 }
1796
1797 /* Wait for firmware initialization event */
1798 for (tries = 0; tries < poll_num; tries++) {
dd04e6ac 1799 if (mwifiex_read_reg(adapter, reg->fw_status,
d930faee
AK
1800 &firmware_stat))
1801 ret = -1;
1802 else
1803 ret = 0;
1804 if (ret)
1805 continue;
1806 if (firmware_stat == FIRMWARE_READY_PCIE) {
1807 ret = 0;
1808 break;
1809 } else {
1810 mdelay(100);
1811 ret = -1;
1812 }
1813 }
1814
1815 if (ret) {
dd04e6ac 1816 if (mwifiex_read_reg(adapter, reg->fw_status,
d930faee
AK
1817 &winner_status))
1818 ret = -1;
1819 else if (!winner_status) {
1820 dev_err(adapter->dev, "PCI-E is the winner\n");
1821 adapter->winner = 1;
1822 ret = -1;
1823 } else {
f57c1edc
YAP
1824 dev_err(adapter->dev,
1825 "PCI-E is not the winner <%#x,%d>, exit dnld\n",
1826 ret, adapter->winner);
d930faee
AK
1827 ret = 0;
1828 }
1829 }
1830
1831 return ret;
1832}
1833
1834/*
1835 * This function reads the interrupt status from card.
1836 */
1837static void mwifiex_interrupt_status(struct mwifiex_adapter *adapter)
1838{
1839 u32 pcie_ireg;
1840 unsigned long flags;
1841
1842 if (!mwifiex_pcie_ok_to_access_hw(adapter))
1843 return;
1844
1845 if (mwifiex_read_reg(adapter, PCIE_HOST_INT_STATUS, &pcie_ireg)) {
1846 dev_warn(adapter->dev, "Read register failed\n");
1847 return;
1848 }
1849
1850 if ((pcie_ireg != 0xFFFFFFFF) && (pcie_ireg)) {
1851
1852 mwifiex_pcie_disable_host_int(adapter);
1853
1854 /* Clear the pending interrupts */
1855 if (mwifiex_write_reg(adapter, PCIE_HOST_INT_STATUS,
1856 ~pcie_ireg)) {
1857 dev_warn(adapter->dev, "Write register failed\n");
1858 return;
1859 }
1860 spin_lock_irqsave(&adapter->int_lock, flags);
1861 adapter->int_status |= pcie_ireg;
1862 spin_unlock_irqrestore(&adapter->int_lock, flags);
1863
1864 if (pcie_ireg & HOST_INTR_CMD_DONE) {
1865 if ((adapter->ps_state == PS_STATE_SLEEP_CFM) ||
1866 (adapter->ps_state == PS_STATE_SLEEP)) {
1867 mwifiex_pcie_enable_host_int(adapter);
1868 if (mwifiex_write_reg(adapter,
f57c1edc
YAP
1869 PCIE_CPU_INT_EVENT,
1870 CPU_INTR_SLEEP_CFM_DONE)
1871 ) {
1872 dev_warn(adapter->dev,
1873 "Write register failed\n");
d930faee
AK
1874 return;
1875
1876 }
1877 }
1878 } else if (!adapter->pps_uapsd_mode &&
1879 adapter->ps_state == PS_STATE_SLEEP) {
1880 /* Potentially for PCIe we could get other
1881 * interrupts like shared. Don't change power
1882 * state until cookie is set */
1883 if (mwifiex_pcie_ok_to_access_hw(adapter))
1884 adapter->ps_state = PS_STATE_AWAKE;
1885 }
1886 }
1887}
1888
1889/*
1890 * Interrupt handler for PCIe root port
1891 *
1892 * This function reads the interrupt status from firmware and assigns
1893 * the main process in workqueue which will handle the interrupt.
1894 */
1895static irqreturn_t mwifiex_pcie_interrupt(int irq, void *context)
1896{
1897 struct pci_dev *pdev = (struct pci_dev *)context;
1898 struct pcie_service_card *card;
1899 struct mwifiex_adapter *adapter;
1900
1901 if (!pdev) {
1902 pr_debug("info: %s: pdev is NULL\n", (u8 *)pdev);
1903 goto exit;
1904 }
1905
1906 card = (struct pcie_service_card *) pci_get_drvdata(pdev);
1907 if (!card || !card->adapter) {
1908 pr_debug("info: %s: card=%p adapter=%p\n", __func__, card,
f57c1edc 1909 card ? card->adapter : NULL);
d930faee
AK
1910 goto exit;
1911 }
1912 adapter = card->adapter;
1913
1914 if (adapter->surprise_removed)
1915 goto exit;
1916
1917 mwifiex_interrupt_status(adapter);
1918 queue_work(adapter->workqueue, &adapter->main_work);
1919
1920exit:
1921 return IRQ_HANDLED;
1922}
1923
1924/*
1925 * This function checks the current interrupt status.
1926 *
1927 * The following interrupts are checked and handled by this function -
1928 * - Data sent
1929 * - Command sent
1930 * - Command received
1931 * - Packets received
1932 * - Events received
1933 *
1934 * In case of Rx packets received, the packets are uploaded from card to
1935 * host and processed accordingly.
1936 */
1937static int mwifiex_process_int_status(struct mwifiex_adapter *adapter)
1938{
1939 int ret;
659c4788 1940 u32 pcie_ireg;
d930faee
AK
1941 unsigned long flags;
1942
1943 spin_lock_irqsave(&adapter->int_lock, flags);
1944 /* Clear out unused interrupts */
659c4788
AP
1945 pcie_ireg = adapter->int_status;
1946 adapter->int_status = 0;
d930faee
AK
1947 spin_unlock_irqrestore(&adapter->int_lock, flags);
1948
659c4788
AP
1949 while (pcie_ireg & HOST_INTR_MASK) {
1950 if (pcie_ireg & HOST_INTR_DNLD_DONE) {
1951 pcie_ireg &= ~HOST_INTR_DNLD_DONE;
e7f767a7
AP
1952 dev_dbg(adapter->dev, "info: TX DNLD Done\n");
1953 ret = mwifiex_pcie_send_data_complete(adapter);
1954 if (ret)
1955 return ret;
d930faee 1956 }
659c4788
AP
1957 if (pcie_ireg & HOST_INTR_UPLD_RDY) {
1958 pcie_ireg &= ~HOST_INTR_UPLD_RDY;
d930faee
AK
1959 dev_dbg(adapter->dev, "info: Rx DATA\n");
1960 ret = mwifiex_pcie_process_recv_data(adapter);
1961 if (ret)
1962 return ret;
1963 }
659c4788
AP
1964 if (pcie_ireg & HOST_INTR_EVENT_RDY) {
1965 pcie_ireg &= ~HOST_INTR_EVENT_RDY;
d930faee
AK
1966 dev_dbg(adapter->dev, "info: Rx EVENT\n");
1967 ret = mwifiex_pcie_process_event_ready(adapter);
1968 if (ret)
1969 return ret;
1970 }
1971
659c4788
AP
1972 if (pcie_ireg & HOST_INTR_CMD_DONE) {
1973 pcie_ireg &= ~HOST_INTR_CMD_DONE;
d930faee 1974 if (adapter->cmd_sent) {
f57c1edc
YAP
1975 dev_dbg(adapter->dev,
1976 "info: CMD sent Interrupt\n");
d930faee
AK
1977 adapter->cmd_sent = false;
1978 }
1979 /* Handle command response */
1980 ret = mwifiex_pcie_process_cmd_complete(adapter);
1981 if (ret)
1982 return ret;
1983 }
1984
1985 if (mwifiex_pcie_ok_to_access_hw(adapter)) {
1986 if (mwifiex_read_reg(adapter, PCIE_HOST_INT_STATUS,
1987 &pcie_ireg)) {
f57c1edc
YAP
1988 dev_warn(adapter->dev,
1989 "Read register failed\n");
d930faee
AK
1990 return -1;
1991 }
1992
1993 if ((pcie_ireg != 0xFFFFFFFF) && (pcie_ireg)) {
1994 if (mwifiex_write_reg(adapter,
f57c1edc
YAP
1995 PCIE_HOST_INT_STATUS,
1996 ~pcie_ireg)) {
1997 dev_warn(adapter->dev,
1998 "Write register failed\n");
d930faee
AK
1999 return -1;
2000 }
d930faee
AK
2001 }
2002
2003 }
2004 }
2005 dev_dbg(adapter->dev, "info: cmd_sent=%d data_sent=%d\n",
f57c1edc 2006 adapter->cmd_sent, adapter->data_sent);
d930faee
AK
2007 mwifiex_pcie_enable_host_int(adapter);
2008
2009 return 0;
2010}
2011
2012/*
2013 * This function downloads data from driver to card.
2014 *
2015 * Both commands and data packets are transferred to the card by this
2016 * function.
2017 *
2018 * This function adds the PCIE specific header to the front of the buffer
2019 * before transferring. The header contains the length of the packet and
2020 * the type. The firmware handles the packets based upon this set type.
2021 */
2022static int mwifiex_pcie_host_to_card(struct mwifiex_adapter *adapter, u8 type,
2023 struct sk_buff *skb,
2024 struct mwifiex_tx_param *tx_param)
2025{
fa161cb7
DC
2026 if (!skb) {
2027 dev_err(adapter->dev, "Passed NULL skb to %s\n", __func__);
d930faee
AK
2028 return -1;
2029 }
2030
2031 if (type == MWIFIEX_TYPE_DATA)
e7f767a7 2032 return mwifiex_pcie_send_data(adapter, skb, tx_param);
d930faee
AK
2033 else if (type == MWIFIEX_TYPE_CMD)
2034 return mwifiex_pcie_send_cmd(adapter, skb);
2035
2036 return 0;
2037}
2038
2039/*
2040 * This function initializes the PCI-E host memory space, WCB rings, etc.
2041 *
2042 * The following initializations steps are followed -
2043 * - Allocate TXBD ring buffers
2044 * - Allocate RXBD ring buffers
2045 * - Allocate event BD ring buffers
2046 * - Allocate command response ring buffer
2047 * - Allocate sleep cookie buffer
2048 */
2049static int mwifiex_pcie_init(struct mwifiex_adapter *adapter)
2050{
2051 struct pcie_service_card *card = adapter->card;
2052 int ret;
2053 struct pci_dev *pdev = card->dev;
2054
2055 pci_set_drvdata(pdev, card);
2056
2057 ret = pci_enable_device(pdev);
2058 if (ret)
2059 goto err_enable_dev;
2060
2061 pci_set_master(pdev);
2062
2063 dev_dbg(adapter->dev, "try set_consistent_dma_mask(32)\n");
2064 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
2065 if (ret) {
2066 dev_err(adapter->dev, "set_dma_mask(32) failed\n");
2067 goto err_set_dma_mask;
2068 }
2069
2070 ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
2071 if (ret) {
2072 dev_err(adapter->dev, "set_consistent_dma_mask(64) failed\n");
2073 goto err_set_dma_mask;
2074 }
2075
2076 ret = pci_request_region(pdev, 0, DRV_NAME);
2077 if (ret) {
2078 dev_err(adapter->dev, "req_reg(0) error\n");
2079 goto err_req_region0;
2080 }
2081 card->pci_mmap = pci_iomap(pdev, 0, 0);
2082 if (!card->pci_mmap) {
2083 dev_err(adapter->dev, "iomap(0) error\n");
3220712d 2084 ret = -EIO;
d930faee
AK
2085 goto err_iomap0;
2086 }
2087 ret = pci_request_region(pdev, 2, DRV_NAME);
2088 if (ret) {
2089 dev_err(adapter->dev, "req_reg(2) error\n");
2090 goto err_req_region2;
2091 }
2092 card->pci_mmap1 = pci_iomap(pdev, 2, 0);
2093 if (!card->pci_mmap1) {
2094 dev_err(adapter->dev, "iomap(2) error\n");
3220712d 2095 ret = -EIO;
d930faee
AK
2096 goto err_iomap2;
2097 }
2098
f57c1edc
YAP
2099 dev_dbg(adapter->dev,
2100 "PCI memory map Virt0: %p PCI memory map Virt2: %p\n",
2101 card->pci_mmap, card->pci_mmap1);
d930faee
AK
2102
2103 card->cmdrsp_buf = NULL;
2104 ret = mwifiex_pcie_create_txbd_ring(adapter);
2105 if (ret)
2106 goto err_cre_txbd;
2107 ret = mwifiex_pcie_create_rxbd_ring(adapter);
2108 if (ret)
2109 goto err_cre_rxbd;
2110 ret = mwifiex_pcie_create_evtbd_ring(adapter);
2111 if (ret)
2112 goto err_cre_evtbd;
2113 ret = mwifiex_pcie_alloc_cmdrsp_buf(adapter);
2114 if (ret)
2115 goto err_alloc_cmdbuf;
2116 ret = mwifiex_pcie_alloc_sleep_cookie_buf(adapter);
2117 if (ret)
2118 goto err_alloc_cookie;
2119
2120 return ret;
2121
2122err_alloc_cookie:
2123 mwifiex_pcie_delete_cmdrsp_buf(adapter);
2124err_alloc_cmdbuf:
2125 mwifiex_pcie_delete_evtbd_ring(adapter);
2126err_cre_evtbd:
2127 mwifiex_pcie_delete_rxbd_ring(adapter);
2128err_cre_rxbd:
2129 mwifiex_pcie_delete_txbd_ring(adapter);
2130err_cre_txbd:
2131 pci_iounmap(pdev, card->pci_mmap1);
2132err_iomap2:
2133 pci_release_region(pdev, 2);
2134err_req_region2:
2135 pci_iounmap(pdev, card->pci_mmap);
2136err_iomap0:
2137 pci_release_region(pdev, 0);
2138err_req_region0:
2139err_set_dma_mask:
2140 pci_disable_device(pdev);
2141err_enable_dev:
2142 pci_set_drvdata(pdev, NULL);
2143 return ret;
2144}
2145
2146/*
2147 * This function cleans up the allocated card buffers.
2148 *
2149 * The following are freed by this function -
2150 * - TXBD ring buffers
2151 * - RXBD ring buffers
2152 * - Event BD ring buffers
2153 * - Command response ring buffer
2154 * - Sleep cookie buffer
2155 */
2156static void mwifiex_pcie_cleanup(struct mwifiex_adapter *adapter)
2157{
2158 struct pcie_service_card *card = adapter->card;
2159 struct pci_dev *pdev = card->dev;
dd04e6ac 2160 const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
d930faee 2161
d930faee 2162 if (user_rmmod) {
fc331460 2163 dev_dbg(adapter->dev, "Clearing driver ready signature\n");
dd04e6ac 2164 if (mwifiex_write_reg(adapter, reg->drv_rdy, 0x00000000))
f57c1edc
YAP
2165 dev_err(adapter->dev,
2166 "Failed to write driver not-ready signature\n");
d930faee
AK
2167 }
2168
2169 if (pdev) {
2170 pci_iounmap(pdev, card->pci_mmap);
2171 pci_iounmap(pdev, card->pci_mmap1);
2172
2173 pci_release_regions(pdev);
2174 pci_disable_device(pdev);
2175 pci_set_drvdata(pdev, NULL);
2176 }
2177}
2178
2179/*
2180 * This function registers the PCIE device.
2181 *
2182 * PCIE IRQ is claimed, block size is set and driver data is initialized.
2183 */
2184static int mwifiex_register_dev(struct mwifiex_adapter *adapter)
2185{
2186 int ret;
2187 struct pcie_service_card *card = adapter->card;
2188 struct pci_dev *pdev = card->dev;
2189
2190 /* save adapter pointer in card */
2191 card->adapter = adapter;
2192
2193 ret = request_irq(pdev->irq, mwifiex_pcie_interrupt, IRQF_SHARED,
2194 "MRVL_PCIE", pdev);
2195 if (ret) {
2196 pr_err("request_irq failed: ret=%d\n", ret);
2197 adapter->card = NULL;
2198 return -1;
2199 }
2200
2201 adapter->dev = &pdev->dev;
dd04e6ac 2202 strcpy(adapter->fw_name, card->pcie.firmware);
d930faee
AK
2203
2204 return 0;
2205}
2206
2207/*
2208 * This function unregisters the PCIE device.
2209 *
2210 * The PCIE IRQ is released, the function is disabled and driver
2211 * data is set to null.
2212 */
2213static void mwifiex_unregister_dev(struct mwifiex_adapter *adapter)
2214{
2215 struct pcie_service_card *card = adapter->card;
2216
2217 if (card) {
2218 dev_dbg(adapter->dev, "%s(): calling free_irq()\n", __func__);
2219 free_irq(card->dev->irq, card->dev);
fc331460
AP
2220
2221 mwifiex_pcie_delete_sleep_cookie_buf(adapter);
2222 mwifiex_pcie_delete_cmdrsp_buf(adapter);
2223 mwifiex_pcie_delete_evtbd_ring(adapter);
2224 mwifiex_pcie_delete_rxbd_ring(adapter);
2225 mwifiex_pcie_delete_txbd_ring(adapter);
2226 card->cmdrsp_buf = NULL;
d930faee
AK
2227 }
2228}
2229
2230static struct mwifiex_if_ops pcie_ops = {
2231 .init_if = mwifiex_pcie_init,
2232 .cleanup_if = mwifiex_pcie_cleanup,
2233 .check_fw_status = mwifiex_check_fw_status,
2234 .prog_fw = mwifiex_prog_fw_w_helper,
2235 .register_dev = mwifiex_register_dev,
2236 .unregister_dev = mwifiex_unregister_dev,
2237 .enable_int = mwifiex_pcie_enable_host_int,
2238 .process_int_status = mwifiex_process_int_status,
2239 .host_to_card = mwifiex_pcie_host_to_card,
2240 .wakeup = mwifiex_pm_wakeup_card,
2241 .wakeup_complete = mwifiex_pm_wakeup_card_complete,
2242
2243 /* PCIE specific */
2244 .cmdrsp_complete = mwifiex_pcie_cmdrsp_complete,
2245 .event_complete = mwifiex_pcie_event_complete,
2246 .update_mp_end_port = NULL,
2247 .cleanup_mpa_buf = NULL,
c6d1d87a 2248 .init_fw_port = mwifiex_pcie_init_fw_port,
fbd7e7ac 2249 .clean_pcie_ring = mwifiex_clean_pcie_ring_buf,
d930faee
AK
2250};
2251
2252/*
2253 * This function initializes the PCIE driver module.
2254 *
2255 * This initiates the semaphore and registers the device with
2256 * PCIE bus.
2257 */
2258static int mwifiex_pcie_init_module(void)
2259{
2260 int ret;
2261
2262 pr_debug("Marvell 8766 PCIe Driver\n");
2263
2264 sema_init(&add_remove_card_sem, 1);
2265
2266 /* Clear the flag in case user removes the card. */
2267 user_rmmod = 0;
2268
2269 ret = pci_register_driver(&mwifiex_pcie);
2270 if (ret)
2271 pr_err("Driver register failed!\n");
2272 else
2273 pr_debug("info: Driver registered successfully!\n");
2274
2275 return ret;
2276}
2277
2278/*
2279 * This function cleans up the PCIE driver.
2280 *
2281 * The following major steps are followed for cleanup -
2282 * - Resume the device if its suspended
2283 * - Disconnect the device if connected
2284 * - Shutdown the firmware
2285 * - Unregister the device from PCIE bus.
2286 */
2287static void mwifiex_pcie_cleanup_module(void)
2288{
2289 if (!down_interruptible(&add_remove_card_sem))
2290 up(&add_remove_card_sem);
2291
2292 /* Set the flag as user is removing this module. */
2293 user_rmmod = 1;
2294
2295 pci_unregister_driver(&mwifiex_pcie);
2296}
2297
2298module_init(mwifiex_pcie_init_module);
2299module_exit(mwifiex_pcie_cleanup_module);
2300
2301MODULE_AUTHOR("Marvell International Ltd.");
2302MODULE_DESCRIPTION("Marvell WiFi-Ex PCI-Express Driver version " PCIE_VERSION);
2303MODULE_VERSION(PCIE_VERSION);
2304MODULE_LICENSE("GPL v2");
2305MODULE_FIRMWARE("mrvl/pcie8766_uapsta.bin");
This page took 0.242511 seconds and 5 git commands to generate.