Commit | Line | Data |
---|---|---|
a66098da | 1 | /* |
ce9e2e1b LB |
2 | * drivers/net/wireless/mwl8k.c |
3 | * Driver for Marvell TOPDOG 802.11 Wireless cards | |
a66098da | 4 | * |
a5fb297d | 5 | * Copyright (C) 2008, 2009, 2010 Marvell Semiconductor Inc. |
a66098da LB |
6 | * |
7 | * This file is licensed under the terms of the GNU General Public | |
8 | * License version 2. This program is licensed "as is" without any | |
9 | * warranty of any kind, whether express or implied. | |
10 | */ | |
11 | ||
12 | #include <linux/init.h> | |
a6b7a407 | 13 | #include <linux/interrupt.h> |
a66098da LB |
14 | #include <linux/module.h> |
15 | #include <linux/kernel.h> | |
3d76e82c | 16 | #include <linux/sched.h> |
a66098da LB |
17 | #include <linux/spinlock.h> |
18 | #include <linux/list.h> | |
19 | #include <linux/pci.h> | |
20 | #include <linux/delay.h> | |
21 | #include <linux/completion.h> | |
22 | #include <linux/etherdevice.h> | |
5a0e3ad6 | 23 | #include <linux/slab.h> |
a66098da LB |
24 | #include <net/mac80211.h> |
25 | #include <linux/moduleparam.h> | |
26 | #include <linux/firmware.h> | |
27 | #include <linux/workqueue.h> | |
28 | ||
29 | #define MWL8K_DESC "Marvell TOPDOG(R) 802.11 Wireless Network Driver" | |
30 | #define MWL8K_NAME KBUILD_MODNAME | |
00e8e692 | 31 | #define MWL8K_VERSION "0.13" |
a66098da | 32 | |
0863ade8 | 33 | /* Module parameters */ |
eb939922 | 34 | static bool ap_mode_default; |
0863ade8 BC |
35 | module_param(ap_mode_default, bool, 0); |
36 | MODULE_PARM_DESC(ap_mode_default, | |
37 | "Set to 1 to make ap mode the default instead of sta mode"); | |
38 | ||
a66098da LB |
39 | /* Register definitions */ |
40 | #define MWL8K_HIU_GEN_PTR 0x00000c10 | |
ce9e2e1b LB |
41 | #define MWL8K_MODE_STA 0x0000005a |
42 | #define MWL8K_MODE_AP 0x000000a5 | |
a66098da | 43 | #define MWL8K_HIU_INT_CODE 0x00000c14 |
ce9e2e1b LB |
44 | #define MWL8K_FWSTA_READY 0xf0f1f2f4 |
45 | #define MWL8K_FWAP_READY 0xf1f2f4a5 | |
46 | #define MWL8K_INT_CODE_CMD_FINISHED 0x00000005 | |
a66098da LB |
47 | #define MWL8K_HIU_SCRATCH 0x00000c40 |
48 | ||
49 | /* Host->device communications */ | |
50 | #define MWL8K_HIU_H2A_INTERRUPT_EVENTS 0x00000c18 | |
51 | #define MWL8K_HIU_H2A_INTERRUPT_STATUS 0x00000c1c | |
52 | #define MWL8K_HIU_H2A_INTERRUPT_MASK 0x00000c20 | |
53 | #define MWL8K_HIU_H2A_INTERRUPT_CLEAR_SEL 0x00000c24 | |
54 | #define MWL8K_HIU_H2A_INTERRUPT_STATUS_MASK 0x00000c28 | |
ce9e2e1b LB |
55 | #define MWL8K_H2A_INT_DUMMY (1 << 20) |
56 | #define MWL8K_H2A_INT_RESET (1 << 15) | |
57 | #define MWL8K_H2A_INT_DOORBELL (1 << 1) | |
58 | #define MWL8K_H2A_INT_PPA_READY (1 << 0) | |
a66098da LB |
59 | |
60 | /* Device->host communications */ | |
61 | #define MWL8K_HIU_A2H_INTERRUPT_EVENTS 0x00000c2c | |
62 | #define MWL8K_HIU_A2H_INTERRUPT_STATUS 0x00000c30 | |
63 | #define MWL8K_HIU_A2H_INTERRUPT_MASK 0x00000c34 | |
64 | #define MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL 0x00000c38 | |
65 | #define MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK 0x00000c3c | |
ce9e2e1b | 66 | #define MWL8K_A2H_INT_DUMMY (1 << 20) |
3aefc37e | 67 | #define MWL8K_A2H_INT_BA_WATCHDOG (1 << 14) |
ce9e2e1b LB |
68 | #define MWL8K_A2H_INT_CHNL_SWITCHED (1 << 11) |
69 | #define MWL8K_A2H_INT_QUEUE_EMPTY (1 << 10) | |
70 | #define MWL8K_A2H_INT_RADAR_DETECT (1 << 7) | |
71 | #define MWL8K_A2H_INT_RADIO_ON (1 << 6) | |
72 | #define MWL8K_A2H_INT_RADIO_OFF (1 << 5) | |
73 | #define MWL8K_A2H_INT_MAC_EVENT (1 << 3) | |
74 | #define MWL8K_A2H_INT_OPC_DONE (1 << 2) | |
75 | #define MWL8K_A2H_INT_RX_READY (1 << 1) | |
76 | #define MWL8K_A2H_INT_TX_DONE (1 << 0) | |
a66098da | 77 | |
566875db PN |
78 | /* HW micro second timer register |
79 | * located at offset 0xA600. This | |
80 | * will be used to timestamp tx | |
81 | * packets. | |
82 | */ | |
83 | ||
84 | #define MWL8K_HW_TIMER_REGISTER 0x0000a600 | |
85 | ||
a66098da LB |
86 | #define MWL8K_A2H_EVENTS (MWL8K_A2H_INT_DUMMY | \ |
87 | MWL8K_A2H_INT_CHNL_SWITCHED | \ | |
88 | MWL8K_A2H_INT_QUEUE_EMPTY | \ | |
89 | MWL8K_A2H_INT_RADAR_DETECT | \ | |
90 | MWL8K_A2H_INT_RADIO_ON | \ | |
91 | MWL8K_A2H_INT_RADIO_OFF | \ | |
92 | MWL8K_A2H_INT_MAC_EVENT | \ | |
93 | MWL8K_A2H_INT_OPC_DONE | \ | |
94 | MWL8K_A2H_INT_RX_READY | \ | |
3aefc37e NS |
95 | MWL8K_A2H_INT_TX_DONE | \ |
96 | MWL8K_A2H_INT_BA_WATCHDOG) | |
a66098da | 97 | |
a66098da | 98 | #define MWL8K_RX_QUEUES 1 |
e600707b | 99 | #define MWL8K_TX_WMM_QUEUES 4 |
8a7a578c | 100 | #define MWL8K_MAX_AMPDU_QUEUES 8 |
e600707b BC |
101 | #define MWL8K_MAX_TX_QUEUES (MWL8K_TX_WMM_QUEUES + MWL8K_MAX_AMPDU_QUEUES) |
102 | #define mwl8k_tx_queues(priv) (MWL8K_TX_WMM_QUEUES + (priv)->num_ampdu_queues) | |
a66098da | 103 | |
7fb978b7 YAP |
104 | /* txpriorities are mapped with hw queues. |
105 | * Each hw queue has a txpriority. | |
106 | */ | |
107 | #define TOTAL_HW_TX_QUEUES 8 | |
108 | ||
109 | /* Each HW queue can have one AMPDU stream. | |
110 | * But, because one of the hw queue is reserved, | |
111 | * maximum AMPDU queues that can be created are | |
112 | * one short of total tx queues. | |
113 | */ | |
114 | #define MWL8K_NUM_AMPDU_STREAMS (TOTAL_HW_TX_QUEUES - 1) | |
115 | ||
54bc3a0d LB |
116 | struct rxd_ops { |
117 | int rxd_size; | |
118 | void (*rxd_init)(void *rxd, dma_addr_t next_dma_addr); | |
119 | void (*rxd_refill)(void *rxd, dma_addr_t addr, int len); | |
20f09c3d | 120 | int (*rxd_process)(void *rxd, struct ieee80211_rx_status *status, |
0d462bbb | 121 | __le16 *qos, s8 *noise); |
54bc3a0d LB |
122 | }; |
123 | ||
45a390dd | 124 | struct mwl8k_device_info { |
a74b295e LB |
125 | char *part_name; |
126 | char *helper_image; | |
0863ade8 BC |
127 | char *fw_image_sta; |
128 | char *fw_image_ap; | |
89a91f4f | 129 | struct rxd_ops *ap_rxd_ops; |
952a0e96 | 130 | u32 fw_api_ap; |
45a390dd LB |
131 | }; |
132 | ||
a66098da | 133 | struct mwl8k_rx_queue { |
45eb400d | 134 | int rxd_count; |
a66098da LB |
135 | |
136 | /* hw receives here */ | |
45eb400d | 137 | int head; |
a66098da LB |
138 | |
139 | /* refill descs here */ | |
45eb400d | 140 | int tail; |
a66098da | 141 | |
54bc3a0d | 142 | void *rxd; |
45eb400d | 143 | dma_addr_t rxd_dma; |
788838eb LB |
144 | struct { |
145 | struct sk_buff *skb; | |
53b1b3e1 | 146 | DEFINE_DMA_UNMAP_ADDR(dma); |
788838eb | 147 | } *buf; |
a66098da LB |
148 | }; |
149 | ||
a66098da LB |
150 | struct mwl8k_tx_queue { |
151 | /* hw transmits here */ | |
45eb400d | 152 | int head; |
a66098da LB |
153 | |
154 | /* sw appends here */ | |
45eb400d | 155 | int tail; |
a66098da | 156 | |
8ccbc3b8 | 157 | unsigned int len; |
45eb400d LB |
158 | struct mwl8k_tx_desc *txd; |
159 | dma_addr_t txd_dma; | |
160 | struct sk_buff **skb; | |
a66098da LB |
161 | }; |
162 | ||
ac109fd0 BC |
163 | enum { |
164 | AMPDU_NO_STREAM, | |
165 | AMPDU_STREAM_NEW, | |
166 | AMPDU_STREAM_IN_PROGRESS, | |
167 | AMPDU_STREAM_ACTIVE, | |
168 | }; | |
169 | ||
5faa1aff NS |
170 | struct mwl8k_ampdu_stream { |
171 | struct ieee80211_sta *sta; | |
172 | u8 tid; | |
173 | u8 state; | |
174 | u8 idx; | |
5faa1aff NS |
175 | }; |
176 | ||
a66098da | 177 | struct mwl8k_priv { |
a66098da | 178 | struct ieee80211_hw *hw; |
a66098da | 179 | struct pci_dev *pdev; |
bf3ca7f7 | 180 | int irq; |
a66098da | 181 | |
45a390dd LB |
182 | struct mwl8k_device_info *device_info; |
183 | ||
be695fc4 LB |
184 | void __iomem *sram; |
185 | void __iomem *regs; | |
186 | ||
187 | /* firmware */ | |
d1f9e41d BC |
188 | const struct firmware *fw_helper; |
189 | const struct firmware *fw_ucode; | |
a66098da | 190 | |
be695fc4 LB |
191 | /* hardware/firmware parameters */ |
192 | bool ap_fw; | |
193 | struct rxd_ops *rxd_ops; | |
777ad375 LB |
194 | struct ieee80211_supported_band band_24; |
195 | struct ieee80211_channel channels_24[14]; | |
3f524559 | 196 | struct ieee80211_rate rates_24[13]; |
4eae9edd LB |
197 | struct ieee80211_supported_band band_50; |
198 | struct ieee80211_channel channels_50[4]; | |
3f524559 | 199 | struct ieee80211_rate rates_50[8]; |
ee0ddf18 LB |
200 | u32 ap_macids_supported; |
201 | u32 sta_macids_supported; | |
be695fc4 | 202 | |
8a7a578c BC |
203 | /* Ampdu stream information */ |
204 | u8 num_ampdu_queues; | |
ac109fd0 BC |
205 | spinlock_t stream_lock; |
206 | struct mwl8k_ampdu_stream ampdu[MWL8K_MAX_AMPDU_QUEUES]; | |
3aefc37e | 207 | struct work_struct watchdog_ba_handle; |
8a7a578c | 208 | |
618952a7 LB |
209 | /* firmware access */ |
210 | struct mutex fw_mutex; | |
211 | struct task_struct *fw_mutex_owner; | |
6b6accc3 | 212 | struct task_struct *hw_restart_owner; |
618952a7 | 213 | int fw_mutex_depth; |
618952a7 LB |
214 | struct completion *hostcmd_wait; |
215 | ||
c27a54d3 YAP |
216 | atomic_t watchdog_event_pending; |
217 | ||
a66098da LB |
218 | /* lock held over TX and TX reap */ |
219 | spinlock_t tx_lock; | |
a66098da | 220 | |
88de754a LB |
221 | /* TX quiesce completion, protected by fw_mutex and tx_lock */ |
222 | struct completion *tx_wait; | |
223 | ||
f5bb87cf | 224 | /* List of interfaces. */ |
ee0ddf18 | 225 | u32 macids_used; |
f5bb87cf | 226 | struct list_head vif_list; |
a66098da | 227 | |
a66098da LB |
228 | /* power management status cookie from firmware */ |
229 | u32 *cookie; | |
230 | dma_addr_t cookie_dma; | |
231 | ||
232 | u16 num_mcaddrs; | |
a66098da | 233 | u8 hw_rev; |
2aa7b01f | 234 | u32 fw_rev; |
c3f251a3 | 235 | u32 caps; |
a66098da LB |
236 | |
237 | /* | |
238 | * Running count of TX packets in flight, to avoid | |
239 | * iterating over the transmit rings each time. | |
240 | */ | |
241 | int pending_tx_pkts; | |
242 | ||
243 | struct mwl8k_rx_queue rxq[MWL8K_RX_QUEUES]; | |
e600707b BC |
244 | struct mwl8k_tx_queue txq[MWL8K_MAX_TX_QUEUES]; |
245 | u32 txq_offset[MWL8K_MAX_TX_QUEUES]; | |
a66098da | 246 | |
c46563b7 | 247 | bool radio_on; |
68ce3884 | 248 | bool radio_short_preamble; |
a43c49a8 | 249 | bool sniffer_enabled; |
0439b1f5 | 250 | bool wmm_enabled; |
a66098da | 251 | |
a66098da LB |
252 | /* XXX need to convert this to handle multiple interfaces */ |
253 | bool capture_beacon; | |
d89173f2 | 254 | u8 capture_bssid[ETH_ALEN]; |
a66098da LB |
255 | struct sk_buff *beacon_skb; |
256 | ||
257 | /* | |
258 | * This FJ worker has to be global as it is scheduled from the | |
259 | * RX handler. At this point we don't know which interface it | |
260 | * belongs to until the list of bssids waiting to complete join | |
261 | * is checked. | |
262 | */ | |
263 | struct work_struct finalize_join_worker; | |
264 | ||
1e9f9de3 LB |
265 | /* Tasklet to perform TX reclaim. */ |
266 | struct tasklet_struct poll_tx_task; | |
67e2eb27 LB |
267 | |
268 | /* Tasklet to perform RX. */ | |
269 | struct tasklet_struct poll_rx_task; | |
0d462bbb JL |
270 | |
271 | /* Most recently reported noise in dBm */ | |
272 | s8 noise; | |
0863ade8 BC |
273 | |
274 | /* | |
275 | * preserve the queue configurations so they can be restored if/when | |
276 | * the firmware image is swapped. | |
277 | */ | |
e600707b | 278 | struct ieee80211_tx_queue_params wmm_params[MWL8K_TX_WMM_QUEUES]; |
99020471 | 279 | |
6b6accc3 YAP |
280 | /* To perform the task of reloading the firmware */ |
281 | struct work_struct fw_reload; | |
282 | bool hw_restart_in_progress; | |
283 | ||
99020471 BC |
284 | /* async firmware loading state */ |
285 | unsigned fw_state; | |
286 | char *fw_pref; | |
287 | char *fw_alt; | |
98929824 | 288 | bool is_8764; |
99020471 | 289 | struct completion firmware_loading_complete; |
e882efc9 YAP |
290 | |
291 | /* bitmap of running BSSes */ | |
292 | u32 running_bsses; | |
a66098da LB |
293 | }; |
294 | ||
e53d9b96 NS |
295 | #define MAX_WEP_KEY_LEN 13 |
296 | #define NUM_WEP_KEYS 4 | |
297 | ||
a66098da LB |
298 | /* Per interface specific private data */ |
299 | struct mwl8k_vif { | |
f5bb87cf LB |
300 | struct list_head list; |
301 | struct ieee80211_vif *vif; | |
302 | ||
f57ca9c1 LB |
303 | /* Firmware macid for this vif. */ |
304 | int macid; | |
305 | ||
c2c2b12a | 306 | /* Non AMPDU sequence number assigned by driver. */ |
a680400e | 307 | u16 seqno; |
e53d9b96 NS |
308 | |
309 | /* Saved WEP keys */ | |
310 | struct { | |
311 | u8 enabled; | |
312 | u8 key[sizeof(struct ieee80211_key_conf) + MAX_WEP_KEY_LEN]; | |
313 | } wep_key_conf[NUM_WEP_KEYS]; | |
d9a07d49 NS |
314 | |
315 | /* BSSID */ | |
316 | u8 bssid[ETH_ALEN]; | |
317 | ||
318 | /* A flag to indicate is HW crypto is enabled for this bssid */ | |
319 | bool is_hw_crypto_enabled; | |
a66098da | 320 | }; |
a94cc97e | 321 | #define MWL8K_VIF(_vif) ((struct mwl8k_vif *)&((_vif)->drv_priv)) |
fcdc403c | 322 | #define IEEE80211_KEY_CONF(_u8) ((struct ieee80211_key_conf *)(_u8)) |
a66098da | 323 | |
d0805c1c BC |
324 | struct tx_traffic_info { |
325 | u32 start_time; | |
326 | u32 pkts; | |
327 | }; | |
328 | ||
329 | #define MWL8K_MAX_TID 8 | |
a680400e LB |
330 | struct mwl8k_sta { |
331 | /* Index into station database. Returned by UPDATE_STADB. */ | |
332 | u8 peer_id; | |
17033543 | 333 | u8 is_ampdu_allowed; |
d0805c1c | 334 | struct tx_traffic_info tx_stats[MWL8K_MAX_TID]; |
a680400e LB |
335 | }; |
336 | #define MWL8K_STA(_sta) ((struct mwl8k_sta *)&((_sta)->drv_priv)) | |
337 | ||
777ad375 | 338 | static const struct ieee80211_channel mwl8k_channels_24[] = { |
d786f67e JG |
339 | { .band = IEEE80211_BAND_2GHZ, .center_freq = 2412, .hw_value = 1, }, |
340 | { .band = IEEE80211_BAND_2GHZ, .center_freq = 2417, .hw_value = 2, }, | |
341 | { .band = IEEE80211_BAND_2GHZ, .center_freq = 2422, .hw_value = 3, }, | |
342 | { .band = IEEE80211_BAND_2GHZ, .center_freq = 2427, .hw_value = 4, }, | |
343 | { .band = IEEE80211_BAND_2GHZ, .center_freq = 2432, .hw_value = 5, }, | |
344 | { .band = IEEE80211_BAND_2GHZ, .center_freq = 2437, .hw_value = 6, }, | |
345 | { .band = IEEE80211_BAND_2GHZ, .center_freq = 2442, .hw_value = 7, }, | |
346 | { .band = IEEE80211_BAND_2GHZ, .center_freq = 2447, .hw_value = 8, }, | |
347 | { .band = IEEE80211_BAND_2GHZ, .center_freq = 2452, .hw_value = 9, }, | |
348 | { .band = IEEE80211_BAND_2GHZ, .center_freq = 2457, .hw_value = 10, }, | |
349 | { .band = IEEE80211_BAND_2GHZ, .center_freq = 2462, .hw_value = 11, }, | |
350 | { .band = IEEE80211_BAND_2GHZ, .center_freq = 2467, .hw_value = 12, }, | |
351 | { .band = IEEE80211_BAND_2GHZ, .center_freq = 2472, .hw_value = 13, }, | |
352 | { .band = IEEE80211_BAND_2GHZ, .center_freq = 2484, .hw_value = 14, }, | |
a66098da LB |
353 | }; |
354 | ||
777ad375 | 355 | static const struct ieee80211_rate mwl8k_rates_24[] = { |
a66098da LB |
356 | { .bitrate = 10, .hw_value = 2, }, |
357 | { .bitrate = 20, .hw_value = 4, }, | |
358 | { .bitrate = 55, .hw_value = 11, }, | |
5dfd3e2c LB |
359 | { .bitrate = 110, .hw_value = 22, }, |
360 | { .bitrate = 220, .hw_value = 44, }, | |
a66098da LB |
361 | { .bitrate = 60, .hw_value = 12, }, |
362 | { .bitrate = 90, .hw_value = 18, }, | |
a66098da LB |
363 | { .bitrate = 120, .hw_value = 24, }, |
364 | { .bitrate = 180, .hw_value = 36, }, | |
365 | { .bitrate = 240, .hw_value = 48, }, | |
366 | { .bitrate = 360, .hw_value = 72, }, | |
367 | { .bitrate = 480, .hw_value = 96, }, | |
368 | { .bitrate = 540, .hw_value = 108, }, | |
140eb5e2 LB |
369 | }; |
370 | ||
4eae9edd | 371 | static const struct ieee80211_channel mwl8k_channels_50[] = { |
d786f67e JG |
372 | { .band = IEEE80211_BAND_5GHZ, .center_freq = 5180, .hw_value = 36, }, |
373 | { .band = IEEE80211_BAND_5GHZ, .center_freq = 5200, .hw_value = 40, }, | |
374 | { .band = IEEE80211_BAND_5GHZ, .center_freq = 5220, .hw_value = 44, }, | |
375 | { .band = IEEE80211_BAND_5GHZ, .center_freq = 5240, .hw_value = 48, }, | |
4eae9edd LB |
376 | }; |
377 | ||
378 | static const struct ieee80211_rate mwl8k_rates_50[] = { | |
379 | { .bitrate = 60, .hw_value = 12, }, | |
380 | { .bitrate = 90, .hw_value = 18, }, | |
381 | { .bitrate = 120, .hw_value = 24, }, | |
382 | { .bitrate = 180, .hw_value = 36, }, | |
383 | { .bitrate = 240, .hw_value = 48, }, | |
384 | { .bitrate = 360, .hw_value = 72, }, | |
385 | { .bitrate = 480, .hw_value = 96, }, | |
386 | { .bitrate = 540, .hw_value = 108, }, | |
4eae9edd LB |
387 | }; |
388 | ||
a66098da | 389 | /* Set or get info from Firmware */ |
a66098da | 390 | #define MWL8K_CMD_GET 0x0000 |
41fdf097 NS |
391 | #define MWL8K_CMD_SET 0x0001 |
392 | #define MWL8K_CMD_SET_LIST 0x0002 | |
a66098da LB |
393 | |
394 | /* Firmware command codes */ | |
395 | #define MWL8K_CMD_CODE_DNLD 0x0001 | |
396 | #define MWL8K_CMD_GET_HW_SPEC 0x0003 | |
42fba21d | 397 | #define MWL8K_CMD_SET_HW_SPEC 0x0004 |
a66098da LB |
398 | #define MWL8K_CMD_MAC_MULTICAST_ADR 0x0010 |
399 | #define MWL8K_CMD_GET_STAT 0x0014 | |
ff45fc60 LB |
400 | #define MWL8K_CMD_RADIO_CONTROL 0x001c |
401 | #define MWL8K_CMD_RF_TX_POWER 0x001e | |
41fdf097 | 402 | #define MWL8K_CMD_TX_POWER 0x001f |
08b06347 | 403 | #define MWL8K_CMD_RF_ANTENNA 0x0020 |
aa21d0f6 | 404 | #define MWL8K_CMD_SET_BEACON 0x0100 /* per-vif */ |
a66098da LB |
405 | #define MWL8K_CMD_SET_PRE_SCAN 0x0107 |
406 | #define MWL8K_CMD_SET_POST_SCAN 0x0108 | |
ff45fc60 LB |
407 | #define MWL8K_CMD_SET_RF_CHANNEL 0x010a |
408 | #define MWL8K_CMD_SET_AID 0x010d | |
409 | #define MWL8K_CMD_SET_RATE 0x0110 | |
410 | #define MWL8K_CMD_SET_FINALIZE_JOIN 0x0111 | |
411 | #define MWL8K_CMD_RTS_THRESHOLD 0x0113 | |
a66098da | 412 | #define MWL8K_CMD_SET_SLOT 0x0114 |
ff45fc60 LB |
413 | #define MWL8K_CMD_SET_EDCA_PARAMS 0x0115 |
414 | #define MWL8K_CMD_SET_WMM_MODE 0x0123 | |
a66098da | 415 | #define MWL8K_CMD_MIMO_CONFIG 0x0125 |
ff45fc60 | 416 | #define MWL8K_CMD_USE_FIXED_RATE 0x0126 |
a66098da | 417 | #define MWL8K_CMD_ENABLE_SNIFFER 0x0150 |
aa21d0f6 | 418 | #define MWL8K_CMD_SET_MAC_ADDR 0x0202 /* per-vif */ |
a66098da | 419 | #define MWL8K_CMD_SET_RATEADAPT_MODE 0x0203 |
3aefc37e | 420 | #define MWL8K_CMD_GET_WATCHDOG_BITMAP 0x0205 |
197a4e4e | 421 | #define MWL8K_CMD_DEL_MAC_ADDR 0x0206 /* per-vif */ |
aa21d0f6 LB |
422 | #define MWL8K_CMD_BSS_START 0x1100 /* per-vif */ |
423 | #define MWL8K_CMD_SET_NEW_STN 0x1111 /* per-vif */ | |
fcdc403c | 424 | #define MWL8K_CMD_UPDATE_ENCRYPTION 0x1122 /* per-vif */ |
ff45fc60 | 425 | #define MWL8K_CMD_UPDATE_STADB 0x1123 |
5faa1aff | 426 | #define MWL8K_CMD_BASTREAM 0x1125 |
a66098da | 427 | |
b603742f | 428 | static const char *mwl8k_cmd_name(__le16 cmd, char *buf, int bufsize) |
a66098da | 429 | { |
b603742f JL |
430 | u16 command = le16_to_cpu(cmd); |
431 | ||
a66098da LB |
432 | #define MWL8K_CMDNAME(x) case MWL8K_CMD_##x: do {\ |
433 | snprintf(buf, bufsize, "%s", #x);\ | |
434 | return buf;\ | |
435 | } while (0) | |
b603742f | 436 | switch (command & ~0x8000) { |
a66098da LB |
437 | MWL8K_CMDNAME(CODE_DNLD); |
438 | MWL8K_CMDNAME(GET_HW_SPEC); | |
42fba21d | 439 | MWL8K_CMDNAME(SET_HW_SPEC); |
a66098da LB |
440 | MWL8K_CMDNAME(MAC_MULTICAST_ADR); |
441 | MWL8K_CMDNAME(GET_STAT); | |
442 | MWL8K_CMDNAME(RADIO_CONTROL); | |
443 | MWL8K_CMDNAME(RF_TX_POWER); | |
41fdf097 | 444 | MWL8K_CMDNAME(TX_POWER); |
08b06347 | 445 | MWL8K_CMDNAME(RF_ANTENNA); |
b64fe619 | 446 | MWL8K_CMDNAME(SET_BEACON); |
a66098da LB |
447 | MWL8K_CMDNAME(SET_PRE_SCAN); |
448 | MWL8K_CMDNAME(SET_POST_SCAN); | |
449 | MWL8K_CMDNAME(SET_RF_CHANNEL); | |
ff45fc60 LB |
450 | MWL8K_CMDNAME(SET_AID); |
451 | MWL8K_CMDNAME(SET_RATE); | |
452 | MWL8K_CMDNAME(SET_FINALIZE_JOIN); | |
453 | MWL8K_CMDNAME(RTS_THRESHOLD); | |
a66098da | 454 | MWL8K_CMDNAME(SET_SLOT); |
ff45fc60 LB |
455 | MWL8K_CMDNAME(SET_EDCA_PARAMS); |
456 | MWL8K_CMDNAME(SET_WMM_MODE); | |
a66098da | 457 | MWL8K_CMDNAME(MIMO_CONFIG); |
ff45fc60 | 458 | MWL8K_CMDNAME(USE_FIXED_RATE); |
a66098da | 459 | MWL8K_CMDNAME(ENABLE_SNIFFER); |
32060e1b | 460 | MWL8K_CMDNAME(SET_MAC_ADDR); |
a66098da | 461 | MWL8K_CMDNAME(SET_RATEADAPT_MODE); |
b64fe619 | 462 | MWL8K_CMDNAME(BSS_START); |
3f5610ff | 463 | MWL8K_CMDNAME(SET_NEW_STN); |
fcdc403c | 464 | MWL8K_CMDNAME(UPDATE_ENCRYPTION); |
ff45fc60 | 465 | MWL8K_CMDNAME(UPDATE_STADB); |
5faa1aff | 466 | MWL8K_CMDNAME(BASTREAM); |
3aefc37e | 467 | MWL8K_CMDNAME(GET_WATCHDOG_BITMAP); |
a66098da LB |
468 | default: |
469 | snprintf(buf, bufsize, "0x%x", cmd); | |
470 | } | |
471 | #undef MWL8K_CMDNAME | |
472 | ||
473 | return buf; | |
474 | } | |
475 | ||
476 | /* Hardware and firmware reset */ | |
477 | static void mwl8k_hw_reset(struct mwl8k_priv *priv) | |
478 | { | |
479 | iowrite32(MWL8K_H2A_INT_RESET, | |
480 | priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS); | |
481 | iowrite32(MWL8K_H2A_INT_RESET, | |
482 | priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS); | |
483 | msleep(20); | |
484 | } | |
485 | ||
486 | /* Release fw image */ | |
d1f9e41d | 487 | static void mwl8k_release_fw(const struct firmware **fw) |
a66098da LB |
488 | { |
489 | if (*fw == NULL) | |
490 | return; | |
491 | release_firmware(*fw); | |
492 | *fw = NULL; | |
493 | } | |
494 | ||
495 | static void mwl8k_release_firmware(struct mwl8k_priv *priv) | |
496 | { | |
22be40d9 LB |
497 | mwl8k_release_fw(&priv->fw_ucode); |
498 | mwl8k_release_fw(&priv->fw_helper); | |
a66098da LB |
499 | } |
500 | ||
99020471 BC |
501 | /* states for asynchronous f/w loading */ |
502 | static void mwl8k_fw_state_machine(const struct firmware *fw, void *context); | |
503 | enum { | |
504 | FW_STATE_INIT = 0, | |
505 | FW_STATE_LOADING_PREF, | |
506 | FW_STATE_LOADING_ALT, | |
507 | FW_STATE_ERROR, | |
508 | }; | |
509 | ||
a66098da LB |
510 | /* Request fw image */ |
511 | static int mwl8k_request_fw(struct mwl8k_priv *priv, | |
d1f9e41d | 512 | const char *fname, const struct firmware **fw, |
99020471 | 513 | bool nowait) |
a66098da LB |
514 | { |
515 | /* release current image */ | |
516 | if (*fw != NULL) | |
517 | mwl8k_release_fw(fw); | |
518 | ||
99020471 BC |
519 | if (nowait) |
520 | return request_firmware_nowait(THIS_MODULE, 1, fname, | |
521 | &priv->pdev->dev, GFP_KERNEL, | |
522 | priv, mwl8k_fw_state_machine); | |
523 | else | |
d1f9e41d | 524 | return request_firmware(fw, fname, &priv->pdev->dev); |
a66098da LB |
525 | } |
526 | ||
99020471 BC |
527 | static int mwl8k_request_firmware(struct mwl8k_priv *priv, char *fw_image, |
528 | bool nowait) | |
a66098da | 529 | { |
a74b295e | 530 | struct mwl8k_device_info *di = priv->device_info; |
a66098da LB |
531 | int rc; |
532 | ||
a74b295e | 533 | if (di->helper_image != NULL) { |
99020471 BC |
534 | if (nowait) |
535 | rc = mwl8k_request_fw(priv, di->helper_image, | |
536 | &priv->fw_helper, true); | |
537 | else | |
538 | rc = mwl8k_request_fw(priv, di->helper_image, | |
539 | &priv->fw_helper, false); | |
540 | if (rc) | |
541 | printk(KERN_ERR "%s: Error requesting helper fw %s\n", | |
542 | pci_name(priv->pdev), di->helper_image); | |
543 | ||
544 | if (rc || nowait) | |
a74b295e | 545 | return rc; |
a66098da LB |
546 | } |
547 | ||
99020471 BC |
548 | if (nowait) { |
549 | /* | |
550 | * if we get here, no helper image is needed. Skip the | |
551 | * FW_STATE_INIT state. | |
552 | */ | |
553 | priv->fw_state = FW_STATE_LOADING_PREF; | |
554 | rc = mwl8k_request_fw(priv, fw_image, | |
555 | &priv->fw_ucode, | |
556 | true); | |
557 | } else | |
558 | rc = mwl8k_request_fw(priv, fw_image, | |
559 | &priv->fw_ucode, false); | |
a66098da | 560 | if (rc) { |
c2c357ce | 561 | printk(KERN_ERR "%s: Error requesting firmware file %s\n", |
0863ade8 | 562 | pci_name(priv->pdev), fw_image); |
22be40d9 | 563 | mwl8k_release_fw(&priv->fw_helper); |
a66098da LB |
564 | return rc; |
565 | } | |
566 | ||
567 | return 0; | |
568 | } | |
569 | ||
570 | struct mwl8k_cmd_pkt { | |
571 | __le16 code; | |
572 | __le16 length; | |
f57ca9c1 LB |
573 | __u8 seq_num; |
574 | __u8 macid; | |
a66098da LB |
575 | __le16 result; |
576 | char payload[0]; | |
ba2d3587 | 577 | } __packed; |
a66098da LB |
578 | |
579 | /* | |
580 | * Firmware loading. | |
581 | */ | |
582 | static int | |
583 | mwl8k_send_fw_load_cmd(struct mwl8k_priv *priv, void *data, int length) | |
584 | { | |
585 | void __iomem *regs = priv->regs; | |
586 | dma_addr_t dma_addr; | |
a66098da LB |
587 | int loops; |
588 | ||
589 | dma_addr = pci_map_single(priv->pdev, data, length, PCI_DMA_TODEVICE); | |
590 | if (pci_dma_mapping_error(priv->pdev, dma_addr)) | |
591 | return -ENOMEM; | |
592 | ||
593 | iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR); | |
594 | iowrite32(0, regs + MWL8K_HIU_INT_CODE); | |
595 | iowrite32(MWL8K_H2A_INT_DOORBELL, | |
596 | regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS); | |
597 | iowrite32(MWL8K_H2A_INT_DUMMY, | |
598 | regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS); | |
599 | ||
a66098da LB |
600 | loops = 1000; |
601 | do { | |
602 | u32 int_code; | |
98929824 NS |
603 | if (priv->is_8764) { |
604 | int_code = ioread32(regs + | |
605 | MWL8K_HIU_H2A_INTERRUPT_STATUS); | |
606 | if (int_code == 0) | |
607 | break; | |
608 | } else { | |
609 | int_code = ioread32(regs + MWL8K_HIU_INT_CODE); | |
610 | if (int_code == MWL8K_INT_CODE_CMD_FINISHED) { | |
611 | iowrite32(0, regs + MWL8K_HIU_INT_CODE); | |
612 | break; | |
613 | } | |
a66098da | 614 | } |
3d76e82c | 615 | cond_resched(); |
a66098da LB |
616 | udelay(1); |
617 | } while (--loops); | |
618 | ||
619 | pci_unmap_single(priv->pdev, dma_addr, length, PCI_DMA_TODEVICE); | |
620 | ||
d4b70570 | 621 | return loops ? 0 : -ETIMEDOUT; |
a66098da LB |
622 | } |
623 | ||
624 | static int mwl8k_load_fw_image(struct mwl8k_priv *priv, | |
625 | const u8 *data, size_t length) | |
626 | { | |
627 | struct mwl8k_cmd_pkt *cmd; | |
628 | int done; | |
629 | int rc = 0; | |
630 | ||
631 | cmd = kmalloc(sizeof(*cmd) + 256, GFP_KERNEL); | |
632 | if (cmd == NULL) | |
633 | return -ENOMEM; | |
634 | ||
635 | cmd->code = cpu_to_le16(MWL8K_CMD_CODE_DNLD); | |
636 | cmd->seq_num = 0; | |
f57ca9c1 | 637 | cmd->macid = 0; |
a66098da LB |
638 | cmd->result = 0; |
639 | ||
640 | done = 0; | |
641 | while (length) { | |
642 | int block_size = length > 256 ? 256 : length; | |
643 | ||
644 | memcpy(cmd->payload, data + done, block_size); | |
645 | cmd->length = cpu_to_le16(block_size); | |
646 | ||
647 | rc = mwl8k_send_fw_load_cmd(priv, cmd, | |
648 | sizeof(*cmd) + block_size); | |
649 | if (rc) | |
650 | break; | |
651 | ||
652 | done += block_size; | |
653 | length -= block_size; | |
654 | } | |
655 | ||
656 | if (!rc) { | |
657 | cmd->length = 0; | |
658 | rc = mwl8k_send_fw_load_cmd(priv, cmd, sizeof(*cmd)); | |
659 | } | |
660 | ||
661 | kfree(cmd); | |
662 | ||
663 | return rc; | |
664 | } | |
665 | ||
666 | static int mwl8k_feed_fw_image(struct mwl8k_priv *priv, | |
667 | const u8 *data, size_t length) | |
668 | { | |
669 | unsigned char *buffer; | |
670 | int may_continue, rc = 0; | |
671 | u32 done, prev_block_size; | |
672 | ||
673 | buffer = kmalloc(1024, GFP_KERNEL); | |
674 | if (buffer == NULL) | |
675 | return -ENOMEM; | |
676 | ||
677 | done = 0; | |
678 | prev_block_size = 0; | |
679 | may_continue = 1000; | |
680 | while (may_continue > 0) { | |
681 | u32 block_size; | |
682 | ||
683 | block_size = ioread32(priv->regs + MWL8K_HIU_SCRATCH); | |
684 | if (block_size & 1) { | |
685 | block_size &= ~1; | |
686 | may_continue--; | |
687 | } else { | |
688 | done += prev_block_size; | |
689 | length -= prev_block_size; | |
690 | } | |
691 | ||
692 | if (block_size > 1024 || block_size > length) { | |
693 | rc = -EOVERFLOW; | |
694 | break; | |
695 | } | |
696 | ||
697 | if (length == 0) { | |
698 | rc = 0; | |
699 | break; | |
700 | } | |
701 | ||
702 | if (block_size == 0) { | |
703 | rc = -EPROTO; | |
704 | may_continue--; | |
705 | udelay(1); | |
706 | continue; | |
707 | } | |
708 | ||
709 | prev_block_size = block_size; | |
710 | memcpy(buffer, data + done, block_size); | |
711 | ||
712 | rc = mwl8k_send_fw_load_cmd(priv, buffer, block_size); | |
713 | if (rc) | |
714 | break; | |
715 | } | |
716 | ||
717 | if (!rc && length != 0) | |
718 | rc = -EREMOTEIO; | |
719 | ||
720 | kfree(buffer); | |
721 | ||
722 | return rc; | |
723 | } | |
724 | ||
c2c357ce | 725 | static int mwl8k_load_firmware(struct ieee80211_hw *hw) |
a66098da | 726 | { |
c2c357ce | 727 | struct mwl8k_priv *priv = hw->priv; |
d1f9e41d | 728 | const struct firmware *fw = priv->fw_ucode; |
c2c357ce LB |
729 | int rc; |
730 | int loops; | |
731 | ||
98929824 | 732 | if (!memcmp(fw->data, "\x01\x00\x00\x00", 4) && !priv->is_8764) { |
d1f9e41d | 733 | const struct firmware *helper = priv->fw_helper; |
a66098da | 734 | |
c2c357ce LB |
735 | if (helper == NULL) { |
736 | printk(KERN_ERR "%s: helper image needed but none " | |
737 | "given\n", pci_name(priv->pdev)); | |
738 | return -EINVAL; | |
739 | } | |
a66098da | 740 | |
c2c357ce | 741 | rc = mwl8k_load_fw_image(priv, helper->data, helper->size); |
a66098da LB |
742 | if (rc) { |
743 | printk(KERN_ERR "%s: unable to load firmware " | |
c2c357ce | 744 | "helper image\n", pci_name(priv->pdev)); |
a66098da LB |
745 | return rc; |
746 | } | |
ba30c4a5 | 747 | msleep(20); |
a66098da | 748 | |
c2c357ce | 749 | rc = mwl8k_feed_fw_image(priv, fw->data, fw->size); |
a66098da | 750 | } else { |
98929824 NS |
751 | if (priv->is_8764) |
752 | rc = mwl8k_feed_fw_image(priv, fw->data, fw->size); | |
753 | else | |
754 | rc = mwl8k_load_fw_image(priv, fw->data, fw->size); | |
a66098da LB |
755 | } |
756 | ||
757 | if (rc) { | |
c2c357ce LB |
758 | printk(KERN_ERR "%s: unable to load firmware image\n", |
759 | pci_name(priv->pdev)); | |
a66098da LB |
760 | return rc; |
761 | } | |
762 | ||
89a91f4f | 763 | iowrite32(MWL8K_MODE_STA, priv->regs + MWL8K_HIU_GEN_PTR); |
a66098da | 764 | |
89b872e2 | 765 | loops = 500000; |
a66098da | 766 | do { |
eae74e65 LB |
767 | u32 ready_code; |
768 | ||
769 | ready_code = ioread32(priv->regs + MWL8K_HIU_INT_CODE); | |
770 | if (ready_code == MWL8K_FWAP_READY) { | |
3db1cd5c | 771 | priv->ap_fw = true; |
eae74e65 LB |
772 | break; |
773 | } else if (ready_code == MWL8K_FWSTA_READY) { | |
3db1cd5c | 774 | priv->ap_fw = false; |
a66098da | 775 | break; |
eae74e65 LB |
776 | } |
777 | ||
778 | cond_resched(); | |
a66098da LB |
779 | udelay(1); |
780 | } while (--loops); | |
781 | ||
782 | return loops ? 0 : -ETIMEDOUT; | |
783 | } | |
784 | ||
785 | ||
a66098da LB |
786 | /* DMA header used by firmware and hardware. */ |
787 | struct mwl8k_dma_data { | |
788 | __le16 fwlen; | |
789 | struct ieee80211_hdr wh; | |
20f09c3d | 790 | char data[0]; |
ba2d3587 | 791 | } __packed; |
a66098da LB |
792 | |
793 | /* Routines to add/remove DMA header from skb. */ | |
20f09c3d | 794 | static inline void mwl8k_remove_dma_header(struct sk_buff *skb, __le16 qos) |
a66098da | 795 | { |
20f09c3d LB |
796 | struct mwl8k_dma_data *tr; |
797 | int hdrlen; | |
798 | ||
799 | tr = (struct mwl8k_dma_data *)skb->data; | |
800 | hdrlen = ieee80211_hdrlen(tr->wh.frame_control); | |
801 | ||
802 | if (hdrlen != sizeof(tr->wh)) { | |
803 | if (ieee80211_is_data_qos(tr->wh.frame_control)) { | |
804 | memmove(tr->data - hdrlen, &tr->wh, hdrlen - 2); | |
805 | *((__le16 *)(tr->data - 2)) = qos; | |
806 | } else { | |
807 | memmove(tr->data - hdrlen, &tr->wh, hdrlen); | |
808 | } | |
a66098da | 809 | } |
20f09c3d LB |
810 | |
811 | if (hdrlen != sizeof(*tr)) | |
812 | skb_pull(skb, sizeof(*tr) - hdrlen); | |
a66098da LB |
813 | } |
814 | ||
ff776cec YAP |
815 | #define REDUCED_TX_HEADROOM 8 |
816 | ||
252486a1 | 817 | static void |
e4eefec7 YAP |
818 | mwl8k_add_dma_header(struct mwl8k_priv *priv, struct sk_buff *skb, |
819 | int head_pad, int tail_pad) | |
a66098da LB |
820 | { |
821 | struct ieee80211_hdr *wh; | |
ca009301 | 822 | int hdrlen; |
252486a1 | 823 | int reqd_hdrlen; |
a66098da LB |
824 | struct mwl8k_dma_data *tr; |
825 | ||
ca009301 LB |
826 | /* |
827 | * Add a firmware DMA header; the firmware requires that we | |
828 | * present a 2-byte payload length followed by a 4-address | |
829 | * header (without QoS field), followed (optionally) by any | |
830 | * WEP/ExtIV header (but only filled in for CCMP). | |
831 | */ | |
a66098da | 832 | wh = (struct ieee80211_hdr *)skb->data; |
ca009301 | 833 | |
a66098da | 834 | hdrlen = ieee80211_hdrlen(wh->frame_control); |
ff776cec YAP |
835 | |
836 | /* | |
837 | * Check if skb_resize is required because of | |
838 | * tx_headroom adjustment. | |
839 | */ | |
840 | if (priv->ap_fw && (hdrlen < (sizeof(struct ieee80211_cts) | |
841 | + REDUCED_TX_HEADROOM))) { | |
842 | if (pskb_expand_head(skb, REDUCED_TX_HEADROOM, 0, GFP_ATOMIC)) { | |
843 | ||
844 | wiphy_err(priv->hw->wiphy, | |
845 | "Failed to reallocate TX buffer\n"); | |
846 | return; | |
847 | } | |
848 | skb->truesize += REDUCED_TX_HEADROOM; | |
849 | } | |
850 | ||
e4eefec7 | 851 | reqd_hdrlen = sizeof(*tr) + head_pad; |
252486a1 NS |
852 | |
853 | if (hdrlen != reqd_hdrlen) | |
854 | skb_push(skb, reqd_hdrlen - hdrlen); | |
a66098da | 855 | |
ca009301 | 856 | if (ieee80211_is_data_qos(wh->frame_control)) |
252486a1 | 857 | hdrlen -= IEEE80211_QOS_CTL_LEN; |
a66098da LB |
858 | |
859 | tr = (struct mwl8k_dma_data *)skb->data; | |
860 | if (wh != &tr->wh) | |
861 | memmove(&tr->wh, wh, hdrlen); | |
ca009301 LB |
862 | if (hdrlen != sizeof(tr->wh)) |
863 | memset(((void *)&tr->wh) + hdrlen, 0, sizeof(tr->wh) - hdrlen); | |
a66098da LB |
864 | |
865 | /* | |
866 | * Firmware length is the length of the fully formed "802.11 | |
867 | * payload". That is, everything except for the 802.11 header. | |
868 | * This includes all crypto material including the MIC. | |
869 | */ | |
252486a1 | 870 | tr->fwlen = cpu_to_le16(skb->len - sizeof(*tr) + tail_pad); |
a66098da LB |
871 | } |
872 | ||
ff776cec YAP |
873 | static void mwl8k_encapsulate_tx_frame(struct mwl8k_priv *priv, |
874 | struct sk_buff *skb) | |
e53d9b96 NS |
875 | { |
876 | struct ieee80211_hdr *wh; | |
877 | struct ieee80211_tx_info *tx_info; | |
878 | struct ieee80211_key_conf *key_conf; | |
879 | int data_pad; | |
e4eefec7 | 880 | int head_pad = 0; |
e53d9b96 NS |
881 | |
882 | wh = (struct ieee80211_hdr *)skb->data; | |
883 | ||
884 | tx_info = IEEE80211_SKB_CB(skb); | |
885 | ||
886 | key_conf = NULL; | |
887 | if (ieee80211_is_data(wh->frame_control)) | |
888 | key_conf = tx_info->control.hw_key; | |
889 | ||
890 | /* | |
891 | * Make sure the packet header is in the DMA header format (4-address | |
e4eefec7 | 892 | * without QoS), and add head & tail padding when HW crypto is enabled. |
e53d9b96 NS |
893 | * |
894 | * We have the following trailer padding requirements: | |
895 | * - WEP: 4 trailer bytes (ICV) | |
896 | * - TKIP: 12 trailer bytes (8 MIC + 4 ICV) | |
897 | * - CCMP: 8 trailer bytes (MIC) | |
898 | */ | |
899 | data_pad = 0; | |
900 | if (key_conf != NULL) { | |
e4eefec7 | 901 | head_pad = key_conf->iv_len; |
e53d9b96 NS |
902 | switch (key_conf->cipher) { |
903 | case WLAN_CIPHER_SUITE_WEP40: | |
904 | case WLAN_CIPHER_SUITE_WEP104: | |
905 | data_pad = 4; | |
906 | break; | |
907 | case WLAN_CIPHER_SUITE_TKIP: | |
908 | data_pad = 12; | |
909 | break; | |
910 | case WLAN_CIPHER_SUITE_CCMP: | |
911 | data_pad = 8; | |
912 | break; | |
913 | } | |
914 | } | |
e4eefec7 | 915 | mwl8k_add_dma_header(priv, skb, head_pad, data_pad); |
e53d9b96 | 916 | } |
a66098da LB |
917 | |
918 | /* | |
d926dc7d | 919 | * Packet reception for 88w8366/88w8764 AP firmware. |
6f6d1e9a | 920 | */ |
d926dc7d | 921 | struct mwl8k_rxd_ap { |
6f6d1e9a LB |
922 | __le16 pkt_len; |
923 | __u8 sq2; | |
924 | __u8 rate; | |
925 | __le32 pkt_phys_addr; | |
926 | __le32 next_rxd_phys_addr; | |
927 | __le16 qos_control; | |
928 | __le16 htsig2; | |
929 | __le32 hw_rssi_info; | |
930 | __le32 hw_noise_floor_info; | |
931 | __u8 noise_floor; | |
932 | __u8 pad0[3]; | |
933 | __u8 rssi; | |
934 | __u8 rx_status; | |
935 | __u8 channel; | |
936 | __u8 rx_ctrl; | |
ba2d3587 | 937 | } __packed; |
6f6d1e9a | 938 | |
d926dc7d NS |
939 | #define MWL8K_AP_RATE_INFO_MCS_FORMAT 0x80 |
940 | #define MWL8K_AP_RATE_INFO_40MHZ 0x40 | |
941 | #define MWL8K_AP_RATE_INFO_RATEID(x) ((x) & 0x3f) | |
8e9f33f0 | 942 | |
d926dc7d | 943 | #define MWL8K_AP_RX_CTRL_OWNED_BY_HOST 0x80 |
6f6d1e9a | 944 | |
d926dc7d NS |
945 | /* 8366/8764 AP rx_status bits */ |
946 | #define MWL8K_AP_RXSTAT_DECRYPT_ERR_MASK 0x80 | |
947 | #define MWL8K_AP_RXSTAT_GENERAL_DECRYPT_ERR 0xFF | |
948 | #define MWL8K_AP_RXSTAT_TKIP_DECRYPT_MIC_ERR 0x02 | |
949 | #define MWL8K_AP_RXSTAT_WEP_DECRYPT_ICV_ERR 0x04 | |
950 | #define MWL8K_AP_RXSTAT_TKIP_DECRYPT_ICV_ERR 0x08 | |
d9a07d49 | 951 | |
d926dc7d | 952 | static void mwl8k_rxd_ap_init(void *_rxd, dma_addr_t next_dma_addr) |
6f6d1e9a | 953 | { |
d926dc7d | 954 | struct mwl8k_rxd_ap *rxd = _rxd; |
6f6d1e9a LB |
955 | |
956 | rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr); | |
d926dc7d | 957 | rxd->rx_ctrl = MWL8K_AP_RX_CTRL_OWNED_BY_HOST; |
6f6d1e9a LB |
958 | } |
959 | ||
d926dc7d | 960 | static void mwl8k_rxd_ap_refill(void *_rxd, dma_addr_t addr, int len) |
6f6d1e9a | 961 | { |
d926dc7d | 962 | struct mwl8k_rxd_ap *rxd = _rxd; |
6f6d1e9a LB |
963 | |
964 | rxd->pkt_len = cpu_to_le16(len); | |
965 | rxd->pkt_phys_addr = cpu_to_le32(addr); | |
966 | wmb(); | |
967 | rxd->rx_ctrl = 0; | |
968 | } | |
969 | ||
970 | static int | |
d926dc7d NS |
971 | mwl8k_rxd_ap_process(void *_rxd, struct ieee80211_rx_status *status, |
972 | __le16 *qos, s8 *noise) | |
6f6d1e9a | 973 | { |
d926dc7d | 974 | struct mwl8k_rxd_ap *rxd = _rxd; |
6f6d1e9a | 975 | |
d926dc7d | 976 | if (!(rxd->rx_ctrl & MWL8K_AP_RX_CTRL_OWNED_BY_HOST)) |
6f6d1e9a LB |
977 | return -1; |
978 | rmb(); | |
979 | ||
980 | memset(status, 0, sizeof(*status)); | |
981 | ||
982 | status->signal = -rxd->rssi; | |
0d462bbb | 983 | *noise = -rxd->noise_floor; |
6f6d1e9a | 984 | |
d926dc7d | 985 | if (rxd->rate & MWL8K_AP_RATE_INFO_MCS_FORMAT) { |
6f6d1e9a | 986 | status->flag |= RX_FLAG_HT; |
d926dc7d | 987 | if (rxd->rate & MWL8K_AP_RATE_INFO_40MHZ) |
8e9f33f0 | 988 | status->flag |= RX_FLAG_40MHZ; |
d926dc7d | 989 | status->rate_idx = MWL8K_AP_RATE_INFO_RATEID(rxd->rate); |
6f6d1e9a LB |
990 | } else { |
991 | int i; | |
992 | ||
777ad375 LB |
993 | for (i = 0; i < ARRAY_SIZE(mwl8k_rates_24); i++) { |
994 | if (mwl8k_rates_24[i].hw_value == rxd->rate) { | |
6f6d1e9a LB |
995 | status->rate_idx = i; |
996 | break; | |
997 | } | |
998 | } | |
999 | } | |
1000 | ||
85478344 LB |
1001 | if (rxd->channel > 14) { |
1002 | status->band = IEEE80211_BAND_5GHZ; | |
1003 | if (!(status->flag & RX_FLAG_HT)) | |
1004 | status->rate_idx -= 5; | |
1005 | } else { | |
1006 | status->band = IEEE80211_BAND_2GHZ; | |
1007 | } | |
59eb21a6 BR |
1008 | status->freq = ieee80211_channel_to_frequency(rxd->channel, |
1009 | status->band); | |
6f6d1e9a | 1010 | |
20f09c3d LB |
1011 | *qos = rxd->qos_control; |
1012 | ||
d926dc7d NS |
1013 | if ((rxd->rx_status != MWL8K_AP_RXSTAT_GENERAL_DECRYPT_ERR) && |
1014 | (rxd->rx_status & MWL8K_AP_RXSTAT_DECRYPT_ERR_MASK) && | |
1015 | (rxd->rx_status & MWL8K_AP_RXSTAT_TKIP_DECRYPT_MIC_ERR)) | |
d9a07d49 NS |
1016 | status->flag |= RX_FLAG_MMIC_ERROR; |
1017 | ||
6f6d1e9a LB |
1018 | return le16_to_cpu(rxd->pkt_len); |
1019 | } | |
1020 | ||
d926dc7d NS |
1021 | static struct rxd_ops rxd_ap_ops = { |
1022 | .rxd_size = sizeof(struct mwl8k_rxd_ap), | |
1023 | .rxd_init = mwl8k_rxd_ap_init, | |
1024 | .rxd_refill = mwl8k_rxd_ap_refill, | |
1025 | .rxd_process = mwl8k_rxd_ap_process, | |
6f6d1e9a LB |
1026 | }; |
1027 | ||
1028 | /* | |
89a91f4f | 1029 | * Packet reception for STA firmware. |
a66098da | 1030 | */ |
89a91f4f | 1031 | struct mwl8k_rxd_sta { |
a66098da LB |
1032 | __le16 pkt_len; |
1033 | __u8 link_quality; | |
1034 | __u8 noise_level; | |
1035 | __le32 pkt_phys_addr; | |
45eb400d | 1036 | __le32 next_rxd_phys_addr; |
a66098da LB |
1037 | __le16 qos_control; |
1038 | __le16 rate_info; | |
1039 | __le32 pad0[4]; | |
1040 | __u8 rssi; | |
1041 | __u8 channel; | |
1042 | __le16 pad1; | |
1043 | __u8 rx_ctrl; | |
1044 | __u8 rx_status; | |
1045 | __u8 pad2[2]; | |
ba2d3587 | 1046 | } __packed; |
a66098da | 1047 | |
89a91f4f LB |
1048 | #define MWL8K_STA_RATE_INFO_SHORTPRE 0x8000 |
1049 | #define MWL8K_STA_RATE_INFO_ANTSELECT(x) (((x) >> 11) & 0x3) | |
1050 | #define MWL8K_STA_RATE_INFO_RATEID(x) (((x) >> 3) & 0x3f) | |
1051 | #define MWL8K_STA_RATE_INFO_40MHZ 0x0004 | |
1052 | #define MWL8K_STA_RATE_INFO_SHORTGI 0x0002 | |
1053 | #define MWL8K_STA_RATE_INFO_MCS_FORMAT 0x0001 | |
54bc3a0d | 1054 | |
89a91f4f | 1055 | #define MWL8K_STA_RX_CTRL_OWNED_BY_HOST 0x02 |
d9a07d49 NS |
1056 | #define MWL8K_STA_RX_CTRL_DECRYPT_ERROR 0x04 |
1057 | /* ICV=0 or MIC=1 */ | |
1058 | #define MWL8K_STA_RX_CTRL_DEC_ERR_TYPE 0x08 | |
1059 | /* Key is uploaded only in failure case */ | |
1060 | #define MWL8K_STA_RX_CTRL_KEY_INDEX 0x30 | |
54bc3a0d | 1061 | |
89a91f4f | 1062 | static void mwl8k_rxd_sta_init(void *_rxd, dma_addr_t next_dma_addr) |
54bc3a0d | 1063 | { |
89a91f4f | 1064 | struct mwl8k_rxd_sta *rxd = _rxd; |
54bc3a0d LB |
1065 | |
1066 | rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr); | |
89a91f4f | 1067 | rxd->rx_ctrl = MWL8K_STA_RX_CTRL_OWNED_BY_HOST; |
54bc3a0d LB |
1068 | } |
1069 | ||
89a91f4f | 1070 | static void mwl8k_rxd_sta_refill(void *_rxd, dma_addr_t addr, int len) |
54bc3a0d | 1071 | { |
89a91f4f | 1072 | struct mwl8k_rxd_sta *rxd = _rxd; |
54bc3a0d LB |
1073 | |
1074 | rxd->pkt_len = cpu_to_le16(len); | |
1075 | rxd->pkt_phys_addr = cpu_to_le32(addr); | |
1076 | wmb(); | |
1077 | rxd->rx_ctrl = 0; | |
1078 | } | |
1079 | ||
1080 | static int | |
89a91f4f | 1081 | mwl8k_rxd_sta_process(void *_rxd, struct ieee80211_rx_status *status, |
0d462bbb | 1082 | __le16 *qos, s8 *noise) |
54bc3a0d | 1083 | { |
89a91f4f | 1084 | struct mwl8k_rxd_sta *rxd = _rxd; |
54bc3a0d LB |
1085 | u16 rate_info; |
1086 | ||
89a91f4f | 1087 | if (!(rxd->rx_ctrl & MWL8K_STA_RX_CTRL_OWNED_BY_HOST)) |
54bc3a0d LB |
1088 | return -1; |
1089 | rmb(); | |
1090 | ||
1091 | rate_info = le16_to_cpu(rxd->rate_info); | |
1092 | ||
1093 | memset(status, 0, sizeof(*status)); | |
1094 | ||
1095 | status->signal = -rxd->rssi; | |
0d462bbb | 1096 | *noise = -rxd->noise_level; |
89a91f4f LB |
1097 | status->antenna = MWL8K_STA_RATE_INFO_ANTSELECT(rate_info); |
1098 | status->rate_idx = MWL8K_STA_RATE_INFO_RATEID(rate_info); | |
54bc3a0d | 1099 | |
89a91f4f | 1100 | if (rate_info & MWL8K_STA_RATE_INFO_SHORTPRE) |
54bc3a0d | 1101 | status->flag |= RX_FLAG_SHORTPRE; |
89a91f4f | 1102 | if (rate_info & MWL8K_STA_RATE_INFO_40MHZ) |
54bc3a0d | 1103 | status->flag |= RX_FLAG_40MHZ; |
89a91f4f | 1104 | if (rate_info & MWL8K_STA_RATE_INFO_SHORTGI) |
54bc3a0d | 1105 | status->flag |= RX_FLAG_SHORT_GI; |
89a91f4f | 1106 | if (rate_info & MWL8K_STA_RATE_INFO_MCS_FORMAT) |
54bc3a0d LB |
1107 | status->flag |= RX_FLAG_HT; |
1108 | ||
85478344 LB |
1109 | if (rxd->channel > 14) { |
1110 | status->band = IEEE80211_BAND_5GHZ; | |
1111 | if (!(status->flag & RX_FLAG_HT)) | |
1112 | status->rate_idx -= 5; | |
1113 | } else { | |
1114 | status->band = IEEE80211_BAND_2GHZ; | |
1115 | } | |
59eb21a6 BR |
1116 | status->freq = ieee80211_channel_to_frequency(rxd->channel, |
1117 | status->band); | |
54bc3a0d | 1118 | |
20f09c3d | 1119 | *qos = rxd->qos_control; |
d9a07d49 NS |
1120 | if ((rxd->rx_ctrl & MWL8K_STA_RX_CTRL_DECRYPT_ERROR) && |
1121 | (rxd->rx_ctrl & MWL8K_STA_RX_CTRL_DEC_ERR_TYPE)) | |
1122 | status->flag |= RX_FLAG_MMIC_ERROR; | |
20f09c3d | 1123 | |
54bc3a0d LB |
1124 | return le16_to_cpu(rxd->pkt_len); |
1125 | } | |
1126 | ||
89a91f4f LB |
1127 | static struct rxd_ops rxd_sta_ops = { |
1128 | .rxd_size = sizeof(struct mwl8k_rxd_sta), | |
1129 | .rxd_init = mwl8k_rxd_sta_init, | |
1130 | .rxd_refill = mwl8k_rxd_sta_refill, | |
1131 | .rxd_process = mwl8k_rxd_sta_process, | |
54bc3a0d LB |
1132 | }; |
1133 | ||
1134 | ||
a66098da LB |
1135 | #define MWL8K_RX_DESCS 256 |
1136 | #define MWL8K_RX_MAXSZ 3800 | |
1137 | ||
1138 | static int mwl8k_rxq_init(struct ieee80211_hw *hw, int index) | |
1139 | { | |
1140 | struct mwl8k_priv *priv = hw->priv; | |
1141 | struct mwl8k_rx_queue *rxq = priv->rxq + index; | |
1142 | int size; | |
1143 | int i; | |
1144 | ||
45eb400d LB |
1145 | rxq->rxd_count = 0; |
1146 | rxq->head = 0; | |
1147 | rxq->tail = 0; | |
a66098da | 1148 | |
54bc3a0d | 1149 | size = MWL8K_RX_DESCS * priv->rxd_ops->rxd_size; |
a66098da | 1150 | |
45eb400d LB |
1151 | rxq->rxd = pci_alloc_consistent(priv->pdev, size, &rxq->rxd_dma); |
1152 | if (rxq->rxd == NULL) { | |
5db55844 | 1153 | wiphy_err(hw->wiphy, "failed to alloc RX descriptors\n"); |
a66098da LB |
1154 | return -ENOMEM; |
1155 | } | |
45eb400d | 1156 | memset(rxq->rxd, 0, size); |
a66098da | 1157 | |
b9ede5f1 | 1158 | rxq->buf = kcalloc(MWL8K_RX_DESCS, sizeof(*rxq->buf), GFP_KERNEL); |
788838eb | 1159 | if (rxq->buf == NULL) { |
45eb400d | 1160 | pci_free_consistent(priv->pdev, size, rxq->rxd, rxq->rxd_dma); |
a66098da LB |
1161 | return -ENOMEM; |
1162 | } | |
a66098da LB |
1163 | |
1164 | for (i = 0; i < MWL8K_RX_DESCS; i++) { | |
54bc3a0d LB |
1165 | int desc_size; |
1166 | void *rxd; | |
a66098da | 1167 | int nexti; |
54bc3a0d LB |
1168 | dma_addr_t next_dma_addr; |
1169 | ||
1170 | desc_size = priv->rxd_ops->rxd_size; | |
1171 | rxd = rxq->rxd + (i * priv->rxd_ops->rxd_size); | |
a66098da | 1172 | |
54bc3a0d LB |
1173 | nexti = i + 1; |
1174 | if (nexti == MWL8K_RX_DESCS) | |
1175 | nexti = 0; | |
1176 | next_dma_addr = rxq->rxd_dma + (nexti * desc_size); | |
a66098da | 1177 | |
54bc3a0d | 1178 | priv->rxd_ops->rxd_init(rxd, next_dma_addr); |
a66098da LB |
1179 | } |
1180 | ||
1181 | return 0; | |
1182 | } | |
1183 | ||
1184 | static int rxq_refill(struct ieee80211_hw *hw, int index, int limit) | |
1185 | { | |
1186 | struct mwl8k_priv *priv = hw->priv; | |
1187 | struct mwl8k_rx_queue *rxq = priv->rxq + index; | |
1188 | int refilled; | |
1189 | ||
1190 | refilled = 0; | |
45eb400d | 1191 | while (rxq->rxd_count < MWL8K_RX_DESCS && limit--) { |
a66098da | 1192 | struct sk_buff *skb; |
788838eb | 1193 | dma_addr_t addr; |
a66098da | 1194 | int rx; |
54bc3a0d | 1195 | void *rxd; |
a66098da LB |
1196 | |
1197 | skb = dev_alloc_skb(MWL8K_RX_MAXSZ); | |
1198 | if (skb == NULL) | |
1199 | break; | |
1200 | ||
788838eb LB |
1201 | addr = pci_map_single(priv->pdev, skb->data, |
1202 | MWL8K_RX_MAXSZ, DMA_FROM_DEVICE); | |
a66098da | 1203 | |
54bc3a0d LB |
1204 | rxq->rxd_count++; |
1205 | rx = rxq->tail++; | |
1206 | if (rxq->tail == MWL8K_RX_DESCS) | |
1207 | rxq->tail = 0; | |
788838eb | 1208 | rxq->buf[rx].skb = skb; |
53b1b3e1 | 1209 | dma_unmap_addr_set(&rxq->buf[rx], dma, addr); |
54bc3a0d LB |
1210 | |
1211 | rxd = rxq->rxd + (rx * priv->rxd_ops->rxd_size); | |
1212 | priv->rxd_ops->rxd_refill(rxd, addr, MWL8K_RX_MAXSZ); | |
a66098da LB |
1213 | |
1214 | refilled++; | |
1215 | } | |
1216 | ||
1217 | return refilled; | |
1218 | } | |
1219 | ||
1220 | /* Must be called only when the card's reception is completely halted */ | |
1221 | static void mwl8k_rxq_deinit(struct ieee80211_hw *hw, int index) | |
1222 | { | |
1223 | struct mwl8k_priv *priv = hw->priv; | |
1224 | struct mwl8k_rx_queue *rxq = priv->rxq + index; | |
1225 | int i; | |
1226 | ||
73b46320 BC |
1227 | if (rxq->rxd == NULL) |
1228 | return; | |
1229 | ||
a66098da | 1230 | for (i = 0; i < MWL8K_RX_DESCS; i++) { |
788838eb LB |
1231 | if (rxq->buf[i].skb != NULL) { |
1232 | pci_unmap_single(priv->pdev, | |
53b1b3e1 | 1233 | dma_unmap_addr(&rxq->buf[i], dma), |
788838eb | 1234 | MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE); |
53b1b3e1 | 1235 | dma_unmap_addr_set(&rxq->buf[i], dma, 0); |
788838eb LB |
1236 | |
1237 | kfree_skb(rxq->buf[i].skb); | |
1238 | rxq->buf[i].skb = NULL; | |
a66098da LB |
1239 | } |
1240 | } | |
1241 | ||
788838eb LB |
1242 | kfree(rxq->buf); |
1243 | rxq->buf = NULL; | |
a66098da LB |
1244 | |
1245 | pci_free_consistent(priv->pdev, | |
54bc3a0d | 1246 | MWL8K_RX_DESCS * priv->rxd_ops->rxd_size, |
45eb400d LB |
1247 | rxq->rxd, rxq->rxd_dma); |
1248 | rxq->rxd = NULL; | |
a66098da LB |
1249 | } |
1250 | ||
1251 | ||
1252 | /* | |
1253 | * Scan a list of BSSIDs to process for finalize join. | |
1254 | * Allows for extension to process multiple BSSIDs. | |
1255 | */ | |
1256 | static inline int | |
1257 | mwl8k_capture_bssid(struct mwl8k_priv *priv, struct ieee80211_hdr *wh) | |
1258 | { | |
1259 | return priv->capture_beacon && | |
1260 | ieee80211_is_beacon(wh->frame_control) && | |
2e42e474 | 1261 | ether_addr_equal(wh->addr3, priv->capture_bssid); |
a66098da LB |
1262 | } |
1263 | ||
3779752d LB |
1264 | static inline void mwl8k_save_beacon(struct ieee80211_hw *hw, |
1265 | struct sk_buff *skb) | |
a66098da | 1266 | { |
3779752d LB |
1267 | struct mwl8k_priv *priv = hw->priv; |
1268 | ||
a66098da | 1269 | priv->capture_beacon = false; |
d89173f2 | 1270 | memset(priv->capture_bssid, 0, ETH_ALEN); |
a66098da LB |
1271 | |
1272 | /* | |
1273 | * Use GFP_ATOMIC as rxq_process is called from | |
1274 | * the primary interrupt handler, memory allocation call | |
1275 | * must not sleep. | |
1276 | */ | |
1277 | priv->beacon_skb = skb_copy(skb, GFP_ATOMIC); | |
1278 | if (priv->beacon_skb != NULL) | |
3779752d | 1279 | ieee80211_queue_work(hw, &priv->finalize_join_worker); |
a66098da LB |
1280 | } |
1281 | ||
d9a07d49 NS |
1282 | static inline struct mwl8k_vif *mwl8k_find_vif_bss(struct list_head *vif_list, |
1283 | u8 *bssid) | |
1284 | { | |
1285 | struct mwl8k_vif *mwl8k_vif; | |
1286 | ||
1287 | list_for_each_entry(mwl8k_vif, | |
1288 | vif_list, list) { | |
1289 | if (memcmp(bssid, mwl8k_vif->bssid, | |
1290 | ETH_ALEN) == 0) | |
1291 | return mwl8k_vif; | |
1292 | } | |
1293 | ||
1294 | return NULL; | |
1295 | } | |
1296 | ||
a66098da LB |
1297 | static int rxq_process(struct ieee80211_hw *hw, int index, int limit) |
1298 | { | |
1299 | struct mwl8k_priv *priv = hw->priv; | |
d9a07d49 | 1300 | struct mwl8k_vif *mwl8k_vif = NULL; |
a66098da LB |
1301 | struct mwl8k_rx_queue *rxq = priv->rxq + index; |
1302 | int processed; | |
1303 | ||
1304 | processed = 0; | |
45eb400d | 1305 | while (rxq->rxd_count && limit--) { |
a66098da | 1306 | struct sk_buff *skb; |
54bc3a0d LB |
1307 | void *rxd; |
1308 | int pkt_len; | |
a66098da | 1309 | struct ieee80211_rx_status status; |
d9a07d49 | 1310 | struct ieee80211_hdr *wh; |
20f09c3d | 1311 | __le16 qos; |
a66098da | 1312 | |
788838eb | 1313 | skb = rxq->buf[rxq->head].skb; |
d25f9f13 LB |
1314 | if (skb == NULL) |
1315 | break; | |
54bc3a0d LB |
1316 | |
1317 | rxd = rxq->rxd + (rxq->head * priv->rxd_ops->rxd_size); | |
1318 | ||
0d462bbb JL |
1319 | pkt_len = priv->rxd_ops->rxd_process(rxd, &status, &qos, |
1320 | &priv->noise); | |
54bc3a0d LB |
1321 | if (pkt_len < 0) |
1322 | break; | |
1323 | ||
788838eb LB |
1324 | rxq->buf[rxq->head].skb = NULL; |
1325 | ||
1326 | pci_unmap_single(priv->pdev, | |
53b1b3e1 | 1327 | dma_unmap_addr(&rxq->buf[rxq->head], dma), |
788838eb | 1328 | MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE); |
53b1b3e1 | 1329 | dma_unmap_addr_set(&rxq->buf[rxq->head], dma, 0); |
a66098da | 1330 | |
54bc3a0d LB |
1331 | rxq->head++; |
1332 | if (rxq->head == MWL8K_RX_DESCS) | |
1333 | rxq->head = 0; | |
1334 | ||
45eb400d | 1335 | rxq->rxd_count--; |
a66098da | 1336 | |
d9a07d49 | 1337 | wh = &((struct mwl8k_dma_data *)skb->data)->wh; |
a66098da | 1338 | |
a66098da | 1339 | /* |
c2c357ce LB |
1340 | * Check for a pending join operation. Save a |
1341 | * copy of the beacon and schedule a tasklet to | |
1342 | * send a FINALIZE_JOIN command to the firmware. | |
a66098da | 1343 | */ |
54bc3a0d | 1344 | if (mwl8k_capture_bssid(priv, (void *)skb->data)) |
3779752d | 1345 | mwl8k_save_beacon(hw, skb); |
a66098da | 1346 | |
d9a07d49 NS |
1347 | if (ieee80211_has_protected(wh->frame_control)) { |
1348 | ||
1349 | /* Check if hw crypto has been enabled for | |
1350 | * this bss. If yes, set the status flags | |
1351 | * accordingly | |
1352 | */ | |
1353 | mwl8k_vif = mwl8k_find_vif_bss(&priv->vif_list, | |
1354 | wh->addr1); | |
1355 | ||
1356 | if (mwl8k_vif != NULL && | |
23677ce3 | 1357 | mwl8k_vif->is_hw_crypto_enabled) { |
d9a07d49 NS |
1358 | /* |
1359 | * When MMIC ERROR is encountered | |
1360 | * by the firmware, payload is | |
1361 | * dropped and only 32 bytes of | |
1362 | * mwl8k Firmware header is sent | |
1363 | * to the host. | |
1364 | * | |
1365 | * We need to add four bytes of | |
1366 | * key information. In it | |
1367 | * MAC80211 expects keyidx set to | |
1368 | * 0 for triggering Counter | |
1369 | * Measure of MMIC failure. | |
1370 | */ | |
1371 | if (status.flag & RX_FLAG_MMIC_ERROR) { | |
1372 | struct mwl8k_dma_data *tr; | |
1373 | tr = (struct mwl8k_dma_data *)skb->data; | |
1374 | memset((void *)&(tr->data), 0, 4); | |
1375 | pkt_len += 4; | |
1376 | } | |
1377 | ||
1378 | if (!ieee80211_is_auth(wh->frame_control)) | |
1379 | status.flag |= RX_FLAG_IV_STRIPPED | | |
1380 | RX_FLAG_DECRYPTED | | |
1381 | RX_FLAG_MMIC_STRIPPED; | |
1382 | } | |
1383 | } | |
1384 | ||
1385 | skb_put(skb, pkt_len); | |
1386 | mwl8k_remove_dma_header(skb, qos); | |
f1d58c25 JB |
1387 | memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status)); |
1388 | ieee80211_rx_irqsafe(hw, skb); | |
a66098da LB |
1389 | |
1390 | processed++; | |
1391 | } | |
1392 | ||
1393 | return processed; | |
1394 | } | |
1395 | ||
1396 | ||
1397 | /* | |
1398 | * Packet transmission. | |
1399 | */ | |
1400 | ||
a66098da LB |
1401 | #define MWL8K_TXD_STATUS_OK 0x00000001 |
1402 | #define MWL8K_TXD_STATUS_OK_RETRY 0x00000002 | |
1403 | #define MWL8K_TXD_STATUS_OK_MORE_RETRY 0x00000004 | |
1404 | #define MWL8K_TXD_STATUS_MULTICAST_TX 0x00000008 | |
a66098da | 1405 | #define MWL8K_TXD_STATUS_FW_OWNED 0x80000000 |
a66098da | 1406 | |
e0493a8d LB |
1407 | #define MWL8K_QOS_QLEN_UNSPEC 0xff00 |
1408 | #define MWL8K_QOS_ACK_POLICY_MASK 0x0060 | |
1409 | #define MWL8K_QOS_ACK_POLICY_NORMAL 0x0000 | |
1410 | #define MWL8K_QOS_ACK_POLICY_BLOCKACK 0x0060 | |
1411 | #define MWL8K_QOS_EOSP 0x0010 | |
1412 | ||
a66098da LB |
1413 | struct mwl8k_tx_desc { |
1414 | __le32 status; | |
1415 | __u8 data_rate; | |
1416 | __u8 tx_priority; | |
1417 | __le16 qos_control; | |
1418 | __le32 pkt_phys_addr; | |
1419 | __le16 pkt_len; | |
d89173f2 | 1420 | __u8 dest_MAC_addr[ETH_ALEN]; |
45eb400d | 1421 | __le32 next_txd_phys_addr; |
8a7a578c | 1422 | __le32 timestamp; |
a66098da LB |
1423 | __le16 rate_info; |
1424 | __u8 peer_id; | |
a1fe24b0 | 1425 | __u8 tx_frag_cnt; |
ba2d3587 | 1426 | } __packed; |
a66098da LB |
1427 | |
1428 | #define MWL8K_TX_DESCS 128 | |
1429 | ||
1430 | static int mwl8k_txq_init(struct ieee80211_hw *hw, int index) | |
1431 | { | |
1432 | struct mwl8k_priv *priv = hw->priv; | |
1433 | struct mwl8k_tx_queue *txq = priv->txq + index; | |
1434 | int size; | |
1435 | int i; | |
1436 | ||
8ccbc3b8 | 1437 | txq->len = 0; |
45eb400d LB |
1438 | txq->head = 0; |
1439 | txq->tail = 0; | |
a66098da LB |
1440 | |
1441 | size = MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc); | |
1442 | ||
45eb400d LB |
1443 | txq->txd = pci_alloc_consistent(priv->pdev, size, &txq->txd_dma); |
1444 | if (txq->txd == NULL) { | |
5db55844 | 1445 | wiphy_err(hw->wiphy, "failed to alloc TX descriptors\n"); |
a66098da LB |
1446 | return -ENOMEM; |
1447 | } | |
45eb400d | 1448 | memset(txq->txd, 0, size); |
a66098da | 1449 | |
b9ede5f1 | 1450 | txq->skb = kcalloc(MWL8K_TX_DESCS, sizeof(*txq->skb), GFP_KERNEL); |
45eb400d | 1451 | if (txq->skb == NULL) { |
45eb400d | 1452 | pci_free_consistent(priv->pdev, size, txq->txd, txq->txd_dma); |
a66098da LB |
1453 | return -ENOMEM; |
1454 | } | |
a66098da LB |
1455 | |
1456 | for (i = 0; i < MWL8K_TX_DESCS; i++) { | |
1457 | struct mwl8k_tx_desc *tx_desc; | |
1458 | int nexti; | |
1459 | ||
45eb400d | 1460 | tx_desc = txq->txd + i; |
a66098da LB |
1461 | nexti = (i + 1) % MWL8K_TX_DESCS; |
1462 | ||
1463 | tx_desc->status = 0; | |
45eb400d LB |
1464 | tx_desc->next_txd_phys_addr = |
1465 | cpu_to_le32(txq->txd_dma + nexti * sizeof(*tx_desc)); | |
a66098da LB |
1466 | } |
1467 | ||
1468 | return 0; | |
1469 | } | |
1470 | ||
1471 | static inline void mwl8k_tx_start(struct mwl8k_priv *priv) | |
1472 | { | |
1473 | iowrite32(MWL8K_H2A_INT_PPA_READY, | |
1474 | priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS); | |
1475 | iowrite32(MWL8K_H2A_INT_DUMMY, | |
1476 | priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS); | |
1477 | ioread32(priv->regs + MWL8K_HIU_INT_CODE); | |
1478 | } | |
1479 | ||
7e1112d3 | 1480 | static void mwl8k_dump_tx_rings(struct ieee80211_hw *hw) |
a66098da | 1481 | { |
7e1112d3 LB |
1482 | struct mwl8k_priv *priv = hw->priv; |
1483 | int i; | |
1484 | ||
e600707b | 1485 | for (i = 0; i < mwl8k_tx_queues(priv); i++) { |
7e1112d3 LB |
1486 | struct mwl8k_tx_queue *txq = priv->txq + i; |
1487 | int fw_owned = 0; | |
1488 | int drv_owned = 0; | |
1489 | int unused = 0; | |
1490 | int desc; | |
1491 | ||
a66098da | 1492 | for (desc = 0; desc < MWL8K_TX_DESCS; desc++) { |
7e1112d3 LB |
1493 | struct mwl8k_tx_desc *tx_desc = txq->txd + desc; |
1494 | u32 status; | |
a66098da | 1495 | |
7e1112d3 | 1496 | status = le32_to_cpu(tx_desc->status); |
a66098da | 1497 | if (status & MWL8K_TXD_STATUS_FW_OWNED) |
7e1112d3 | 1498 | fw_owned++; |
a66098da | 1499 | else |
7e1112d3 | 1500 | drv_owned++; |
a66098da LB |
1501 | |
1502 | if (tx_desc->pkt_len == 0) | |
7e1112d3 | 1503 | unused++; |
a66098da | 1504 | } |
a66098da | 1505 | |
c96c31e4 JP |
1506 | wiphy_err(hw->wiphy, |
1507 | "txq[%d] len=%d head=%d tail=%d " | |
1508 | "fw_owned=%d drv_owned=%d unused=%d\n", | |
1509 | i, | |
1510 | txq->len, txq->head, txq->tail, | |
1511 | fw_owned, drv_owned, unused); | |
7e1112d3 | 1512 | } |
a66098da LB |
1513 | } |
1514 | ||
618952a7 | 1515 | /* |
88de754a | 1516 | * Must be called with priv->fw_mutex held and tx queues stopped. |
618952a7 | 1517 | */ |
62abd3cf | 1518 | #define MWL8K_TX_WAIT_TIMEOUT_MS 5000 |
7e1112d3 | 1519 | |
950d5b01 | 1520 | static int mwl8k_tx_wait_empty(struct ieee80211_hw *hw) |
a66098da | 1521 | { |
a66098da | 1522 | struct mwl8k_priv *priv = hw->priv; |
88de754a | 1523 | DECLARE_COMPLETION_ONSTACK(tx_wait); |
7e1112d3 LB |
1524 | int retry; |
1525 | int rc; | |
a66098da LB |
1526 | |
1527 | might_sleep(); | |
1528 | ||
6b6accc3 YAP |
1529 | /* Since fw restart is in progress, allow only the firmware |
1530 | * commands from the restart code and block the other | |
1531 | * commands since they are going to fail in any case since | |
1532 | * the firmware has crashed | |
1533 | */ | |
1534 | if (priv->hw_restart_in_progress) { | |
1535 | if (priv->hw_restart_owner == current) | |
1536 | return 0; | |
1537 | else | |
1538 | return -EBUSY; | |
1539 | } | |
1540 | ||
c27a54d3 YAP |
1541 | if (atomic_read(&priv->watchdog_event_pending)) |
1542 | return 0; | |
1543 | ||
7e1112d3 LB |
1544 | /* |
1545 | * The TX queues are stopped at this point, so this test | |
1546 | * doesn't need to take ->tx_lock. | |
1547 | */ | |
1548 | if (!priv->pending_tx_pkts) | |
1549 | return 0; | |
1550 | ||
1551 | retry = 0; | |
1552 | rc = 0; | |
1553 | ||
a66098da | 1554 | spin_lock_bh(&priv->tx_lock); |
7e1112d3 LB |
1555 | priv->tx_wait = &tx_wait; |
1556 | while (!rc) { | |
1557 | int oldcount; | |
1558 | unsigned long timeout; | |
a66098da | 1559 | |
7e1112d3 | 1560 | oldcount = priv->pending_tx_pkts; |
a66098da | 1561 | |
7e1112d3 | 1562 | spin_unlock_bh(&priv->tx_lock); |
88de754a | 1563 | timeout = wait_for_completion_timeout(&tx_wait, |
7e1112d3 | 1564 | msecs_to_jiffies(MWL8K_TX_WAIT_TIMEOUT_MS)); |
c27a54d3 YAP |
1565 | |
1566 | if (atomic_read(&priv->watchdog_event_pending)) { | |
1567 | spin_lock_bh(&priv->tx_lock); | |
1568 | priv->tx_wait = NULL; | |
1569 | spin_unlock_bh(&priv->tx_lock); | |
1570 | return 0; | |
1571 | } | |
1572 | ||
a66098da | 1573 | spin_lock_bh(&priv->tx_lock); |
7e1112d3 LB |
1574 | |
1575 | if (timeout) { | |
1576 | WARN_ON(priv->pending_tx_pkts); | |
ba30c4a5 | 1577 | if (retry) |
c96c31e4 | 1578 | wiphy_notice(hw->wiphy, "tx rings drained\n"); |
7e1112d3 LB |
1579 | break; |
1580 | } | |
1581 | ||
1582 | if (priv->pending_tx_pkts < oldcount) { | |
c96c31e4 JP |
1583 | wiphy_notice(hw->wiphy, |
1584 | "waiting for tx rings to drain (%d -> %d pkts)\n", | |
1585 | oldcount, priv->pending_tx_pkts); | |
7e1112d3 LB |
1586 | retry = 1; |
1587 | continue; | |
1588 | } | |
1589 | ||
a66098da | 1590 | priv->tx_wait = NULL; |
a66098da | 1591 | |
c96c31e4 JP |
1592 | wiphy_err(hw->wiphy, "tx rings stuck for %d ms\n", |
1593 | MWL8K_TX_WAIT_TIMEOUT_MS); | |
7e1112d3 | 1594 | mwl8k_dump_tx_rings(hw); |
6b6accc3 YAP |
1595 | priv->hw_restart_in_progress = true; |
1596 | ieee80211_queue_work(hw, &priv->fw_reload); | |
7e1112d3 LB |
1597 | |
1598 | rc = -ETIMEDOUT; | |
a66098da | 1599 | } |
9b0b11fb | 1600 | priv->tx_wait = NULL; |
7e1112d3 | 1601 | spin_unlock_bh(&priv->tx_lock); |
a66098da | 1602 | |
7e1112d3 | 1603 | return rc; |
a66098da LB |
1604 | } |
1605 | ||
c23b5a69 LB |
1606 | #define MWL8K_TXD_SUCCESS(status) \ |
1607 | ((status) & (MWL8K_TXD_STATUS_OK | \ | |
1608 | MWL8K_TXD_STATUS_OK_RETRY | \ | |
1609 | MWL8K_TXD_STATUS_OK_MORE_RETRY)) | |
a66098da | 1610 | |
a0e7c6cf NS |
1611 | static int mwl8k_tid_queue_mapping(u8 tid) |
1612 | { | |
1613 | BUG_ON(tid > 7); | |
1614 | ||
1615 | switch (tid) { | |
1616 | case 0: | |
1617 | case 3: | |
1618 | return IEEE80211_AC_BE; | |
1619 | break; | |
1620 | case 1: | |
1621 | case 2: | |
1622 | return IEEE80211_AC_BK; | |
1623 | break; | |
1624 | case 4: | |
1625 | case 5: | |
1626 | return IEEE80211_AC_VI; | |
1627 | break; | |
1628 | case 6: | |
1629 | case 7: | |
1630 | return IEEE80211_AC_VO; | |
1631 | break; | |
1632 | default: | |
1633 | return -1; | |
1634 | break; | |
1635 | } | |
1636 | } | |
1637 | ||
17033543 NS |
1638 | /* The firmware will fill in the rate information |
1639 | * for each packet that gets queued in the hardware | |
49adc5ce | 1640 | * and these macros will interpret that info. |
17033543 NS |
1641 | */ |
1642 | ||
49adc5ce JL |
1643 | #define RI_FORMAT(a) (a & 0x0001) |
1644 | #define RI_RATE_ID_MCS(a) ((a & 0x01f8) >> 3) | |
17033543 | 1645 | |
efb7c49a LB |
1646 | static int |
1647 | mwl8k_txq_reclaim(struct ieee80211_hw *hw, int index, int limit, int force) | |
a66098da LB |
1648 | { |
1649 | struct mwl8k_priv *priv = hw->priv; | |
1650 | struct mwl8k_tx_queue *txq = priv->txq + index; | |
efb7c49a | 1651 | int processed; |
a66098da | 1652 | |
efb7c49a | 1653 | processed = 0; |
8ccbc3b8 | 1654 | while (txq->len > 0 && limit--) { |
a66098da | 1655 | int tx; |
a66098da LB |
1656 | struct mwl8k_tx_desc *tx_desc; |
1657 | unsigned long addr; | |
ce9e2e1b | 1658 | int size; |
a66098da LB |
1659 | struct sk_buff *skb; |
1660 | struct ieee80211_tx_info *info; | |
1661 | u32 status; | |
17033543 NS |
1662 | struct ieee80211_sta *sta; |
1663 | struct mwl8k_sta *sta_info = NULL; | |
1664 | u16 rate_info; | |
17033543 | 1665 | struct ieee80211_hdr *wh; |
a66098da | 1666 | |
45eb400d LB |
1667 | tx = txq->head; |
1668 | tx_desc = txq->txd + tx; | |
a66098da LB |
1669 | |
1670 | status = le32_to_cpu(tx_desc->status); | |
1671 | ||
1672 | if (status & MWL8K_TXD_STATUS_FW_OWNED) { | |
1673 | if (!force) | |
1674 | break; | |
1675 | tx_desc->status &= | |
1676 | ~cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED); | |
1677 | } | |
1678 | ||
45eb400d | 1679 | txq->head = (tx + 1) % MWL8K_TX_DESCS; |
8ccbc3b8 KV |
1680 | BUG_ON(txq->len == 0); |
1681 | txq->len--; | |
a66098da LB |
1682 | priv->pending_tx_pkts--; |
1683 | ||
1684 | addr = le32_to_cpu(tx_desc->pkt_phys_addr); | |
ce9e2e1b | 1685 | size = le16_to_cpu(tx_desc->pkt_len); |
45eb400d LB |
1686 | skb = txq->skb[tx]; |
1687 | txq->skb[tx] = NULL; | |
a66098da LB |
1688 | |
1689 | BUG_ON(skb == NULL); | |
1690 | pci_unmap_single(priv->pdev, addr, size, PCI_DMA_TODEVICE); | |
1691 | ||
20f09c3d | 1692 | mwl8k_remove_dma_header(skb, tx_desc->qos_control); |
a66098da | 1693 | |
17033543 NS |
1694 | wh = (struct ieee80211_hdr *) skb->data; |
1695 | ||
a66098da LB |
1696 | /* Mark descriptor as unused */ |
1697 | tx_desc->pkt_phys_addr = 0; | |
1698 | tx_desc->pkt_len = 0; | |
1699 | ||
a66098da | 1700 | info = IEEE80211_SKB_CB(skb); |
17033543 | 1701 | if (ieee80211_is_data(wh->frame_control)) { |
89e11801 TH |
1702 | rcu_read_lock(); |
1703 | sta = ieee80211_find_sta_by_ifaddr(hw, wh->addr1, | |
1704 | wh->addr2); | |
17033543 NS |
1705 | if (sta) { |
1706 | sta_info = MWL8K_STA(sta); | |
1707 | BUG_ON(sta_info == NULL); | |
1708 | rate_info = le16_to_cpu(tx_desc->rate_info); | |
17033543 NS |
1709 | /* If rate is < 6.5 Mpbs for an ht station |
1710 | * do not form an ampdu. If the station is a | |
1711 | * legacy station (format = 0), do not form an | |
1712 | * ampdu | |
1713 | */ | |
49adc5ce JL |
1714 | if (RI_RATE_ID_MCS(rate_info) < 1 || |
1715 | RI_FORMAT(rate_info) == 0) { | |
17033543 NS |
1716 | sta_info->is_ampdu_allowed = false; |
1717 | } else { | |
1718 | sta_info->is_ampdu_allowed = true; | |
1719 | } | |
1720 | } | |
89e11801 | 1721 | rcu_read_unlock(); |
17033543 NS |
1722 | } |
1723 | ||
a66098da | 1724 | ieee80211_tx_info_clear_status(info); |
0bf22c37 NS |
1725 | |
1726 | /* Rate control is happening in the firmware. | |
1727 | * Ensure no tx rate is being reported. | |
1728 | */ | |
ba30c4a5 YAP |
1729 | info->status.rates[0].idx = -1; |
1730 | info->status.rates[0].count = 1; | |
0bf22c37 | 1731 | |
ce9e2e1b | 1732 | if (MWL8K_TXD_SUCCESS(status)) |
a66098da | 1733 | info->flags |= IEEE80211_TX_STAT_ACK; |
a66098da LB |
1734 | |
1735 | ieee80211_tx_status_irqsafe(hw, skb); | |
1736 | ||
efb7c49a | 1737 | processed++; |
a66098da LB |
1738 | } |
1739 | ||
efb7c49a | 1740 | return processed; |
a66098da LB |
1741 | } |
1742 | ||
1743 | /* must be called only when the card's transmit is completely halted */ | |
1744 | static void mwl8k_txq_deinit(struct ieee80211_hw *hw, int index) | |
1745 | { | |
1746 | struct mwl8k_priv *priv = hw->priv; | |
1747 | struct mwl8k_tx_queue *txq = priv->txq + index; | |
1748 | ||
73b46320 BC |
1749 | if (txq->txd == NULL) |
1750 | return; | |
1751 | ||
efb7c49a | 1752 | mwl8k_txq_reclaim(hw, index, INT_MAX, 1); |
a66098da | 1753 | |
45eb400d LB |
1754 | kfree(txq->skb); |
1755 | txq->skb = NULL; | |
a66098da LB |
1756 | |
1757 | pci_free_consistent(priv->pdev, | |
1758 | MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc), | |
45eb400d LB |
1759 | txq->txd, txq->txd_dma); |
1760 | txq->txd = NULL; | |
a66098da LB |
1761 | } |
1762 | ||
ac109fd0 | 1763 | /* caller must hold priv->stream_lock when calling the stream functions */ |
ba30c4a5 | 1764 | static struct mwl8k_ampdu_stream * |
ac109fd0 BC |
1765 | mwl8k_add_stream(struct ieee80211_hw *hw, struct ieee80211_sta *sta, u8 tid) |
1766 | { | |
1767 | struct mwl8k_ampdu_stream *stream; | |
1768 | struct mwl8k_priv *priv = hw->priv; | |
1769 | int i; | |
1770 | ||
7fb978b7 | 1771 | for (i = 0; i < MWL8K_NUM_AMPDU_STREAMS; i++) { |
ac109fd0 BC |
1772 | stream = &priv->ampdu[i]; |
1773 | if (stream->state == AMPDU_NO_STREAM) { | |
1774 | stream->sta = sta; | |
1775 | stream->state = AMPDU_STREAM_NEW; | |
1776 | stream->tid = tid; | |
1777 | stream->idx = i; | |
ac109fd0 BC |
1778 | wiphy_debug(hw->wiphy, "Added a new stream for %pM %d", |
1779 | sta->addr, tid); | |
1780 | return stream; | |
1781 | } | |
1782 | } | |
1783 | return NULL; | |
1784 | } | |
1785 | ||
1786 | static int | |
1787 | mwl8k_start_stream(struct ieee80211_hw *hw, struct mwl8k_ampdu_stream *stream) | |
1788 | { | |
1789 | int ret; | |
1790 | ||
1791 | /* if the stream has already been started, don't start it again */ | |
1792 | if (stream->state != AMPDU_STREAM_NEW) | |
1793 | return 0; | |
1794 | ret = ieee80211_start_tx_ba_session(stream->sta, stream->tid, 0); | |
1795 | if (ret) | |
1796 | wiphy_debug(hw->wiphy, "Failed to start stream for %pM %d: " | |
1797 | "%d\n", stream->sta->addr, stream->tid, ret); | |
1798 | else | |
1799 | wiphy_debug(hw->wiphy, "Started stream for %pM %d\n", | |
1800 | stream->sta->addr, stream->tid); | |
1801 | return ret; | |
1802 | } | |
1803 | ||
1804 | static void | |
1805 | mwl8k_remove_stream(struct ieee80211_hw *hw, struct mwl8k_ampdu_stream *stream) | |
1806 | { | |
1807 | wiphy_debug(hw->wiphy, "Remove stream for %pM %d\n", stream->sta->addr, | |
1808 | stream->tid); | |
1809 | memset(stream, 0, sizeof(*stream)); | |
1810 | } | |
1811 | ||
1812 | static struct mwl8k_ampdu_stream * | |
1813 | mwl8k_lookup_stream(struct ieee80211_hw *hw, u8 *addr, u8 tid) | |
1814 | { | |
1815 | struct mwl8k_priv *priv = hw->priv; | |
1816 | int i; | |
1817 | ||
7fb978b7 | 1818 | for (i = 0; i < MWL8K_NUM_AMPDU_STREAMS; i++) { |
ac109fd0 BC |
1819 | struct mwl8k_ampdu_stream *stream; |
1820 | stream = &priv->ampdu[i]; | |
1821 | if (stream->state == AMPDU_NO_STREAM) | |
1822 | continue; | |
1823 | if (!memcmp(stream->sta->addr, addr, ETH_ALEN) && | |
1824 | stream->tid == tid) | |
1825 | return stream; | |
1826 | } | |
1827 | return NULL; | |
1828 | } | |
1829 | ||
d0805c1c BC |
1830 | #define MWL8K_AMPDU_PACKET_THRESHOLD 64 |
1831 | static inline bool mwl8k_ampdu_allowed(struct ieee80211_sta *sta, u8 tid) | |
1832 | { | |
1833 | struct mwl8k_sta *sta_info = MWL8K_STA(sta); | |
1834 | struct tx_traffic_info *tx_stats; | |
1835 | ||
1836 | BUG_ON(tid >= MWL8K_MAX_TID); | |
1837 | tx_stats = &sta_info->tx_stats[tid]; | |
1838 | ||
1839 | return sta_info->is_ampdu_allowed && | |
1840 | tx_stats->pkts > MWL8K_AMPDU_PACKET_THRESHOLD; | |
1841 | } | |
1842 | ||
1843 | static inline void mwl8k_tx_count_packet(struct ieee80211_sta *sta, u8 tid) | |
1844 | { | |
1845 | struct mwl8k_sta *sta_info = MWL8K_STA(sta); | |
1846 | struct tx_traffic_info *tx_stats; | |
1847 | ||
1848 | BUG_ON(tid >= MWL8K_MAX_TID); | |
1849 | tx_stats = &sta_info->tx_stats[tid]; | |
1850 | ||
1851 | if (tx_stats->start_time == 0) | |
1852 | tx_stats->start_time = jiffies; | |
1853 | ||
1854 | /* reset the packet count after each second elapses. If the number of | |
1855 | * packets ever exceeds the ampdu_min_traffic threshold, we will allow | |
1856 | * an ampdu stream to be started. | |
1857 | */ | |
1858 | if (jiffies - tx_stats->start_time > HZ) { | |
1859 | tx_stats->pkts = 0; | |
1860 | tx_stats->start_time = 0; | |
1861 | } else | |
1862 | tx_stats->pkts++; | |
1863 | } | |
1864 | ||
7fb978b7 YAP |
1865 | /* The hardware ampdu queues start from 5. |
1866 | * txpriorities for ampdu queues are | |
1867 | * 5 6 7 0 1 2 3 4 ie., queue 5 is highest | |
1868 | * and queue 3 is lowest (queue 4 is reserved) | |
1869 | */ | |
1870 | #define BA_QUEUE 5 | |
1871 | ||
7bb45683 | 1872 | static void |
36323f81 TH |
1873 | mwl8k_txq_xmit(struct ieee80211_hw *hw, |
1874 | int index, | |
1875 | struct ieee80211_sta *sta, | |
1876 | struct sk_buff *skb) | |
a66098da LB |
1877 | { |
1878 | struct mwl8k_priv *priv = hw->priv; | |
1879 | struct ieee80211_tx_info *tx_info; | |
23b33906 | 1880 | struct mwl8k_vif *mwl8k_vif; |
a66098da LB |
1881 | struct ieee80211_hdr *wh; |
1882 | struct mwl8k_tx_queue *txq; | |
1883 | struct mwl8k_tx_desc *tx; | |
a66098da | 1884 | dma_addr_t dma; |
23b33906 LB |
1885 | u32 txstatus; |
1886 | u8 txdatarate; | |
1887 | u16 qos; | |
65f3ddcd NS |
1888 | int txpriority; |
1889 | u8 tid = 0; | |
1890 | struct mwl8k_ampdu_stream *stream = NULL; | |
1891 | bool start_ba_session = false; | |
3a769888 | 1892 | bool mgmtframe = false; |
a0e7c6cf | 1893 | struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)skb->data; |
e1f4d69b | 1894 | bool eapol_frame = false; |
a66098da | 1895 | |
23b33906 LB |
1896 | wh = (struct ieee80211_hdr *)skb->data; |
1897 | if (ieee80211_is_data_qos(wh->frame_control)) | |
1898 | qos = le16_to_cpu(*((__le16 *)ieee80211_get_qos_ctl(wh))); | |
1899 | else | |
1900 | qos = 0; | |
a66098da | 1901 | |
e1f4d69b NS |
1902 | if (skb->protocol == cpu_to_be16(ETH_P_PAE)) |
1903 | eapol_frame = true; | |
1904 | ||
3a769888 NS |
1905 | if (ieee80211_is_mgmt(wh->frame_control)) |
1906 | mgmtframe = true; | |
1907 | ||
d9a07d49 | 1908 | if (priv->ap_fw) |
ff776cec | 1909 | mwl8k_encapsulate_tx_frame(priv, skb); |
d9a07d49 | 1910 | else |
e4eefec7 | 1911 | mwl8k_add_dma_header(priv, skb, 0, 0); |
d9a07d49 | 1912 | |
23b33906 | 1913 | wh = &((struct mwl8k_dma_data *)skb->data)->wh; |
a66098da LB |
1914 | |
1915 | tx_info = IEEE80211_SKB_CB(skb); | |
1916 | mwl8k_vif = MWL8K_VIF(tx_info->control.vif); | |
a66098da LB |
1917 | |
1918 | if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) { | |
a66098da | 1919 | wh->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG); |
657232b6 LB |
1920 | wh->seq_ctrl |= cpu_to_le16(mwl8k_vif->seqno); |
1921 | mwl8k_vif->seqno += 0x10; | |
a66098da LB |
1922 | } |
1923 | ||
23b33906 LB |
1924 | /* Setup firmware control bit fields for each frame type. */ |
1925 | txstatus = 0; | |
1926 | txdatarate = 0; | |
1927 | if (ieee80211_is_mgmt(wh->frame_control) || | |
1928 | ieee80211_is_ctl(wh->frame_control)) { | |
1929 | txdatarate = 0; | |
e0493a8d | 1930 | qos |= MWL8K_QOS_QLEN_UNSPEC | MWL8K_QOS_EOSP; |
23b33906 LB |
1931 | } else if (ieee80211_is_data(wh->frame_control)) { |
1932 | txdatarate = 1; | |
1933 | if (is_multicast_ether_addr(wh->addr1)) | |
1934 | txstatus |= MWL8K_TXD_STATUS_MULTICAST_TX; | |
1935 | ||
e0493a8d | 1936 | qos &= ~MWL8K_QOS_ACK_POLICY_MASK; |
23b33906 | 1937 | if (tx_info->flags & IEEE80211_TX_CTL_AMPDU) |
e0493a8d | 1938 | qos |= MWL8K_QOS_ACK_POLICY_BLOCKACK; |
23b33906 | 1939 | else |
e0493a8d | 1940 | qos |= MWL8K_QOS_ACK_POLICY_NORMAL; |
23b33906 | 1941 | } |
a66098da | 1942 | |
a0e7c6cf NS |
1943 | /* Queue ADDBA request in the respective data queue. While setting up |
1944 | * the ampdu stream, mac80211 queues further packets for that | |
1945 | * particular ra/tid pair. However, packets piled up in the hardware | |
1946 | * for that ra/tid pair will still go out. ADDBA request and the | |
1947 | * related data packets going out from different queues asynchronously | |
1948 | * will cause a shift in the receiver window which might result in | |
1949 | * ampdu packets getting dropped at the receiver after the stream has | |
1950 | * been setup. | |
1951 | */ | |
1952 | if (unlikely(ieee80211_is_action(wh->frame_control) && | |
1953 | mgmt->u.action.category == WLAN_CATEGORY_BACK && | |
1954 | mgmt->u.action.u.addba_req.action_code == WLAN_ACTION_ADDBA_REQ && | |
1955 | priv->ap_fw)) { | |
1956 | u16 capab = le16_to_cpu(mgmt->u.action.u.addba_req.capab); | |
1957 | tid = (capab & IEEE80211_ADDBA_PARAM_TID_MASK) >> 2; | |
1958 | index = mwl8k_tid_queue_mapping(tid); | |
1959 | } | |
1960 | ||
65f3ddcd NS |
1961 | txpriority = index; |
1962 | ||
e1f4d69b NS |
1963 | if (priv->ap_fw && sta && sta->ht_cap.ht_supported && !eapol_frame && |
1964 | ieee80211_is_data_qos(wh->frame_control)) { | |
65f3ddcd | 1965 | tid = qos & 0xf; |
d0805c1c | 1966 | mwl8k_tx_count_packet(sta, tid); |
65f3ddcd NS |
1967 | spin_lock(&priv->stream_lock); |
1968 | stream = mwl8k_lookup_stream(hw, sta->addr, tid); | |
1969 | if (stream != NULL) { | |
1970 | if (stream->state == AMPDU_STREAM_ACTIVE) { | |
5f2a1494 | 1971 | WARN_ON(!(qos & MWL8K_QOS_ACK_POLICY_BLOCKACK)); |
7fb978b7 YAP |
1972 | txpriority = (BA_QUEUE + stream->idx) % |
1973 | TOTAL_HW_TX_QUEUES; | |
1974 | if (stream->idx <= 1) | |
1975 | index = stream->idx + | |
1976 | MWL8K_TX_WMM_QUEUES; | |
1977 | ||
65f3ddcd NS |
1978 | } else if (stream->state == AMPDU_STREAM_NEW) { |
1979 | /* We get here if the driver sends us packets | |
1980 | * after we've initiated a stream, but before | |
1981 | * our ampdu_action routine has been called | |
1982 | * with IEEE80211_AMPDU_TX_START to get the SSN | |
1983 | * for the ADDBA request. So this packet can | |
1984 | * go out with no risk of sequence number | |
1985 | * mismatch. No special handling is required. | |
1986 | */ | |
1987 | } else { | |
1988 | /* Drop packets that would go out after the | |
1989 | * ADDBA request was sent but before the ADDBA | |
1990 | * response is received. If we don't do this, | |
1991 | * the recipient would probably receive it | |
1992 | * after the ADDBA request with SSN 0. This | |
1993 | * will cause the recipient's BA receive window | |
1994 | * to shift, which would cause the subsequent | |
1995 | * packets in the BA stream to be discarded. | |
1996 | * mac80211 queues our packets for us in this | |
1997 | * case, so this is really just a safety check. | |
1998 | */ | |
1999 | wiphy_warn(hw->wiphy, | |
2000 | "Cannot send packet while ADDBA " | |
2001 | "dialog is underway.\n"); | |
2002 | spin_unlock(&priv->stream_lock); | |
2003 | dev_kfree_skb(skb); | |
2004 | return; | |
2005 | } | |
2006 | } else { | |
2007 | /* Defer calling mwl8k_start_stream so that the current | |
2008 | * skb can go out before the ADDBA request. This | |
2009 | * prevents sequence number mismatch at the recepient | |
2010 | * as described above. | |
2011 | */ | |
d0805c1c | 2012 | if (mwl8k_ampdu_allowed(sta, tid)) { |
17033543 NS |
2013 | stream = mwl8k_add_stream(hw, sta, tid); |
2014 | if (stream != NULL) | |
2015 | start_ba_session = true; | |
2016 | } | |
65f3ddcd NS |
2017 | } |
2018 | spin_unlock(&priv->stream_lock); | |
5f2a1494 YAP |
2019 | } else { |
2020 | qos &= ~MWL8K_QOS_ACK_POLICY_MASK; | |
2021 | qos |= MWL8K_QOS_ACK_POLICY_NORMAL; | |
65f3ddcd NS |
2022 | } |
2023 | ||
a66098da LB |
2024 | dma = pci_map_single(priv->pdev, skb->data, |
2025 | skb->len, PCI_DMA_TODEVICE); | |
2026 | ||
2027 | if (pci_dma_mapping_error(priv->pdev, dma)) { | |
c96c31e4 JP |
2028 | wiphy_debug(hw->wiphy, |
2029 | "failed to dma map skb, dropping TX frame.\n"); | |
65f3ddcd NS |
2030 | if (start_ba_session) { |
2031 | spin_lock(&priv->stream_lock); | |
2032 | mwl8k_remove_stream(hw, stream); | |
2033 | spin_unlock(&priv->stream_lock); | |
2034 | } | |
23b33906 | 2035 | dev_kfree_skb(skb); |
7bb45683 | 2036 | return; |
a66098da LB |
2037 | } |
2038 | ||
23b33906 | 2039 | spin_lock_bh(&priv->tx_lock); |
a66098da | 2040 | |
23b33906 | 2041 | txq = priv->txq + index; |
a66098da | 2042 | |
3a769888 NS |
2043 | /* Mgmt frames that go out frequently are probe |
2044 | * responses. Other mgmt frames got out relatively | |
2045 | * infrequently. Hence reserve 2 buffers so that | |
2046 | * other mgmt frames do not get dropped due to an | |
2047 | * already queued probe response in one of the | |
2048 | * reserved buffers. | |
2049 | */ | |
2050 | ||
2051 | if (txq->len >= MWL8K_TX_DESCS - 2) { | |
23677ce3 | 2052 | if (!mgmtframe || txq->len == MWL8K_TX_DESCS) { |
3a769888 NS |
2053 | if (start_ba_session) { |
2054 | spin_lock(&priv->stream_lock); | |
2055 | mwl8k_remove_stream(hw, stream); | |
2056 | spin_unlock(&priv->stream_lock); | |
2057 | } | |
2058 | spin_unlock_bh(&priv->tx_lock); | |
ff7aa96f NS |
2059 | pci_unmap_single(priv->pdev, dma, skb->len, |
2060 | PCI_DMA_TODEVICE); | |
3a769888 NS |
2061 | dev_kfree_skb(skb); |
2062 | return; | |
3a7dbc3b | 2063 | } |
65f3ddcd NS |
2064 | } |
2065 | ||
45eb400d LB |
2066 | BUG_ON(txq->skb[txq->tail] != NULL); |
2067 | txq->skb[txq->tail] = skb; | |
a66098da | 2068 | |
45eb400d | 2069 | tx = txq->txd + txq->tail; |
23b33906 | 2070 | tx->data_rate = txdatarate; |
65f3ddcd | 2071 | tx->tx_priority = txpriority; |
a66098da | 2072 | tx->qos_control = cpu_to_le16(qos); |
a66098da LB |
2073 | tx->pkt_phys_addr = cpu_to_le32(dma); |
2074 | tx->pkt_len = cpu_to_le16(skb->len); | |
23b33906 | 2075 | tx->rate_info = 0; |
36323f81 TH |
2076 | if (!priv->ap_fw && sta != NULL) |
2077 | tx->peer_id = MWL8K_STA(sta)->peer_id; | |
a680400e LB |
2078 | else |
2079 | tx->peer_id = 0; | |
566875db | 2080 | |
e1f4d69b | 2081 | if (priv->ap_fw && ieee80211_is_data(wh->frame_control) && !eapol_frame) |
566875db PN |
2082 | tx->timestamp = cpu_to_le32(ioread32(priv->regs + |
2083 | MWL8K_HW_TIMER_REGISTER)); | |
b8d9e572 NS |
2084 | else |
2085 | tx->timestamp = 0; | |
566875db | 2086 | |
a66098da | 2087 | wmb(); |
23b33906 LB |
2088 | tx->status = cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED | txstatus); |
2089 | ||
8ccbc3b8 | 2090 | txq->len++; |
a66098da | 2091 | priv->pending_tx_pkts++; |
a66098da | 2092 | |
45eb400d LB |
2093 | txq->tail++; |
2094 | if (txq->tail == MWL8K_TX_DESCS) | |
2095 | txq->tail = 0; | |
23b33906 | 2096 | |
23b33906 | 2097 | mwl8k_tx_start(priv); |
a66098da LB |
2098 | |
2099 | spin_unlock_bh(&priv->tx_lock); | |
65f3ddcd NS |
2100 | |
2101 | /* Initiate the ampdu session here */ | |
2102 | if (start_ba_session) { | |
2103 | spin_lock(&priv->stream_lock); | |
2104 | if (mwl8k_start_stream(hw, stream)) | |
2105 | mwl8k_remove_stream(hw, stream); | |
2106 | spin_unlock(&priv->stream_lock); | |
2107 | } | |
a66098da LB |
2108 | } |
2109 | ||
2110 | ||
618952a7 LB |
2111 | /* |
2112 | * Firmware access. | |
2113 | * | |
2114 | * We have the following requirements for issuing firmware commands: | |
2115 | * - Some commands require that the packet transmit path is idle when | |
2116 | * the command is issued. (For simplicity, we'll just quiesce the | |
2117 | * transmit path for every command.) | |
2118 | * - There are certain sequences of commands that need to be issued to | |
2119 | * the hardware sequentially, with no other intervening commands. | |
2120 | * | |
2121 | * This leads to an implementation of a "firmware lock" as a mutex that | |
2122 | * can be taken recursively, and which is taken by both the low-level | |
2123 | * command submission function (mwl8k_post_cmd) as well as any users of | |
2124 | * that function that require issuing of an atomic sequence of commands, | |
2125 | * and quiesces the transmit path whenever it's taken. | |
2126 | */ | |
2127 | static int mwl8k_fw_lock(struct ieee80211_hw *hw) | |
2128 | { | |
2129 | struct mwl8k_priv *priv = hw->priv; | |
2130 | ||
2131 | if (priv->fw_mutex_owner != current) { | |
2132 | int rc; | |
2133 | ||
2134 | mutex_lock(&priv->fw_mutex); | |
2135 | ieee80211_stop_queues(hw); | |
2136 | ||
2137 | rc = mwl8k_tx_wait_empty(hw); | |
2138 | if (rc) { | |
6b6accc3 YAP |
2139 | if (!priv->hw_restart_in_progress) |
2140 | ieee80211_wake_queues(hw); | |
2141 | ||
618952a7 LB |
2142 | mutex_unlock(&priv->fw_mutex); |
2143 | ||
2144 | return rc; | |
2145 | } | |
2146 | ||
2147 | priv->fw_mutex_owner = current; | |
2148 | } | |
2149 | ||
2150 | priv->fw_mutex_depth++; | |
2151 | ||
2152 | return 0; | |
2153 | } | |
2154 | ||
2155 | static void mwl8k_fw_unlock(struct ieee80211_hw *hw) | |
2156 | { | |
2157 | struct mwl8k_priv *priv = hw->priv; | |
2158 | ||
2159 | if (!--priv->fw_mutex_depth) { | |
6b6accc3 YAP |
2160 | if (!priv->hw_restart_in_progress) |
2161 | ieee80211_wake_queues(hw); | |
2162 | ||
618952a7 LB |
2163 | priv->fw_mutex_owner = NULL; |
2164 | mutex_unlock(&priv->fw_mutex); | |
2165 | } | |
2166 | } | |
2167 | ||
e882efc9 YAP |
2168 | static void mwl8k_enable_bsses(struct ieee80211_hw *hw, bool enable, |
2169 | u32 bitmap); | |
618952a7 | 2170 | |
a66098da LB |
2171 | /* |
2172 | * Command processing. | |
2173 | */ | |
2174 | ||
0c9cc640 LB |
2175 | /* Timeout firmware commands after 10s */ |
2176 | #define MWL8K_CMD_TIMEOUT_MS 10000 | |
a66098da LB |
2177 | |
2178 | static int mwl8k_post_cmd(struct ieee80211_hw *hw, struct mwl8k_cmd_pkt *cmd) | |
2179 | { | |
2180 | DECLARE_COMPLETION_ONSTACK(cmd_wait); | |
2181 | struct mwl8k_priv *priv = hw->priv; | |
2182 | void __iomem *regs = priv->regs; | |
2183 | dma_addr_t dma_addr; | |
2184 | unsigned int dma_size; | |
2185 | int rc; | |
a66098da LB |
2186 | unsigned long timeout = 0; |
2187 | u8 buf[32]; | |
e882efc9 YAP |
2188 | u32 bitmap = 0; |
2189 | ||
2190 | wiphy_dbg(hw->wiphy, "Posting %s [%d]\n", | |
2191 | mwl8k_cmd_name(cmd->code, buf, sizeof(buf)), cmd->macid); | |
2192 | ||
2193 | /* Before posting firmware commands that could change the hardware | |
2194 | * characteristics, make sure that all BSSes are stopped temporary. | |
2195 | * Enable these stopped BSSes after completion of the commands | |
2196 | */ | |
2197 | ||
2198 | rc = mwl8k_fw_lock(hw); | |
2199 | if (rc) | |
2200 | return rc; | |
2201 | ||
2202 | if (priv->ap_fw && priv->running_bsses) { | |
2203 | switch (le16_to_cpu(cmd->code)) { | |
2204 | case MWL8K_CMD_SET_RF_CHANNEL: | |
2205 | case MWL8K_CMD_RADIO_CONTROL: | |
2206 | case MWL8K_CMD_RF_TX_POWER: | |
2207 | case MWL8K_CMD_TX_POWER: | |
2208 | case MWL8K_CMD_RF_ANTENNA: | |
2209 | case MWL8K_CMD_RTS_THRESHOLD: | |
2210 | case MWL8K_CMD_MIMO_CONFIG: | |
2211 | bitmap = priv->running_bsses; | |
2212 | mwl8k_enable_bsses(hw, false, bitmap); | |
2213 | break; | |
2214 | } | |
2215 | } | |
a66098da | 2216 | |
b603742f | 2217 | cmd->result = (__force __le16) 0xffff; |
a66098da LB |
2218 | dma_size = le16_to_cpu(cmd->length); |
2219 | dma_addr = pci_map_single(priv->pdev, cmd, dma_size, | |
2220 | PCI_DMA_BIDIRECTIONAL); | |
2221 | if (pci_dma_mapping_error(priv->pdev, dma_addr)) | |
2222 | return -ENOMEM; | |
2223 | ||
a66098da LB |
2224 | priv->hostcmd_wait = &cmd_wait; |
2225 | iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR); | |
2226 | iowrite32(MWL8K_H2A_INT_DOORBELL, | |
2227 | regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS); | |
2228 | iowrite32(MWL8K_H2A_INT_DUMMY, | |
2229 | regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS); | |
a66098da LB |
2230 | |
2231 | timeout = wait_for_completion_timeout(&cmd_wait, | |
2232 | msecs_to_jiffies(MWL8K_CMD_TIMEOUT_MS)); | |
2233 | ||
618952a7 LB |
2234 | priv->hostcmd_wait = NULL; |
2235 | ||
618952a7 | 2236 | |
37055bd4 LB |
2237 | pci_unmap_single(priv->pdev, dma_addr, dma_size, |
2238 | PCI_DMA_BIDIRECTIONAL); | |
2239 | ||
a66098da | 2240 | if (!timeout) { |
5db55844 | 2241 | wiphy_err(hw->wiphy, "Command %s timeout after %u ms\n", |
c96c31e4 JP |
2242 | mwl8k_cmd_name(cmd->code, buf, sizeof(buf)), |
2243 | MWL8K_CMD_TIMEOUT_MS); | |
a66098da LB |
2244 | rc = -ETIMEDOUT; |
2245 | } else { | |
0c9cc640 LB |
2246 | int ms; |
2247 | ||
2248 | ms = MWL8K_CMD_TIMEOUT_MS - jiffies_to_msecs(timeout); | |
2249 | ||
ce9e2e1b | 2250 | rc = cmd->result ? -EINVAL : 0; |
a66098da | 2251 | if (rc) |
5db55844 | 2252 | wiphy_err(hw->wiphy, "Command %s error 0x%x\n", |
c96c31e4 JP |
2253 | mwl8k_cmd_name(cmd->code, buf, sizeof(buf)), |
2254 | le16_to_cpu(cmd->result)); | |
0c9cc640 | 2255 | else if (ms > 2000) |
5db55844 | 2256 | wiphy_notice(hw->wiphy, "Command %s took %d ms\n", |
c96c31e4 JP |
2257 | mwl8k_cmd_name(cmd->code, |
2258 | buf, sizeof(buf)), | |
2259 | ms); | |
a66098da LB |
2260 | } |
2261 | ||
e882efc9 YAP |
2262 | if (bitmap) |
2263 | mwl8k_enable_bsses(hw, true, bitmap); | |
2264 | ||
2265 | mwl8k_fw_unlock(hw); | |
2266 | ||
a66098da LB |
2267 | return rc; |
2268 | } | |
2269 | ||
f57ca9c1 LB |
2270 | static int mwl8k_post_pervif_cmd(struct ieee80211_hw *hw, |
2271 | struct ieee80211_vif *vif, | |
2272 | struct mwl8k_cmd_pkt *cmd) | |
2273 | { | |
2274 | if (vif != NULL) | |
2275 | cmd->macid = MWL8K_VIF(vif)->macid; | |
2276 | return mwl8k_post_cmd(hw, cmd); | |
2277 | } | |
2278 | ||
1349ad2f LB |
2279 | /* |
2280 | * Setup code shared between STA and AP firmware images. | |
2281 | */ | |
2282 | static void mwl8k_setup_2ghz_band(struct ieee80211_hw *hw) | |
2283 | { | |
2284 | struct mwl8k_priv *priv = hw->priv; | |
2285 | ||
2286 | BUILD_BUG_ON(sizeof(priv->channels_24) != sizeof(mwl8k_channels_24)); | |
2287 | memcpy(priv->channels_24, mwl8k_channels_24, sizeof(mwl8k_channels_24)); | |
2288 | ||
2289 | BUILD_BUG_ON(sizeof(priv->rates_24) != sizeof(mwl8k_rates_24)); | |
2290 | memcpy(priv->rates_24, mwl8k_rates_24, sizeof(mwl8k_rates_24)); | |
2291 | ||
2292 | priv->band_24.band = IEEE80211_BAND_2GHZ; | |
2293 | priv->band_24.channels = priv->channels_24; | |
2294 | priv->band_24.n_channels = ARRAY_SIZE(mwl8k_channels_24); | |
2295 | priv->band_24.bitrates = priv->rates_24; | |
2296 | priv->band_24.n_bitrates = ARRAY_SIZE(mwl8k_rates_24); | |
2297 | ||
2298 | hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band_24; | |
2299 | } | |
2300 | ||
4eae9edd LB |
2301 | static void mwl8k_setup_5ghz_band(struct ieee80211_hw *hw) |
2302 | { | |
2303 | struct mwl8k_priv *priv = hw->priv; | |
2304 | ||
2305 | BUILD_BUG_ON(sizeof(priv->channels_50) != sizeof(mwl8k_channels_50)); | |
2306 | memcpy(priv->channels_50, mwl8k_channels_50, sizeof(mwl8k_channels_50)); | |
2307 | ||
2308 | BUILD_BUG_ON(sizeof(priv->rates_50) != sizeof(mwl8k_rates_50)); | |
2309 | memcpy(priv->rates_50, mwl8k_rates_50, sizeof(mwl8k_rates_50)); | |
2310 | ||
2311 | priv->band_50.band = IEEE80211_BAND_5GHZ; | |
2312 | priv->band_50.channels = priv->channels_50; | |
2313 | priv->band_50.n_channels = ARRAY_SIZE(mwl8k_channels_50); | |
2314 | priv->band_50.bitrates = priv->rates_50; | |
2315 | priv->band_50.n_bitrates = ARRAY_SIZE(mwl8k_rates_50); | |
2316 | ||
2317 | hw->wiphy->bands[IEEE80211_BAND_5GHZ] = &priv->band_50; | |
2318 | } | |
2319 | ||
a66098da | 2320 | /* |
04b147b1 | 2321 | * CMD_GET_HW_SPEC (STA version). |
a66098da | 2322 | */ |
04b147b1 | 2323 | struct mwl8k_cmd_get_hw_spec_sta { |
a66098da LB |
2324 | struct mwl8k_cmd_pkt header; |
2325 | __u8 hw_rev; | |
2326 | __u8 host_interface; | |
2327 | __le16 num_mcaddrs; | |
d89173f2 | 2328 | __u8 perm_addr[ETH_ALEN]; |
a66098da LB |
2329 | __le16 region_code; |
2330 | __le32 fw_rev; | |
2331 | __le32 ps_cookie; | |
2332 | __le32 caps; | |
2333 | __u8 mcs_bitmap[16]; | |
2334 | __le32 rx_queue_ptr; | |
2335 | __le32 num_tx_queues; | |
e600707b | 2336 | __le32 tx_queue_ptrs[MWL8K_TX_WMM_QUEUES]; |
a66098da LB |
2337 | __le32 caps2; |
2338 | __le32 num_tx_desc_per_queue; | |
45eb400d | 2339 | __le32 total_rxd; |
ba2d3587 | 2340 | } __packed; |
a66098da | 2341 | |
341c9791 LB |
2342 | #define MWL8K_CAP_MAX_AMSDU 0x20000000 |
2343 | #define MWL8K_CAP_GREENFIELD 0x08000000 | |
2344 | #define MWL8K_CAP_AMPDU 0x04000000 | |
2345 | #define MWL8K_CAP_RX_STBC 0x01000000 | |
2346 | #define MWL8K_CAP_TX_STBC 0x00800000 | |
2347 | #define MWL8K_CAP_SHORTGI_40MHZ 0x00400000 | |
2348 | #define MWL8K_CAP_SHORTGI_20MHZ 0x00200000 | |
2349 | #define MWL8K_CAP_RX_ANTENNA_MASK 0x000e0000 | |
2350 | #define MWL8K_CAP_TX_ANTENNA_MASK 0x0001c000 | |
2351 | #define MWL8K_CAP_DELAY_BA 0x00003000 | |
2352 | #define MWL8K_CAP_MIMO 0x00000200 | |
2353 | #define MWL8K_CAP_40MHZ 0x00000100 | |
06953235 LB |
2354 | #define MWL8K_CAP_BAND_MASK 0x00000007 |
2355 | #define MWL8K_CAP_5GHZ 0x00000004 | |
2356 | #define MWL8K_CAP_2GHZ4 0x00000001 | |
341c9791 | 2357 | |
06953235 LB |
2358 | static void |
2359 | mwl8k_set_ht_caps(struct ieee80211_hw *hw, | |
2360 | struct ieee80211_supported_band *band, u32 cap) | |
341c9791 | 2361 | { |
341c9791 LB |
2362 | int rx_streams; |
2363 | int tx_streams; | |
2364 | ||
777ad375 | 2365 | band->ht_cap.ht_supported = 1; |
341c9791 LB |
2366 | |
2367 | if (cap & MWL8K_CAP_MAX_AMSDU) | |
777ad375 | 2368 | band->ht_cap.cap |= IEEE80211_HT_CAP_MAX_AMSDU; |
341c9791 | 2369 | if (cap & MWL8K_CAP_GREENFIELD) |
777ad375 | 2370 | band->ht_cap.cap |= IEEE80211_HT_CAP_GRN_FLD; |
341c9791 LB |
2371 | if (cap & MWL8K_CAP_AMPDU) { |
2372 | hw->flags |= IEEE80211_HW_AMPDU_AGGREGATION; | |
777ad375 LB |
2373 | band->ht_cap.ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K; |
2374 | band->ht_cap.ampdu_density = IEEE80211_HT_MPDU_DENSITY_NONE; | |
341c9791 LB |
2375 | } |
2376 | if (cap & MWL8K_CAP_RX_STBC) | |
777ad375 | 2377 | band->ht_cap.cap |= IEEE80211_HT_CAP_RX_STBC; |
341c9791 | 2378 | if (cap & MWL8K_CAP_TX_STBC) |
777ad375 | 2379 | band->ht_cap.cap |= IEEE80211_HT_CAP_TX_STBC; |
341c9791 | 2380 | if (cap & MWL8K_CAP_SHORTGI_40MHZ) |
777ad375 | 2381 | band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_40; |
341c9791 | 2382 | if (cap & MWL8K_CAP_SHORTGI_20MHZ) |
777ad375 | 2383 | band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_20; |
341c9791 | 2384 | if (cap & MWL8K_CAP_DELAY_BA) |
777ad375 | 2385 | band->ht_cap.cap |= IEEE80211_HT_CAP_DELAY_BA; |
341c9791 | 2386 | if (cap & MWL8K_CAP_40MHZ) |
777ad375 | 2387 | band->ht_cap.cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40; |
341c9791 LB |
2388 | |
2389 | rx_streams = hweight32(cap & MWL8K_CAP_RX_ANTENNA_MASK); | |
2390 | tx_streams = hweight32(cap & MWL8K_CAP_TX_ANTENNA_MASK); | |
2391 | ||
777ad375 | 2392 | band->ht_cap.mcs.rx_mask[0] = 0xff; |
341c9791 | 2393 | if (rx_streams >= 2) |
777ad375 | 2394 | band->ht_cap.mcs.rx_mask[1] = 0xff; |
341c9791 | 2395 | if (rx_streams >= 3) |
777ad375 LB |
2396 | band->ht_cap.mcs.rx_mask[2] = 0xff; |
2397 | band->ht_cap.mcs.rx_mask[4] = 0x01; | |
2398 | band->ht_cap.mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED; | |
341c9791 LB |
2399 | |
2400 | if (rx_streams != tx_streams) { | |
777ad375 LB |
2401 | band->ht_cap.mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF; |
2402 | band->ht_cap.mcs.tx_params |= (tx_streams - 1) << | |
341c9791 LB |
2403 | IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT; |
2404 | } | |
2405 | } | |
2406 | ||
06953235 LB |
2407 | static void |
2408 | mwl8k_set_caps(struct ieee80211_hw *hw, u32 caps) | |
2409 | { | |
2410 | struct mwl8k_priv *priv = hw->priv; | |
2411 | ||
c3f251a3 JG |
2412 | if (priv->caps) |
2413 | return; | |
2414 | ||
06953235 LB |
2415 | if ((caps & MWL8K_CAP_2GHZ4) || !(caps & MWL8K_CAP_BAND_MASK)) { |
2416 | mwl8k_setup_2ghz_band(hw); | |
2417 | if (caps & MWL8K_CAP_MIMO) | |
2418 | mwl8k_set_ht_caps(hw, &priv->band_24, caps); | |
2419 | } | |
2420 | ||
2421 | if (caps & MWL8K_CAP_5GHZ) { | |
2422 | mwl8k_setup_5ghz_band(hw); | |
2423 | if (caps & MWL8K_CAP_MIMO) | |
2424 | mwl8k_set_ht_caps(hw, &priv->band_50, caps); | |
2425 | } | |
c3f251a3 JG |
2426 | |
2427 | priv->caps = caps; | |
06953235 LB |
2428 | } |
2429 | ||
04b147b1 | 2430 | static int mwl8k_cmd_get_hw_spec_sta(struct ieee80211_hw *hw) |
a66098da LB |
2431 | { |
2432 | struct mwl8k_priv *priv = hw->priv; | |
04b147b1 | 2433 | struct mwl8k_cmd_get_hw_spec_sta *cmd; |
a66098da LB |
2434 | int rc; |
2435 | int i; | |
2436 | ||
2437 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2438 | if (cmd == NULL) | |
2439 | return -ENOMEM; | |
2440 | ||
2441 | cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC); | |
2442 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
2443 | ||
2444 | memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr)); | |
2445 | cmd->ps_cookie = cpu_to_le32(priv->cookie_dma); | |
45eb400d | 2446 | cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma); |
e600707b BC |
2447 | cmd->num_tx_queues = cpu_to_le32(mwl8k_tx_queues(priv)); |
2448 | for (i = 0; i < mwl8k_tx_queues(priv); i++) | |
45eb400d | 2449 | cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma); |
4ff6432e | 2450 | cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS); |
45eb400d | 2451 | cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS); |
a66098da LB |
2452 | |
2453 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2454 | ||
2455 | if (!rc) { | |
2456 | SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr); | |
2457 | priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs); | |
4ff6432e | 2458 | priv->fw_rev = le32_to_cpu(cmd->fw_rev); |
a66098da | 2459 | priv->hw_rev = cmd->hw_rev; |
06953235 | 2460 | mwl8k_set_caps(hw, le32_to_cpu(cmd->caps)); |
ee0ddf18 LB |
2461 | priv->ap_macids_supported = 0x00000000; |
2462 | priv->sta_macids_supported = 0x00000001; | |
a66098da LB |
2463 | } |
2464 | ||
2465 | kfree(cmd); | |
2466 | return rc; | |
2467 | } | |
2468 | ||
42fba21d LB |
2469 | /* |
2470 | * CMD_GET_HW_SPEC (AP version). | |
2471 | */ | |
2472 | struct mwl8k_cmd_get_hw_spec_ap { | |
2473 | struct mwl8k_cmd_pkt header; | |
2474 | __u8 hw_rev; | |
2475 | __u8 host_interface; | |
2476 | __le16 num_wcb; | |
2477 | __le16 num_mcaddrs; | |
2478 | __u8 perm_addr[ETH_ALEN]; | |
2479 | __le16 region_code; | |
2480 | __le16 num_antenna; | |
2481 | __le32 fw_rev; | |
2482 | __le32 wcbbase0; | |
2483 | __le32 rxwrptr; | |
2484 | __le32 rxrdptr; | |
2485 | __le32 ps_cookie; | |
2486 | __le32 wcbbase1; | |
2487 | __le32 wcbbase2; | |
2488 | __le32 wcbbase3; | |
952a0e96 | 2489 | __le32 fw_api_version; |
8a7a578c BC |
2490 | __le32 caps; |
2491 | __le32 num_of_ampdu_queues; | |
2492 | __le32 wcbbase_ampdu[MWL8K_MAX_AMPDU_QUEUES]; | |
ba2d3587 | 2493 | } __packed; |
42fba21d LB |
2494 | |
2495 | static int mwl8k_cmd_get_hw_spec_ap(struct ieee80211_hw *hw) | |
2496 | { | |
2497 | struct mwl8k_priv *priv = hw->priv; | |
2498 | struct mwl8k_cmd_get_hw_spec_ap *cmd; | |
8a7a578c | 2499 | int rc, i; |
952a0e96 | 2500 | u32 api_version; |
42fba21d LB |
2501 | |
2502 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2503 | if (cmd == NULL) | |
2504 | return -ENOMEM; | |
2505 | ||
2506 | cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC); | |
2507 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
2508 | ||
2509 | memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr)); | |
2510 | cmd->ps_cookie = cpu_to_le32(priv->cookie_dma); | |
2511 | ||
2512 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2513 | ||
2514 | if (!rc) { | |
2515 | int off; | |
2516 | ||
952a0e96 BC |
2517 | api_version = le32_to_cpu(cmd->fw_api_version); |
2518 | if (priv->device_info->fw_api_ap != api_version) { | |
2519 | printk(KERN_ERR "%s: Unsupported fw API version for %s." | |
2520 | " Expected %d got %d.\n", MWL8K_NAME, | |
2521 | priv->device_info->part_name, | |
2522 | priv->device_info->fw_api_ap, | |
2523 | api_version); | |
2524 | rc = -EINVAL; | |
2525 | goto done; | |
2526 | } | |
42fba21d LB |
2527 | SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr); |
2528 | priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs); | |
2529 | priv->fw_rev = le32_to_cpu(cmd->fw_rev); | |
2530 | priv->hw_rev = cmd->hw_rev; | |
8a7a578c | 2531 | mwl8k_set_caps(hw, le32_to_cpu(cmd->caps)); |
ee0ddf18 | 2532 | priv->ap_macids_supported = 0x000000ff; |
d59c1cfd | 2533 | priv->sta_macids_supported = 0x00000100; |
8a7a578c BC |
2534 | priv->num_ampdu_queues = le32_to_cpu(cmd->num_of_ampdu_queues); |
2535 | if (priv->num_ampdu_queues > MWL8K_MAX_AMPDU_QUEUES) { | |
2536 | wiphy_warn(hw->wiphy, "fw reported %d ampdu queues" | |
2537 | " but we only support %d.\n", | |
2538 | priv->num_ampdu_queues, | |
2539 | MWL8K_MAX_AMPDU_QUEUES); | |
2540 | priv->num_ampdu_queues = MWL8K_MAX_AMPDU_QUEUES; | |
2541 | } | |
42fba21d | 2542 | off = le32_to_cpu(cmd->rxwrptr) & 0xffff; |
b603742f | 2543 | iowrite32(priv->rxq[0].rxd_dma, priv->sram + off); |
42fba21d LB |
2544 | |
2545 | off = le32_to_cpu(cmd->rxrdptr) & 0xffff; | |
b603742f | 2546 | iowrite32(priv->rxq[0].rxd_dma, priv->sram + off); |
42fba21d | 2547 | |
73b46320 BC |
2548 | priv->txq_offset[0] = le32_to_cpu(cmd->wcbbase0) & 0xffff; |
2549 | priv->txq_offset[1] = le32_to_cpu(cmd->wcbbase1) & 0xffff; | |
2550 | priv->txq_offset[2] = le32_to_cpu(cmd->wcbbase2) & 0xffff; | |
2551 | priv->txq_offset[3] = le32_to_cpu(cmd->wcbbase3) & 0xffff; | |
8a7a578c BC |
2552 | |
2553 | for (i = 0; i < priv->num_ampdu_queues; i++) | |
e600707b | 2554 | priv->txq_offset[i + MWL8K_TX_WMM_QUEUES] = |
8a7a578c | 2555 | le32_to_cpu(cmd->wcbbase_ampdu[i]) & 0xffff; |
42fba21d LB |
2556 | } |
2557 | ||
952a0e96 | 2558 | done: |
42fba21d LB |
2559 | kfree(cmd); |
2560 | return rc; | |
2561 | } | |
2562 | ||
2563 | /* | |
2564 | * CMD_SET_HW_SPEC. | |
2565 | */ | |
2566 | struct mwl8k_cmd_set_hw_spec { | |
2567 | struct mwl8k_cmd_pkt header; | |
2568 | __u8 hw_rev; | |
2569 | __u8 host_interface; | |
2570 | __le16 num_mcaddrs; | |
2571 | __u8 perm_addr[ETH_ALEN]; | |
2572 | __le16 region_code; | |
2573 | __le32 fw_rev; | |
2574 | __le32 ps_cookie; | |
2575 | __le32 caps; | |
2576 | __le32 rx_queue_ptr; | |
2577 | __le32 num_tx_queues; | |
e600707b | 2578 | __le32 tx_queue_ptrs[MWL8K_MAX_TX_QUEUES]; |
42fba21d LB |
2579 | __le32 flags; |
2580 | __le32 num_tx_desc_per_queue; | |
2581 | __le32 total_rxd; | |
ba2d3587 | 2582 | } __packed; |
42fba21d | 2583 | |
8a7a578c BC |
2584 | /* If enabled, MWL8K_SET_HW_SPEC_FLAG_ENABLE_LIFE_TIME_EXPIRY will cause |
2585 | * packets to expire 500 ms after the timestamp in the tx descriptor. That is, | |
2586 | * the packets that are queued for more than 500ms, will be dropped in the | |
2587 | * hardware. This helps minimizing the issues caused due to head-of-line | |
2588 | * blocking where a slow client can hog the bandwidth and affect traffic to a | |
2589 | * faster client. | |
2590 | */ | |
2591 | #define MWL8K_SET_HW_SPEC_FLAG_ENABLE_LIFE_TIME_EXPIRY 0x00000400 | |
3373b28e | 2592 | #define MWL8K_SET_HW_SPEC_FLAG_GENERATE_CCMP_HDR 0x00000200 |
b64fe619 LB |
2593 | #define MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT 0x00000080 |
2594 | #define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP 0x00000020 | |
2595 | #define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON 0x00000010 | |
42fba21d LB |
2596 | |
2597 | static int mwl8k_cmd_set_hw_spec(struct ieee80211_hw *hw) | |
2598 | { | |
2599 | struct mwl8k_priv *priv = hw->priv; | |
2600 | struct mwl8k_cmd_set_hw_spec *cmd; | |
2601 | int rc; | |
2602 | int i; | |
2603 | ||
2604 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2605 | if (cmd == NULL) | |
2606 | return -ENOMEM; | |
2607 | ||
2608 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_HW_SPEC); | |
2609 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
2610 | ||
2611 | cmd->ps_cookie = cpu_to_le32(priv->cookie_dma); | |
2612 | cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma); | |
e600707b | 2613 | cmd->num_tx_queues = cpu_to_le32(mwl8k_tx_queues(priv)); |
85c9205c NS |
2614 | |
2615 | /* | |
2616 | * Mac80211 stack has Q0 as highest priority and Q3 as lowest in | |
2617 | * that order. Firmware has Q3 as highest priority and Q0 as lowest | |
2618 | * in that order. Map Q3 of mac80211 to Q0 of firmware so that the | |
2619 | * priority is interpreted the right way in firmware. | |
2620 | */ | |
e600707b BC |
2621 | for (i = 0; i < mwl8k_tx_queues(priv); i++) { |
2622 | int j = mwl8k_tx_queues(priv) - 1 - i; | |
85c9205c NS |
2623 | cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[j].txd_dma); |
2624 | } | |
2625 | ||
b64fe619 LB |
2626 | cmd->flags = cpu_to_le32(MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT | |
2627 | MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP | | |
31d291a7 | 2628 | MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON | |
3373b28e NS |
2629 | MWL8K_SET_HW_SPEC_FLAG_ENABLE_LIFE_TIME_EXPIRY | |
2630 | MWL8K_SET_HW_SPEC_FLAG_GENERATE_CCMP_HDR); | |
42fba21d LB |
2631 | cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS); |
2632 | cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS); | |
2633 | ||
2634 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2635 | kfree(cmd); | |
2636 | ||
2637 | return rc; | |
2638 | } | |
2639 | ||
a66098da LB |
2640 | /* |
2641 | * CMD_MAC_MULTICAST_ADR. | |
2642 | */ | |
2643 | struct mwl8k_cmd_mac_multicast_adr { | |
2644 | struct mwl8k_cmd_pkt header; | |
2645 | __le16 action; | |
2646 | __le16 numaddr; | |
ce9e2e1b | 2647 | __u8 addr[0][ETH_ALEN]; |
a66098da LB |
2648 | }; |
2649 | ||
d5e30845 LB |
2650 | #define MWL8K_ENABLE_RX_DIRECTED 0x0001 |
2651 | #define MWL8K_ENABLE_RX_MULTICAST 0x0002 | |
2652 | #define MWL8K_ENABLE_RX_ALL_MULTICAST 0x0004 | |
2653 | #define MWL8K_ENABLE_RX_BROADCAST 0x0008 | |
ce9e2e1b | 2654 | |
e81cd2d6 | 2655 | static struct mwl8k_cmd_pkt * |
447ced07 | 2656 | __mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw *hw, int allmulti, |
22bedad3 | 2657 | struct netdev_hw_addr_list *mc_list) |
a66098da | 2658 | { |
e81cd2d6 | 2659 | struct mwl8k_priv *priv = hw->priv; |
a66098da | 2660 | struct mwl8k_cmd_mac_multicast_adr *cmd; |
e81cd2d6 | 2661 | int size; |
22bedad3 JP |
2662 | int mc_count = 0; |
2663 | ||
2664 | if (mc_list) | |
2665 | mc_count = netdev_hw_addr_list_count(mc_list); | |
e81cd2d6 | 2666 | |
447ced07 | 2667 | if (allmulti || mc_count > priv->num_mcaddrs) { |
d5e30845 LB |
2668 | allmulti = 1; |
2669 | mc_count = 0; | |
2670 | } | |
e81cd2d6 LB |
2671 | |
2672 | size = sizeof(*cmd) + mc_count * ETH_ALEN; | |
ce9e2e1b | 2673 | |
e81cd2d6 | 2674 | cmd = kzalloc(size, GFP_ATOMIC); |
a66098da | 2675 | if (cmd == NULL) |
e81cd2d6 | 2676 | return NULL; |
a66098da LB |
2677 | |
2678 | cmd->header.code = cpu_to_le16(MWL8K_CMD_MAC_MULTICAST_ADR); | |
2679 | cmd->header.length = cpu_to_le16(size); | |
d5e30845 LB |
2680 | cmd->action = cpu_to_le16(MWL8K_ENABLE_RX_DIRECTED | |
2681 | MWL8K_ENABLE_RX_BROADCAST); | |
2682 | ||
2683 | if (allmulti) { | |
2684 | cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_ALL_MULTICAST); | |
2685 | } else if (mc_count) { | |
22bedad3 JP |
2686 | struct netdev_hw_addr *ha; |
2687 | int i = 0; | |
d5e30845 LB |
2688 | |
2689 | cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_MULTICAST); | |
2690 | cmd->numaddr = cpu_to_le16(mc_count); | |
22bedad3 JP |
2691 | netdev_hw_addr_list_for_each(ha, mc_list) { |
2692 | memcpy(cmd->addr[i], ha->addr, ETH_ALEN); | |
a66098da | 2693 | } |
a66098da LB |
2694 | } |
2695 | ||
e81cd2d6 | 2696 | return &cmd->header; |
a66098da LB |
2697 | } |
2698 | ||
2699 | /* | |
55489b6e | 2700 | * CMD_GET_STAT. |
a66098da | 2701 | */ |
55489b6e | 2702 | struct mwl8k_cmd_get_stat { |
a66098da | 2703 | struct mwl8k_cmd_pkt header; |
a66098da | 2704 | __le32 stats[64]; |
ba2d3587 | 2705 | } __packed; |
a66098da LB |
2706 | |
2707 | #define MWL8K_STAT_ACK_FAILURE 9 | |
2708 | #define MWL8K_STAT_RTS_FAILURE 12 | |
2709 | #define MWL8K_STAT_FCS_ERROR 24 | |
2710 | #define MWL8K_STAT_RTS_SUCCESS 11 | |
2711 | ||
55489b6e LB |
2712 | static int mwl8k_cmd_get_stat(struct ieee80211_hw *hw, |
2713 | struct ieee80211_low_level_stats *stats) | |
a66098da | 2714 | { |
55489b6e | 2715 | struct mwl8k_cmd_get_stat *cmd; |
a66098da LB |
2716 | int rc; |
2717 | ||
2718 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2719 | if (cmd == NULL) | |
2720 | return -ENOMEM; | |
2721 | ||
2722 | cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_STAT); | |
2723 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
a66098da LB |
2724 | |
2725 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2726 | if (!rc) { | |
2727 | stats->dot11ACKFailureCount = | |
2728 | le32_to_cpu(cmd->stats[MWL8K_STAT_ACK_FAILURE]); | |
2729 | stats->dot11RTSFailureCount = | |
2730 | le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_FAILURE]); | |
2731 | stats->dot11FCSErrorCount = | |
2732 | le32_to_cpu(cmd->stats[MWL8K_STAT_FCS_ERROR]); | |
2733 | stats->dot11RTSSuccessCount = | |
2734 | le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_SUCCESS]); | |
2735 | } | |
2736 | kfree(cmd); | |
2737 | ||
2738 | return rc; | |
2739 | } | |
2740 | ||
2741 | /* | |
55489b6e | 2742 | * CMD_RADIO_CONTROL. |
a66098da | 2743 | */ |
55489b6e | 2744 | struct mwl8k_cmd_radio_control { |
a66098da LB |
2745 | struct mwl8k_cmd_pkt header; |
2746 | __le16 action; | |
2747 | __le16 control; | |
2748 | __le16 radio_on; | |
ba2d3587 | 2749 | } __packed; |
a66098da | 2750 | |
c46563b7 | 2751 | static int |
55489b6e | 2752 | mwl8k_cmd_radio_control(struct ieee80211_hw *hw, bool enable, bool force) |
a66098da LB |
2753 | { |
2754 | struct mwl8k_priv *priv = hw->priv; | |
55489b6e | 2755 | struct mwl8k_cmd_radio_control *cmd; |
a66098da LB |
2756 | int rc; |
2757 | ||
c46563b7 | 2758 | if (enable == priv->radio_on && !force) |
a66098da LB |
2759 | return 0; |
2760 | ||
a66098da LB |
2761 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); |
2762 | if (cmd == NULL) | |
2763 | return -ENOMEM; | |
2764 | ||
2765 | cmd->header.code = cpu_to_le16(MWL8K_CMD_RADIO_CONTROL); | |
2766 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
2767 | cmd->action = cpu_to_le16(MWL8K_CMD_SET); | |
68ce3884 | 2768 | cmd->control = cpu_to_le16(priv->radio_short_preamble ? 3 : 1); |
a66098da LB |
2769 | cmd->radio_on = cpu_to_le16(enable ? 0x0001 : 0x0000); |
2770 | ||
2771 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2772 | kfree(cmd); | |
2773 | ||
2774 | if (!rc) | |
c46563b7 | 2775 | priv->radio_on = enable; |
a66098da LB |
2776 | |
2777 | return rc; | |
2778 | } | |
2779 | ||
55489b6e | 2780 | static int mwl8k_cmd_radio_disable(struct ieee80211_hw *hw) |
c46563b7 | 2781 | { |
55489b6e | 2782 | return mwl8k_cmd_radio_control(hw, 0, 0); |
c46563b7 LB |
2783 | } |
2784 | ||
55489b6e | 2785 | static int mwl8k_cmd_radio_enable(struct ieee80211_hw *hw) |
c46563b7 | 2786 | { |
55489b6e | 2787 | return mwl8k_cmd_radio_control(hw, 1, 0); |
c46563b7 LB |
2788 | } |
2789 | ||
a66098da LB |
2790 | static int |
2791 | mwl8k_set_radio_preamble(struct ieee80211_hw *hw, bool short_preamble) | |
2792 | { | |
99200a99 | 2793 | struct mwl8k_priv *priv = hw->priv; |
a66098da | 2794 | |
68ce3884 | 2795 | priv->radio_short_preamble = short_preamble; |
a66098da | 2796 | |
55489b6e | 2797 | return mwl8k_cmd_radio_control(hw, 1, 1); |
a66098da LB |
2798 | } |
2799 | ||
2800 | /* | |
55489b6e | 2801 | * CMD_RF_TX_POWER. |
a66098da | 2802 | */ |
41fdf097 | 2803 | #define MWL8K_RF_TX_POWER_LEVEL_TOTAL 8 |
a66098da | 2804 | |
55489b6e | 2805 | struct mwl8k_cmd_rf_tx_power { |
a66098da LB |
2806 | struct mwl8k_cmd_pkt header; |
2807 | __le16 action; | |
2808 | __le16 support_level; | |
2809 | __le16 current_level; | |
2810 | __le16 reserved; | |
41fdf097 | 2811 | __le16 power_level_list[MWL8K_RF_TX_POWER_LEVEL_TOTAL]; |
ba2d3587 | 2812 | } __packed; |
a66098da | 2813 | |
55489b6e | 2814 | static int mwl8k_cmd_rf_tx_power(struct ieee80211_hw *hw, int dBm) |
a66098da | 2815 | { |
55489b6e | 2816 | struct mwl8k_cmd_rf_tx_power *cmd; |
a66098da LB |
2817 | int rc; |
2818 | ||
2819 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2820 | if (cmd == NULL) | |
2821 | return -ENOMEM; | |
2822 | ||
2823 | cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_TX_POWER); | |
2824 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
2825 | cmd->action = cpu_to_le16(MWL8K_CMD_SET); | |
2826 | cmd->support_level = cpu_to_le16(dBm); | |
2827 | ||
2828 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2829 | kfree(cmd); | |
2830 | ||
2831 | return rc; | |
2832 | } | |
2833 | ||
41fdf097 NS |
2834 | /* |
2835 | * CMD_TX_POWER. | |
2836 | */ | |
2837 | #define MWL8K_TX_POWER_LEVEL_TOTAL 12 | |
2838 | ||
2839 | struct mwl8k_cmd_tx_power { | |
2840 | struct mwl8k_cmd_pkt header; | |
2841 | __le16 action; | |
2842 | __le16 band; | |
2843 | __le16 channel; | |
2844 | __le16 bw; | |
2845 | __le16 sub_ch; | |
2846 | __le16 power_level_list[MWL8K_TX_POWER_LEVEL_TOTAL]; | |
ba30c4a5 | 2847 | } __packed; |
41fdf097 NS |
2848 | |
2849 | static int mwl8k_cmd_tx_power(struct ieee80211_hw *hw, | |
2850 | struct ieee80211_conf *conf, | |
2851 | unsigned short pwr) | |
2852 | { | |
675a0b04 KB |
2853 | struct ieee80211_channel *channel = conf->chandef.chan; |
2854 | enum nl80211_channel_type channel_type = | |
2855 | cfg80211_get_chandef_type(&conf->chandef); | |
41fdf097 NS |
2856 | struct mwl8k_cmd_tx_power *cmd; |
2857 | int rc; | |
2858 | int i; | |
2859 | ||
2860 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2861 | if (cmd == NULL) | |
2862 | return -ENOMEM; | |
2863 | ||
2864 | cmd->header.code = cpu_to_le16(MWL8K_CMD_TX_POWER); | |
2865 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
2866 | cmd->action = cpu_to_le16(MWL8K_CMD_SET_LIST); | |
2867 | ||
2868 | if (channel->band == IEEE80211_BAND_2GHZ) | |
2869 | cmd->band = cpu_to_le16(0x1); | |
2870 | else if (channel->band == IEEE80211_BAND_5GHZ) | |
2871 | cmd->band = cpu_to_le16(0x4); | |
2872 | ||
604c4ef1 | 2873 | cmd->channel = cpu_to_le16(channel->hw_value); |
41fdf097 | 2874 | |
675a0b04 KB |
2875 | if (channel_type == NL80211_CHAN_NO_HT || |
2876 | channel_type == NL80211_CHAN_HT20) { | |
41fdf097 NS |
2877 | cmd->bw = cpu_to_le16(0x2); |
2878 | } else { | |
2879 | cmd->bw = cpu_to_le16(0x4); | |
675a0b04 | 2880 | if (channel_type == NL80211_CHAN_HT40MINUS) |
41fdf097 | 2881 | cmd->sub_ch = cpu_to_le16(0x3); |
675a0b04 | 2882 | else if (channel_type == NL80211_CHAN_HT40PLUS) |
41fdf097 NS |
2883 | cmd->sub_ch = cpu_to_le16(0x1); |
2884 | } | |
2885 | ||
2886 | for (i = 0; i < MWL8K_TX_POWER_LEVEL_TOTAL; i++) | |
2887 | cmd->power_level_list[i] = cpu_to_le16(pwr); | |
2888 | ||
2889 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2890 | kfree(cmd); | |
2891 | ||
2892 | return rc; | |
2893 | } | |
2894 | ||
08b06347 LB |
2895 | /* |
2896 | * CMD_RF_ANTENNA. | |
2897 | */ | |
2898 | struct mwl8k_cmd_rf_antenna { | |
2899 | struct mwl8k_cmd_pkt header; | |
2900 | __le16 antenna; | |
2901 | __le16 mode; | |
ba2d3587 | 2902 | } __packed; |
08b06347 LB |
2903 | |
2904 | #define MWL8K_RF_ANTENNA_RX 1 | |
2905 | #define MWL8K_RF_ANTENNA_TX 2 | |
2906 | ||
2907 | static int | |
2908 | mwl8k_cmd_rf_antenna(struct ieee80211_hw *hw, int antenna, int mask) | |
2909 | { | |
2910 | struct mwl8k_cmd_rf_antenna *cmd; | |
2911 | int rc; | |
2912 | ||
2913 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2914 | if (cmd == NULL) | |
2915 | return -ENOMEM; | |
2916 | ||
2917 | cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_ANTENNA); | |
2918 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
2919 | cmd->antenna = cpu_to_le16(antenna); | |
2920 | cmd->mode = cpu_to_le16(mask); | |
2921 | ||
2922 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2923 | kfree(cmd); | |
2924 | ||
2925 | return rc; | |
2926 | } | |
2927 | ||
b64fe619 LB |
2928 | /* |
2929 | * CMD_SET_BEACON. | |
2930 | */ | |
2931 | struct mwl8k_cmd_set_beacon { | |
2932 | struct mwl8k_cmd_pkt header; | |
2933 | __le16 beacon_len; | |
2934 | __u8 beacon[0]; | |
2935 | }; | |
2936 | ||
aa21d0f6 LB |
2937 | static int mwl8k_cmd_set_beacon(struct ieee80211_hw *hw, |
2938 | struct ieee80211_vif *vif, u8 *beacon, int len) | |
b64fe619 LB |
2939 | { |
2940 | struct mwl8k_cmd_set_beacon *cmd; | |
2941 | int rc; | |
2942 | ||
2943 | cmd = kzalloc(sizeof(*cmd) + len, GFP_KERNEL); | |
2944 | if (cmd == NULL) | |
2945 | return -ENOMEM; | |
2946 | ||
2947 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_BEACON); | |
2948 | cmd->header.length = cpu_to_le16(sizeof(*cmd) + len); | |
2949 | cmd->beacon_len = cpu_to_le16(len); | |
2950 | memcpy(cmd->beacon, beacon, len); | |
2951 | ||
aa21d0f6 | 2952 | rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header); |
b64fe619 LB |
2953 | kfree(cmd); |
2954 | ||
2955 | return rc; | |
2956 | } | |
2957 | ||
a66098da LB |
2958 | /* |
2959 | * CMD_SET_PRE_SCAN. | |
2960 | */ | |
2961 | struct mwl8k_cmd_set_pre_scan { | |
2962 | struct mwl8k_cmd_pkt header; | |
ba2d3587 | 2963 | } __packed; |
a66098da LB |
2964 | |
2965 | static int mwl8k_cmd_set_pre_scan(struct ieee80211_hw *hw) | |
2966 | { | |
2967 | struct mwl8k_cmd_set_pre_scan *cmd; | |
2968 | int rc; | |
2969 | ||
2970 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2971 | if (cmd == NULL) | |
2972 | return -ENOMEM; | |
2973 | ||
2974 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_PRE_SCAN); | |
2975 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
2976 | ||
2977 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2978 | kfree(cmd); | |
2979 | ||
2980 | return rc; | |
2981 | } | |
2982 | ||
2983 | /* | |
2984 | * CMD_SET_POST_SCAN. | |
2985 | */ | |
2986 | struct mwl8k_cmd_set_post_scan { | |
2987 | struct mwl8k_cmd_pkt header; | |
2988 | __le32 isibss; | |
d89173f2 | 2989 | __u8 bssid[ETH_ALEN]; |
ba2d3587 | 2990 | } __packed; |
a66098da LB |
2991 | |
2992 | static int | |
0a11dfc3 | 2993 | mwl8k_cmd_set_post_scan(struct ieee80211_hw *hw, const __u8 *mac) |
a66098da LB |
2994 | { |
2995 | struct mwl8k_cmd_set_post_scan *cmd; | |
2996 | int rc; | |
2997 | ||
2998 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2999 | if (cmd == NULL) | |
3000 | return -ENOMEM; | |
3001 | ||
3002 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_POST_SCAN); | |
3003 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
3004 | cmd->isibss = 0; | |
d89173f2 | 3005 | memcpy(cmd->bssid, mac, ETH_ALEN); |
a66098da LB |
3006 | |
3007 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
3008 | kfree(cmd); | |
3009 | ||
3010 | return rc; | |
3011 | } | |
3012 | ||
3013 | /* | |
3014 | * CMD_SET_RF_CHANNEL. | |
3015 | */ | |
3016 | struct mwl8k_cmd_set_rf_channel { | |
3017 | struct mwl8k_cmd_pkt header; | |
3018 | __le16 action; | |
3019 | __u8 current_channel; | |
3020 | __le32 channel_flags; | |
ba2d3587 | 3021 | } __packed; |
a66098da LB |
3022 | |
3023 | static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw *hw, | |
610677d2 | 3024 | struct ieee80211_conf *conf) |
a66098da | 3025 | { |
675a0b04 KB |
3026 | struct ieee80211_channel *channel = conf->chandef.chan; |
3027 | enum nl80211_channel_type channel_type = | |
3028 | cfg80211_get_chandef_type(&conf->chandef); | |
a66098da LB |
3029 | struct mwl8k_cmd_set_rf_channel *cmd; |
3030 | int rc; | |
3031 | ||
3032 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3033 | if (cmd == NULL) | |
3034 | return -ENOMEM; | |
3035 | ||
3036 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RF_CHANNEL); | |
3037 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
3038 | cmd->action = cpu_to_le16(MWL8K_CMD_SET); | |
3039 | cmd->current_channel = channel->hw_value; | |
610677d2 | 3040 | |
a66098da | 3041 | if (channel->band == IEEE80211_BAND_2GHZ) |
610677d2 | 3042 | cmd->channel_flags |= cpu_to_le32(0x00000001); |
42574ea2 LB |
3043 | else if (channel->band == IEEE80211_BAND_5GHZ) |
3044 | cmd->channel_flags |= cpu_to_le32(0x00000004); | |
610677d2 | 3045 | |
675a0b04 KB |
3046 | if (channel_type == NL80211_CHAN_NO_HT || |
3047 | channel_type == NL80211_CHAN_HT20) | |
610677d2 | 3048 | cmd->channel_flags |= cpu_to_le32(0x00000080); |
675a0b04 | 3049 | else if (channel_type == NL80211_CHAN_HT40MINUS) |
610677d2 | 3050 | cmd->channel_flags |= cpu_to_le32(0x000001900); |
675a0b04 | 3051 | else if (channel_type == NL80211_CHAN_HT40PLUS) |
610677d2 | 3052 | cmd->channel_flags |= cpu_to_le32(0x000000900); |
a66098da LB |
3053 | |
3054 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
3055 | kfree(cmd); | |
3056 | ||
3057 | return rc; | |
3058 | } | |
3059 | ||
3060 | /* | |
55489b6e | 3061 | * CMD_SET_AID. |
a66098da | 3062 | */ |
55489b6e LB |
3063 | #define MWL8K_FRAME_PROT_DISABLED 0x00 |
3064 | #define MWL8K_FRAME_PROT_11G 0x07 | |
3065 | #define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02 | |
3066 | #define MWL8K_FRAME_PROT_11N_HT_ALL 0x06 | |
a66098da | 3067 | |
55489b6e LB |
3068 | struct mwl8k_cmd_update_set_aid { |
3069 | struct mwl8k_cmd_pkt header; | |
3070 | __le16 aid; | |
a66098da | 3071 | |
55489b6e LB |
3072 | /* AP's MAC address (BSSID) */ |
3073 | __u8 bssid[ETH_ALEN]; | |
3074 | __le16 protection_mode; | |
3075 | __u8 supp_rates[14]; | |
ba2d3587 | 3076 | } __packed; |
a66098da | 3077 | |
c6e96010 LB |
3078 | static void legacy_rate_mask_to_array(u8 *rates, u32 mask) |
3079 | { | |
3080 | int i; | |
3081 | int j; | |
3082 | ||
3083 | /* | |
3f524559 | 3084 | * Clear nonstandard rate 4. |
c6e96010 LB |
3085 | */ |
3086 | mask &= 0x1fef; | |
3087 | ||
3f524559 | 3088 | for (i = 0, j = 0; i < 13; i++) { |
c6e96010 | 3089 | if (mask & (1 << i)) |
777ad375 | 3090 | rates[j++] = mwl8k_rates_24[i].hw_value; |
c6e96010 LB |
3091 | } |
3092 | } | |
3093 | ||
55489b6e | 3094 | static int |
c6e96010 LB |
3095 | mwl8k_cmd_set_aid(struct ieee80211_hw *hw, |
3096 | struct ieee80211_vif *vif, u32 legacy_rate_mask) | |
a66098da | 3097 | { |
55489b6e LB |
3098 | struct mwl8k_cmd_update_set_aid *cmd; |
3099 | u16 prot_mode; | |
a66098da LB |
3100 | int rc; |
3101 | ||
3102 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3103 | if (cmd == NULL) | |
3104 | return -ENOMEM; | |
3105 | ||
55489b6e | 3106 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_AID); |
a66098da | 3107 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); |
7dc6a7a7 | 3108 | cmd->aid = cpu_to_le16(vif->bss_conf.aid); |
0a11dfc3 | 3109 | memcpy(cmd->bssid, vif->bss_conf.bssid, ETH_ALEN); |
a66098da | 3110 | |
7dc6a7a7 | 3111 | if (vif->bss_conf.use_cts_prot) { |
55489b6e LB |
3112 | prot_mode = MWL8K_FRAME_PROT_11G; |
3113 | } else { | |
7dc6a7a7 | 3114 | switch (vif->bss_conf.ht_operation_mode & |
55489b6e LB |
3115 | IEEE80211_HT_OP_MODE_PROTECTION) { |
3116 | case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ: | |
3117 | prot_mode = MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY; | |
3118 | break; | |
3119 | case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED: | |
3120 | prot_mode = MWL8K_FRAME_PROT_11N_HT_ALL; | |
3121 | break; | |
3122 | default: | |
3123 | prot_mode = MWL8K_FRAME_PROT_DISABLED; | |
3124 | break; | |
3125 | } | |
3126 | } | |
3127 | cmd->protection_mode = cpu_to_le16(prot_mode); | |
a66098da | 3128 | |
c6e96010 | 3129 | legacy_rate_mask_to_array(cmd->supp_rates, legacy_rate_mask); |
a66098da LB |
3130 | |
3131 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
3132 | kfree(cmd); | |
3133 | ||
3134 | return rc; | |
3135 | } | |
3136 | ||
32060e1b | 3137 | /* |
55489b6e | 3138 | * CMD_SET_RATE. |
32060e1b | 3139 | */ |
55489b6e LB |
3140 | struct mwl8k_cmd_set_rate { |
3141 | struct mwl8k_cmd_pkt header; | |
3142 | __u8 legacy_rates[14]; | |
3143 | ||
3144 | /* Bitmap for supported MCS codes. */ | |
3145 | __u8 mcs_set[16]; | |
3146 | __u8 reserved[16]; | |
ba2d3587 | 3147 | } __packed; |
32060e1b | 3148 | |
55489b6e | 3149 | static int |
c6e96010 | 3150 | mwl8k_cmd_set_rate(struct ieee80211_hw *hw, struct ieee80211_vif *vif, |
13935e2c | 3151 | u32 legacy_rate_mask, u8 *mcs_rates) |
32060e1b | 3152 | { |
55489b6e | 3153 | struct mwl8k_cmd_set_rate *cmd; |
32060e1b LB |
3154 | int rc; |
3155 | ||
3156 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3157 | if (cmd == NULL) | |
3158 | return -ENOMEM; | |
3159 | ||
55489b6e | 3160 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATE); |
32060e1b | 3161 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); |
c6e96010 | 3162 | legacy_rate_mask_to_array(cmd->legacy_rates, legacy_rate_mask); |
13935e2c | 3163 | memcpy(cmd->mcs_set, mcs_rates, 16); |
32060e1b LB |
3164 | |
3165 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
3166 | kfree(cmd); | |
3167 | ||
3168 | return rc; | |
3169 | } | |
3170 | ||
a66098da | 3171 | /* |
55489b6e | 3172 | * CMD_FINALIZE_JOIN. |
a66098da | 3173 | */ |
55489b6e LB |
3174 | #define MWL8K_FJ_BEACON_MAXLEN 128 |
3175 | ||
3176 | struct mwl8k_cmd_finalize_join { | |
a66098da | 3177 | struct mwl8k_cmd_pkt header; |
55489b6e LB |
3178 | __le32 sleep_interval; /* Number of beacon periods to sleep */ |
3179 | __u8 beacon_data[MWL8K_FJ_BEACON_MAXLEN]; | |
ba2d3587 | 3180 | } __packed; |
a66098da | 3181 | |
55489b6e LB |
3182 | static int mwl8k_cmd_finalize_join(struct ieee80211_hw *hw, void *frame, |
3183 | int framelen, int dtim) | |
a66098da | 3184 | { |
55489b6e LB |
3185 | struct mwl8k_cmd_finalize_join *cmd; |
3186 | struct ieee80211_mgmt *payload = frame; | |
3187 | int payload_len; | |
a66098da LB |
3188 | int rc; |
3189 | ||
3190 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3191 | if (cmd == NULL) | |
3192 | return -ENOMEM; | |
3193 | ||
55489b6e | 3194 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_FINALIZE_JOIN); |
a66098da | 3195 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); |
55489b6e LB |
3196 | cmd->sleep_interval = cpu_to_le32(dtim ? dtim : 1); |
3197 | ||
3198 | payload_len = framelen - ieee80211_hdrlen(payload->frame_control); | |
3199 | if (payload_len < 0) | |
3200 | payload_len = 0; | |
3201 | else if (payload_len > MWL8K_FJ_BEACON_MAXLEN) | |
3202 | payload_len = MWL8K_FJ_BEACON_MAXLEN; | |
3203 | ||
3204 | memcpy(cmd->beacon_data, &payload->u.beacon, payload_len); | |
a66098da LB |
3205 | |
3206 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
3207 | kfree(cmd); | |
3208 | ||
3209 | return rc; | |
3210 | } | |
3211 | ||
3212 | /* | |
55489b6e | 3213 | * CMD_SET_RTS_THRESHOLD. |
a66098da | 3214 | */ |
55489b6e | 3215 | struct mwl8k_cmd_set_rts_threshold { |
a66098da LB |
3216 | struct mwl8k_cmd_pkt header; |
3217 | __le16 action; | |
55489b6e | 3218 | __le16 threshold; |
ba2d3587 | 3219 | } __packed; |
a66098da | 3220 | |
c2c2b12a LB |
3221 | static int |
3222 | mwl8k_cmd_set_rts_threshold(struct ieee80211_hw *hw, int rts_thresh) | |
a66098da | 3223 | { |
55489b6e | 3224 | struct mwl8k_cmd_set_rts_threshold *cmd; |
a66098da LB |
3225 | int rc; |
3226 | ||
3227 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3228 | if (cmd == NULL) | |
3229 | return -ENOMEM; | |
3230 | ||
55489b6e | 3231 | cmd->header.code = cpu_to_le16(MWL8K_CMD_RTS_THRESHOLD); |
a66098da | 3232 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); |
c2c2b12a LB |
3233 | cmd->action = cpu_to_le16(MWL8K_CMD_SET); |
3234 | cmd->threshold = cpu_to_le16(rts_thresh); | |
a66098da LB |
3235 | |
3236 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
3237 | kfree(cmd); | |
3238 | ||
a66098da LB |
3239 | return rc; |
3240 | } | |
3241 | ||
3242 | /* | |
55489b6e | 3243 | * CMD_SET_SLOT. |
a66098da | 3244 | */ |
55489b6e | 3245 | struct mwl8k_cmd_set_slot { |
a66098da LB |
3246 | struct mwl8k_cmd_pkt header; |
3247 | __le16 action; | |
55489b6e | 3248 | __u8 short_slot; |
ba2d3587 | 3249 | } __packed; |
a66098da | 3250 | |
55489b6e | 3251 | static int mwl8k_cmd_set_slot(struct ieee80211_hw *hw, bool short_slot_time) |
a66098da | 3252 | { |
55489b6e | 3253 | struct mwl8k_cmd_set_slot *cmd; |
a66098da LB |
3254 | int rc; |
3255 | ||
3256 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3257 | if (cmd == NULL) | |
3258 | return -ENOMEM; | |
3259 | ||
55489b6e | 3260 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_SLOT); |
a66098da | 3261 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); |
55489b6e LB |
3262 | cmd->action = cpu_to_le16(MWL8K_CMD_SET); |
3263 | cmd->short_slot = short_slot_time; | |
a66098da LB |
3264 | |
3265 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
3266 | kfree(cmd); | |
3267 | ||
3268 | return rc; | |
3269 | } | |
3270 | ||
3271 | /* | |
3272 | * CMD_SET_EDCA_PARAMS. | |
3273 | */ | |
3274 | struct mwl8k_cmd_set_edca_params { | |
3275 | struct mwl8k_cmd_pkt header; | |
3276 | ||
3277 | /* See MWL8K_SET_EDCA_XXX below */ | |
3278 | __le16 action; | |
3279 | ||
3280 | /* TX opportunity in units of 32 us */ | |
3281 | __le16 txop; | |
3282 | ||
2e484c89 LB |
3283 | union { |
3284 | struct { | |
3285 | /* Log exponent of max contention period: 0...15 */ | |
3286 | __le32 log_cw_max; | |
3287 | ||
3288 | /* Log exponent of min contention period: 0...15 */ | |
3289 | __le32 log_cw_min; | |
3290 | ||
3291 | /* Adaptive interframe spacing in units of 32us */ | |
3292 | __u8 aifs; | |
3293 | ||
3294 | /* TX queue to configure */ | |
3295 | __u8 txq; | |
3296 | } ap; | |
3297 | struct { | |
3298 | /* Log exponent of max contention period: 0...15 */ | |
3299 | __u8 log_cw_max; | |
a66098da | 3300 | |
2e484c89 LB |
3301 | /* Log exponent of min contention period: 0...15 */ |
3302 | __u8 log_cw_min; | |
a66098da | 3303 | |
2e484c89 LB |
3304 | /* Adaptive interframe spacing in units of 32us */ |
3305 | __u8 aifs; | |
a66098da | 3306 | |
2e484c89 LB |
3307 | /* TX queue to configure */ |
3308 | __u8 txq; | |
3309 | } sta; | |
3310 | }; | |
ba2d3587 | 3311 | } __packed; |
a66098da | 3312 | |
a66098da LB |
3313 | #define MWL8K_SET_EDCA_CW 0x01 |
3314 | #define MWL8K_SET_EDCA_TXOP 0x02 | |
3315 | #define MWL8K_SET_EDCA_AIFS 0x04 | |
3316 | ||
3317 | #define MWL8K_SET_EDCA_ALL (MWL8K_SET_EDCA_CW | \ | |
3318 | MWL8K_SET_EDCA_TXOP | \ | |
3319 | MWL8K_SET_EDCA_AIFS) | |
3320 | ||
3321 | static int | |
55489b6e LB |
3322 | mwl8k_cmd_set_edca_params(struct ieee80211_hw *hw, __u8 qnum, |
3323 | __u16 cw_min, __u16 cw_max, | |
3324 | __u8 aifs, __u16 txop) | |
a66098da | 3325 | { |
2e484c89 | 3326 | struct mwl8k_priv *priv = hw->priv; |
a66098da | 3327 | struct mwl8k_cmd_set_edca_params *cmd; |
a66098da LB |
3328 | int rc; |
3329 | ||
3330 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3331 | if (cmd == NULL) | |
3332 | return -ENOMEM; | |
3333 | ||
a66098da LB |
3334 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_EDCA_PARAMS); |
3335 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
a66098da LB |
3336 | cmd->action = cpu_to_le16(MWL8K_SET_EDCA_ALL); |
3337 | cmd->txop = cpu_to_le16(txop); | |
2e484c89 LB |
3338 | if (priv->ap_fw) { |
3339 | cmd->ap.log_cw_max = cpu_to_le32(ilog2(cw_max + 1)); | |
3340 | cmd->ap.log_cw_min = cpu_to_le32(ilog2(cw_min + 1)); | |
3341 | cmd->ap.aifs = aifs; | |
3342 | cmd->ap.txq = qnum; | |
3343 | } else { | |
3344 | cmd->sta.log_cw_max = (u8)ilog2(cw_max + 1); | |
3345 | cmd->sta.log_cw_min = (u8)ilog2(cw_min + 1); | |
3346 | cmd->sta.aifs = aifs; | |
3347 | cmd->sta.txq = qnum; | |
3348 | } | |
a66098da LB |
3349 | |
3350 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
3351 | kfree(cmd); | |
3352 | ||
3353 | return rc; | |
3354 | } | |
3355 | ||
3356 | /* | |
55489b6e | 3357 | * CMD_SET_WMM_MODE. |
a66098da | 3358 | */ |
55489b6e | 3359 | struct mwl8k_cmd_set_wmm_mode { |
a66098da | 3360 | struct mwl8k_cmd_pkt header; |
55489b6e | 3361 | __le16 action; |
ba2d3587 | 3362 | } __packed; |
a66098da | 3363 | |
55489b6e | 3364 | static int mwl8k_cmd_set_wmm_mode(struct ieee80211_hw *hw, bool enable) |
a66098da | 3365 | { |
55489b6e LB |
3366 | struct mwl8k_priv *priv = hw->priv; |
3367 | struct mwl8k_cmd_set_wmm_mode *cmd; | |
a66098da LB |
3368 | int rc; |
3369 | ||
a66098da LB |
3370 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); |
3371 | if (cmd == NULL) | |
3372 | return -ENOMEM; | |
3373 | ||
55489b6e | 3374 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_WMM_MODE); |
a66098da | 3375 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); |
55489b6e | 3376 | cmd->action = cpu_to_le16(!!enable); |
a66098da LB |
3377 | |
3378 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
3379 | kfree(cmd); | |
16cec43d | 3380 | |
55489b6e LB |
3381 | if (!rc) |
3382 | priv->wmm_enabled = enable; | |
a66098da LB |
3383 | |
3384 | return rc; | |
3385 | } | |
3386 | ||
3387 | /* | |
55489b6e | 3388 | * CMD_MIMO_CONFIG. |
a66098da | 3389 | */ |
55489b6e LB |
3390 | struct mwl8k_cmd_mimo_config { |
3391 | struct mwl8k_cmd_pkt header; | |
3392 | __le32 action; | |
3393 | __u8 rx_antenna_map; | |
3394 | __u8 tx_antenna_map; | |
ba2d3587 | 3395 | } __packed; |
a66098da | 3396 | |
55489b6e | 3397 | static int mwl8k_cmd_mimo_config(struct ieee80211_hw *hw, __u8 rx, __u8 tx) |
a66098da | 3398 | { |
55489b6e | 3399 | struct mwl8k_cmd_mimo_config *cmd; |
a66098da LB |
3400 | int rc; |
3401 | ||
3402 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3403 | if (cmd == NULL) | |
3404 | return -ENOMEM; | |
3405 | ||
55489b6e | 3406 | cmd->header.code = cpu_to_le16(MWL8K_CMD_MIMO_CONFIG); |
a66098da | 3407 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); |
55489b6e LB |
3408 | cmd->action = cpu_to_le32((u32)MWL8K_CMD_SET); |
3409 | cmd->rx_antenna_map = rx; | |
3410 | cmd->tx_antenna_map = tx; | |
a66098da LB |
3411 | |
3412 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
3413 | kfree(cmd); | |
3414 | ||
3415 | return rc; | |
3416 | } | |
3417 | ||
3418 | /* | |
b71ed2c6 | 3419 | * CMD_USE_FIXED_RATE (STA version). |
a66098da | 3420 | */ |
b71ed2c6 LB |
3421 | struct mwl8k_cmd_use_fixed_rate_sta { |
3422 | struct mwl8k_cmd_pkt header; | |
3423 | __le32 action; | |
3424 | __le32 allow_rate_drop; | |
3425 | __le32 num_rates; | |
3426 | struct { | |
3427 | __le32 is_ht_rate; | |
3428 | __le32 enable_retry; | |
3429 | __le32 rate; | |
3430 | __le32 retry_count; | |
3431 | } rate_entry[8]; | |
3432 | __le32 rate_type; | |
3433 | __le32 reserved1; | |
3434 | __le32 reserved2; | |
ba2d3587 | 3435 | } __packed; |
a66098da | 3436 | |
b71ed2c6 LB |
3437 | #define MWL8K_USE_AUTO_RATE 0x0002 |
3438 | #define MWL8K_UCAST_RATE 0 | |
a66098da | 3439 | |
b71ed2c6 | 3440 | static int mwl8k_cmd_use_fixed_rate_sta(struct ieee80211_hw *hw) |
a66098da | 3441 | { |
b71ed2c6 | 3442 | struct mwl8k_cmd_use_fixed_rate_sta *cmd; |
a66098da LB |
3443 | int rc; |
3444 | ||
3445 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3446 | if (cmd == NULL) | |
3447 | return -ENOMEM; | |
3448 | ||
3449 | cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE); | |
3450 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
b71ed2c6 LB |
3451 | cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE); |
3452 | cmd->rate_type = cpu_to_le32(MWL8K_UCAST_RATE); | |
a66098da LB |
3453 | |
3454 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
3455 | kfree(cmd); | |
3456 | ||
3457 | return rc; | |
3458 | } | |
3459 | ||
088aab8b LB |
3460 | /* |
3461 | * CMD_USE_FIXED_RATE (AP version). | |
3462 | */ | |
3463 | struct mwl8k_cmd_use_fixed_rate_ap { | |
3464 | struct mwl8k_cmd_pkt header; | |
3465 | __le32 action; | |
3466 | __le32 allow_rate_drop; | |
3467 | __le32 num_rates; | |
3468 | struct mwl8k_rate_entry_ap { | |
3469 | __le32 is_ht_rate; | |
3470 | __le32 enable_retry; | |
3471 | __le32 rate; | |
3472 | __le32 retry_count; | |
3473 | } rate_entry[4]; | |
3474 | u8 multicast_rate; | |
3475 | u8 multicast_rate_type; | |
3476 | u8 management_rate; | |
ba2d3587 | 3477 | } __packed; |
088aab8b LB |
3478 | |
3479 | static int | |
3480 | mwl8k_cmd_use_fixed_rate_ap(struct ieee80211_hw *hw, int mcast, int mgmt) | |
3481 | { | |
3482 | struct mwl8k_cmd_use_fixed_rate_ap *cmd; | |
3483 | int rc; | |
3484 | ||
3485 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3486 | if (cmd == NULL) | |
3487 | return -ENOMEM; | |
3488 | ||
3489 | cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE); | |
3490 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
3491 | cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE); | |
3492 | cmd->multicast_rate = mcast; | |
3493 | cmd->management_rate = mgmt; | |
3494 | ||
3495 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
3496 | kfree(cmd); | |
3497 | ||
3498 | return rc; | |
3499 | } | |
3500 | ||
55489b6e LB |
3501 | /* |
3502 | * CMD_ENABLE_SNIFFER. | |
3503 | */ | |
3504 | struct mwl8k_cmd_enable_sniffer { | |
3505 | struct mwl8k_cmd_pkt header; | |
3506 | __le32 action; | |
ba2d3587 | 3507 | } __packed; |
55489b6e LB |
3508 | |
3509 | static int mwl8k_cmd_enable_sniffer(struct ieee80211_hw *hw, bool enable) | |
3510 | { | |
3511 | struct mwl8k_cmd_enable_sniffer *cmd; | |
3512 | int rc; | |
3513 | ||
3514 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3515 | if (cmd == NULL) | |
3516 | return -ENOMEM; | |
3517 | ||
3518 | cmd->header.code = cpu_to_le16(MWL8K_CMD_ENABLE_SNIFFER); | |
3519 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
3520 | cmd->action = cpu_to_le32(!!enable); | |
3521 | ||
3522 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
3523 | kfree(cmd); | |
3524 | ||
3525 | return rc; | |
3526 | } | |
3527 | ||
197a4e4e | 3528 | struct mwl8k_cmd_update_mac_addr { |
55489b6e LB |
3529 | struct mwl8k_cmd_pkt header; |
3530 | union { | |
3531 | struct { | |
3532 | __le16 mac_type; | |
3533 | __u8 mac_addr[ETH_ALEN]; | |
3534 | } mbss; | |
3535 | __u8 mac_addr[ETH_ALEN]; | |
3536 | }; | |
ba2d3587 | 3537 | } __packed; |
55489b6e | 3538 | |
ee0ddf18 LB |
3539 | #define MWL8K_MAC_TYPE_PRIMARY_CLIENT 0 |
3540 | #define MWL8K_MAC_TYPE_SECONDARY_CLIENT 1 | |
3541 | #define MWL8K_MAC_TYPE_PRIMARY_AP 2 | |
3542 | #define MWL8K_MAC_TYPE_SECONDARY_AP 3 | |
a9e00b15 | 3543 | |
197a4e4e YAP |
3544 | static int mwl8k_cmd_update_mac_addr(struct ieee80211_hw *hw, |
3545 | struct ieee80211_vif *vif, u8 *mac, bool set) | |
55489b6e LB |
3546 | { |
3547 | struct mwl8k_priv *priv = hw->priv; | |
ee0ddf18 | 3548 | struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif); |
197a4e4e | 3549 | struct mwl8k_cmd_update_mac_addr *cmd; |
ee0ddf18 | 3550 | int mac_type; |
55489b6e LB |
3551 | int rc; |
3552 | ||
ee0ddf18 LB |
3553 | mac_type = MWL8K_MAC_TYPE_PRIMARY_AP; |
3554 | if (vif != NULL && vif->type == NL80211_IFTYPE_STATION) { | |
3555 | if (mwl8k_vif->macid + 1 == ffs(priv->sta_macids_supported)) | |
af458831 YAP |
3556 | if (priv->ap_fw) |
3557 | mac_type = MWL8K_MAC_TYPE_SECONDARY_CLIENT; | |
3558 | else | |
3559 | mac_type = MWL8K_MAC_TYPE_PRIMARY_CLIENT; | |
ee0ddf18 LB |
3560 | else |
3561 | mac_type = MWL8K_MAC_TYPE_SECONDARY_CLIENT; | |
3562 | } else if (vif != NULL && vif->type == NL80211_IFTYPE_AP) { | |
3563 | if (mwl8k_vif->macid + 1 == ffs(priv->ap_macids_supported)) | |
3564 | mac_type = MWL8K_MAC_TYPE_PRIMARY_AP; | |
3565 | else | |
3566 | mac_type = MWL8K_MAC_TYPE_SECONDARY_AP; | |
3567 | } | |
3568 | ||
55489b6e LB |
3569 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); |
3570 | if (cmd == NULL) | |
3571 | return -ENOMEM; | |
3572 | ||
197a4e4e YAP |
3573 | if (set) |
3574 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_MAC_ADDR); | |
3575 | else | |
3576 | cmd->header.code = cpu_to_le16(MWL8K_CMD_DEL_MAC_ADDR); | |
3577 | ||
55489b6e LB |
3578 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); |
3579 | if (priv->ap_fw) { | |
ee0ddf18 | 3580 | cmd->mbss.mac_type = cpu_to_le16(mac_type); |
55489b6e LB |
3581 | memcpy(cmd->mbss.mac_addr, mac, ETH_ALEN); |
3582 | } else { | |
3583 | memcpy(cmd->mac_addr, mac, ETH_ALEN); | |
3584 | } | |
3585 | ||
aa21d0f6 | 3586 | rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header); |
55489b6e LB |
3587 | kfree(cmd); |
3588 | ||
3589 | return rc; | |
3590 | } | |
3591 | ||
197a4e4e YAP |
3592 | /* |
3593 | * MWL8K_CMD_SET_MAC_ADDR. | |
3594 | */ | |
3595 | static inline int mwl8k_cmd_set_mac_addr(struct ieee80211_hw *hw, | |
3596 | struct ieee80211_vif *vif, u8 *mac) | |
3597 | { | |
3598 | return mwl8k_cmd_update_mac_addr(hw, vif, mac, true); | |
3599 | } | |
3600 | ||
3601 | /* | |
3602 | * MWL8K_CMD_DEL_MAC_ADDR. | |
3603 | */ | |
3604 | static inline int mwl8k_cmd_del_mac_addr(struct ieee80211_hw *hw, | |
3605 | struct ieee80211_vif *vif, u8 *mac) | |
3606 | { | |
3607 | return mwl8k_cmd_update_mac_addr(hw, vif, mac, false); | |
3608 | } | |
3609 | ||
55489b6e LB |
3610 | /* |
3611 | * CMD_SET_RATEADAPT_MODE. | |
3612 | */ | |
3613 | struct mwl8k_cmd_set_rate_adapt_mode { | |
3614 | struct mwl8k_cmd_pkt header; | |
3615 | __le16 action; | |
3616 | __le16 mode; | |
ba2d3587 | 3617 | } __packed; |
55489b6e LB |
3618 | |
3619 | static int mwl8k_cmd_set_rateadapt_mode(struct ieee80211_hw *hw, __u16 mode) | |
3620 | { | |
3621 | struct mwl8k_cmd_set_rate_adapt_mode *cmd; | |
3622 | int rc; | |
3623 | ||
3624 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3625 | if (cmd == NULL) | |
3626 | return -ENOMEM; | |
3627 | ||
3628 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATEADAPT_MODE); | |
3629 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
3630 | cmd->action = cpu_to_le16(MWL8K_CMD_SET); | |
3631 | cmd->mode = cpu_to_le16(mode); | |
3632 | ||
3633 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
3634 | kfree(cmd); | |
3635 | ||
3636 | return rc; | |
3637 | } | |
3638 | ||
3aefc37e NS |
3639 | /* |
3640 | * CMD_GET_WATCHDOG_BITMAP. | |
3641 | */ | |
3642 | struct mwl8k_cmd_get_watchdog_bitmap { | |
3643 | struct mwl8k_cmd_pkt header; | |
3644 | u8 bitmap; | |
3645 | } __packed; | |
3646 | ||
3647 | static int mwl8k_cmd_get_watchdog_bitmap(struct ieee80211_hw *hw, u8 *bitmap) | |
3648 | { | |
3649 | struct mwl8k_cmd_get_watchdog_bitmap *cmd; | |
3650 | int rc; | |
3651 | ||
3652 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3653 | if (cmd == NULL) | |
3654 | return -ENOMEM; | |
3655 | ||
3656 | cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_WATCHDOG_BITMAP); | |
3657 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
3658 | ||
3659 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
3660 | if (!rc) | |
3661 | *bitmap = cmd->bitmap; | |
3662 | ||
3663 | kfree(cmd); | |
3664 | ||
3665 | return rc; | |
3666 | } | |
3667 | ||
cfacba12 YAP |
3668 | #define MWL8K_WMM_QUEUE_NUMBER 3 |
3669 | ||
3670 | static void mwl8k_destroy_ba(struct ieee80211_hw *hw, | |
3671 | u8 idx); | |
3672 | ||
3aefc37e NS |
3673 | static void mwl8k_watchdog_ba_events(struct work_struct *work) |
3674 | { | |
3675 | int rc; | |
3676 | u8 bitmap = 0, stream_index; | |
3677 | struct mwl8k_ampdu_stream *streams; | |
3678 | struct mwl8k_priv *priv = | |
3679 | container_of(work, struct mwl8k_priv, watchdog_ba_handle); | |
cfacba12 YAP |
3680 | struct ieee80211_hw *hw = priv->hw; |
3681 | int i; | |
3682 | u32 status = 0; | |
3683 | ||
3684 | mwl8k_fw_lock(hw); | |
3aefc37e NS |
3685 | |
3686 | rc = mwl8k_cmd_get_watchdog_bitmap(priv->hw, &bitmap); | |
3687 | if (rc) | |
cfacba12 | 3688 | goto done; |
3aefc37e | 3689 | |
cfacba12 | 3690 | spin_lock(&priv->stream_lock); |
3aefc37e NS |
3691 | |
3692 | /* the bitmap is the hw queue number. Map it to the ampdu queue. */ | |
cfacba12 YAP |
3693 | for (i = 0; i < TOTAL_HW_TX_QUEUES; i++) { |
3694 | if (bitmap & (1 << i)) { | |
3695 | stream_index = (i + MWL8K_WMM_QUEUE_NUMBER) % | |
3696 | TOTAL_HW_TX_QUEUES; | |
3697 | streams = &priv->ampdu[stream_index]; | |
3698 | if (streams->state == AMPDU_STREAM_ACTIVE) { | |
3699 | ieee80211_stop_tx_ba_session(streams->sta, | |
3700 | streams->tid); | |
3701 | spin_unlock(&priv->stream_lock); | |
3702 | mwl8k_destroy_ba(hw, stream_index); | |
3703 | spin_lock(&priv->stream_lock); | |
3704 | } | |
3705 | } | |
3706 | } | |
3aefc37e | 3707 | |
cfacba12 YAP |
3708 | spin_unlock(&priv->stream_lock); |
3709 | done: | |
c27a54d3 | 3710 | atomic_dec(&priv->watchdog_event_pending); |
cfacba12 YAP |
3711 | status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK); |
3712 | iowrite32((status | MWL8K_A2H_INT_BA_WATCHDOG), | |
3713 | priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK); | |
3714 | mwl8k_fw_unlock(hw); | |
3aefc37e NS |
3715 | return; |
3716 | } | |
3717 | ||
3718 | ||
b64fe619 LB |
3719 | /* |
3720 | * CMD_BSS_START. | |
3721 | */ | |
3722 | struct mwl8k_cmd_bss_start { | |
3723 | struct mwl8k_cmd_pkt header; | |
3724 | __le32 enable; | |
ba2d3587 | 3725 | } __packed; |
b64fe619 | 3726 | |
aa21d0f6 LB |
3727 | static int mwl8k_cmd_bss_start(struct ieee80211_hw *hw, |
3728 | struct ieee80211_vif *vif, int enable) | |
b64fe619 LB |
3729 | { |
3730 | struct mwl8k_cmd_bss_start *cmd; | |
e882efc9 YAP |
3731 | struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif); |
3732 | struct mwl8k_priv *priv = hw->priv; | |
b64fe619 LB |
3733 | int rc; |
3734 | ||
e882efc9 YAP |
3735 | if (enable && (priv->running_bsses & (1 << mwl8k_vif->macid))) |
3736 | return 0; | |
3737 | ||
3738 | if (!enable && !(priv->running_bsses & (1 << mwl8k_vif->macid))) | |
3739 | return 0; | |
3740 | ||
b64fe619 LB |
3741 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); |
3742 | if (cmd == NULL) | |
3743 | return -ENOMEM; | |
3744 | ||
3745 | cmd->header.code = cpu_to_le16(MWL8K_CMD_BSS_START); | |
3746 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
3747 | cmd->enable = cpu_to_le32(enable); | |
3748 | ||
aa21d0f6 | 3749 | rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header); |
b64fe619 LB |
3750 | kfree(cmd); |
3751 | ||
e882efc9 YAP |
3752 | if (!rc) { |
3753 | if (enable) | |
3754 | priv->running_bsses |= (1 << mwl8k_vif->macid); | |
3755 | else | |
3756 | priv->running_bsses &= ~(1 << mwl8k_vif->macid); | |
3757 | } | |
b64fe619 LB |
3758 | return rc; |
3759 | } | |
3760 | ||
e882efc9 YAP |
3761 | static void mwl8k_enable_bsses(struct ieee80211_hw *hw, bool enable, u32 bitmap) |
3762 | { | |
3763 | struct mwl8k_priv *priv = hw->priv; | |
3764 | struct mwl8k_vif *mwl8k_vif, *tmp_vif; | |
3765 | struct ieee80211_vif *vif; | |
3766 | ||
3767 | list_for_each_entry_safe(mwl8k_vif, tmp_vif, &priv->vif_list, list) { | |
3768 | vif = mwl8k_vif->vif; | |
3769 | ||
3770 | if (!(bitmap & (1 << mwl8k_vif->macid))) | |
3771 | continue; | |
3772 | ||
3773 | if (vif->type == NL80211_IFTYPE_AP) | |
3774 | mwl8k_cmd_bss_start(hw, vif, enable); | |
3775 | } | |
3776 | } | |
5faa1aff NS |
3777 | /* |
3778 | * CMD_BASTREAM. | |
3779 | */ | |
3780 | ||
3781 | /* | |
3782 | * UPSTREAM is tx direction | |
3783 | */ | |
3784 | #define BASTREAM_FLAG_DIRECTION_UPSTREAM 0x00 | |
3785 | #define BASTREAM_FLAG_IMMEDIATE_TYPE 0x01 | |
3786 | ||
ba30c4a5 | 3787 | enum ba_stream_action_type { |
5faa1aff NS |
3788 | MWL8K_BA_CREATE, |
3789 | MWL8K_BA_UPDATE, | |
3790 | MWL8K_BA_DESTROY, | |
3791 | MWL8K_BA_FLUSH, | |
3792 | MWL8K_BA_CHECK, | |
ba30c4a5 | 3793 | }; |
5faa1aff NS |
3794 | |
3795 | ||
3796 | struct mwl8k_create_ba_stream { | |
3797 | __le32 flags; | |
3798 | __le32 idle_thrs; | |
3799 | __le32 bar_thrs; | |
3800 | __le32 window_size; | |
3801 | u8 peer_mac_addr[6]; | |
3802 | u8 dialog_token; | |
3803 | u8 tid; | |
3804 | u8 queue_id; | |
3805 | u8 param_info; | |
3806 | __le32 ba_context; | |
3807 | u8 reset_seq_no_flag; | |
3808 | __le16 curr_seq_no; | |
3809 | u8 sta_src_mac_addr[6]; | |
3810 | } __packed; | |
3811 | ||
3812 | struct mwl8k_destroy_ba_stream { | |
3813 | __le32 flags; | |
3814 | __le32 ba_context; | |
3815 | } __packed; | |
3816 | ||
3817 | struct mwl8k_cmd_bastream { | |
3818 | struct mwl8k_cmd_pkt header; | |
3819 | __le32 action; | |
3820 | union { | |
3821 | struct mwl8k_create_ba_stream create_params; | |
3822 | struct mwl8k_destroy_ba_stream destroy_params; | |
3823 | }; | |
3824 | } __packed; | |
3825 | ||
3826 | static int | |
f95275c4 YAP |
3827 | mwl8k_check_ba(struct ieee80211_hw *hw, struct mwl8k_ampdu_stream *stream, |
3828 | struct ieee80211_vif *vif) | |
5faa1aff NS |
3829 | { |
3830 | struct mwl8k_cmd_bastream *cmd; | |
3831 | int rc; | |
3832 | ||
3833 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3834 | if (cmd == NULL) | |
3835 | return -ENOMEM; | |
3836 | ||
3837 | cmd->header.code = cpu_to_le16(MWL8K_CMD_BASTREAM); | |
3838 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
3839 | ||
3840 | cmd->action = cpu_to_le32(MWL8K_BA_CHECK); | |
3841 | ||
3842 | cmd->create_params.queue_id = stream->idx; | |
3843 | memcpy(&cmd->create_params.peer_mac_addr[0], stream->sta->addr, | |
3844 | ETH_ALEN); | |
3845 | cmd->create_params.tid = stream->tid; | |
3846 | ||
3847 | cmd->create_params.flags = | |
3848 | cpu_to_le32(BASTREAM_FLAG_IMMEDIATE_TYPE) | | |
3849 | cpu_to_le32(BASTREAM_FLAG_DIRECTION_UPSTREAM); | |
3850 | ||
f95275c4 | 3851 | rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header); |
5faa1aff NS |
3852 | |
3853 | kfree(cmd); | |
3854 | ||
3855 | return rc; | |
3856 | } | |
3857 | ||
3858 | static int | |
3859 | mwl8k_create_ba(struct ieee80211_hw *hw, struct mwl8k_ampdu_stream *stream, | |
f95275c4 | 3860 | u8 buf_size, struct ieee80211_vif *vif) |
5faa1aff NS |
3861 | { |
3862 | struct mwl8k_cmd_bastream *cmd; | |
3863 | int rc; | |
3864 | ||
3865 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3866 | if (cmd == NULL) | |
3867 | return -ENOMEM; | |
3868 | ||
3869 | ||
3870 | cmd->header.code = cpu_to_le16(MWL8K_CMD_BASTREAM); | |
3871 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
3872 | ||
3873 | cmd->action = cpu_to_le32(MWL8K_BA_CREATE); | |
3874 | ||
3875 | cmd->create_params.bar_thrs = cpu_to_le32((u32)buf_size); | |
3876 | cmd->create_params.window_size = cpu_to_le32((u32)buf_size); | |
3877 | cmd->create_params.queue_id = stream->idx; | |
3878 | ||
3879 | memcpy(cmd->create_params.peer_mac_addr, stream->sta->addr, ETH_ALEN); | |
3880 | cmd->create_params.tid = stream->tid; | |
3881 | cmd->create_params.curr_seq_no = cpu_to_le16(0); | |
3882 | cmd->create_params.reset_seq_no_flag = 1; | |
3883 | ||
3884 | cmd->create_params.param_info = | |
3885 | (stream->sta->ht_cap.ampdu_factor & | |
3886 | IEEE80211_HT_AMPDU_PARM_FACTOR) | | |
3887 | ((stream->sta->ht_cap.ampdu_density << 2) & | |
3888 | IEEE80211_HT_AMPDU_PARM_DENSITY); | |
3889 | ||
3890 | cmd->create_params.flags = | |
3891 | cpu_to_le32(BASTREAM_FLAG_IMMEDIATE_TYPE | | |
3892 | BASTREAM_FLAG_DIRECTION_UPSTREAM); | |
3893 | ||
f95275c4 | 3894 | rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header); |
5faa1aff NS |
3895 | |
3896 | wiphy_debug(hw->wiphy, "Created a BA stream for %pM : tid %d\n", | |
3897 | stream->sta->addr, stream->tid); | |
3898 | kfree(cmd); | |
3899 | ||
3900 | return rc; | |
3901 | } | |
3902 | ||
3903 | static void mwl8k_destroy_ba(struct ieee80211_hw *hw, | |
07f6dda1 | 3904 | u8 idx) |
5faa1aff NS |
3905 | { |
3906 | struct mwl8k_cmd_bastream *cmd; | |
3907 | ||
3908 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3909 | if (cmd == NULL) | |
3910 | return; | |
3911 | ||
3912 | cmd->header.code = cpu_to_le16(MWL8K_CMD_BASTREAM); | |
3913 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
3914 | cmd->action = cpu_to_le32(MWL8K_BA_DESTROY); | |
3915 | ||
07f6dda1 | 3916 | cmd->destroy_params.ba_context = cpu_to_le32(idx); |
5faa1aff NS |
3917 | mwl8k_post_cmd(hw, &cmd->header); |
3918 | ||
07f6dda1 | 3919 | wiphy_debug(hw->wiphy, "Deleted BA stream index %d\n", idx); |
5faa1aff NS |
3920 | |
3921 | kfree(cmd); | |
3922 | } | |
3923 | ||
3f5610ff LB |
3924 | /* |
3925 | * CMD_SET_NEW_STN. | |
3926 | */ | |
3927 | struct mwl8k_cmd_set_new_stn { | |
3928 | struct mwl8k_cmd_pkt header; | |
3929 | __le16 aid; | |
3930 | __u8 mac_addr[6]; | |
3931 | __le16 stn_id; | |
3932 | __le16 action; | |
3933 | __le16 rsvd; | |
3934 | __le32 legacy_rates; | |
3935 | __u8 ht_rates[4]; | |
3936 | __le16 cap_info; | |
3937 | __le16 ht_capabilities_info; | |
3938 | __u8 mac_ht_param_info; | |
3939 | __u8 rev; | |
3940 | __u8 control_channel; | |
3941 | __u8 add_channel; | |
3942 | __le16 op_mode; | |
3943 | __le16 stbc; | |
3944 | __u8 add_qos_info; | |
3945 | __u8 is_qos_sta; | |
3946 | __le32 fw_sta_ptr; | |
ba2d3587 | 3947 | } __packed; |
3f5610ff LB |
3948 | |
3949 | #define MWL8K_STA_ACTION_ADD 0 | |
3950 | #define MWL8K_STA_ACTION_REMOVE 2 | |
3951 | ||
3952 | static int mwl8k_cmd_set_new_stn_add(struct ieee80211_hw *hw, | |
3953 | struct ieee80211_vif *vif, | |
3954 | struct ieee80211_sta *sta) | |
3955 | { | |
3956 | struct mwl8k_cmd_set_new_stn *cmd; | |
8707d026 | 3957 | u32 rates; |
3f5610ff LB |
3958 | int rc; |
3959 | ||
3960 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3961 | if (cmd == NULL) | |
3962 | return -ENOMEM; | |
3963 | ||
3964 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN); | |
3965 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
3966 | cmd->aid = cpu_to_le16(sta->aid); | |
3967 | memcpy(cmd->mac_addr, sta->addr, ETH_ALEN); | |
3968 | cmd->stn_id = cpu_to_le16(sta->aid); | |
3969 | cmd->action = cpu_to_le16(MWL8K_STA_ACTION_ADD); | |
675a0b04 | 3970 | if (hw->conf.chandef.chan->band == IEEE80211_BAND_2GHZ) |
8707d026 LB |
3971 | rates = sta->supp_rates[IEEE80211_BAND_2GHZ]; |
3972 | else | |
3973 | rates = sta->supp_rates[IEEE80211_BAND_5GHZ] << 5; | |
3974 | cmd->legacy_rates = cpu_to_le32(rates); | |
3f5610ff LB |
3975 | if (sta->ht_cap.ht_supported) { |
3976 | cmd->ht_rates[0] = sta->ht_cap.mcs.rx_mask[0]; | |
3977 | cmd->ht_rates[1] = sta->ht_cap.mcs.rx_mask[1]; | |
3978 | cmd->ht_rates[2] = sta->ht_cap.mcs.rx_mask[2]; | |
3979 | cmd->ht_rates[3] = sta->ht_cap.mcs.rx_mask[3]; | |
3980 | cmd->ht_capabilities_info = cpu_to_le16(sta->ht_cap.cap); | |
3981 | cmd->mac_ht_param_info = (sta->ht_cap.ampdu_factor & 3) | | |
3982 | ((sta->ht_cap.ampdu_density & 7) << 2); | |
3983 | cmd->is_qos_sta = 1; | |
3984 | } | |
3985 | ||
aa21d0f6 | 3986 | rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header); |
3f5610ff LB |
3987 | kfree(cmd); |
3988 | ||
3989 | return rc; | |
3990 | } | |
3991 | ||
b64fe619 LB |
3992 | static int mwl8k_cmd_set_new_stn_add_self(struct ieee80211_hw *hw, |
3993 | struct ieee80211_vif *vif) | |
3994 | { | |
3995 | struct mwl8k_cmd_set_new_stn *cmd; | |
3996 | int rc; | |
3997 | ||
3998 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3999 | if (cmd == NULL) | |
4000 | return -ENOMEM; | |
4001 | ||
4002 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN); | |
4003 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
4004 | memcpy(cmd->mac_addr, vif->addr, ETH_ALEN); | |
4005 | ||
aa21d0f6 | 4006 | rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header); |
b64fe619 LB |
4007 | kfree(cmd); |
4008 | ||
4009 | return rc; | |
4010 | } | |
4011 | ||
3f5610ff LB |
4012 | static int mwl8k_cmd_set_new_stn_del(struct ieee80211_hw *hw, |
4013 | struct ieee80211_vif *vif, u8 *addr) | |
4014 | { | |
4015 | struct mwl8k_cmd_set_new_stn *cmd; | |
0dd13a48 YAP |
4016 | struct mwl8k_priv *priv = hw->priv; |
4017 | int rc, i; | |
4018 | u8 idx; | |
4019 | ||
4020 | spin_lock(&priv->stream_lock); | |
4021 | /* Destroy any active ampdu streams for this sta */ | |
4022 | for (i = 0; i < MWL8K_NUM_AMPDU_STREAMS; i++) { | |
4023 | struct mwl8k_ampdu_stream *s; | |
4024 | s = &priv->ampdu[i]; | |
4025 | if (s->state != AMPDU_NO_STREAM) { | |
4026 | if (memcmp(s->sta->addr, addr, ETH_ALEN) == 0) { | |
4027 | if (s->state == AMPDU_STREAM_ACTIVE) { | |
4028 | idx = s->idx; | |
4029 | spin_unlock(&priv->stream_lock); | |
4030 | mwl8k_destroy_ba(hw, idx); | |
4031 | spin_lock(&priv->stream_lock); | |
4032 | } else if (s->state == AMPDU_STREAM_NEW) { | |
4033 | mwl8k_remove_stream(hw, s); | |
4034 | } | |
4035 | } | |
4036 | } | |
4037 | } | |
4038 | ||
4039 | spin_unlock(&priv->stream_lock); | |
3f5610ff LB |
4040 | |
4041 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
4042 | if (cmd == NULL) | |
4043 | return -ENOMEM; | |
4044 | ||
4045 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN); | |
4046 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
4047 | memcpy(cmd->mac_addr, addr, ETH_ALEN); | |
4048 | cmd->action = cpu_to_le16(MWL8K_STA_ACTION_REMOVE); | |
4049 | ||
aa21d0f6 | 4050 | rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header); |
3f5610ff LB |
4051 | kfree(cmd); |
4052 | ||
4053 | return rc; | |
4054 | } | |
4055 | ||
fcdc403c NS |
4056 | /* |
4057 | * CMD_UPDATE_ENCRYPTION. | |
4058 | */ | |
4059 | ||
4060 | #define MAX_ENCR_KEY_LENGTH 16 | |
4061 | #define MIC_KEY_LENGTH 8 | |
4062 | ||
4063 | struct mwl8k_cmd_update_encryption { | |
4064 | struct mwl8k_cmd_pkt header; | |
4065 | ||
4066 | __le32 action; | |
4067 | __le32 reserved; | |
4068 | __u8 mac_addr[6]; | |
4069 | __u8 encr_type; | |
4070 | ||
ba30c4a5 | 4071 | } __packed; |
fcdc403c NS |
4072 | |
4073 | struct mwl8k_cmd_set_key { | |
4074 | struct mwl8k_cmd_pkt header; | |
4075 | ||
4076 | __le32 action; | |
4077 | __le32 reserved; | |
4078 | __le16 length; | |
4079 | __le16 key_type_id; | |
4080 | __le32 key_info; | |
4081 | __le32 key_id; | |
4082 | __le16 key_len; | |
4083 | __u8 key_material[MAX_ENCR_KEY_LENGTH]; | |
4084 | __u8 tkip_tx_mic_key[MIC_KEY_LENGTH]; | |
4085 | __u8 tkip_rx_mic_key[MIC_KEY_LENGTH]; | |
4086 | __le16 tkip_rsc_low; | |
4087 | __le32 tkip_rsc_high; | |
4088 | __le16 tkip_tsc_low; | |
4089 | __le32 tkip_tsc_high; | |
4090 | __u8 mac_addr[6]; | |
ba30c4a5 | 4091 | } __packed; |
fcdc403c NS |
4092 | |
4093 | enum { | |
4094 | MWL8K_ENCR_ENABLE, | |
4095 | MWL8K_ENCR_SET_KEY, | |
4096 | MWL8K_ENCR_REMOVE_KEY, | |
4097 | MWL8K_ENCR_SET_GROUP_KEY, | |
4098 | }; | |
4099 | ||
4100 | #define MWL8K_UPDATE_ENCRYPTION_TYPE_WEP 0 | |
4101 | #define MWL8K_UPDATE_ENCRYPTION_TYPE_DISABLE 1 | |
4102 | #define MWL8K_UPDATE_ENCRYPTION_TYPE_TKIP 4 | |
4103 | #define MWL8K_UPDATE_ENCRYPTION_TYPE_MIXED 7 | |
4104 | #define MWL8K_UPDATE_ENCRYPTION_TYPE_AES 8 | |
4105 | ||
4106 | enum { | |
4107 | MWL8K_ALG_WEP, | |
4108 | MWL8K_ALG_TKIP, | |
4109 | MWL8K_ALG_CCMP, | |
4110 | }; | |
4111 | ||
4112 | #define MWL8K_KEY_FLAG_TXGROUPKEY 0x00000004 | |
4113 | #define MWL8K_KEY_FLAG_PAIRWISE 0x00000008 | |
4114 | #define MWL8K_KEY_FLAG_TSC_VALID 0x00000040 | |
4115 | #define MWL8K_KEY_FLAG_WEP_TXKEY 0x01000000 | |
4116 | #define MWL8K_KEY_FLAG_MICKEY_VALID 0x02000000 | |
4117 | ||
4118 | static int mwl8k_cmd_update_encryption_enable(struct ieee80211_hw *hw, | |
4119 | struct ieee80211_vif *vif, | |
4120 | u8 *addr, | |
4121 | u8 encr_type) | |
4122 | { | |
4123 | struct mwl8k_cmd_update_encryption *cmd; | |
4124 | int rc; | |
4125 | ||
4126 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
4127 | if (cmd == NULL) | |
4128 | return -ENOMEM; | |
4129 | ||
4130 | cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_ENCRYPTION); | |
4131 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
4132 | cmd->action = cpu_to_le32(MWL8K_ENCR_ENABLE); | |
4133 | memcpy(cmd->mac_addr, addr, ETH_ALEN); | |
4134 | cmd->encr_type = encr_type; | |
4135 | ||
4136 | rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header); | |
4137 | kfree(cmd); | |
4138 | ||
4139 | return rc; | |
4140 | } | |
4141 | ||
4142 | static int mwl8k_encryption_set_cmd_info(struct mwl8k_cmd_set_key *cmd, | |
4143 | u8 *addr, | |
4144 | struct ieee80211_key_conf *key) | |
4145 | { | |
4146 | cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_ENCRYPTION); | |
4147 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
4148 | cmd->length = cpu_to_le16(sizeof(*cmd) - | |
4149 | offsetof(struct mwl8k_cmd_set_key, length)); | |
4150 | cmd->key_id = cpu_to_le32(key->keyidx); | |
4151 | cmd->key_len = cpu_to_le16(key->keylen); | |
4152 | memcpy(cmd->mac_addr, addr, ETH_ALEN); | |
4153 | ||
4154 | switch (key->cipher) { | |
4155 | case WLAN_CIPHER_SUITE_WEP40: | |
4156 | case WLAN_CIPHER_SUITE_WEP104: | |
4157 | cmd->key_type_id = cpu_to_le16(MWL8K_ALG_WEP); | |
4158 | if (key->keyidx == 0) | |
4159 | cmd->key_info = cpu_to_le32(MWL8K_KEY_FLAG_WEP_TXKEY); | |
4160 | ||
4161 | break; | |
4162 | case WLAN_CIPHER_SUITE_TKIP: | |
4163 | cmd->key_type_id = cpu_to_le16(MWL8K_ALG_TKIP); | |
4164 | cmd->key_info = (key->flags & IEEE80211_KEY_FLAG_PAIRWISE) | |
4165 | ? cpu_to_le32(MWL8K_KEY_FLAG_PAIRWISE) | |
4166 | : cpu_to_le32(MWL8K_KEY_FLAG_TXGROUPKEY); | |
4167 | cmd->key_info |= cpu_to_le32(MWL8K_KEY_FLAG_MICKEY_VALID | |
4168 | | MWL8K_KEY_FLAG_TSC_VALID); | |
4169 | break; | |
4170 | case WLAN_CIPHER_SUITE_CCMP: | |
4171 | cmd->key_type_id = cpu_to_le16(MWL8K_ALG_CCMP); | |
4172 | cmd->key_info = (key->flags & IEEE80211_KEY_FLAG_PAIRWISE) | |
4173 | ? cpu_to_le32(MWL8K_KEY_FLAG_PAIRWISE) | |
4174 | : cpu_to_le32(MWL8K_KEY_FLAG_TXGROUPKEY); | |
4175 | break; | |
4176 | default: | |
4177 | return -ENOTSUPP; | |
4178 | } | |
4179 | ||
4180 | return 0; | |
4181 | } | |
4182 | ||
4183 | static int mwl8k_cmd_encryption_set_key(struct ieee80211_hw *hw, | |
4184 | struct ieee80211_vif *vif, | |
4185 | u8 *addr, | |
4186 | struct ieee80211_key_conf *key) | |
4187 | { | |
4188 | struct mwl8k_cmd_set_key *cmd; | |
4189 | int rc; | |
4190 | int keymlen; | |
4191 | u32 action; | |
4192 | u8 idx; | |
4193 | struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif); | |
4194 | ||
4195 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
4196 | if (cmd == NULL) | |
4197 | return -ENOMEM; | |
4198 | ||
4199 | rc = mwl8k_encryption_set_cmd_info(cmd, addr, key); | |
4200 | if (rc < 0) | |
4201 | goto done; | |
4202 | ||
4203 | idx = key->keyidx; | |
4204 | ||
4205 | if (key->flags & IEEE80211_KEY_FLAG_PAIRWISE) | |
4206 | action = MWL8K_ENCR_SET_KEY; | |
4207 | else | |
4208 | action = MWL8K_ENCR_SET_GROUP_KEY; | |
4209 | ||
4210 | switch (key->cipher) { | |
4211 | case WLAN_CIPHER_SUITE_WEP40: | |
4212 | case WLAN_CIPHER_SUITE_WEP104: | |
4213 | if (!mwl8k_vif->wep_key_conf[idx].enabled) { | |
4214 | memcpy(mwl8k_vif->wep_key_conf[idx].key, key, | |
4215 | sizeof(*key) + key->keylen); | |
4216 | mwl8k_vif->wep_key_conf[idx].enabled = 1; | |
4217 | } | |
4218 | ||
9b571e24 | 4219 | keymlen = key->keylen; |
fcdc403c NS |
4220 | action = MWL8K_ENCR_SET_KEY; |
4221 | break; | |
4222 | case WLAN_CIPHER_SUITE_TKIP: | |
4223 | keymlen = MAX_ENCR_KEY_LENGTH + 2 * MIC_KEY_LENGTH; | |
4224 | break; | |
4225 | case WLAN_CIPHER_SUITE_CCMP: | |
4226 | keymlen = key->keylen; | |
4227 | break; | |
4228 | default: | |
4229 | rc = -ENOTSUPP; | |
4230 | goto done; | |
4231 | } | |
4232 | ||
4233 | memcpy(cmd->key_material, key->key, keymlen); | |
4234 | cmd->action = cpu_to_le32(action); | |
4235 | ||
4236 | rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header); | |
4237 | done: | |
4238 | kfree(cmd); | |
4239 | ||
4240 | return rc; | |
4241 | } | |
4242 | ||
4243 | static int mwl8k_cmd_encryption_remove_key(struct ieee80211_hw *hw, | |
4244 | struct ieee80211_vif *vif, | |
4245 | u8 *addr, | |
4246 | struct ieee80211_key_conf *key) | |
4247 | { | |
4248 | struct mwl8k_cmd_set_key *cmd; | |
4249 | int rc; | |
4250 | struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif); | |
4251 | ||
4252 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
4253 | if (cmd == NULL) | |
4254 | return -ENOMEM; | |
4255 | ||
4256 | rc = mwl8k_encryption_set_cmd_info(cmd, addr, key); | |
4257 | if (rc < 0) | |
4258 | goto done; | |
4259 | ||
4260 | if (key->cipher == WLAN_CIPHER_SUITE_WEP40 || | |
d981e059 | 4261 | key->cipher == WLAN_CIPHER_SUITE_WEP104) |
fcdc403c NS |
4262 | mwl8k_vif->wep_key_conf[key->keyidx].enabled = 0; |
4263 | ||
4264 | cmd->action = cpu_to_le32(MWL8K_ENCR_REMOVE_KEY); | |
4265 | ||
4266 | rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header); | |
4267 | done: | |
4268 | kfree(cmd); | |
4269 | ||
4270 | return rc; | |
4271 | } | |
4272 | ||
4273 | static int mwl8k_set_key(struct ieee80211_hw *hw, | |
4274 | enum set_key_cmd cmd_param, | |
4275 | struct ieee80211_vif *vif, | |
4276 | struct ieee80211_sta *sta, | |
4277 | struct ieee80211_key_conf *key) | |
4278 | { | |
4279 | int rc = 0; | |
4280 | u8 encr_type; | |
4281 | u8 *addr; | |
4282 | struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif); | |
751930cb | 4283 | struct mwl8k_priv *priv = hw->priv; |
fcdc403c | 4284 | |
751930cb | 4285 | if (vif->type == NL80211_IFTYPE_STATION && !priv->ap_fw) |
fcdc403c NS |
4286 | return -EOPNOTSUPP; |
4287 | ||
4288 | if (sta == NULL) | |
ff7e9f99 | 4289 | addr = vif->addr; |
fcdc403c NS |
4290 | else |
4291 | addr = sta->addr; | |
4292 | ||
4293 | if (cmd_param == SET_KEY) { | |
fcdc403c NS |
4294 | rc = mwl8k_cmd_encryption_set_key(hw, vif, addr, key); |
4295 | if (rc) | |
4296 | goto out; | |
4297 | ||
4298 | if ((key->cipher == WLAN_CIPHER_SUITE_WEP40) | |
4299 | || (key->cipher == WLAN_CIPHER_SUITE_WEP104)) | |
4300 | encr_type = MWL8K_UPDATE_ENCRYPTION_TYPE_WEP; | |
4301 | else | |
4302 | encr_type = MWL8K_UPDATE_ENCRYPTION_TYPE_MIXED; | |
4303 | ||
4304 | rc = mwl8k_cmd_update_encryption_enable(hw, vif, addr, | |
4305 | encr_type); | |
4306 | if (rc) | |
4307 | goto out; | |
4308 | ||
4309 | mwl8k_vif->is_hw_crypto_enabled = true; | |
4310 | ||
4311 | } else { | |
4312 | rc = mwl8k_cmd_encryption_remove_key(hw, vif, addr, key); | |
4313 | ||
4314 | if (rc) | |
4315 | goto out; | |
fcdc403c NS |
4316 | } |
4317 | out: | |
4318 | return rc; | |
4319 | } | |
4320 | ||
55489b6e LB |
4321 | /* |
4322 | * CMD_UPDATE_STADB. | |
4323 | */ | |
25d81b1e LB |
4324 | struct ewc_ht_info { |
4325 | __le16 control1; | |
4326 | __le16 control2; | |
4327 | __le16 control3; | |
ba2d3587 | 4328 | } __packed; |
25d81b1e LB |
4329 | |
4330 | struct peer_capability_info { | |
4331 | /* Peer type - AP vs. STA. */ | |
4332 | __u8 peer_type; | |
4333 | ||
4334 | /* Basic 802.11 capabilities from assoc resp. */ | |
4335 | __le16 basic_caps; | |
4336 | ||
4337 | /* Set if peer supports 802.11n high throughput (HT). */ | |
4338 | __u8 ht_support; | |
4339 | ||
4340 | /* Valid if HT is supported. */ | |
4341 | __le16 ht_caps; | |
4342 | __u8 extended_ht_caps; | |
4343 | struct ewc_ht_info ewc_info; | |
4344 | ||
4345 | /* Legacy rate table. Intersection of our rates and peer rates. */ | |
4346 | __u8 legacy_rates[12]; | |
4347 | ||
4348 | /* HT rate table. Intersection of our rates and peer rates. */ | |
4349 | __u8 ht_rates[16]; | |
4350 | __u8 pad[16]; | |
4351 | ||
4352 | /* If set, interoperability mode, no proprietary extensions. */ | |
4353 | __u8 interop; | |
4354 | __u8 pad2; | |
4355 | __u8 station_id; | |
4356 | __le16 amsdu_enabled; | |
ba2d3587 | 4357 | } __packed; |
25d81b1e | 4358 | |
55489b6e LB |
4359 | struct mwl8k_cmd_update_stadb { |
4360 | struct mwl8k_cmd_pkt header; | |
4361 | ||
4362 | /* See STADB_ACTION_TYPE */ | |
4363 | __le32 action; | |
4364 | ||
4365 | /* Peer MAC address */ | |
4366 | __u8 peer_addr[ETH_ALEN]; | |
4367 | ||
4368 | __le32 reserved; | |
4369 | ||
4370 | /* Peer info - valid during add/update. */ | |
4371 | struct peer_capability_info peer_info; | |
ba2d3587 | 4372 | } __packed; |
55489b6e | 4373 | |
a680400e LB |
4374 | #define MWL8K_STA_DB_MODIFY_ENTRY 1 |
4375 | #define MWL8K_STA_DB_DEL_ENTRY 2 | |
4376 | ||
4377 | /* Peer Entry flags - used to define the type of the peer node */ | |
4378 | #define MWL8K_PEER_TYPE_ACCESSPOINT 2 | |
4379 | ||
4380 | static int mwl8k_cmd_update_stadb_add(struct ieee80211_hw *hw, | |
c6e96010 | 4381 | struct ieee80211_vif *vif, |
13935e2c | 4382 | struct ieee80211_sta *sta) |
55489b6e | 4383 | { |
55489b6e | 4384 | struct mwl8k_cmd_update_stadb *cmd; |
a680400e | 4385 | struct peer_capability_info *p; |
8707d026 | 4386 | u32 rates; |
55489b6e LB |
4387 | int rc; |
4388 | ||
4389 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
4390 | if (cmd == NULL) | |
4391 | return -ENOMEM; | |
4392 | ||
4393 | cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB); | |
4394 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
a680400e | 4395 | cmd->action = cpu_to_le32(MWL8K_STA_DB_MODIFY_ENTRY); |
13935e2c | 4396 | memcpy(cmd->peer_addr, sta->addr, ETH_ALEN); |
55489b6e | 4397 | |
a680400e LB |
4398 | p = &cmd->peer_info; |
4399 | p->peer_type = MWL8K_PEER_TYPE_ACCESSPOINT; | |
4400 | p->basic_caps = cpu_to_le16(vif->bss_conf.assoc_capability); | |
13935e2c | 4401 | p->ht_support = sta->ht_cap.ht_supported; |
b603742f | 4402 | p->ht_caps = cpu_to_le16(sta->ht_cap.cap); |
13935e2c LB |
4403 | p->extended_ht_caps = (sta->ht_cap.ampdu_factor & 3) | |
4404 | ((sta->ht_cap.ampdu_density & 7) << 2); | |
675a0b04 | 4405 | if (hw->conf.chandef.chan->band == IEEE80211_BAND_2GHZ) |
8707d026 LB |
4406 | rates = sta->supp_rates[IEEE80211_BAND_2GHZ]; |
4407 | else | |
4408 | rates = sta->supp_rates[IEEE80211_BAND_5GHZ] << 5; | |
4409 | legacy_rate_mask_to_array(p->legacy_rates, rates); | |
13935e2c | 4410 | memcpy(p->ht_rates, sta->ht_cap.mcs.rx_mask, 16); |
a680400e LB |
4411 | p->interop = 1; |
4412 | p->amsdu_enabled = 0; | |
4413 | ||
4414 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
c4f74d35 NZ |
4415 | if (!rc) |
4416 | rc = p->station_id; | |
a680400e LB |
4417 | kfree(cmd); |
4418 | ||
c4f74d35 | 4419 | return rc; |
a680400e LB |
4420 | } |
4421 | ||
4422 | static int mwl8k_cmd_update_stadb_del(struct ieee80211_hw *hw, | |
4423 | struct ieee80211_vif *vif, u8 *addr) | |
4424 | { | |
4425 | struct mwl8k_cmd_update_stadb *cmd; | |
4426 | int rc; | |
4427 | ||
4428 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
4429 | if (cmd == NULL) | |
4430 | return -ENOMEM; | |
4431 | ||
4432 | cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB); | |
4433 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
4434 | cmd->action = cpu_to_le32(MWL8K_STA_DB_DEL_ENTRY); | |
bbfd9128 | 4435 | memcpy(cmd->peer_addr, addr, ETH_ALEN); |
55489b6e | 4436 | |
a680400e | 4437 | rc = mwl8k_post_cmd(hw, &cmd->header); |
55489b6e LB |
4438 | kfree(cmd); |
4439 | ||
4440 | return rc; | |
4441 | } | |
4442 | ||
a66098da LB |
4443 | |
4444 | /* | |
4445 | * Interrupt handling. | |
4446 | */ | |
4447 | static irqreturn_t mwl8k_interrupt(int irq, void *dev_id) | |
4448 | { | |
4449 | struct ieee80211_hw *hw = dev_id; | |
4450 | struct mwl8k_priv *priv = hw->priv; | |
4451 | u32 status; | |
4452 | ||
4453 | status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS); | |
a66098da LB |
4454 | if (!status) |
4455 | return IRQ_NONE; | |
4456 | ||
1e9f9de3 LB |
4457 | if (status & MWL8K_A2H_INT_TX_DONE) { |
4458 | status &= ~MWL8K_A2H_INT_TX_DONE; | |
4459 | tasklet_schedule(&priv->poll_tx_task); | |
4460 | } | |
4461 | ||
a66098da | 4462 | if (status & MWL8K_A2H_INT_RX_READY) { |
67e2eb27 LB |
4463 | status &= ~MWL8K_A2H_INT_RX_READY; |
4464 | tasklet_schedule(&priv->poll_rx_task); | |
a66098da LB |
4465 | } |
4466 | ||
3aefc37e | 4467 | if (status & MWL8K_A2H_INT_BA_WATCHDOG) { |
c27a54d3 YAP |
4468 | iowrite32(~MWL8K_A2H_INT_BA_WATCHDOG, |
4469 | priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK); | |
4470 | ||
4471 | atomic_inc(&priv->watchdog_event_pending); | |
3aefc37e NS |
4472 | status &= ~MWL8K_A2H_INT_BA_WATCHDOG; |
4473 | ieee80211_queue_work(hw, &priv->watchdog_ba_handle); | |
4474 | } | |
4475 | ||
67e2eb27 LB |
4476 | if (status) |
4477 | iowrite32(~status, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS); | |
4478 | ||
a66098da | 4479 | if (status & MWL8K_A2H_INT_OPC_DONE) { |
618952a7 | 4480 | if (priv->hostcmd_wait != NULL) |
a66098da | 4481 | complete(priv->hostcmd_wait); |
a66098da LB |
4482 | } |
4483 | ||
4484 | if (status & MWL8K_A2H_INT_QUEUE_EMPTY) { | |
618952a7 | 4485 | if (!mutex_is_locked(&priv->fw_mutex) && |
88de754a | 4486 | priv->radio_on && priv->pending_tx_pkts) |
618952a7 | 4487 | mwl8k_tx_start(priv); |
a66098da LB |
4488 | } |
4489 | ||
4490 | return IRQ_HANDLED; | |
4491 | } | |
4492 | ||
1e9f9de3 LB |
4493 | static void mwl8k_tx_poll(unsigned long data) |
4494 | { | |
4495 | struct ieee80211_hw *hw = (struct ieee80211_hw *)data; | |
4496 | struct mwl8k_priv *priv = hw->priv; | |
4497 | int limit; | |
4498 | int i; | |
4499 | ||
4500 | limit = 32; | |
4501 | ||
4502 | spin_lock_bh(&priv->tx_lock); | |
4503 | ||
e600707b | 4504 | for (i = 0; i < mwl8k_tx_queues(priv); i++) |
1e9f9de3 LB |
4505 | limit -= mwl8k_txq_reclaim(hw, i, limit, 0); |
4506 | ||
4507 | if (!priv->pending_tx_pkts && priv->tx_wait != NULL) { | |
4508 | complete(priv->tx_wait); | |
4509 | priv->tx_wait = NULL; | |
4510 | } | |
4511 | ||
4512 | spin_unlock_bh(&priv->tx_lock); | |
4513 | ||
4514 | if (limit) { | |
4515 | writel(~MWL8K_A2H_INT_TX_DONE, | |
4516 | priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS); | |
4517 | } else { | |
4518 | tasklet_schedule(&priv->poll_tx_task); | |
4519 | } | |
4520 | } | |
4521 | ||
67e2eb27 LB |
4522 | static void mwl8k_rx_poll(unsigned long data) |
4523 | { | |
4524 | struct ieee80211_hw *hw = (struct ieee80211_hw *)data; | |
4525 | struct mwl8k_priv *priv = hw->priv; | |
4526 | int limit; | |
4527 | ||
4528 | limit = 32; | |
4529 | limit -= rxq_process(hw, 0, limit); | |
4530 | limit -= rxq_refill(hw, 0, limit); | |
4531 | ||
4532 | if (limit) { | |
4533 | writel(~MWL8K_A2H_INT_RX_READY, | |
4534 | priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS); | |
4535 | } else { | |
4536 | tasklet_schedule(&priv->poll_rx_task); | |
4537 | } | |
4538 | } | |
4539 | ||
a66098da LB |
4540 | |
4541 | /* | |
4542 | * Core driver operations. | |
4543 | */ | |
36323f81 TH |
4544 | static void mwl8k_tx(struct ieee80211_hw *hw, |
4545 | struct ieee80211_tx_control *control, | |
4546 | struct sk_buff *skb) | |
a66098da LB |
4547 | { |
4548 | struct mwl8k_priv *priv = hw->priv; | |
4549 | int index = skb_get_queue_mapping(skb); | |
a66098da | 4550 | |
9189c100 | 4551 | if (!priv->radio_on) { |
c96c31e4 JP |
4552 | wiphy_debug(hw->wiphy, |
4553 | "dropped TX frame since radio disabled\n"); | |
a66098da | 4554 | dev_kfree_skb(skb); |
7bb45683 | 4555 | return; |
a66098da LB |
4556 | } |
4557 | ||
36323f81 | 4558 | mwl8k_txq_xmit(hw, index, control->sta, skb); |
a66098da LB |
4559 | } |
4560 | ||
a66098da LB |
4561 | static int mwl8k_start(struct ieee80211_hw *hw) |
4562 | { | |
a66098da LB |
4563 | struct mwl8k_priv *priv = hw->priv; |
4564 | int rc; | |
4565 | ||
a0607fd3 | 4566 | rc = request_irq(priv->pdev->irq, mwl8k_interrupt, |
a66098da LB |
4567 | IRQF_SHARED, MWL8K_NAME, hw); |
4568 | if (rc) { | |
bf3ca7f7 | 4569 | priv->irq = -1; |
5db55844 | 4570 | wiphy_err(hw->wiphy, "failed to register IRQ handler\n"); |
2ec610cb | 4571 | return -EIO; |
a66098da | 4572 | } |
bf3ca7f7 | 4573 | priv->irq = priv->pdev->irq; |
a66098da | 4574 | |
67e2eb27 | 4575 | /* Enable TX reclaim and RX tasklets. */ |
1e9f9de3 | 4576 | tasklet_enable(&priv->poll_tx_task); |
67e2eb27 | 4577 | tasklet_enable(&priv->poll_rx_task); |
2ec610cb | 4578 | |
a66098da | 4579 | /* Enable interrupts */ |
c23b5a69 | 4580 | iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK); |
12488e01 NS |
4581 | iowrite32(MWL8K_A2H_EVENTS, |
4582 | priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK); | |
a66098da | 4583 | |
2ec610cb LB |
4584 | rc = mwl8k_fw_lock(hw); |
4585 | if (!rc) { | |
55489b6e | 4586 | rc = mwl8k_cmd_radio_enable(hw); |
a66098da | 4587 | |
5e4cf166 LB |
4588 | if (!priv->ap_fw) { |
4589 | if (!rc) | |
55489b6e | 4590 | rc = mwl8k_cmd_enable_sniffer(hw, 0); |
a66098da | 4591 | |
5e4cf166 LB |
4592 | if (!rc) |
4593 | rc = mwl8k_cmd_set_pre_scan(hw); | |
4594 | ||
4595 | if (!rc) | |
4596 | rc = mwl8k_cmd_set_post_scan(hw, | |
4597 | "\x00\x00\x00\x00\x00\x00"); | |
4598 | } | |
2ec610cb LB |
4599 | |
4600 | if (!rc) | |
55489b6e | 4601 | rc = mwl8k_cmd_set_rateadapt_mode(hw, 0); |
a66098da | 4602 | |
2ec610cb | 4603 | if (!rc) |
55489b6e | 4604 | rc = mwl8k_cmd_set_wmm_mode(hw, 0); |
a66098da | 4605 | |
2ec610cb LB |
4606 | mwl8k_fw_unlock(hw); |
4607 | } | |
4608 | ||
4609 | if (rc) { | |
4610 | iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK); | |
4611 | free_irq(priv->pdev->irq, hw); | |
bf3ca7f7 | 4612 | priv->irq = -1; |
1e9f9de3 | 4613 | tasklet_disable(&priv->poll_tx_task); |
67e2eb27 | 4614 | tasklet_disable(&priv->poll_rx_task); |
4850b6d3 NS |
4615 | } else { |
4616 | ieee80211_wake_queues(hw); | |
2ec610cb | 4617 | } |
a66098da LB |
4618 | |
4619 | return rc; | |
4620 | } | |
4621 | ||
a66098da LB |
4622 | static void mwl8k_stop(struct ieee80211_hw *hw) |
4623 | { | |
a66098da LB |
4624 | struct mwl8k_priv *priv = hw->priv; |
4625 | int i; | |
4626 | ||
6b6accc3 YAP |
4627 | if (!priv->hw_restart_in_progress) |
4628 | mwl8k_cmd_radio_disable(hw); | |
a66098da LB |
4629 | |
4630 | ieee80211_stop_queues(hw); | |
4631 | ||
a66098da | 4632 | /* Disable interrupts */ |
a66098da | 4633 | iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK); |
bf3ca7f7 BC |
4634 | if (priv->irq != -1) { |
4635 | free_irq(priv->pdev->irq, hw); | |
4636 | priv->irq = -1; | |
4637 | } | |
a66098da LB |
4638 | |
4639 | /* Stop finalize join worker */ | |
4640 | cancel_work_sync(&priv->finalize_join_worker); | |
3aefc37e | 4641 | cancel_work_sync(&priv->watchdog_ba_handle); |
a66098da LB |
4642 | if (priv->beacon_skb != NULL) |
4643 | dev_kfree_skb(priv->beacon_skb); | |
4644 | ||
67e2eb27 | 4645 | /* Stop TX reclaim and RX tasklets. */ |
1e9f9de3 | 4646 | tasklet_disable(&priv->poll_tx_task); |
67e2eb27 | 4647 | tasklet_disable(&priv->poll_rx_task); |
a66098da | 4648 | |
a66098da | 4649 | /* Return all skbs to mac80211 */ |
e600707b | 4650 | for (i = 0; i < mwl8k_tx_queues(priv); i++) |
efb7c49a | 4651 | mwl8k_txq_reclaim(hw, i, INT_MAX, 1); |
a66098da LB |
4652 | } |
4653 | ||
0863ade8 BC |
4654 | static int mwl8k_reload_firmware(struct ieee80211_hw *hw, char *fw_image); |
4655 | ||
a66098da | 4656 | static int mwl8k_add_interface(struct ieee80211_hw *hw, |
f5bb87cf | 4657 | struct ieee80211_vif *vif) |
a66098da LB |
4658 | { |
4659 | struct mwl8k_priv *priv = hw->priv; | |
4660 | struct mwl8k_vif *mwl8k_vif; | |
ee0ddf18 | 4661 | u32 macids_supported; |
0863ade8 BC |
4662 | int macid, rc; |
4663 | struct mwl8k_device_info *di; | |
a66098da | 4664 | |
a43c49a8 LB |
4665 | /* |
4666 | * Reject interface creation if sniffer mode is active, as | |
4667 | * STA operation is mutually exclusive with hardware sniffer | |
b64fe619 | 4668 | * mode. (Sniffer mode is only used on STA firmware.) |
a43c49a8 LB |
4669 | */ |
4670 | if (priv->sniffer_enabled) { | |
c96c31e4 JP |
4671 | wiphy_info(hw->wiphy, |
4672 | "unable to create STA interface because sniffer mode is enabled\n"); | |
a43c49a8 LB |
4673 | return -EINVAL; |
4674 | } | |
4675 | ||
0863ade8 | 4676 | di = priv->device_info; |
ee0ddf18 LB |
4677 | switch (vif->type) { |
4678 | case NL80211_IFTYPE_AP: | |
0863ade8 BC |
4679 | if (!priv->ap_fw && di->fw_image_ap) { |
4680 | /* we must load the ap fw to meet this request */ | |
4681 | if (!list_empty(&priv->vif_list)) | |
4682 | return -EBUSY; | |
4683 | rc = mwl8k_reload_firmware(hw, di->fw_image_ap); | |
4684 | if (rc) | |
4685 | return rc; | |
4686 | } | |
ee0ddf18 LB |
4687 | macids_supported = priv->ap_macids_supported; |
4688 | break; | |
4689 | case NL80211_IFTYPE_STATION: | |
0863ade8 | 4690 | if (priv->ap_fw && di->fw_image_sta) { |
d59c1cfd YAP |
4691 | if (!list_empty(&priv->vif_list)) { |
4692 | wiphy_warn(hw->wiphy, "AP interface is running.\n" | |
4693 | "Adding STA interface for WDS"); | |
4694 | } else { | |
4695 | /* we must load the sta fw to | |
4696 | * meet this request. | |
4697 | */ | |
4698 | rc = mwl8k_reload_firmware(hw, | |
4699 | di->fw_image_sta); | |
4700 | if (rc) | |
4701 | return rc; | |
4702 | } | |
0863ade8 | 4703 | } |
ee0ddf18 LB |
4704 | macids_supported = priv->sta_macids_supported; |
4705 | break; | |
4706 | default: | |
4707 | return -EINVAL; | |
4708 | } | |
4709 | ||
4710 | macid = ffs(macids_supported & ~priv->macids_used); | |
4711 | if (!macid--) | |
4712 | return -EBUSY; | |
4713 | ||
f5bb87cf | 4714 | /* Setup driver private area. */ |
1ed32e4f | 4715 | mwl8k_vif = MWL8K_VIF(vif); |
a66098da | 4716 | memset(mwl8k_vif, 0, sizeof(*mwl8k_vif)); |
f5bb87cf | 4717 | mwl8k_vif->vif = vif; |
ee0ddf18 | 4718 | mwl8k_vif->macid = macid; |
a66098da | 4719 | mwl8k_vif->seqno = 0; |
d9a07d49 NS |
4720 | memcpy(mwl8k_vif->bssid, vif->addr, ETH_ALEN); |
4721 | mwl8k_vif->is_hw_crypto_enabled = false; | |
a66098da | 4722 | |
aa21d0f6 LB |
4723 | /* Set the mac address. */ |
4724 | mwl8k_cmd_set_mac_addr(hw, vif, vif->addr); | |
4725 | ||
d994a1c8 | 4726 | if (vif->type == NL80211_IFTYPE_AP) |
aa21d0f6 LB |
4727 | mwl8k_cmd_set_new_stn_add_self(hw, vif); |
4728 | ||
ee0ddf18 | 4729 | priv->macids_used |= 1 << mwl8k_vif->macid; |
f5bb87cf | 4730 | list_add_tail(&mwl8k_vif->list, &priv->vif_list); |
a66098da LB |
4731 | |
4732 | return 0; | |
4733 | } | |
4734 | ||
6b6accc3 YAP |
4735 | static void mwl8k_remove_vif(struct mwl8k_priv *priv, struct mwl8k_vif *vif) |
4736 | { | |
4737 | /* Has ieee80211_restart_hw re-added the removed interfaces? */ | |
4738 | if (!priv->macids_used) | |
4739 | return; | |
4740 | ||
4741 | priv->macids_used &= ~(1 << vif->macid); | |
4742 | list_del(&vif->list); | |
4743 | } | |
4744 | ||
a66098da | 4745 | static void mwl8k_remove_interface(struct ieee80211_hw *hw, |
1ed32e4f | 4746 | struct ieee80211_vif *vif) |
a66098da LB |
4747 | { |
4748 | struct mwl8k_priv *priv = hw->priv; | |
f5bb87cf | 4749 | struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif); |
a66098da | 4750 | |
d994a1c8 | 4751 | if (vif->type == NL80211_IFTYPE_AP) |
b64fe619 LB |
4752 | mwl8k_cmd_set_new_stn_del(hw, vif, vif->addr); |
4753 | ||
197a4e4e | 4754 | mwl8k_cmd_del_mac_addr(hw, vif, vif->addr); |
32060e1b | 4755 | |
6b6accc3 YAP |
4756 | mwl8k_remove_vif(priv, mwl8k_vif); |
4757 | } | |
4758 | ||
4759 | static void mwl8k_hw_restart_work(struct work_struct *work) | |
4760 | { | |
4761 | struct mwl8k_priv *priv = | |
4762 | container_of(work, struct mwl8k_priv, fw_reload); | |
4763 | struct ieee80211_hw *hw = priv->hw; | |
4764 | struct mwl8k_device_info *di; | |
4765 | int rc; | |
4766 | ||
4767 | /* If some command is waiting for a response, clear it */ | |
4768 | if (priv->hostcmd_wait != NULL) { | |
4769 | complete(priv->hostcmd_wait); | |
4770 | priv->hostcmd_wait = NULL; | |
4771 | } | |
4772 | ||
4773 | priv->hw_restart_owner = current; | |
4774 | di = priv->device_info; | |
4775 | mwl8k_fw_lock(hw); | |
4776 | ||
4777 | if (priv->ap_fw) | |
4778 | rc = mwl8k_reload_firmware(hw, di->fw_image_ap); | |
4779 | else | |
4780 | rc = mwl8k_reload_firmware(hw, di->fw_image_sta); | |
4781 | ||
4782 | if (rc) | |
4783 | goto fail; | |
4784 | ||
4785 | priv->hw_restart_owner = NULL; | |
4786 | priv->hw_restart_in_progress = false; | |
4787 | ||
4788 | /* | |
4789 | * This unlock will wake up the queues and | |
4790 | * also opens the command path for other | |
4791 | * commands | |
4792 | */ | |
4793 | mwl8k_fw_unlock(hw); | |
4794 | ||
4795 | ieee80211_restart_hw(hw); | |
4796 | ||
4797 | wiphy_err(hw->wiphy, "Firmware restarted successfully\n"); | |
4798 | ||
4799 | return; | |
4800 | fail: | |
4801 | mwl8k_fw_unlock(hw); | |
4802 | ||
4803 | wiphy_err(hw->wiphy, "Firmware restart failed\n"); | |
a66098da LB |
4804 | } |
4805 | ||
ee03a932 | 4806 | static int mwl8k_config(struct ieee80211_hw *hw, u32 changed) |
a66098da | 4807 | { |
a66098da LB |
4808 | struct ieee80211_conf *conf = &hw->conf; |
4809 | struct mwl8k_priv *priv = hw->priv; | |
ee03a932 | 4810 | int rc; |
a66098da | 4811 | |
ee03a932 LB |
4812 | rc = mwl8k_fw_lock(hw); |
4813 | if (rc) | |
4814 | return rc; | |
a66098da | 4815 | |
fe21bb02 JG |
4816 | if (conf->flags & IEEE80211_CONF_IDLE) |
4817 | rc = mwl8k_cmd_radio_disable(hw); | |
4818 | else | |
4819 | rc = mwl8k_cmd_radio_enable(hw); | |
ee03a932 LB |
4820 | if (rc) |
4821 | goto out; | |
a66098da | 4822 | |
0f4316b9 YAP |
4823 | if (changed & IEEE80211_CONF_CHANGE_CHANNEL) { |
4824 | rc = mwl8k_cmd_set_rf_channel(hw, conf); | |
4825 | if (rc) | |
4826 | goto out; | |
4827 | } | |
ee03a932 | 4828 | |
a66098da LB |
4829 | if (conf->power_level > 18) |
4830 | conf->power_level = 18; | |
a66098da | 4831 | |
08b06347 | 4832 | if (priv->ap_fw) { |
03217087 NS |
4833 | |
4834 | if (conf->flags & IEEE80211_CONF_CHANGE_POWER) { | |
4835 | rc = mwl8k_cmd_tx_power(hw, conf, conf->power_level); | |
4836 | if (rc) | |
4837 | goto out; | |
4838 | } | |
41fdf097 | 4839 | |
da62b761 | 4840 | |
08b06347 | 4841 | } else { |
41fdf097 NS |
4842 | rc = mwl8k_cmd_rf_tx_power(hw, conf->power_level); |
4843 | if (rc) | |
4844 | goto out; | |
08b06347 LB |
4845 | rc = mwl8k_cmd_mimo_config(hw, 0x7, 0x7); |
4846 | } | |
a66098da | 4847 | |
ee03a932 LB |
4848 | out: |
4849 | mwl8k_fw_unlock(hw); | |
a66098da | 4850 | |
ee03a932 | 4851 | return rc; |
a66098da LB |
4852 | } |
4853 | ||
b64fe619 LB |
4854 | static void |
4855 | mwl8k_bss_info_changed_sta(struct ieee80211_hw *hw, struct ieee80211_vif *vif, | |
4856 | struct ieee80211_bss_conf *info, u32 changed) | |
a66098da | 4857 | { |
a66098da | 4858 | struct mwl8k_priv *priv = hw->priv; |
ba30c4a5 | 4859 | u32 ap_legacy_rates = 0; |
13935e2c | 4860 | u8 ap_mcs_rates[16]; |
3a980d0a LB |
4861 | int rc; |
4862 | ||
c3cbbe8a | 4863 | if (mwl8k_fw_lock(hw)) |
3a980d0a | 4864 | return; |
a66098da | 4865 | |
c3cbbe8a LB |
4866 | /* |
4867 | * No need to capture a beacon if we're no longer associated. | |
4868 | */ | |
4869 | if ((changed & BSS_CHANGED_ASSOC) && !vif->bss_conf.assoc) | |
4870 | priv->capture_beacon = false; | |
3a980d0a | 4871 | |
c3cbbe8a | 4872 | /* |
13935e2c | 4873 | * Get the AP's legacy and MCS rates. |
c3cbbe8a | 4874 | */ |
7dc6a7a7 | 4875 | if (vif->bss_conf.assoc) { |
c6e96010 | 4876 | struct ieee80211_sta *ap; |
c97470dd | 4877 | |
c6e96010 | 4878 | rcu_read_lock(); |
c6e96010 | 4879 | |
c3cbbe8a LB |
4880 | ap = ieee80211_find_sta(vif, vif->bss_conf.bssid); |
4881 | if (ap == NULL) { | |
4882 | rcu_read_unlock(); | |
c6e96010 | 4883 | goto out; |
c3cbbe8a LB |
4884 | } |
4885 | ||
675a0b04 | 4886 | if (hw->conf.chandef.chan->band == IEEE80211_BAND_2GHZ) { |
8707d026 LB |
4887 | ap_legacy_rates = ap->supp_rates[IEEE80211_BAND_2GHZ]; |
4888 | } else { | |
4889 | ap_legacy_rates = | |
4890 | ap->supp_rates[IEEE80211_BAND_5GHZ] << 5; | |
4891 | } | |
13935e2c | 4892 | memcpy(ap_mcs_rates, ap->ht_cap.mcs.rx_mask, 16); |
c3cbbe8a LB |
4893 | |
4894 | rcu_read_unlock(); | |
4895 | } | |
c6e96010 | 4896 | |
dcee7438 YAP |
4897 | if ((changed & BSS_CHANGED_ASSOC) && vif->bss_conf.assoc && |
4898 | !priv->ap_fw) { | |
13935e2c | 4899 | rc = mwl8k_cmd_set_rate(hw, vif, ap_legacy_rates, ap_mcs_rates); |
3a980d0a LB |
4900 | if (rc) |
4901 | goto out; | |
a66098da | 4902 | |
b71ed2c6 | 4903 | rc = mwl8k_cmd_use_fixed_rate_sta(hw); |
3a980d0a LB |
4904 | if (rc) |
4905 | goto out; | |
dcee7438 YAP |
4906 | } else { |
4907 | if ((changed & BSS_CHANGED_ASSOC) && vif->bss_conf.assoc && | |
4908 | priv->ap_fw) { | |
4909 | int idx; | |
4910 | int rate; | |
4911 | ||
4912 | /* Use AP firmware specific rate command. | |
4913 | */ | |
4914 | idx = ffs(vif->bss_conf.basic_rates); | |
4915 | if (idx) | |
4916 | idx--; | |
4917 | ||
675a0b04 | 4918 | if (hw->conf.chandef.chan->band == IEEE80211_BAND_2GHZ) |
dcee7438 YAP |
4919 | rate = mwl8k_rates_24[idx].hw_value; |
4920 | else | |
4921 | rate = mwl8k_rates_50[idx].hw_value; | |
4922 | ||
4923 | mwl8k_cmd_use_fixed_rate_ap(hw, rate, rate); | |
4924 | } | |
c3cbbe8a | 4925 | } |
a66098da | 4926 | |
c3cbbe8a | 4927 | if (changed & BSS_CHANGED_ERP_PREAMBLE) { |
7dc6a7a7 LB |
4928 | rc = mwl8k_set_radio_preamble(hw, |
4929 | vif->bss_conf.use_short_preamble); | |
3a980d0a LB |
4930 | if (rc) |
4931 | goto out; | |
c3cbbe8a | 4932 | } |
a66098da | 4933 | |
dcee7438 | 4934 | if ((changed & BSS_CHANGED_ERP_SLOT) && !priv->ap_fw) { |
7dc6a7a7 | 4935 | rc = mwl8k_cmd_set_slot(hw, vif->bss_conf.use_short_slot); |
3a980d0a LB |
4936 | if (rc) |
4937 | goto out; | |
c3cbbe8a | 4938 | } |
a66098da | 4939 | |
dcee7438 | 4940 | if (vif->bss_conf.assoc && !priv->ap_fw && |
c97470dd LB |
4941 | (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_ERP_CTS_PROT | |
4942 | BSS_CHANGED_HT))) { | |
c3cbbe8a | 4943 | rc = mwl8k_cmd_set_aid(hw, vif, ap_legacy_rates); |
3a980d0a LB |
4944 | if (rc) |
4945 | goto out; | |
c3cbbe8a | 4946 | } |
a66098da | 4947 | |
c3cbbe8a LB |
4948 | if (vif->bss_conf.assoc && |
4949 | (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_BEACON_INT))) { | |
a66098da LB |
4950 | /* |
4951 | * Finalize the join. Tell rx handler to process | |
4952 | * next beacon from our BSSID. | |
4953 | */ | |
0a11dfc3 | 4954 | memcpy(priv->capture_bssid, vif->bss_conf.bssid, ETH_ALEN); |
a66098da | 4955 | priv->capture_beacon = true; |
a66098da LB |
4956 | } |
4957 | ||
3a980d0a LB |
4958 | out: |
4959 | mwl8k_fw_unlock(hw); | |
a66098da LB |
4960 | } |
4961 | ||
b64fe619 LB |
4962 | static void |
4963 | mwl8k_bss_info_changed_ap(struct ieee80211_hw *hw, struct ieee80211_vif *vif, | |
4964 | struct ieee80211_bss_conf *info, u32 changed) | |
4965 | { | |
4966 | int rc; | |
4967 | ||
4968 | if (mwl8k_fw_lock(hw)) | |
4969 | return; | |
4970 | ||
4971 | if (changed & BSS_CHANGED_ERP_PREAMBLE) { | |
4972 | rc = mwl8k_set_radio_preamble(hw, | |
4973 | vif->bss_conf.use_short_preamble); | |
4974 | if (rc) | |
4975 | goto out; | |
4976 | } | |
4977 | ||
4978 | if (changed & BSS_CHANGED_BASIC_RATES) { | |
4979 | int idx; | |
4980 | int rate; | |
4981 | ||
4982 | /* | |
4983 | * Use lowest supported basic rate for multicasts | |
4984 | * and management frames (such as probe responses -- | |
4985 | * beacons will always go out at 1 Mb/s). | |
4986 | */ | |
4987 | idx = ffs(vif->bss_conf.basic_rates); | |
8707d026 LB |
4988 | if (idx) |
4989 | idx--; | |
4990 | ||
675a0b04 | 4991 | if (hw->conf.chandef.chan->band == IEEE80211_BAND_2GHZ) |
8707d026 LB |
4992 | rate = mwl8k_rates_24[idx].hw_value; |
4993 | else | |
4994 | rate = mwl8k_rates_50[idx].hw_value; | |
b64fe619 LB |
4995 | |
4996 | mwl8k_cmd_use_fixed_rate_ap(hw, rate, rate); | |
4997 | } | |
4998 | ||
4999 | if (changed & (BSS_CHANGED_BEACON_INT | BSS_CHANGED_BEACON)) { | |
5000 | struct sk_buff *skb; | |
5001 | ||
5002 | skb = ieee80211_beacon_get(hw, vif); | |
5003 | if (skb != NULL) { | |
aa21d0f6 | 5004 | mwl8k_cmd_set_beacon(hw, vif, skb->data, skb->len); |
b64fe619 LB |
5005 | kfree_skb(skb); |
5006 | } | |
5007 | } | |
5008 | ||
5009 | if (changed & BSS_CHANGED_BEACON_ENABLED) | |
aa21d0f6 | 5010 | mwl8k_cmd_bss_start(hw, vif, info->enable_beacon); |
b64fe619 LB |
5011 | |
5012 | out: | |
5013 | mwl8k_fw_unlock(hw); | |
5014 | } | |
5015 | ||
5016 | static void | |
5017 | mwl8k_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif, | |
5018 | struct ieee80211_bss_conf *info, u32 changed) | |
5019 | { | |
41bf9119 | 5020 | if (vif->type == NL80211_IFTYPE_STATION) |
b64fe619 | 5021 | mwl8k_bss_info_changed_sta(hw, vif, info, changed); |
41bf9119 | 5022 | if (vif->type == NL80211_IFTYPE_AP) |
b64fe619 LB |
5023 | mwl8k_bss_info_changed_ap(hw, vif, info, changed); |
5024 | } | |
5025 | ||
e81cd2d6 | 5026 | static u64 mwl8k_prepare_multicast(struct ieee80211_hw *hw, |
22bedad3 | 5027 | struct netdev_hw_addr_list *mc_list) |
e81cd2d6 LB |
5028 | { |
5029 | struct mwl8k_cmd_pkt *cmd; | |
5030 | ||
447ced07 LB |
5031 | /* |
5032 | * Synthesize and return a command packet that programs the | |
5033 | * hardware multicast address filter. At this point we don't | |
5034 | * know whether FIF_ALLMULTI is being requested, but if it is, | |
5035 | * we'll end up throwing this packet away and creating a new | |
5036 | * one in mwl8k_configure_filter(). | |
5037 | */ | |
22bedad3 | 5038 | cmd = __mwl8k_cmd_mac_multicast_adr(hw, 0, mc_list); |
e81cd2d6 LB |
5039 | |
5040 | return (unsigned long)cmd; | |
5041 | } | |
5042 | ||
a43c49a8 LB |
5043 | static int |
5044 | mwl8k_configure_filter_sniffer(struct ieee80211_hw *hw, | |
5045 | unsigned int changed_flags, | |
5046 | unsigned int *total_flags) | |
5047 | { | |
5048 | struct mwl8k_priv *priv = hw->priv; | |
5049 | ||
5050 | /* | |
5051 | * Hardware sniffer mode is mutually exclusive with STA | |
5052 | * operation, so refuse to enable sniffer mode if a STA | |
5053 | * interface is active. | |
5054 | */ | |
f5bb87cf | 5055 | if (!list_empty(&priv->vif_list)) { |
a43c49a8 | 5056 | if (net_ratelimit()) |
c96c31e4 JP |
5057 | wiphy_info(hw->wiphy, |
5058 | "not enabling sniffer mode because STA interface is active\n"); | |
a43c49a8 LB |
5059 | return 0; |
5060 | } | |
5061 | ||
5062 | if (!priv->sniffer_enabled) { | |
55489b6e | 5063 | if (mwl8k_cmd_enable_sniffer(hw, 1)) |
a43c49a8 LB |
5064 | return 0; |
5065 | priv->sniffer_enabled = true; | |
5066 | } | |
5067 | ||
5068 | *total_flags &= FIF_PROMISC_IN_BSS | FIF_ALLMULTI | | |
5069 | FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL | | |
5070 | FIF_OTHER_BSS; | |
5071 | ||
5072 | return 1; | |
5073 | } | |
5074 | ||
f5bb87cf LB |
5075 | static struct mwl8k_vif *mwl8k_first_vif(struct mwl8k_priv *priv) |
5076 | { | |
5077 | if (!list_empty(&priv->vif_list)) | |
5078 | return list_entry(priv->vif_list.next, struct mwl8k_vif, list); | |
5079 | ||
5080 | return NULL; | |
5081 | } | |
5082 | ||
e6935ea1 LB |
5083 | static void mwl8k_configure_filter(struct ieee80211_hw *hw, |
5084 | unsigned int changed_flags, | |
5085 | unsigned int *total_flags, | |
5086 | u64 multicast) | |
5087 | { | |
5088 | struct mwl8k_priv *priv = hw->priv; | |
a43c49a8 LB |
5089 | struct mwl8k_cmd_pkt *cmd = (void *)(unsigned long)multicast; |
5090 | ||
c0adae2c LB |
5091 | /* |
5092 | * AP firmware doesn't allow fine-grained control over | |
5093 | * the receive filter. | |
5094 | */ | |
5095 | if (priv->ap_fw) { | |
5096 | *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC; | |
5097 | kfree(cmd); | |
5098 | return; | |
5099 | } | |
5100 | ||
a43c49a8 LB |
5101 | /* |
5102 | * Enable hardware sniffer mode if FIF_CONTROL or | |
5103 | * FIF_OTHER_BSS is requested. | |
5104 | */ | |
5105 | if (*total_flags & (FIF_CONTROL | FIF_OTHER_BSS) && | |
5106 | mwl8k_configure_filter_sniffer(hw, changed_flags, total_flags)) { | |
5107 | kfree(cmd); | |
5108 | return; | |
5109 | } | |
a66098da | 5110 | |
e6935ea1 | 5111 | /* Clear unsupported feature flags */ |
447ced07 | 5112 | *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC; |
a66098da | 5113 | |
90852f7a LB |
5114 | if (mwl8k_fw_lock(hw)) { |
5115 | kfree(cmd); | |
e6935ea1 | 5116 | return; |
90852f7a | 5117 | } |
a66098da | 5118 | |
a43c49a8 | 5119 | if (priv->sniffer_enabled) { |
55489b6e | 5120 | mwl8k_cmd_enable_sniffer(hw, 0); |
a43c49a8 LB |
5121 | priv->sniffer_enabled = false; |
5122 | } | |
5123 | ||
e6935ea1 | 5124 | if (changed_flags & FIF_BCN_PRBRESP_PROMISC) { |
77165d88 LB |
5125 | if (*total_flags & FIF_BCN_PRBRESP_PROMISC) { |
5126 | /* | |
5127 | * Disable the BSS filter. | |
5128 | */ | |
e6935ea1 | 5129 | mwl8k_cmd_set_pre_scan(hw); |
77165d88 | 5130 | } else { |
f5bb87cf | 5131 | struct mwl8k_vif *mwl8k_vif; |
0a11dfc3 | 5132 | const u8 *bssid; |
a94cc97e | 5133 | |
77165d88 LB |
5134 | /* |
5135 | * Enable the BSS filter. | |
5136 | * | |
5137 | * If there is an active STA interface, use that | |
5138 | * interface's BSSID, otherwise use a dummy one | |
5139 | * (where the OUI part needs to be nonzero for | |
5140 | * the BSSID to be accepted by POST_SCAN). | |
5141 | */ | |
f5bb87cf LB |
5142 | mwl8k_vif = mwl8k_first_vif(priv); |
5143 | if (mwl8k_vif != NULL) | |
5144 | bssid = mwl8k_vif->vif->bss_conf.bssid; | |
5145 | else | |
5146 | bssid = "\x01\x00\x00\x00\x00\x00"; | |
a94cc97e | 5147 | |
e6935ea1 | 5148 | mwl8k_cmd_set_post_scan(hw, bssid); |
a66098da LB |
5149 | } |
5150 | } | |
5151 | ||
447ced07 LB |
5152 | /* |
5153 | * If FIF_ALLMULTI is being requested, throw away the command | |
5154 | * packet that ->prepare_multicast() built and replace it with | |
5155 | * a command packet that enables reception of all multicast | |
5156 | * packets. | |
5157 | */ | |
5158 | if (*total_flags & FIF_ALLMULTI) { | |
5159 | kfree(cmd); | |
22bedad3 | 5160 | cmd = __mwl8k_cmd_mac_multicast_adr(hw, 1, NULL); |
447ced07 LB |
5161 | } |
5162 | ||
5163 | if (cmd != NULL) { | |
5164 | mwl8k_post_cmd(hw, cmd); | |
5165 | kfree(cmd); | |
e6935ea1 | 5166 | } |
a66098da | 5167 | |
e6935ea1 | 5168 | mwl8k_fw_unlock(hw); |
a66098da LB |
5169 | } |
5170 | ||
a66098da LB |
5171 | static int mwl8k_set_rts_threshold(struct ieee80211_hw *hw, u32 value) |
5172 | { | |
c2c2b12a | 5173 | return mwl8k_cmd_set_rts_threshold(hw, value); |
a66098da LB |
5174 | } |
5175 | ||
4a6967b8 JB |
5176 | static int mwl8k_sta_remove(struct ieee80211_hw *hw, |
5177 | struct ieee80211_vif *vif, | |
5178 | struct ieee80211_sta *sta) | |
3f5610ff LB |
5179 | { |
5180 | struct mwl8k_priv *priv = hw->priv; | |
5181 | ||
4a6967b8 JB |
5182 | if (priv->ap_fw) |
5183 | return mwl8k_cmd_set_new_stn_del(hw, vif, sta->addr); | |
5184 | else | |
5185 | return mwl8k_cmd_update_stadb_del(hw, vif, sta->addr); | |
bbfd9128 LB |
5186 | } |
5187 | ||
4a6967b8 JB |
5188 | static int mwl8k_sta_add(struct ieee80211_hw *hw, |
5189 | struct ieee80211_vif *vif, | |
5190 | struct ieee80211_sta *sta) | |
bbfd9128 LB |
5191 | { |
5192 | struct mwl8k_priv *priv = hw->priv; | |
4a6967b8 | 5193 | int ret; |
fcdc403c NS |
5194 | int i; |
5195 | struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif); | |
5196 | struct ieee80211_key_conf *key; | |
bbfd9128 | 5197 | |
4a6967b8 JB |
5198 | if (!priv->ap_fw) { |
5199 | ret = mwl8k_cmd_update_stadb_add(hw, vif, sta); | |
5200 | if (ret >= 0) { | |
5201 | MWL8K_STA(sta)->peer_id = ret; | |
17033543 NS |
5202 | if (sta->ht_cap.ht_supported) |
5203 | MWL8K_STA(sta)->is_ampdu_allowed = true; | |
fcdc403c | 5204 | ret = 0; |
4a6967b8 | 5205 | } |
bbfd9128 | 5206 | |
d9a07d49 NS |
5207 | } else { |
5208 | ret = mwl8k_cmd_set_new_stn_add(hw, vif, sta); | |
bbfd9128 | 5209 | } |
4a6967b8 | 5210 | |
d9a07d49 NS |
5211 | for (i = 0; i < NUM_WEP_KEYS; i++) { |
5212 | key = IEEE80211_KEY_CONF(mwl8k_vif->wep_key_conf[i].key); | |
5213 | if (mwl8k_vif->wep_key_conf[i].enabled) | |
5214 | mwl8k_set_key(hw, SET_KEY, vif, sta, key); | |
5215 | } | |
fcdc403c | 5216 | return ret; |
bbfd9128 LB |
5217 | } |
5218 | ||
8a3a3c85 EP |
5219 | static int mwl8k_conf_tx(struct ieee80211_hw *hw, |
5220 | struct ieee80211_vif *vif, u16 queue, | |
a66098da LB |
5221 | const struct ieee80211_tx_queue_params *params) |
5222 | { | |
3e4f542c | 5223 | struct mwl8k_priv *priv = hw->priv; |
a66098da | 5224 | int rc; |
a66098da | 5225 | |
3e4f542c LB |
5226 | rc = mwl8k_fw_lock(hw); |
5227 | if (!rc) { | |
e600707b | 5228 | BUG_ON(queue > MWL8K_TX_WMM_QUEUES - 1); |
0863ade8 BC |
5229 | memcpy(&priv->wmm_params[queue], params, sizeof(*params)); |
5230 | ||
3e4f542c | 5231 | if (!priv->wmm_enabled) |
55489b6e | 5232 | rc = mwl8k_cmd_set_wmm_mode(hw, 1); |
a66098da | 5233 | |
85c9205c | 5234 | if (!rc) { |
e600707b | 5235 | int q = MWL8K_TX_WMM_QUEUES - 1 - queue; |
85c9205c | 5236 | rc = mwl8k_cmd_set_edca_params(hw, q, |
55489b6e LB |
5237 | params->cw_min, |
5238 | params->cw_max, | |
5239 | params->aifs, | |
5240 | params->txop); | |
85c9205c | 5241 | } |
3e4f542c LB |
5242 | |
5243 | mwl8k_fw_unlock(hw); | |
a66098da | 5244 | } |
3e4f542c | 5245 | |
a66098da LB |
5246 | return rc; |
5247 | } | |
5248 | ||
a66098da LB |
5249 | static int mwl8k_get_stats(struct ieee80211_hw *hw, |
5250 | struct ieee80211_low_level_stats *stats) | |
5251 | { | |
55489b6e | 5252 | return mwl8k_cmd_get_stat(hw, stats); |
a66098da LB |
5253 | } |
5254 | ||
0d462bbb JL |
5255 | static int mwl8k_get_survey(struct ieee80211_hw *hw, int idx, |
5256 | struct survey_info *survey) | |
5257 | { | |
5258 | struct mwl8k_priv *priv = hw->priv; | |
5259 | struct ieee80211_conf *conf = &hw->conf; | |
5260 | ||
5261 | if (idx != 0) | |
5262 | return -ENOENT; | |
5263 | ||
675a0b04 | 5264 | survey->channel = conf->chandef.chan; |
0d462bbb JL |
5265 | survey->filled = SURVEY_INFO_NOISE_DBM; |
5266 | survey->noise = priv->noise; | |
5267 | ||
5268 | return 0; | |
5269 | } | |
5270 | ||
65f3ddcd NS |
5271 | #define MAX_AMPDU_ATTEMPTS 5 |
5272 | ||
a2292d83 LB |
5273 | static int |
5274 | mwl8k_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif, | |
5275 | enum ieee80211_ampdu_mlme_action action, | |
0b01f030 JB |
5276 | struct ieee80211_sta *sta, u16 tid, u16 *ssn, |
5277 | u8 buf_size) | |
a2292d83 | 5278 | { |
65f3ddcd NS |
5279 | |
5280 | int i, rc = 0; | |
5281 | struct mwl8k_priv *priv = hw->priv; | |
5282 | struct mwl8k_ampdu_stream *stream; | |
07f6dda1 | 5283 | u8 *addr = sta->addr, idx; |
fd712f5f | 5284 | struct mwl8k_sta *sta_info = MWL8K_STA(sta); |
65f3ddcd NS |
5285 | |
5286 | if (!(hw->flags & IEEE80211_HW_AMPDU_AGGREGATION)) | |
5287 | return -ENOTSUPP; | |
5288 | ||
5289 | spin_lock(&priv->stream_lock); | |
5290 | stream = mwl8k_lookup_stream(hw, addr, tid); | |
5291 | ||
a2292d83 LB |
5292 | switch (action) { |
5293 | case IEEE80211_AMPDU_RX_START: | |
5294 | case IEEE80211_AMPDU_RX_STOP: | |
65f3ddcd NS |
5295 | break; |
5296 | case IEEE80211_AMPDU_TX_START: | |
5297 | /* By the time we get here the hw queues may contain outgoing | |
5298 | * packets for this RA/TID that are not part of this BA | |
5299 | * session. The hw will assign sequence numbers to these | |
5300 | * packets as they go out. So if we query the hw for its next | |
5301 | * sequence number and use that for the SSN here, it may end up | |
5302 | * being wrong, which will lead to sequence number mismatch at | |
5303 | * the recipient. To avoid this, we reset the sequence number | |
5304 | * to O for the first MPDU in this BA stream. | |
5305 | */ | |
5306 | *ssn = 0; | |
5307 | if (stream == NULL) { | |
5308 | /* This means that somebody outside this driver called | |
5309 | * ieee80211_start_tx_ba_session. This is unexpected | |
5310 | * because we do our own rate control. Just warn and | |
5311 | * move on. | |
5312 | */ | |
5313 | wiphy_warn(hw->wiphy, "Unexpected call to %s. " | |
5314 | "Proceeding anyway.\n", __func__); | |
5315 | stream = mwl8k_add_stream(hw, sta, tid); | |
5316 | } | |
5317 | if (stream == NULL) { | |
5318 | wiphy_debug(hw->wiphy, "no free AMPDU streams\n"); | |
5319 | rc = -EBUSY; | |
5320 | break; | |
5321 | } | |
5322 | stream->state = AMPDU_STREAM_IN_PROGRESS; | |
5323 | ||
5324 | /* Release the lock before we do the time consuming stuff */ | |
5325 | spin_unlock(&priv->stream_lock); | |
5326 | for (i = 0; i < MAX_AMPDU_ATTEMPTS; i++) { | |
fd712f5f YAP |
5327 | |
5328 | /* Check if link is still valid */ | |
5329 | if (!sta_info->is_ampdu_allowed) { | |
5330 | spin_lock(&priv->stream_lock); | |
5331 | mwl8k_remove_stream(hw, stream); | |
5332 | spin_unlock(&priv->stream_lock); | |
5333 | return -EBUSY; | |
5334 | } | |
5335 | ||
f95275c4 | 5336 | rc = mwl8k_check_ba(hw, stream, vif); |
65f3ddcd | 5337 | |
6b6accc3 YAP |
5338 | /* If HW restart is in progress mwl8k_post_cmd will |
5339 | * return -EBUSY. Avoid retrying mwl8k_check_ba in | |
5340 | * such cases | |
5341 | */ | |
5342 | if (!rc || rc == -EBUSY) | |
65f3ddcd NS |
5343 | break; |
5344 | /* | |
5345 | * HW queues take time to be flushed, give them | |
5346 | * sufficient time | |
5347 | */ | |
5348 | ||
5349 | msleep(1000); | |
5350 | } | |
5351 | spin_lock(&priv->stream_lock); | |
5352 | if (rc) { | |
5353 | wiphy_err(hw->wiphy, "Stream for tid %d busy after %d" | |
5354 | " attempts\n", tid, MAX_AMPDU_ATTEMPTS); | |
5355 | mwl8k_remove_stream(hw, stream); | |
5356 | rc = -EBUSY; | |
5357 | break; | |
5358 | } | |
5359 | ieee80211_start_tx_ba_cb_irqsafe(vif, addr, tid); | |
5360 | break; | |
18b559d5 JB |
5361 | case IEEE80211_AMPDU_TX_STOP_CONT: |
5362 | case IEEE80211_AMPDU_TX_STOP_FLUSH: | |
5363 | case IEEE80211_AMPDU_TX_STOP_FLUSH_CONT: | |
eca107ff YAP |
5364 | if (stream) { |
5365 | if (stream->state == AMPDU_STREAM_ACTIVE) { | |
07f6dda1 | 5366 | idx = stream->idx; |
eca107ff | 5367 | spin_unlock(&priv->stream_lock); |
07f6dda1 | 5368 | mwl8k_destroy_ba(hw, idx); |
eca107ff YAP |
5369 | spin_lock(&priv->stream_lock); |
5370 | } | |
5371 | mwl8k_remove_stream(hw, stream); | |
65f3ddcd | 5372 | } |
65f3ddcd NS |
5373 | ieee80211_stop_tx_ba_cb_irqsafe(vif, addr, tid); |
5374 | break; | |
5375 | case IEEE80211_AMPDU_TX_OPERATIONAL: | |
5376 | BUG_ON(stream == NULL); | |
5377 | BUG_ON(stream->state != AMPDU_STREAM_IN_PROGRESS); | |
5378 | spin_unlock(&priv->stream_lock); | |
f95275c4 | 5379 | rc = mwl8k_create_ba(hw, stream, buf_size, vif); |
65f3ddcd NS |
5380 | spin_lock(&priv->stream_lock); |
5381 | if (!rc) | |
5382 | stream->state = AMPDU_STREAM_ACTIVE; | |
5383 | else { | |
07f6dda1 | 5384 | idx = stream->idx; |
65f3ddcd | 5385 | spin_unlock(&priv->stream_lock); |
07f6dda1 | 5386 | mwl8k_destroy_ba(hw, idx); |
65f3ddcd NS |
5387 | spin_lock(&priv->stream_lock); |
5388 | wiphy_debug(hw->wiphy, | |
5389 | "Failed adding stream for sta %pM tid %d\n", | |
5390 | addr, tid); | |
5391 | mwl8k_remove_stream(hw, stream); | |
5392 | } | |
5393 | break; | |
5394 | ||
a2292d83 | 5395 | default: |
65f3ddcd | 5396 | rc = -ENOTSUPP; |
a2292d83 | 5397 | } |
65f3ddcd NS |
5398 | |
5399 | spin_unlock(&priv->stream_lock); | |
5400 | return rc; | |
a2292d83 LB |
5401 | } |
5402 | ||
a66098da LB |
5403 | static const struct ieee80211_ops mwl8k_ops = { |
5404 | .tx = mwl8k_tx, | |
5405 | .start = mwl8k_start, | |
5406 | .stop = mwl8k_stop, | |
5407 | .add_interface = mwl8k_add_interface, | |
5408 | .remove_interface = mwl8k_remove_interface, | |
5409 | .config = mwl8k_config, | |
a66098da | 5410 | .bss_info_changed = mwl8k_bss_info_changed, |
3ac64bee | 5411 | .prepare_multicast = mwl8k_prepare_multicast, |
a66098da | 5412 | .configure_filter = mwl8k_configure_filter, |
fcdc403c | 5413 | .set_key = mwl8k_set_key, |
a66098da | 5414 | .set_rts_threshold = mwl8k_set_rts_threshold, |
4a6967b8 JB |
5415 | .sta_add = mwl8k_sta_add, |
5416 | .sta_remove = mwl8k_sta_remove, | |
a66098da | 5417 | .conf_tx = mwl8k_conf_tx, |
a66098da | 5418 | .get_stats = mwl8k_get_stats, |
0d462bbb | 5419 | .get_survey = mwl8k_get_survey, |
a2292d83 | 5420 | .ampdu_action = mwl8k_ampdu_action, |
a66098da LB |
5421 | }; |
5422 | ||
a66098da LB |
5423 | static void mwl8k_finalize_join_worker(struct work_struct *work) |
5424 | { | |
5425 | struct mwl8k_priv *priv = | |
5426 | container_of(work, struct mwl8k_priv, finalize_join_worker); | |
5427 | struct sk_buff *skb = priv->beacon_skb; | |
56007a02 JB |
5428 | struct ieee80211_mgmt *mgmt = (void *)skb->data; |
5429 | int len = skb->len - offsetof(struct ieee80211_mgmt, u.beacon.variable); | |
5430 | const u8 *tim = cfg80211_find_ie(WLAN_EID_TIM, | |
5431 | mgmt->u.beacon.variable, len); | |
5432 | int dtim_period = 1; | |
5433 | ||
5434 | if (tim && tim[1] >= 2) | |
5435 | dtim_period = tim[3]; | |
a66098da | 5436 | |
56007a02 | 5437 | mwl8k_cmd_finalize_join(priv->hw, skb->data, skb->len, dtim_period); |
a66098da | 5438 | |
f5bb87cf | 5439 | dev_kfree_skb(skb); |
a66098da LB |
5440 | priv->beacon_skb = NULL; |
5441 | } | |
5442 | ||
bcb628d5 | 5443 | enum { |
9e1b17ea LB |
5444 | MWL8363 = 0, |
5445 | MWL8687, | |
bcb628d5 | 5446 | MWL8366, |
d926dc7d | 5447 | MWL8764, |
6f6d1e9a LB |
5448 | }; |
5449 | ||
c2f2e202 | 5450 | #define MWL8K_8366_AP_FW_API 3 |
952a0e96 BC |
5451 | #define _MWL8K_8366_AP_FW(api) "mwl8k/fmimage_8366_ap-" #api ".fw" |
5452 | #define MWL8K_8366_AP_FW(api) _MWL8K_8366_AP_FW(api) | |
5453 | ||
d926dc7d NS |
5454 | #define MWL8K_8764_AP_FW_API 1 |
5455 | #define _MWL8K_8764_AP_FW(api) "mwl8k/fmimage_8764_ap-" #api ".fw" | |
5456 | #define MWL8K_8764_AP_FW(api) _MWL8K_8764_AP_FW(api) | |
5457 | ||
8dee5eef | 5458 | static struct mwl8k_device_info mwl8k_info_tbl[] = { |
9e1b17ea LB |
5459 | [MWL8363] = { |
5460 | .part_name = "88w8363", | |
5461 | .helper_image = "mwl8k/helper_8363.fw", | |
0863ade8 | 5462 | .fw_image_sta = "mwl8k/fmimage_8363.fw", |
9e1b17ea | 5463 | }, |
49eb691c | 5464 | [MWL8687] = { |
bcb628d5 JL |
5465 | .part_name = "88w8687", |
5466 | .helper_image = "mwl8k/helper_8687.fw", | |
0863ade8 | 5467 | .fw_image_sta = "mwl8k/fmimage_8687.fw", |
bcb628d5 | 5468 | }, |
49eb691c | 5469 | [MWL8366] = { |
bcb628d5 JL |
5470 | .part_name = "88w8366", |
5471 | .helper_image = "mwl8k/helper_8366.fw", | |
0863ade8 | 5472 | .fw_image_sta = "mwl8k/fmimage_8366.fw", |
952a0e96 BC |
5473 | .fw_image_ap = MWL8K_8366_AP_FW(MWL8K_8366_AP_FW_API), |
5474 | .fw_api_ap = MWL8K_8366_AP_FW_API, | |
d926dc7d NS |
5475 | .ap_rxd_ops = &rxd_ap_ops, |
5476 | }, | |
5477 | [MWL8764] = { | |
5478 | .part_name = "88w8764", | |
5479 | .fw_image_ap = MWL8K_8764_AP_FW(MWL8K_8764_AP_FW_API), | |
5480 | .fw_api_ap = MWL8K_8764_AP_FW_API, | |
5481 | .ap_rxd_ops = &rxd_ap_ops, | |
bcb628d5 | 5482 | }, |
45a390dd LB |
5483 | }; |
5484 | ||
c92d4ede LB |
5485 | MODULE_FIRMWARE("mwl8k/helper_8363.fw"); |
5486 | MODULE_FIRMWARE("mwl8k/fmimage_8363.fw"); | |
5487 | MODULE_FIRMWARE("mwl8k/helper_8687.fw"); | |
5488 | MODULE_FIRMWARE("mwl8k/fmimage_8687.fw"); | |
5489 | MODULE_FIRMWARE("mwl8k/helper_8366.fw"); | |
5490 | MODULE_FIRMWARE("mwl8k/fmimage_8366.fw"); | |
952a0e96 | 5491 | MODULE_FIRMWARE(MWL8K_8366_AP_FW(MWL8K_8366_AP_FW_API)); |
c92d4ede | 5492 | |
45a390dd | 5493 | static DEFINE_PCI_DEVICE_TABLE(mwl8k_pci_id_table) = { |
e5868ba1 | 5494 | { PCI_VDEVICE(MARVELL, 0x2a0a), .driver_data = MWL8363, }, |
9e1b17ea LB |
5495 | { PCI_VDEVICE(MARVELL, 0x2a0c), .driver_data = MWL8363, }, |
5496 | { PCI_VDEVICE(MARVELL, 0x2a24), .driver_data = MWL8363, }, | |
bcb628d5 JL |
5497 | { PCI_VDEVICE(MARVELL, 0x2a2b), .driver_data = MWL8687, }, |
5498 | { PCI_VDEVICE(MARVELL, 0x2a30), .driver_data = MWL8687, }, | |
5499 | { PCI_VDEVICE(MARVELL, 0x2a40), .driver_data = MWL8366, }, | |
fc5bc165 JG |
5500 | { PCI_VDEVICE(MARVELL, 0x2a41), .driver_data = MWL8366, }, |
5501 | { PCI_VDEVICE(MARVELL, 0x2a42), .driver_data = MWL8366, }, | |
ca66527c | 5502 | { PCI_VDEVICE(MARVELL, 0x2a43), .driver_data = MWL8366, }, |
d926dc7d | 5503 | { PCI_VDEVICE(MARVELL, 0x2b36), .driver_data = MWL8764, }, |
bcb628d5 | 5504 | { }, |
45a390dd LB |
5505 | }; |
5506 | MODULE_DEVICE_TABLE(pci, mwl8k_pci_id_table); | |
5507 | ||
99020471 BC |
5508 | static int mwl8k_request_alt_fw(struct mwl8k_priv *priv) |
5509 | { | |
5510 | int rc; | |
5511 | printk(KERN_ERR "%s: Error requesting preferred fw %s.\n" | |
5512 | "Trying alternative firmware %s\n", pci_name(priv->pdev), | |
5513 | priv->fw_pref, priv->fw_alt); | |
5514 | rc = mwl8k_request_fw(priv, priv->fw_alt, &priv->fw_ucode, true); | |
5515 | if (rc) { | |
5516 | printk(KERN_ERR "%s: Error requesting alt fw %s\n", | |
5517 | pci_name(priv->pdev), priv->fw_alt); | |
5518 | return rc; | |
5519 | } | |
5520 | return 0; | |
5521 | } | |
5522 | ||
5523 | static int mwl8k_firmware_load_success(struct mwl8k_priv *priv); | |
5524 | static void mwl8k_fw_state_machine(const struct firmware *fw, void *context) | |
5525 | { | |
5526 | struct mwl8k_priv *priv = context; | |
5527 | struct mwl8k_device_info *di = priv->device_info; | |
5528 | int rc; | |
5529 | ||
5530 | switch (priv->fw_state) { | |
5531 | case FW_STATE_INIT: | |
5532 | if (!fw) { | |
5533 | printk(KERN_ERR "%s: Error requesting helper fw %s\n", | |
5534 | pci_name(priv->pdev), di->helper_image); | |
5535 | goto fail; | |
5536 | } | |
5537 | priv->fw_helper = fw; | |
5538 | rc = mwl8k_request_fw(priv, priv->fw_pref, &priv->fw_ucode, | |
5539 | true); | |
5540 | if (rc && priv->fw_alt) { | |
5541 | rc = mwl8k_request_alt_fw(priv); | |
5542 | if (rc) | |
5543 | goto fail; | |
5544 | priv->fw_state = FW_STATE_LOADING_ALT; | |
5545 | } else if (rc) | |
5546 | goto fail; | |
5547 | else | |
5548 | priv->fw_state = FW_STATE_LOADING_PREF; | |
5549 | break; | |
5550 | ||
5551 | case FW_STATE_LOADING_PREF: | |
5552 | if (!fw) { | |
5553 | if (priv->fw_alt) { | |
5554 | rc = mwl8k_request_alt_fw(priv); | |
5555 | if (rc) | |
5556 | goto fail; | |
5557 | priv->fw_state = FW_STATE_LOADING_ALT; | |
5558 | } else | |
5559 | goto fail; | |
5560 | } else { | |
5561 | priv->fw_ucode = fw; | |
5562 | rc = mwl8k_firmware_load_success(priv); | |
5563 | if (rc) | |
5564 | goto fail; | |
5565 | else | |
5566 | complete(&priv->firmware_loading_complete); | |
5567 | } | |
5568 | break; | |
5569 | ||
5570 | case FW_STATE_LOADING_ALT: | |
5571 | if (!fw) { | |
5572 | printk(KERN_ERR "%s: Error requesting alt fw %s\n", | |
5573 | pci_name(priv->pdev), di->helper_image); | |
5574 | goto fail; | |
5575 | } | |
5576 | priv->fw_ucode = fw; | |
5577 | rc = mwl8k_firmware_load_success(priv); | |
5578 | if (rc) | |
5579 | goto fail; | |
5580 | else | |
5581 | complete(&priv->firmware_loading_complete); | |
5582 | break; | |
5583 | ||
5584 | default: | |
5585 | printk(KERN_ERR "%s: Unexpected firmware loading state: %d\n", | |
5586 | MWL8K_NAME, priv->fw_state); | |
5587 | BUG_ON(1); | |
5588 | } | |
5589 | ||
5590 | return; | |
5591 | ||
5592 | fail: | |
5593 | priv->fw_state = FW_STATE_ERROR; | |
5594 | complete(&priv->firmware_loading_complete); | |
5595 | device_release_driver(&priv->pdev->dev); | |
5596 | mwl8k_release_firmware(priv); | |
5597 | } | |
5598 | ||
6b6accc3 | 5599 | #define MAX_RESTART_ATTEMPTS 1 |
99020471 BC |
5600 | static int mwl8k_init_firmware(struct ieee80211_hw *hw, char *fw_image, |
5601 | bool nowait) | |
a66098da | 5602 | { |
3cc7772c | 5603 | struct mwl8k_priv *priv = hw->priv; |
a66098da | 5604 | int rc; |
6b6accc3 | 5605 | int count = MAX_RESTART_ATTEMPTS; |
be695fc4 | 5606 | |
6b6accc3 | 5607 | retry: |
be695fc4 LB |
5608 | /* Reset firmware and hardware */ |
5609 | mwl8k_hw_reset(priv); | |
5610 | ||
5611 | /* Ask userland hotplug daemon for the device firmware */ | |
99020471 | 5612 | rc = mwl8k_request_firmware(priv, fw_image, nowait); |
be695fc4 | 5613 | if (rc) { |
5db55844 | 5614 | wiphy_err(hw->wiphy, "Firmware files not found\n"); |
3cc7772c | 5615 | return rc; |
be695fc4 LB |
5616 | } |
5617 | ||
99020471 BC |
5618 | if (nowait) |
5619 | return rc; | |
5620 | ||
be695fc4 LB |
5621 | /* Load firmware into hardware */ |
5622 | rc = mwl8k_load_firmware(hw); | |
3cc7772c | 5623 | if (rc) |
5db55844 | 5624 | wiphy_err(hw->wiphy, "Cannot start firmware\n"); |
be695fc4 LB |
5625 | |
5626 | /* Reclaim memory once firmware is successfully loaded */ | |
5627 | mwl8k_release_firmware(priv); | |
5628 | ||
6b6accc3 YAP |
5629 | if (rc && count) { |
5630 | /* FW did not start successfully; | |
5631 | * lets try one more time | |
5632 | */ | |
5633 | count--; | |
5634 | wiphy_err(hw->wiphy, "Trying to reload the firmware again\n"); | |
5635 | msleep(20); | |
5636 | goto retry; | |
5637 | } | |
5638 | ||
3cc7772c BC |
5639 | return rc; |
5640 | } | |
5641 | ||
73b46320 BC |
5642 | static int mwl8k_init_txqs(struct ieee80211_hw *hw) |
5643 | { | |
5644 | struct mwl8k_priv *priv = hw->priv; | |
5645 | int rc = 0; | |
5646 | int i; | |
5647 | ||
e600707b | 5648 | for (i = 0; i < mwl8k_tx_queues(priv); i++) { |
73b46320 BC |
5649 | rc = mwl8k_txq_init(hw, i); |
5650 | if (rc) | |
5651 | break; | |
5652 | if (priv->ap_fw) | |
5653 | iowrite32(priv->txq[i].txd_dma, | |
5654 | priv->sram + priv->txq_offset[i]); | |
5655 | } | |
5656 | return rc; | |
5657 | } | |
5658 | ||
3cc7772c BC |
5659 | /* initialize hw after successfully loading a firmware image */ |
5660 | static int mwl8k_probe_hw(struct ieee80211_hw *hw) | |
5661 | { | |
5662 | struct mwl8k_priv *priv = hw->priv; | |
5663 | int rc = 0; | |
5664 | int i; | |
be695fc4 | 5665 | |
91942230 | 5666 | if (priv->ap_fw) { |
89a91f4f | 5667 | priv->rxd_ops = priv->device_info->ap_rxd_ops; |
91942230 | 5668 | if (priv->rxd_ops == NULL) { |
c96c31e4 JP |
5669 | wiphy_err(hw->wiphy, |
5670 | "Driver does not have AP firmware image support for this hardware\n"); | |
a2ca8ecb | 5671 | rc = -ENOENT; |
91942230 LB |
5672 | goto err_stop_firmware; |
5673 | } | |
5674 | } else { | |
89a91f4f | 5675 | priv->rxd_ops = &rxd_sta_ops; |
91942230 | 5676 | } |
be695fc4 LB |
5677 | |
5678 | priv->sniffer_enabled = false; | |
5679 | priv->wmm_enabled = false; | |
5680 | priv->pending_tx_pkts = 0; | |
c27a54d3 | 5681 | atomic_set(&priv->watchdog_event_pending, 0); |
be695fc4 | 5682 | |
a66098da LB |
5683 | rc = mwl8k_rxq_init(hw, 0); |
5684 | if (rc) | |
3cc7772c | 5685 | goto err_stop_firmware; |
a66098da LB |
5686 | rxq_refill(hw, 0, INT_MAX); |
5687 | ||
73b46320 BC |
5688 | /* For the sta firmware, we need to know the dma addresses of tx queues |
5689 | * before sending MWL8K_CMD_GET_HW_SPEC. So we must initialize them | |
5690 | * prior to issuing this command. But for the AP case, we learn the | |
5691 | * total number of queues from the result CMD_GET_HW_SPEC, so for this | |
5692 | * case we must initialize the tx queues after. | |
5693 | */ | |
8a7a578c | 5694 | priv->num_ampdu_queues = 0; |
73b46320 BC |
5695 | if (!priv->ap_fw) { |
5696 | rc = mwl8k_init_txqs(hw); | |
a66098da LB |
5697 | if (rc) |
5698 | goto err_free_queues; | |
5699 | } | |
5700 | ||
5701 | iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS); | |
c23b5a69 | 5702 | iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK); |
3aefc37e NS |
5703 | iowrite32(MWL8K_A2H_INT_TX_DONE|MWL8K_A2H_INT_RX_READY| |
5704 | MWL8K_A2H_INT_BA_WATCHDOG, | |
1e9f9de3 | 5705 | priv->regs + MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL); |
12488e01 NS |
5706 | iowrite32(MWL8K_A2H_INT_OPC_DONE, |
5707 | priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK); | |
a66098da | 5708 | |
a0607fd3 | 5709 | rc = request_irq(priv->pdev->irq, mwl8k_interrupt, |
a66098da LB |
5710 | IRQF_SHARED, MWL8K_NAME, hw); |
5711 | if (rc) { | |
5db55844 | 5712 | wiphy_err(hw->wiphy, "failed to register IRQ handler\n"); |
a66098da LB |
5713 | goto err_free_queues; |
5714 | } | |
5715 | ||
6b6accc3 YAP |
5716 | /* |
5717 | * When hw restart is requested, | |
5718 | * mac80211 will take care of clearing | |
5719 | * the ampdu streams, so do not clear | |
5720 | * the ampdu state here | |
5721 | */ | |
5722 | if (!priv->hw_restart_in_progress) | |
5723 | memset(priv->ampdu, 0, sizeof(priv->ampdu)); | |
ac109fd0 | 5724 | |
a66098da LB |
5725 | /* |
5726 | * Temporarily enable interrupts. Initial firmware host | |
c2c2b12a | 5727 | * commands use interrupts and avoid polling. Disable |
a66098da LB |
5728 | * interrupts when done. |
5729 | */ | |
c23b5a69 | 5730 | iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK); |
a66098da LB |
5731 | |
5732 | /* Get config data, mac addrs etc */ | |
42fba21d LB |
5733 | if (priv->ap_fw) { |
5734 | rc = mwl8k_cmd_get_hw_spec_ap(hw); | |
73b46320 BC |
5735 | if (!rc) |
5736 | rc = mwl8k_init_txqs(hw); | |
42fba21d LB |
5737 | if (!rc) |
5738 | rc = mwl8k_cmd_set_hw_spec(hw); | |
5739 | } else { | |
5740 | rc = mwl8k_cmd_get_hw_spec_sta(hw); | |
5741 | } | |
a66098da | 5742 | if (rc) { |
5db55844 | 5743 | wiphy_err(hw->wiphy, "Cannot initialise firmware\n"); |
be695fc4 | 5744 | goto err_free_irq; |
a66098da LB |
5745 | } |
5746 | ||
5747 | /* Turn radio off */ | |
55489b6e | 5748 | rc = mwl8k_cmd_radio_disable(hw); |
a66098da | 5749 | if (rc) { |
5db55844 | 5750 | wiphy_err(hw->wiphy, "Cannot disable\n"); |
be695fc4 | 5751 | goto err_free_irq; |
a66098da LB |
5752 | } |
5753 | ||
32060e1b | 5754 | /* Clear MAC address */ |
aa21d0f6 | 5755 | rc = mwl8k_cmd_set_mac_addr(hw, NULL, "\x00\x00\x00\x00\x00\x00"); |
32060e1b | 5756 | if (rc) { |
5db55844 | 5757 | wiphy_err(hw->wiphy, "Cannot clear MAC address\n"); |
be695fc4 | 5758 | goto err_free_irq; |
32060e1b LB |
5759 | } |
5760 | ||
a246ac38 YAP |
5761 | /* Configure Antennas */ |
5762 | rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_RX, 0x3); | |
5763 | if (rc) | |
5764 | wiphy_warn(hw->wiphy, "failed to set # of RX antennas"); | |
5765 | rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_TX, 0x7); | |
5766 | if (rc) | |
5767 | wiphy_warn(hw->wiphy, "failed to set # of TX antennas"); | |
5768 | ||
5769 | ||
a66098da | 5770 | /* Disable interrupts */ |
a66098da | 5771 | iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK); |
a66098da LB |
5772 | free_irq(priv->pdev->irq, hw); |
5773 | ||
c96c31e4 JP |
5774 | wiphy_info(hw->wiphy, "%s v%d, %pm, %s firmware %u.%u.%u.%u\n", |
5775 | priv->device_info->part_name, | |
5776 | priv->hw_rev, hw->wiphy->perm_addr, | |
5777 | priv->ap_fw ? "AP" : "STA", | |
5778 | (priv->fw_rev >> 24) & 0xff, (priv->fw_rev >> 16) & 0xff, | |
5779 | (priv->fw_rev >> 8) & 0xff, priv->fw_rev & 0xff); | |
a66098da LB |
5780 | |
5781 | return 0; | |
5782 | ||
a66098da | 5783 | err_free_irq: |
a66098da | 5784 | iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK); |
a66098da LB |
5785 | free_irq(priv->pdev->irq, hw); |
5786 | ||
5787 | err_free_queues: | |
e600707b | 5788 | for (i = 0; i < mwl8k_tx_queues(priv); i++) |
a66098da LB |
5789 | mwl8k_txq_deinit(hw, i); |
5790 | mwl8k_rxq_deinit(hw, 0); | |
5791 | ||
3cc7772c BC |
5792 | err_stop_firmware: |
5793 | mwl8k_hw_reset(priv); | |
5794 | ||
5795 | return rc; | |
5796 | } | |
5797 | ||
5798 | /* | |
5799 | * invoke mwl8k_reload_firmware to change the firmware image after the device | |
5800 | * has already been registered | |
5801 | */ | |
5802 | static int mwl8k_reload_firmware(struct ieee80211_hw *hw, char *fw_image) | |
5803 | { | |
5804 | int i, rc = 0; | |
5805 | struct mwl8k_priv *priv = hw->priv; | |
6b6accc3 | 5806 | struct mwl8k_vif *vif, *tmp_vif; |
3cc7772c BC |
5807 | |
5808 | mwl8k_stop(hw); | |
5809 | mwl8k_rxq_deinit(hw, 0); | |
5810 | ||
6b6accc3 YAP |
5811 | /* |
5812 | * All the existing interfaces are re-added by the ieee80211_reconfig; | |
5813 | * which means driver should remove existing interfaces before calling | |
5814 | * ieee80211_restart_hw | |
5815 | */ | |
5816 | if (priv->hw_restart_in_progress) | |
5817 | list_for_each_entry_safe(vif, tmp_vif, &priv->vif_list, list) | |
5818 | mwl8k_remove_vif(priv, vif); | |
5819 | ||
e600707b | 5820 | for (i = 0; i < mwl8k_tx_queues(priv); i++) |
3cc7772c BC |
5821 | mwl8k_txq_deinit(hw, i); |
5822 | ||
99020471 | 5823 | rc = mwl8k_init_firmware(hw, fw_image, false); |
3cc7772c BC |
5824 | if (rc) |
5825 | goto fail; | |
5826 | ||
5827 | rc = mwl8k_probe_hw(hw); | |
5828 | if (rc) | |
5829 | goto fail; | |
5830 | ||
6b6accc3 YAP |
5831 | if (priv->hw_restart_in_progress) |
5832 | return rc; | |
5833 | ||
3cc7772c BC |
5834 | rc = mwl8k_start(hw); |
5835 | if (rc) | |
5836 | goto fail; | |
5837 | ||
5838 | rc = mwl8k_config(hw, ~0); | |
5839 | if (rc) | |
5840 | goto fail; | |
5841 | ||
e600707b | 5842 | for (i = 0; i < MWL8K_TX_WMM_QUEUES; i++) { |
8a3a3c85 | 5843 | rc = mwl8k_conf_tx(hw, NULL, i, &priv->wmm_params[i]); |
3cc7772c BC |
5844 | if (rc) |
5845 | goto fail; | |
5846 | } | |
5847 | ||
5848 | return rc; | |
5849 | ||
5850 | fail: | |
5851 | printk(KERN_WARNING "mwl8k: Failed to reload firmware image.\n"); | |
5852 | return rc; | |
5853 | } | |
5854 | ||
5d377fca YAP |
5855 | static const struct ieee80211_iface_limit ap_if_limits[] = { |
5856 | { .max = 8, .types = BIT(NL80211_IFTYPE_AP) }, | |
2acdaa7a | 5857 | { .max = 1, .types = BIT(NL80211_IFTYPE_STATION) }, |
5d377fca YAP |
5858 | }; |
5859 | ||
5860 | static const struct ieee80211_iface_combination ap_if_comb = { | |
5861 | .limits = ap_if_limits, | |
5862 | .n_limits = ARRAY_SIZE(ap_if_limits), | |
5863 | .max_interfaces = 8, | |
5864 | .num_different_channels = 1, | |
5865 | }; | |
5866 | ||
5867 | ||
3cc7772c BC |
5868 | static int mwl8k_firmware_load_success(struct mwl8k_priv *priv) |
5869 | { | |
5870 | struct ieee80211_hw *hw = priv->hw; | |
5871 | int i, rc; | |
5872 | ||
99020471 BC |
5873 | rc = mwl8k_load_firmware(hw); |
5874 | mwl8k_release_firmware(priv); | |
5875 | if (rc) { | |
5876 | wiphy_err(hw->wiphy, "Cannot start firmware\n"); | |
5877 | return rc; | |
5878 | } | |
5879 | ||
3cc7772c BC |
5880 | /* |
5881 | * Extra headroom is the size of the required DMA header | |
5882 | * minus the size of the smallest 802.11 frame (CTS frame). | |
5883 | */ | |
5884 | hw->extra_tx_headroom = | |
5885 | sizeof(struct mwl8k_dma_data) - sizeof(struct ieee80211_cts); | |
5886 | ||
ff776cec YAP |
5887 | hw->extra_tx_headroom -= priv->ap_fw ? REDUCED_TX_HEADROOM : 0; |
5888 | ||
3cc7772c BC |
5889 | hw->channel_change_time = 10; |
5890 | ||
e600707b | 5891 | hw->queues = MWL8K_TX_WMM_QUEUES; |
3cc7772c BC |
5892 | |
5893 | /* Set rssi values to dBm */ | |
0bf22c37 | 5894 | hw->flags |= IEEE80211_HW_SIGNAL_DBM | IEEE80211_HW_HAS_RATE_CONTROL; |
2a36a0ec YAP |
5895 | |
5896 | /* | |
5897 | * Ask mac80211 to not to trigger PS mode | |
5898 | * based on PM bit of incoming frames. | |
5899 | */ | |
5900 | if (priv->ap_fw) | |
5901 | hw->flags |= IEEE80211_HW_AP_LINK_PS; | |
5902 | ||
3cc7772c BC |
5903 | hw->vif_data_size = sizeof(struct mwl8k_vif); |
5904 | hw->sta_data_size = sizeof(struct mwl8k_sta); | |
5905 | ||
5906 | priv->macids_used = 0; | |
5907 | INIT_LIST_HEAD(&priv->vif_list); | |
5908 | ||
5909 | /* Set default radio state and preamble */ | |
3db1cd5c RR |
5910 | priv->radio_on = false; |
5911 | priv->radio_short_preamble = false; | |
3cc7772c BC |
5912 | |
5913 | /* Finalize join worker */ | |
5914 | INIT_WORK(&priv->finalize_join_worker, mwl8k_finalize_join_worker); | |
3aefc37e NS |
5915 | /* Handle watchdog ba events */ |
5916 | INIT_WORK(&priv->watchdog_ba_handle, mwl8k_watchdog_ba_events); | |
6b6accc3 YAP |
5917 | /* To reload the firmware if it crashes */ |
5918 | INIT_WORK(&priv->fw_reload, mwl8k_hw_restart_work); | |
3cc7772c BC |
5919 | |
5920 | /* TX reclaim and RX tasklets. */ | |
5921 | tasklet_init(&priv->poll_tx_task, mwl8k_tx_poll, (unsigned long)hw); | |
5922 | tasklet_disable(&priv->poll_tx_task); | |
5923 | tasklet_init(&priv->poll_rx_task, mwl8k_rx_poll, (unsigned long)hw); | |
5924 | tasklet_disable(&priv->poll_rx_task); | |
5925 | ||
5926 | /* Power management cookie */ | |
5927 | priv->cookie = pci_alloc_consistent(priv->pdev, 4, &priv->cookie_dma); | |
5928 | if (priv->cookie == NULL) | |
5929 | return -ENOMEM; | |
5930 | ||
5931 | mutex_init(&priv->fw_mutex); | |
5932 | priv->fw_mutex_owner = NULL; | |
5933 | priv->fw_mutex_depth = 0; | |
5934 | priv->hostcmd_wait = NULL; | |
5935 | ||
5936 | spin_lock_init(&priv->tx_lock); | |
5937 | ||
ac109fd0 BC |
5938 | spin_lock_init(&priv->stream_lock); |
5939 | ||
3cc7772c BC |
5940 | priv->tx_wait = NULL; |
5941 | ||
5942 | rc = mwl8k_probe_hw(hw); | |
5943 | if (rc) | |
5944 | goto err_free_cookie; | |
5945 | ||
5946 | hw->wiphy->interface_modes = 0; | |
5d377fca YAP |
5947 | |
5948 | if (priv->ap_macids_supported || priv->device_info->fw_image_ap) { | |
3cc7772c | 5949 | hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_AP); |
2acdaa7a | 5950 | hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_STATION); |
5d377fca YAP |
5951 | hw->wiphy->iface_combinations = &ap_if_comb; |
5952 | hw->wiphy->n_iface_combinations = 1; | |
5953 | } | |
5954 | ||
3cc7772c BC |
5955 | if (priv->sta_macids_supported || priv->device_info->fw_image_sta) |
5956 | hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_STATION); | |
5957 | ||
5958 | rc = ieee80211_register_hw(hw); | |
5959 | if (rc) { | |
5960 | wiphy_err(hw->wiphy, "Cannot register device\n"); | |
5961 | goto err_unprobe_hw; | |
5962 | } | |
5963 | ||
5964 | return 0; | |
5965 | ||
5966 | err_unprobe_hw: | |
e600707b | 5967 | for (i = 0; i < mwl8k_tx_queues(priv); i++) |
3cc7772c BC |
5968 | mwl8k_txq_deinit(hw, i); |
5969 | mwl8k_rxq_deinit(hw, 0); | |
5970 | ||
be695fc4 | 5971 | err_free_cookie: |
a66098da LB |
5972 | if (priv->cookie != NULL) |
5973 | pci_free_consistent(priv->pdev, 4, | |
5974 | priv->cookie, priv->cookie_dma); | |
5975 | ||
3cc7772c BC |
5976 | return rc; |
5977 | } | |
8dee5eef | 5978 | static int mwl8k_probe(struct pci_dev *pdev, |
3cc7772c BC |
5979 | const struct pci_device_id *id) |
5980 | { | |
5981 | static int printed_version; | |
5982 | struct ieee80211_hw *hw; | |
5983 | struct mwl8k_priv *priv; | |
0863ade8 | 5984 | struct mwl8k_device_info *di; |
3cc7772c BC |
5985 | int rc; |
5986 | ||
5987 | if (!printed_version) { | |
5988 | printk(KERN_INFO "%s version %s\n", MWL8K_DESC, MWL8K_VERSION); | |
5989 | printed_version = 1; | |
5990 | } | |
5991 | ||
5992 | ||
5993 | rc = pci_enable_device(pdev); | |
5994 | if (rc) { | |
5995 | printk(KERN_ERR "%s: Cannot enable new PCI device\n", | |
5996 | MWL8K_NAME); | |
5997 | return rc; | |
5998 | } | |
5999 | ||
6000 | rc = pci_request_regions(pdev, MWL8K_NAME); | |
6001 | if (rc) { | |
6002 | printk(KERN_ERR "%s: Cannot obtain PCI resources\n", | |
6003 | MWL8K_NAME); | |
6004 | goto err_disable_device; | |
6005 | } | |
6006 | ||
6007 | pci_set_master(pdev); | |
6008 | ||
6009 | ||
6010 | hw = ieee80211_alloc_hw(sizeof(*priv), &mwl8k_ops); | |
6011 | if (hw == NULL) { | |
6012 | printk(KERN_ERR "%s: ieee80211 alloc failed\n", MWL8K_NAME); | |
6013 | rc = -ENOMEM; | |
6014 | goto err_free_reg; | |
6015 | } | |
6016 | ||
6017 | SET_IEEE80211_DEV(hw, &pdev->dev); | |
6018 | pci_set_drvdata(pdev, hw); | |
6019 | ||
6020 | priv = hw->priv; | |
6021 | priv->hw = hw; | |
6022 | priv->pdev = pdev; | |
6023 | priv->device_info = &mwl8k_info_tbl[id->driver_data]; | |
6024 | ||
98929824 NS |
6025 | if (id->driver_data == MWL8764) |
6026 | priv->is_8764 = true; | |
3cc7772c BC |
6027 | |
6028 | priv->sram = pci_iomap(pdev, 0, 0x10000); | |
6029 | if (priv->sram == NULL) { | |
6030 | wiphy_err(hw->wiphy, "Cannot map device SRAM\n"); | |
a2ca8ecb | 6031 | rc = -EIO; |
3cc7772c BC |
6032 | goto err_iounmap; |
6033 | } | |
6034 | ||
6035 | /* | |
6036 | * If BAR0 is a 32 bit BAR, the register BAR will be BAR1. | |
6037 | * If BAR0 is a 64 bit BAR, the register BAR will be BAR2. | |
6038 | */ | |
6039 | priv->regs = pci_iomap(pdev, 1, 0x10000); | |
6040 | if (priv->regs == NULL) { | |
6041 | priv->regs = pci_iomap(pdev, 2, 0x10000); | |
6042 | if (priv->regs == NULL) { | |
6043 | wiphy_err(hw->wiphy, "Cannot map device registers\n"); | |
a2ca8ecb | 6044 | rc = -EIO; |
3cc7772c BC |
6045 | goto err_iounmap; |
6046 | } | |
6047 | } | |
6048 | ||
0863ade8 | 6049 | /* |
99020471 BC |
6050 | * Choose the initial fw image depending on user input. If a second |
6051 | * image is available, make it the alternative image that will be | |
6052 | * loaded if the first one fails. | |
0863ade8 | 6053 | */ |
99020471 | 6054 | init_completion(&priv->firmware_loading_complete); |
0863ade8 | 6055 | di = priv->device_info; |
99020471 BC |
6056 | if (ap_mode_default && di->fw_image_ap) { |
6057 | priv->fw_pref = di->fw_image_ap; | |
6058 | priv->fw_alt = di->fw_image_sta; | |
6059 | } else if (!ap_mode_default && di->fw_image_sta) { | |
6060 | priv->fw_pref = di->fw_image_sta; | |
6061 | priv->fw_alt = di->fw_image_ap; | |
6062 | } else if (ap_mode_default && !di->fw_image_ap && di->fw_image_sta) { | |
0863ade8 | 6063 | printk(KERN_WARNING "AP fw is unavailable. Using STA fw."); |
99020471 | 6064 | priv->fw_pref = di->fw_image_sta; |
0863ade8 BC |
6065 | } else if (!ap_mode_default && !di->fw_image_sta && di->fw_image_ap) { |
6066 | printk(KERN_WARNING "STA fw is unavailable. Using AP fw."); | |
99020471 BC |
6067 | priv->fw_pref = di->fw_image_ap; |
6068 | } | |
6069 | rc = mwl8k_init_firmware(hw, priv->fw_pref, true); | |
3cc7772c BC |
6070 | if (rc) |
6071 | goto err_stop_firmware; | |
6b6accc3 YAP |
6072 | |
6073 | priv->hw_restart_in_progress = false; | |
6074 | ||
e882efc9 YAP |
6075 | priv->running_bsses = 0; |
6076 | ||
99020471 | 6077 | return rc; |
3cc7772c | 6078 | |
be695fc4 LB |
6079 | err_stop_firmware: |
6080 | mwl8k_hw_reset(priv); | |
be695fc4 LB |
6081 | |
6082 | err_iounmap: | |
a66098da LB |
6083 | if (priv->regs != NULL) |
6084 | pci_iounmap(pdev, priv->regs); | |
6085 | ||
5b9482dd LB |
6086 | if (priv->sram != NULL) |
6087 | pci_iounmap(pdev, priv->sram); | |
6088 | ||
a66098da LB |
6089 | pci_set_drvdata(pdev, NULL); |
6090 | ieee80211_free_hw(hw); | |
6091 | ||
6092 | err_free_reg: | |
6093 | pci_release_regions(pdev); | |
3db95e50 LB |
6094 | |
6095 | err_disable_device: | |
a66098da LB |
6096 | pci_disable_device(pdev); |
6097 | ||
6098 | return rc; | |
6099 | } | |
6100 | ||
8dee5eef | 6101 | static void mwl8k_remove(struct pci_dev *pdev) |
a66098da LB |
6102 | { |
6103 | struct ieee80211_hw *hw = pci_get_drvdata(pdev); | |
6104 | struct mwl8k_priv *priv; | |
6105 | int i; | |
6106 | ||
6107 | if (hw == NULL) | |
6108 | return; | |
6109 | priv = hw->priv; | |
6110 | ||
99020471 BC |
6111 | wait_for_completion(&priv->firmware_loading_complete); |
6112 | ||
6113 | if (priv->fw_state == FW_STATE_ERROR) { | |
6114 | mwl8k_hw_reset(priv); | |
6115 | goto unmap; | |
6116 | } | |
6117 | ||
a66098da LB |
6118 | ieee80211_stop_queues(hw); |
6119 | ||
60aa569f LB |
6120 | ieee80211_unregister_hw(hw); |
6121 | ||
67e2eb27 | 6122 | /* Remove TX reclaim and RX tasklets. */ |
1e9f9de3 | 6123 | tasklet_kill(&priv->poll_tx_task); |
67e2eb27 | 6124 | tasklet_kill(&priv->poll_rx_task); |
a66098da | 6125 | |
a66098da LB |
6126 | /* Stop hardware */ |
6127 | mwl8k_hw_reset(priv); | |
6128 | ||
6129 | /* Return all skbs to mac80211 */ | |
e600707b | 6130 | for (i = 0; i < mwl8k_tx_queues(priv); i++) |
efb7c49a | 6131 | mwl8k_txq_reclaim(hw, i, INT_MAX, 1); |
a66098da | 6132 | |
e600707b | 6133 | for (i = 0; i < mwl8k_tx_queues(priv); i++) |
a66098da LB |
6134 | mwl8k_txq_deinit(hw, i); |
6135 | ||
6136 | mwl8k_rxq_deinit(hw, 0); | |
6137 | ||
c2c357ce | 6138 | pci_free_consistent(priv->pdev, 4, priv->cookie, priv->cookie_dma); |
a66098da | 6139 | |
99020471 | 6140 | unmap: |
a66098da | 6141 | pci_iounmap(pdev, priv->regs); |
5b9482dd | 6142 | pci_iounmap(pdev, priv->sram); |
a66098da LB |
6143 | pci_set_drvdata(pdev, NULL); |
6144 | ieee80211_free_hw(hw); | |
6145 | pci_release_regions(pdev); | |
6146 | pci_disable_device(pdev); | |
6147 | } | |
6148 | ||
6149 | static struct pci_driver mwl8k_driver = { | |
6150 | .name = MWL8K_NAME, | |
45a390dd | 6151 | .id_table = mwl8k_pci_id_table, |
a66098da | 6152 | .probe = mwl8k_probe, |
8dee5eef | 6153 | .remove = mwl8k_remove, |
a66098da LB |
6154 | }; |
6155 | ||
5b0a3b7e | 6156 | module_pci_driver(mwl8k_driver); |
c2c357ce LB |
6157 | |
6158 | MODULE_DESCRIPTION(MWL8K_DESC); | |
6159 | MODULE_VERSION(MWL8K_VERSION); | |
6160 | MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>"); | |
6161 | MODULE_LICENSE("GPL"); |