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mwl8k: Delete ampdu streams with state AMPDU_STREAM_NEW in sta remove
[deliverable/linux.git] / drivers / net / wireless / mwl8k.c
CommitLineData
a66098da 1/*
ce9e2e1b
LB		 2 * drivers/net/wireless/mwl8k.c
3 * Driver for Marvell TOPDOG 802.11 Wireless cards
a66098da 4 *
a5fb297d 5 * Copyright (C) 2008, 2009, 2010 Marvell Semiconductor Inc.
a66098da
LB		 6 *
7 * This file is licensed under the terms of the GNU General Public
8 * License version 2. This program is licensed "as is" without any
9 * warranty of any kind, whether express or implied.
10 */
11
12#include <linux/init.h>
a6b7a407 13#include <linux/interrupt.h>
a66098da
LB		 14#include <linux/module.h>
15#include <linux/kernel.h>
3d76e82c 16#include <linux/sched.h>
a66098da
LB		 17#include <linux/spinlock.h>
18#include <linux/list.h>
19#include <linux/pci.h>
20#include <linux/delay.h>
21#include <linux/completion.h>
22#include <linux/etherdevice.h>
5a0e3ad6 23#include <linux/slab.h>
a66098da
LB		 24#include <net/mac80211.h>
25#include <linux/moduleparam.h>
26#include <linux/firmware.h>
27#include <linux/workqueue.h>
28
29#define MWL8K_DESC "Marvell TOPDOG(R) 802.11 Wireless Network Driver"
30#define MWL8K_NAME KBUILD_MODNAME
00e8e692 31#define MWL8K_VERSION "0.13"
a66098da 32
0863ade8 33/* Module parameters */
eb939922 34static bool ap_mode_default;
0863ade8
BC		 35module_param(ap_mode_default, bool, 0);
36MODULE_PARM_DESC(ap_mode_default,
37 "Set to 1 to make ap mode the default instead of sta mode");
38
a66098da
LB		 39/* Register definitions */
40#define MWL8K_HIU_GEN_PTR 0x00000c10
ce9e2e1b
LB		 41#define MWL8K_MODE_STA 0x0000005a
42#define MWL8K_MODE_AP 0x000000a5
a66098da 43#define MWL8K_HIU_INT_CODE 0x00000c14
ce9e2e1b
LB		 44#define MWL8K_FWSTA_READY 0xf0f1f2f4
45#define MWL8K_FWAP_READY 0xf1f2f4a5
46#define MWL8K_INT_CODE_CMD_FINISHED 0x00000005
a66098da
LB		 47#define MWL8K_HIU_SCRATCH 0x00000c40
48
49/* Host->device communications */
50#define MWL8K_HIU_H2A_INTERRUPT_EVENTS 0x00000c18
51#define MWL8K_HIU_H2A_INTERRUPT_STATUS 0x00000c1c
52#define MWL8K_HIU_H2A_INTERRUPT_MASK 0x00000c20
53#define MWL8K_HIU_H2A_INTERRUPT_CLEAR_SEL 0x00000c24
54#define MWL8K_HIU_H2A_INTERRUPT_STATUS_MASK 0x00000c28
ce9e2e1b
LB		 55#define MWL8K_H2A_INT_DUMMY (1 << 20)
56#define MWL8K_H2A_INT_RESET (1 << 15)
57#define MWL8K_H2A_INT_DOORBELL (1 << 1)
58#define MWL8K_H2A_INT_PPA_READY (1 << 0)
a66098da
LB		 59
60/* Device->host communications */
61#define MWL8K_HIU_A2H_INTERRUPT_EVENTS 0x00000c2c
62#define MWL8K_HIU_A2H_INTERRUPT_STATUS 0x00000c30
63#define MWL8K_HIU_A2H_INTERRUPT_MASK 0x00000c34
64#define MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL 0x00000c38
65#define MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK 0x00000c3c
ce9e2e1b 66#define MWL8K_A2H_INT_DUMMY (1 << 20)
3aefc37e 67#define MWL8K_A2H_INT_BA_WATCHDOG (1 << 14)
ce9e2e1b
LB		 68#define MWL8K_A2H_INT_CHNL_SWITCHED (1 << 11)
69#define MWL8K_A2H_INT_QUEUE_EMPTY (1 << 10)
70#define MWL8K_A2H_INT_RADAR_DETECT (1 << 7)
71#define MWL8K_A2H_INT_RADIO_ON (1 << 6)
72#define MWL8K_A2H_INT_RADIO_OFF (1 << 5)
73#define MWL8K_A2H_INT_MAC_EVENT (1 << 3)
74#define MWL8K_A2H_INT_OPC_DONE (1 << 2)
75#define MWL8K_A2H_INT_RX_READY (1 << 1)
76#define MWL8K_A2H_INT_TX_DONE (1 << 0)
a66098da 77
566875db
PN		 78/* HW micro second timer register
79 * located at offset 0xA600. This
80 * will be used to timestamp tx
81 * packets.
82 */
83
84#define MWL8K_HW_TIMER_REGISTER 0x0000a600
85
a66098da
LB		 86#define MWL8K_A2H_EVENTS (MWL8K_A2H_INT_DUMMY | \
87 MWL8K_A2H_INT_CHNL_SWITCHED | \
88 MWL8K_A2H_INT_QUEUE_EMPTY | \
89 MWL8K_A2H_INT_RADAR_DETECT | \
90 MWL8K_A2H_INT_RADIO_ON | \
91 MWL8K_A2H_INT_RADIO_OFF | \
92 MWL8K_A2H_INT_MAC_EVENT | \
93 MWL8K_A2H_INT_OPC_DONE | \
94 MWL8K_A2H_INT_RX_READY | \
3aefc37e
NS		 95 MWL8K_A2H_INT_TX_DONE | \
96 MWL8K_A2H_INT_BA_WATCHDOG)
a66098da 97
a66098da 98#define MWL8K_RX_QUEUES 1
e600707b 99#define MWL8K_TX_WMM_QUEUES 4
8a7a578c 100#define MWL8K_MAX_AMPDU_QUEUES 8
e600707b
BC		 101#define MWL8K_MAX_TX_QUEUES (MWL8K_TX_WMM_QUEUES + MWL8K_MAX_AMPDU_QUEUES)
102#define mwl8k_tx_queues(priv) (MWL8K_TX_WMM_QUEUES + (priv)->num_ampdu_queues)
a66098da 103
7fb978b7
YAP		 104/* txpriorities are mapped with hw queues.
105 * Each hw queue has a txpriority.
106 */
107#define TOTAL_HW_TX_QUEUES 8
108
109/* Each HW queue can have one AMPDU stream.
110 * But, because one of the hw queue is reserved,
111 * maximum AMPDU queues that can be created are
112 * one short of total tx queues.
113 */
114#define MWL8K_NUM_AMPDU_STREAMS (TOTAL_HW_TX_QUEUES - 1)
115
54bc3a0d
LB		 116struct rxd_ops {
117 int rxd_size;
118 void (*rxd_init)(void *rxd, dma_addr_t next_dma_addr);
119 void (*rxd_refill)(void *rxd, dma_addr_t addr, int len);
20f09c3d 120 int (*rxd_process)(void *rxd, struct ieee80211_rx_status *status,
0d462bbb 121 __le16 *qos, s8 *noise);
54bc3a0d
LB		 122};
123
45a390dd 124struct mwl8k_device_info {
a74b295e
LB		 125 char *part_name;
126 char *helper_image;
0863ade8
BC		 127 char *fw_image_sta;
128 char *fw_image_ap;
89a91f4f 129 struct rxd_ops *ap_rxd_ops;
952a0e96 130 u32 fw_api_ap;
45a390dd
LB		 131};
132
a66098da 133struct mwl8k_rx_queue {
45eb400d 134 int rxd_count;
a66098da
LB		 135
136 /* hw receives here */
45eb400d 137 int head;
a66098da
LB		 138
139 /* refill descs here */
45eb400d 140 int tail;
a66098da 141
54bc3a0d 142 void *rxd;
45eb400d 143 dma_addr_t rxd_dma;
788838eb
LB		 144 struct {
145 struct sk_buff *skb;
53b1b3e1 146 DEFINE_DMA_UNMAP_ADDR(dma);
788838eb 147 } *buf;
a66098da
LB		 148};
149
a66098da
LB		 150struct mwl8k_tx_queue {
151 /* hw transmits here */
45eb400d 152 int head;
a66098da
LB		 153
154 /* sw appends here */
45eb400d 155 int tail;
a66098da 156
8ccbc3b8 157 unsigned int len;
45eb400d
LB		 158 struct mwl8k_tx_desc *txd;
159 dma_addr_t txd_dma;
160 struct sk_buff **skb;
a66098da
LB		 161};
162
ac109fd0
BC		 163enum {
164 AMPDU_NO_STREAM,
165 AMPDU_STREAM_NEW,
166 AMPDU_STREAM_IN_PROGRESS,
167 AMPDU_STREAM_ACTIVE,
168};
169
5faa1aff
NS		 170struct mwl8k_ampdu_stream {
171 struct ieee80211_sta *sta;
172 u8 tid;
173 u8 state;
174 u8 idx;
5faa1aff
NS		 175};
176
a66098da 177struct mwl8k_priv {
a66098da 178 struct ieee80211_hw *hw;
a66098da 179 struct pci_dev *pdev;
bf3ca7f7 180 int irq;
a66098da 181
45a390dd
LB		 182 struct mwl8k_device_info *device_info;
183
be695fc4
LB		 184 void __iomem *sram;
185 void __iomem *regs;
186
187 /* firmware */
d1f9e41d
BC		 188 const struct firmware *fw_helper;
189 const struct firmware *fw_ucode;
a66098da 190
be695fc4
LB		 191 /* hardware/firmware parameters */
192 bool ap_fw;
193 struct rxd_ops *rxd_ops;
777ad375
LB		 194 struct ieee80211_supported_band band_24;
195 struct ieee80211_channel channels_24[14];
196 struct ieee80211_rate rates_24[14];
4eae9edd
LB		 197 struct ieee80211_supported_band band_50;
198 struct ieee80211_channel channels_50[4];
199 struct ieee80211_rate rates_50[9];
ee0ddf18
LB		 200 u32 ap_macids_supported;
201 u32 sta_macids_supported;
be695fc4 202
8a7a578c
BC		 203 /* Ampdu stream information */
204 u8 num_ampdu_queues;
ac109fd0
BC		 205 spinlock_t stream_lock;
206 struct mwl8k_ampdu_stream ampdu[MWL8K_MAX_AMPDU_QUEUES];
3aefc37e 207 struct work_struct watchdog_ba_handle;
8a7a578c 208
618952a7
LB		 209 /* firmware access */
210 struct mutex fw_mutex;
211 struct task_struct *fw_mutex_owner;
6b6accc3 212 struct task_struct *hw_restart_owner;
618952a7 213 int fw_mutex_depth;
618952a7
LB		 214 struct completion *hostcmd_wait;
215
c27a54d3
YAP		 216 atomic_t watchdog_event_pending;
217
a66098da
LB		 218 /* lock held over TX and TX reap */
219 spinlock_t tx_lock;
a66098da 220
88de754a
LB		 221 /* TX quiesce completion, protected by fw_mutex and tx_lock */
222 struct completion *tx_wait;
223
f5bb87cf 224 /* List of interfaces. */
ee0ddf18 225 u32 macids_used;
f5bb87cf 226 struct list_head vif_list;
a66098da 227
a66098da
LB		 228 /* power management status cookie from firmware */
229 u32 *cookie;
230 dma_addr_t cookie_dma;
231
232 u16 num_mcaddrs;
a66098da 233 u8 hw_rev;
2aa7b01f 234 u32 fw_rev;
a66098da
LB		 235
236 /*
237 * Running count of TX packets in flight, to avoid
238 * iterating over the transmit rings each time.
239 */
240 int pending_tx_pkts;
241
242 struct mwl8k_rx_queue rxq[MWL8K_RX_QUEUES];
e600707b
BC		 243 struct mwl8k_tx_queue txq[MWL8K_MAX_TX_QUEUES];
244 u32 txq_offset[MWL8K_MAX_TX_QUEUES];
a66098da 245
c46563b7 246 bool radio_on;
68ce3884 247 bool radio_short_preamble;
a43c49a8 248 bool sniffer_enabled;
0439b1f5 249 bool wmm_enabled;
a66098da 250
a66098da
LB		 251 /* XXX need to convert this to handle multiple interfaces */
252 bool capture_beacon;
d89173f2 253 u8 capture_bssid[ETH_ALEN];
a66098da
LB		 254 struct sk_buff *beacon_skb;
255
256 /*
257 * This FJ worker has to be global as it is scheduled from the
258 * RX handler. At this point we don't know which interface it
259 * belongs to until the list of bssids waiting to complete join
260 * is checked.
261 */
262 struct work_struct finalize_join_worker;
263
1e9f9de3
LB		 264 /* Tasklet to perform TX reclaim. */
265 struct tasklet_struct poll_tx_task;
67e2eb27
LB		 266
267 /* Tasklet to perform RX. */
268 struct tasklet_struct poll_rx_task;
0d462bbb
JL		 269
270 /* Most recently reported noise in dBm */
271 s8 noise;
0863ade8
BC		 272
273 /*
274 * preserve the queue configurations so they can be restored if/when
275 * the firmware image is swapped.
276 */
e600707b 277 struct ieee80211_tx_queue_params wmm_params[MWL8K_TX_WMM_QUEUES];
99020471 278
6b6accc3
YAP		 279 /* To perform the task of reloading the firmware */
280 struct work_struct fw_reload;
281 bool hw_restart_in_progress;
282
99020471
BC		 283 /* async firmware loading state */
284 unsigned fw_state;
285 char *fw_pref;
286 char *fw_alt;
287 struct completion firmware_loading_complete;
a66098da
LB		 288};
289
e53d9b96
NS		 290#define MAX_WEP_KEY_LEN 13
291#define NUM_WEP_KEYS 4
292
a66098da
LB		 293/* Per interface specific private data */
294struct mwl8k_vif {
f5bb87cf
LB		 295 struct list_head list;
296 struct ieee80211_vif *vif;
297
f57ca9c1
LB		 298 /* Firmware macid for this vif. */
299 int macid;
300
c2c2b12a 301 /* Non AMPDU sequence number assigned by driver. */
a680400e 302 u16 seqno;
e53d9b96
NS		 303
304 /* Saved WEP keys */
305 struct {
306 u8 enabled;
307 u8 key[sizeof(struct ieee80211_key_conf) + MAX_WEP_KEY_LEN];
308 } wep_key_conf[NUM_WEP_KEYS];
d9a07d49
NS		 309
310 /* BSSID */
311 u8 bssid[ETH_ALEN];
312
313 /* A flag to indicate is HW crypto is enabled for this bssid */
314 bool is_hw_crypto_enabled;
a66098da 315};
a94cc97e 316#define MWL8K_VIF(_vif) ((struct mwl8k_vif *)&((_vif)->drv_priv))
fcdc403c 317#define IEEE80211_KEY_CONF(_u8) ((struct ieee80211_key_conf *)(_u8))
a66098da 318
d0805c1c
BC		 319struct tx_traffic_info {
320 u32 start_time;
321 u32 pkts;
322};
323
324#define MWL8K_MAX_TID 8
a680400e
LB		 325struct mwl8k_sta {
326 /* Index into station database. Returned by UPDATE_STADB. */
327 u8 peer_id;
17033543 328 u8 is_ampdu_allowed;
d0805c1c 329 struct tx_traffic_info tx_stats[MWL8K_MAX_TID];
a680400e
LB		 330};
331#define MWL8K_STA(_sta) ((struct mwl8k_sta *)&((_sta)->drv_priv))
332
777ad375 333static const struct ieee80211_channel mwl8k_channels_24[] = {
a66098da
LB		 334 { .center_freq = 2412, .hw_value = 1, },
335 { .center_freq = 2417, .hw_value = 2, },
336 { .center_freq = 2422, .hw_value = 3, },
337 { .center_freq = 2427, .hw_value = 4, },
338 { .center_freq = 2432, .hw_value = 5, },
339 { .center_freq = 2437, .hw_value = 6, },
340 { .center_freq = 2442, .hw_value = 7, },
341 { .center_freq = 2447, .hw_value = 8, },
342 { .center_freq = 2452, .hw_value = 9, },
343 { .center_freq = 2457, .hw_value = 10, },
344 { .center_freq = 2462, .hw_value = 11, },
647ca6b0
LB		 345 { .center_freq = 2467, .hw_value = 12, },
346 { .center_freq = 2472, .hw_value = 13, },
347 { .center_freq = 2484, .hw_value = 14, },
a66098da
LB		 348};
349
777ad375 350static const struct ieee80211_rate mwl8k_rates_24[] = {
a66098da
LB		 351 { .bitrate = 10, .hw_value = 2, },
352 { .bitrate = 20, .hw_value = 4, },
353 { .bitrate = 55, .hw_value = 11, },
5dfd3e2c
LB		 354 { .bitrate = 110, .hw_value = 22, },
355 { .bitrate = 220, .hw_value = 44, },
a66098da
LB		 356 { .bitrate = 60, .hw_value = 12, },
357 { .bitrate = 90, .hw_value = 18, },
a66098da
LB		 358 { .bitrate = 120, .hw_value = 24, },
359 { .bitrate = 180, .hw_value = 36, },
360 { .bitrate = 240, .hw_value = 48, },
361 { .bitrate = 360, .hw_value = 72, },
362 { .bitrate = 480, .hw_value = 96, },
363 { .bitrate = 540, .hw_value = 108, },
140eb5e2
LB		 364 { .bitrate = 720, .hw_value = 144, },
365};
366
4eae9edd
LB		 367static const struct ieee80211_channel mwl8k_channels_50[] = {
368 { .center_freq = 5180, .hw_value = 36, },
369 { .center_freq = 5200, .hw_value = 40, },
370 { .center_freq = 5220, .hw_value = 44, },
371 { .center_freq = 5240, .hw_value = 48, },
372};
373
374static const struct ieee80211_rate mwl8k_rates_50[] = {
375 { .bitrate = 60, .hw_value = 12, },
376 { .bitrate = 90, .hw_value = 18, },
377 { .bitrate = 120, .hw_value = 24, },
378 { .bitrate = 180, .hw_value = 36, },
379 { .bitrate = 240, .hw_value = 48, },
380 { .bitrate = 360, .hw_value = 72, },
381 { .bitrate = 480, .hw_value = 96, },
382 { .bitrate = 540, .hw_value = 108, },
383 { .bitrate = 720, .hw_value = 144, },
384};
385
a66098da 386/* Set or get info from Firmware */
a66098da 387#define MWL8K_CMD_GET 0x0000
41fdf097
NS		 388#define MWL8K_CMD_SET 0x0001
389#define MWL8K_CMD_SET_LIST 0x0002
a66098da
LB		 390
391/* Firmware command codes */
392#define MWL8K_CMD_CODE_DNLD 0x0001
393#define MWL8K_CMD_GET_HW_SPEC 0x0003
42fba21d 394#define MWL8K_CMD_SET_HW_SPEC 0x0004
a66098da
LB		 395#define MWL8K_CMD_MAC_MULTICAST_ADR 0x0010
396#define MWL8K_CMD_GET_STAT 0x0014
ff45fc60
LB		 397#define MWL8K_CMD_RADIO_CONTROL 0x001c
398#define MWL8K_CMD_RF_TX_POWER 0x001e
41fdf097 399#define MWL8K_CMD_TX_POWER 0x001f
08b06347 400#define MWL8K_CMD_RF_ANTENNA 0x0020
aa21d0f6 401#define MWL8K_CMD_SET_BEACON 0x0100 /* per-vif */
a66098da
LB		 402#define MWL8K_CMD_SET_PRE_SCAN 0x0107
403#define MWL8K_CMD_SET_POST_SCAN 0x0108
ff45fc60
LB		 404#define MWL8K_CMD_SET_RF_CHANNEL 0x010a
405#define MWL8K_CMD_SET_AID 0x010d
406#define MWL8K_CMD_SET_RATE 0x0110
407#define MWL8K_CMD_SET_FINALIZE_JOIN 0x0111
408#define MWL8K_CMD_RTS_THRESHOLD 0x0113
a66098da 409#define MWL8K_CMD_SET_SLOT 0x0114
ff45fc60
LB		 410#define MWL8K_CMD_SET_EDCA_PARAMS 0x0115
411#define MWL8K_CMD_SET_WMM_MODE 0x0123
a66098da 412#define MWL8K_CMD_MIMO_CONFIG 0x0125
ff45fc60 413#define MWL8K_CMD_USE_FIXED_RATE 0x0126
a66098da 414#define MWL8K_CMD_ENABLE_SNIFFER 0x0150
aa21d0f6 415#define MWL8K_CMD_SET_MAC_ADDR 0x0202 /* per-vif */
a66098da 416#define MWL8K_CMD_SET_RATEADAPT_MODE 0x0203
3aefc37e 417#define MWL8K_CMD_GET_WATCHDOG_BITMAP 0x0205
197a4e4e 418#define MWL8K_CMD_DEL_MAC_ADDR 0x0206 /* per-vif */
aa21d0f6
LB		 419#define MWL8K_CMD_BSS_START 0x1100 /* per-vif */
420#define MWL8K_CMD_SET_NEW_STN 0x1111 /* per-vif */
fcdc403c 421#define MWL8K_CMD_UPDATE_ENCRYPTION 0x1122 /* per-vif */
ff45fc60 422#define MWL8K_CMD_UPDATE_STADB 0x1123
5faa1aff 423#define MWL8K_CMD_BASTREAM 0x1125
a66098da 424
b603742f 425static const char *mwl8k_cmd_name(__le16 cmd, char *buf, int bufsize)
a66098da 426{
b603742f
JL		 427 u16 command = le16_to_cpu(cmd);
428
a66098da
LB		 429#define MWL8K_CMDNAME(x) case MWL8K_CMD_##x: do {\
430 snprintf(buf, bufsize, "%s", #x);\
431 return buf;\
432 } while (0)
b603742f 433 switch (command & ~0x8000) {
a66098da
LB		 434 MWL8K_CMDNAME(CODE_DNLD);
435 MWL8K_CMDNAME(GET_HW_SPEC);
42fba21d 436 MWL8K_CMDNAME(SET_HW_SPEC);
a66098da
LB		 437 MWL8K_CMDNAME(MAC_MULTICAST_ADR);
438 MWL8K_CMDNAME(GET_STAT);
439 MWL8K_CMDNAME(RADIO_CONTROL);
440 MWL8K_CMDNAME(RF_TX_POWER);
41fdf097 441 MWL8K_CMDNAME(TX_POWER);
08b06347 442 MWL8K_CMDNAME(RF_ANTENNA);
b64fe619 443 MWL8K_CMDNAME(SET_BEACON);
a66098da
LB		 444 MWL8K_CMDNAME(SET_PRE_SCAN);
445 MWL8K_CMDNAME(SET_POST_SCAN);
446 MWL8K_CMDNAME(SET_RF_CHANNEL);
ff45fc60
LB		 447 MWL8K_CMDNAME(SET_AID);
448 MWL8K_CMDNAME(SET_RATE);
449 MWL8K_CMDNAME(SET_FINALIZE_JOIN);
450 MWL8K_CMDNAME(RTS_THRESHOLD);
a66098da 451 MWL8K_CMDNAME(SET_SLOT);
ff45fc60
LB		 452 MWL8K_CMDNAME(SET_EDCA_PARAMS);
453 MWL8K_CMDNAME(SET_WMM_MODE);
a66098da 454 MWL8K_CMDNAME(MIMO_CONFIG);
ff45fc60 455 MWL8K_CMDNAME(USE_FIXED_RATE);
a66098da 456 MWL8K_CMDNAME(ENABLE_SNIFFER);
32060e1b 457 MWL8K_CMDNAME(SET_MAC_ADDR);
a66098da 458 MWL8K_CMDNAME(SET_RATEADAPT_MODE);
b64fe619 459 MWL8K_CMDNAME(BSS_START);
3f5610ff 460 MWL8K_CMDNAME(SET_NEW_STN);
fcdc403c 461 MWL8K_CMDNAME(UPDATE_ENCRYPTION);
ff45fc60 462 MWL8K_CMDNAME(UPDATE_STADB);
5faa1aff 463 MWL8K_CMDNAME(BASTREAM);
3aefc37e 464 MWL8K_CMDNAME(GET_WATCHDOG_BITMAP);
a66098da
LB		 465 default:
466 snprintf(buf, bufsize, "0x%x", cmd);
467 }
468#undef MWL8K_CMDNAME
469
470 return buf;
471}
472
473/* Hardware and firmware reset */
474static void mwl8k_hw_reset(struct mwl8k_priv *priv)
475{
476 iowrite32(MWL8K_H2A_INT_RESET,
477 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
478 iowrite32(MWL8K_H2A_INT_RESET,
479 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
480 msleep(20);
481}
482
483/* Release fw image */
d1f9e41d 484static void mwl8k_release_fw(const struct firmware **fw)
a66098da
LB		 485{
486 if (*fw == NULL)
487 return;
488 release_firmware(*fw);
489 *fw = NULL;
490}
491
492static void mwl8k_release_firmware(struct mwl8k_priv *priv)
493{
22be40d9
LB		 494 mwl8k_release_fw(&priv->fw_ucode);
495 mwl8k_release_fw(&priv->fw_helper);
a66098da
LB		 496}
497
99020471
BC		 498/* states for asynchronous f/w loading */
499static void mwl8k_fw_state_machine(const struct firmware *fw, void *context);
500enum {
501 FW_STATE_INIT = 0,
502 FW_STATE_LOADING_PREF,
503 FW_STATE_LOADING_ALT,
504 FW_STATE_ERROR,
505};
506
a66098da
LB		 507/* Request fw image */
508static int mwl8k_request_fw(struct mwl8k_priv *priv,
d1f9e41d 509 const char *fname, const struct firmware **fw,
99020471 510 bool nowait)
a66098da
LB		 511{
512 /* release current image */
513 if (*fw != NULL)
514 mwl8k_release_fw(fw);
515
99020471
BC		 516 if (nowait)
517 return request_firmware_nowait(THIS_MODULE, 1, fname,
518 &priv->pdev->dev, GFP_KERNEL,
519 priv, mwl8k_fw_state_machine);
520 else
d1f9e41d 521 return request_firmware(fw, fname, &priv->pdev->dev);
a66098da
LB		 522}
523
99020471
BC		 524static int mwl8k_request_firmware(struct mwl8k_priv *priv, char *fw_image,
525 bool nowait)
a66098da 526{
a74b295e 527 struct mwl8k_device_info *di = priv->device_info;
a66098da
LB		 528 int rc;
529
a74b295e 530 if (di->helper_image != NULL) {
99020471
BC		 531 if (nowait)
532 rc = mwl8k_request_fw(priv, di->helper_image,
533 &priv->fw_helper, true);
534 else
535 rc = mwl8k_request_fw(priv, di->helper_image,
536 &priv->fw_helper, false);
537 if (rc)
538 printk(KERN_ERR "%s: Error requesting helper fw %s\n",
539 pci_name(priv->pdev), di->helper_image);
540
541 if (rc || nowait)
a74b295e 542 return rc;
a66098da
LB		 543 }
544
99020471
BC		 545 if (nowait) {
546 /*
547 * if we get here, no helper image is needed. Skip the
548 * FW_STATE_INIT state.
549 */
550 priv->fw_state = FW_STATE_LOADING_PREF;
551 rc = mwl8k_request_fw(priv, fw_image,
552 &priv->fw_ucode,
553 true);
554 } else
555 rc = mwl8k_request_fw(priv, fw_image,
556 &priv->fw_ucode, false);
a66098da 557 if (rc) {
c2c357ce 558 printk(KERN_ERR "%s: Error requesting firmware file %s\n",
0863ade8 559 pci_name(priv->pdev), fw_image);
22be40d9 560 mwl8k_release_fw(&priv->fw_helper);
a66098da
LB		 561 return rc;
562 }
563
564 return 0;
565}
566
567struct mwl8k_cmd_pkt {
568 __le16 code;
569 __le16 length;
f57ca9c1
LB		 570 __u8 seq_num;
571 __u8 macid;
a66098da
LB		 572 __le16 result;
573 char payload[0];
ba2d3587 574} __packed;
a66098da
LB		 575
576/*
577 * Firmware loading.
578 */
579static int
580mwl8k_send_fw_load_cmd(struct mwl8k_priv *priv, void *data, int length)
581{
582 void __iomem *regs = priv->regs;
583 dma_addr_t dma_addr;
a66098da
LB		 584 int loops;
585
586 dma_addr = pci_map_single(priv->pdev, data, length, PCI_DMA_TODEVICE);
587 if (pci_dma_mapping_error(priv->pdev, dma_addr))
588 return -ENOMEM;
589
590 iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
591 iowrite32(0, regs + MWL8K_HIU_INT_CODE);
592 iowrite32(MWL8K_H2A_INT_DOORBELL,
593 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
594 iowrite32(MWL8K_H2A_INT_DUMMY,
595 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
596
a66098da
LB		 597 loops = 1000;
598 do {
599 u32 int_code;
600
601 int_code = ioread32(regs + MWL8K_HIU_INT_CODE);
602 if (int_code == MWL8K_INT_CODE_CMD_FINISHED) {
603 iowrite32(0, regs + MWL8K_HIU_INT_CODE);
a66098da
LB		 604 break;
605 }
606
3d76e82c 607 cond_resched();
a66098da
LB		 608 udelay(1);
609 } while (--loops);
610
611 pci_unmap_single(priv->pdev, dma_addr, length, PCI_DMA_TODEVICE);
612
d4b70570 613 return loops ? 0 : -ETIMEDOUT;
a66098da
LB		 614}
615
616static int mwl8k_load_fw_image(struct mwl8k_priv *priv,
617 const u8 *data, size_t length)
618{
619 struct mwl8k_cmd_pkt *cmd;
620 int done;
621 int rc = 0;
622
623 cmd = kmalloc(sizeof(*cmd) + 256, GFP_KERNEL);
624 if (cmd == NULL)
625 return -ENOMEM;
626
627 cmd->code = cpu_to_le16(MWL8K_CMD_CODE_DNLD);
628 cmd->seq_num = 0;
f57ca9c1 629 cmd->macid = 0;
a66098da
LB		 630 cmd->result = 0;
631
632 done = 0;
633 while (length) {
634 int block_size = length > 256 ? 256 : length;
635
636 memcpy(cmd->payload, data + done, block_size);
637 cmd->length = cpu_to_le16(block_size);
638
639 rc = mwl8k_send_fw_load_cmd(priv, cmd,
640 sizeof(*cmd) + block_size);
641 if (rc)
642 break;
643
644 done += block_size;
645 length -= block_size;
646 }
647
648 if (!rc) {
649 cmd->length = 0;
650 rc = mwl8k_send_fw_load_cmd(priv, cmd, sizeof(*cmd));
651 }
652
653 kfree(cmd);
654
655 return rc;
656}
657
658static int mwl8k_feed_fw_image(struct mwl8k_priv *priv,
659 const u8 *data, size_t length)
660{
661 unsigned char *buffer;
662 int may_continue, rc = 0;
663 u32 done, prev_block_size;
664
665 buffer = kmalloc(1024, GFP_KERNEL);
666 if (buffer == NULL)
667 return -ENOMEM;
668
669 done = 0;
670 prev_block_size = 0;
671 may_continue = 1000;
672 while (may_continue > 0) {
673 u32 block_size;
674
675 block_size = ioread32(priv->regs + MWL8K_HIU_SCRATCH);
676 if (block_size & 1) {
677 block_size &= ~1;
678 may_continue--;
679 } else {
680 done += prev_block_size;
681 length -= prev_block_size;
682 }
683
684 if (block_size > 1024 || block_size > length) {
685 rc = -EOVERFLOW;
686 break;
687 }
688
689 if (length == 0) {
690 rc = 0;
691 break;
692 }
693
694 if (block_size == 0) {
695 rc = -EPROTO;
696 may_continue--;
697 udelay(1);
698 continue;
699 }
700
701 prev_block_size = block_size;
702 memcpy(buffer, data + done, block_size);
703
704 rc = mwl8k_send_fw_load_cmd(priv, buffer, block_size);
705 if (rc)
706 break;
707 }
708
709 if (!rc && length != 0)
710 rc = -EREMOTEIO;
711
712 kfree(buffer);
713
714 return rc;
715}
716
c2c357ce 717static int mwl8k_load_firmware(struct ieee80211_hw *hw)
a66098da 718{
c2c357ce 719 struct mwl8k_priv *priv = hw->priv;
d1f9e41d 720 const struct firmware *fw = priv->fw_ucode;
c2c357ce
LB		 721 int rc;
722 int loops;
723
724 if (!memcmp(fw->data, "\x01\x00\x00\x00", 4)) {
d1f9e41d 725 const struct firmware *helper = priv->fw_helper;
a66098da 726
c2c357ce
LB		 727 if (helper == NULL) {
728 printk(KERN_ERR "%s: helper image needed but none "
729 "given\n", pci_name(priv->pdev));
730 return -EINVAL;
731 }
a66098da 732
c2c357ce 733 rc = mwl8k_load_fw_image(priv, helper->data, helper->size);
a66098da
LB		 734 if (rc) {
735 printk(KERN_ERR "%s: unable to load firmware "
c2c357ce 736 "helper image\n", pci_name(priv->pdev));
a66098da
LB		 737 return rc;
738 }
ba30c4a5 739 msleep(20);
a66098da 740
c2c357ce 741 rc = mwl8k_feed_fw_image(priv, fw->data, fw->size);
a66098da 742 } else {
c2c357ce 743 rc = mwl8k_load_fw_image(priv, fw->data, fw->size);
a66098da
LB		 744 }
745
746 if (rc) {
c2c357ce
LB		 747 printk(KERN_ERR "%s: unable to load firmware image\n",
748 pci_name(priv->pdev));
a66098da
LB		 749 return rc;
750 }
751
89a91f4f 752 iowrite32(MWL8K_MODE_STA, priv->regs + MWL8K_HIU_GEN_PTR);
a66098da 753
89b872e2 754 loops = 500000;
a66098da 755 do {
eae74e65
LB		 756 u32 ready_code;
757
758 ready_code = ioread32(priv->regs + MWL8K_HIU_INT_CODE);
759 if (ready_code == MWL8K_FWAP_READY) {
3db1cd5c 760 priv->ap_fw = true;
eae74e65
LB		 761 break;
762 } else if (ready_code == MWL8K_FWSTA_READY) {
3db1cd5c 763 priv->ap_fw = false;
a66098da 764 break;
eae74e65
LB		 765 }
766
767 cond_resched();
a66098da
LB		 768 udelay(1);
769 } while (--loops);
770
771 return loops ? 0 : -ETIMEDOUT;
772}
773
774
a66098da
LB		 775/* DMA header used by firmware and hardware. */
776struct mwl8k_dma_data {
777 __le16 fwlen;
778 struct ieee80211_hdr wh;
20f09c3d 779 char data[0];
ba2d3587 780} __packed;
a66098da
LB		 781
782/* Routines to add/remove DMA header from skb. */
20f09c3d 783static inline void mwl8k_remove_dma_header(struct sk_buff *skb, __le16 qos)
a66098da 784{
20f09c3d
LB		 785 struct mwl8k_dma_data *tr;
786 int hdrlen;
787
788 tr = (struct mwl8k_dma_data *)skb->data;
789 hdrlen = ieee80211_hdrlen(tr->wh.frame_control);
790
791 if (hdrlen != sizeof(tr->wh)) {
792 if (ieee80211_is_data_qos(tr->wh.frame_control)) {
793 memmove(tr->data - hdrlen, &tr->wh, hdrlen - 2);
794 *((__le16 *)(tr->data - 2)) = qos;
795 } else {
796 memmove(tr->data - hdrlen, &tr->wh, hdrlen);
797 }
a66098da 798 }
20f09c3d
LB		 799
800 if (hdrlen != sizeof(*tr))
801 skb_pull(skb, sizeof(*tr) - hdrlen);
a66098da
LB		 802}
803
ff776cec
YAP		 804#define REDUCED_TX_HEADROOM 8
805
252486a1 806static void
e4eefec7
YAP		 807mwl8k_add_dma_header(struct mwl8k_priv *priv, struct sk_buff *skb,
808 int head_pad, int tail_pad)
a66098da
LB		 809{
810 struct ieee80211_hdr *wh;
ca009301 811 int hdrlen;
252486a1 812 int reqd_hdrlen;
a66098da
LB		 813 struct mwl8k_dma_data *tr;
814
ca009301
LB		 815 /*
816 * Add a firmware DMA header; the firmware requires that we
817 * present a 2-byte payload length followed by a 4-address
818 * header (without QoS field), followed (optionally) by any
819 * WEP/ExtIV header (but only filled in for CCMP).
820 */
a66098da 821 wh = (struct ieee80211_hdr *)skb->data;
ca009301 822
a66098da 823 hdrlen = ieee80211_hdrlen(wh->frame_control);
ff776cec
YAP		 824
825 /*
826 * Check if skb_resize is required because of
827 * tx_headroom adjustment.
828 */
829 if (priv->ap_fw && (hdrlen < (sizeof(struct ieee80211_cts)
830 + REDUCED_TX_HEADROOM))) {
831 if (pskb_expand_head(skb, REDUCED_TX_HEADROOM, 0, GFP_ATOMIC)) {
832
833 wiphy_err(priv->hw->wiphy,
834 "Failed to reallocate TX buffer\n");
835 return;
836 }
837 skb->truesize += REDUCED_TX_HEADROOM;
838 }
839
e4eefec7 840 reqd_hdrlen = sizeof(*tr) + head_pad;
252486a1
NS		 841
842 if (hdrlen != reqd_hdrlen)
843 skb_push(skb, reqd_hdrlen - hdrlen);
a66098da 844
ca009301 845 if (ieee80211_is_data_qos(wh->frame_control))
252486a1 846 hdrlen -= IEEE80211_QOS_CTL_LEN;
a66098da
LB		 847
848 tr = (struct mwl8k_dma_data *)skb->data;
849 if (wh != &tr->wh)
850 memmove(&tr->wh, wh, hdrlen);
ca009301
LB		 851 if (hdrlen != sizeof(tr->wh))
852 memset(((void *)&tr->wh) + hdrlen, 0, sizeof(tr->wh) - hdrlen);
a66098da
LB		 853
854 /*
855 * Firmware length is the length of the fully formed "802.11
856 * payload". That is, everything except for the 802.11 header.
857 * This includes all crypto material including the MIC.
858 */
252486a1 859 tr->fwlen = cpu_to_le16(skb->len - sizeof(*tr) + tail_pad);
a66098da
LB		 860}
861
ff776cec
YAP		 862static void mwl8k_encapsulate_tx_frame(struct mwl8k_priv *priv,
863 struct sk_buff *skb)
e53d9b96
NS		 864{
865 struct ieee80211_hdr *wh;
866 struct ieee80211_tx_info *tx_info;
867 struct ieee80211_key_conf *key_conf;
868 int data_pad;
e4eefec7 869 int head_pad = 0;
e53d9b96
NS		 870
871 wh = (struct ieee80211_hdr *)skb->data;
872
873 tx_info = IEEE80211_SKB_CB(skb);
874
875 key_conf = NULL;
876 if (ieee80211_is_data(wh->frame_control))
877 key_conf = tx_info->control.hw_key;
878
879 /*
880 * Make sure the packet header is in the DMA header format (4-address
e4eefec7 881 * without QoS), and add head & tail padding when HW crypto is enabled.
e53d9b96
NS		 882 *
883 * We have the following trailer padding requirements:
884 * - WEP: 4 trailer bytes (ICV)
885 * - TKIP: 12 trailer bytes (8 MIC + 4 ICV)
886 * - CCMP: 8 trailer bytes (MIC)
887 */
888 data_pad = 0;
889 if (key_conf != NULL) {
e4eefec7 890 head_pad = key_conf->iv_len;
e53d9b96
NS		 891 switch (key_conf->cipher) {
892 case WLAN_CIPHER_SUITE_WEP40:
893 case WLAN_CIPHER_SUITE_WEP104:
894 data_pad = 4;
895 break;
896 case WLAN_CIPHER_SUITE_TKIP:
897 data_pad = 12;
898 break;
899 case WLAN_CIPHER_SUITE_CCMP:
900 data_pad = 8;
901 break;
902 }
903 }
e4eefec7 904 mwl8k_add_dma_header(priv, skb, head_pad, data_pad);
e53d9b96 905}
a66098da
LB		 906
907/*
89a91f4f 908 * Packet reception for 88w8366 AP firmware.
6f6d1e9a 909 */
89a91f4f 910struct mwl8k_rxd_8366_ap {
6f6d1e9a
LB		 911 __le16 pkt_len;
912 __u8 sq2;
913 __u8 rate;
914 __le32 pkt_phys_addr;
915 __le32 next_rxd_phys_addr;
916 __le16 qos_control;
917 __le16 htsig2;
918 __le32 hw_rssi_info;
919 __le32 hw_noise_floor_info;
920 __u8 noise_floor;
921 __u8 pad0[3];
922 __u8 rssi;
923 __u8 rx_status;
924 __u8 channel;
925 __u8 rx_ctrl;
ba2d3587 926} __packed;
6f6d1e9a 927
89a91f4f
LB		 928#define MWL8K_8366_AP_RATE_INFO_MCS_FORMAT 0x80
929#define MWL8K_8366_AP_RATE_INFO_40MHZ 0x40
930#define MWL8K_8366_AP_RATE_INFO_RATEID(x) ((x) & 0x3f)
8e9f33f0 931
89a91f4f 932#define MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST 0x80
6f6d1e9a 933
d9a07d49
NS		 934/* 8366 AP rx_status bits */
935#define MWL8K_8366_AP_RXSTAT_DECRYPT_ERR_MASK 0x80
936#define MWL8K_8366_AP_RXSTAT_GENERAL_DECRYPT_ERR 0xFF
937#define MWL8K_8366_AP_RXSTAT_TKIP_DECRYPT_MIC_ERR 0x02
938#define MWL8K_8366_AP_RXSTAT_WEP_DECRYPT_ICV_ERR 0x04
939#define MWL8K_8366_AP_RXSTAT_TKIP_DECRYPT_ICV_ERR 0x08
940
89a91f4f 941static void mwl8k_rxd_8366_ap_init(void *_rxd, dma_addr_t next_dma_addr)
6f6d1e9a 942{
89a91f4f 943 struct mwl8k_rxd_8366_ap *rxd = _rxd;
6f6d1e9a
LB		 944
945 rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
89a91f4f 946 rxd->rx_ctrl = MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST;
6f6d1e9a
LB		 947}
948
89a91f4f 949static void mwl8k_rxd_8366_ap_refill(void *_rxd, dma_addr_t addr, int len)
6f6d1e9a 950{
89a91f4f 951 struct mwl8k_rxd_8366_ap *rxd = _rxd;
6f6d1e9a
LB		 952
953 rxd->pkt_len = cpu_to_le16(len);
954 rxd->pkt_phys_addr = cpu_to_le32(addr);
955 wmb();
956 rxd->rx_ctrl = 0;
957}
958
959static int
89a91f4f 960mwl8k_rxd_8366_ap_process(void *_rxd, struct ieee80211_rx_status *status,
0d462bbb 961 __le16 *qos, s8 *noise)
6f6d1e9a 962{
89a91f4f 963 struct mwl8k_rxd_8366_ap *rxd = _rxd;
6f6d1e9a 964
89a91f4f 965 if (!(rxd->rx_ctrl & MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST))
6f6d1e9a
LB		 966 return -1;
967 rmb();
968
969 memset(status, 0, sizeof(*status));
970
971 status->signal = -rxd->rssi;
0d462bbb 972 *noise = -rxd->noise_floor;
6f6d1e9a 973
89a91f4f 974 if (rxd->rate & MWL8K_8366_AP_RATE_INFO_MCS_FORMAT) {
6f6d1e9a 975 status->flag |= RX_FLAG_HT;
89a91f4f 976 if (rxd->rate & MWL8K_8366_AP_RATE_INFO_40MHZ)
8e9f33f0 977 status->flag |= RX_FLAG_40MHZ;
89a91f4f 978 status->rate_idx = MWL8K_8366_AP_RATE_INFO_RATEID(rxd->rate);
6f6d1e9a
LB		 979 } else {
980 int i;
981
777ad375
LB		 982 for (i = 0; i < ARRAY_SIZE(mwl8k_rates_24); i++) {
983 if (mwl8k_rates_24[i].hw_value == rxd->rate) {
6f6d1e9a
LB		 984 status->rate_idx = i;
985 break;
986 }
987 }
988 }
989
85478344
LB		 990 if (rxd->channel > 14) {
991 status->band = IEEE80211_BAND_5GHZ;
992 if (!(status->flag & RX_FLAG_HT))
993 status->rate_idx -= 5;
994 } else {
995 status->band = IEEE80211_BAND_2GHZ;
996 }
59eb21a6
BR		 997 status->freq = ieee80211_channel_to_frequency(rxd->channel,
998 status->band);
6f6d1e9a 999
20f09c3d
LB		 1000 *qos = rxd->qos_control;
1001
d9a07d49
NS		 1002 if ((rxd->rx_status != MWL8K_8366_AP_RXSTAT_GENERAL_DECRYPT_ERR) &&
1003 (rxd->rx_status & MWL8K_8366_AP_RXSTAT_DECRYPT_ERR_MASK) &&
1004 (rxd->rx_status & MWL8K_8366_AP_RXSTAT_TKIP_DECRYPT_MIC_ERR))
1005 status->flag |= RX_FLAG_MMIC_ERROR;
1006
6f6d1e9a
LB		 1007 return le16_to_cpu(rxd->pkt_len);
1008}
1009
89a91f4f
LB		 1010static struct rxd_ops rxd_8366_ap_ops = {
1011 .rxd_size = sizeof(struct mwl8k_rxd_8366_ap),
1012 .rxd_init = mwl8k_rxd_8366_ap_init,
1013 .rxd_refill = mwl8k_rxd_8366_ap_refill,
1014 .rxd_process = mwl8k_rxd_8366_ap_process,
6f6d1e9a
LB		 1015};
1016
1017/*
89a91f4f 1018 * Packet reception for STA firmware.
a66098da 1019 */
89a91f4f 1020struct mwl8k_rxd_sta {
a66098da
LB		 1021 __le16 pkt_len;
1022 __u8 link_quality;
1023 __u8 noise_level;
1024 __le32 pkt_phys_addr;
45eb400d 1025 __le32 next_rxd_phys_addr;
a66098da
LB		 1026 __le16 qos_control;
1027 __le16 rate_info;
1028 __le32 pad0[4];
1029 __u8 rssi;
1030 __u8 channel;
1031 __le16 pad1;
1032 __u8 rx_ctrl;
1033 __u8 rx_status;
1034 __u8 pad2[2];
ba2d3587 1035} __packed;
a66098da 1036
89a91f4f
LB		 1037#define MWL8K_STA_RATE_INFO_SHORTPRE 0x8000
1038#define MWL8K_STA_RATE_INFO_ANTSELECT(x) (((x) >> 11) & 0x3)
1039#define MWL8K_STA_RATE_INFO_RATEID(x) (((x) >> 3) & 0x3f)
1040#define MWL8K_STA_RATE_INFO_40MHZ 0x0004
1041#define MWL8K_STA_RATE_INFO_SHORTGI 0x0002
1042#define MWL8K_STA_RATE_INFO_MCS_FORMAT 0x0001
54bc3a0d 1043
89a91f4f 1044#define MWL8K_STA_RX_CTRL_OWNED_BY_HOST 0x02
d9a07d49
NS		 1045#define MWL8K_STA_RX_CTRL_DECRYPT_ERROR 0x04
1046/* ICV=0 or MIC=1 */
1047#define MWL8K_STA_RX_CTRL_DEC_ERR_TYPE 0x08
1048/* Key is uploaded only in failure case */
1049#define MWL8K_STA_RX_CTRL_KEY_INDEX 0x30
54bc3a0d 1050
89a91f4f 1051static void mwl8k_rxd_sta_init(void *_rxd, dma_addr_t next_dma_addr)
54bc3a0d 1052{
89a91f4f 1053 struct mwl8k_rxd_sta *rxd = _rxd;
54bc3a0d
LB		 1054
1055 rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
89a91f4f 1056 rxd->rx_ctrl = MWL8K_STA_RX_CTRL_OWNED_BY_HOST;
54bc3a0d
LB		 1057}
1058
89a91f4f 1059static void mwl8k_rxd_sta_refill(void *_rxd, dma_addr_t addr, int len)
54bc3a0d 1060{
89a91f4f 1061 struct mwl8k_rxd_sta *rxd = _rxd;
54bc3a0d
LB		 1062
1063 rxd->pkt_len = cpu_to_le16(len);
1064 rxd->pkt_phys_addr = cpu_to_le32(addr);
1065 wmb();
1066 rxd->rx_ctrl = 0;
1067}
1068
1069static int
89a91f4f 1070mwl8k_rxd_sta_process(void *_rxd, struct ieee80211_rx_status *status,
0d462bbb 1071 __le16 *qos, s8 *noise)
54bc3a0d 1072{
89a91f4f 1073 struct mwl8k_rxd_sta *rxd = _rxd;
54bc3a0d
LB		 1074 u16 rate_info;
1075
89a91f4f 1076 if (!(rxd->rx_ctrl & MWL8K_STA_RX_CTRL_OWNED_BY_HOST))
54bc3a0d
LB		 1077 return -1;
1078 rmb();
1079
1080 rate_info = le16_to_cpu(rxd->rate_info);
1081
1082 memset(status, 0, sizeof(*status));
1083
1084 status->signal = -rxd->rssi;
0d462bbb 1085 *noise = -rxd->noise_level;
89a91f4f
LB		 1086 status->antenna = MWL8K_STA_RATE_INFO_ANTSELECT(rate_info);
1087 status->rate_idx = MWL8K_STA_RATE_INFO_RATEID(rate_info);
54bc3a0d 1088
89a91f4f 1089 if (rate_info & MWL8K_STA_RATE_INFO_SHORTPRE)
54bc3a0d 1090 status->flag |= RX_FLAG_SHORTPRE;
89a91f4f 1091 if (rate_info & MWL8K_STA_RATE_INFO_40MHZ)
54bc3a0d 1092 status->flag |= RX_FLAG_40MHZ;
89a91f4f 1093 if (rate_info & MWL8K_STA_RATE_INFO_SHORTGI)
54bc3a0d 1094 status->flag |= RX_FLAG_SHORT_GI;
89a91f4f 1095 if (rate_info & MWL8K_STA_RATE_INFO_MCS_FORMAT)
54bc3a0d
LB		 1096 status->flag |= RX_FLAG_HT;
1097
85478344
LB		 1098 if (rxd->channel > 14) {
1099 status->band = IEEE80211_BAND_5GHZ;
1100 if (!(status->flag & RX_FLAG_HT))
1101 status->rate_idx -= 5;
1102 } else {
1103 status->band = IEEE80211_BAND_2GHZ;
1104 }
59eb21a6
BR		 1105 status->freq = ieee80211_channel_to_frequency(rxd->channel,
1106 status->band);
54bc3a0d 1107
20f09c3d 1108 *qos = rxd->qos_control;
d9a07d49
NS		 1109 if ((rxd->rx_ctrl & MWL8K_STA_RX_CTRL_DECRYPT_ERROR) &&
1110 (rxd->rx_ctrl & MWL8K_STA_RX_CTRL_DEC_ERR_TYPE))
1111 status->flag |= RX_FLAG_MMIC_ERROR;
20f09c3d 1112
54bc3a0d
LB		 1113 return le16_to_cpu(rxd->pkt_len);
1114}
1115
89a91f4f
LB		 1116static struct rxd_ops rxd_sta_ops = {
1117 .rxd_size = sizeof(struct mwl8k_rxd_sta),
1118 .rxd_init = mwl8k_rxd_sta_init,
1119 .rxd_refill = mwl8k_rxd_sta_refill,
1120 .rxd_process = mwl8k_rxd_sta_process,
54bc3a0d
LB		 1121};
1122
1123
a66098da
LB		 1124#define MWL8K_RX_DESCS 256
1125#define MWL8K_RX_MAXSZ 3800
1126
1127static int mwl8k_rxq_init(struct ieee80211_hw *hw, int index)
1128{
1129 struct mwl8k_priv *priv = hw->priv;
1130 struct mwl8k_rx_queue *rxq = priv->rxq + index;
1131 int size;
1132 int i;
1133
45eb400d
LB		 1134 rxq->rxd_count = 0;
1135 rxq->head = 0;
1136 rxq->tail = 0;
a66098da 1137
54bc3a0d 1138 size = MWL8K_RX_DESCS * priv->rxd_ops->rxd_size;
a66098da 1139
45eb400d
LB		 1140 rxq->rxd = pci_alloc_consistent(priv->pdev, size, &rxq->rxd_dma);
1141 if (rxq->rxd == NULL) {
5db55844 1142 wiphy_err(hw->wiphy, "failed to alloc RX descriptors\n");
a66098da
LB		 1143 return -ENOMEM;
1144 }
45eb400d 1145 memset(rxq->rxd, 0, size);
a66098da 1146
b9ede5f1 1147 rxq->buf = kcalloc(MWL8K_RX_DESCS, sizeof(*rxq->buf), GFP_KERNEL);
788838eb 1148 if (rxq->buf == NULL) {
5db55844 1149 wiphy_err(hw->wiphy, "failed to alloc RX skbuff list\n");
45eb400d 1150 pci_free_consistent(priv->pdev, size, rxq->rxd, rxq->rxd_dma);
a66098da
LB		 1151 return -ENOMEM;
1152 }
a66098da
LB		 1153
1154 for (i = 0; i < MWL8K_RX_DESCS; i++) {
54bc3a0d
LB		 1155 int desc_size;
1156 void *rxd;
a66098da 1157 int nexti;
54bc3a0d
LB		 1158 dma_addr_t next_dma_addr;
1159
1160 desc_size = priv->rxd_ops->rxd_size;
1161 rxd = rxq->rxd + (i * priv->rxd_ops->rxd_size);
a66098da 1162
54bc3a0d
LB		 1163 nexti = i + 1;
1164 if (nexti == MWL8K_RX_DESCS)
1165 nexti = 0;
1166 next_dma_addr = rxq->rxd_dma + (nexti * desc_size);
a66098da 1167
54bc3a0d 1168 priv->rxd_ops->rxd_init(rxd, next_dma_addr);
a66098da
LB		 1169 }
1170
1171 return 0;
1172}
1173
1174static int rxq_refill(struct ieee80211_hw *hw, int index, int limit)
1175{
1176 struct mwl8k_priv *priv = hw->priv;
1177 struct mwl8k_rx_queue *rxq = priv->rxq + index;
1178 int refilled;
1179
1180 refilled = 0;
45eb400d 1181 while (rxq->rxd_count < MWL8K_RX_DESCS && limit--) {
a66098da 1182 struct sk_buff *skb;
788838eb 1183 dma_addr_t addr;
a66098da 1184 int rx;
54bc3a0d 1185 void *rxd;
a66098da
LB		 1186
1187 skb = dev_alloc_skb(MWL8K_RX_MAXSZ);
1188 if (skb == NULL)
1189 break;
1190
788838eb
LB		 1191 addr = pci_map_single(priv->pdev, skb->data,
1192 MWL8K_RX_MAXSZ, DMA_FROM_DEVICE);
a66098da 1193
54bc3a0d
LB		 1194 rxq->rxd_count++;
1195 rx = rxq->tail++;
1196 if (rxq->tail == MWL8K_RX_DESCS)
1197 rxq->tail = 0;
788838eb 1198 rxq->buf[rx].skb = skb;
53b1b3e1 1199 dma_unmap_addr_set(&rxq->buf[rx], dma, addr);
54bc3a0d
LB		 1200
1201 rxd = rxq->rxd + (rx * priv->rxd_ops->rxd_size);
1202 priv->rxd_ops->rxd_refill(rxd, addr, MWL8K_RX_MAXSZ);
a66098da
LB		 1203
1204 refilled++;
1205 }
1206
1207 return refilled;
1208}
1209
1210/* Must be called only when the card's reception is completely halted */
1211static void mwl8k_rxq_deinit(struct ieee80211_hw *hw, int index)
1212{
1213 struct mwl8k_priv *priv = hw->priv;
1214 struct mwl8k_rx_queue *rxq = priv->rxq + index;
1215 int i;
1216
73b46320
BC		 1217 if (rxq->rxd == NULL)
1218 return;
1219
a66098da 1220 for (i = 0; i < MWL8K_RX_DESCS; i++) {
788838eb
LB		 1221 if (rxq->buf[i].skb != NULL) {
1222 pci_unmap_single(priv->pdev,
53b1b3e1 1223 dma_unmap_addr(&rxq->buf[i], dma),
788838eb 1224 MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
53b1b3e1 1225 dma_unmap_addr_set(&rxq->buf[i], dma, 0);
788838eb
LB		 1226
1227 kfree_skb(rxq->buf[i].skb);
1228 rxq->buf[i].skb = NULL;
a66098da
LB		 1229 }
1230 }
1231
788838eb
LB		 1232 kfree(rxq->buf);
1233 rxq->buf = NULL;
a66098da
LB		 1234
1235 pci_free_consistent(priv->pdev,
54bc3a0d 1236 MWL8K_RX_DESCS * priv->rxd_ops->rxd_size,
45eb400d
LB		 1237 rxq->rxd, rxq->rxd_dma);
1238 rxq->rxd = NULL;
a66098da
LB		 1239}
1240
1241
1242/*
1243 * Scan a list of BSSIDs to process for finalize join.
1244 * Allows for extension to process multiple BSSIDs.
1245 */
1246static inline int
1247mwl8k_capture_bssid(struct mwl8k_priv *priv, struct ieee80211_hdr *wh)
1248{
1249 return priv->capture_beacon &&
1250 ieee80211_is_beacon(wh->frame_control) &&
2e42e474 1251 ether_addr_equal(wh->addr3, priv->capture_bssid);
a66098da
LB		 1252}
1253
3779752d
LB		 1254static inline void mwl8k_save_beacon(struct ieee80211_hw *hw,
1255 struct sk_buff *skb)
a66098da 1256{
3779752d
LB		 1257 struct mwl8k_priv *priv = hw->priv;
1258
a66098da 1259 priv->capture_beacon = false;
d89173f2 1260 memset(priv->capture_bssid, 0, ETH_ALEN);
a66098da
LB		 1261
1262 /*
1263 * Use GFP_ATOMIC as rxq_process is called from
1264 * the primary interrupt handler, memory allocation call
1265 * must not sleep.
1266 */
1267 priv->beacon_skb = skb_copy(skb, GFP_ATOMIC);
1268 if (priv->beacon_skb != NULL)
3779752d 1269 ieee80211_queue_work(hw, &priv->finalize_join_worker);
a66098da
LB		 1270}
1271
d9a07d49
NS		 1272static inline struct mwl8k_vif *mwl8k_find_vif_bss(struct list_head *vif_list,
1273 u8 *bssid)
1274{
1275 struct mwl8k_vif *mwl8k_vif;
1276
1277 list_for_each_entry(mwl8k_vif,
1278 vif_list, list) {
1279 if (memcmp(bssid, mwl8k_vif->bssid,
1280 ETH_ALEN) == 0)
1281 return mwl8k_vif;
1282 }
1283
1284 return NULL;
1285}
1286
a66098da
LB		 1287static int rxq_process(struct ieee80211_hw *hw, int index, int limit)
1288{
1289 struct mwl8k_priv *priv = hw->priv;
d9a07d49 1290 struct mwl8k_vif *mwl8k_vif = NULL;
a66098da
LB		 1291 struct mwl8k_rx_queue *rxq = priv->rxq + index;
1292 int processed;
1293
1294 processed = 0;
45eb400d 1295 while (rxq->rxd_count && limit--) {
a66098da 1296 struct sk_buff *skb;
54bc3a0d
LB		 1297 void *rxd;
1298 int pkt_len;
a66098da 1299 struct ieee80211_rx_status status;
d9a07d49 1300 struct ieee80211_hdr *wh;
20f09c3d 1301 __le16 qos;
a66098da 1302
788838eb 1303 skb = rxq->buf[rxq->head].skb;
d25f9f13
LB		 1304 if (skb == NULL)
1305 break;
54bc3a0d
LB		 1306
1307 rxd = rxq->rxd + (rxq->head * priv->rxd_ops->rxd_size);
1308
0d462bbb
JL		 1309 pkt_len = priv->rxd_ops->rxd_process(rxd, &status, &qos,
1310 &priv->noise);
54bc3a0d
LB		 1311 if (pkt_len < 0)
1312 break;
1313
788838eb
LB		 1314 rxq->buf[rxq->head].skb = NULL;
1315
1316 pci_unmap_single(priv->pdev,
53b1b3e1 1317 dma_unmap_addr(&rxq->buf[rxq->head], dma),
788838eb 1318 MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
53b1b3e1 1319 dma_unmap_addr_set(&rxq->buf[rxq->head], dma, 0);
a66098da 1320
54bc3a0d
LB		 1321 rxq->head++;
1322 if (rxq->head == MWL8K_RX_DESCS)
1323 rxq->head = 0;
1324
45eb400d 1325 rxq->rxd_count--;
a66098da 1326
d9a07d49 1327 wh = &((struct mwl8k_dma_data *)skb->data)->wh;
a66098da 1328
a66098da 1329 /*
c2c357ce
LB		 1330 * Check for a pending join operation. Save a
1331 * copy of the beacon and schedule a tasklet to
1332 * send a FINALIZE_JOIN command to the firmware.
a66098da 1333 */
54bc3a0d 1334 if (mwl8k_capture_bssid(priv, (void *)skb->data))
3779752d 1335 mwl8k_save_beacon(hw, skb);
a66098da 1336
d9a07d49
NS		 1337 if (ieee80211_has_protected(wh->frame_control)) {
1338
1339 /* Check if hw crypto has been enabled for
1340 * this bss. If yes, set the status flags
1341 * accordingly
1342 */
1343 mwl8k_vif = mwl8k_find_vif_bss(&priv->vif_list,
1344 wh->addr1);
1345
1346 if (mwl8k_vif != NULL &&
23677ce3 1347 mwl8k_vif->is_hw_crypto_enabled) {
d9a07d49
NS		 1348 /*
1349 * When MMIC ERROR is encountered
1350 * by the firmware, payload is
1351 * dropped and only 32 bytes of
1352 * mwl8k Firmware header is sent
1353 * to the host.
1354 *
1355 * We need to add four bytes of
1356 * key information. In it
1357 * MAC80211 expects keyidx set to
1358 * 0 for triggering Counter
1359 * Measure of MMIC failure.
1360 */
1361 if (status.flag & RX_FLAG_MMIC_ERROR) {
1362 struct mwl8k_dma_data *tr;
1363 tr = (struct mwl8k_dma_data *)skb->data;
1364 memset((void *)&(tr->data), 0, 4);
1365 pkt_len += 4;
1366 }
1367
1368 if (!ieee80211_is_auth(wh->frame_control))
1369 status.flag |= RX_FLAG_IV_STRIPPED |
1370 RX_FLAG_DECRYPTED |
1371 RX_FLAG_MMIC_STRIPPED;
1372 }
1373 }
1374
1375 skb_put(skb, pkt_len);
1376 mwl8k_remove_dma_header(skb, qos);
f1d58c25
JB		 1377 memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status));
1378 ieee80211_rx_irqsafe(hw, skb);
a66098da
LB		 1379
1380 processed++;
1381 }
1382
1383 return processed;
1384}
1385
1386
1387/*
1388 * Packet transmission.
1389 */
1390
a66098da
LB		 1391#define MWL8K_TXD_STATUS_OK 0x00000001
1392#define MWL8K_TXD_STATUS_OK_RETRY 0x00000002
1393#define MWL8K_TXD_STATUS_OK_MORE_RETRY 0x00000004
1394#define MWL8K_TXD_STATUS_MULTICAST_TX 0x00000008
a66098da 1395#define MWL8K_TXD_STATUS_FW_OWNED 0x80000000
a66098da 1396
e0493a8d
LB		 1397#define MWL8K_QOS_QLEN_UNSPEC 0xff00
1398#define MWL8K_QOS_ACK_POLICY_MASK 0x0060
1399#define MWL8K_QOS_ACK_POLICY_NORMAL 0x0000
1400#define MWL8K_QOS_ACK_POLICY_BLOCKACK 0x0060
1401#define MWL8K_QOS_EOSP 0x0010
1402
a66098da
LB		 1403struct mwl8k_tx_desc {
1404 __le32 status;
1405 __u8 data_rate;
1406 __u8 tx_priority;
1407 __le16 qos_control;
1408 __le32 pkt_phys_addr;
1409 __le16 pkt_len;
d89173f2 1410 __u8 dest_MAC_addr[ETH_ALEN];
45eb400d 1411 __le32 next_txd_phys_addr;
8a7a578c 1412 __le32 timestamp;
a66098da
LB		 1413 __le16 rate_info;
1414 __u8 peer_id;
a1fe24b0 1415 __u8 tx_frag_cnt;
ba2d3587 1416} __packed;
a66098da
LB		 1417
1418#define MWL8K_TX_DESCS 128
1419
1420static int mwl8k_txq_init(struct ieee80211_hw *hw, int index)
1421{
1422 struct mwl8k_priv *priv = hw->priv;
1423 struct mwl8k_tx_queue *txq = priv->txq + index;
1424 int size;
1425 int i;
1426
8ccbc3b8 1427 txq->len = 0;
45eb400d
LB		 1428 txq->head = 0;
1429 txq->tail = 0;
a66098da
LB		 1430
1431 size = MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc);
1432
45eb400d
LB		 1433 txq->txd = pci_alloc_consistent(priv->pdev, size, &txq->txd_dma);
1434 if (txq->txd == NULL) {
5db55844 1435 wiphy_err(hw->wiphy, "failed to alloc TX descriptors\n");
a66098da
LB		 1436 return -ENOMEM;
1437 }
45eb400d 1438 memset(txq->txd, 0, size);
a66098da 1439
b9ede5f1 1440 txq->skb = kcalloc(MWL8K_TX_DESCS, sizeof(*txq->skb), GFP_KERNEL);
45eb400d 1441 if (txq->skb == NULL) {
5db55844 1442 wiphy_err(hw->wiphy, "failed to alloc TX skbuff list\n");
45eb400d 1443 pci_free_consistent(priv->pdev, size, txq->txd, txq->txd_dma);
a66098da
LB		 1444 return -ENOMEM;
1445 }
a66098da
LB		 1446
1447 for (i = 0; i < MWL8K_TX_DESCS; i++) {
1448 struct mwl8k_tx_desc *tx_desc;
1449 int nexti;
1450
45eb400d 1451 tx_desc = txq->txd + i;
a66098da
LB		 1452 nexti = (i + 1) % MWL8K_TX_DESCS;
1453
1454 tx_desc->status = 0;
45eb400d
LB		 1455 tx_desc->next_txd_phys_addr =
1456 cpu_to_le32(txq->txd_dma + nexti * sizeof(*tx_desc));
a66098da
LB		 1457 }
1458
1459 return 0;
1460}
1461
1462static inline void mwl8k_tx_start(struct mwl8k_priv *priv)
1463{
1464 iowrite32(MWL8K_H2A_INT_PPA_READY,
1465 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1466 iowrite32(MWL8K_H2A_INT_DUMMY,
1467 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1468 ioread32(priv->regs + MWL8K_HIU_INT_CODE);
1469}
1470
7e1112d3 1471static void mwl8k_dump_tx_rings(struct ieee80211_hw *hw)
a66098da 1472{
7e1112d3
LB		 1473 struct mwl8k_priv *priv = hw->priv;
1474 int i;
1475
e600707b 1476 for (i = 0; i < mwl8k_tx_queues(priv); i++) {
7e1112d3
LB		 1477 struct mwl8k_tx_queue *txq = priv->txq + i;
1478 int fw_owned = 0;
1479 int drv_owned = 0;
1480 int unused = 0;
1481 int desc;
1482
a66098da 1483 for (desc = 0; desc < MWL8K_TX_DESCS; desc++) {
7e1112d3
LB		 1484 struct mwl8k_tx_desc *tx_desc = txq->txd + desc;
1485 u32 status;
a66098da 1486
7e1112d3 1487 status = le32_to_cpu(tx_desc->status);
a66098da 1488 if (status & MWL8K_TXD_STATUS_FW_OWNED)
7e1112d3 1489 fw_owned++;
a66098da 1490 else
7e1112d3 1491 drv_owned++;
a66098da
LB		 1492
1493 if (tx_desc->pkt_len == 0)
7e1112d3 1494 unused++;
a66098da 1495 }
a66098da 1496
c96c31e4
JP		 1497 wiphy_err(hw->wiphy,
1498 "txq[%d] len=%d head=%d tail=%d "
1499 "fw_owned=%d drv_owned=%d unused=%d\n",
1500 i,
1501 txq->len, txq->head, txq->tail,
1502 fw_owned, drv_owned, unused);
7e1112d3 1503 }
a66098da
LB		 1504}
1505
618952a7 1506/*
88de754a 1507 * Must be called with priv->fw_mutex held and tx queues stopped.
618952a7 1508 */
62abd3cf 1509#define MWL8K_TX_WAIT_TIMEOUT_MS 5000
7e1112d3 1510
950d5b01 1511static int mwl8k_tx_wait_empty(struct ieee80211_hw *hw)
a66098da 1512{
a66098da 1513 struct mwl8k_priv *priv = hw->priv;
88de754a 1514 DECLARE_COMPLETION_ONSTACK(tx_wait);
7e1112d3
LB		 1515 int retry;
1516 int rc;
a66098da
LB		 1517
1518 might_sleep();
1519
6b6accc3
YAP		 1520 /* Since fw restart is in progress, allow only the firmware
1521 * commands from the restart code and block the other
1522 * commands since they are going to fail in any case since
1523 * the firmware has crashed
1524 */
1525 if (priv->hw_restart_in_progress) {
1526 if (priv->hw_restart_owner == current)
1527 return 0;
1528 else
1529 return -EBUSY;
1530 }
1531
c27a54d3
YAP		 1532 if (atomic_read(&priv->watchdog_event_pending))
1533 return 0;
1534
7e1112d3
LB		 1535 /*
1536 * The TX queues are stopped at this point, so this test
1537 * doesn't need to take ->tx_lock.
1538 */
1539 if (!priv->pending_tx_pkts)
1540 return 0;
1541
1542 retry = 0;
1543 rc = 0;
1544
a66098da 1545 spin_lock_bh(&priv->tx_lock);
7e1112d3
LB		 1546 priv->tx_wait = &tx_wait;
1547 while (!rc) {
1548 int oldcount;
1549 unsigned long timeout;
a66098da 1550
7e1112d3 1551 oldcount = priv->pending_tx_pkts;
a66098da 1552
7e1112d3 1553 spin_unlock_bh(&priv->tx_lock);
88de754a 1554 timeout = wait_for_completion_timeout(&tx_wait,
7e1112d3 1555 msecs_to_jiffies(MWL8K_TX_WAIT_TIMEOUT_MS));
c27a54d3
YAP		 1556
1557 if (atomic_read(&priv->watchdog_event_pending)) {
1558 spin_lock_bh(&priv->tx_lock);
1559 priv->tx_wait = NULL;
1560 spin_unlock_bh(&priv->tx_lock);
1561 return 0;
1562 }
1563
a66098da 1564 spin_lock_bh(&priv->tx_lock);
7e1112d3
LB		 1565
1566 if (timeout) {
1567 WARN_ON(priv->pending_tx_pkts);
ba30c4a5 1568 if (retry)
c96c31e4 1569 wiphy_notice(hw->wiphy, "tx rings drained\n");
7e1112d3
LB		 1570 break;
1571 }
1572
1573 if (priv->pending_tx_pkts < oldcount) {
c96c31e4
JP		 1574 wiphy_notice(hw->wiphy,
1575 "waiting for tx rings to drain (%d -> %d pkts)\n",
1576 oldcount, priv->pending_tx_pkts);
7e1112d3
LB		 1577 retry = 1;
1578 continue;
1579 }
1580
a66098da 1581 priv->tx_wait = NULL;
a66098da 1582
c96c31e4
JP		 1583 wiphy_err(hw->wiphy, "tx rings stuck for %d ms\n",
1584 MWL8K_TX_WAIT_TIMEOUT_MS);
7e1112d3 1585 mwl8k_dump_tx_rings(hw);
6b6accc3
YAP		 1586 priv->hw_restart_in_progress = true;
1587 ieee80211_queue_work(hw, &priv->fw_reload);
7e1112d3
LB		 1588
1589 rc = -ETIMEDOUT;
a66098da 1590 }
9b0b11fb 1591 priv->tx_wait = NULL;
7e1112d3 1592 spin_unlock_bh(&priv->tx_lock);
a66098da 1593
7e1112d3 1594 return rc;
a66098da
LB		 1595}
1596
c23b5a69
LB		 1597#define MWL8K_TXD_SUCCESS(status) \
1598 ((status) & (MWL8K_TXD_STATUS_OK | \
1599 MWL8K_TXD_STATUS_OK_RETRY | \
1600 MWL8K_TXD_STATUS_OK_MORE_RETRY))
a66098da 1601
a0e7c6cf
NS		 1602static int mwl8k_tid_queue_mapping(u8 tid)
1603{
1604 BUG_ON(tid > 7);
1605
1606 switch (tid) {
1607 case 0:
1608 case 3:
1609 return IEEE80211_AC_BE;
1610 break;
1611 case 1:
1612 case 2:
1613 return IEEE80211_AC_BK;
1614 break;
1615 case 4:
1616 case 5:
1617 return IEEE80211_AC_VI;
1618 break;
1619 case 6:
1620 case 7:
1621 return IEEE80211_AC_VO;
1622 break;
1623 default:
1624 return -1;
1625 break;
1626 }
1627}
1628
17033543
NS		 1629/* The firmware will fill in the rate information
1630 * for each packet that gets queued in the hardware
49adc5ce 1631 * and these macros will interpret that info.
17033543
NS		 1632 */
1633
49adc5ce
JL		 1634#define RI_FORMAT(a) (a & 0x0001)
1635#define RI_RATE_ID_MCS(a) ((a & 0x01f8) >> 3)
17033543 1636
efb7c49a
LB		 1637static int
1638mwl8k_txq_reclaim(struct ieee80211_hw *hw, int index, int limit, int force)
a66098da
LB		 1639{
1640 struct mwl8k_priv *priv = hw->priv;
1641 struct mwl8k_tx_queue *txq = priv->txq + index;
efb7c49a 1642 int processed;
a66098da 1643
efb7c49a 1644 processed = 0;
8ccbc3b8 1645 while (txq->len > 0 && limit--) {
a66098da 1646 int tx;
a66098da
LB		 1647 struct mwl8k_tx_desc *tx_desc;
1648 unsigned long addr;
ce9e2e1b 1649 int size;
a66098da
LB		 1650 struct sk_buff *skb;
1651 struct ieee80211_tx_info *info;
1652 u32 status;
17033543
NS		 1653 struct ieee80211_sta *sta;
1654 struct mwl8k_sta *sta_info = NULL;
1655 u16 rate_info;
17033543 1656 struct ieee80211_hdr *wh;
a66098da 1657
45eb400d
LB		 1658 tx = txq->head;
1659 tx_desc = txq->txd + tx;
a66098da
LB		 1660
1661 status = le32_to_cpu(tx_desc->status);
1662
1663 if (status & MWL8K_TXD_STATUS_FW_OWNED) {
1664 if (!force)
1665 break;
1666 tx_desc->status &=
1667 ~cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED);
1668 }
1669
45eb400d 1670 txq->head = (tx + 1) % MWL8K_TX_DESCS;
8ccbc3b8
KV		 1671 BUG_ON(txq->len == 0);
1672 txq->len--;
a66098da
LB		 1673 priv->pending_tx_pkts--;
1674
1675 addr = le32_to_cpu(tx_desc->pkt_phys_addr);
ce9e2e1b 1676 size = le16_to_cpu(tx_desc->pkt_len);
45eb400d
LB		 1677 skb = txq->skb[tx];
1678 txq->skb[tx] = NULL;
a66098da
LB		 1679
1680 BUG_ON(skb == NULL);
1681 pci_unmap_single(priv->pdev, addr, size, PCI_DMA_TODEVICE);
1682
20f09c3d 1683 mwl8k_remove_dma_header(skb, tx_desc->qos_control);
a66098da 1684
17033543
NS		 1685 wh = (struct ieee80211_hdr *) skb->data;
1686
a66098da
LB		 1687 /* Mark descriptor as unused */
1688 tx_desc->pkt_phys_addr = 0;
1689 tx_desc->pkt_len = 0;
1690
a66098da 1691 info = IEEE80211_SKB_CB(skb);
17033543 1692 if (ieee80211_is_data(wh->frame_control)) {
89e11801
TH		 1693 rcu_read_lock();
1694 sta = ieee80211_find_sta_by_ifaddr(hw, wh->addr1,
1695 wh->addr2);
17033543
NS		 1696 if (sta) {
1697 sta_info = MWL8K_STA(sta);
1698 BUG_ON(sta_info == NULL);
1699 rate_info = le16_to_cpu(tx_desc->rate_info);
17033543
NS		 1700 /* If rate is < 6.5 Mpbs for an ht station
1701 * do not form an ampdu. If the station is a
1702 * legacy station (format = 0), do not form an
1703 * ampdu
1704 */
49adc5ce
JL		 1705 if (RI_RATE_ID_MCS(rate_info) < 1 ||
1706 RI_FORMAT(rate_info) == 0) {
17033543
NS		 1707 sta_info->is_ampdu_allowed = false;
1708 } else {
1709 sta_info->is_ampdu_allowed = true;
1710 }
1711 }
89e11801 1712 rcu_read_unlock();
17033543
NS		 1713 }
1714
a66098da 1715 ieee80211_tx_info_clear_status(info);
0bf22c37
NS		 1716
1717 /* Rate control is happening in the firmware.
1718 * Ensure no tx rate is being reported.
1719 */
ba30c4a5
YAP		 1720 info->status.rates[0].idx = -1;
1721 info->status.rates[0].count = 1;
0bf22c37 1722
ce9e2e1b 1723 if (MWL8K_TXD_SUCCESS(status))
a66098da 1724 info->flags |= IEEE80211_TX_STAT_ACK;
a66098da
LB		 1725
1726 ieee80211_tx_status_irqsafe(hw, skb);
1727
efb7c49a 1728 processed++;
a66098da
LB		 1729 }
1730
efb7c49a 1731 return processed;
a66098da
LB		 1732}
1733
1734/* must be called only when the card's transmit is completely halted */
1735static void mwl8k_txq_deinit(struct ieee80211_hw *hw, int index)
1736{
1737 struct mwl8k_priv *priv = hw->priv;
1738 struct mwl8k_tx_queue *txq = priv->txq + index;
1739
73b46320
BC		 1740 if (txq->txd == NULL)
1741 return;
1742
efb7c49a 1743 mwl8k_txq_reclaim(hw, index, INT_MAX, 1);
a66098da 1744
45eb400d
LB		 1745 kfree(txq->skb);
1746 txq->skb = NULL;
a66098da
LB		 1747
1748 pci_free_consistent(priv->pdev,
1749 MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc),
45eb400d
LB		 1750 txq->txd, txq->txd_dma);
1751 txq->txd = NULL;
a66098da
LB		 1752}
1753
ac109fd0 1754/* caller must hold priv->stream_lock when calling the stream functions */
ba30c4a5 1755static struct mwl8k_ampdu_stream *
ac109fd0
BC		 1756mwl8k_add_stream(struct ieee80211_hw *hw, struct ieee80211_sta *sta, u8 tid)
1757{
1758 struct mwl8k_ampdu_stream *stream;
1759 struct mwl8k_priv *priv = hw->priv;
1760 int i;
1761
7fb978b7 1762 for (i = 0; i < MWL8K_NUM_AMPDU_STREAMS; i++) {
ac109fd0
BC		 1763 stream = &priv->ampdu[i];
1764 if (stream->state == AMPDU_NO_STREAM) {
1765 stream->sta = sta;
1766 stream->state = AMPDU_STREAM_NEW;
1767 stream->tid = tid;
1768 stream->idx = i;
ac109fd0
BC		 1769 wiphy_debug(hw->wiphy, "Added a new stream for %pM %d",
1770 sta->addr, tid);
1771 return stream;
1772 }
1773 }
1774 return NULL;
1775}
1776
1777static int
1778mwl8k_start_stream(struct ieee80211_hw *hw, struct mwl8k_ampdu_stream *stream)
1779{
1780 int ret;
1781
1782 /* if the stream has already been started, don't start it again */
1783 if (stream->state != AMPDU_STREAM_NEW)
1784 return 0;
1785 ret = ieee80211_start_tx_ba_session(stream->sta, stream->tid, 0);
1786 if (ret)
1787 wiphy_debug(hw->wiphy, "Failed to start stream for %pM %d: "
1788 "%d\n", stream->sta->addr, stream->tid, ret);
1789 else
1790 wiphy_debug(hw->wiphy, "Started stream for %pM %d\n",
1791 stream->sta->addr, stream->tid);
1792 return ret;
1793}
1794
1795static void
1796mwl8k_remove_stream(struct ieee80211_hw *hw, struct mwl8k_ampdu_stream *stream)
1797{
1798 wiphy_debug(hw->wiphy, "Remove stream for %pM %d\n", stream->sta->addr,
1799 stream->tid);
1800 memset(stream, 0, sizeof(*stream));
1801}
1802
1803static struct mwl8k_ampdu_stream *
1804mwl8k_lookup_stream(struct ieee80211_hw *hw, u8 *addr, u8 tid)
1805{
1806 struct mwl8k_priv *priv = hw->priv;
1807 int i;
1808
7fb978b7 1809 for (i = 0; i < MWL8K_NUM_AMPDU_STREAMS; i++) {
ac109fd0
BC		 1810 struct mwl8k_ampdu_stream *stream;
1811 stream = &priv->ampdu[i];
1812 if (stream->state == AMPDU_NO_STREAM)
1813 continue;
1814 if (!memcmp(stream->sta->addr, addr, ETH_ALEN) &&
1815 stream->tid == tid)
1816 return stream;
1817 }
1818 return NULL;
1819}
1820
d0805c1c
BC		 1821#define MWL8K_AMPDU_PACKET_THRESHOLD 64
1822static inline bool mwl8k_ampdu_allowed(struct ieee80211_sta *sta, u8 tid)
1823{
1824 struct mwl8k_sta *sta_info = MWL8K_STA(sta);
1825 struct tx_traffic_info *tx_stats;
1826
1827 BUG_ON(tid >= MWL8K_MAX_TID);
1828 tx_stats = &sta_info->tx_stats[tid];
1829
1830 return sta_info->is_ampdu_allowed &&
1831 tx_stats->pkts > MWL8K_AMPDU_PACKET_THRESHOLD;
1832}
1833
1834static inline void mwl8k_tx_count_packet(struct ieee80211_sta *sta, u8 tid)
1835{
1836 struct mwl8k_sta *sta_info = MWL8K_STA(sta);
1837 struct tx_traffic_info *tx_stats;
1838
1839 BUG_ON(tid >= MWL8K_MAX_TID);
1840 tx_stats = &sta_info->tx_stats[tid];
1841
1842 if (tx_stats->start_time == 0)
1843 tx_stats->start_time = jiffies;
1844
1845 /* reset the packet count after each second elapses. If the number of
1846 * packets ever exceeds the ampdu_min_traffic threshold, we will allow
1847 * an ampdu stream to be started.
1848 */
1849 if (jiffies - tx_stats->start_time > HZ) {
1850 tx_stats->pkts = 0;
1851 tx_stats->start_time = 0;
1852 } else
1853 tx_stats->pkts++;
1854}
1855
7fb978b7
YAP		 1856/* The hardware ampdu queues start from 5.
1857 * txpriorities for ampdu queues are
1858 * 5 6 7 0 1 2 3 4 ie., queue 5 is highest
1859 * and queue 3 is lowest (queue 4 is reserved)
1860 */
1861#define BA_QUEUE 5
1862
7bb45683 1863static void
36323f81
TH		 1864mwl8k_txq_xmit(struct ieee80211_hw *hw,
1865 int index,
1866 struct ieee80211_sta *sta,
1867 struct sk_buff *skb)
a66098da
LB		 1868{
1869 struct mwl8k_priv *priv = hw->priv;
1870 struct ieee80211_tx_info *tx_info;
23b33906 1871 struct mwl8k_vif *mwl8k_vif;
a66098da
LB		 1872 struct ieee80211_hdr *wh;
1873 struct mwl8k_tx_queue *txq;
1874 struct mwl8k_tx_desc *tx;
a66098da 1875 dma_addr_t dma;
23b33906
LB		 1876 u32 txstatus;
1877 u8 txdatarate;
1878 u16 qos;
65f3ddcd
NS		 1879 int txpriority;
1880 u8 tid = 0;
1881 struct mwl8k_ampdu_stream *stream = NULL;
1882 bool start_ba_session = false;
3a769888 1883 bool mgmtframe = false;
a0e7c6cf 1884 struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)skb->data;
e1f4d69b 1885 bool eapol_frame = false;
a66098da 1886
23b33906
LB		 1887 wh = (struct ieee80211_hdr *)skb->data;
1888 if (ieee80211_is_data_qos(wh->frame_control))
1889 qos = le16_to_cpu(*((__le16 *)ieee80211_get_qos_ctl(wh)));
1890 else
1891 qos = 0;
a66098da 1892
e1f4d69b
NS		 1893 if (skb->protocol == cpu_to_be16(ETH_P_PAE))
1894 eapol_frame = true;
1895
3a769888
NS		 1896 if (ieee80211_is_mgmt(wh->frame_control))
1897 mgmtframe = true;
1898
d9a07d49 1899 if (priv->ap_fw)
ff776cec 1900 mwl8k_encapsulate_tx_frame(priv, skb);
d9a07d49 1901 else
e4eefec7 1902 mwl8k_add_dma_header(priv, skb, 0, 0);
d9a07d49 1903
23b33906 1904 wh = &((struct mwl8k_dma_data *)skb->data)->wh;
a66098da
LB		 1905
1906 tx_info = IEEE80211_SKB_CB(skb);
1907 mwl8k_vif = MWL8K_VIF(tx_info->control.vif);
a66098da
LB		 1908
1909 if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
a66098da 1910 wh->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
657232b6
LB		 1911 wh->seq_ctrl |= cpu_to_le16(mwl8k_vif->seqno);
1912 mwl8k_vif->seqno += 0x10;
a66098da
LB		 1913 }
1914
23b33906
LB		 1915 /* Setup firmware control bit fields for each frame type. */
1916 txstatus = 0;
1917 txdatarate = 0;
1918 if (ieee80211_is_mgmt(wh->frame_control) ||
1919 ieee80211_is_ctl(wh->frame_control)) {
1920 txdatarate = 0;
e0493a8d 1921 qos |= MWL8K_QOS_QLEN_UNSPEC | MWL8K_QOS_EOSP;
23b33906
LB		 1922 } else if (ieee80211_is_data(wh->frame_control)) {
1923 txdatarate = 1;
1924 if (is_multicast_ether_addr(wh->addr1))
1925 txstatus |= MWL8K_TXD_STATUS_MULTICAST_TX;
1926
e0493a8d 1927 qos &= ~MWL8K_QOS_ACK_POLICY_MASK;
23b33906 1928 if (tx_info->flags & IEEE80211_TX_CTL_AMPDU)
e0493a8d 1929 qos |= MWL8K_QOS_ACK_POLICY_BLOCKACK;
23b33906 1930 else
e0493a8d 1931 qos |= MWL8K_QOS_ACK_POLICY_NORMAL;
23b33906 1932 }
a66098da 1933
a0e7c6cf
NS		 1934 /* Queue ADDBA request in the respective data queue. While setting up
1935 * the ampdu stream, mac80211 queues further packets for that
1936 * particular ra/tid pair. However, packets piled up in the hardware
1937 * for that ra/tid pair will still go out. ADDBA request and the
1938 * related data packets going out from different queues asynchronously
1939 * will cause a shift in the receiver window which might result in
1940 * ampdu packets getting dropped at the receiver after the stream has
1941 * been setup.
1942 */
1943 if (unlikely(ieee80211_is_action(wh->frame_control) &&
1944 mgmt->u.action.category == WLAN_CATEGORY_BACK &&
1945 mgmt->u.action.u.addba_req.action_code == WLAN_ACTION_ADDBA_REQ &&
1946 priv->ap_fw)) {
1947 u16 capab = le16_to_cpu(mgmt->u.action.u.addba_req.capab);
1948 tid = (capab & IEEE80211_ADDBA_PARAM_TID_MASK) >> 2;
1949 index = mwl8k_tid_queue_mapping(tid);
1950 }
1951
65f3ddcd
NS		 1952 txpriority = index;
1953
e1f4d69b
NS		 1954 if (priv->ap_fw && sta && sta->ht_cap.ht_supported && !eapol_frame &&
1955 ieee80211_is_data_qos(wh->frame_control)) {
65f3ddcd 1956 tid = qos & 0xf;
d0805c1c 1957 mwl8k_tx_count_packet(sta, tid);
65f3ddcd
NS		 1958 spin_lock(&priv->stream_lock);
1959 stream = mwl8k_lookup_stream(hw, sta->addr, tid);
1960 if (stream != NULL) {
1961 if (stream->state == AMPDU_STREAM_ACTIVE) {
5f2a1494 1962 WARN_ON(!(qos & MWL8K_QOS_ACK_POLICY_BLOCKACK));
7fb978b7
YAP		 1963 txpriority = (BA_QUEUE + stream->idx) %
1964 TOTAL_HW_TX_QUEUES;
1965 if (stream->idx <= 1)
1966 index = stream->idx +
1967 MWL8K_TX_WMM_QUEUES;
1968
65f3ddcd
NS		 1969 } else if (stream->state == AMPDU_STREAM_NEW) {
1970 /* We get here if the driver sends us packets
1971 * after we've initiated a stream, but before
1972 * our ampdu_action routine has been called
1973 * with IEEE80211_AMPDU_TX_START to get the SSN
1974 * for the ADDBA request. So this packet can
1975 * go out with no risk of sequence number
1976 * mismatch. No special handling is required.
1977 */
1978 } else {
1979 /* Drop packets that would go out after the
1980 * ADDBA request was sent but before the ADDBA
1981 * response is received. If we don't do this,
1982 * the recipient would probably receive it
1983 * after the ADDBA request with SSN 0. This
1984 * will cause the recipient's BA receive window
1985 * to shift, which would cause the subsequent
1986 * packets in the BA stream to be discarded.
1987 * mac80211 queues our packets for us in this
1988 * case, so this is really just a safety check.
1989 */
1990 wiphy_warn(hw->wiphy,
1991 "Cannot send packet while ADDBA "
1992 "dialog is underway.\n");
1993 spin_unlock(&priv->stream_lock);
1994 dev_kfree_skb(skb);
1995 return;
1996 }
1997 } else {
1998 /* Defer calling mwl8k_start_stream so that the current
1999 * skb can go out before the ADDBA request. This
2000 * prevents sequence number mismatch at the recepient
2001 * as described above.
2002 */
d0805c1c 2003 if (mwl8k_ampdu_allowed(sta, tid)) {
17033543
NS		 2004 stream = mwl8k_add_stream(hw, sta, tid);
2005 if (stream != NULL)
2006 start_ba_session = true;
2007 }
65f3ddcd
NS		 2008 }
2009 spin_unlock(&priv->stream_lock);
5f2a1494
YAP		 2010 } else {
2011 qos &= ~MWL8K_QOS_ACK_POLICY_MASK;
2012 qos |= MWL8K_QOS_ACK_POLICY_NORMAL;
65f3ddcd
NS		 2013 }
2014
a66098da
LB		 2015 dma = pci_map_single(priv->pdev, skb->data,
2016 skb->len, PCI_DMA_TODEVICE);
2017
2018 if (pci_dma_mapping_error(priv->pdev, dma)) {
c96c31e4
JP		 2019 wiphy_debug(hw->wiphy,
2020 "failed to dma map skb, dropping TX frame.\n");
65f3ddcd
NS		 2021 if (start_ba_session) {
2022 spin_lock(&priv->stream_lock);
2023 mwl8k_remove_stream(hw, stream);
2024 spin_unlock(&priv->stream_lock);
2025 }
23b33906 2026 dev_kfree_skb(skb);
7bb45683 2027 return;
a66098da
LB		 2028 }
2029
23b33906 2030 spin_lock_bh(&priv->tx_lock);
a66098da 2031
23b33906 2032 txq = priv->txq + index;
a66098da 2033
3a769888
NS		 2034 /* Mgmt frames that go out frequently are probe
2035 * responses. Other mgmt frames got out relatively
2036 * infrequently. Hence reserve 2 buffers so that
2037 * other mgmt frames do not get dropped due to an
2038 * already queued probe response in one of the
2039 * reserved buffers.
2040 */
2041
2042 if (txq->len >= MWL8K_TX_DESCS - 2) {
23677ce3 2043 if (!mgmtframe || txq->len == MWL8K_TX_DESCS) {
3a769888
NS		 2044 if (start_ba_session) {
2045 spin_lock(&priv->stream_lock);
2046 mwl8k_remove_stream(hw, stream);
2047 spin_unlock(&priv->stream_lock);
2048 }
2049 spin_unlock_bh(&priv->tx_lock);
ff7aa96f
NS		 2050 pci_unmap_single(priv->pdev, dma, skb->len,
2051 PCI_DMA_TODEVICE);
3a769888
NS		 2052 dev_kfree_skb(skb);
2053 return;
3a7dbc3b 2054 }
65f3ddcd
NS		 2055 }
2056
45eb400d
LB		 2057 BUG_ON(txq->skb[txq->tail] != NULL);
2058 txq->skb[txq->tail] = skb;
a66098da 2059
45eb400d 2060 tx = txq->txd + txq->tail;
23b33906 2061 tx->data_rate = txdatarate;
65f3ddcd 2062 tx->tx_priority = txpriority;
a66098da 2063 tx->qos_control = cpu_to_le16(qos);
a66098da
LB		 2064 tx->pkt_phys_addr = cpu_to_le32(dma);
2065 tx->pkt_len = cpu_to_le16(skb->len);
23b33906 2066 tx->rate_info = 0;
36323f81
TH		 2067 if (!priv->ap_fw && sta != NULL)
2068 tx->peer_id = MWL8K_STA(sta)->peer_id;
a680400e
LB		 2069 else
2070 tx->peer_id = 0;
566875db 2071
e1f4d69b 2072 if (priv->ap_fw && ieee80211_is_data(wh->frame_control) && !eapol_frame)
566875db
PN		 2073 tx->timestamp = cpu_to_le32(ioread32(priv->regs +
2074 MWL8K_HW_TIMER_REGISTER));
b8d9e572
NS		 2075 else
2076 tx->timestamp = 0;
566875db 2077
a66098da 2078 wmb();
23b33906
LB		 2079 tx->status = cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED | txstatus);
2080
8ccbc3b8 2081 txq->len++;
a66098da 2082 priv->pending_tx_pkts++;
a66098da 2083
45eb400d
LB		 2084 txq->tail++;
2085 if (txq->tail == MWL8K_TX_DESCS)
2086 txq->tail = 0;
23b33906 2087
23b33906 2088 mwl8k_tx_start(priv);
a66098da
LB		 2089
2090 spin_unlock_bh(&priv->tx_lock);
65f3ddcd
NS		 2091
2092 /* Initiate the ampdu session here */
2093 if (start_ba_session) {
2094 spin_lock(&priv->stream_lock);
2095 if (mwl8k_start_stream(hw, stream))
2096 mwl8k_remove_stream(hw, stream);
2097 spin_unlock(&priv->stream_lock);
2098 }
a66098da
LB		 2099}
2100
2101
618952a7
LB		 2102/*
2103 * Firmware access.
2104 *
2105 * We have the following requirements for issuing firmware commands:
2106 * - Some commands require that the packet transmit path is idle when
2107 * the command is issued. (For simplicity, we'll just quiesce the
2108 * transmit path for every command.)
2109 * - There are certain sequences of commands that need to be issued to
2110 * the hardware sequentially, with no other intervening commands.
2111 *
2112 * This leads to an implementation of a "firmware lock" as a mutex that
2113 * can be taken recursively, and which is taken by both the low-level
2114 * command submission function (mwl8k_post_cmd) as well as any users of
2115 * that function that require issuing of an atomic sequence of commands,
2116 * and quiesces the transmit path whenever it's taken.
2117 */
2118static int mwl8k_fw_lock(struct ieee80211_hw *hw)
2119{
2120 struct mwl8k_priv *priv = hw->priv;
2121
2122 if (priv->fw_mutex_owner != current) {
2123 int rc;
2124
2125 mutex_lock(&priv->fw_mutex);
2126 ieee80211_stop_queues(hw);
2127
2128 rc = mwl8k_tx_wait_empty(hw);
2129 if (rc) {
6b6accc3
YAP		 2130 if (!priv->hw_restart_in_progress)
2131 ieee80211_wake_queues(hw);
2132
618952a7
LB		 2133 mutex_unlock(&priv->fw_mutex);
2134
2135 return rc;
2136 }
2137
2138 priv->fw_mutex_owner = current;
2139 }
2140
2141 priv->fw_mutex_depth++;
2142
2143 return 0;
2144}
2145
2146static void mwl8k_fw_unlock(struct ieee80211_hw *hw)
2147{
2148 struct mwl8k_priv *priv = hw->priv;
2149
2150 if (!--priv->fw_mutex_depth) {
6b6accc3
YAP		 2151 if (!priv->hw_restart_in_progress)
2152 ieee80211_wake_queues(hw);
2153
618952a7
LB		 2154 priv->fw_mutex_owner = NULL;
2155 mutex_unlock(&priv->fw_mutex);
2156 }
2157}
2158
2159
a66098da
LB		 2160/*
2161 * Command processing.
2162 */
2163
0c9cc640
LB		 2164/* Timeout firmware commands after 10s */
2165#define MWL8K_CMD_TIMEOUT_MS 10000
a66098da
LB		 2166
2167static int mwl8k_post_cmd(struct ieee80211_hw *hw, struct mwl8k_cmd_pkt *cmd)
2168{
2169 DECLARE_COMPLETION_ONSTACK(cmd_wait);
2170 struct mwl8k_priv *priv = hw->priv;
2171 void __iomem *regs = priv->regs;
2172 dma_addr_t dma_addr;
2173 unsigned int dma_size;
2174 int rc;
a66098da
LB		 2175 unsigned long timeout = 0;
2176 u8 buf[32];
2177
b603742f 2178 cmd->result = (__force __le16) 0xffff;
a66098da
LB		 2179 dma_size = le16_to_cpu(cmd->length);
2180 dma_addr = pci_map_single(priv->pdev, cmd, dma_size,
2181 PCI_DMA_BIDIRECTIONAL);
2182 if (pci_dma_mapping_error(priv->pdev, dma_addr))
2183 return -ENOMEM;
2184
618952a7 2185 rc = mwl8k_fw_lock(hw);
39a1e42e
LB		 2186 if (rc) {
2187 pci_unmap_single(priv->pdev, dma_addr, dma_size,
2188 PCI_DMA_BIDIRECTIONAL);
618952a7 2189 return rc;
39a1e42e 2190 }
a66098da 2191
a66098da
LB		 2192 priv->hostcmd_wait = &cmd_wait;
2193 iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
2194 iowrite32(MWL8K_H2A_INT_DOORBELL,
2195 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
2196 iowrite32(MWL8K_H2A_INT_DUMMY,
2197 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
a66098da
LB		 2198
2199 timeout = wait_for_completion_timeout(&cmd_wait,
2200 msecs_to_jiffies(MWL8K_CMD_TIMEOUT_MS));
2201
618952a7
LB		 2202 priv->hostcmd_wait = NULL;
2203
2204 mwl8k_fw_unlock(hw);
2205
37055bd4
LB		 2206 pci_unmap_single(priv->pdev, dma_addr, dma_size,
2207 PCI_DMA_BIDIRECTIONAL);
2208
a66098da 2209 if (!timeout) {
5db55844 2210 wiphy_err(hw->wiphy, "Command %s timeout after %u ms\n",
c96c31e4
JP		 2211 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
2212 MWL8K_CMD_TIMEOUT_MS);
a66098da
LB		 2213 rc = -ETIMEDOUT;
2214 } else {
0c9cc640
LB		 2215 int ms;
2216
2217 ms = MWL8K_CMD_TIMEOUT_MS - jiffies_to_msecs(timeout);
2218
ce9e2e1b 2219 rc = cmd->result ? -EINVAL : 0;
a66098da 2220 if (rc)
5db55844 2221 wiphy_err(hw->wiphy, "Command %s error 0x%x\n",
c96c31e4
JP		 2222 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
2223 le16_to_cpu(cmd->result));
0c9cc640 2224 else if (ms > 2000)
5db55844 2225 wiphy_notice(hw->wiphy, "Command %s took %d ms\n",
c96c31e4
JP		 2226 mwl8k_cmd_name(cmd->code,
2227 buf, sizeof(buf)),
2228 ms);
a66098da
LB		 2229 }
2230
a66098da
LB		 2231 return rc;
2232}
2233
f57ca9c1
LB		 2234static int mwl8k_post_pervif_cmd(struct ieee80211_hw *hw,
2235 struct ieee80211_vif *vif,
2236 struct mwl8k_cmd_pkt *cmd)
2237{
2238 if (vif != NULL)
2239 cmd->macid = MWL8K_VIF(vif)->macid;
2240 return mwl8k_post_cmd(hw, cmd);
2241}
2242
1349ad2f
LB		 2243/*
2244 * Setup code shared between STA and AP firmware images.
2245 */
2246static void mwl8k_setup_2ghz_band(struct ieee80211_hw *hw)
2247{
2248 struct mwl8k_priv *priv = hw->priv;
2249
2250 BUILD_BUG_ON(sizeof(priv->channels_24) != sizeof(mwl8k_channels_24));
2251 memcpy(priv->channels_24, mwl8k_channels_24, sizeof(mwl8k_channels_24));
2252
2253 BUILD_BUG_ON(sizeof(priv->rates_24) != sizeof(mwl8k_rates_24));
2254 memcpy(priv->rates_24, mwl8k_rates_24, sizeof(mwl8k_rates_24));
2255
2256 priv->band_24.band = IEEE80211_BAND_2GHZ;
2257 priv->band_24.channels = priv->channels_24;
2258 priv->band_24.n_channels = ARRAY_SIZE(mwl8k_channels_24);
2259 priv->band_24.bitrates = priv->rates_24;
2260 priv->band_24.n_bitrates = ARRAY_SIZE(mwl8k_rates_24);
2261
2262 hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band_24;
2263}
2264
4eae9edd
LB		 2265static void mwl8k_setup_5ghz_band(struct ieee80211_hw *hw)
2266{
2267 struct mwl8k_priv *priv = hw->priv;
2268
2269 BUILD_BUG_ON(sizeof(priv->channels_50) != sizeof(mwl8k_channels_50));
2270 memcpy(priv->channels_50, mwl8k_channels_50, sizeof(mwl8k_channels_50));
2271
2272 BUILD_BUG_ON(sizeof(priv->rates_50) != sizeof(mwl8k_rates_50));
2273 memcpy(priv->rates_50, mwl8k_rates_50, sizeof(mwl8k_rates_50));
2274
2275 priv->band_50.band = IEEE80211_BAND_5GHZ;
2276 priv->band_50.channels = priv->channels_50;
2277 priv->band_50.n_channels = ARRAY_SIZE(mwl8k_channels_50);
2278 priv->band_50.bitrates = priv->rates_50;
2279 priv->band_50.n_bitrates = ARRAY_SIZE(mwl8k_rates_50);
2280
2281 hw->wiphy->bands[IEEE80211_BAND_5GHZ] = &priv->band_50;
2282}
2283
a66098da 2284/*
04b147b1 2285 * CMD_GET_HW_SPEC (STA version).
a66098da 2286 */
04b147b1 2287struct mwl8k_cmd_get_hw_spec_sta {
a66098da
LB		 2288 struct mwl8k_cmd_pkt header;
2289 __u8 hw_rev;
2290 __u8 host_interface;
2291 __le16 num_mcaddrs;
d89173f2 2292 __u8 perm_addr[ETH_ALEN];
a66098da
LB		 2293 __le16 region_code;
2294 __le32 fw_rev;
2295 __le32 ps_cookie;
2296 __le32 caps;
2297 __u8 mcs_bitmap[16];
2298 __le32 rx_queue_ptr;
2299 __le32 num_tx_queues;
e600707b 2300 __le32 tx_queue_ptrs[MWL8K_TX_WMM_QUEUES];
a66098da
LB		 2301 __le32 caps2;
2302 __le32 num_tx_desc_per_queue;
45eb400d 2303 __le32 total_rxd;
ba2d3587 2304} __packed;
a66098da 2305
341c9791
LB		 2306#define MWL8K_CAP_MAX_AMSDU 0x20000000
2307#define MWL8K_CAP_GREENFIELD 0x08000000
2308#define MWL8K_CAP_AMPDU 0x04000000
2309#define MWL8K_CAP_RX_STBC 0x01000000
2310#define MWL8K_CAP_TX_STBC 0x00800000
2311#define MWL8K_CAP_SHORTGI_40MHZ 0x00400000
2312#define MWL8K_CAP_SHORTGI_20MHZ 0x00200000
2313#define MWL8K_CAP_RX_ANTENNA_MASK 0x000e0000
2314#define MWL8K_CAP_TX_ANTENNA_MASK 0x0001c000
2315#define MWL8K_CAP_DELAY_BA 0x00003000
2316#define MWL8K_CAP_MIMO 0x00000200
2317#define MWL8K_CAP_40MHZ 0x00000100
06953235
LB		 2318#define MWL8K_CAP_BAND_MASK 0x00000007
2319#define MWL8K_CAP_5GHZ 0x00000004
2320#define MWL8K_CAP_2GHZ4 0x00000001
341c9791 2321
06953235
LB		 2322static void
2323mwl8k_set_ht_caps(struct ieee80211_hw *hw,
2324 struct ieee80211_supported_band *band, u32 cap)
341c9791 2325{
341c9791
LB		 2326 int rx_streams;
2327 int tx_streams;
2328
777ad375 2329 band->ht_cap.ht_supported = 1;
341c9791
LB		 2330
2331 if (cap & MWL8K_CAP_MAX_AMSDU)
777ad375 2332 band->ht_cap.cap |= IEEE80211_HT_CAP_MAX_AMSDU;
341c9791 2333 if (cap & MWL8K_CAP_GREENFIELD)
777ad375 2334 band->ht_cap.cap |= IEEE80211_HT_CAP_GRN_FLD;
341c9791
LB		 2335 if (cap & MWL8K_CAP_AMPDU) {
2336 hw->flags |= IEEE80211_HW_AMPDU_AGGREGATION;
777ad375
LB		 2337 band->ht_cap.ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
2338 band->ht_cap.ampdu_density = IEEE80211_HT_MPDU_DENSITY_NONE;
341c9791
LB		 2339 }
2340 if (cap & MWL8K_CAP_RX_STBC)
777ad375 2341 band->ht_cap.cap |= IEEE80211_HT_CAP_RX_STBC;
341c9791 2342 if (cap & MWL8K_CAP_TX_STBC)
777ad375 2343 band->ht_cap.cap |= IEEE80211_HT_CAP_TX_STBC;
341c9791 2344 if (cap & MWL8K_CAP_SHORTGI_40MHZ)
777ad375 2345 band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_40;
341c9791 2346 if (cap & MWL8K_CAP_SHORTGI_20MHZ)
777ad375 2347 band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_20;
341c9791 2348 if (cap & MWL8K_CAP_DELAY_BA)
777ad375 2349 band->ht_cap.cap |= IEEE80211_HT_CAP_DELAY_BA;
341c9791 2350 if (cap & MWL8K_CAP_40MHZ)
777ad375 2351 band->ht_cap.cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
341c9791
LB		 2352
2353 rx_streams = hweight32(cap & MWL8K_CAP_RX_ANTENNA_MASK);
2354 tx_streams = hweight32(cap & MWL8K_CAP_TX_ANTENNA_MASK);
2355
777ad375 2356 band->ht_cap.mcs.rx_mask[0] = 0xff;
341c9791 2357 if (rx_streams >= 2)
777ad375 2358 band->ht_cap.mcs.rx_mask[1] = 0xff;
341c9791 2359 if (rx_streams >= 3)
777ad375
LB		 2360 band->ht_cap.mcs.rx_mask[2] = 0xff;
2361 band->ht_cap.mcs.rx_mask[4] = 0x01;
2362 band->ht_cap.mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
341c9791
LB		 2363
2364 if (rx_streams != tx_streams) {
777ad375
LB		 2365 band->ht_cap.mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
2366 band->ht_cap.mcs.tx_params |= (tx_streams - 1) <<
341c9791
LB		 2367 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
2368 }
2369}
2370
06953235
LB		 2371static void
2372mwl8k_set_caps(struct ieee80211_hw *hw, u32 caps)
2373{
2374 struct mwl8k_priv *priv = hw->priv;
2375
2376 if ((caps & MWL8K_CAP_2GHZ4) || !(caps & MWL8K_CAP_BAND_MASK)) {
2377 mwl8k_setup_2ghz_band(hw);
2378 if (caps & MWL8K_CAP_MIMO)
2379 mwl8k_set_ht_caps(hw, &priv->band_24, caps);
2380 }
2381
2382 if (caps & MWL8K_CAP_5GHZ) {
2383 mwl8k_setup_5ghz_band(hw);
2384 if (caps & MWL8K_CAP_MIMO)
2385 mwl8k_set_ht_caps(hw, &priv->band_50, caps);
2386 }
2387}
2388
04b147b1 2389static int mwl8k_cmd_get_hw_spec_sta(struct ieee80211_hw *hw)
a66098da
LB		 2390{
2391 struct mwl8k_priv *priv = hw->priv;
04b147b1 2392 struct mwl8k_cmd_get_hw_spec_sta *cmd;
a66098da
LB		 2393 int rc;
2394 int i;
2395
2396 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2397 if (cmd == NULL)
2398 return -ENOMEM;
2399
2400 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
2401 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2402
2403 memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
2404 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
45eb400d 2405 cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
e600707b
BC		 2406 cmd->num_tx_queues = cpu_to_le32(mwl8k_tx_queues(priv));
2407 for (i = 0; i < mwl8k_tx_queues(priv); i++)
45eb400d 2408 cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma);
4ff6432e 2409 cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
45eb400d 2410 cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
a66098da
LB		 2411
2412 rc = mwl8k_post_cmd(hw, &cmd->header);
2413
2414 if (!rc) {
2415 SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
2416 priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
4ff6432e 2417 priv->fw_rev = le32_to_cpu(cmd->fw_rev);
a66098da 2418 priv->hw_rev = cmd->hw_rev;
06953235 2419 mwl8k_set_caps(hw, le32_to_cpu(cmd->caps));
ee0ddf18
LB		 2420 priv->ap_macids_supported = 0x00000000;
2421 priv->sta_macids_supported = 0x00000001;
a66098da
LB		 2422 }
2423
2424 kfree(cmd);
2425 return rc;
2426}
2427
42fba21d
LB		 2428/*
2429 * CMD_GET_HW_SPEC (AP version).
2430 */
2431struct mwl8k_cmd_get_hw_spec_ap {
2432 struct mwl8k_cmd_pkt header;
2433 __u8 hw_rev;
2434 __u8 host_interface;
2435 __le16 num_wcb;
2436 __le16 num_mcaddrs;
2437 __u8 perm_addr[ETH_ALEN];
2438 __le16 region_code;
2439 __le16 num_antenna;
2440 __le32 fw_rev;
2441 __le32 wcbbase0;
2442 __le32 rxwrptr;
2443 __le32 rxrdptr;
2444 __le32 ps_cookie;
2445 __le32 wcbbase1;
2446 __le32 wcbbase2;
2447 __le32 wcbbase3;
952a0e96 2448 __le32 fw_api_version;
8a7a578c
BC		 2449 __le32 caps;
2450 __le32 num_of_ampdu_queues;
2451 __le32 wcbbase_ampdu[MWL8K_MAX_AMPDU_QUEUES];
ba2d3587 2452} __packed;
42fba21d
LB		 2453
2454static int mwl8k_cmd_get_hw_spec_ap(struct ieee80211_hw *hw)
2455{
2456 struct mwl8k_priv *priv = hw->priv;
2457 struct mwl8k_cmd_get_hw_spec_ap *cmd;
8a7a578c 2458 int rc, i;
952a0e96 2459 u32 api_version;
42fba21d
LB		 2460
2461 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2462 if (cmd == NULL)
2463 return -ENOMEM;
2464
2465 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
2466 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2467
2468 memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
2469 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
2470
2471 rc = mwl8k_post_cmd(hw, &cmd->header);
2472
2473 if (!rc) {
2474 int off;
2475
952a0e96
BC		 2476 api_version = le32_to_cpu(cmd->fw_api_version);
2477 if (priv->device_info->fw_api_ap != api_version) {
2478 printk(KERN_ERR "%s: Unsupported fw API version for %s."
2479 " Expected %d got %d.\n", MWL8K_NAME,
2480 priv->device_info->part_name,
2481 priv->device_info->fw_api_ap,
2482 api_version);
2483 rc = -EINVAL;
2484 goto done;
2485 }
42fba21d
LB		 2486 SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
2487 priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
2488 priv->fw_rev = le32_to_cpu(cmd->fw_rev);
2489 priv->hw_rev = cmd->hw_rev;
8a7a578c 2490 mwl8k_set_caps(hw, le32_to_cpu(cmd->caps));
ee0ddf18
LB		 2491 priv->ap_macids_supported = 0x000000ff;
2492 priv->sta_macids_supported = 0x00000000;
8a7a578c
BC		 2493 priv->num_ampdu_queues = le32_to_cpu(cmd->num_of_ampdu_queues);
2494 if (priv->num_ampdu_queues > MWL8K_MAX_AMPDU_QUEUES) {
2495 wiphy_warn(hw->wiphy, "fw reported %d ampdu queues"
2496 " but we only support %d.\n",
2497 priv->num_ampdu_queues,
2498 MWL8K_MAX_AMPDU_QUEUES);
2499 priv->num_ampdu_queues = MWL8K_MAX_AMPDU_QUEUES;
2500 }
42fba21d 2501 off = le32_to_cpu(cmd->rxwrptr) & 0xffff;
b603742f 2502 iowrite32(priv->rxq[0].rxd_dma, priv->sram + off);
42fba21d
LB		 2503
2504 off = le32_to_cpu(cmd->rxrdptr) & 0xffff;
b603742f 2505 iowrite32(priv->rxq[0].rxd_dma, priv->sram + off);
42fba21d 2506
73b46320
BC		 2507 priv->txq_offset[0] = le32_to_cpu(cmd->wcbbase0) & 0xffff;
2508 priv->txq_offset[1] = le32_to_cpu(cmd->wcbbase1) & 0xffff;
2509 priv->txq_offset[2] = le32_to_cpu(cmd->wcbbase2) & 0xffff;
2510 priv->txq_offset[3] = le32_to_cpu(cmd->wcbbase3) & 0xffff;
8a7a578c
BC		 2511
2512 for (i = 0; i < priv->num_ampdu_queues; i++)
e600707b 2513 priv->txq_offset[i + MWL8K_TX_WMM_QUEUES] =
8a7a578c 2514 le32_to_cpu(cmd->wcbbase_ampdu[i]) & 0xffff;
42fba21d
LB		 2515 }
2516
952a0e96 2517done:
42fba21d
LB		 2518 kfree(cmd);
2519 return rc;
2520}
2521
2522/*
2523 * CMD_SET_HW_SPEC.
2524 */
2525struct mwl8k_cmd_set_hw_spec {
2526 struct mwl8k_cmd_pkt header;
2527 __u8 hw_rev;
2528 __u8 host_interface;
2529 __le16 num_mcaddrs;
2530 __u8 perm_addr[ETH_ALEN];
2531 __le16 region_code;
2532 __le32 fw_rev;
2533 __le32 ps_cookie;
2534 __le32 caps;
2535 __le32 rx_queue_ptr;
2536 __le32 num_tx_queues;
e600707b 2537 __le32 tx_queue_ptrs[MWL8K_MAX_TX_QUEUES];
42fba21d
LB		 2538 __le32 flags;
2539 __le32 num_tx_desc_per_queue;
2540 __le32 total_rxd;
ba2d3587 2541} __packed;
42fba21d 2542
8a7a578c
BC		 2543/* If enabled, MWL8K_SET_HW_SPEC_FLAG_ENABLE_LIFE_TIME_EXPIRY will cause
2544 * packets to expire 500 ms after the timestamp in the tx descriptor. That is,
2545 * the packets that are queued for more than 500ms, will be dropped in the
2546 * hardware. This helps minimizing the issues caused due to head-of-line
2547 * blocking where a slow client can hog the bandwidth and affect traffic to a
2548 * faster client.
2549 */
2550#define MWL8K_SET_HW_SPEC_FLAG_ENABLE_LIFE_TIME_EXPIRY 0x00000400
3373b28e 2551#define MWL8K_SET_HW_SPEC_FLAG_GENERATE_CCMP_HDR 0x00000200
b64fe619
LB		 2552#define MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT 0x00000080
2553#define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP 0x00000020
2554#define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON 0x00000010
42fba21d
LB		 2555
2556static int mwl8k_cmd_set_hw_spec(struct ieee80211_hw *hw)
2557{
2558 struct mwl8k_priv *priv = hw->priv;
2559 struct mwl8k_cmd_set_hw_spec *cmd;
2560 int rc;
2561 int i;
2562
2563 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2564 if (cmd == NULL)
2565 return -ENOMEM;
2566
2567 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_HW_SPEC);
2568 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2569
2570 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
2571 cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
e600707b 2572 cmd->num_tx_queues = cpu_to_le32(mwl8k_tx_queues(priv));
85c9205c
NS		 2573
2574 /*
2575 * Mac80211 stack has Q0 as highest priority and Q3 as lowest in
2576 * that order. Firmware has Q3 as highest priority and Q0 as lowest
2577 * in that order. Map Q3 of mac80211 to Q0 of firmware so that the
2578 * priority is interpreted the right way in firmware.
2579 */
e600707b
BC		 2580 for (i = 0; i < mwl8k_tx_queues(priv); i++) {
2581 int j = mwl8k_tx_queues(priv) - 1 - i;
85c9205c
NS		 2582 cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[j].txd_dma);
2583 }
2584
b64fe619
LB		 2585 cmd->flags = cpu_to_le32(MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT |
2586 MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP |
31d291a7 2587 MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON |
3373b28e
NS		 2588 MWL8K_SET_HW_SPEC_FLAG_ENABLE_LIFE_TIME_EXPIRY |
2589 MWL8K_SET_HW_SPEC_FLAG_GENERATE_CCMP_HDR);
42fba21d
LB		 2590 cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
2591 cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
2592
2593 rc = mwl8k_post_cmd(hw, &cmd->header);
2594 kfree(cmd);
2595
2596 return rc;
2597}
2598
a66098da
LB		 2599/*
2600 * CMD_MAC_MULTICAST_ADR.
2601 */
2602struct mwl8k_cmd_mac_multicast_adr {
2603 struct mwl8k_cmd_pkt header;
2604 __le16 action;
2605 __le16 numaddr;
ce9e2e1b 2606 __u8 addr[0][ETH_ALEN];
a66098da
LB		 2607};
2608
d5e30845
LB		 2609#define MWL8K_ENABLE_RX_DIRECTED 0x0001
2610#define MWL8K_ENABLE_RX_MULTICAST 0x0002
2611#define MWL8K_ENABLE_RX_ALL_MULTICAST 0x0004
2612#define MWL8K_ENABLE_RX_BROADCAST 0x0008
ce9e2e1b 2613
e81cd2d6 2614static struct mwl8k_cmd_pkt *
447ced07 2615__mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw *hw, int allmulti,
22bedad3 2616 struct netdev_hw_addr_list *mc_list)
a66098da 2617{
e81cd2d6 2618 struct mwl8k_priv *priv = hw->priv;
a66098da 2619 struct mwl8k_cmd_mac_multicast_adr *cmd;
e81cd2d6 2620 int size;
22bedad3
JP		 2621 int mc_count = 0;
2622
2623 if (mc_list)
2624 mc_count = netdev_hw_addr_list_count(mc_list);
e81cd2d6 2625
447ced07 2626 if (allmulti || mc_count > priv->num_mcaddrs) {
d5e30845
LB		 2627 allmulti = 1;
2628 mc_count = 0;
2629 }
e81cd2d6
LB		 2630
2631 size = sizeof(*cmd) + mc_count * ETH_ALEN;
ce9e2e1b 2632
e81cd2d6 2633 cmd = kzalloc(size, GFP_ATOMIC);
a66098da 2634 if (cmd == NULL)
e81cd2d6 2635 return NULL;
a66098da
LB		 2636
2637 cmd->header.code = cpu_to_le16(MWL8K_CMD_MAC_MULTICAST_ADR);
2638 cmd->header.length = cpu_to_le16(size);
d5e30845
LB		 2639 cmd->action = cpu_to_le16(MWL8K_ENABLE_RX_DIRECTED |
2640 MWL8K_ENABLE_RX_BROADCAST);
2641
2642 if (allmulti) {
2643 cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_ALL_MULTICAST);
2644 } else if (mc_count) {
22bedad3
JP		 2645 struct netdev_hw_addr *ha;
2646 int i = 0;
d5e30845
LB		 2647
2648 cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_MULTICAST);
2649 cmd->numaddr = cpu_to_le16(mc_count);
22bedad3
JP		 2650 netdev_hw_addr_list_for_each(ha, mc_list) {
2651 memcpy(cmd->addr[i], ha->addr, ETH_ALEN);
a66098da 2652 }
a66098da
LB		 2653 }
2654
e81cd2d6 2655 return &cmd->header;
a66098da
LB		 2656}
2657
2658/*
55489b6e 2659 * CMD_GET_STAT.
a66098da 2660 */
55489b6e 2661struct mwl8k_cmd_get_stat {
a66098da 2662 struct mwl8k_cmd_pkt header;
a66098da 2663 __le32 stats[64];
ba2d3587 2664} __packed;
a66098da
LB		 2665
2666#define MWL8K_STAT_ACK_FAILURE 9
2667#define MWL8K_STAT_RTS_FAILURE 12
2668#define MWL8K_STAT_FCS_ERROR 24
2669#define MWL8K_STAT_RTS_SUCCESS 11
2670
55489b6e
LB		 2671static int mwl8k_cmd_get_stat(struct ieee80211_hw *hw,
2672 struct ieee80211_low_level_stats *stats)
a66098da 2673{
55489b6e 2674 struct mwl8k_cmd_get_stat *cmd;
a66098da
LB		 2675 int rc;
2676
2677 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2678 if (cmd == NULL)
2679 return -ENOMEM;
2680
2681 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_STAT);
2682 cmd->header.length = cpu_to_le16(sizeof(*cmd));
a66098da
LB		 2683
2684 rc = mwl8k_post_cmd(hw, &cmd->header);
2685 if (!rc) {
2686 stats->dot11ACKFailureCount =
2687 le32_to_cpu(cmd->stats[MWL8K_STAT_ACK_FAILURE]);
2688 stats->dot11RTSFailureCount =
2689 le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_FAILURE]);
2690 stats->dot11FCSErrorCount =
2691 le32_to_cpu(cmd->stats[MWL8K_STAT_FCS_ERROR]);
2692 stats->dot11RTSSuccessCount =
2693 le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_SUCCESS]);
2694 }
2695 kfree(cmd);
2696
2697 return rc;
2698}
2699
2700/*
55489b6e 2701 * CMD_RADIO_CONTROL.
a66098da 2702 */
55489b6e 2703struct mwl8k_cmd_radio_control {
a66098da
LB		 2704 struct mwl8k_cmd_pkt header;
2705 __le16 action;
2706 __le16 control;
2707 __le16 radio_on;
ba2d3587 2708} __packed;
a66098da 2709
c46563b7 2710static int
55489b6e 2711mwl8k_cmd_radio_control(struct ieee80211_hw *hw, bool enable, bool force)
a66098da
LB		 2712{
2713 struct mwl8k_priv *priv = hw->priv;
55489b6e 2714 struct mwl8k_cmd_radio_control *cmd;
a66098da
LB		 2715 int rc;
2716
c46563b7 2717 if (enable == priv->radio_on && !force)
a66098da
LB		 2718 return 0;
2719
a66098da
LB		 2720 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2721 if (cmd == NULL)
2722 return -ENOMEM;
2723
2724 cmd->header.code = cpu_to_le16(MWL8K_CMD_RADIO_CONTROL);
2725 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2726 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
68ce3884 2727 cmd->control = cpu_to_le16(priv->radio_short_preamble ? 3 : 1);
a66098da
LB		 2728 cmd->radio_on = cpu_to_le16(enable ? 0x0001 : 0x0000);
2729
2730 rc = mwl8k_post_cmd(hw, &cmd->header);
2731 kfree(cmd);
2732
2733 if (!rc)
c46563b7 2734 priv->radio_on = enable;
a66098da
LB		 2735
2736 return rc;
2737}
2738
55489b6e 2739static int mwl8k_cmd_radio_disable(struct ieee80211_hw *hw)
c46563b7 2740{
55489b6e 2741 return mwl8k_cmd_radio_control(hw, 0, 0);
c46563b7
LB		 2742}
2743
55489b6e 2744static int mwl8k_cmd_radio_enable(struct ieee80211_hw *hw)
c46563b7 2745{
55489b6e 2746 return mwl8k_cmd_radio_control(hw, 1, 0);
c46563b7
LB		 2747}
2748
a66098da
LB		 2749static int
2750mwl8k_set_radio_preamble(struct ieee80211_hw *hw, bool short_preamble)
2751{
99200a99 2752 struct mwl8k_priv *priv = hw->priv;
a66098da 2753
68ce3884 2754 priv->radio_short_preamble = short_preamble;
a66098da 2755
55489b6e 2756 return mwl8k_cmd_radio_control(hw, 1, 1);
a66098da
LB		 2757}
2758
2759/*
55489b6e 2760 * CMD_RF_TX_POWER.
a66098da 2761 */
41fdf097 2762#define MWL8K_RF_TX_POWER_LEVEL_TOTAL 8
a66098da 2763
55489b6e 2764struct mwl8k_cmd_rf_tx_power {
a66098da
LB		 2765 struct mwl8k_cmd_pkt header;
2766 __le16 action;
2767 __le16 support_level;
2768 __le16 current_level;
2769 __le16 reserved;
41fdf097 2770 __le16 power_level_list[MWL8K_RF_TX_POWER_LEVEL_TOTAL];
ba2d3587 2771} __packed;
a66098da 2772
55489b6e 2773static int mwl8k_cmd_rf_tx_power(struct ieee80211_hw *hw, int dBm)
a66098da 2774{
55489b6e 2775 struct mwl8k_cmd_rf_tx_power *cmd;
a66098da
LB		 2776 int rc;
2777
2778 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2779 if (cmd == NULL)
2780 return -ENOMEM;
2781
2782 cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_TX_POWER);
2783 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2784 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2785 cmd->support_level = cpu_to_le16(dBm);
2786
2787 rc = mwl8k_post_cmd(hw, &cmd->header);
2788 kfree(cmd);
2789
2790 return rc;
2791}
2792
41fdf097
NS		 2793/*
2794 * CMD_TX_POWER.
2795 */
2796#define MWL8K_TX_POWER_LEVEL_TOTAL 12
2797
2798struct mwl8k_cmd_tx_power {
2799 struct mwl8k_cmd_pkt header;
2800 __le16 action;
2801 __le16 band;
2802 __le16 channel;
2803 __le16 bw;
2804 __le16 sub_ch;
2805 __le16 power_level_list[MWL8K_TX_POWER_LEVEL_TOTAL];
ba30c4a5 2806} __packed;
41fdf097
NS		 2807
2808static int mwl8k_cmd_tx_power(struct ieee80211_hw *hw,
2809 struct ieee80211_conf *conf,
2810 unsigned short pwr)
2811{
2812 struct ieee80211_channel *channel = conf->channel;
2813 struct mwl8k_cmd_tx_power *cmd;
2814 int rc;
2815 int i;
2816
2817 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2818 if (cmd == NULL)
2819 return -ENOMEM;
2820
2821 cmd->header.code = cpu_to_le16(MWL8K_CMD_TX_POWER);
2822 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2823 cmd->action = cpu_to_le16(MWL8K_CMD_SET_LIST);
2824
2825 if (channel->band == IEEE80211_BAND_2GHZ)
2826 cmd->band = cpu_to_le16(0x1);
2827 else if (channel->band == IEEE80211_BAND_5GHZ)
2828 cmd->band = cpu_to_le16(0x4);
2829
604c4ef1 2830 cmd->channel = cpu_to_le16(channel->hw_value);
41fdf097
NS		 2831
2832 if (conf->channel_type == NL80211_CHAN_NO_HT ||
2833 conf->channel_type == NL80211_CHAN_HT20) {
2834 cmd->bw = cpu_to_le16(0x2);
2835 } else {
2836 cmd->bw = cpu_to_le16(0x4);
2837 if (conf->channel_type == NL80211_CHAN_HT40MINUS)
2838 cmd->sub_ch = cpu_to_le16(0x3);
2839 else if (conf->channel_type == NL80211_CHAN_HT40PLUS)
2840 cmd->sub_ch = cpu_to_le16(0x1);
2841 }
2842
2843 for (i = 0; i < MWL8K_TX_POWER_LEVEL_TOTAL; i++)
2844 cmd->power_level_list[i] = cpu_to_le16(pwr);
2845
2846 rc = mwl8k_post_cmd(hw, &cmd->header);
2847 kfree(cmd);
2848
2849 return rc;
2850}
2851
08b06347
LB		 2852/*
2853 * CMD_RF_ANTENNA.
2854 */
2855struct mwl8k_cmd_rf_antenna {
2856 struct mwl8k_cmd_pkt header;
2857 __le16 antenna;
2858 __le16 mode;
ba2d3587 2859} __packed;
08b06347
LB		 2860
2861#define MWL8K_RF_ANTENNA_RX 1
2862#define MWL8K_RF_ANTENNA_TX 2
2863
2864static int
2865mwl8k_cmd_rf_antenna(struct ieee80211_hw *hw, int antenna, int mask)
2866{
2867 struct mwl8k_cmd_rf_antenna *cmd;
2868 int rc;
2869
2870 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2871 if (cmd == NULL)
2872 return -ENOMEM;
2873
2874 cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_ANTENNA);
2875 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2876 cmd->antenna = cpu_to_le16(antenna);
2877 cmd->mode = cpu_to_le16(mask);
2878
2879 rc = mwl8k_post_cmd(hw, &cmd->header);
2880 kfree(cmd);
2881
2882 return rc;
2883}
2884
b64fe619
LB		 2885/*
2886 * CMD_SET_BEACON.
2887 */
2888struct mwl8k_cmd_set_beacon {
2889 struct mwl8k_cmd_pkt header;
2890 __le16 beacon_len;
2891 __u8 beacon[0];
2892};
2893
aa21d0f6
LB		 2894static int mwl8k_cmd_set_beacon(struct ieee80211_hw *hw,
2895 struct ieee80211_vif *vif, u8 *beacon, int len)
b64fe619
LB		 2896{
2897 struct mwl8k_cmd_set_beacon *cmd;
2898 int rc;
2899
2900 cmd = kzalloc(sizeof(*cmd) + len, GFP_KERNEL);
2901 if (cmd == NULL)
2902 return -ENOMEM;
2903
2904 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_BEACON);
2905 cmd->header.length = cpu_to_le16(sizeof(*cmd) + len);
2906 cmd->beacon_len = cpu_to_le16(len);
2907 memcpy(cmd->beacon, beacon, len);
2908
aa21d0f6 2909 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
b64fe619
LB		 2910 kfree(cmd);
2911
2912 return rc;
2913}
2914
a66098da
LB		 2915/*
2916 * CMD_SET_PRE_SCAN.
2917 */
2918struct mwl8k_cmd_set_pre_scan {
2919 struct mwl8k_cmd_pkt header;
ba2d3587 2920} __packed;
a66098da
LB		 2921
2922static int mwl8k_cmd_set_pre_scan(struct ieee80211_hw *hw)
2923{
2924 struct mwl8k_cmd_set_pre_scan *cmd;
2925 int rc;
2926
2927 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2928 if (cmd == NULL)
2929 return -ENOMEM;
2930
2931 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_PRE_SCAN);
2932 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2933
2934 rc = mwl8k_post_cmd(hw, &cmd->header);
2935 kfree(cmd);
2936
2937 return rc;
2938}
2939
2940/*
2941 * CMD_SET_POST_SCAN.
2942 */
2943struct mwl8k_cmd_set_post_scan {
2944 struct mwl8k_cmd_pkt header;
2945 __le32 isibss;
d89173f2 2946 __u8 bssid[ETH_ALEN];
ba2d3587 2947} __packed;
a66098da
LB		 2948
2949static int
0a11dfc3 2950mwl8k_cmd_set_post_scan(struct ieee80211_hw *hw, const __u8 *mac)
a66098da
LB		 2951{
2952 struct mwl8k_cmd_set_post_scan *cmd;
2953 int rc;
2954
2955 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2956 if (cmd == NULL)
2957 return -ENOMEM;
2958
2959 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_POST_SCAN);
2960 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2961 cmd->isibss = 0;
d89173f2 2962 memcpy(cmd->bssid, mac, ETH_ALEN);
a66098da
LB		 2963
2964 rc = mwl8k_post_cmd(hw, &cmd->header);
2965 kfree(cmd);
2966
2967 return rc;
2968}
2969
2970/*
2971 * CMD_SET_RF_CHANNEL.
2972 */
2973struct mwl8k_cmd_set_rf_channel {
2974 struct mwl8k_cmd_pkt header;
2975 __le16 action;
2976 __u8 current_channel;
2977 __le32 channel_flags;
ba2d3587 2978} __packed;
a66098da
LB		 2979
2980static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw *hw,
610677d2 2981 struct ieee80211_conf *conf)
a66098da 2982{
610677d2 2983 struct ieee80211_channel *channel = conf->channel;
a66098da
LB		 2984 struct mwl8k_cmd_set_rf_channel *cmd;
2985 int rc;
2986
2987 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2988 if (cmd == NULL)
2989 return -ENOMEM;
2990
2991 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RF_CHANNEL);
2992 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2993 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2994 cmd->current_channel = channel->hw_value;
610677d2 2995
a66098da 2996 if (channel->band == IEEE80211_BAND_2GHZ)
610677d2 2997 cmd->channel_flags |= cpu_to_le32(0x00000001);
42574ea2
LB		 2998 else if (channel->band == IEEE80211_BAND_5GHZ)
2999 cmd->channel_flags |= cpu_to_le32(0x00000004);
610677d2
LB		 3000
3001 if (conf->channel_type == NL80211_CHAN_NO_HT ||
3002 conf->channel_type == NL80211_CHAN_HT20)
3003 cmd->channel_flags |= cpu_to_le32(0x00000080);
3004 else if (conf->channel_type == NL80211_CHAN_HT40MINUS)
3005 cmd->channel_flags |= cpu_to_le32(0x000001900);
3006 else if (conf->channel_type == NL80211_CHAN_HT40PLUS)
3007 cmd->channel_flags |= cpu_to_le32(0x000000900);
a66098da
LB		 3008
3009 rc = mwl8k_post_cmd(hw, &cmd->header);
3010 kfree(cmd);
3011
3012 return rc;
3013}
3014
3015/*
55489b6e 3016 * CMD_SET_AID.
a66098da 3017 */
55489b6e
LB		 3018#define MWL8K_FRAME_PROT_DISABLED 0x00
3019#define MWL8K_FRAME_PROT_11G 0x07
3020#define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02
3021#define MWL8K_FRAME_PROT_11N_HT_ALL 0x06
a66098da 3022
55489b6e
LB		 3023struct mwl8k_cmd_update_set_aid {
3024 struct mwl8k_cmd_pkt header;
3025 __le16 aid;
a66098da 3026
55489b6e
LB		 3027 /* AP's MAC address (BSSID) */
3028 __u8 bssid[ETH_ALEN];
3029 __le16 protection_mode;
3030 __u8 supp_rates[14];
ba2d3587 3031} __packed;
a66098da 3032
c6e96010
LB		 3033static void legacy_rate_mask_to_array(u8 *rates, u32 mask)
3034{
3035 int i;
3036 int j;
3037
3038 /*
3039 * Clear nonstandard rates 4 and 13.
3040 */
3041 mask &= 0x1fef;
3042
3043 for (i = 0, j = 0; i < 14; i++) {
3044 if (mask & (1 << i))
777ad375 3045 rates[j++] = mwl8k_rates_24[i].hw_value;
c6e96010
LB		 3046 }
3047}
3048
55489b6e 3049static int
c6e96010
LB		 3050mwl8k_cmd_set_aid(struct ieee80211_hw *hw,
3051 struct ieee80211_vif *vif, u32 legacy_rate_mask)
a66098da 3052{
55489b6e
LB		 3053 struct mwl8k_cmd_update_set_aid *cmd;
3054 u16 prot_mode;
a66098da
LB		 3055 int rc;
3056
3057 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3058 if (cmd == NULL)
3059 return -ENOMEM;
3060
55489b6e 3061 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_AID);
a66098da 3062 cmd->header.length = cpu_to_le16(sizeof(*cmd));
7dc6a7a7 3063 cmd->aid = cpu_to_le16(vif->bss_conf.aid);
0a11dfc3 3064 memcpy(cmd->bssid, vif->bss_conf.bssid, ETH_ALEN);
a66098da 3065
7dc6a7a7 3066 if (vif->bss_conf.use_cts_prot) {
55489b6e
LB		 3067 prot_mode = MWL8K_FRAME_PROT_11G;
3068 } else {
7dc6a7a7 3069 switch (vif->bss_conf.ht_operation_mode &
55489b6e
LB		 3070 IEEE80211_HT_OP_MODE_PROTECTION) {
3071 case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ:
3072 prot_mode = MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY;
3073 break;
3074 case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED:
3075 prot_mode = MWL8K_FRAME_PROT_11N_HT_ALL;
3076 break;
3077 default:
3078 prot_mode = MWL8K_FRAME_PROT_DISABLED;
3079 break;
3080 }
3081 }
3082 cmd->protection_mode = cpu_to_le16(prot_mode);
a66098da 3083
c6e96010 3084 legacy_rate_mask_to_array(cmd->supp_rates, legacy_rate_mask);
a66098da
LB		 3085
3086 rc = mwl8k_post_cmd(hw, &cmd->header);
3087 kfree(cmd);
3088
3089 return rc;
3090}
3091
32060e1b 3092/*
55489b6e 3093 * CMD_SET_RATE.
32060e1b 3094 */
55489b6e
LB		 3095struct mwl8k_cmd_set_rate {
3096 struct mwl8k_cmd_pkt header;
3097 __u8 legacy_rates[14];
3098
3099 /* Bitmap for supported MCS codes. */
3100 __u8 mcs_set[16];
3101 __u8 reserved[16];
ba2d3587 3102} __packed;
32060e1b 3103
55489b6e 3104static int
c6e96010 3105mwl8k_cmd_set_rate(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
13935e2c 3106 u32 legacy_rate_mask, u8 *mcs_rates)
32060e1b 3107{
55489b6e 3108 struct mwl8k_cmd_set_rate *cmd;
32060e1b
LB		 3109 int rc;
3110
3111 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3112 if (cmd == NULL)
3113 return -ENOMEM;
3114
55489b6e 3115 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATE);
32060e1b 3116 cmd->header.length = cpu_to_le16(sizeof(*cmd));
c6e96010 3117 legacy_rate_mask_to_array(cmd->legacy_rates, legacy_rate_mask);
13935e2c 3118 memcpy(cmd->mcs_set, mcs_rates, 16);
32060e1b
LB		 3119
3120 rc = mwl8k_post_cmd(hw, &cmd->header);
3121 kfree(cmd);
3122
3123 return rc;
3124}
3125
a66098da 3126/*
55489b6e 3127 * CMD_FINALIZE_JOIN.
a66098da 3128 */
55489b6e
LB		 3129#define MWL8K_FJ_BEACON_MAXLEN 128
3130
3131struct mwl8k_cmd_finalize_join {
a66098da 3132 struct mwl8k_cmd_pkt header;
55489b6e
LB		 3133 __le32 sleep_interval; /* Number of beacon periods to sleep */
3134 __u8 beacon_data[MWL8K_FJ_BEACON_MAXLEN];
ba2d3587 3135} __packed;
a66098da 3136
55489b6e
LB		 3137static int mwl8k_cmd_finalize_join(struct ieee80211_hw *hw, void *frame,
3138 int framelen, int dtim)
a66098da 3139{
55489b6e
LB		 3140 struct mwl8k_cmd_finalize_join *cmd;
3141 struct ieee80211_mgmt *payload = frame;
3142 int payload_len;
a66098da
LB		 3143 int rc;
3144
3145 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3146 if (cmd == NULL)
3147 return -ENOMEM;
3148
55489b6e 3149 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_FINALIZE_JOIN);
a66098da 3150 cmd->header.length = cpu_to_le16(sizeof(*cmd));
55489b6e
LB		 3151 cmd->sleep_interval = cpu_to_le32(dtim ? dtim : 1);
3152
3153 payload_len = framelen - ieee80211_hdrlen(payload->frame_control);
3154 if (payload_len < 0)
3155 payload_len = 0;
3156 else if (payload_len > MWL8K_FJ_BEACON_MAXLEN)
3157 payload_len = MWL8K_FJ_BEACON_MAXLEN;
3158
3159 memcpy(cmd->beacon_data, &payload->u.beacon, payload_len);
a66098da
LB		 3160
3161 rc = mwl8k_post_cmd(hw, &cmd->header);
3162 kfree(cmd);
3163
3164 return rc;
3165}
3166
3167/*
55489b6e 3168 * CMD_SET_RTS_THRESHOLD.
a66098da 3169 */
55489b6e 3170struct mwl8k_cmd_set_rts_threshold {
a66098da
LB		 3171 struct mwl8k_cmd_pkt header;
3172 __le16 action;
55489b6e 3173 __le16 threshold;
ba2d3587 3174} __packed;
a66098da 3175
c2c2b12a
LB		 3176static int
3177mwl8k_cmd_set_rts_threshold(struct ieee80211_hw *hw, int rts_thresh)
a66098da 3178{
55489b6e 3179 struct mwl8k_cmd_set_rts_threshold *cmd;
a66098da
LB		 3180 int rc;
3181
3182 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3183 if (cmd == NULL)
3184 return -ENOMEM;
3185
55489b6e 3186 cmd->header.code = cpu_to_le16(MWL8K_CMD_RTS_THRESHOLD);
a66098da 3187 cmd->header.length = cpu_to_le16(sizeof(*cmd));
c2c2b12a
LB		 3188 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
3189 cmd->threshold = cpu_to_le16(rts_thresh);
a66098da
LB		 3190
3191 rc = mwl8k_post_cmd(hw, &cmd->header);
3192 kfree(cmd);
3193
a66098da
LB		 3194 return rc;
3195}
3196
3197/*
55489b6e 3198 * CMD_SET_SLOT.
a66098da 3199 */
55489b6e 3200struct mwl8k_cmd_set_slot {
a66098da
LB		 3201 struct mwl8k_cmd_pkt header;
3202 __le16 action;
55489b6e 3203 __u8 short_slot;
ba2d3587 3204} __packed;
a66098da 3205
55489b6e 3206static int mwl8k_cmd_set_slot(struct ieee80211_hw *hw, bool short_slot_time)
a66098da 3207{
55489b6e 3208 struct mwl8k_cmd_set_slot *cmd;
a66098da
LB		 3209 int rc;
3210
3211 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3212 if (cmd == NULL)
3213 return -ENOMEM;
3214
55489b6e 3215 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_SLOT);
a66098da 3216 cmd->header.length = cpu_to_le16(sizeof(*cmd));
55489b6e
LB		 3217 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
3218 cmd->short_slot = short_slot_time;
a66098da
LB		 3219
3220 rc = mwl8k_post_cmd(hw, &cmd->header);
3221 kfree(cmd);
3222
3223 return rc;
3224}
3225
3226/*
3227 * CMD_SET_EDCA_PARAMS.
3228 */
3229struct mwl8k_cmd_set_edca_params {
3230 struct mwl8k_cmd_pkt header;
3231
3232 /* See MWL8K_SET_EDCA_XXX below */
3233 __le16 action;
3234
3235 /* TX opportunity in units of 32 us */
3236 __le16 txop;
3237
2e484c89
LB		 3238 union {
3239 struct {
3240 /* Log exponent of max contention period: 0...15 */
3241 __le32 log_cw_max;
3242
3243 /* Log exponent of min contention period: 0...15 */
3244 __le32 log_cw_min;
3245
3246 /* Adaptive interframe spacing in units of 32us */
3247 __u8 aifs;
3248
3249 /* TX queue to configure */
3250 __u8 txq;
3251 } ap;
3252 struct {
3253 /* Log exponent of max contention period: 0...15 */
3254 __u8 log_cw_max;
a66098da 3255
2e484c89
LB		 3256 /* Log exponent of min contention period: 0...15 */
3257 __u8 log_cw_min;
a66098da 3258
2e484c89
LB		 3259 /* Adaptive interframe spacing in units of 32us */
3260 __u8 aifs;
a66098da 3261
2e484c89
LB		 3262 /* TX queue to configure */
3263 __u8 txq;
3264 } sta;
3265 };
ba2d3587 3266} __packed;
a66098da 3267
a66098da
LB		 3268#define MWL8K_SET_EDCA_CW 0x01
3269#define MWL8K_SET_EDCA_TXOP 0x02
3270#define MWL8K_SET_EDCA_AIFS 0x04
3271
3272#define MWL8K_SET_EDCA_ALL (MWL8K_SET_EDCA_CW | \
3273 MWL8K_SET_EDCA_TXOP | \
3274 MWL8K_SET_EDCA_AIFS)
3275
3276static int
55489b6e
LB		 3277mwl8k_cmd_set_edca_params(struct ieee80211_hw *hw, __u8 qnum,
3278 __u16 cw_min, __u16 cw_max,
3279 __u8 aifs, __u16 txop)
a66098da 3280{
2e484c89 3281 struct mwl8k_priv *priv = hw->priv;
a66098da 3282 struct mwl8k_cmd_set_edca_params *cmd;
a66098da
LB		 3283 int rc;
3284
3285 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3286 if (cmd == NULL)
3287 return -ENOMEM;
3288
a66098da
LB		 3289 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_EDCA_PARAMS);
3290 cmd->header.length = cpu_to_le16(sizeof(*cmd));
a66098da
LB		 3291 cmd->action = cpu_to_le16(MWL8K_SET_EDCA_ALL);
3292 cmd->txop = cpu_to_le16(txop);
2e484c89
LB		 3293 if (priv->ap_fw) {
3294 cmd->ap.log_cw_max = cpu_to_le32(ilog2(cw_max + 1));
3295 cmd->ap.log_cw_min = cpu_to_le32(ilog2(cw_min + 1));
3296 cmd->ap.aifs = aifs;
3297 cmd->ap.txq = qnum;
3298 } else {
3299 cmd->sta.log_cw_max = (u8)ilog2(cw_max + 1);
3300 cmd->sta.log_cw_min = (u8)ilog2(cw_min + 1);
3301 cmd->sta.aifs = aifs;
3302 cmd->sta.txq = qnum;
3303 }
a66098da
LB		 3304
3305 rc = mwl8k_post_cmd(hw, &cmd->header);
3306 kfree(cmd);
3307
3308 return rc;
3309}
3310
3311/*
55489b6e 3312 * CMD_SET_WMM_MODE.
a66098da 3313 */
55489b6e 3314struct mwl8k_cmd_set_wmm_mode {
a66098da 3315 struct mwl8k_cmd_pkt header;
55489b6e 3316 __le16 action;
ba2d3587 3317} __packed;
a66098da 3318
55489b6e 3319static int mwl8k_cmd_set_wmm_mode(struct ieee80211_hw *hw, bool enable)
a66098da 3320{
55489b6e
LB		 3321 struct mwl8k_priv *priv = hw->priv;
3322 struct mwl8k_cmd_set_wmm_mode *cmd;
a66098da
LB		 3323 int rc;
3324
a66098da
LB		 3325 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3326 if (cmd == NULL)
3327 return -ENOMEM;
3328
55489b6e 3329 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_WMM_MODE);
a66098da 3330 cmd->header.length = cpu_to_le16(sizeof(*cmd));
55489b6e 3331 cmd->action = cpu_to_le16(!!enable);
a66098da
LB		 3332
3333 rc = mwl8k_post_cmd(hw, &cmd->header);
3334 kfree(cmd);
16cec43d 3335
55489b6e
LB		 3336 if (!rc)
3337 priv->wmm_enabled = enable;
a66098da
LB		 3338
3339 return rc;
3340}
3341
3342/*
55489b6e 3343 * CMD_MIMO_CONFIG.
a66098da 3344 */
55489b6e
LB		 3345struct mwl8k_cmd_mimo_config {
3346 struct mwl8k_cmd_pkt header;
3347 __le32 action;
3348 __u8 rx_antenna_map;
3349 __u8 tx_antenna_map;
ba2d3587 3350} __packed;
a66098da 3351
55489b6e 3352static int mwl8k_cmd_mimo_config(struct ieee80211_hw *hw, __u8 rx, __u8 tx)
a66098da 3353{
55489b6e 3354 struct mwl8k_cmd_mimo_config *cmd;
a66098da
LB		 3355 int rc;
3356
3357 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3358 if (cmd == NULL)
3359 return -ENOMEM;
3360
55489b6e 3361 cmd->header.code = cpu_to_le16(MWL8K_CMD_MIMO_CONFIG);
a66098da 3362 cmd->header.length = cpu_to_le16(sizeof(*cmd));
55489b6e
LB		 3363 cmd->action = cpu_to_le32((u32)MWL8K_CMD_SET);
3364 cmd->rx_antenna_map = rx;
3365 cmd->tx_antenna_map = tx;
a66098da
LB		 3366
3367 rc = mwl8k_post_cmd(hw, &cmd->header);
3368 kfree(cmd);
3369
3370 return rc;
3371}
3372
3373/*
b71ed2c6 3374 * CMD_USE_FIXED_RATE (STA version).
a66098da 3375 */
b71ed2c6
LB		 3376struct mwl8k_cmd_use_fixed_rate_sta {
3377 struct mwl8k_cmd_pkt header;
3378 __le32 action;
3379 __le32 allow_rate_drop;
3380 __le32 num_rates;
3381 struct {
3382 __le32 is_ht_rate;
3383 __le32 enable_retry;
3384 __le32 rate;
3385 __le32 retry_count;
3386 } rate_entry[8];
3387 __le32 rate_type;
3388 __le32 reserved1;
3389 __le32 reserved2;
ba2d3587 3390} __packed;
a66098da 3391
b71ed2c6
LB		 3392#define MWL8K_USE_AUTO_RATE 0x0002
3393#define MWL8K_UCAST_RATE 0
a66098da 3394
b71ed2c6 3395static int mwl8k_cmd_use_fixed_rate_sta(struct ieee80211_hw *hw)
a66098da 3396{
b71ed2c6 3397 struct mwl8k_cmd_use_fixed_rate_sta *cmd;
a66098da
LB		 3398 int rc;
3399
3400 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3401 if (cmd == NULL)
3402 return -ENOMEM;
3403
3404 cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
3405 cmd->header.length = cpu_to_le16(sizeof(*cmd));
b71ed2c6
LB		 3406 cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE);
3407 cmd->rate_type = cpu_to_le32(MWL8K_UCAST_RATE);
a66098da
LB		 3408
3409 rc = mwl8k_post_cmd(hw, &cmd->header);
3410 kfree(cmd);
3411
3412 return rc;
3413}
3414
088aab8b
LB		 3415/*
3416 * CMD_USE_FIXED_RATE (AP version).
3417 */
3418struct mwl8k_cmd_use_fixed_rate_ap {
3419 struct mwl8k_cmd_pkt header;
3420 __le32 action;
3421 __le32 allow_rate_drop;
3422 __le32 num_rates;
3423 struct mwl8k_rate_entry_ap {
3424 __le32 is_ht_rate;
3425 __le32 enable_retry;
3426 __le32 rate;
3427 __le32 retry_count;
3428 } rate_entry[4];
3429 u8 multicast_rate;
3430 u8 multicast_rate_type;
3431 u8 management_rate;
ba2d3587 3432} __packed;
088aab8b
LB		 3433
3434static int
3435mwl8k_cmd_use_fixed_rate_ap(struct ieee80211_hw *hw, int mcast, int mgmt)
3436{
3437 struct mwl8k_cmd_use_fixed_rate_ap *cmd;
3438 int rc;
3439
3440 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3441 if (cmd == NULL)
3442 return -ENOMEM;
3443
3444 cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
3445 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3446 cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE);
3447 cmd->multicast_rate = mcast;
3448 cmd->management_rate = mgmt;
3449
3450 rc = mwl8k_post_cmd(hw, &cmd->header);
3451 kfree(cmd);
3452
3453 return rc;
3454}
3455
55489b6e
LB		 3456/*
3457 * CMD_ENABLE_SNIFFER.
3458 */
3459struct mwl8k_cmd_enable_sniffer {
3460 struct mwl8k_cmd_pkt header;
3461 __le32 action;
ba2d3587 3462} __packed;
55489b6e
LB		 3463
3464static int mwl8k_cmd_enable_sniffer(struct ieee80211_hw *hw, bool enable)
3465{
3466 struct mwl8k_cmd_enable_sniffer *cmd;
3467 int rc;
3468
3469 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3470 if (cmd == NULL)
3471 return -ENOMEM;
3472
3473 cmd->header.code = cpu_to_le16(MWL8K_CMD_ENABLE_SNIFFER);
3474 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3475 cmd->action = cpu_to_le32(!!enable);
3476
3477 rc = mwl8k_post_cmd(hw, &cmd->header);
3478 kfree(cmd);
3479
3480 return rc;
3481}
3482
197a4e4e 3483struct mwl8k_cmd_update_mac_addr {
55489b6e
LB		 3484 struct mwl8k_cmd_pkt header;
3485 union {
3486 struct {
3487 __le16 mac_type;
3488 __u8 mac_addr[ETH_ALEN];
3489 } mbss;
3490 __u8 mac_addr[ETH_ALEN];
3491 };
ba2d3587 3492} __packed;
55489b6e 3493
ee0ddf18
LB		 3494#define MWL8K_MAC_TYPE_PRIMARY_CLIENT 0
3495#define MWL8K_MAC_TYPE_SECONDARY_CLIENT 1
3496#define MWL8K_MAC_TYPE_PRIMARY_AP 2
3497#define MWL8K_MAC_TYPE_SECONDARY_AP 3
a9e00b15 3498
197a4e4e
YAP		 3499static int mwl8k_cmd_update_mac_addr(struct ieee80211_hw *hw,
3500 struct ieee80211_vif *vif, u8 *mac, bool set)
55489b6e
LB		 3501{
3502 struct mwl8k_priv *priv = hw->priv;
ee0ddf18 3503 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
197a4e4e 3504 struct mwl8k_cmd_update_mac_addr *cmd;
ee0ddf18 3505 int mac_type;
55489b6e
LB		 3506 int rc;
3507
ee0ddf18
LB		 3508 mac_type = MWL8K_MAC_TYPE_PRIMARY_AP;
3509 if (vif != NULL && vif->type == NL80211_IFTYPE_STATION) {
3510 if (mwl8k_vif->macid + 1 == ffs(priv->sta_macids_supported))
3511 mac_type = MWL8K_MAC_TYPE_PRIMARY_CLIENT;
3512 else
3513 mac_type = MWL8K_MAC_TYPE_SECONDARY_CLIENT;
3514 } else if (vif != NULL && vif->type == NL80211_IFTYPE_AP) {
3515 if (mwl8k_vif->macid + 1 == ffs(priv->ap_macids_supported))
3516 mac_type = MWL8K_MAC_TYPE_PRIMARY_AP;
3517 else
3518 mac_type = MWL8K_MAC_TYPE_SECONDARY_AP;
3519 }
3520
55489b6e
LB		 3521 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3522 if (cmd == NULL)
3523 return -ENOMEM;
3524
197a4e4e
YAP		 3525 if (set)
3526 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_MAC_ADDR);
3527 else
3528 cmd->header.code = cpu_to_le16(MWL8K_CMD_DEL_MAC_ADDR);
3529
55489b6e
LB		 3530 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3531 if (priv->ap_fw) {
ee0ddf18 3532 cmd->mbss.mac_type = cpu_to_le16(mac_type);
55489b6e
LB		 3533 memcpy(cmd->mbss.mac_addr, mac, ETH_ALEN);
3534 } else {
3535 memcpy(cmd->mac_addr, mac, ETH_ALEN);
3536 }
3537
aa21d0f6 3538 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
55489b6e
LB		 3539 kfree(cmd);
3540
3541 return rc;
3542}
3543
197a4e4e
YAP		 3544/*
3545 * MWL8K_CMD_SET_MAC_ADDR.
3546 */
3547static inline int mwl8k_cmd_set_mac_addr(struct ieee80211_hw *hw,
3548 struct ieee80211_vif *vif, u8 *mac)
3549{
3550 return mwl8k_cmd_update_mac_addr(hw, vif, mac, true);
3551}
3552
3553/*
3554 * MWL8K_CMD_DEL_MAC_ADDR.
3555 */
3556static inline int mwl8k_cmd_del_mac_addr(struct ieee80211_hw *hw,
3557 struct ieee80211_vif *vif, u8 *mac)
3558{
3559 return mwl8k_cmd_update_mac_addr(hw, vif, mac, false);
3560}
3561
55489b6e
LB		 3562/*
3563 * CMD_SET_RATEADAPT_MODE.
3564 */
3565struct mwl8k_cmd_set_rate_adapt_mode {
3566 struct mwl8k_cmd_pkt header;
3567 __le16 action;
3568 __le16 mode;
ba2d3587 3569} __packed;
55489b6e
LB		 3570
3571static int mwl8k_cmd_set_rateadapt_mode(struct ieee80211_hw *hw, __u16 mode)
3572{
3573 struct mwl8k_cmd_set_rate_adapt_mode *cmd;
3574 int rc;
3575
3576 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3577 if (cmd == NULL)
3578 return -ENOMEM;
3579
3580 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATEADAPT_MODE);
3581 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3582 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
3583 cmd->mode = cpu_to_le16(mode);
3584
3585 rc = mwl8k_post_cmd(hw, &cmd->header);
3586 kfree(cmd);
3587
3588 return rc;
3589}
3590
3aefc37e
NS		 3591/*
3592 * CMD_GET_WATCHDOG_BITMAP.
3593 */
3594struct mwl8k_cmd_get_watchdog_bitmap {
3595 struct mwl8k_cmd_pkt header;
3596 u8 bitmap;
3597} __packed;
3598
3599static int mwl8k_cmd_get_watchdog_bitmap(struct ieee80211_hw *hw, u8 *bitmap)
3600{
3601 struct mwl8k_cmd_get_watchdog_bitmap *cmd;
3602 int rc;
3603
3604 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3605 if (cmd == NULL)
3606 return -ENOMEM;
3607
3608 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_WATCHDOG_BITMAP);
3609 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3610
3611 rc = mwl8k_post_cmd(hw, &cmd->header);
3612 if (!rc)
3613 *bitmap = cmd->bitmap;
3614
3615 kfree(cmd);
3616
3617 return rc;
3618}
3619
cfacba12
YAP		 3620#define MWL8K_WMM_QUEUE_NUMBER 3
3621
3622static void mwl8k_destroy_ba(struct ieee80211_hw *hw,
3623 u8 idx);
3624
3aefc37e
NS		 3625static void mwl8k_watchdog_ba_events(struct work_struct *work)
3626{
3627 int rc;
3628 u8 bitmap = 0, stream_index;
3629 struct mwl8k_ampdu_stream *streams;
3630 struct mwl8k_priv *priv =
3631 container_of(work, struct mwl8k_priv, watchdog_ba_handle);
cfacba12
YAP		 3632 struct ieee80211_hw *hw = priv->hw;
3633 int i;
3634 u32 status = 0;
3635
3636 mwl8k_fw_lock(hw);
3aefc37e
NS		 3637
3638 rc = mwl8k_cmd_get_watchdog_bitmap(priv->hw, &bitmap);
3639 if (rc)
cfacba12 3640 goto done;
3aefc37e 3641
cfacba12 3642 spin_lock(&priv->stream_lock);
3aefc37e
NS		 3643
3644 /* the bitmap is the hw queue number. Map it to the ampdu queue. */
cfacba12
YAP		 3645 for (i = 0; i < TOTAL_HW_TX_QUEUES; i++) {
3646 if (bitmap & (1 << i)) {
3647 stream_index = (i + MWL8K_WMM_QUEUE_NUMBER) %
3648 TOTAL_HW_TX_QUEUES;
3649 streams = &priv->ampdu[stream_index];
3650 if (streams->state == AMPDU_STREAM_ACTIVE) {
3651 ieee80211_stop_tx_ba_session(streams->sta,
3652 streams->tid);
3653 spin_unlock(&priv->stream_lock);
3654 mwl8k_destroy_ba(hw, stream_index);
3655 spin_lock(&priv->stream_lock);
3656 }
3657 }
3658 }
3aefc37e 3659
cfacba12
YAP		 3660 spin_unlock(&priv->stream_lock);
3661done:
c27a54d3 3662 atomic_dec(&priv->watchdog_event_pending);
cfacba12
YAP		 3663 status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
3664 iowrite32((status | MWL8K_A2H_INT_BA_WATCHDOG),
3665 priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
3666 mwl8k_fw_unlock(hw);
3aefc37e
NS		 3667 return;
3668}
3669
3670
b64fe619
LB		 3671/*
3672 * CMD_BSS_START.
3673 */
3674struct mwl8k_cmd_bss_start {
3675 struct mwl8k_cmd_pkt header;
3676 __le32 enable;
ba2d3587 3677} __packed;
b64fe619 3678
aa21d0f6
LB		 3679static int mwl8k_cmd_bss_start(struct ieee80211_hw *hw,
3680 struct ieee80211_vif *vif, int enable)
b64fe619
LB		 3681{
3682 struct mwl8k_cmd_bss_start *cmd;
3683 int rc;
3684
3685 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3686 if (cmd == NULL)
3687 return -ENOMEM;
3688
3689 cmd->header.code = cpu_to_le16(MWL8K_CMD_BSS_START);
3690 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3691 cmd->enable = cpu_to_le32(enable);
3692
aa21d0f6 3693 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
b64fe619
LB		 3694 kfree(cmd);
3695
3696 return rc;
3697}
3698
5faa1aff
NS		 3699/*
3700 * CMD_BASTREAM.
3701 */
3702
3703/*
3704 * UPSTREAM is tx direction
3705 */
3706#define BASTREAM_FLAG_DIRECTION_UPSTREAM 0x00
3707#define BASTREAM_FLAG_IMMEDIATE_TYPE 0x01
3708
ba30c4a5 3709enum ba_stream_action_type {
5faa1aff
NS		 3710 MWL8K_BA_CREATE,
3711 MWL8K_BA_UPDATE,
3712 MWL8K_BA_DESTROY,
3713 MWL8K_BA_FLUSH,
3714 MWL8K_BA_CHECK,
ba30c4a5 3715};
5faa1aff
NS		 3716
3717
3718struct mwl8k_create_ba_stream {
3719 __le32 flags;
3720 __le32 idle_thrs;
3721 __le32 bar_thrs;
3722 __le32 window_size;
3723 u8 peer_mac_addr[6];
3724 u8 dialog_token;
3725 u8 tid;
3726 u8 queue_id;
3727 u8 param_info;
3728 __le32 ba_context;
3729 u8 reset_seq_no_flag;
3730 __le16 curr_seq_no;
3731 u8 sta_src_mac_addr[6];
3732} __packed;
3733
3734struct mwl8k_destroy_ba_stream {
3735 __le32 flags;
3736 __le32 ba_context;
3737} __packed;
3738
3739struct mwl8k_cmd_bastream {
3740 struct mwl8k_cmd_pkt header;
3741 __le32 action;
3742 union {
3743 struct mwl8k_create_ba_stream create_params;
3744 struct mwl8k_destroy_ba_stream destroy_params;
3745 };
3746} __packed;
3747
3748static int
f95275c4
YAP		 3749mwl8k_check_ba(struct ieee80211_hw *hw, struct mwl8k_ampdu_stream *stream,
3750 struct ieee80211_vif *vif)
5faa1aff
NS		 3751{
3752 struct mwl8k_cmd_bastream *cmd;
3753 int rc;
3754
3755 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3756 if (cmd == NULL)
3757 return -ENOMEM;
3758
3759 cmd->header.code = cpu_to_le16(MWL8K_CMD_BASTREAM);
3760 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3761
3762 cmd->action = cpu_to_le32(MWL8K_BA_CHECK);
3763
3764 cmd->create_params.queue_id = stream->idx;
3765 memcpy(&cmd->create_params.peer_mac_addr[0], stream->sta->addr,
3766 ETH_ALEN);
3767 cmd->create_params.tid = stream->tid;
3768
3769 cmd->create_params.flags =
3770 cpu_to_le32(BASTREAM_FLAG_IMMEDIATE_TYPE) |
3771 cpu_to_le32(BASTREAM_FLAG_DIRECTION_UPSTREAM);
3772
f95275c4 3773 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
5faa1aff
NS		 3774
3775 kfree(cmd);
3776
3777 return rc;
3778}
3779
3780static int
3781mwl8k_create_ba(struct ieee80211_hw *hw, struct mwl8k_ampdu_stream *stream,
f95275c4 3782 u8 buf_size, struct ieee80211_vif *vif)
5faa1aff
NS		 3783{
3784 struct mwl8k_cmd_bastream *cmd;
3785 int rc;
3786
3787 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3788 if (cmd == NULL)
3789 return -ENOMEM;
3790
3791
3792 cmd->header.code = cpu_to_le16(MWL8K_CMD_BASTREAM);
3793 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3794
3795 cmd->action = cpu_to_le32(MWL8K_BA_CREATE);
3796
3797 cmd->create_params.bar_thrs = cpu_to_le32((u32)buf_size);
3798 cmd->create_params.window_size = cpu_to_le32((u32)buf_size);
3799 cmd->create_params.queue_id = stream->idx;
3800
3801 memcpy(cmd->create_params.peer_mac_addr, stream->sta->addr, ETH_ALEN);
3802 cmd->create_params.tid = stream->tid;
3803 cmd->create_params.curr_seq_no = cpu_to_le16(0);
3804 cmd->create_params.reset_seq_no_flag = 1;
3805
3806 cmd->create_params.param_info =
3807 (stream->sta->ht_cap.ampdu_factor &
3808 IEEE80211_HT_AMPDU_PARM_FACTOR) |
3809 ((stream->sta->ht_cap.ampdu_density << 2) &
3810 IEEE80211_HT_AMPDU_PARM_DENSITY);
3811
3812 cmd->create_params.flags =
3813 cpu_to_le32(BASTREAM_FLAG_IMMEDIATE_TYPE |
3814 BASTREAM_FLAG_DIRECTION_UPSTREAM);
3815
f95275c4 3816 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
5faa1aff
NS		 3817
3818 wiphy_debug(hw->wiphy, "Created a BA stream for %pM : tid %d\n",
3819 stream->sta->addr, stream->tid);
3820 kfree(cmd);
3821
3822 return rc;
3823}
3824
3825static void mwl8k_destroy_ba(struct ieee80211_hw *hw,
07f6dda1 3826 u8 idx)
5faa1aff
NS		 3827{
3828 struct mwl8k_cmd_bastream *cmd;
3829
3830 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3831 if (cmd == NULL)
3832 return;
3833
3834 cmd->header.code = cpu_to_le16(MWL8K_CMD_BASTREAM);
3835 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3836 cmd->action = cpu_to_le32(MWL8K_BA_DESTROY);
3837
07f6dda1 3838 cmd->destroy_params.ba_context = cpu_to_le32(idx);
5faa1aff
NS		 3839 mwl8k_post_cmd(hw, &cmd->header);
3840
07f6dda1 3841 wiphy_debug(hw->wiphy, "Deleted BA stream index %d\n", idx);
5faa1aff
NS		 3842
3843 kfree(cmd);
3844}
3845
3f5610ff
LB		 3846/*
3847 * CMD_SET_NEW_STN.
3848 */
3849struct mwl8k_cmd_set_new_stn {
3850 struct mwl8k_cmd_pkt header;
3851 __le16 aid;
3852 __u8 mac_addr[6];
3853 __le16 stn_id;
3854 __le16 action;
3855 __le16 rsvd;
3856 __le32 legacy_rates;
3857 __u8 ht_rates[4];
3858 __le16 cap_info;
3859 __le16 ht_capabilities_info;
3860 __u8 mac_ht_param_info;
3861 __u8 rev;
3862 __u8 control_channel;
3863 __u8 add_channel;
3864 __le16 op_mode;
3865 __le16 stbc;
3866 __u8 add_qos_info;
3867 __u8 is_qos_sta;
3868 __le32 fw_sta_ptr;
ba2d3587 3869} __packed;
3f5610ff
LB		 3870
3871#define MWL8K_STA_ACTION_ADD 0
3872#define MWL8K_STA_ACTION_REMOVE 2
3873
3874static int mwl8k_cmd_set_new_stn_add(struct ieee80211_hw *hw,
3875 struct ieee80211_vif *vif,
3876 struct ieee80211_sta *sta)
3877{
3878 struct mwl8k_cmd_set_new_stn *cmd;
8707d026 3879 u32 rates;
3f5610ff
LB		 3880 int rc;
3881
3882 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3883 if (cmd == NULL)
3884 return -ENOMEM;
3885
3886 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
3887 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3888 cmd->aid = cpu_to_le16(sta->aid);
3889 memcpy(cmd->mac_addr, sta->addr, ETH_ALEN);
3890 cmd->stn_id = cpu_to_le16(sta->aid);
3891 cmd->action = cpu_to_le16(MWL8K_STA_ACTION_ADD);
8707d026
LB		 3892 if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
3893 rates = sta->supp_rates[IEEE80211_BAND_2GHZ];
3894 else
3895 rates = sta->supp_rates[IEEE80211_BAND_5GHZ] << 5;
3896 cmd->legacy_rates = cpu_to_le32(rates);
3f5610ff
LB		 3897 if (sta->ht_cap.ht_supported) {
3898 cmd->ht_rates[0] = sta->ht_cap.mcs.rx_mask[0];
3899 cmd->ht_rates[1] = sta->ht_cap.mcs.rx_mask[1];
3900 cmd->ht_rates[2] = sta->ht_cap.mcs.rx_mask[2];
3901 cmd->ht_rates[3] = sta->ht_cap.mcs.rx_mask[3];
3902 cmd->ht_capabilities_info = cpu_to_le16(sta->ht_cap.cap);
3903 cmd->mac_ht_param_info = (sta->ht_cap.ampdu_factor & 3) |
3904 ((sta->ht_cap.ampdu_density & 7) << 2);
3905 cmd->is_qos_sta = 1;
3906 }
3907
aa21d0f6 3908 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
3f5610ff
LB		 3909 kfree(cmd);
3910
3911 return rc;
3912}
3913
b64fe619
LB		 3914static int mwl8k_cmd_set_new_stn_add_self(struct ieee80211_hw *hw,
3915 struct ieee80211_vif *vif)
3916{
3917 struct mwl8k_cmd_set_new_stn *cmd;
3918 int rc;
3919
3920 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3921 if (cmd == NULL)
3922 return -ENOMEM;
3923
3924 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
3925 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3926 memcpy(cmd->mac_addr, vif->addr, ETH_ALEN);
3927
aa21d0f6 3928 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
b64fe619
LB		 3929 kfree(cmd);
3930
3931 return rc;
3932}
3933
3f5610ff
LB		 3934static int mwl8k_cmd_set_new_stn_del(struct ieee80211_hw *hw,
3935 struct ieee80211_vif *vif, u8 *addr)
3936{
3937 struct mwl8k_cmd_set_new_stn *cmd;
0dd13a48
YAP		 3938 struct mwl8k_priv *priv = hw->priv;
3939 int rc, i;
3940 u8 idx;
3941
3942 spin_lock(&priv->stream_lock);
3943 /* Destroy any active ampdu streams for this sta */
3944 for (i = 0; i < MWL8K_NUM_AMPDU_STREAMS; i++) {
3945 struct mwl8k_ampdu_stream *s;
3946 s = &priv->ampdu[i];
3947 if (s->state != AMPDU_NO_STREAM) {
3948 if (memcmp(s->sta->addr, addr, ETH_ALEN) == 0) {
3949 if (s->state == AMPDU_STREAM_ACTIVE) {
3950 idx = s->idx;
3951 spin_unlock(&priv->stream_lock);
3952 mwl8k_destroy_ba(hw, idx);
3953 spin_lock(&priv->stream_lock);
3954 } else if (s->state == AMPDU_STREAM_NEW) {
3955 mwl8k_remove_stream(hw, s);
3956 }
3957 }
3958 }
3959 }
3960
3961 spin_unlock(&priv->stream_lock);
3f5610ff
LB		 3962
3963 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3964 if (cmd == NULL)
3965 return -ENOMEM;
3966
3967 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
3968 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3969 memcpy(cmd->mac_addr, addr, ETH_ALEN);
3970 cmd->action = cpu_to_le16(MWL8K_STA_ACTION_REMOVE);
3971
aa21d0f6 3972 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
3f5610ff
LB		 3973 kfree(cmd);
3974
3975 return rc;
3976}
3977
fcdc403c
NS		 3978/*
3979 * CMD_UPDATE_ENCRYPTION.
3980 */
3981
3982#define MAX_ENCR_KEY_LENGTH 16
3983#define MIC_KEY_LENGTH 8
3984
3985struct mwl8k_cmd_update_encryption {
3986 struct mwl8k_cmd_pkt header;
3987
3988 __le32 action;
3989 __le32 reserved;
3990 __u8 mac_addr[6];
3991 __u8 encr_type;
3992
ba30c4a5 3993} __packed;
fcdc403c
NS		 3994
3995struct mwl8k_cmd_set_key {
3996 struct mwl8k_cmd_pkt header;
3997
3998 __le32 action;
3999 __le32 reserved;
4000 __le16 length;
4001 __le16 key_type_id;
4002 __le32 key_info;
4003 __le32 key_id;
4004 __le16 key_len;
4005 __u8 key_material[MAX_ENCR_KEY_LENGTH];
4006 __u8 tkip_tx_mic_key[MIC_KEY_LENGTH];
4007 __u8 tkip_rx_mic_key[MIC_KEY_LENGTH];
4008 __le16 tkip_rsc_low;
4009 __le32 tkip_rsc_high;
4010 __le16 tkip_tsc_low;
4011 __le32 tkip_tsc_high;
4012 __u8 mac_addr[6];
ba30c4a5 4013} __packed;
fcdc403c
NS		 4014
4015enum {
4016 MWL8K_ENCR_ENABLE,
4017 MWL8K_ENCR_SET_KEY,
4018 MWL8K_ENCR_REMOVE_KEY,
4019 MWL8K_ENCR_SET_GROUP_KEY,
4020};
4021
4022#define MWL8K_UPDATE_ENCRYPTION_TYPE_WEP 0
4023#define MWL8K_UPDATE_ENCRYPTION_TYPE_DISABLE 1
4024#define MWL8K_UPDATE_ENCRYPTION_TYPE_TKIP 4
4025#define MWL8K_UPDATE_ENCRYPTION_TYPE_MIXED 7
4026#define MWL8K_UPDATE_ENCRYPTION_TYPE_AES 8
4027
4028enum {
4029 MWL8K_ALG_WEP,
4030 MWL8K_ALG_TKIP,
4031 MWL8K_ALG_CCMP,
4032};
4033
4034#define MWL8K_KEY_FLAG_TXGROUPKEY 0x00000004
4035#define MWL8K_KEY_FLAG_PAIRWISE 0x00000008
4036#define MWL8K_KEY_FLAG_TSC_VALID 0x00000040
4037#define MWL8K_KEY_FLAG_WEP_TXKEY 0x01000000
4038#define MWL8K_KEY_FLAG_MICKEY_VALID 0x02000000
4039
4040static int mwl8k_cmd_update_encryption_enable(struct ieee80211_hw *hw,
4041 struct ieee80211_vif *vif,
4042 u8 *addr,
4043 u8 encr_type)
4044{
4045 struct mwl8k_cmd_update_encryption *cmd;
4046 int rc;
4047
4048 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
4049 if (cmd == NULL)
4050 return -ENOMEM;
4051
4052 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_ENCRYPTION);
4053 cmd->header.length = cpu_to_le16(sizeof(*cmd));
4054 cmd->action = cpu_to_le32(MWL8K_ENCR_ENABLE);
4055 memcpy(cmd->mac_addr, addr, ETH_ALEN);
4056 cmd->encr_type = encr_type;
4057
4058 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
4059 kfree(cmd);
4060
4061 return rc;
4062}
4063
4064static int mwl8k_encryption_set_cmd_info(struct mwl8k_cmd_set_key *cmd,
4065 u8 *addr,
4066 struct ieee80211_key_conf *key)
4067{
4068 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_ENCRYPTION);
4069 cmd->header.length = cpu_to_le16(sizeof(*cmd));
4070 cmd->length = cpu_to_le16(sizeof(*cmd) -
4071 offsetof(struct mwl8k_cmd_set_key, length));
4072 cmd->key_id = cpu_to_le32(key->keyidx);
4073 cmd->key_len = cpu_to_le16(key->keylen);
4074 memcpy(cmd->mac_addr, addr, ETH_ALEN);
4075
4076 switch (key->cipher) {
4077 case WLAN_CIPHER_SUITE_WEP40:
4078 case WLAN_CIPHER_SUITE_WEP104:
4079 cmd->key_type_id = cpu_to_le16(MWL8K_ALG_WEP);
4080 if (key->keyidx == 0)
4081 cmd->key_info = cpu_to_le32(MWL8K_KEY_FLAG_WEP_TXKEY);
4082
4083 break;
4084 case WLAN_CIPHER_SUITE_TKIP:
4085 cmd->key_type_id = cpu_to_le16(MWL8K_ALG_TKIP);
4086 cmd->key_info = (key->flags & IEEE80211_KEY_FLAG_PAIRWISE)
4087 ? cpu_to_le32(MWL8K_KEY_FLAG_PAIRWISE)
4088 : cpu_to_le32(MWL8K_KEY_FLAG_TXGROUPKEY);
4089 cmd->key_info |= cpu_to_le32(MWL8K_KEY_FLAG_MICKEY_VALID
4090 | MWL8K_KEY_FLAG_TSC_VALID);
4091 break;
4092 case WLAN_CIPHER_SUITE_CCMP:
4093 cmd->key_type_id = cpu_to_le16(MWL8K_ALG_CCMP);
4094 cmd->key_info = (key->flags & IEEE80211_KEY_FLAG_PAIRWISE)
4095 ? cpu_to_le32(MWL8K_KEY_FLAG_PAIRWISE)
4096 : cpu_to_le32(MWL8K_KEY_FLAG_TXGROUPKEY);
4097 break;
4098 default:
4099 return -ENOTSUPP;
4100 }
4101
4102 return 0;
4103}
4104
4105static int mwl8k_cmd_encryption_set_key(struct ieee80211_hw *hw,
4106 struct ieee80211_vif *vif,
4107 u8 *addr,
4108 struct ieee80211_key_conf *key)
4109{
4110 struct mwl8k_cmd_set_key *cmd;
4111 int rc;
4112 int keymlen;
4113 u32 action;
4114 u8 idx;
4115 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
4116
4117 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
4118 if (cmd == NULL)
4119 return -ENOMEM;
4120
4121 rc = mwl8k_encryption_set_cmd_info(cmd, addr, key);
4122 if (rc < 0)
4123 goto done;
4124
4125 idx = key->keyidx;
4126
4127 if (key->flags & IEEE80211_KEY_FLAG_PAIRWISE)
4128 action = MWL8K_ENCR_SET_KEY;
4129 else
4130 action = MWL8K_ENCR_SET_GROUP_KEY;
4131
4132 switch (key->cipher) {
4133 case WLAN_CIPHER_SUITE_WEP40:
4134 case WLAN_CIPHER_SUITE_WEP104:
4135 if (!mwl8k_vif->wep_key_conf[idx].enabled) {
4136 memcpy(mwl8k_vif->wep_key_conf[idx].key, key,
4137 sizeof(*key) + key->keylen);
4138 mwl8k_vif->wep_key_conf[idx].enabled = 1;
4139 }
4140
9b571e24 4141 keymlen = key->keylen;
fcdc403c
NS		 4142 action = MWL8K_ENCR_SET_KEY;
4143 break;
4144 case WLAN_CIPHER_SUITE_TKIP:
4145 keymlen = MAX_ENCR_KEY_LENGTH + 2 * MIC_KEY_LENGTH;
4146 break;
4147 case WLAN_CIPHER_SUITE_CCMP:
4148 keymlen = key->keylen;
4149 break;
4150 default:
4151 rc = -ENOTSUPP;
4152 goto done;
4153 }
4154
4155 memcpy(cmd->key_material, key->key, keymlen);
4156 cmd->action = cpu_to_le32(action);
4157
4158 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
4159done:
4160 kfree(cmd);
4161
4162 return rc;
4163}
4164
4165static int mwl8k_cmd_encryption_remove_key(struct ieee80211_hw *hw,
4166 struct ieee80211_vif *vif,
4167 u8 *addr,
4168 struct ieee80211_key_conf *key)
4169{
4170 struct mwl8k_cmd_set_key *cmd;
4171 int rc;
4172 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
4173
4174 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
4175 if (cmd == NULL)
4176 return -ENOMEM;
4177
4178 rc = mwl8k_encryption_set_cmd_info(cmd, addr, key);
4179 if (rc < 0)
4180 goto done;
4181
4182 if (key->cipher == WLAN_CIPHER_SUITE_WEP40 ||
d981e059 4183 key->cipher == WLAN_CIPHER_SUITE_WEP104)
fcdc403c
NS		 4184 mwl8k_vif->wep_key_conf[key->keyidx].enabled = 0;
4185
4186 cmd->action = cpu_to_le32(MWL8K_ENCR_REMOVE_KEY);
4187
4188 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
4189done:
4190 kfree(cmd);
4191
4192 return rc;
4193}
4194
4195static int mwl8k_set_key(struct ieee80211_hw *hw,
4196 enum set_key_cmd cmd_param,
4197 struct ieee80211_vif *vif,
4198 struct ieee80211_sta *sta,
4199 struct ieee80211_key_conf *key)
4200{
4201 int rc = 0;
4202 u8 encr_type;
4203 u8 *addr;
4204 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
4205
4206 if (vif->type == NL80211_IFTYPE_STATION)
4207 return -EOPNOTSUPP;
4208
4209 if (sta == NULL)
ff7e9f99 4210 addr = vif->addr;
fcdc403c
NS		 4211 else
4212 addr = sta->addr;
4213
4214 if (cmd_param == SET_KEY) {
fcdc403c
NS		 4215 rc = mwl8k_cmd_encryption_set_key(hw, vif, addr, key);
4216 if (rc)
4217 goto out;
4218
4219 if ((key->cipher == WLAN_CIPHER_SUITE_WEP40)
4220 || (key->cipher == WLAN_CIPHER_SUITE_WEP104))
4221 encr_type = MWL8K_UPDATE_ENCRYPTION_TYPE_WEP;
4222 else
4223 encr_type = MWL8K_UPDATE_ENCRYPTION_TYPE_MIXED;
4224
4225 rc = mwl8k_cmd_update_encryption_enable(hw, vif, addr,
4226 encr_type);
4227 if (rc)
4228 goto out;
4229
4230 mwl8k_vif->is_hw_crypto_enabled = true;
4231
4232 } else {
4233 rc = mwl8k_cmd_encryption_remove_key(hw, vif, addr, key);
4234
4235 if (rc)
4236 goto out;
fcdc403c
NS		 4237 }
4238out:
4239 return rc;
4240}
4241
55489b6e
LB		 4242/*
4243 * CMD_UPDATE_STADB.
4244 */
25d81b1e
LB		 4245struct ewc_ht_info {
4246 __le16 control1;
4247 __le16 control2;
4248 __le16 control3;
ba2d3587 4249} __packed;
25d81b1e
LB		 4250
4251struct peer_capability_info {
4252 /* Peer type - AP vs. STA. */
4253 __u8 peer_type;
4254
4255 /* Basic 802.11 capabilities from assoc resp. */
4256 __le16 basic_caps;
4257
4258 /* Set if peer supports 802.11n high throughput (HT). */
4259 __u8 ht_support;
4260
4261 /* Valid if HT is supported. */
4262 __le16 ht_caps;
4263 __u8 extended_ht_caps;
4264 struct ewc_ht_info ewc_info;
4265
4266 /* Legacy rate table. Intersection of our rates and peer rates. */
4267 __u8 legacy_rates[12];
4268
4269 /* HT rate table. Intersection of our rates and peer rates. */
4270 __u8 ht_rates[16];
4271 __u8 pad[16];
4272
4273 /* If set, interoperability mode, no proprietary extensions. */
4274 __u8 interop;
4275 __u8 pad2;
4276 __u8 station_id;
4277 __le16 amsdu_enabled;
ba2d3587 4278} __packed;
25d81b1e 4279
55489b6e
LB		 4280struct mwl8k_cmd_update_stadb {
4281 struct mwl8k_cmd_pkt header;
4282
4283 /* See STADB_ACTION_TYPE */
4284 __le32 action;
4285
4286 /* Peer MAC address */
4287 __u8 peer_addr[ETH_ALEN];
4288
4289 __le32 reserved;
4290
4291 /* Peer info - valid during add/update. */
4292 struct peer_capability_info peer_info;
ba2d3587 4293} __packed;
55489b6e 4294
a680400e
LB		 4295#define MWL8K_STA_DB_MODIFY_ENTRY 1
4296#define MWL8K_STA_DB_DEL_ENTRY 2
4297
4298/* Peer Entry flags - used to define the type of the peer node */
4299#define MWL8K_PEER_TYPE_ACCESSPOINT 2
4300
4301static int mwl8k_cmd_update_stadb_add(struct ieee80211_hw *hw,
c6e96010 4302 struct ieee80211_vif *vif,
13935e2c 4303 struct ieee80211_sta *sta)
55489b6e 4304{
55489b6e 4305 struct mwl8k_cmd_update_stadb *cmd;
a680400e 4306 struct peer_capability_info *p;
8707d026 4307 u32 rates;
55489b6e
LB		 4308 int rc;
4309
4310 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
4311 if (cmd == NULL)
4312 return -ENOMEM;
4313
4314 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
4315 cmd->header.length = cpu_to_le16(sizeof(*cmd));
a680400e 4316 cmd->action = cpu_to_le32(MWL8K_STA_DB_MODIFY_ENTRY);
13935e2c 4317 memcpy(cmd->peer_addr, sta->addr, ETH_ALEN);
55489b6e 4318
a680400e
LB		 4319 p = &cmd->peer_info;
4320 p->peer_type = MWL8K_PEER_TYPE_ACCESSPOINT;
4321 p->basic_caps = cpu_to_le16(vif->bss_conf.assoc_capability);
13935e2c 4322 p->ht_support = sta->ht_cap.ht_supported;
b603742f 4323 p->ht_caps = cpu_to_le16(sta->ht_cap.cap);
13935e2c
LB		 4324 p->extended_ht_caps = (sta->ht_cap.ampdu_factor & 3) |
4325 ((sta->ht_cap.ampdu_density & 7) << 2);
8707d026
LB		 4326 if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
4327 rates = sta->supp_rates[IEEE80211_BAND_2GHZ];
4328 else
4329 rates = sta->supp_rates[IEEE80211_BAND_5GHZ] << 5;
4330 legacy_rate_mask_to_array(p->legacy_rates, rates);
13935e2c 4331 memcpy(p->ht_rates, sta->ht_cap.mcs.rx_mask, 16);
a680400e
LB		 4332 p->interop = 1;
4333 p->amsdu_enabled = 0;
4334
4335 rc = mwl8k_post_cmd(hw, &cmd->header);
4336 kfree(cmd);
4337
4338 return rc ? rc : p->station_id;
4339}
4340
4341static int mwl8k_cmd_update_stadb_del(struct ieee80211_hw *hw,
4342 struct ieee80211_vif *vif, u8 *addr)
4343{
4344 struct mwl8k_cmd_update_stadb *cmd;
4345 int rc;
4346
4347 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
4348 if (cmd == NULL)
4349 return -ENOMEM;
4350
4351 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
4352 cmd->header.length = cpu_to_le16(sizeof(*cmd));
4353 cmd->action = cpu_to_le32(MWL8K_STA_DB_DEL_ENTRY);
bbfd9128 4354 memcpy(cmd->peer_addr, addr, ETH_ALEN);
55489b6e 4355
a680400e 4356 rc = mwl8k_post_cmd(hw, &cmd->header);
55489b6e
LB		 4357 kfree(cmd);
4358
4359 return rc;
4360}
4361
a66098da
LB		 4362
4363/*
4364 * Interrupt handling.
4365 */
4366static irqreturn_t mwl8k_interrupt(int irq, void *dev_id)
4367{
4368 struct ieee80211_hw *hw = dev_id;
4369 struct mwl8k_priv *priv = hw->priv;
4370 u32 status;
4371
4372 status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
a66098da
LB		 4373 if (!status)
4374 return IRQ_NONE;
4375
1e9f9de3
LB		 4376 if (status & MWL8K_A2H_INT_TX_DONE) {
4377 status &= ~MWL8K_A2H_INT_TX_DONE;
4378 tasklet_schedule(&priv->poll_tx_task);
4379 }
4380
a66098da 4381 if (status & MWL8K_A2H_INT_RX_READY) {
67e2eb27
LB		 4382 status &= ~MWL8K_A2H_INT_RX_READY;
4383 tasklet_schedule(&priv->poll_rx_task);
a66098da
LB		 4384 }
4385
3aefc37e 4386 if (status & MWL8K_A2H_INT_BA_WATCHDOG) {
c27a54d3
YAP		 4387 iowrite32(~MWL8K_A2H_INT_BA_WATCHDOG,
4388 priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
4389
4390 atomic_inc(&priv->watchdog_event_pending);
3aefc37e
NS		 4391 status &= ~MWL8K_A2H_INT_BA_WATCHDOG;
4392 ieee80211_queue_work(hw, &priv->watchdog_ba_handle);
4393 }
4394
67e2eb27
LB		 4395 if (status)
4396 iowrite32(~status, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
4397
a66098da 4398 if (status & MWL8K_A2H_INT_OPC_DONE) {
618952a7 4399 if (priv->hostcmd_wait != NULL)
a66098da 4400 complete(priv->hostcmd_wait);
a66098da
LB		 4401 }
4402
4403 if (status & MWL8K_A2H_INT_QUEUE_EMPTY) {
618952a7 4404 if (!mutex_is_locked(&priv->fw_mutex) &&
88de754a 4405 priv->radio_on && priv->pending_tx_pkts)
618952a7 4406 mwl8k_tx_start(priv);
a66098da
LB		 4407 }
4408
4409 return IRQ_HANDLED;
4410}
4411
1e9f9de3
LB		 4412static void mwl8k_tx_poll(unsigned long data)
4413{
4414 struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
4415 struct mwl8k_priv *priv = hw->priv;
4416 int limit;
4417 int i;
4418
4419 limit = 32;
4420
4421 spin_lock_bh(&priv->tx_lock);
4422
e600707b 4423 for (i = 0; i < mwl8k_tx_queues(priv); i++)
1e9f9de3
LB		 4424 limit -= mwl8k_txq_reclaim(hw, i, limit, 0);
4425
4426 if (!priv->pending_tx_pkts && priv->tx_wait != NULL) {
4427 complete(priv->tx_wait);
4428 priv->tx_wait = NULL;
4429 }
4430
4431 spin_unlock_bh(&priv->tx_lock);
4432
4433 if (limit) {
4434 writel(~MWL8K_A2H_INT_TX_DONE,
4435 priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
4436 } else {
4437 tasklet_schedule(&priv->poll_tx_task);
4438 }
4439}
4440
67e2eb27
LB		 4441static void mwl8k_rx_poll(unsigned long data)
4442{
4443 struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
4444 struct mwl8k_priv *priv = hw->priv;
4445 int limit;
4446
4447 limit = 32;
4448 limit -= rxq_process(hw, 0, limit);
4449 limit -= rxq_refill(hw, 0, limit);
4450
4451 if (limit) {
4452 writel(~MWL8K_A2H_INT_RX_READY,
4453 priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
4454 } else {
4455 tasklet_schedule(&priv->poll_rx_task);
4456 }
4457}
4458
a66098da
LB		 4459
4460/*
4461 * Core driver operations.
4462 */
36323f81
TH		 4463static void mwl8k_tx(struct ieee80211_hw *hw,
4464 struct ieee80211_tx_control *control,
4465 struct sk_buff *skb)
a66098da
LB		 4466{
4467 struct mwl8k_priv *priv = hw->priv;
4468 int index = skb_get_queue_mapping(skb);
a66098da 4469
9189c100 4470 if (!priv->radio_on) {
c96c31e4
JP		 4471 wiphy_debug(hw->wiphy,
4472 "dropped TX frame since radio disabled\n");
a66098da 4473 dev_kfree_skb(skb);
7bb45683 4474 return;
a66098da
LB		 4475 }
4476
36323f81 4477 mwl8k_txq_xmit(hw, index, control->sta, skb);
a66098da
LB		 4478}
4479
a66098da
LB		 4480static int mwl8k_start(struct ieee80211_hw *hw)
4481{
a66098da
LB		 4482 struct mwl8k_priv *priv = hw->priv;
4483 int rc;
4484
a0607fd3 4485 rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
a66098da
LB		 4486 IRQF_SHARED, MWL8K_NAME, hw);
4487 if (rc) {
bf3ca7f7 4488 priv->irq = -1;
5db55844 4489 wiphy_err(hw->wiphy, "failed to register IRQ handler\n");
2ec610cb 4490 return -EIO;
a66098da 4491 }
bf3ca7f7 4492 priv->irq = priv->pdev->irq;
a66098da 4493
67e2eb27 4494 /* Enable TX reclaim and RX tasklets. */
1e9f9de3 4495 tasklet_enable(&priv->poll_tx_task);
67e2eb27 4496 tasklet_enable(&priv->poll_rx_task);
2ec610cb 4497
a66098da 4498 /* Enable interrupts */
c23b5a69 4499 iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
12488e01
NS		 4500 iowrite32(MWL8K_A2H_EVENTS,
4501 priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
a66098da 4502
2ec610cb
LB		 4503 rc = mwl8k_fw_lock(hw);
4504 if (!rc) {
55489b6e 4505 rc = mwl8k_cmd_radio_enable(hw);
a66098da 4506
5e4cf166
LB		 4507 if (!priv->ap_fw) {
4508 if (!rc)
55489b6e 4509 rc = mwl8k_cmd_enable_sniffer(hw, 0);
a66098da 4510
5e4cf166
LB		 4511 if (!rc)
4512 rc = mwl8k_cmd_set_pre_scan(hw);
4513
4514 if (!rc)
4515 rc = mwl8k_cmd_set_post_scan(hw,
4516 "\x00\x00\x00\x00\x00\x00");
4517 }
2ec610cb
LB		 4518
4519 if (!rc)
55489b6e 4520 rc = mwl8k_cmd_set_rateadapt_mode(hw, 0);
a66098da 4521
2ec610cb 4522 if (!rc)
55489b6e 4523 rc = mwl8k_cmd_set_wmm_mode(hw, 0);
a66098da 4524
2ec610cb
LB		 4525 mwl8k_fw_unlock(hw);
4526 }
4527
4528 if (rc) {
4529 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
4530 free_irq(priv->pdev->irq, hw);
bf3ca7f7 4531 priv->irq = -1;
1e9f9de3 4532 tasklet_disable(&priv->poll_tx_task);
67e2eb27 4533 tasklet_disable(&priv->poll_rx_task);
2ec610cb 4534 }
a66098da
LB		 4535
4536 return rc;
4537}
4538
a66098da
LB		 4539static void mwl8k_stop(struct ieee80211_hw *hw)
4540{
a66098da
LB		 4541 struct mwl8k_priv *priv = hw->priv;
4542 int i;
4543
6b6accc3
YAP		 4544 if (!priv->hw_restart_in_progress)
4545 mwl8k_cmd_radio_disable(hw);
a66098da
LB		 4546
4547 ieee80211_stop_queues(hw);
4548
a66098da 4549 /* Disable interrupts */
a66098da 4550 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
bf3ca7f7
BC		 4551 if (priv->irq != -1) {
4552 free_irq(priv->pdev->irq, hw);
4553 priv->irq = -1;
4554 }
a66098da
LB		 4555
4556 /* Stop finalize join worker */
4557 cancel_work_sync(&priv->finalize_join_worker);
3aefc37e 4558 cancel_work_sync(&priv->watchdog_ba_handle);
a66098da
LB		 4559 if (priv->beacon_skb != NULL)
4560 dev_kfree_skb(priv->beacon_skb);
4561
67e2eb27 4562 /* Stop TX reclaim and RX tasklets. */
1e9f9de3 4563 tasklet_disable(&priv->poll_tx_task);
67e2eb27 4564 tasklet_disable(&priv->poll_rx_task);
a66098da 4565
a66098da 4566 /* Return all skbs to mac80211 */
e600707b 4567 for (i = 0; i < mwl8k_tx_queues(priv); i++)
efb7c49a 4568 mwl8k_txq_reclaim(hw, i, INT_MAX, 1);
a66098da
LB		 4569}
4570
0863ade8
BC		 4571static int mwl8k_reload_firmware(struct ieee80211_hw *hw, char *fw_image);
4572
a66098da 4573static int mwl8k_add_interface(struct ieee80211_hw *hw,
f5bb87cf 4574 struct ieee80211_vif *vif)
a66098da
LB		 4575{
4576 struct mwl8k_priv *priv = hw->priv;
4577 struct mwl8k_vif *mwl8k_vif;
ee0ddf18 4578 u32 macids_supported;
0863ade8
BC		 4579 int macid, rc;
4580 struct mwl8k_device_info *di;
a66098da 4581
a43c49a8
LB		 4582 /*
4583 * Reject interface creation if sniffer mode is active, as
4584 * STA operation is mutually exclusive with hardware sniffer
b64fe619 4585 * mode. (Sniffer mode is only used on STA firmware.)
a43c49a8
LB		 4586 */
4587 if (priv->sniffer_enabled) {
c96c31e4
JP		 4588 wiphy_info(hw->wiphy,
4589 "unable to create STA interface because sniffer mode is enabled\n");
a43c49a8
LB		 4590 return -EINVAL;
4591 }
4592
0863ade8 4593 di = priv->device_info;
ee0ddf18
LB		 4594 switch (vif->type) {
4595 case NL80211_IFTYPE_AP:
0863ade8
BC		 4596 if (!priv->ap_fw && di->fw_image_ap) {
4597 /* we must load the ap fw to meet this request */
4598 if (!list_empty(&priv->vif_list))
4599 return -EBUSY;
4600 rc = mwl8k_reload_firmware(hw, di->fw_image_ap);
4601 if (rc)
4602 return rc;
4603 }
ee0ddf18
LB		 4604 macids_supported = priv->ap_macids_supported;
4605 break;
4606 case NL80211_IFTYPE_STATION:
0863ade8
BC		 4607 if (priv->ap_fw && di->fw_image_sta) {
4608 /* we must load the sta fw to meet this request */
4609 if (!list_empty(&priv->vif_list))
4610 return -EBUSY;
4611 rc = mwl8k_reload_firmware(hw, di->fw_image_sta);
4612 if (rc)
4613 return rc;
4614 }
ee0ddf18
LB		 4615 macids_supported = priv->sta_macids_supported;
4616 break;
4617 default:
4618 return -EINVAL;
4619 }
4620
4621 macid = ffs(macids_supported & ~priv->macids_used);
4622 if (!macid--)
4623 return -EBUSY;
4624
f5bb87cf 4625 /* Setup driver private area. */
1ed32e4f 4626 mwl8k_vif = MWL8K_VIF(vif);
a66098da 4627 memset(mwl8k_vif, 0, sizeof(*mwl8k_vif));
f5bb87cf 4628 mwl8k_vif->vif = vif;
ee0ddf18 4629 mwl8k_vif->macid = macid;
a66098da 4630 mwl8k_vif->seqno = 0;
d9a07d49
NS		 4631 memcpy(mwl8k_vif->bssid, vif->addr, ETH_ALEN);
4632 mwl8k_vif->is_hw_crypto_enabled = false;
a66098da 4633
aa21d0f6
LB		 4634 /* Set the mac address. */
4635 mwl8k_cmd_set_mac_addr(hw, vif, vif->addr);
4636
4637 if (priv->ap_fw)
4638 mwl8k_cmd_set_new_stn_add_self(hw, vif);
4639
ee0ddf18 4640 priv->macids_used |= 1 << mwl8k_vif->macid;
f5bb87cf 4641 list_add_tail(&mwl8k_vif->list, &priv->vif_list);
a66098da
LB		 4642
4643 return 0;
4644}
4645
6b6accc3
YAP		 4646static void mwl8k_remove_vif(struct mwl8k_priv *priv, struct mwl8k_vif *vif)
4647{
4648 /* Has ieee80211_restart_hw re-added the removed interfaces? */
4649 if (!priv->macids_used)
4650 return;
4651
4652 priv->macids_used &= ~(1 << vif->macid);
4653 list_del(&vif->list);
4654}
4655
a66098da 4656static void mwl8k_remove_interface(struct ieee80211_hw *hw,
1ed32e4f 4657 struct ieee80211_vif *vif)
a66098da
LB		 4658{
4659 struct mwl8k_priv *priv = hw->priv;
f5bb87cf 4660 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
a66098da 4661
b64fe619
LB		 4662 if (priv->ap_fw)
4663 mwl8k_cmd_set_new_stn_del(hw, vif, vif->addr);
4664
197a4e4e 4665 mwl8k_cmd_del_mac_addr(hw, vif, vif->addr);
32060e1b 4666
6b6accc3
YAP		 4667 mwl8k_remove_vif(priv, mwl8k_vif);
4668}
4669
4670static void mwl8k_hw_restart_work(struct work_struct *work)
4671{
4672 struct mwl8k_priv *priv =
4673 container_of(work, struct mwl8k_priv, fw_reload);
4674 struct ieee80211_hw *hw = priv->hw;
4675 struct mwl8k_device_info *di;
4676 int rc;
4677
4678 /* If some command is waiting for a response, clear it */
4679 if (priv->hostcmd_wait != NULL) {
4680 complete(priv->hostcmd_wait);
4681 priv->hostcmd_wait = NULL;
4682 }
4683
4684 priv->hw_restart_owner = current;
4685 di = priv->device_info;
4686 mwl8k_fw_lock(hw);
4687
4688 if (priv->ap_fw)
4689 rc = mwl8k_reload_firmware(hw, di->fw_image_ap);
4690 else
4691 rc = mwl8k_reload_firmware(hw, di->fw_image_sta);
4692
4693 if (rc)
4694 goto fail;
4695
4696 priv->hw_restart_owner = NULL;
4697 priv->hw_restart_in_progress = false;
4698
4699 /*
4700 * This unlock will wake up the queues and
4701 * also opens the command path for other
4702 * commands
4703 */
4704 mwl8k_fw_unlock(hw);
4705
4706 ieee80211_restart_hw(hw);
4707
4708 wiphy_err(hw->wiphy, "Firmware restarted successfully\n");
4709
4710 return;
4711fail:
4712 mwl8k_fw_unlock(hw);
4713
4714 wiphy_err(hw->wiphy, "Firmware restart failed\n");
a66098da
LB		 4715}
4716
ee03a932 4717static int mwl8k_config(struct ieee80211_hw *hw, u32 changed)
a66098da 4718{
a66098da
LB		 4719 struct ieee80211_conf *conf = &hw->conf;
4720 struct mwl8k_priv *priv = hw->priv;
ee03a932 4721 int rc;
a66098da 4722
7595d67a 4723 if (conf->flags & IEEE80211_CONF_IDLE) {
55489b6e 4724 mwl8k_cmd_radio_disable(hw);
ee03a932 4725 return 0;
7595d67a
LB		 4726 }
4727
ee03a932
LB		 4728 rc = mwl8k_fw_lock(hw);
4729 if (rc)
4730 return rc;
a66098da 4731
55489b6e 4732 rc = mwl8k_cmd_radio_enable(hw);
ee03a932
LB		 4733 if (rc)
4734 goto out;
a66098da 4735
610677d2 4736 rc = mwl8k_cmd_set_rf_channel(hw, conf);
ee03a932
LB		 4737 if (rc)
4738 goto out;
4739
a66098da
LB		 4740 if (conf->power_level > 18)
4741 conf->power_level = 18;
a66098da 4742
08b06347 4743 if (priv->ap_fw) {
03217087
NS		 4744
4745 if (conf->flags & IEEE80211_CONF_CHANGE_POWER) {
4746 rc = mwl8k_cmd_tx_power(hw, conf, conf->power_level);
4747 if (rc)
4748 goto out;
4749 }
41fdf097 4750
da62b761
NS		 4751 rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_RX, 0x3);
4752 if (rc)
4753 wiphy_warn(hw->wiphy, "failed to set # of RX antennas");
4754 rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_TX, 0x7);
4755 if (rc)
4756 wiphy_warn(hw->wiphy, "failed to set # of TX antennas");
4757
08b06347 4758 } else {
41fdf097
NS		 4759 rc = mwl8k_cmd_rf_tx_power(hw, conf->power_level);
4760 if (rc)
4761 goto out;
08b06347
LB		 4762 rc = mwl8k_cmd_mimo_config(hw, 0x7, 0x7);
4763 }
a66098da 4764
ee03a932
LB		 4765out:
4766 mwl8k_fw_unlock(hw);
a66098da 4767
ee03a932 4768 return rc;
a66098da
LB		 4769}
4770
b64fe619
LB		 4771static void
4772mwl8k_bss_info_changed_sta(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
4773 struct ieee80211_bss_conf *info, u32 changed)
a66098da 4774{
a66098da 4775 struct mwl8k_priv *priv = hw->priv;
ba30c4a5 4776 u32 ap_legacy_rates = 0;
13935e2c 4777 u8 ap_mcs_rates[16];
3a980d0a
LB		 4778 int rc;
4779
c3cbbe8a 4780 if (mwl8k_fw_lock(hw))
3a980d0a 4781 return;
a66098da 4782
c3cbbe8a
LB		 4783 /*
4784 * No need to capture a beacon if we're no longer associated.
4785 */
4786 if ((changed & BSS_CHANGED_ASSOC) && !vif->bss_conf.assoc)
4787 priv->capture_beacon = false;
3a980d0a 4788
c3cbbe8a 4789 /*
13935e2c 4790 * Get the AP's legacy and MCS rates.
c3cbbe8a 4791 */
7dc6a7a7 4792 if (vif->bss_conf.assoc) {
c6e96010 4793 struct ieee80211_sta *ap;
c97470dd 4794
c6e96010 4795 rcu_read_lock();
c6e96010 4796
c3cbbe8a
LB		 4797 ap = ieee80211_find_sta(vif, vif->bss_conf.bssid);
4798 if (ap == NULL) {
4799 rcu_read_unlock();
c6e96010 4800 goto out;
c3cbbe8a
LB		 4801 }
4802
8707d026
LB		 4803 if (hw->conf.channel->band == IEEE80211_BAND_2GHZ) {
4804 ap_legacy_rates = ap->supp_rates[IEEE80211_BAND_2GHZ];
4805 } else {
4806 ap_legacy_rates =
4807 ap->supp_rates[IEEE80211_BAND_5GHZ] << 5;
4808 }
13935e2c 4809 memcpy(ap_mcs_rates, ap->ht_cap.mcs.rx_mask, 16);
c3cbbe8a
LB		 4810
4811 rcu_read_unlock();
4812 }
c6e96010 4813
c3cbbe8a 4814 if ((changed & BSS_CHANGED_ASSOC) && vif->bss_conf.assoc) {
13935e2c 4815 rc = mwl8k_cmd_set_rate(hw, vif, ap_legacy_rates, ap_mcs_rates);
3a980d0a
LB		 4816 if (rc)
4817 goto out;
a66098da 4818
b71ed2c6 4819 rc = mwl8k_cmd_use_fixed_rate_sta(hw);
3a980d0a
LB		 4820 if (rc)
4821 goto out;
c3cbbe8a 4822 }
a66098da 4823
c3cbbe8a 4824 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
7dc6a7a7
LB		 4825 rc = mwl8k_set_radio_preamble(hw,
4826 vif->bss_conf.use_short_preamble);
3a980d0a
LB		 4827 if (rc)
4828 goto out;
c3cbbe8a 4829 }
a66098da 4830
c3cbbe8a 4831 if (changed & BSS_CHANGED_ERP_SLOT) {
7dc6a7a7 4832 rc = mwl8k_cmd_set_slot(hw, vif->bss_conf.use_short_slot);
3a980d0a
LB		 4833 if (rc)
4834 goto out;
c3cbbe8a 4835 }
a66098da 4836
c97470dd
LB		 4837 if (vif->bss_conf.assoc &&
4838 (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_ERP_CTS_PROT |
4839 BSS_CHANGED_HT))) {
c3cbbe8a 4840 rc = mwl8k_cmd_set_aid(hw, vif, ap_legacy_rates);
3a980d0a
LB		 4841 if (rc)
4842 goto out;
c3cbbe8a 4843 }
a66098da 4844
c3cbbe8a
LB		 4845 if (vif->bss_conf.assoc &&
4846 (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_BEACON_INT))) {
a66098da
LB		 4847 /*
4848 * Finalize the join. Tell rx handler to process
4849 * next beacon from our BSSID.
4850 */
0a11dfc3 4851 memcpy(priv->capture_bssid, vif->bss_conf.bssid, ETH_ALEN);
a66098da 4852 priv->capture_beacon = true;
a66098da
LB		 4853 }
4854
3a980d0a
LB		 4855out:
4856 mwl8k_fw_unlock(hw);
a66098da
LB		 4857}
4858
b64fe619
LB		 4859static void
4860mwl8k_bss_info_changed_ap(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
4861 struct ieee80211_bss_conf *info, u32 changed)
4862{
4863 int rc;
4864
4865 if (mwl8k_fw_lock(hw))
4866 return;
4867
4868 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
4869 rc = mwl8k_set_radio_preamble(hw,
4870 vif->bss_conf.use_short_preamble);
4871 if (rc)
4872 goto out;
4873 }
4874
4875 if (changed & BSS_CHANGED_BASIC_RATES) {
4876 int idx;
4877 int rate;
4878
4879 /*
4880 * Use lowest supported basic rate for multicasts
4881 * and management frames (such as probe responses --
4882 * beacons will always go out at 1 Mb/s).
4883 */
4884 idx = ffs(vif->bss_conf.basic_rates);
8707d026
LB		 4885 if (idx)
4886 idx--;
4887
4888 if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
4889 rate = mwl8k_rates_24[idx].hw_value;
4890 else
4891 rate = mwl8k_rates_50[idx].hw_value;
b64fe619
LB		 4892
4893 mwl8k_cmd_use_fixed_rate_ap(hw, rate, rate);
4894 }
4895
4896 if (changed & (BSS_CHANGED_BEACON_INT | BSS_CHANGED_BEACON)) {
4897 struct sk_buff *skb;
4898
4899 skb = ieee80211_beacon_get(hw, vif);
4900 if (skb != NULL) {
aa21d0f6 4901 mwl8k_cmd_set_beacon(hw, vif, skb->data, skb->len);
b64fe619
LB		 4902 kfree_skb(skb);
4903 }
4904 }
4905
4906 if (changed & BSS_CHANGED_BEACON_ENABLED)
aa21d0f6 4907 mwl8k_cmd_bss_start(hw, vif, info->enable_beacon);
b64fe619
LB		 4908
4909out:
4910 mwl8k_fw_unlock(hw);
4911}
4912
4913static void
4914mwl8k_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
4915 struct ieee80211_bss_conf *info, u32 changed)
4916{
4917 struct mwl8k_priv *priv = hw->priv;
4918
4919 if (!priv->ap_fw)
4920 mwl8k_bss_info_changed_sta(hw, vif, info, changed);
4921 else
4922 mwl8k_bss_info_changed_ap(hw, vif, info, changed);
4923}
4924
e81cd2d6 4925static u64 mwl8k_prepare_multicast(struct ieee80211_hw *hw,
22bedad3 4926 struct netdev_hw_addr_list *mc_list)
e81cd2d6
LB		 4927{
4928 struct mwl8k_cmd_pkt *cmd;
4929
447ced07
LB		 4930 /*
4931 * Synthesize and return a command packet that programs the
4932 * hardware multicast address filter. At this point we don't
4933 * know whether FIF_ALLMULTI is being requested, but if it is,
4934 * we'll end up throwing this packet away and creating a new
4935 * one in mwl8k_configure_filter().
4936 */
22bedad3 4937 cmd = __mwl8k_cmd_mac_multicast_adr(hw, 0, mc_list);
e81cd2d6
LB		 4938
4939 return (unsigned long)cmd;
4940}
4941
a43c49a8
LB		 4942static int
4943mwl8k_configure_filter_sniffer(struct ieee80211_hw *hw,
4944 unsigned int changed_flags,
4945 unsigned int *total_flags)
4946{
4947 struct mwl8k_priv *priv = hw->priv;
4948
4949 /*
4950 * Hardware sniffer mode is mutually exclusive with STA
4951 * operation, so refuse to enable sniffer mode if a STA
4952 * interface is active.
4953 */
f5bb87cf 4954 if (!list_empty(&priv->vif_list)) {
a43c49a8 4955 if (net_ratelimit())
c96c31e4
JP		 4956 wiphy_info(hw->wiphy,
4957 "not enabling sniffer mode because STA interface is active\n");
a43c49a8
LB		 4958 return 0;
4959 }
4960
4961 if (!priv->sniffer_enabled) {
55489b6e 4962 if (mwl8k_cmd_enable_sniffer(hw, 1))
a43c49a8
LB		 4963 return 0;
4964 priv->sniffer_enabled = true;
4965 }
4966
4967 *total_flags &= FIF_PROMISC_IN_BSS | FIF_ALLMULTI |
4968 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL |
4969 FIF_OTHER_BSS;
4970
4971 return 1;
4972}
4973
f5bb87cf
LB		 4974static struct mwl8k_vif *mwl8k_first_vif(struct mwl8k_priv *priv)
4975{
4976 if (!list_empty(&priv->vif_list))
4977 return list_entry(priv->vif_list.next, struct mwl8k_vif, list);
4978
4979 return NULL;
4980}
4981
e6935ea1
LB		 4982static void mwl8k_configure_filter(struct ieee80211_hw *hw,
4983 unsigned int changed_flags,
4984 unsigned int *total_flags,
4985 u64 multicast)
4986{
4987 struct mwl8k_priv *priv = hw->priv;
a43c49a8
LB		 4988 struct mwl8k_cmd_pkt *cmd = (void *)(unsigned long)multicast;
4989
c0adae2c
LB		 4990 /*
4991 * AP firmware doesn't allow fine-grained control over
4992 * the receive filter.
4993 */
4994 if (priv->ap_fw) {
4995 *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
4996 kfree(cmd);
4997 return;
4998 }
4999
a43c49a8
LB		 5000 /*
5001 * Enable hardware sniffer mode if FIF_CONTROL or
5002 * FIF_OTHER_BSS is requested.
5003 */
5004 if (*total_flags & (FIF_CONTROL | FIF_OTHER_BSS) &&
5005 mwl8k_configure_filter_sniffer(hw, changed_flags, total_flags)) {
5006 kfree(cmd);
5007 return;
5008 }
a66098da 5009
e6935ea1 5010 /* Clear unsupported feature flags */
447ced07 5011 *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
a66098da 5012
90852f7a
LB		 5013 if (mwl8k_fw_lock(hw)) {
5014 kfree(cmd);
e6935ea1 5015 return;
90852f7a 5016 }
a66098da 5017
a43c49a8 5018 if (priv->sniffer_enabled) {
55489b6e 5019 mwl8k_cmd_enable_sniffer(hw, 0);
a43c49a8
LB		 5020 priv->sniffer_enabled = false;
5021 }
5022
e6935ea1 5023 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
77165d88
LB		 5024 if (*total_flags & FIF_BCN_PRBRESP_PROMISC) {
5025 /*
5026 * Disable the BSS filter.
5027 */
e6935ea1 5028 mwl8k_cmd_set_pre_scan(hw);
77165d88 5029 } else {
f5bb87cf 5030 struct mwl8k_vif *mwl8k_vif;
0a11dfc3 5031 const u8 *bssid;
a94cc97e 5032
77165d88
LB		 5033 /*
5034 * Enable the BSS filter.
5035 *
5036 * If there is an active STA interface, use that
5037 * interface's BSSID, otherwise use a dummy one
5038 * (where the OUI part needs to be nonzero for
5039 * the BSSID to be accepted by POST_SCAN).
5040 */
f5bb87cf
LB		 5041 mwl8k_vif = mwl8k_first_vif(priv);
5042 if (mwl8k_vif != NULL)
5043 bssid = mwl8k_vif->vif->bss_conf.bssid;
5044 else
5045 bssid = "\x01\x00\x00\x00\x00\x00";
a94cc97e 5046
e6935ea1 5047 mwl8k_cmd_set_post_scan(hw, bssid);
a66098da
LB		 5048 }
5049 }
5050
447ced07
LB		 5051 /*
5052 * If FIF_ALLMULTI is being requested, throw away the command
5053 * packet that ->prepare_multicast() built and replace it with
5054 * a command packet that enables reception of all multicast
5055 * packets.
5056 */
5057 if (*total_flags & FIF_ALLMULTI) {
5058 kfree(cmd);
22bedad3 5059 cmd = __mwl8k_cmd_mac_multicast_adr(hw, 1, NULL);
447ced07
LB		 5060 }
5061
5062 if (cmd != NULL) {
5063 mwl8k_post_cmd(hw, cmd);
5064 kfree(cmd);
e6935ea1 5065 }
a66098da 5066
e6935ea1 5067 mwl8k_fw_unlock(hw);
a66098da
LB		 5068}
5069
a66098da
LB		 5070static int mwl8k_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
5071{
c2c2b12a 5072 return mwl8k_cmd_set_rts_threshold(hw, value);
a66098da
LB		 5073}
5074
4a6967b8
JB		 5075static int mwl8k_sta_remove(struct ieee80211_hw *hw,
5076 struct ieee80211_vif *vif,
5077 struct ieee80211_sta *sta)
3f5610ff
LB		 5078{
5079 struct mwl8k_priv *priv = hw->priv;
5080
4a6967b8
JB		 5081 if (priv->ap_fw)
5082 return mwl8k_cmd_set_new_stn_del(hw, vif, sta->addr);
5083 else
5084 return mwl8k_cmd_update_stadb_del(hw, vif, sta->addr);
bbfd9128
LB		 5085}
5086
4a6967b8
JB		 5087static int mwl8k_sta_add(struct ieee80211_hw *hw,
5088 struct ieee80211_vif *vif,
5089 struct ieee80211_sta *sta)
bbfd9128
LB		 5090{
5091 struct mwl8k_priv *priv = hw->priv;
4a6967b8 5092 int ret;
fcdc403c
NS		 5093 int i;
5094 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
5095 struct ieee80211_key_conf *key;
bbfd9128 5096
4a6967b8
JB		 5097 if (!priv->ap_fw) {
5098 ret = mwl8k_cmd_update_stadb_add(hw, vif, sta);
5099 if (ret >= 0) {
5100 MWL8K_STA(sta)->peer_id = ret;
17033543
NS		 5101 if (sta->ht_cap.ht_supported)
5102 MWL8K_STA(sta)->is_ampdu_allowed = true;
fcdc403c 5103 ret = 0;
4a6967b8 5104 }
bbfd9128 5105
d9a07d49
NS		 5106 } else {
5107 ret = mwl8k_cmd_set_new_stn_add(hw, vif, sta);
bbfd9128 5108 }
4a6967b8 5109
d9a07d49
NS		 5110 for (i = 0; i < NUM_WEP_KEYS; i++) {
5111 key = IEEE80211_KEY_CONF(mwl8k_vif->wep_key_conf[i].key);
5112 if (mwl8k_vif->wep_key_conf[i].enabled)
5113 mwl8k_set_key(hw, SET_KEY, vif, sta, key);
5114 }
fcdc403c 5115 return ret;
bbfd9128
LB		 5116}
5117
8a3a3c85
EP		 5118static int mwl8k_conf_tx(struct ieee80211_hw *hw,
5119 struct ieee80211_vif *vif, u16 queue,
a66098da
LB		 5120 const struct ieee80211_tx_queue_params *params)
5121{
3e4f542c 5122 struct mwl8k_priv *priv = hw->priv;
a66098da 5123 int rc;
a66098da 5124
3e4f542c
LB		 5125 rc = mwl8k_fw_lock(hw);
5126 if (!rc) {
e600707b 5127 BUG_ON(queue > MWL8K_TX_WMM_QUEUES - 1);
0863ade8
BC		 5128 memcpy(&priv->wmm_params[queue], params, sizeof(*params));
5129
3e4f542c 5130 if (!priv->wmm_enabled)
55489b6e 5131 rc = mwl8k_cmd_set_wmm_mode(hw, 1);
a66098da 5132
85c9205c 5133 if (!rc) {
e600707b 5134 int q = MWL8K_TX_WMM_QUEUES - 1 - queue;
85c9205c 5135 rc = mwl8k_cmd_set_edca_params(hw, q,
55489b6e
LB		 5136 params->cw_min,
5137 params->cw_max,
5138 params->aifs,
5139 params->txop);
85c9205c 5140 }
3e4f542c
LB		 5141
5142 mwl8k_fw_unlock(hw);
a66098da 5143 }
3e4f542c 5144
a66098da
LB		 5145 return rc;
5146}
5147
a66098da
LB		 5148static int mwl8k_get_stats(struct ieee80211_hw *hw,
5149 struct ieee80211_low_level_stats *stats)
5150{
55489b6e 5151 return mwl8k_cmd_get_stat(hw, stats);
a66098da
LB		 5152}
5153
0d462bbb
JL		 5154static int mwl8k_get_survey(struct ieee80211_hw *hw, int idx,
5155 struct survey_info *survey)
5156{
5157 struct mwl8k_priv *priv = hw->priv;
5158 struct ieee80211_conf *conf = &hw->conf;
5159
5160 if (idx != 0)
5161 return -ENOENT;
5162
5163 survey->channel = conf->channel;
5164 survey->filled = SURVEY_INFO_NOISE_DBM;
5165 survey->noise = priv->noise;
5166
5167 return 0;
5168}
5169
65f3ddcd
NS		 5170#define MAX_AMPDU_ATTEMPTS 5
5171
a2292d83
LB		 5172static int
5173mwl8k_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
5174 enum ieee80211_ampdu_mlme_action action,
0b01f030
JB		 5175 struct ieee80211_sta *sta, u16 tid, u16 *ssn,
5176 u8 buf_size)
a2292d83 5177{
65f3ddcd
NS		 5178
5179 int i, rc = 0;
5180 struct mwl8k_priv *priv = hw->priv;
5181 struct mwl8k_ampdu_stream *stream;
07f6dda1 5182 u8 *addr = sta->addr, idx;
fd712f5f 5183 struct mwl8k_sta *sta_info = MWL8K_STA(sta);
65f3ddcd
NS		 5184
5185 if (!(hw->flags & IEEE80211_HW_AMPDU_AGGREGATION))
5186 return -ENOTSUPP;
5187
5188 spin_lock(&priv->stream_lock);
5189 stream = mwl8k_lookup_stream(hw, addr, tid);
5190
a2292d83
LB		 5191 switch (action) {
5192 case IEEE80211_AMPDU_RX_START:
5193 case IEEE80211_AMPDU_RX_STOP:
65f3ddcd
NS		 5194 break;
5195 case IEEE80211_AMPDU_TX_START:
5196 /* By the time we get here the hw queues may contain outgoing
5197 * packets for this RA/TID that are not part of this BA
5198 * session. The hw will assign sequence numbers to these
5199 * packets as they go out. So if we query the hw for its next
5200 * sequence number and use that for the SSN here, it may end up
5201 * being wrong, which will lead to sequence number mismatch at
5202 * the recipient. To avoid this, we reset the sequence number
5203 * to O for the first MPDU in this BA stream.
5204 */
5205 *ssn = 0;
5206 if (stream == NULL) {
5207 /* This means that somebody outside this driver called
5208 * ieee80211_start_tx_ba_session. This is unexpected
5209 * because we do our own rate control. Just warn and
5210 * move on.
5211 */
5212 wiphy_warn(hw->wiphy, "Unexpected call to %s. "
5213 "Proceeding anyway.\n", __func__);
5214 stream = mwl8k_add_stream(hw, sta, tid);
5215 }
5216 if (stream == NULL) {
5217 wiphy_debug(hw->wiphy, "no free AMPDU streams\n");
5218 rc = -EBUSY;
5219 break;
5220 }
5221 stream->state = AMPDU_STREAM_IN_PROGRESS;
5222
5223 /* Release the lock before we do the time consuming stuff */
5224 spin_unlock(&priv->stream_lock);
5225 for (i = 0; i < MAX_AMPDU_ATTEMPTS; i++) {
fd712f5f
YAP		 5226
5227 /* Check if link is still valid */
5228 if (!sta_info->is_ampdu_allowed) {
5229 spin_lock(&priv->stream_lock);
5230 mwl8k_remove_stream(hw, stream);
5231 spin_unlock(&priv->stream_lock);
5232 return -EBUSY;
5233 }
5234
f95275c4 5235 rc = mwl8k_check_ba(hw, stream, vif);
65f3ddcd 5236
6b6accc3
YAP		 5237 /* If HW restart is in progress mwl8k_post_cmd will
5238 * return -EBUSY. Avoid retrying mwl8k_check_ba in
5239 * such cases
5240 */
5241 if (!rc || rc == -EBUSY)
65f3ddcd
NS		 5242 break;
5243 /*
5244 * HW queues take time to be flushed, give them
5245 * sufficient time
5246 */
5247
5248 msleep(1000);
5249 }
5250 spin_lock(&priv->stream_lock);
5251 if (rc) {
5252 wiphy_err(hw->wiphy, "Stream for tid %d busy after %d"
5253 " attempts\n", tid, MAX_AMPDU_ATTEMPTS);
5254 mwl8k_remove_stream(hw, stream);
5255 rc = -EBUSY;
5256 break;
5257 }
5258 ieee80211_start_tx_ba_cb_irqsafe(vif, addr, tid);
5259 break;
18b559d5
JB		 5260 case IEEE80211_AMPDU_TX_STOP_CONT:
5261 case IEEE80211_AMPDU_TX_STOP_FLUSH:
5262 case IEEE80211_AMPDU_TX_STOP_FLUSH_CONT:
eca107ff
YAP		 5263 if (stream) {
5264 if (stream->state == AMPDU_STREAM_ACTIVE) {
07f6dda1 5265 idx = stream->idx;
eca107ff 5266 spin_unlock(&priv->stream_lock);
07f6dda1 5267 mwl8k_destroy_ba(hw, idx);
eca107ff
YAP		 5268 spin_lock(&priv->stream_lock);
5269 }
5270 mwl8k_remove_stream(hw, stream);
65f3ddcd 5271 }
65f3ddcd
NS		 5272 ieee80211_stop_tx_ba_cb_irqsafe(vif, addr, tid);
5273 break;
5274 case IEEE80211_AMPDU_TX_OPERATIONAL:
5275 BUG_ON(stream == NULL);
5276 BUG_ON(stream->state != AMPDU_STREAM_IN_PROGRESS);
5277 spin_unlock(&priv->stream_lock);
f95275c4 5278 rc = mwl8k_create_ba(hw, stream, buf_size, vif);
65f3ddcd
NS		 5279 spin_lock(&priv->stream_lock);
5280 if (!rc)
5281 stream->state = AMPDU_STREAM_ACTIVE;
5282 else {
07f6dda1 5283 idx = stream->idx;
65f3ddcd 5284 spin_unlock(&priv->stream_lock);
07f6dda1 5285 mwl8k_destroy_ba(hw, idx);
65f3ddcd
NS		 5286 spin_lock(&priv->stream_lock);
5287 wiphy_debug(hw->wiphy,
5288 "Failed adding stream for sta %pM tid %d\n",
5289 addr, tid);
5290 mwl8k_remove_stream(hw, stream);
5291 }
5292 break;
5293
a2292d83 5294 default:
65f3ddcd 5295 rc = -ENOTSUPP;
a2292d83 5296 }
65f3ddcd
NS		 5297
5298 spin_unlock(&priv->stream_lock);
5299 return rc;
a2292d83
LB		 5300}
5301
a66098da
LB		 5302static const struct ieee80211_ops mwl8k_ops = {
5303 .tx = mwl8k_tx,
5304 .start = mwl8k_start,
5305 .stop = mwl8k_stop,
5306 .add_interface = mwl8k_add_interface,
5307 .remove_interface = mwl8k_remove_interface,
5308 .config = mwl8k_config,
a66098da 5309 .bss_info_changed = mwl8k_bss_info_changed,
3ac64bee 5310 .prepare_multicast = mwl8k_prepare_multicast,
a66098da 5311 .configure_filter = mwl8k_configure_filter,
fcdc403c 5312 .set_key = mwl8k_set_key,
a66098da 5313 .set_rts_threshold = mwl8k_set_rts_threshold,
4a6967b8
JB		 5314 .sta_add = mwl8k_sta_add,
5315 .sta_remove = mwl8k_sta_remove,
a66098da 5316 .conf_tx = mwl8k_conf_tx,
a66098da 5317 .get_stats = mwl8k_get_stats,
0d462bbb 5318 .get_survey = mwl8k_get_survey,
a2292d83 5319 .ampdu_action = mwl8k_ampdu_action,
a66098da
LB		 5320};
5321
a66098da
LB		 5322static void mwl8k_finalize_join_worker(struct work_struct *work)
5323{
5324 struct mwl8k_priv *priv =
5325 container_of(work, struct mwl8k_priv, finalize_join_worker);
5326 struct sk_buff *skb = priv->beacon_skb;
56007a02
JB		 5327 struct ieee80211_mgmt *mgmt = (void *)skb->data;
5328 int len = skb->len - offsetof(struct ieee80211_mgmt, u.beacon.variable);
5329 const u8 *tim = cfg80211_find_ie(WLAN_EID_TIM,
5330 mgmt->u.beacon.variable, len);
5331 int dtim_period = 1;
5332
5333 if (tim && tim[1] >= 2)
5334 dtim_period = tim[3];
a66098da 5335
56007a02 5336 mwl8k_cmd_finalize_join(priv->hw, skb->data, skb->len, dtim_period);
a66098da 5337
f5bb87cf 5338 dev_kfree_skb(skb);
a66098da
LB		 5339 priv->beacon_skb = NULL;
5340}
5341
bcb628d5 5342enum {
9e1b17ea
LB		 5343 MWL8363 = 0,
5344 MWL8687,
bcb628d5 5345 MWL8366,
6f6d1e9a
LB		 5346};
5347
c2f2e202 5348#define MWL8K_8366_AP_FW_API 3
952a0e96
BC		 5349#define _MWL8K_8366_AP_FW(api) "mwl8k/fmimage_8366_ap-" #api ".fw"
5350#define MWL8K_8366_AP_FW(api) _MWL8K_8366_AP_FW(api)
5351
8dee5eef 5352static struct mwl8k_device_info mwl8k_info_tbl[] = {
9e1b17ea
LB		 5353 [MWL8363] = {
5354 .part_name = "88w8363",
5355 .helper_image = "mwl8k/helper_8363.fw",
0863ade8 5356 .fw_image_sta = "mwl8k/fmimage_8363.fw",
9e1b17ea 5357 },
49eb691c 5358 [MWL8687] = {
bcb628d5
JL		 5359 .part_name = "88w8687",
5360 .helper_image = "mwl8k/helper_8687.fw",
0863ade8 5361 .fw_image_sta = "mwl8k/fmimage_8687.fw",
bcb628d5 5362 },
49eb691c 5363 [MWL8366] = {
bcb628d5
JL		 5364 .part_name = "88w8366",
5365 .helper_image = "mwl8k/helper_8366.fw",
0863ade8 5366 .fw_image_sta = "mwl8k/fmimage_8366.fw",
952a0e96
BC		 5367 .fw_image_ap = MWL8K_8366_AP_FW(MWL8K_8366_AP_FW_API),
5368 .fw_api_ap = MWL8K_8366_AP_FW_API,
89a91f4f 5369 .ap_rxd_ops = &rxd_8366_ap_ops,
bcb628d5 5370 },
45a390dd
LB		 5371};
5372
c92d4ede
LB		 5373MODULE_FIRMWARE("mwl8k/helper_8363.fw");
5374MODULE_FIRMWARE("mwl8k/fmimage_8363.fw");
5375MODULE_FIRMWARE("mwl8k/helper_8687.fw");
5376MODULE_FIRMWARE("mwl8k/fmimage_8687.fw");
5377MODULE_FIRMWARE("mwl8k/helper_8366.fw");
5378MODULE_FIRMWARE("mwl8k/fmimage_8366.fw");
952a0e96 5379MODULE_FIRMWARE(MWL8K_8366_AP_FW(MWL8K_8366_AP_FW_API));
c92d4ede 5380
45a390dd 5381static DEFINE_PCI_DEVICE_TABLE(mwl8k_pci_id_table) = {
e5868ba1 5382 { PCI_VDEVICE(MARVELL, 0x2a0a), .driver_data = MWL8363, },
9e1b17ea
LB		 5383 { PCI_VDEVICE(MARVELL, 0x2a0c), .driver_data = MWL8363, },
5384 { PCI_VDEVICE(MARVELL, 0x2a24), .driver_data = MWL8363, },
bcb628d5
JL		 5385 { PCI_VDEVICE(MARVELL, 0x2a2b), .driver_data = MWL8687, },
5386 { PCI_VDEVICE(MARVELL, 0x2a30), .driver_data = MWL8687, },
5387 { PCI_VDEVICE(MARVELL, 0x2a40), .driver_data = MWL8366, },
ca66527c 5388 { PCI_VDEVICE(MARVELL, 0x2a43), .driver_data = MWL8366, },
bcb628d5 5389 { },
45a390dd
LB		 5390};
5391MODULE_DEVICE_TABLE(pci, mwl8k_pci_id_table);
5392
99020471
BC		 5393static int mwl8k_request_alt_fw(struct mwl8k_priv *priv)
5394{
5395 int rc;
5396 printk(KERN_ERR "%s: Error requesting preferred fw %s.\n"
5397 "Trying alternative firmware %s\n", pci_name(priv->pdev),
5398 priv->fw_pref, priv->fw_alt);
5399 rc = mwl8k_request_fw(priv, priv->fw_alt, &priv->fw_ucode, true);
5400 if (rc) {
5401 printk(KERN_ERR "%s: Error requesting alt fw %s\n",
5402 pci_name(priv->pdev), priv->fw_alt);
5403 return rc;
5404 }
5405 return 0;
5406}
5407
5408static int mwl8k_firmware_load_success(struct mwl8k_priv *priv);
5409static void mwl8k_fw_state_machine(const struct firmware *fw, void *context)
5410{
5411 struct mwl8k_priv *priv = context;
5412 struct mwl8k_device_info *di = priv->device_info;
5413 int rc;
5414
5415 switch (priv->fw_state) {
5416 case FW_STATE_INIT:
5417 if (!fw) {
5418 printk(KERN_ERR "%s: Error requesting helper fw %s\n",
5419 pci_name(priv->pdev), di->helper_image);
5420 goto fail;
5421 }
5422 priv->fw_helper = fw;
5423 rc = mwl8k_request_fw(priv, priv->fw_pref, &priv->fw_ucode,
5424 true);
5425 if (rc && priv->fw_alt) {
5426 rc = mwl8k_request_alt_fw(priv);
5427 if (rc)
5428 goto fail;
5429 priv->fw_state = FW_STATE_LOADING_ALT;
5430 } else if (rc)
5431 goto fail;
5432 else
5433 priv->fw_state = FW_STATE_LOADING_PREF;
5434 break;
5435
5436 case FW_STATE_LOADING_PREF:
5437 if (!fw) {
5438 if (priv->fw_alt) {
5439 rc = mwl8k_request_alt_fw(priv);
5440 if (rc)
5441 goto fail;
5442 priv->fw_state = FW_STATE_LOADING_ALT;
5443 } else
5444 goto fail;
5445 } else {
5446 priv->fw_ucode = fw;
5447 rc = mwl8k_firmware_load_success(priv);
5448 if (rc)
5449 goto fail;
5450 else
5451 complete(&priv->firmware_loading_complete);
5452 }
5453 break;
5454
5455 case FW_STATE_LOADING_ALT:
5456 if (!fw) {
5457 printk(KERN_ERR "%s: Error requesting alt fw %s\n",
5458 pci_name(priv->pdev), di->helper_image);
5459 goto fail;
5460 }
5461 priv->fw_ucode = fw;
5462 rc = mwl8k_firmware_load_success(priv);
5463 if (rc)
5464 goto fail;
5465 else
5466 complete(&priv->firmware_loading_complete);
5467 break;
5468
5469 default:
5470 printk(KERN_ERR "%s: Unexpected firmware loading state: %d\n",
5471 MWL8K_NAME, priv->fw_state);
5472 BUG_ON(1);
5473 }
5474
5475 return;
5476
5477fail:
5478 priv->fw_state = FW_STATE_ERROR;
5479 complete(&priv->firmware_loading_complete);
5480 device_release_driver(&priv->pdev->dev);
5481 mwl8k_release_firmware(priv);
5482}
5483
6b6accc3 5484#define MAX_RESTART_ATTEMPTS 1
99020471
BC		 5485static int mwl8k_init_firmware(struct ieee80211_hw *hw, char *fw_image,
5486 bool nowait)
a66098da 5487{
3cc7772c 5488 struct mwl8k_priv *priv = hw->priv;
a66098da 5489 int rc;
6b6accc3 5490 int count = MAX_RESTART_ATTEMPTS;
be695fc4 5491
6b6accc3 5492retry:
be695fc4
LB		 5493 /* Reset firmware and hardware */
5494 mwl8k_hw_reset(priv);
5495
5496 /* Ask userland hotplug daemon for the device firmware */
99020471 5497 rc = mwl8k_request_firmware(priv, fw_image, nowait);
be695fc4 5498 if (rc) {
5db55844 5499 wiphy_err(hw->wiphy, "Firmware files not found\n");
3cc7772c 5500 return rc;
be695fc4
LB		 5501 }
5502
99020471
BC		 5503 if (nowait)
5504 return rc;
5505
be695fc4
LB		 5506 /* Load firmware into hardware */
5507 rc = mwl8k_load_firmware(hw);
3cc7772c 5508 if (rc)
5db55844 5509 wiphy_err(hw->wiphy, "Cannot start firmware\n");
be695fc4
LB		 5510
5511 /* Reclaim memory once firmware is successfully loaded */
5512 mwl8k_release_firmware(priv);
5513
6b6accc3
YAP		 5514 if (rc && count) {
5515 /* FW did not start successfully;
5516 * lets try one more time
5517 */
5518 count--;
5519 wiphy_err(hw->wiphy, "Trying to reload the firmware again\n");
5520 msleep(20);
5521 goto retry;
5522 }
5523
3cc7772c
BC		 5524 return rc;
5525}
5526
73b46320
BC		 5527static int mwl8k_init_txqs(struct ieee80211_hw *hw)
5528{
5529 struct mwl8k_priv *priv = hw->priv;
5530 int rc = 0;
5531 int i;
5532
e600707b 5533 for (i = 0; i < mwl8k_tx_queues(priv); i++) {
73b46320
BC		 5534 rc = mwl8k_txq_init(hw, i);
5535 if (rc)
5536 break;
5537 if (priv->ap_fw)
5538 iowrite32(priv->txq[i].txd_dma,
5539 priv->sram + priv->txq_offset[i]);
5540 }
5541 return rc;
5542}
5543
3cc7772c
BC		 5544/* initialize hw after successfully loading a firmware image */
5545static int mwl8k_probe_hw(struct ieee80211_hw *hw)
5546{
5547 struct mwl8k_priv *priv = hw->priv;
5548 int rc = 0;
5549 int i;
be695fc4 5550
91942230 5551 if (priv->ap_fw) {
89a91f4f 5552 priv->rxd_ops = priv->device_info->ap_rxd_ops;
91942230 5553 if (priv->rxd_ops == NULL) {
c96c31e4
JP		 5554 wiphy_err(hw->wiphy,
5555 "Driver does not have AP firmware image support for this hardware\n");
91942230
LB		 5556 goto err_stop_firmware;
5557 }
5558 } else {
89a91f4f 5559 priv->rxd_ops = &rxd_sta_ops;
91942230 5560 }
be695fc4
LB		 5561
5562 priv->sniffer_enabled = false;
5563 priv->wmm_enabled = false;
5564 priv->pending_tx_pkts = 0;
c27a54d3 5565 atomic_set(&priv->watchdog_event_pending, 0);
be695fc4 5566
a66098da
LB		 5567 rc = mwl8k_rxq_init(hw, 0);
5568 if (rc)
3cc7772c 5569 goto err_stop_firmware;
a66098da
LB		 5570 rxq_refill(hw, 0, INT_MAX);
5571
73b46320
BC		 5572 /* For the sta firmware, we need to know the dma addresses of tx queues
5573 * before sending MWL8K_CMD_GET_HW_SPEC. So we must initialize them
5574 * prior to issuing this command. But for the AP case, we learn the
5575 * total number of queues from the result CMD_GET_HW_SPEC, so for this
5576 * case we must initialize the tx queues after.
5577 */
8a7a578c 5578 priv->num_ampdu_queues = 0;
73b46320
BC		 5579 if (!priv->ap_fw) {
5580 rc = mwl8k_init_txqs(hw);
a66098da
LB		 5581 if (rc)
5582 goto err_free_queues;
5583 }
5584
5585 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
c23b5a69 5586 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3aefc37e
NS		 5587 iowrite32(MWL8K_A2H_INT_TX_DONE|MWL8K_A2H_INT_RX_READY|
5588 MWL8K_A2H_INT_BA_WATCHDOG,
1e9f9de3 5589 priv->regs + MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL);
12488e01
NS		 5590 iowrite32(MWL8K_A2H_INT_OPC_DONE,
5591 priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
a66098da 5592
a0607fd3 5593 rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
a66098da
LB		 5594 IRQF_SHARED, MWL8K_NAME, hw);
5595 if (rc) {
5db55844 5596 wiphy_err(hw->wiphy, "failed to register IRQ handler\n");
a66098da
LB		 5597 goto err_free_queues;
5598 }
5599
6b6accc3
YAP		 5600 /*
5601 * When hw restart is requested,
5602 * mac80211 will take care of clearing
5603 * the ampdu streams, so do not clear
5604 * the ampdu state here
5605 */
5606 if (!priv->hw_restart_in_progress)
5607 memset(priv->ampdu, 0, sizeof(priv->ampdu));
ac109fd0 5608
a66098da
LB		 5609 /*
5610 * Temporarily enable interrupts. Initial firmware host
c2c2b12a 5611 * commands use interrupts and avoid polling. Disable
a66098da
LB		 5612 * interrupts when done.
5613 */
c23b5a69 5614 iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
a66098da
LB		 5615
5616 /* Get config data, mac addrs etc */
42fba21d
LB		 5617 if (priv->ap_fw) {
5618 rc = mwl8k_cmd_get_hw_spec_ap(hw);
73b46320
BC		 5619 if (!rc)
5620 rc = mwl8k_init_txqs(hw);
42fba21d
LB		 5621 if (!rc)
5622 rc = mwl8k_cmd_set_hw_spec(hw);
5623 } else {
5624 rc = mwl8k_cmd_get_hw_spec_sta(hw);
5625 }
a66098da 5626 if (rc) {
5db55844 5627 wiphy_err(hw->wiphy, "Cannot initialise firmware\n");
be695fc4 5628 goto err_free_irq;
a66098da
LB		 5629 }
5630
5631 /* Turn radio off */
55489b6e 5632 rc = mwl8k_cmd_radio_disable(hw);
a66098da 5633 if (rc) {
5db55844 5634 wiphy_err(hw->wiphy, "Cannot disable\n");
be695fc4 5635 goto err_free_irq;
a66098da
LB		 5636 }
5637
32060e1b 5638 /* Clear MAC address */
aa21d0f6 5639 rc = mwl8k_cmd_set_mac_addr(hw, NULL, "\x00\x00\x00\x00\x00\x00");
32060e1b 5640 if (rc) {
5db55844 5641 wiphy_err(hw->wiphy, "Cannot clear MAC address\n");
be695fc4 5642 goto err_free_irq;
32060e1b
LB		 5643 }
5644
a66098da 5645 /* Disable interrupts */
a66098da 5646 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
a66098da
LB		 5647 free_irq(priv->pdev->irq, hw);
5648
c96c31e4
JP		 5649 wiphy_info(hw->wiphy, "%s v%d, %pm, %s firmware %u.%u.%u.%u\n",
5650 priv->device_info->part_name,
5651 priv->hw_rev, hw->wiphy->perm_addr,
5652 priv->ap_fw ? "AP" : "STA",
5653 (priv->fw_rev >> 24) & 0xff, (priv->fw_rev >> 16) & 0xff,
5654 (priv->fw_rev >> 8) & 0xff, priv->fw_rev & 0xff);
a66098da
LB		 5655
5656 return 0;
5657
a66098da 5658err_free_irq:
a66098da 5659 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
a66098da
LB		 5660 free_irq(priv->pdev->irq, hw);
5661
5662err_free_queues:
e600707b 5663 for (i = 0; i < mwl8k_tx_queues(priv); i++)
a66098da
LB		 5664 mwl8k_txq_deinit(hw, i);
5665 mwl8k_rxq_deinit(hw, 0);
5666
3cc7772c
BC		 5667err_stop_firmware:
5668 mwl8k_hw_reset(priv);
5669
5670 return rc;
5671}
5672
5673/*
5674 * invoke mwl8k_reload_firmware to change the firmware image after the device
5675 * has already been registered
5676 */
5677static int mwl8k_reload_firmware(struct ieee80211_hw *hw, char *fw_image)
5678{
5679 int i, rc = 0;
5680 struct mwl8k_priv *priv = hw->priv;
6b6accc3 5681 struct mwl8k_vif *vif, *tmp_vif;
3cc7772c
BC		 5682
5683 mwl8k_stop(hw);
5684 mwl8k_rxq_deinit(hw, 0);
5685
6b6accc3
YAP		 5686 /*
5687 * All the existing interfaces are re-added by the ieee80211_reconfig;
5688 * which means driver should remove existing interfaces before calling
5689 * ieee80211_restart_hw
5690 */
5691 if (priv->hw_restart_in_progress)
5692 list_for_each_entry_safe(vif, tmp_vif, &priv->vif_list, list)
5693 mwl8k_remove_vif(priv, vif);
5694
e600707b 5695 for (i = 0; i < mwl8k_tx_queues(priv); i++)
3cc7772c
BC		 5696 mwl8k_txq_deinit(hw, i);
5697
99020471 5698 rc = mwl8k_init_firmware(hw, fw_image, false);
3cc7772c
BC		 5699 if (rc)
5700 goto fail;
5701
5702 rc = mwl8k_probe_hw(hw);
5703 if (rc)
5704 goto fail;
5705
6b6accc3
YAP		 5706 if (priv->hw_restart_in_progress)
5707 return rc;
5708
3cc7772c
BC		 5709 rc = mwl8k_start(hw);
5710 if (rc)
5711 goto fail;
5712
5713 rc = mwl8k_config(hw, ~0);
5714 if (rc)
5715 goto fail;
5716
e600707b 5717 for (i = 0; i < MWL8K_TX_WMM_QUEUES; i++) {
8a3a3c85 5718 rc = mwl8k_conf_tx(hw, NULL, i, &priv->wmm_params[i]);
3cc7772c
BC		 5719 if (rc)
5720 goto fail;
5721 }
5722
5723 return rc;
5724
5725fail:
5726 printk(KERN_WARNING "mwl8k: Failed to reload firmware image.\n");
5727 return rc;
5728}
5729
5d377fca
YAP		 5730static const struct ieee80211_iface_limit ap_if_limits[] = {
5731 { .max = 8, .types = BIT(NL80211_IFTYPE_AP) },
5732};
5733
5734static const struct ieee80211_iface_combination ap_if_comb = {
5735 .limits = ap_if_limits,
5736 .n_limits = ARRAY_SIZE(ap_if_limits),
5737 .max_interfaces = 8,
5738 .num_different_channels = 1,
5739};
5740
5741
3cc7772c
BC		 5742static int mwl8k_firmware_load_success(struct mwl8k_priv *priv)
5743{
5744 struct ieee80211_hw *hw = priv->hw;
5745 int i, rc;
5746
99020471
BC		 5747 rc = mwl8k_load_firmware(hw);
5748 mwl8k_release_firmware(priv);
5749 if (rc) {
5750 wiphy_err(hw->wiphy, "Cannot start firmware\n");
5751 return rc;
5752 }
5753
3cc7772c
BC		 5754 /*
5755 * Extra headroom is the size of the required DMA header
5756 * minus the size of the smallest 802.11 frame (CTS frame).
5757 */
5758 hw->extra_tx_headroom =
5759 sizeof(struct mwl8k_dma_data) - sizeof(struct ieee80211_cts);
5760
ff776cec
YAP		 5761 hw->extra_tx_headroom -= priv->ap_fw ? REDUCED_TX_HEADROOM : 0;
5762
3cc7772c
BC		 5763 hw->channel_change_time = 10;
5764
e600707b 5765 hw->queues = MWL8K_TX_WMM_QUEUES;
3cc7772c
BC		 5766
5767 /* Set rssi values to dBm */
0bf22c37 5768 hw->flags |= IEEE80211_HW_SIGNAL_DBM | IEEE80211_HW_HAS_RATE_CONTROL;
2a36a0ec
YAP		 5769
5770 /*
5771 * Ask mac80211 to not to trigger PS mode
5772 * based on PM bit of incoming frames.
5773 */
5774 if (priv->ap_fw)
5775 hw->flags |= IEEE80211_HW_AP_LINK_PS;
5776
3cc7772c
BC		 5777 hw->vif_data_size = sizeof(struct mwl8k_vif);
5778 hw->sta_data_size = sizeof(struct mwl8k_sta);
5779
5780 priv->macids_used = 0;
5781 INIT_LIST_HEAD(&priv->vif_list);
5782
5783 /* Set default radio state and preamble */
3db1cd5c
RR		 5784 priv->radio_on = false;
5785 priv->radio_short_preamble = false;
3cc7772c
BC		 5786
5787 /* Finalize join worker */
5788 INIT_WORK(&priv->finalize_join_worker, mwl8k_finalize_join_worker);
3aefc37e
NS		 5789 /* Handle watchdog ba events */
5790 INIT_WORK(&priv->watchdog_ba_handle, mwl8k_watchdog_ba_events);
6b6accc3
YAP		 5791 /* To reload the firmware if it crashes */
5792 INIT_WORK(&priv->fw_reload, mwl8k_hw_restart_work);
3cc7772c
BC		 5793
5794 /* TX reclaim and RX tasklets. */
5795 tasklet_init(&priv->poll_tx_task, mwl8k_tx_poll, (unsigned long)hw);
5796 tasklet_disable(&priv->poll_tx_task);
5797 tasklet_init(&priv->poll_rx_task, mwl8k_rx_poll, (unsigned long)hw);
5798 tasklet_disable(&priv->poll_rx_task);
5799
5800 /* Power management cookie */
5801 priv->cookie = pci_alloc_consistent(priv->pdev, 4, &priv->cookie_dma);
5802 if (priv->cookie == NULL)
5803 return -ENOMEM;
5804
5805 mutex_init(&priv->fw_mutex);
5806 priv->fw_mutex_owner = NULL;
5807 priv->fw_mutex_depth = 0;
5808 priv->hostcmd_wait = NULL;
5809
5810 spin_lock_init(&priv->tx_lock);
5811
ac109fd0
BC		 5812 spin_lock_init(&priv->stream_lock);
5813
3cc7772c
BC		 5814 priv->tx_wait = NULL;
5815
5816 rc = mwl8k_probe_hw(hw);
5817 if (rc)
5818 goto err_free_cookie;
5819
5820 hw->wiphy->interface_modes = 0;
5d377fca
YAP		 5821
5822 if (priv->ap_macids_supported || priv->device_info->fw_image_ap) {
3cc7772c 5823 hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_AP);
5d377fca
YAP		 5824 hw->wiphy->iface_combinations = &ap_if_comb;
5825 hw->wiphy->n_iface_combinations = 1;
5826 }
5827
3cc7772c
BC		 5828 if (priv->sta_macids_supported || priv->device_info->fw_image_sta)
5829 hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_STATION);
5830
5831 rc = ieee80211_register_hw(hw);
5832 if (rc) {
5833 wiphy_err(hw->wiphy, "Cannot register device\n");
5834 goto err_unprobe_hw;
5835 }
5836
5837 return 0;
5838
5839err_unprobe_hw:
e600707b 5840 for (i = 0; i < mwl8k_tx_queues(priv); i++)
3cc7772c
BC		 5841 mwl8k_txq_deinit(hw, i);
5842 mwl8k_rxq_deinit(hw, 0);
5843
be695fc4 5844err_free_cookie:
a66098da
LB		 5845 if (priv->cookie != NULL)
5846 pci_free_consistent(priv->pdev, 4,
5847 priv->cookie, priv->cookie_dma);
5848
3cc7772c
BC		 5849 return rc;
5850}
8dee5eef 5851static int mwl8k_probe(struct pci_dev *pdev,
3cc7772c
BC		 5852 const struct pci_device_id *id)
5853{
5854 static int printed_version;
5855 struct ieee80211_hw *hw;
5856 struct mwl8k_priv *priv;
0863ade8 5857 struct mwl8k_device_info *di;
3cc7772c
BC		 5858 int rc;
5859
5860 if (!printed_version) {
5861 printk(KERN_INFO "%s version %s\n", MWL8K_DESC, MWL8K_VERSION);
5862 printed_version = 1;
5863 }
5864
5865
5866 rc = pci_enable_device(pdev);
5867 if (rc) {
5868 printk(KERN_ERR "%s: Cannot enable new PCI device\n",
5869 MWL8K_NAME);
5870 return rc;
5871 }
5872
5873 rc = pci_request_regions(pdev, MWL8K_NAME);
5874 if (rc) {
5875 printk(KERN_ERR "%s: Cannot obtain PCI resources\n",
5876 MWL8K_NAME);
5877 goto err_disable_device;
5878 }
5879
5880 pci_set_master(pdev);
5881
5882
5883 hw = ieee80211_alloc_hw(sizeof(*priv), &mwl8k_ops);
5884 if (hw == NULL) {
5885 printk(KERN_ERR "%s: ieee80211 alloc failed\n", MWL8K_NAME);
5886 rc = -ENOMEM;
5887 goto err_free_reg;
5888 }
5889
5890 SET_IEEE80211_DEV(hw, &pdev->dev);
5891 pci_set_drvdata(pdev, hw);
5892
5893 priv = hw->priv;
5894 priv->hw = hw;
5895 priv->pdev = pdev;
5896 priv->device_info = &mwl8k_info_tbl[id->driver_data];
5897
5898
5899 priv->sram = pci_iomap(pdev, 0, 0x10000);
5900 if (priv->sram == NULL) {
5901 wiphy_err(hw->wiphy, "Cannot map device SRAM\n");
5902 goto err_iounmap;
5903 }
5904
5905 /*
5906 * If BAR0 is a 32 bit BAR, the register BAR will be BAR1.
5907 * If BAR0 is a 64 bit BAR, the register BAR will be BAR2.
5908 */
5909 priv->regs = pci_iomap(pdev, 1, 0x10000);
5910 if (priv->regs == NULL) {
5911 priv->regs = pci_iomap(pdev, 2, 0x10000);
5912 if (priv->regs == NULL) {
5913 wiphy_err(hw->wiphy, "Cannot map device registers\n");
5914 goto err_iounmap;
5915 }
5916 }
5917
0863ade8 5918 /*
99020471
BC		 5919 * Choose the initial fw image depending on user input. If a second
5920 * image is available, make it the alternative image that will be
5921 * loaded if the first one fails.
0863ade8 5922 */
99020471 5923 init_completion(&priv->firmware_loading_complete);
0863ade8 5924 di = priv->device_info;
99020471
BC		 5925 if (ap_mode_default && di->fw_image_ap) {
5926 priv->fw_pref = di->fw_image_ap;
5927 priv->fw_alt = di->fw_image_sta;
5928 } else if (!ap_mode_default && di->fw_image_sta) {
5929 priv->fw_pref = di->fw_image_sta;
5930 priv->fw_alt = di->fw_image_ap;
5931 } else if (ap_mode_default && !di->fw_image_ap && di->fw_image_sta) {
0863ade8 5932 printk(KERN_WARNING "AP fw is unavailable. Using STA fw.");
99020471 5933 priv->fw_pref = di->fw_image_sta;
0863ade8
BC		 5934 } else if (!ap_mode_default && !di->fw_image_sta && di->fw_image_ap) {
5935 printk(KERN_WARNING "STA fw is unavailable. Using AP fw.");
99020471
BC		 5936 priv->fw_pref = di->fw_image_ap;
5937 }
5938 rc = mwl8k_init_firmware(hw, priv->fw_pref, true);
3cc7772c
BC		 5939 if (rc)
5940 goto err_stop_firmware;
6b6accc3
YAP		 5941
5942 priv->hw_restart_in_progress = false;
5943
99020471 5944 return rc;
3cc7772c 5945
be695fc4
LB		 5946err_stop_firmware:
5947 mwl8k_hw_reset(priv);
be695fc4
LB		 5948
5949err_iounmap:
a66098da
LB		 5950 if (priv->regs != NULL)
5951 pci_iounmap(pdev, priv->regs);
5952
5b9482dd
LB		 5953 if (priv->sram != NULL)
5954 pci_iounmap(pdev, priv->sram);
5955
a66098da
LB		 5956 pci_set_drvdata(pdev, NULL);
5957 ieee80211_free_hw(hw);
5958
5959err_free_reg:
5960 pci_release_regions(pdev);
3db95e50
LB		 5961
5962err_disable_device:
a66098da
LB		 5963 pci_disable_device(pdev);
5964
5965 return rc;
5966}
5967
8dee5eef 5968static void mwl8k_remove(struct pci_dev *pdev)
a66098da
LB		 5969{
5970 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
5971 struct mwl8k_priv *priv;
5972 int i;
5973
5974 if (hw == NULL)
5975 return;
5976 priv = hw->priv;
5977
99020471
BC		 5978 wait_for_completion(&priv->firmware_loading_complete);
5979
5980 if (priv->fw_state == FW_STATE_ERROR) {
5981 mwl8k_hw_reset(priv);
5982 goto unmap;
5983 }
5984
a66098da
LB		 5985 ieee80211_stop_queues(hw);
5986
60aa569f
LB		 5987 ieee80211_unregister_hw(hw);
5988
67e2eb27 5989 /* Remove TX reclaim and RX tasklets. */
1e9f9de3 5990 tasklet_kill(&priv->poll_tx_task);
67e2eb27 5991 tasklet_kill(&priv->poll_rx_task);
a66098da 5992
a66098da
LB		 5993 /* Stop hardware */
5994 mwl8k_hw_reset(priv);
5995
5996 /* Return all skbs to mac80211 */
e600707b 5997 for (i = 0; i < mwl8k_tx_queues(priv); i++)
efb7c49a 5998 mwl8k_txq_reclaim(hw, i, INT_MAX, 1);
a66098da 5999
e600707b 6000 for (i = 0; i < mwl8k_tx_queues(priv); i++)
a66098da
LB		 6001 mwl8k_txq_deinit(hw, i);
6002
6003 mwl8k_rxq_deinit(hw, 0);
6004
c2c357ce 6005 pci_free_consistent(priv->pdev, 4, priv->cookie, priv->cookie_dma);
a66098da 6006
99020471 6007unmap:
a66098da 6008 pci_iounmap(pdev, priv->regs);
5b9482dd 6009 pci_iounmap(pdev, priv->sram);
a66098da
LB		 6010 pci_set_drvdata(pdev, NULL);
6011 ieee80211_free_hw(hw);
6012 pci_release_regions(pdev);
6013 pci_disable_device(pdev);
6014}
6015
6016static struct pci_driver mwl8k_driver = {
6017 .name = MWL8K_NAME,
45a390dd 6018 .id_table = mwl8k_pci_id_table,
a66098da 6019 .probe = mwl8k_probe,
8dee5eef 6020 .remove = mwl8k_remove,
a66098da
LB		 6021};
6022
5b0a3b7e 6023module_pci_driver(mwl8k_driver);
c2c357ce
LB		 6024
6025MODULE_DESCRIPTION(MWL8K_DESC);
6026MODULE_VERSION(MWL8K_VERSION);
6027MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>");
6028MODULE_LICENSE("GPL");
Linux kernel - Deliverables
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