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iwlwifi: fix possible data overwrite in hcmd callback
[deliverable/linux.git] / drivers / net / wireless / mwl8k.c
CommitLineData
a66098da 1/*
ce9e2e1b
LB		 2 * drivers/net/wireless/mwl8k.c
3 * Driver for Marvell TOPDOG 802.11 Wireless cards
a66098da 4 *
a5fb297d 5 * Copyright (C) 2008, 2009, 2010 Marvell Semiconductor Inc.
a66098da
LB		 6 *
7 * This file is licensed under the terms of the GNU General Public
8 * License version 2. This program is licensed "as is" without any
9 * warranty of any kind, whether express or implied.
10 */
11
12#include <linux/init.h>
13#include <linux/module.h>
14#include <linux/kernel.h>
3d76e82c 15#include <linux/sched.h>
a66098da
LB		 16#include <linux/spinlock.h>
17#include <linux/list.h>
18#include <linux/pci.h>
19#include <linux/delay.h>
20#include <linux/completion.h>
21#include <linux/etherdevice.h>
5a0e3ad6 22#include <linux/slab.h>
a66098da
LB		 23#include <net/mac80211.h>
24#include <linux/moduleparam.h>
25#include <linux/firmware.h>
26#include <linux/workqueue.h>
27
28#define MWL8K_DESC "Marvell TOPDOG(R) 802.11 Wireless Network Driver"
29#define MWL8K_NAME KBUILD_MODNAME
a5fb297d 30#define MWL8K_VERSION "0.12"
a66098da 31
0863ade8
BC		 32/* Module parameters */
33static unsigned ap_mode_default;
34module_param(ap_mode_default, bool, 0);
35MODULE_PARM_DESC(ap_mode_default,
36 "Set to 1 to make ap mode the default instead of sta mode");
37
a66098da
LB		 38/* Register definitions */
39#define MWL8K_HIU_GEN_PTR 0x00000c10
ce9e2e1b
LB		 40#define MWL8K_MODE_STA 0x0000005a
41#define MWL8K_MODE_AP 0x000000a5
a66098da 42#define MWL8K_HIU_INT_CODE 0x00000c14
ce9e2e1b
LB		 43#define MWL8K_FWSTA_READY 0xf0f1f2f4
44#define MWL8K_FWAP_READY 0xf1f2f4a5
45#define MWL8K_INT_CODE_CMD_FINISHED 0x00000005
a66098da
LB		 46#define MWL8K_HIU_SCRATCH 0x00000c40
47
48/* Host->device communications */
49#define MWL8K_HIU_H2A_INTERRUPT_EVENTS 0x00000c18
50#define MWL8K_HIU_H2A_INTERRUPT_STATUS 0x00000c1c
51#define MWL8K_HIU_H2A_INTERRUPT_MASK 0x00000c20
52#define MWL8K_HIU_H2A_INTERRUPT_CLEAR_SEL 0x00000c24
53#define MWL8K_HIU_H2A_INTERRUPT_STATUS_MASK 0x00000c28
ce9e2e1b
LB		 54#define MWL8K_H2A_INT_DUMMY (1 << 20)
55#define MWL8K_H2A_INT_RESET (1 << 15)
56#define MWL8K_H2A_INT_DOORBELL (1 << 1)
57#define MWL8K_H2A_INT_PPA_READY (1 << 0)
a66098da
LB		 58
59/* Device->host communications */
60#define MWL8K_HIU_A2H_INTERRUPT_EVENTS 0x00000c2c
61#define MWL8K_HIU_A2H_INTERRUPT_STATUS 0x00000c30
62#define MWL8K_HIU_A2H_INTERRUPT_MASK 0x00000c34
63#define MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL 0x00000c38
64#define MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK 0x00000c3c
ce9e2e1b 65#define MWL8K_A2H_INT_DUMMY (1 << 20)
3aefc37e 66#define MWL8K_A2H_INT_BA_WATCHDOG (1 << 14)
ce9e2e1b
LB		 67#define MWL8K_A2H_INT_CHNL_SWITCHED (1 << 11)
68#define MWL8K_A2H_INT_QUEUE_EMPTY (1 << 10)
69#define MWL8K_A2H_INT_RADAR_DETECT (1 << 7)
70#define MWL8K_A2H_INT_RADIO_ON (1 << 6)
71#define MWL8K_A2H_INT_RADIO_OFF (1 << 5)
72#define MWL8K_A2H_INT_MAC_EVENT (1 << 3)
73#define MWL8K_A2H_INT_OPC_DONE (1 << 2)
74#define MWL8K_A2H_INT_RX_READY (1 << 1)
75#define MWL8K_A2H_INT_TX_DONE (1 << 0)
a66098da
LB		 76
77#define MWL8K_A2H_EVENTS (MWL8K_A2H_INT_DUMMY | \
78 MWL8K_A2H_INT_CHNL_SWITCHED | \
79 MWL8K_A2H_INT_QUEUE_EMPTY | \
80 MWL8K_A2H_INT_RADAR_DETECT | \
81 MWL8K_A2H_INT_RADIO_ON | \
82 MWL8K_A2H_INT_RADIO_OFF | \
83 MWL8K_A2H_INT_MAC_EVENT | \
84 MWL8K_A2H_INT_OPC_DONE | \
85 MWL8K_A2H_INT_RX_READY | \
3aefc37e
NS		 86 MWL8K_A2H_INT_TX_DONE | \
87 MWL8K_A2H_INT_BA_WATCHDOG)
a66098da 88
a66098da 89#define MWL8K_RX_QUEUES 1
e600707b 90#define MWL8K_TX_WMM_QUEUES 4
8a7a578c 91#define MWL8K_MAX_AMPDU_QUEUES 8
e600707b
BC		 92#define MWL8K_MAX_TX_QUEUES (MWL8K_TX_WMM_QUEUES + MWL8K_MAX_AMPDU_QUEUES)
93#define mwl8k_tx_queues(priv) (MWL8K_TX_WMM_QUEUES + (priv)->num_ampdu_queues)
a66098da 94
54bc3a0d
LB		 95struct rxd_ops {
96 int rxd_size;
97 void (*rxd_init)(void *rxd, dma_addr_t next_dma_addr);
98 void (*rxd_refill)(void *rxd, dma_addr_t addr, int len);
20f09c3d 99 int (*rxd_process)(void *rxd, struct ieee80211_rx_status *status,
0d462bbb 100 __le16 *qos, s8 *noise);
54bc3a0d
LB		 101};
102
45a390dd 103struct mwl8k_device_info {
a74b295e
LB		 104 char *part_name;
105 char *helper_image;
0863ade8
BC		 106 char *fw_image_sta;
107 char *fw_image_ap;
89a91f4f 108 struct rxd_ops *ap_rxd_ops;
952a0e96 109 u32 fw_api_ap;
45a390dd
LB		 110};
111
a66098da 112struct mwl8k_rx_queue {
45eb400d 113 int rxd_count;
a66098da
LB		 114
115 /* hw receives here */
45eb400d 116 int head;
a66098da
LB		 117
118 /* refill descs here */
45eb400d 119 int tail;
a66098da 120
54bc3a0d 121 void *rxd;
45eb400d 122 dma_addr_t rxd_dma;
788838eb
LB		 123 struct {
124 struct sk_buff *skb;
53b1b3e1 125 DEFINE_DMA_UNMAP_ADDR(dma);
788838eb 126 } *buf;
a66098da
LB		 127};
128
a66098da
LB		 129struct mwl8k_tx_queue {
130 /* hw transmits here */
45eb400d 131 int head;
a66098da
LB		 132
133 /* sw appends here */
45eb400d 134 int tail;
a66098da 135
8ccbc3b8 136 unsigned int len;
45eb400d
LB		 137 struct mwl8k_tx_desc *txd;
138 dma_addr_t txd_dma;
139 struct sk_buff **skb;
a66098da
LB		 140};
141
ac109fd0
BC		 142enum {
143 AMPDU_NO_STREAM,
144 AMPDU_STREAM_NEW,
145 AMPDU_STREAM_IN_PROGRESS,
146 AMPDU_STREAM_ACTIVE,
147};
148
5faa1aff
NS		 149struct mwl8k_ampdu_stream {
150 struct ieee80211_sta *sta;
151 u8 tid;
152 u8 state;
153 u8 idx;
154 u8 txq_idx; /* index of this stream in priv->txq */
155};
156
a66098da 157struct mwl8k_priv {
a66098da 158 struct ieee80211_hw *hw;
a66098da 159 struct pci_dev *pdev;
bf3ca7f7 160 int irq;
a66098da 161
45a390dd
LB		 162 struct mwl8k_device_info *device_info;
163
be695fc4
LB		 164 void __iomem *sram;
165 void __iomem *regs;
166
167 /* firmware */
d1f9e41d
BC		 168 const struct firmware *fw_helper;
169 const struct firmware *fw_ucode;
a66098da 170
be695fc4
LB		 171 /* hardware/firmware parameters */
172 bool ap_fw;
173 struct rxd_ops *rxd_ops;
777ad375
LB		 174 struct ieee80211_supported_band band_24;
175 struct ieee80211_channel channels_24[14];
176 struct ieee80211_rate rates_24[14];
4eae9edd
LB		 177 struct ieee80211_supported_band band_50;
178 struct ieee80211_channel channels_50[4];
179 struct ieee80211_rate rates_50[9];
ee0ddf18
LB		 180 u32 ap_macids_supported;
181 u32 sta_macids_supported;
be695fc4 182
8a7a578c
BC		 183 /* Ampdu stream information */
184 u8 num_ampdu_queues;
ac109fd0
BC		 185 spinlock_t stream_lock;
186 struct mwl8k_ampdu_stream ampdu[MWL8K_MAX_AMPDU_QUEUES];
3aefc37e 187 struct work_struct watchdog_ba_handle;
8a7a578c 188
618952a7
LB		 189 /* firmware access */
190 struct mutex fw_mutex;
191 struct task_struct *fw_mutex_owner;
192 int fw_mutex_depth;
618952a7
LB		 193 struct completion *hostcmd_wait;
194
a66098da
LB		 195 /* lock held over TX and TX reap */
196 spinlock_t tx_lock;
a66098da 197
88de754a
LB		 198 /* TX quiesce completion, protected by fw_mutex and tx_lock */
199 struct completion *tx_wait;
200
f5bb87cf 201 /* List of interfaces. */
ee0ddf18 202 u32 macids_used;
f5bb87cf 203 struct list_head vif_list;
a66098da 204
a66098da
LB		 205 /* power management status cookie from firmware */
206 u32 *cookie;
207 dma_addr_t cookie_dma;
208
209 u16 num_mcaddrs;
a66098da 210 u8 hw_rev;
2aa7b01f 211 u32 fw_rev;
a66098da
LB		 212
213 /*
214 * Running count of TX packets in flight, to avoid
215 * iterating over the transmit rings each time.
216 */
217 int pending_tx_pkts;
218
219 struct mwl8k_rx_queue rxq[MWL8K_RX_QUEUES];
e600707b
BC		 220 struct mwl8k_tx_queue txq[MWL8K_MAX_TX_QUEUES];
221 u32 txq_offset[MWL8K_MAX_TX_QUEUES];
a66098da 222
c46563b7 223 bool radio_on;
68ce3884 224 bool radio_short_preamble;
a43c49a8 225 bool sniffer_enabled;
0439b1f5 226 bool wmm_enabled;
a66098da 227
a66098da
LB		 228 /* XXX need to convert this to handle multiple interfaces */
229 bool capture_beacon;
d89173f2 230 u8 capture_bssid[ETH_ALEN];
a66098da
LB		 231 struct sk_buff *beacon_skb;
232
233 /*
234 * This FJ worker has to be global as it is scheduled from the
235 * RX handler. At this point we don't know which interface it
236 * belongs to until the list of bssids waiting to complete join
237 * is checked.
238 */
239 struct work_struct finalize_join_worker;
240
1e9f9de3
LB		 241 /* Tasklet to perform TX reclaim. */
242 struct tasklet_struct poll_tx_task;
67e2eb27
LB		 243
244 /* Tasklet to perform RX. */
245 struct tasklet_struct poll_rx_task;
0d462bbb
JL		 246
247 /* Most recently reported noise in dBm */
248 s8 noise;
0863ade8
BC		 249
250 /*
251 * preserve the queue configurations so they can be restored if/when
252 * the firmware image is swapped.
253 */
e600707b 254 struct ieee80211_tx_queue_params wmm_params[MWL8K_TX_WMM_QUEUES];
99020471
BC		 255
256 /* async firmware loading state */
257 unsigned fw_state;
258 char *fw_pref;
259 char *fw_alt;
260 struct completion firmware_loading_complete;
a66098da
LB		 261};
262
e53d9b96
NS		 263#define MAX_WEP_KEY_LEN 13
264#define NUM_WEP_KEYS 4
265
a66098da
LB		 266/* Per interface specific private data */
267struct mwl8k_vif {
f5bb87cf
LB		 268 struct list_head list;
269 struct ieee80211_vif *vif;
270
f57ca9c1
LB		 271 /* Firmware macid for this vif. */
272 int macid;
273
c2c2b12a 274 /* Non AMPDU sequence number assigned by driver. */
a680400e 275 u16 seqno;
e53d9b96
NS		 276
277 /* Saved WEP keys */
278 struct {
279 u8 enabled;
280 u8 key[sizeof(struct ieee80211_key_conf) + MAX_WEP_KEY_LEN];
281 } wep_key_conf[NUM_WEP_KEYS];
d9a07d49
NS		 282
283 /* BSSID */
284 u8 bssid[ETH_ALEN];
285
286 /* A flag to indicate is HW crypto is enabled for this bssid */
287 bool is_hw_crypto_enabled;
a66098da 288};
a94cc97e 289#define MWL8K_VIF(_vif) ((struct mwl8k_vif *)&((_vif)->drv_priv))
fcdc403c 290#define IEEE80211_KEY_CONF(_u8) ((struct ieee80211_key_conf *)(_u8))
a66098da 291
d0805c1c
BC		 292struct tx_traffic_info {
293 u32 start_time;
294 u32 pkts;
295};
296
297#define MWL8K_MAX_TID 8
a680400e
LB		 298struct mwl8k_sta {
299 /* Index into station database. Returned by UPDATE_STADB. */
300 u8 peer_id;
17033543 301 u8 is_ampdu_allowed;
d0805c1c 302 struct tx_traffic_info tx_stats[MWL8K_MAX_TID];
a680400e
LB		 303};
304#define MWL8K_STA(_sta) ((struct mwl8k_sta *)&((_sta)->drv_priv))
305
777ad375 306static const struct ieee80211_channel mwl8k_channels_24[] = {
a66098da
LB		 307 { .center_freq = 2412, .hw_value = 1, },
308 { .center_freq = 2417, .hw_value = 2, },
309 { .center_freq = 2422, .hw_value = 3, },
310 { .center_freq = 2427, .hw_value = 4, },
311 { .center_freq = 2432, .hw_value = 5, },
312 { .center_freq = 2437, .hw_value = 6, },
313 { .center_freq = 2442, .hw_value = 7, },
314 { .center_freq = 2447, .hw_value = 8, },
315 { .center_freq = 2452, .hw_value = 9, },
316 { .center_freq = 2457, .hw_value = 10, },
317 { .center_freq = 2462, .hw_value = 11, },
647ca6b0
LB		 318 { .center_freq = 2467, .hw_value = 12, },
319 { .center_freq = 2472, .hw_value = 13, },
320 { .center_freq = 2484, .hw_value = 14, },
a66098da
LB		 321};
322
777ad375 323static const struct ieee80211_rate mwl8k_rates_24[] = {
a66098da
LB		 324 { .bitrate = 10, .hw_value = 2, },
325 { .bitrate = 20, .hw_value = 4, },
326 { .bitrate = 55, .hw_value = 11, },
5dfd3e2c
LB		 327 { .bitrate = 110, .hw_value = 22, },
328 { .bitrate = 220, .hw_value = 44, },
a66098da
LB		 329 { .bitrate = 60, .hw_value = 12, },
330 { .bitrate = 90, .hw_value = 18, },
a66098da
LB		 331 { .bitrate = 120, .hw_value = 24, },
332 { .bitrate = 180, .hw_value = 36, },
333 { .bitrate = 240, .hw_value = 48, },
334 { .bitrate = 360, .hw_value = 72, },
335 { .bitrate = 480, .hw_value = 96, },
336 { .bitrate = 540, .hw_value = 108, },
140eb5e2
LB		 337 { .bitrate = 720, .hw_value = 144, },
338};
339
4eae9edd
LB		 340static const struct ieee80211_channel mwl8k_channels_50[] = {
341 { .center_freq = 5180, .hw_value = 36, },
342 { .center_freq = 5200, .hw_value = 40, },
343 { .center_freq = 5220, .hw_value = 44, },
344 { .center_freq = 5240, .hw_value = 48, },
345};
346
347static const struct ieee80211_rate mwl8k_rates_50[] = {
348 { .bitrate = 60, .hw_value = 12, },
349 { .bitrate = 90, .hw_value = 18, },
350 { .bitrate = 120, .hw_value = 24, },
351 { .bitrate = 180, .hw_value = 36, },
352 { .bitrate = 240, .hw_value = 48, },
353 { .bitrate = 360, .hw_value = 72, },
354 { .bitrate = 480, .hw_value = 96, },
355 { .bitrate = 540, .hw_value = 108, },
356 { .bitrate = 720, .hw_value = 144, },
357};
358
a66098da 359/* Set or get info from Firmware */
a66098da 360#define MWL8K_CMD_GET 0x0000
41fdf097
NS		 361#define MWL8K_CMD_SET 0x0001
362#define MWL8K_CMD_SET_LIST 0x0002
a66098da
LB		 363
364/* Firmware command codes */
365#define MWL8K_CMD_CODE_DNLD 0x0001
366#define MWL8K_CMD_GET_HW_SPEC 0x0003
42fba21d 367#define MWL8K_CMD_SET_HW_SPEC 0x0004
a66098da
LB		 368#define MWL8K_CMD_MAC_MULTICAST_ADR 0x0010
369#define MWL8K_CMD_GET_STAT 0x0014
ff45fc60
LB		 370#define MWL8K_CMD_RADIO_CONTROL 0x001c
371#define MWL8K_CMD_RF_TX_POWER 0x001e
41fdf097 372#define MWL8K_CMD_TX_POWER 0x001f
08b06347 373#define MWL8K_CMD_RF_ANTENNA 0x0020
aa21d0f6 374#define MWL8K_CMD_SET_BEACON 0x0100 /* per-vif */
a66098da
LB		 375#define MWL8K_CMD_SET_PRE_SCAN 0x0107
376#define MWL8K_CMD_SET_POST_SCAN 0x0108
ff45fc60
LB		 377#define MWL8K_CMD_SET_RF_CHANNEL 0x010a
378#define MWL8K_CMD_SET_AID 0x010d
379#define MWL8K_CMD_SET_RATE 0x0110
380#define MWL8K_CMD_SET_FINALIZE_JOIN 0x0111
381#define MWL8K_CMD_RTS_THRESHOLD 0x0113
a66098da 382#define MWL8K_CMD_SET_SLOT 0x0114
ff45fc60
LB		 383#define MWL8K_CMD_SET_EDCA_PARAMS 0x0115
384#define MWL8K_CMD_SET_WMM_MODE 0x0123
a66098da 385#define MWL8K_CMD_MIMO_CONFIG 0x0125
ff45fc60 386#define MWL8K_CMD_USE_FIXED_RATE 0x0126
a66098da 387#define MWL8K_CMD_ENABLE_SNIFFER 0x0150
aa21d0f6 388#define MWL8K_CMD_SET_MAC_ADDR 0x0202 /* per-vif */
a66098da 389#define MWL8K_CMD_SET_RATEADAPT_MODE 0x0203
3aefc37e 390#define MWL8K_CMD_GET_WATCHDOG_BITMAP 0x0205
aa21d0f6
LB		 391#define MWL8K_CMD_BSS_START 0x1100 /* per-vif */
392#define MWL8K_CMD_SET_NEW_STN 0x1111 /* per-vif */
fcdc403c 393#define MWL8K_CMD_UPDATE_ENCRYPTION 0x1122 /* per-vif */
ff45fc60 394#define MWL8K_CMD_UPDATE_STADB 0x1123
5faa1aff 395#define MWL8K_CMD_BASTREAM 0x1125
a66098da 396
b603742f 397static const char *mwl8k_cmd_name(__le16 cmd, char *buf, int bufsize)
a66098da 398{
b603742f
JL		 399 u16 command = le16_to_cpu(cmd);
400
a66098da
LB		 401#define MWL8K_CMDNAME(x) case MWL8K_CMD_##x: do {\
402 snprintf(buf, bufsize, "%s", #x);\
403 return buf;\
404 } while (0)
b603742f 405 switch (command & ~0x8000) {
a66098da
LB		 406 MWL8K_CMDNAME(CODE_DNLD);
407 MWL8K_CMDNAME(GET_HW_SPEC);
42fba21d 408 MWL8K_CMDNAME(SET_HW_SPEC);
a66098da
LB		 409 MWL8K_CMDNAME(MAC_MULTICAST_ADR);
410 MWL8K_CMDNAME(GET_STAT);
411 MWL8K_CMDNAME(RADIO_CONTROL);
412 MWL8K_CMDNAME(RF_TX_POWER);
41fdf097 413 MWL8K_CMDNAME(TX_POWER);
08b06347 414 MWL8K_CMDNAME(RF_ANTENNA);
b64fe619 415 MWL8K_CMDNAME(SET_BEACON);
a66098da
LB		 416 MWL8K_CMDNAME(SET_PRE_SCAN);
417 MWL8K_CMDNAME(SET_POST_SCAN);
418 MWL8K_CMDNAME(SET_RF_CHANNEL);
ff45fc60
LB		 419 MWL8K_CMDNAME(SET_AID);
420 MWL8K_CMDNAME(SET_RATE);
421 MWL8K_CMDNAME(SET_FINALIZE_JOIN);
422 MWL8K_CMDNAME(RTS_THRESHOLD);
a66098da 423 MWL8K_CMDNAME(SET_SLOT);
ff45fc60
LB		 424 MWL8K_CMDNAME(SET_EDCA_PARAMS);
425 MWL8K_CMDNAME(SET_WMM_MODE);
a66098da 426 MWL8K_CMDNAME(MIMO_CONFIG);
ff45fc60 427 MWL8K_CMDNAME(USE_FIXED_RATE);
a66098da 428 MWL8K_CMDNAME(ENABLE_SNIFFER);
32060e1b 429 MWL8K_CMDNAME(SET_MAC_ADDR);
a66098da 430 MWL8K_CMDNAME(SET_RATEADAPT_MODE);
b64fe619 431 MWL8K_CMDNAME(BSS_START);
3f5610ff 432 MWL8K_CMDNAME(SET_NEW_STN);
fcdc403c 433 MWL8K_CMDNAME(UPDATE_ENCRYPTION);
ff45fc60 434 MWL8K_CMDNAME(UPDATE_STADB);
5faa1aff 435 MWL8K_CMDNAME(BASTREAM);
3aefc37e 436 MWL8K_CMDNAME(GET_WATCHDOG_BITMAP);
a66098da
LB		 437 default:
438 snprintf(buf, bufsize, "0x%x", cmd);
439 }
440#undef MWL8K_CMDNAME
441
442 return buf;
443}
444
445/* Hardware and firmware reset */
446static void mwl8k_hw_reset(struct mwl8k_priv *priv)
447{
448 iowrite32(MWL8K_H2A_INT_RESET,
449 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
450 iowrite32(MWL8K_H2A_INT_RESET,
451 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
452 msleep(20);
453}
454
455/* Release fw image */
d1f9e41d 456static void mwl8k_release_fw(const struct firmware **fw)
a66098da
LB		 457{
458 if (*fw == NULL)
459 return;
460 release_firmware(*fw);
461 *fw = NULL;
462}
463
464static void mwl8k_release_firmware(struct mwl8k_priv *priv)
465{
22be40d9
LB		 466 mwl8k_release_fw(&priv->fw_ucode);
467 mwl8k_release_fw(&priv->fw_helper);
a66098da
LB		 468}
469
99020471
BC		 470/* states for asynchronous f/w loading */
471static void mwl8k_fw_state_machine(const struct firmware *fw, void *context);
472enum {
473 FW_STATE_INIT = 0,
474 FW_STATE_LOADING_PREF,
475 FW_STATE_LOADING_ALT,
476 FW_STATE_ERROR,
477};
478
a66098da
LB		 479/* Request fw image */
480static int mwl8k_request_fw(struct mwl8k_priv *priv,
d1f9e41d 481 const char *fname, const struct firmware **fw,
99020471 482 bool nowait)
a66098da
LB		 483{
484 /* release current image */
485 if (*fw != NULL)
486 mwl8k_release_fw(fw);
487
99020471
BC		 488 if (nowait)
489 return request_firmware_nowait(THIS_MODULE, 1, fname,
490 &priv->pdev->dev, GFP_KERNEL,
491 priv, mwl8k_fw_state_machine);
492 else
d1f9e41d 493 return request_firmware(fw, fname, &priv->pdev->dev);
a66098da
LB		 494}
495
99020471
BC		 496static int mwl8k_request_firmware(struct mwl8k_priv *priv, char *fw_image,
497 bool nowait)
a66098da 498{
a74b295e 499 struct mwl8k_device_info *di = priv->device_info;
a66098da
LB		 500 int rc;
501
a74b295e 502 if (di->helper_image != NULL) {
99020471
BC		 503 if (nowait)
504 rc = mwl8k_request_fw(priv, di->helper_image,
505 &priv->fw_helper, true);
506 else
507 rc = mwl8k_request_fw(priv, di->helper_image,
508 &priv->fw_helper, false);
509 if (rc)
510 printk(KERN_ERR "%s: Error requesting helper fw %s\n",
511 pci_name(priv->pdev), di->helper_image);
512
513 if (rc || nowait)
a74b295e 514 return rc;
a66098da
LB		 515 }
516
99020471
BC		 517 if (nowait) {
518 /*
519 * if we get here, no helper image is needed. Skip the
520 * FW_STATE_INIT state.
521 */
522 priv->fw_state = FW_STATE_LOADING_PREF;
523 rc = mwl8k_request_fw(priv, fw_image,
524 &priv->fw_ucode,
525 true);
526 } else
527 rc = mwl8k_request_fw(priv, fw_image,
528 &priv->fw_ucode, false);
a66098da 529 if (rc) {
c2c357ce 530 printk(KERN_ERR "%s: Error requesting firmware file %s\n",
0863ade8 531 pci_name(priv->pdev), fw_image);
22be40d9 532 mwl8k_release_fw(&priv->fw_helper);
a66098da
LB		 533 return rc;
534 }
535
536 return 0;
537}
538
539struct mwl8k_cmd_pkt {
540 __le16 code;
541 __le16 length;
f57ca9c1
LB		 542 __u8 seq_num;
543 __u8 macid;
a66098da
LB		 544 __le16 result;
545 char payload[0];
ba2d3587 546} __packed;
a66098da
LB		 547
548/*
549 * Firmware loading.
550 */
551static int
552mwl8k_send_fw_load_cmd(struct mwl8k_priv *priv, void *data, int length)
553{
554 void __iomem *regs = priv->regs;
555 dma_addr_t dma_addr;
a66098da
LB		 556 int loops;
557
558 dma_addr = pci_map_single(priv->pdev, data, length, PCI_DMA_TODEVICE);
559 if (pci_dma_mapping_error(priv->pdev, dma_addr))
560 return -ENOMEM;
561
562 iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
563 iowrite32(0, regs + MWL8K_HIU_INT_CODE);
564 iowrite32(MWL8K_H2A_INT_DOORBELL,
565 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
566 iowrite32(MWL8K_H2A_INT_DUMMY,
567 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
568
a66098da
LB		 569 loops = 1000;
570 do {
571 u32 int_code;
572
573 int_code = ioread32(regs + MWL8K_HIU_INT_CODE);
574 if (int_code == MWL8K_INT_CODE_CMD_FINISHED) {
575 iowrite32(0, regs + MWL8K_HIU_INT_CODE);
a66098da
LB		 576 break;
577 }
578
3d76e82c 579 cond_resched();
a66098da
LB		 580 udelay(1);
581 } while (--loops);
582
583 pci_unmap_single(priv->pdev, dma_addr, length, PCI_DMA_TODEVICE);
584
d4b70570 585 return loops ? 0 : -ETIMEDOUT;
a66098da
LB		 586}
587
588static int mwl8k_load_fw_image(struct mwl8k_priv *priv,
589 const u8 *data, size_t length)
590{
591 struct mwl8k_cmd_pkt *cmd;
592 int done;
593 int rc = 0;
594
595 cmd = kmalloc(sizeof(*cmd) + 256, GFP_KERNEL);
596 if (cmd == NULL)
597 return -ENOMEM;
598
599 cmd->code = cpu_to_le16(MWL8K_CMD_CODE_DNLD);
600 cmd->seq_num = 0;
f57ca9c1 601 cmd->macid = 0;
a66098da
LB		 602 cmd->result = 0;
603
604 done = 0;
605 while (length) {
606 int block_size = length > 256 ? 256 : length;
607
608 memcpy(cmd->payload, data + done, block_size);
609 cmd->length = cpu_to_le16(block_size);
610
611 rc = mwl8k_send_fw_load_cmd(priv, cmd,
612 sizeof(*cmd) + block_size);
613 if (rc)
614 break;
615
616 done += block_size;
617 length -= block_size;
618 }
619
620 if (!rc) {
621 cmd->length = 0;
622 rc = mwl8k_send_fw_load_cmd(priv, cmd, sizeof(*cmd));
623 }
624
625 kfree(cmd);
626
627 return rc;
628}
629
630static int mwl8k_feed_fw_image(struct mwl8k_priv *priv,
631 const u8 *data, size_t length)
632{
633 unsigned char *buffer;
634 int may_continue, rc = 0;
635 u32 done, prev_block_size;
636
637 buffer = kmalloc(1024, GFP_KERNEL);
638 if (buffer == NULL)
639 return -ENOMEM;
640
641 done = 0;
642 prev_block_size = 0;
643 may_continue = 1000;
644 while (may_continue > 0) {
645 u32 block_size;
646
647 block_size = ioread32(priv->regs + MWL8K_HIU_SCRATCH);
648 if (block_size & 1) {
649 block_size &= ~1;
650 may_continue--;
651 } else {
652 done += prev_block_size;
653 length -= prev_block_size;
654 }
655
656 if (block_size > 1024 || block_size > length) {
657 rc = -EOVERFLOW;
658 break;
659 }
660
661 if (length == 0) {
662 rc = 0;
663 break;
664 }
665
666 if (block_size == 0) {
667 rc = -EPROTO;
668 may_continue--;
669 udelay(1);
670 continue;
671 }
672
673 prev_block_size = block_size;
674 memcpy(buffer, data + done, block_size);
675
676 rc = mwl8k_send_fw_load_cmd(priv, buffer, block_size);
677 if (rc)
678 break;
679 }
680
681 if (!rc && length != 0)
682 rc = -EREMOTEIO;
683
684 kfree(buffer);
685
686 return rc;
687}
688
c2c357ce 689static int mwl8k_load_firmware(struct ieee80211_hw *hw)
a66098da 690{
c2c357ce 691 struct mwl8k_priv *priv = hw->priv;
d1f9e41d 692 const struct firmware *fw = priv->fw_ucode;
c2c357ce
LB		 693 int rc;
694 int loops;
695
696 if (!memcmp(fw->data, "\x01\x00\x00\x00", 4)) {
d1f9e41d 697 const struct firmware *helper = priv->fw_helper;
a66098da 698
c2c357ce
LB		 699 if (helper == NULL) {
700 printk(KERN_ERR "%s: helper image needed but none "
701 "given\n", pci_name(priv->pdev));
702 return -EINVAL;
703 }
a66098da 704
c2c357ce 705 rc = mwl8k_load_fw_image(priv, helper->data, helper->size);
a66098da
LB		 706 if (rc) {
707 printk(KERN_ERR "%s: unable to load firmware "
c2c357ce 708 "helper image\n", pci_name(priv->pdev));
a66098da
LB		 709 return rc;
710 }
ba30c4a5 711 msleep(20);
a66098da 712
c2c357ce 713 rc = mwl8k_feed_fw_image(priv, fw->data, fw->size);
a66098da 714 } else {
c2c357ce 715 rc = mwl8k_load_fw_image(priv, fw->data, fw->size);
a66098da
LB		 716 }
717
718 if (rc) {
c2c357ce
LB		 719 printk(KERN_ERR "%s: unable to load firmware image\n",
720 pci_name(priv->pdev));
a66098da
LB		 721 return rc;
722 }
723
89a91f4f 724 iowrite32(MWL8K_MODE_STA, priv->regs + MWL8K_HIU_GEN_PTR);
a66098da 725
89b872e2 726 loops = 500000;
a66098da 727 do {
eae74e65
LB		 728 u32 ready_code;
729
730 ready_code = ioread32(priv->regs + MWL8K_HIU_INT_CODE);
731 if (ready_code == MWL8K_FWAP_READY) {
732 priv->ap_fw = 1;
733 break;
734 } else if (ready_code == MWL8K_FWSTA_READY) {
735 priv->ap_fw = 0;
a66098da 736 break;
eae74e65
LB		 737 }
738
739 cond_resched();
a66098da
LB		 740 udelay(1);
741 } while (--loops);
742
743 return loops ? 0 : -ETIMEDOUT;
744}
745
746
a66098da
LB		 747/* DMA header used by firmware and hardware. */
748struct mwl8k_dma_data {
749 __le16 fwlen;
750 struct ieee80211_hdr wh;
20f09c3d 751 char data[0];
ba2d3587 752} __packed;
a66098da
LB		 753
754/* Routines to add/remove DMA header from skb. */
20f09c3d 755static inline void mwl8k_remove_dma_header(struct sk_buff *skb, __le16 qos)
a66098da 756{
20f09c3d
LB		 757 struct mwl8k_dma_data *tr;
758 int hdrlen;
759
760 tr = (struct mwl8k_dma_data *)skb->data;
761 hdrlen = ieee80211_hdrlen(tr->wh.frame_control);
762
763 if (hdrlen != sizeof(tr->wh)) {
764 if (ieee80211_is_data_qos(tr->wh.frame_control)) {
765 memmove(tr->data - hdrlen, &tr->wh, hdrlen - 2);
766 *((__le16 *)(tr->data - 2)) = qos;
767 } else {
768 memmove(tr->data - hdrlen, &tr->wh, hdrlen);
769 }
a66098da 770 }
20f09c3d
LB		 771
772 if (hdrlen != sizeof(*tr))
773 skb_pull(skb, sizeof(*tr) - hdrlen);
a66098da
LB		 774}
775
252486a1
NS		 776static void
777mwl8k_add_dma_header(struct sk_buff *skb, int tail_pad)
a66098da
LB		 778{
779 struct ieee80211_hdr *wh;
ca009301 780 int hdrlen;
252486a1 781 int reqd_hdrlen;
a66098da
LB		 782 struct mwl8k_dma_data *tr;
783
ca009301
LB		 784 /*
785 * Add a firmware DMA header; the firmware requires that we
786 * present a 2-byte payload length followed by a 4-address
787 * header (without QoS field), followed (optionally) by any
788 * WEP/ExtIV header (but only filled in for CCMP).
789 */
a66098da 790 wh = (struct ieee80211_hdr *)skb->data;
ca009301 791
a66098da 792 hdrlen = ieee80211_hdrlen(wh->frame_control);
252486a1
NS		 793 reqd_hdrlen = sizeof(*tr);
794
795 if (hdrlen != reqd_hdrlen)
796 skb_push(skb, reqd_hdrlen - hdrlen);
a66098da 797
ca009301 798 if (ieee80211_is_data_qos(wh->frame_control))
252486a1 799 hdrlen -= IEEE80211_QOS_CTL_LEN;
a66098da
LB		 800
801 tr = (struct mwl8k_dma_data *)skb->data;
802 if (wh != &tr->wh)
803 memmove(&tr->wh, wh, hdrlen);
ca009301
LB		 804 if (hdrlen != sizeof(tr->wh))
805 memset(((void *)&tr->wh) + hdrlen, 0, sizeof(tr->wh) - hdrlen);
a66098da
LB		 806
807 /*
808 * Firmware length is the length of the fully formed "802.11
809 * payload". That is, everything except for the 802.11 header.
810 * This includes all crypto material including the MIC.
811 */
252486a1 812 tr->fwlen = cpu_to_le16(skb->len - sizeof(*tr) + tail_pad);
a66098da
LB		 813}
814
e53d9b96
NS		 815static void mwl8k_encapsulate_tx_frame(struct sk_buff *skb)
816{
817 struct ieee80211_hdr *wh;
818 struct ieee80211_tx_info *tx_info;
819 struct ieee80211_key_conf *key_conf;
820 int data_pad;
821
822 wh = (struct ieee80211_hdr *)skb->data;
823
824 tx_info = IEEE80211_SKB_CB(skb);
825
826 key_conf = NULL;
827 if (ieee80211_is_data(wh->frame_control))
828 key_conf = tx_info->control.hw_key;
829
830 /*
831 * Make sure the packet header is in the DMA header format (4-address
832 * without QoS), the necessary crypto padding between the header and the
ba30c4a5
YAP		 833 * payload has already been provided by mac80211, but it doesn't add
834 * tail padding when HW crypto is enabled.
e53d9b96
NS		 835 *
836 * We have the following trailer padding requirements:
837 * - WEP: 4 trailer bytes (ICV)
838 * - TKIP: 12 trailer bytes (8 MIC + 4 ICV)
839 * - CCMP: 8 trailer bytes (MIC)
840 */
841 data_pad = 0;
842 if (key_conf != NULL) {
843 switch (key_conf->cipher) {
844 case WLAN_CIPHER_SUITE_WEP40:
845 case WLAN_CIPHER_SUITE_WEP104:
846 data_pad = 4;
847 break;
848 case WLAN_CIPHER_SUITE_TKIP:
849 data_pad = 12;
850 break;
851 case WLAN_CIPHER_SUITE_CCMP:
852 data_pad = 8;
853 break;
854 }
855 }
856 mwl8k_add_dma_header(skb, data_pad);
857}
a66098da
LB		 858
859/*
89a91f4f 860 * Packet reception for 88w8366 AP firmware.
6f6d1e9a 861 */
89a91f4f 862struct mwl8k_rxd_8366_ap {
6f6d1e9a
LB		 863 __le16 pkt_len;
864 __u8 sq2;
865 __u8 rate;
866 __le32 pkt_phys_addr;
867 __le32 next_rxd_phys_addr;
868 __le16 qos_control;
869 __le16 htsig2;
870 __le32 hw_rssi_info;
871 __le32 hw_noise_floor_info;
872 __u8 noise_floor;
873 __u8 pad0[3];
874 __u8 rssi;
875 __u8 rx_status;
876 __u8 channel;
877 __u8 rx_ctrl;
ba2d3587 878} __packed;
6f6d1e9a 879
89a91f4f
LB		 880#define MWL8K_8366_AP_RATE_INFO_MCS_FORMAT 0x80
881#define MWL8K_8366_AP_RATE_INFO_40MHZ 0x40
882#define MWL8K_8366_AP_RATE_INFO_RATEID(x) ((x) & 0x3f)
8e9f33f0 883
89a91f4f 884#define MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST 0x80
6f6d1e9a 885
d9a07d49
NS		 886/* 8366 AP rx_status bits */
887#define MWL8K_8366_AP_RXSTAT_DECRYPT_ERR_MASK 0x80
888#define MWL8K_8366_AP_RXSTAT_GENERAL_DECRYPT_ERR 0xFF
889#define MWL8K_8366_AP_RXSTAT_TKIP_DECRYPT_MIC_ERR 0x02
890#define MWL8K_8366_AP_RXSTAT_WEP_DECRYPT_ICV_ERR 0x04
891#define MWL8K_8366_AP_RXSTAT_TKIP_DECRYPT_ICV_ERR 0x08
892
89a91f4f 893static void mwl8k_rxd_8366_ap_init(void *_rxd, dma_addr_t next_dma_addr)
6f6d1e9a 894{
89a91f4f 895 struct mwl8k_rxd_8366_ap *rxd = _rxd;
6f6d1e9a
LB		 896
897 rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
89a91f4f 898 rxd->rx_ctrl = MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST;
6f6d1e9a
LB		 899}
900
89a91f4f 901static void mwl8k_rxd_8366_ap_refill(void *_rxd, dma_addr_t addr, int len)
6f6d1e9a 902{
89a91f4f 903 struct mwl8k_rxd_8366_ap *rxd = _rxd;
6f6d1e9a
LB		 904
905 rxd->pkt_len = cpu_to_le16(len);
906 rxd->pkt_phys_addr = cpu_to_le32(addr);
907 wmb();
908 rxd->rx_ctrl = 0;
909}
910
911static int
89a91f4f 912mwl8k_rxd_8366_ap_process(void *_rxd, struct ieee80211_rx_status *status,
0d462bbb 913 __le16 *qos, s8 *noise)
6f6d1e9a 914{
89a91f4f 915 struct mwl8k_rxd_8366_ap *rxd = _rxd;
6f6d1e9a 916
89a91f4f 917 if (!(rxd->rx_ctrl & MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST))
6f6d1e9a
LB		 918 return -1;
919 rmb();
920
921 memset(status, 0, sizeof(*status));
922
923 status->signal = -rxd->rssi;
0d462bbb 924 *noise = -rxd->noise_floor;
6f6d1e9a 925
89a91f4f 926 if (rxd->rate & MWL8K_8366_AP_RATE_INFO_MCS_FORMAT) {
6f6d1e9a 927 status->flag |= RX_FLAG_HT;
89a91f4f 928 if (rxd->rate & MWL8K_8366_AP_RATE_INFO_40MHZ)
8e9f33f0 929 status->flag |= RX_FLAG_40MHZ;
89a91f4f 930 status->rate_idx = MWL8K_8366_AP_RATE_INFO_RATEID(rxd->rate);
6f6d1e9a
LB		 931 } else {
932 int i;
933
777ad375
LB		 934 for (i = 0; i < ARRAY_SIZE(mwl8k_rates_24); i++) {
935 if (mwl8k_rates_24[i].hw_value == rxd->rate) {
6f6d1e9a
LB		 936 status->rate_idx = i;
937 break;
938 }
939 }
940 }
941
85478344
LB		 942 if (rxd->channel > 14) {
943 status->band = IEEE80211_BAND_5GHZ;
944 if (!(status->flag & RX_FLAG_HT))
945 status->rate_idx -= 5;
946 } else {
947 status->band = IEEE80211_BAND_2GHZ;
948 }
59eb21a6
BR		 949 status->freq = ieee80211_channel_to_frequency(rxd->channel,
950 status->band);
6f6d1e9a 951
20f09c3d
LB		 952 *qos = rxd->qos_control;
953
d9a07d49
NS		 954 if ((rxd->rx_status != MWL8K_8366_AP_RXSTAT_GENERAL_DECRYPT_ERR) &&
955 (rxd->rx_status & MWL8K_8366_AP_RXSTAT_DECRYPT_ERR_MASK) &&
956 (rxd->rx_status & MWL8K_8366_AP_RXSTAT_TKIP_DECRYPT_MIC_ERR))
957 status->flag |= RX_FLAG_MMIC_ERROR;
958
6f6d1e9a
LB		 959 return le16_to_cpu(rxd->pkt_len);
960}
961
89a91f4f
LB		 962static struct rxd_ops rxd_8366_ap_ops = {
963 .rxd_size = sizeof(struct mwl8k_rxd_8366_ap),
964 .rxd_init = mwl8k_rxd_8366_ap_init,
965 .rxd_refill = mwl8k_rxd_8366_ap_refill,
966 .rxd_process = mwl8k_rxd_8366_ap_process,
6f6d1e9a
LB		 967};
968
969/*
89a91f4f 970 * Packet reception for STA firmware.
a66098da 971 */
89a91f4f 972struct mwl8k_rxd_sta {
a66098da
LB		 973 __le16 pkt_len;
974 __u8 link_quality;
975 __u8 noise_level;
976 __le32 pkt_phys_addr;
45eb400d 977 __le32 next_rxd_phys_addr;
a66098da
LB		 978 __le16 qos_control;
979 __le16 rate_info;
980 __le32 pad0[4];
981 __u8 rssi;
982 __u8 channel;
983 __le16 pad1;
984 __u8 rx_ctrl;
985 __u8 rx_status;
986 __u8 pad2[2];
ba2d3587 987} __packed;
a66098da 988
89a91f4f
LB		 989#define MWL8K_STA_RATE_INFO_SHORTPRE 0x8000
990#define MWL8K_STA_RATE_INFO_ANTSELECT(x) (((x) >> 11) & 0x3)
991#define MWL8K_STA_RATE_INFO_RATEID(x) (((x) >> 3) & 0x3f)
992#define MWL8K_STA_RATE_INFO_40MHZ 0x0004
993#define MWL8K_STA_RATE_INFO_SHORTGI 0x0002
994#define MWL8K_STA_RATE_INFO_MCS_FORMAT 0x0001
54bc3a0d 995
89a91f4f 996#define MWL8K_STA_RX_CTRL_OWNED_BY_HOST 0x02
d9a07d49
NS		 997#define MWL8K_STA_RX_CTRL_DECRYPT_ERROR 0x04
998/* ICV=0 or MIC=1 */
999#define MWL8K_STA_RX_CTRL_DEC_ERR_TYPE 0x08
1000/* Key is uploaded only in failure case */
1001#define MWL8K_STA_RX_CTRL_KEY_INDEX 0x30
54bc3a0d 1002
89a91f4f 1003static void mwl8k_rxd_sta_init(void *_rxd, dma_addr_t next_dma_addr)
54bc3a0d 1004{
89a91f4f 1005 struct mwl8k_rxd_sta *rxd = _rxd;
54bc3a0d
LB		 1006
1007 rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
89a91f4f 1008 rxd->rx_ctrl = MWL8K_STA_RX_CTRL_OWNED_BY_HOST;
54bc3a0d
LB		 1009}
1010
89a91f4f 1011static void mwl8k_rxd_sta_refill(void *_rxd, dma_addr_t addr, int len)
54bc3a0d 1012{
89a91f4f 1013 struct mwl8k_rxd_sta *rxd = _rxd;
54bc3a0d
LB		 1014
1015 rxd->pkt_len = cpu_to_le16(len);
1016 rxd->pkt_phys_addr = cpu_to_le32(addr);
1017 wmb();
1018 rxd->rx_ctrl = 0;
1019}
1020
1021static int
89a91f4f 1022mwl8k_rxd_sta_process(void *_rxd, struct ieee80211_rx_status *status,
0d462bbb 1023 __le16 *qos, s8 *noise)
54bc3a0d 1024{
89a91f4f 1025 struct mwl8k_rxd_sta *rxd = _rxd;
54bc3a0d
LB		 1026 u16 rate_info;
1027
89a91f4f 1028 if (!(rxd->rx_ctrl & MWL8K_STA_RX_CTRL_OWNED_BY_HOST))
54bc3a0d
LB		 1029 return -1;
1030 rmb();
1031
1032 rate_info = le16_to_cpu(rxd->rate_info);
1033
1034 memset(status, 0, sizeof(*status));
1035
1036 status->signal = -rxd->rssi;
0d462bbb 1037 *noise = -rxd->noise_level;
89a91f4f
LB		 1038 status->antenna = MWL8K_STA_RATE_INFO_ANTSELECT(rate_info);
1039 status->rate_idx = MWL8K_STA_RATE_INFO_RATEID(rate_info);
54bc3a0d 1040
89a91f4f 1041 if (rate_info & MWL8K_STA_RATE_INFO_SHORTPRE)
54bc3a0d 1042 status->flag |= RX_FLAG_SHORTPRE;
89a91f4f 1043 if (rate_info & MWL8K_STA_RATE_INFO_40MHZ)
54bc3a0d 1044 status->flag |= RX_FLAG_40MHZ;
89a91f4f 1045 if (rate_info & MWL8K_STA_RATE_INFO_SHORTGI)
54bc3a0d 1046 status->flag |= RX_FLAG_SHORT_GI;
89a91f4f 1047 if (rate_info & MWL8K_STA_RATE_INFO_MCS_FORMAT)
54bc3a0d
LB		 1048 status->flag |= RX_FLAG_HT;
1049
85478344
LB		 1050 if (rxd->channel > 14) {
1051 status->band = IEEE80211_BAND_5GHZ;
1052 if (!(status->flag & RX_FLAG_HT))
1053 status->rate_idx -= 5;
1054 } else {
1055 status->band = IEEE80211_BAND_2GHZ;
1056 }
59eb21a6
BR		 1057 status->freq = ieee80211_channel_to_frequency(rxd->channel,
1058 status->band);
54bc3a0d 1059
20f09c3d 1060 *qos = rxd->qos_control;
d9a07d49
NS		 1061 if ((rxd->rx_ctrl & MWL8K_STA_RX_CTRL_DECRYPT_ERROR) &&
1062 (rxd->rx_ctrl & MWL8K_STA_RX_CTRL_DEC_ERR_TYPE))
1063 status->flag |= RX_FLAG_MMIC_ERROR;
20f09c3d 1064
54bc3a0d
LB		 1065 return le16_to_cpu(rxd->pkt_len);
1066}
1067
89a91f4f
LB		 1068static struct rxd_ops rxd_sta_ops = {
1069 .rxd_size = sizeof(struct mwl8k_rxd_sta),
1070 .rxd_init = mwl8k_rxd_sta_init,
1071 .rxd_refill = mwl8k_rxd_sta_refill,
1072 .rxd_process = mwl8k_rxd_sta_process,
54bc3a0d
LB		 1073};
1074
1075
a66098da
LB		 1076#define MWL8K_RX_DESCS 256
1077#define MWL8K_RX_MAXSZ 3800
1078
1079static int mwl8k_rxq_init(struct ieee80211_hw *hw, int index)
1080{
1081 struct mwl8k_priv *priv = hw->priv;
1082 struct mwl8k_rx_queue *rxq = priv->rxq + index;
1083 int size;
1084 int i;
1085
45eb400d
LB		 1086 rxq->rxd_count = 0;
1087 rxq->head = 0;
1088 rxq->tail = 0;
a66098da 1089
54bc3a0d 1090 size = MWL8K_RX_DESCS * priv->rxd_ops->rxd_size;
a66098da 1091
45eb400d
LB		 1092 rxq->rxd = pci_alloc_consistent(priv->pdev, size, &rxq->rxd_dma);
1093 if (rxq->rxd == NULL) {
5db55844 1094 wiphy_err(hw->wiphy, "failed to alloc RX descriptors\n");
a66098da
LB		 1095 return -ENOMEM;
1096 }
45eb400d 1097 memset(rxq->rxd, 0, size);
a66098da 1098
b9ede5f1 1099 rxq->buf = kcalloc(MWL8K_RX_DESCS, sizeof(*rxq->buf), GFP_KERNEL);
788838eb 1100 if (rxq->buf == NULL) {
5db55844 1101 wiphy_err(hw->wiphy, "failed to alloc RX skbuff list\n");
45eb400d 1102 pci_free_consistent(priv->pdev, size, rxq->rxd, rxq->rxd_dma);
a66098da
LB		 1103 return -ENOMEM;
1104 }
a66098da
LB		 1105
1106 for (i = 0; i < MWL8K_RX_DESCS; i++) {
54bc3a0d
LB		 1107 int desc_size;
1108 void *rxd;
a66098da 1109 int nexti;
54bc3a0d
LB		 1110 dma_addr_t next_dma_addr;
1111
1112 desc_size = priv->rxd_ops->rxd_size;
1113 rxd = rxq->rxd + (i * priv->rxd_ops->rxd_size);
a66098da 1114
54bc3a0d
LB		 1115 nexti = i + 1;
1116 if (nexti == MWL8K_RX_DESCS)
1117 nexti = 0;
1118 next_dma_addr = rxq->rxd_dma + (nexti * desc_size);
a66098da 1119
54bc3a0d 1120 priv->rxd_ops->rxd_init(rxd, next_dma_addr);
a66098da
LB		 1121 }
1122
1123 return 0;
1124}
1125
1126static int rxq_refill(struct ieee80211_hw *hw, int index, int limit)
1127{
1128 struct mwl8k_priv *priv = hw->priv;
1129 struct mwl8k_rx_queue *rxq = priv->rxq + index;
1130 int refilled;
1131
1132 refilled = 0;
45eb400d 1133 while (rxq->rxd_count < MWL8K_RX_DESCS && limit--) {
a66098da 1134 struct sk_buff *skb;
788838eb 1135 dma_addr_t addr;
a66098da 1136 int rx;
54bc3a0d 1137 void *rxd;
a66098da
LB		 1138
1139 skb = dev_alloc_skb(MWL8K_RX_MAXSZ);
1140 if (skb == NULL)
1141 break;
1142
788838eb
LB		 1143 addr = pci_map_single(priv->pdev, skb->data,
1144 MWL8K_RX_MAXSZ, DMA_FROM_DEVICE);
a66098da 1145
54bc3a0d
LB		 1146 rxq->rxd_count++;
1147 rx = rxq->tail++;
1148 if (rxq->tail == MWL8K_RX_DESCS)
1149 rxq->tail = 0;
788838eb 1150 rxq->buf[rx].skb = skb;
53b1b3e1 1151 dma_unmap_addr_set(&rxq->buf[rx], dma, addr);
54bc3a0d
LB		 1152
1153 rxd = rxq->rxd + (rx * priv->rxd_ops->rxd_size);
1154 priv->rxd_ops->rxd_refill(rxd, addr, MWL8K_RX_MAXSZ);
a66098da
LB		 1155
1156 refilled++;
1157 }
1158
1159 return refilled;
1160}
1161
1162/* Must be called only when the card's reception is completely halted */
1163static void mwl8k_rxq_deinit(struct ieee80211_hw *hw, int index)
1164{
1165 struct mwl8k_priv *priv = hw->priv;
1166 struct mwl8k_rx_queue *rxq = priv->rxq + index;
1167 int i;
1168
73b46320
BC		 1169 if (rxq->rxd == NULL)
1170 return;
1171
a66098da 1172 for (i = 0; i < MWL8K_RX_DESCS; i++) {
788838eb
LB		 1173 if (rxq->buf[i].skb != NULL) {
1174 pci_unmap_single(priv->pdev,
53b1b3e1 1175 dma_unmap_addr(&rxq->buf[i], dma),
788838eb 1176 MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
53b1b3e1 1177 dma_unmap_addr_set(&rxq->buf[i], dma, 0);
788838eb
LB		 1178
1179 kfree_skb(rxq->buf[i].skb);
1180 rxq->buf[i].skb = NULL;
a66098da
LB		 1181 }
1182 }
1183
788838eb
LB		 1184 kfree(rxq->buf);
1185 rxq->buf = NULL;
a66098da
LB		 1186
1187 pci_free_consistent(priv->pdev,
54bc3a0d 1188 MWL8K_RX_DESCS * priv->rxd_ops->rxd_size,
45eb400d
LB		 1189 rxq->rxd, rxq->rxd_dma);
1190 rxq->rxd = NULL;
a66098da
LB		 1191}
1192
1193
1194/*
1195 * Scan a list of BSSIDs to process for finalize join.
1196 * Allows for extension to process multiple BSSIDs.
1197 */
1198static inline int
1199mwl8k_capture_bssid(struct mwl8k_priv *priv, struct ieee80211_hdr *wh)
1200{
1201 return priv->capture_beacon &&
1202 ieee80211_is_beacon(wh->frame_control) &&
1203 !compare_ether_addr(wh->addr3, priv->capture_bssid);
1204}
1205
3779752d
LB		 1206static inline void mwl8k_save_beacon(struct ieee80211_hw *hw,
1207 struct sk_buff *skb)
a66098da 1208{
3779752d
LB		 1209 struct mwl8k_priv *priv = hw->priv;
1210
a66098da 1211 priv->capture_beacon = false;
d89173f2 1212 memset(priv->capture_bssid, 0, ETH_ALEN);
a66098da
LB		 1213
1214 /*
1215 * Use GFP_ATOMIC as rxq_process is called from
1216 * the primary interrupt handler, memory allocation call
1217 * must not sleep.
1218 */
1219 priv->beacon_skb = skb_copy(skb, GFP_ATOMIC);
1220 if (priv->beacon_skb != NULL)
3779752d 1221 ieee80211_queue_work(hw, &priv->finalize_join_worker);
a66098da
LB		 1222}
1223
d9a07d49
NS		 1224static inline struct mwl8k_vif *mwl8k_find_vif_bss(struct list_head *vif_list,
1225 u8 *bssid)
1226{
1227 struct mwl8k_vif *mwl8k_vif;
1228
1229 list_for_each_entry(mwl8k_vif,
1230 vif_list, list) {
1231 if (memcmp(bssid, mwl8k_vif->bssid,
1232 ETH_ALEN) == 0)
1233 return mwl8k_vif;
1234 }
1235
1236 return NULL;
1237}
1238
a66098da
LB		 1239static int rxq_process(struct ieee80211_hw *hw, int index, int limit)
1240{
1241 struct mwl8k_priv *priv = hw->priv;
d9a07d49 1242 struct mwl8k_vif *mwl8k_vif = NULL;
a66098da
LB		 1243 struct mwl8k_rx_queue *rxq = priv->rxq + index;
1244 int processed;
1245
1246 processed = 0;
45eb400d 1247 while (rxq->rxd_count && limit--) {
a66098da 1248 struct sk_buff *skb;
54bc3a0d
LB		 1249 void *rxd;
1250 int pkt_len;
a66098da 1251 struct ieee80211_rx_status status;
d9a07d49 1252 struct ieee80211_hdr *wh;
20f09c3d 1253 __le16 qos;
a66098da 1254
788838eb 1255 skb = rxq->buf[rxq->head].skb;
d25f9f13
LB		 1256 if (skb == NULL)
1257 break;
54bc3a0d
LB		 1258
1259 rxd = rxq->rxd + (rxq->head * priv->rxd_ops->rxd_size);
1260
0d462bbb
JL		 1261 pkt_len = priv->rxd_ops->rxd_process(rxd, &status, &qos,
1262 &priv->noise);
54bc3a0d
LB		 1263 if (pkt_len < 0)
1264 break;
1265
788838eb
LB		 1266 rxq->buf[rxq->head].skb = NULL;
1267
1268 pci_unmap_single(priv->pdev,
53b1b3e1 1269 dma_unmap_addr(&rxq->buf[rxq->head], dma),
788838eb 1270 MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
53b1b3e1 1271 dma_unmap_addr_set(&rxq->buf[rxq->head], dma, 0);
a66098da 1272
54bc3a0d
LB		 1273 rxq->head++;
1274 if (rxq->head == MWL8K_RX_DESCS)
1275 rxq->head = 0;
1276
45eb400d 1277 rxq->rxd_count--;
a66098da 1278
d9a07d49 1279 wh = &((struct mwl8k_dma_data *)skb->data)->wh;
a66098da 1280
a66098da 1281 /*
c2c357ce
LB		 1282 * Check for a pending join operation. Save a
1283 * copy of the beacon and schedule a tasklet to
1284 * send a FINALIZE_JOIN command to the firmware.
a66098da 1285 */
54bc3a0d 1286 if (mwl8k_capture_bssid(priv, (void *)skb->data))
3779752d 1287 mwl8k_save_beacon(hw, skb);
a66098da 1288
d9a07d49
NS		 1289 if (ieee80211_has_protected(wh->frame_control)) {
1290
1291 /* Check if hw crypto has been enabled for
1292 * this bss. If yes, set the status flags
1293 * accordingly
1294 */
1295 mwl8k_vif = mwl8k_find_vif_bss(&priv->vif_list,
1296 wh->addr1);
1297
1298 if (mwl8k_vif != NULL &&
1299 mwl8k_vif->is_hw_crypto_enabled == true) {
1300 /*
1301 * When MMIC ERROR is encountered
1302 * by the firmware, payload is
1303 * dropped and only 32 bytes of
1304 * mwl8k Firmware header is sent
1305 * to the host.
1306 *
1307 * We need to add four bytes of
1308 * key information. In it
1309 * MAC80211 expects keyidx set to
1310 * 0 for triggering Counter
1311 * Measure of MMIC failure.
1312 */
1313 if (status.flag & RX_FLAG_MMIC_ERROR) {
1314 struct mwl8k_dma_data *tr;
1315 tr = (struct mwl8k_dma_data *)skb->data;
1316 memset((void *)&(tr->data), 0, 4);
1317 pkt_len += 4;
1318 }
1319
1320 if (!ieee80211_is_auth(wh->frame_control))
1321 status.flag |= RX_FLAG_IV_STRIPPED |
1322 RX_FLAG_DECRYPTED |
1323 RX_FLAG_MMIC_STRIPPED;
1324 }
1325 }
1326
1327 skb_put(skb, pkt_len);
1328 mwl8k_remove_dma_header(skb, qos);
f1d58c25
JB		 1329 memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status));
1330 ieee80211_rx_irqsafe(hw, skb);
a66098da
LB		 1331
1332 processed++;
1333 }
1334
1335 return processed;
1336}
1337
1338
1339/*
1340 * Packet transmission.
1341 */
1342
a66098da
LB		 1343#define MWL8K_TXD_STATUS_OK 0x00000001
1344#define MWL8K_TXD_STATUS_OK_RETRY 0x00000002
1345#define MWL8K_TXD_STATUS_OK_MORE_RETRY 0x00000004
1346#define MWL8K_TXD_STATUS_MULTICAST_TX 0x00000008
a66098da 1347#define MWL8K_TXD_STATUS_FW_OWNED 0x80000000
a66098da 1348
e0493a8d
LB		 1349#define MWL8K_QOS_QLEN_UNSPEC 0xff00
1350#define MWL8K_QOS_ACK_POLICY_MASK 0x0060
1351#define MWL8K_QOS_ACK_POLICY_NORMAL 0x0000
1352#define MWL8K_QOS_ACK_POLICY_BLOCKACK 0x0060
1353#define MWL8K_QOS_EOSP 0x0010
1354
a66098da
LB		 1355struct mwl8k_tx_desc {
1356 __le32 status;
1357 __u8 data_rate;
1358 __u8 tx_priority;
1359 __le16 qos_control;
1360 __le32 pkt_phys_addr;
1361 __le16 pkt_len;
d89173f2 1362 __u8 dest_MAC_addr[ETH_ALEN];
45eb400d 1363 __le32 next_txd_phys_addr;
8a7a578c 1364 __le32 timestamp;
a66098da
LB		 1365 __le16 rate_info;
1366 __u8 peer_id;
a1fe24b0 1367 __u8 tx_frag_cnt;
ba2d3587 1368} __packed;
a66098da
LB		 1369
1370#define MWL8K_TX_DESCS 128
1371
1372static int mwl8k_txq_init(struct ieee80211_hw *hw, int index)
1373{
1374 struct mwl8k_priv *priv = hw->priv;
1375 struct mwl8k_tx_queue *txq = priv->txq + index;
1376 int size;
1377 int i;
1378
8ccbc3b8 1379 txq->len = 0;
45eb400d
LB		 1380 txq->head = 0;
1381 txq->tail = 0;
a66098da
LB		 1382
1383 size = MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc);
1384
45eb400d
LB		 1385 txq->txd = pci_alloc_consistent(priv->pdev, size, &txq->txd_dma);
1386 if (txq->txd == NULL) {
5db55844 1387 wiphy_err(hw->wiphy, "failed to alloc TX descriptors\n");
a66098da
LB		 1388 return -ENOMEM;
1389 }
45eb400d 1390 memset(txq->txd, 0, size);
a66098da 1391
b9ede5f1 1392 txq->skb = kcalloc(MWL8K_TX_DESCS, sizeof(*txq->skb), GFP_KERNEL);
45eb400d 1393 if (txq->skb == NULL) {
5db55844 1394 wiphy_err(hw->wiphy, "failed to alloc TX skbuff list\n");
45eb400d 1395 pci_free_consistent(priv->pdev, size, txq->txd, txq->txd_dma);
a66098da
LB		 1396 return -ENOMEM;
1397 }
a66098da
LB		 1398
1399 for (i = 0; i < MWL8K_TX_DESCS; i++) {
1400 struct mwl8k_tx_desc *tx_desc;
1401 int nexti;
1402
45eb400d 1403 tx_desc = txq->txd + i;
a66098da
LB		 1404 nexti = (i + 1) % MWL8K_TX_DESCS;
1405
1406 tx_desc->status = 0;
45eb400d
LB		 1407 tx_desc->next_txd_phys_addr =
1408 cpu_to_le32(txq->txd_dma + nexti * sizeof(*tx_desc));
a66098da
LB		 1409 }
1410
1411 return 0;
1412}
1413
1414static inline void mwl8k_tx_start(struct mwl8k_priv *priv)
1415{
1416 iowrite32(MWL8K_H2A_INT_PPA_READY,
1417 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1418 iowrite32(MWL8K_H2A_INT_DUMMY,
1419 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1420 ioread32(priv->regs + MWL8K_HIU_INT_CODE);
1421}
1422
7e1112d3 1423static void mwl8k_dump_tx_rings(struct ieee80211_hw *hw)
a66098da 1424{
7e1112d3
LB		 1425 struct mwl8k_priv *priv = hw->priv;
1426 int i;
1427
e600707b 1428 for (i = 0; i < mwl8k_tx_queues(priv); i++) {
7e1112d3
LB		 1429 struct mwl8k_tx_queue *txq = priv->txq + i;
1430 int fw_owned = 0;
1431 int drv_owned = 0;
1432 int unused = 0;
1433 int desc;
1434
a66098da 1435 for (desc = 0; desc < MWL8K_TX_DESCS; desc++) {
7e1112d3
LB		 1436 struct mwl8k_tx_desc *tx_desc = txq->txd + desc;
1437 u32 status;
a66098da 1438
7e1112d3 1439 status = le32_to_cpu(tx_desc->status);
a66098da 1440 if (status & MWL8K_TXD_STATUS_FW_OWNED)
7e1112d3 1441 fw_owned++;
a66098da 1442 else
7e1112d3 1443 drv_owned++;
a66098da
LB		 1444
1445 if (tx_desc->pkt_len == 0)
7e1112d3 1446 unused++;
a66098da 1447 }
a66098da 1448
c96c31e4
JP		 1449 wiphy_err(hw->wiphy,
1450 "txq[%d] len=%d head=%d tail=%d "
1451 "fw_owned=%d drv_owned=%d unused=%d\n",
1452 i,
1453 txq->len, txq->head, txq->tail,
1454 fw_owned, drv_owned, unused);
7e1112d3 1455 }
a66098da
LB		 1456}
1457
618952a7 1458/*
88de754a 1459 * Must be called with priv->fw_mutex held and tx queues stopped.
618952a7 1460 */
62abd3cf 1461#define MWL8K_TX_WAIT_TIMEOUT_MS 5000
7e1112d3 1462
950d5b01 1463static int mwl8k_tx_wait_empty(struct ieee80211_hw *hw)
a66098da 1464{
a66098da 1465 struct mwl8k_priv *priv = hw->priv;
88de754a 1466 DECLARE_COMPLETION_ONSTACK(tx_wait);
7e1112d3
LB		 1467 int retry;
1468 int rc;
a66098da
LB		 1469
1470 might_sleep();
1471
7e1112d3
LB		 1472 /*
1473 * The TX queues are stopped at this point, so this test
1474 * doesn't need to take ->tx_lock.
1475 */
1476 if (!priv->pending_tx_pkts)
1477 return 0;
1478
1479 retry = 0;
1480 rc = 0;
1481
a66098da 1482 spin_lock_bh(&priv->tx_lock);
7e1112d3
LB		 1483 priv->tx_wait = &tx_wait;
1484 while (!rc) {
1485 int oldcount;
1486 unsigned long timeout;
a66098da 1487
7e1112d3 1488 oldcount = priv->pending_tx_pkts;
a66098da 1489
7e1112d3 1490 spin_unlock_bh(&priv->tx_lock);
88de754a 1491 timeout = wait_for_completion_timeout(&tx_wait,
7e1112d3 1492 msecs_to_jiffies(MWL8K_TX_WAIT_TIMEOUT_MS));
a66098da 1493 spin_lock_bh(&priv->tx_lock);
7e1112d3
LB		 1494
1495 if (timeout) {
1496 WARN_ON(priv->pending_tx_pkts);
ba30c4a5 1497 if (retry)
c96c31e4 1498 wiphy_notice(hw->wiphy, "tx rings drained\n");
7e1112d3
LB		 1499 break;
1500 }
1501
1502 if (priv->pending_tx_pkts < oldcount) {
c96c31e4
JP		 1503 wiphy_notice(hw->wiphy,
1504 "waiting for tx rings to drain (%d -> %d pkts)\n",
1505 oldcount, priv->pending_tx_pkts);
7e1112d3
LB		 1506 retry = 1;
1507 continue;
1508 }
1509
a66098da 1510 priv->tx_wait = NULL;
a66098da 1511
c96c31e4
JP		 1512 wiphy_err(hw->wiphy, "tx rings stuck for %d ms\n",
1513 MWL8K_TX_WAIT_TIMEOUT_MS);
7e1112d3
LB		 1514 mwl8k_dump_tx_rings(hw);
1515
1516 rc = -ETIMEDOUT;
a66098da 1517 }
7e1112d3 1518 spin_unlock_bh(&priv->tx_lock);
a66098da 1519
7e1112d3 1520 return rc;
a66098da
LB		 1521}
1522
c23b5a69
LB		 1523#define MWL8K_TXD_SUCCESS(status) \
1524 ((status) & (MWL8K_TXD_STATUS_OK | \
1525 MWL8K_TXD_STATUS_OK_RETRY | \
1526 MWL8K_TXD_STATUS_OK_MORE_RETRY))
a66098da 1527
a0e7c6cf
NS		 1528static int mwl8k_tid_queue_mapping(u8 tid)
1529{
1530 BUG_ON(tid > 7);
1531
1532 switch (tid) {
1533 case 0:
1534 case 3:
1535 return IEEE80211_AC_BE;
1536 break;
1537 case 1:
1538 case 2:
1539 return IEEE80211_AC_BK;
1540 break;
1541 case 4:
1542 case 5:
1543 return IEEE80211_AC_VI;
1544 break;
1545 case 6:
1546 case 7:
1547 return IEEE80211_AC_VO;
1548 break;
1549 default:
1550 return -1;
1551 break;
1552 }
1553}
1554
17033543
NS		 1555/* The firmware will fill in the rate information
1556 * for each packet that gets queued in the hardware
1557 * in this structure
1558 */
1559
1560struct rateinfo {
1561 __le16 format:1;
1562 __le16 short_gi:1;
1563 __le16 band_width:1;
1564 __le16 rate_id_mcs:6;
1565 __le16 adv_coding:2;
1566 __le16 antenna:2;
1567 __le16 act_sub_chan:2;
1568 __le16 preamble_type:1;
1569 __le16 power_id:4;
1570 __le16 antenna2:1;
1571 __le16 reserved:1;
1572 __le16 tx_bf_frame:1;
1573 __le16 green_field:1;
1574} __packed;
1575
efb7c49a
LB		 1576static int
1577mwl8k_txq_reclaim(struct ieee80211_hw *hw, int index, int limit, int force)
a66098da
LB		 1578{
1579 struct mwl8k_priv *priv = hw->priv;
1580 struct mwl8k_tx_queue *txq = priv->txq + index;
efb7c49a 1581 int processed;
a66098da 1582
efb7c49a 1583 processed = 0;
8ccbc3b8 1584 while (txq->len > 0 && limit--) {
a66098da 1585 int tx;
a66098da
LB		 1586 struct mwl8k_tx_desc *tx_desc;
1587 unsigned long addr;
ce9e2e1b 1588 int size;
a66098da
LB		 1589 struct sk_buff *skb;
1590 struct ieee80211_tx_info *info;
1591 u32 status;
17033543
NS		 1592 struct ieee80211_sta *sta;
1593 struct mwl8k_sta *sta_info = NULL;
1594 u16 rate_info;
1595 struct rateinfo *rate;
1596 struct ieee80211_hdr *wh;
a66098da 1597
45eb400d
LB		 1598 tx = txq->head;
1599 tx_desc = txq->txd + tx;
a66098da
LB		 1600
1601 status = le32_to_cpu(tx_desc->status);
1602
1603 if (status & MWL8K_TXD_STATUS_FW_OWNED) {
1604 if (!force)
1605 break;
1606 tx_desc->status &=
1607 ~cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED);
1608 }
1609
45eb400d 1610 txq->head = (tx + 1) % MWL8K_TX_DESCS;
8ccbc3b8
KV		 1611 BUG_ON(txq->len == 0);
1612 txq->len--;
a66098da
LB		 1613 priv->pending_tx_pkts--;
1614
1615 addr = le32_to_cpu(tx_desc->pkt_phys_addr);
ce9e2e1b 1616 size = le16_to_cpu(tx_desc->pkt_len);
45eb400d
LB		 1617 skb = txq->skb[tx];
1618 txq->skb[tx] = NULL;
a66098da
LB		 1619
1620 BUG_ON(skb == NULL);
1621 pci_unmap_single(priv->pdev, addr, size, PCI_DMA_TODEVICE);
1622
20f09c3d 1623 mwl8k_remove_dma_header(skb, tx_desc->qos_control);
a66098da 1624
17033543
NS		 1625 wh = (struct ieee80211_hdr *) skb->data;
1626
a66098da
LB		 1627 /* Mark descriptor as unused */
1628 tx_desc->pkt_phys_addr = 0;
1629 tx_desc->pkt_len = 0;
1630
a66098da 1631 info = IEEE80211_SKB_CB(skb);
17033543
NS		 1632 if (ieee80211_is_data(wh->frame_control)) {
1633 sta = info->control.sta;
1634 if (sta) {
1635 sta_info = MWL8K_STA(sta);
1636 BUG_ON(sta_info == NULL);
1637 rate_info = le16_to_cpu(tx_desc->rate_info);
1638 rate = (struct rateinfo *)&rate_info;
1639 /* If rate is < 6.5 Mpbs for an ht station
1640 * do not form an ampdu. If the station is a
1641 * legacy station (format = 0), do not form an
1642 * ampdu
1643 */
1644 if (rate->rate_id_mcs < 1 ||
1645 rate->format == 0) {
1646 sta_info->is_ampdu_allowed = false;
1647 } else {
1648 sta_info->is_ampdu_allowed = true;
1649 }
1650 }
1651 }
1652
a66098da 1653 ieee80211_tx_info_clear_status(info);
0bf22c37
NS		 1654
1655 /* Rate control is happening in the firmware.
1656 * Ensure no tx rate is being reported.
1657 */
ba30c4a5
YAP		 1658 info->status.rates[0].idx = -1;
1659 info->status.rates[0].count = 1;
0bf22c37 1660
ce9e2e1b 1661 if (MWL8K_TXD_SUCCESS(status))
a66098da 1662 info->flags |= IEEE80211_TX_STAT_ACK;
a66098da
LB		 1663
1664 ieee80211_tx_status_irqsafe(hw, skb);
1665
efb7c49a 1666 processed++;
a66098da
LB		 1667 }
1668
65f3ddcd
NS		 1669 if (index < MWL8K_TX_WMM_QUEUES && processed && priv->radio_on &&
1670 !mutex_is_locked(&priv->fw_mutex))
a66098da 1671 ieee80211_wake_queue(hw, index);
efb7c49a
LB		 1672
1673 return processed;
a66098da
LB		 1674}
1675
1676/* must be called only when the card's transmit is completely halted */
1677static void mwl8k_txq_deinit(struct ieee80211_hw *hw, int index)
1678{
1679 struct mwl8k_priv *priv = hw->priv;
1680 struct mwl8k_tx_queue *txq = priv->txq + index;
1681
73b46320
BC		 1682 if (txq->txd == NULL)
1683 return;
1684
efb7c49a 1685 mwl8k_txq_reclaim(hw, index, INT_MAX, 1);
a66098da 1686
45eb400d
LB		 1687 kfree(txq->skb);
1688 txq->skb = NULL;
a66098da
LB		 1689
1690 pci_free_consistent(priv->pdev,
1691 MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc),
45eb400d
LB		 1692 txq->txd, txq->txd_dma);
1693 txq->txd = NULL;
a66098da
LB		 1694}
1695
ac109fd0 1696/* caller must hold priv->stream_lock when calling the stream functions */
ba30c4a5 1697static struct mwl8k_ampdu_stream *
ac109fd0
BC		 1698mwl8k_add_stream(struct ieee80211_hw *hw, struct ieee80211_sta *sta, u8 tid)
1699{
1700 struct mwl8k_ampdu_stream *stream;
1701 struct mwl8k_priv *priv = hw->priv;
1702 int i;
1703
1704 for (i = 0; i < priv->num_ampdu_queues; i++) {
1705 stream = &priv->ampdu[i];
1706 if (stream->state == AMPDU_NO_STREAM) {
1707 stream->sta = sta;
1708 stream->state = AMPDU_STREAM_NEW;
1709 stream->tid = tid;
1710 stream->idx = i;
1711 stream->txq_idx = MWL8K_TX_WMM_QUEUES + i;
1712 wiphy_debug(hw->wiphy, "Added a new stream for %pM %d",
1713 sta->addr, tid);
1714 return stream;
1715 }
1716 }
1717 return NULL;
1718}
1719
1720static int
1721mwl8k_start_stream(struct ieee80211_hw *hw, struct mwl8k_ampdu_stream *stream)
1722{
1723 int ret;
1724
1725 /* if the stream has already been started, don't start it again */
1726 if (stream->state != AMPDU_STREAM_NEW)
1727 return 0;
1728 ret = ieee80211_start_tx_ba_session(stream->sta, stream->tid, 0);
1729 if (ret)
1730 wiphy_debug(hw->wiphy, "Failed to start stream for %pM %d: "
1731 "%d\n", stream->sta->addr, stream->tid, ret);
1732 else
1733 wiphy_debug(hw->wiphy, "Started stream for %pM %d\n",
1734 stream->sta->addr, stream->tid);
1735 return ret;
1736}
1737
1738static void
1739mwl8k_remove_stream(struct ieee80211_hw *hw, struct mwl8k_ampdu_stream *stream)
1740{
1741 wiphy_debug(hw->wiphy, "Remove stream for %pM %d\n", stream->sta->addr,
1742 stream->tid);
1743 memset(stream, 0, sizeof(*stream));
1744}
1745
1746static struct mwl8k_ampdu_stream *
1747mwl8k_lookup_stream(struct ieee80211_hw *hw, u8 *addr, u8 tid)
1748{
1749 struct mwl8k_priv *priv = hw->priv;
1750 int i;
1751
1752 for (i = 0 ; i < priv->num_ampdu_queues; i++) {
1753 struct mwl8k_ampdu_stream *stream;
1754 stream = &priv->ampdu[i];
1755 if (stream->state == AMPDU_NO_STREAM)
1756 continue;
1757 if (!memcmp(stream->sta->addr, addr, ETH_ALEN) &&
1758 stream->tid == tid)
1759 return stream;
1760 }
1761 return NULL;
1762}
1763
d0805c1c
BC		 1764#define MWL8K_AMPDU_PACKET_THRESHOLD 64
1765static inline bool mwl8k_ampdu_allowed(struct ieee80211_sta *sta, u8 tid)
1766{
1767 struct mwl8k_sta *sta_info = MWL8K_STA(sta);
1768 struct tx_traffic_info *tx_stats;
1769
1770 BUG_ON(tid >= MWL8K_MAX_TID);
1771 tx_stats = &sta_info->tx_stats[tid];
1772
1773 return sta_info->is_ampdu_allowed &&
1774 tx_stats->pkts > MWL8K_AMPDU_PACKET_THRESHOLD;
1775}
1776
1777static inline void mwl8k_tx_count_packet(struct ieee80211_sta *sta, u8 tid)
1778{
1779 struct mwl8k_sta *sta_info = MWL8K_STA(sta);
1780 struct tx_traffic_info *tx_stats;
1781
1782 BUG_ON(tid >= MWL8K_MAX_TID);
1783 tx_stats = &sta_info->tx_stats[tid];
1784
1785 if (tx_stats->start_time == 0)
1786 tx_stats->start_time = jiffies;
1787
1788 /* reset the packet count after each second elapses. If the number of
1789 * packets ever exceeds the ampdu_min_traffic threshold, we will allow
1790 * an ampdu stream to be started.
1791 */
1792 if (jiffies - tx_stats->start_time > HZ) {
1793 tx_stats->pkts = 0;
1794 tx_stats->start_time = 0;
1795 } else
1796 tx_stats->pkts++;
1797}
1798
7bb45683 1799static void
a66098da
LB		 1800mwl8k_txq_xmit(struct ieee80211_hw *hw, int index, struct sk_buff *skb)
1801{
1802 struct mwl8k_priv *priv = hw->priv;
1803 struct ieee80211_tx_info *tx_info;
23b33906 1804 struct mwl8k_vif *mwl8k_vif;
65f3ddcd 1805 struct ieee80211_sta *sta;
a66098da
LB		 1806 struct ieee80211_hdr *wh;
1807 struct mwl8k_tx_queue *txq;
1808 struct mwl8k_tx_desc *tx;
a66098da 1809 dma_addr_t dma;
23b33906
LB		 1810 u32 txstatus;
1811 u8 txdatarate;
1812 u16 qos;
65f3ddcd
NS		 1813 int txpriority;
1814 u8 tid = 0;
1815 struct mwl8k_ampdu_stream *stream = NULL;
1816 bool start_ba_session = false;
a0e7c6cf 1817 struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)skb->data;
a66098da 1818
23b33906
LB		 1819 wh = (struct ieee80211_hdr *)skb->data;
1820 if (ieee80211_is_data_qos(wh->frame_control))
1821 qos = le16_to_cpu(*((__le16 *)ieee80211_get_qos_ctl(wh)));
1822 else
1823 qos = 0;
a66098da 1824
d9a07d49
NS		 1825 if (priv->ap_fw)
1826 mwl8k_encapsulate_tx_frame(skb);
1827 else
1828 mwl8k_add_dma_header(skb, 0);
1829
23b33906 1830 wh = &((struct mwl8k_dma_data *)skb->data)->wh;
a66098da
LB		 1831
1832 tx_info = IEEE80211_SKB_CB(skb);
65f3ddcd 1833 sta = tx_info->control.sta;
a66098da 1834 mwl8k_vif = MWL8K_VIF(tx_info->control.vif);
a66098da
LB		 1835
1836 if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
a66098da 1837 wh->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
657232b6
LB		 1838 wh->seq_ctrl |= cpu_to_le16(mwl8k_vif->seqno);
1839 mwl8k_vif->seqno += 0x10;
a66098da
LB		 1840 }
1841
23b33906
LB		 1842 /* Setup firmware control bit fields for each frame type. */
1843 txstatus = 0;
1844 txdatarate = 0;
1845 if (ieee80211_is_mgmt(wh->frame_control) ||
1846 ieee80211_is_ctl(wh->frame_control)) {
1847 txdatarate = 0;
e0493a8d 1848 qos |= MWL8K_QOS_QLEN_UNSPEC | MWL8K_QOS_EOSP;
23b33906
LB		 1849 } else if (ieee80211_is_data(wh->frame_control)) {
1850 txdatarate = 1;
1851 if (is_multicast_ether_addr(wh->addr1))
1852 txstatus |= MWL8K_TXD_STATUS_MULTICAST_TX;
1853
e0493a8d 1854 qos &= ~MWL8K_QOS_ACK_POLICY_MASK;
23b33906 1855 if (tx_info->flags & IEEE80211_TX_CTL_AMPDU)
e0493a8d 1856 qos |= MWL8K_QOS_ACK_POLICY_BLOCKACK;
23b33906 1857 else
e0493a8d 1858 qos |= MWL8K_QOS_ACK_POLICY_NORMAL;
23b33906 1859 }
a66098da 1860
a0e7c6cf
NS		 1861 /* Queue ADDBA request in the respective data queue. While setting up
1862 * the ampdu stream, mac80211 queues further packets for that
1863 * particular ra/tid pair. However, packets piled up in the hardware
1864 * for that ra/tid pair will still go out. ADDBA request and the
1865 * related data packets going out from different queues asynchronously
1866 * will cause a shift in the receiver window which might result in
1867 * ampdu packets getting dropped at the receiver after the stream has
1868 * been setup.
1869 */
1870 if (unlikely(ieee80211_is_action(wh->frame_control) &&
1871 mgmt->u.action.category == WLAN_CATEGORY_BACK &&
1872 mgmt->u.action.u.addba_req.action_code == WLAN_ACTION_ADDBA_REQ &&
1873 priv->ap_fw)) {
1874 u16 capab = le16_to_cpu(mgmt->u.action.u.addba_req.capab);
1875 tid = (capab & IEEE80211_ADDBA_PARAM_TID_MASK) >> 2;
1876 index = mwl8k_tid_queue_mapping(tid);
1877 }
1878
65f3ddcd
NS		 1879 txpriority = index;
1880
1881 if (ieee80211_is_data_qos(wh->frame_control) &&
1882 skb->protocol != cpu_to_be16(ETH_P_PAE) &&
1883 sta->ht_cap.ht_supported && priv->ap_fw) {
1884 tid = qos & 0xf;
d0805c1c 1885 mwl8k_tx_count_packet(sta, tid);
65f3ddcd
NS		 1886 spin_lock(&priv->stream_lock);
1887 stream = mwl8k_lookup_stream(hw, sta->addr, tid);
1888 if (stream != NULL) {
1889 if (stream->state == AMPDU_STREAM_ACTIVE) {
1890 txpriority = stream->txq_idx;
1891 index = stream->txq_idx;
1892 } else if (stream->state == AMPDU_STREAM_NEW) {
1893 /* We get here if the driver sends us packets
1894 * after we've initiated a stream, but before
1895 * our ampdu_action routine has been called
1896 * with IEEE80211_AMPDU_TX_START to get the SSN
1897 * for the ADDBA request. So this packet can
1898 * go out with no risk of sequence number
1899 * mismatch. No special handling is required.
1900 */
1901 } else {
1902 /* Drop packets that would go out after the
1903 * ADDBA request was sent but before the ADDBA
1904 * response is received. If we don't do this,
1905 * the recipient would probably receive it
1906 * after the ADDBA request with SSN 0. This
1907 * will cause the recipient's BA receive window
1908 * to shift, which would cause the subsequent
1909 * packets in the BA stream to be discarded.
1910 * mac80211 queues our packets for us in this
1911 * case, so this is really just a safety check.
1912 */
1913 wiphy_warn(hw->wiphy,
1914 "Cannot send packet while ADDBA "
1915 "dialog is underway.\n");
1916 spin_unlock(&priv->stream_lock);
1917 dev_kfree_skb(skb);
1918 return;
1919 }
1920 } else {
1921 /* Defer calling mwl8k_start_stream so that the current
1922 * skb can go out before the ADDBA request. This
1923 * prevents sequence number mismatch at the recepient
1924 * as described above.
1925 */
d0805c1c 1926 if (mwl8k_ampdu_allowed(sta, tid)) {
17033543
NS		 1927 stream = mwl8k_add_stream(hw, sta, tid);
1928 if (stream != NULL)
1929 start_ba_session = true;
1930 }
65f3ddcd
NS		 1931 }
1932 spin_unlock(&priv->stream_lock);
1933 }
1934
a66098da
LB		 1935 dma = pci_map_single(priv->pdev, skb->data,
1936 skb->len, PCI_DMA_TODEVICE);
1937
1938 if (pci_dma_mapping_error(priv->pdev, dma)) {
c96c31e4
JP		 1939 wiphy_debug(hw->wiphy,
1940 "failed to dma map skb, dropping TX frame.\n");
65f3ddcd
NS		 1941 if (start_ba_session) {
1942 spin_lock(&priv->stream_lock);
1943 mwl8k_remove_stream(hw, stream);
1944 spin_unlock(&priv->stream_lock);
1945 }
23b33906 1946 dev_kfree_skb(skb);
7bb45683 1947 return;
a66098da
LB		 1948 }
1949
23b33906 1950 spin_lock_bh(&priv->tx_lock);
a66098da 1951
23b33906 1952 txq = priv->txq + index;
a66098da 1953
65f3ddcd
NS		 1954 if (index >= MWL8K_TX_WMM_QUEUES && txq->len >= MWL8K_TX_DESCS) {
1955 /* This is the case in which the tx packet is destined for an
1956 * AMPDU queue and that AMPDU queue is full. Because we don't
1957 * start and stop the AMPDU queues, we must drop these packets.
1958 */
1959 dev_kfree_skb(skb);
1960 spin_unlock_bh(&priv->tx_lock);
1961 return;
1962 }
1963
45eb400d
LB		 1964 BUG_ON(txq->skb[txq->tail] != NULL);
1965 txq->skb[txq->tail] = skb;
a66098da 1966
45eb400d 1967 tx = txq->txd + txq->tail;
23b33906 1968 tx->data_rate = txdatarate;
65f3ddcd 1969 tx->tx_priority = txpriority;
a66098da 1970 tx->qos_control = cpu_to_le16(qos);
a66098da
LB		 1971 tx->pkt_phys_addr = cpu_to_le32(dma);
1972 tx->pkt_len = cpu_to_le16(skb->len);
23b33906 1973 tx->rate_info = 0;
a680400e
LB		 1974 if (!priv->ap_fw && tx_info->control.sta != NULL)
1975 tx->peer_id = MWL8K_STA(tx_info->control.sta)->peer_id;
1976 else
1977 tx->peer_id = 0;
a66098da 1978 wmb();
23b33906
LB		 1979 tx->status = cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED | txstatus);
1980
8ccbc3b8 1981 txq->len++;
a66098da 1982 priv->pending_tx_pkts++;
a66098da 1983
45eb400d
LB		 1984 txq->tail++;
1985 if (txq->tail == MWL8K_TX_DESCS)
1986 txq->tail = 0;
23b33906 1987
65f3ddcd 1988 if (txq->head == txq->tail && index < MWL8K_TX_WMM_QUEUES)
a66098da
LB		 1989 ieee80211_stop_queue(hw, index);
1990
23b33906 1991 mwl8k_tx_start(priv);
a66098da
LB		 1992
1993 spin_unlock_bh(&priv->tx_lock);
65f3ddcd
NS		 1994
1995 /* Initiate the ampdu session here */
1996 if (start_ba_session) {
1997 spin_lock(&priv->stream_lock);
1998 if (mwl8k_start_stream(hw, stream))
1999 mwl8k_remove_stream(hw, stream);
2000 spin_unlock(&priv->stream_lock);
2001 }
a66098da
LB		 2002}
2003
2004
618952a7
LB		 2005/*
2006 * Firmware access.
2007 *
2008 * We have the following requirements for issuing firmware commands:
2009 * - Some commands require that the packet transmit path is idle when
2010 * the command is issued. (For simplicity, we'll just quiesce the
2011 * transmit path for every command.)
2012 * - There are certain sequences of commands that need to be issued to
2013 * the hardware sequentially, with no other intervening commands.
2014 *
2015 * This leads to an implementation of a "firmware lock" as a mutex that
2016 * can be taken recursively, and which is taken by both the low-level
2017 * command submission function (mwl8k_post_cmd) as well as any users of
2018 * that function that require issuing of an atomic sequence of commands,
2019 * and quiesces the transmit path whenever it's taken.
2020 */
2021static int mwl8k_fw_lock(struct ieee80211_hw *hw)
2022{
2023 struct mwl8k_priv *priv = hw->priv;
2024
2025 if (priv->fw_mutex_owner != current) {
2026 int rc;
2027
2028 mutex_lock(&priv->fw_mutex);
2029 ieee80211_stop_queues(hw);
2030
2031 rc = mwl8k_tx_wait_empty(hw);
2032 if (rc) {
2033 ieee80211_wake_queues(hw);
2034 mutex_unlock(&priv->fw_mutex);
2035
2036 return rc;
2037 }
2038
2039 priv->fw_mutex_owner = current;
2040 }
2041
2042 priv->fw_mutex_depth++;
2043
2044 return 0;
2045}
2046
2047static void mwl8k_fw_unlock(struct ieee80211_hw *hw)
2048{
2049 struct mwl8k_priv *priv = hw->priv;
2050
2051 if (!--priv->fw_mutex_depth) {
2052 ieee80211_wake_queues(hw);
2053 priv->fw_mutex_owner = NULL;
2054 mutex_unlock(&priv->fw_mutex);
2055 }
2056}
2057
2058
a66098da
LB		 2059/*
2060 * Command processing.
2061 */
2062
0c9cc640
LB		 2063/* Timeout firmware commands after 10s */
2064#define MWL8K_CMD_TIMEOUT_MS 10000
a66098da
LB		 2065
2066static int mwl8k_post_cmd(struct ieee80211_hw *hw, struct mwl8k_cmd_pkt *cmd)
2067{
2068 DECLARE_COMPLETION_ONSTACK(cmd_wait);
2069 struct mwl8k_priv *priv = hw->priv;
2070 void __iomem *regs = priv->regs;
2071 dma_addr_t dma_addr;
2072 unsigned int dma_size;
2073 int rc;
a66098da
LB		 2074 unsigned long timeout = 0;
2075 u8 buf[32];
2076
b603742f 2077 cmd->result = (__force __le16) 0xffff;
a66098da
LB		 2078 dma_size = le16_to_cpu(cmd->length);
2079 dma_addr = pci_map_single(priv->pdev, cmd, dma_size,
2080 PCI_DMA_BIDIRECTIONAL);
2081 if (pci_dma_mapping_error(priv->pdev, dma_addr))
2082 return -ENOMEM;
2083
618952a7 2084 rc = mwl8k_fw_lock(hw);
39a1e42e
LB		 2085 if (rc) {
2086 pci_unmap_single(priv->pdev, dma_addr, dma_size,
2087 PCI_DMA_BIDIRECTIONAL);
618952a7 2088 return rc;
39a1e42e 2089 }
a66098da 2090
a66098da
LB		 2091 priv->hostcmd_wait = &cmd_wait;
2092 iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
2093 iowrite32(MWL8K_H2A_INT_DOORBELL,
2094 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
2095 iowrite32(MWL8K_H2A_INT_DUMMY,
2096 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
a66098da
LB		 2097
2098 timeout = wait_for_completion_timeout(&cmd_wait,
2099 msecs_to_jiffies(MWL8K_CMD_TIMEOUT_MS));
2100
618952a7
LB		 2101 priv->hostcmd_wait = NULL;
2102
2103 mwl8k_fw_unlock(hw);
2104
37055bd4
LB		 2105 pci_unmap_single(priv->pdev, dma_addr, dma_size,
2106 PCI_DMA_BIDIRECTIONAL);
2107
a66098da 2108 if (!timeout) {
5db55844 2109 wiphy_err(hw->wiphy, "Command %s timeout after %u ms\n",
c96c31e4
JP		 2110 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
2111 MWL8K_CMD_TIMEOUT_MS);
a66098da
LB		 2112 rc = -ETIMEDOUT;
2113 } else {
0c9cc640
LB		 2114 int ms;
2115
2116 ms = MWL8K_CMD_TIMEOUT_MS - jiffies_to_msecs(timeout);
2117
ce9e2e1b 2118 rc = cmd->result ? -EINVAL : 0;
a66098da 2119 if (rc)
5db55844 2120 wiphy_err(hw->wiphy, "Command %s error 0x%x\n",
c96c31e4
JP		 2121 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
2122 le16_to_cpu(cmd->result));
0c9cc640 2123 else if (ms > 2000)
5db55844 2124 wiphy_notice(hw->wiphy, "Command %s took %d ms\n",
c96c31e4
JP		 2125 mwl8k_cmd_name(cmd->code,
2126 buf, sizeof(buf)),
2127 ms);
a66098da
LB		 2128 }
2129
a66098da
LB		 2130 return rc;
2131}
2132
f57ca9c1
LB		 2133static int mwl8k_post_pervif_cmd(struct ieee80211_hw *hw,
2134 struct ieee80211_vif *vif,
2135 struct mwl8k_cmd_pkt *cmd)
2136{
2137 if (vif != NULL)
2138 cmd->macid = MWL8K_VIF(vif)->macid;
2139 return mwl8k_post_cmd(hw, cmd);
2140}
2141
1349ad2f
LB		 2142/*
2143 * Setup code shared between STA and AP firmware images.
2144 */
2145static void mwl8k_setup_2ghz_band(struct ieee80211_hw *hw)
2146{
2147 struct mwl8k_priv *priv = hw->priv;
2148
2149 BUILD_BUG_ON(sizeof(priv->channels_24) != sizeof(mwl8k_channels_24));
2150 memcpy(priv->channels_24, mwl8k_channels_24, sizeof(mwl8k_channels_24));
2151
2152 BUILD_BUG_ON(sizeof(priv->rates_24) != sizeof(mwl8k_rates_24));
2153 memcpy(priv->rates_24, mwl8k_rates_24, sizeof(mwl8k_rates_24));
2154
2155 priv->band_24.band = IEEE80211_BAND_2GHZ;
2156 priv->band_24.channels = priv->channels_24;
2157 priv->band_24.n_channels = ARRAY_SIZE(mwl8k_channels_24);
2158 priv->band_24.bitrates = priv->rates_24;
2159 priv->band_24.n_bitrates = ARRAY_SIZE(mwl8k_rates_24);
2160
2161 hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band_24;
2162}
2163
4eae9edd
LB		 2164static void mwl8k_setup_5ghz_band(struct ieee80211_hw *hw)
2165{
2166 struct mwl8k_priv *priv = hw->priv;
2167
2168 BUILD_BUG_ON(sizeof(priv->channels_50) != sizeof(mwl8k_channels_50));
2169 memcpy(priv->channels_50, mwl8k_channels_50, sizeof(mwl8k_channels_50));
2170
2171 BUILD_BUG_ON(sizeof(priv->rates_50) != sizeof(mwl8k_rates_50));
2172 memcpy(priv->rates_50, mwl8k_rates_50, sizeof(mwl8k_rates_50));
2173
2174 priv->band_50.band = IEEE80211_BAND_5GHZ;
2175 priv->band_50.channels = priv->channels_50;
2176 priv->band_50.n_channels = ARRAY_SIZE(mwl8k_channels_50);
2177 priv->band_50.bitrates = priv->rates_50;
2178 priv->band_50.n_bitrates = ARRAY_SIZE(mwl8k_rates_50);
2179
2180 hw->wiphy->bands[IEEE80211_BAND_5GHZ] = &priv->band_50;
2181}
2182
a66098da 2183/*
04b147b1 2184 * CMD_GET_HW_SPEC (STA version).
a66098da 2185 */
04b147b1 2186struct mwl8k_cmd_get_hw_spec_sta {
a66098da
LB		 2187 struct mwl8k_cmd_pkt header;
2188 __u8 hw_rev;
2189 __u8 host_interface;
2190 __le16 num_mcaddrs;
d89173f2 2191 __u8 perm_addr[ETH_ALEN];
a66098da
LB		 2192 __le16 region_code;
2193 __le32 fw_rev;
2194 __le32 ps_cookie;
2195 __le32 caps;
2196 __u8 mcs_bitmap[16];
2197 __le32 rx_queue_ptr;
2198 __le32 num_tx_queues;
e600707b 2199 __le32 tx_queue_ptrs[MWL8K_TX_WMM_QUEUES];
a66098da
LB		 2200 __le32 caps2;
2201 __le32 num_tx_desc_per_queue;
45eb400d 2202 __le32 total_rxd;
ba2d3587 2203} __packed;
a66098da 2204
341c9791
LB		 2205#define MWL8K_CAP_MAX_AMSDU 0x20000000
2206#define MWL8K_CAP_GREENFIELD 0x08000000
2207#define MWL8K_CAP_AMPDU 0x04000000
2208#define MWL8K_CAP_RX_STBC 0x01000000
2209#define MWL8K_CAP_TX_STBC 0x00800000
2210#define MWL8K_CAP_SHORTGI_40MHZ 0x00400000
2211#define MWL8K_CAP_SHORTGI_20MHZ 0x00200000
2212#define MWL8K_CAP_RX_ANTENNA_MASK 0x000e0000
2213#define MWL8K_CAP_TX_ANTENNA_MASK 0x0001c000
2214#define MWL8K_CAP_DELAY_BA 0x00003000
2215#define MWL8K_CAP_MIMO 0x00000200
2216#define MWL8K_CAP_40MHZ 0x00000100
06953235
LB		 2217#define MWL8K_CAP_BAND_MASK 0x00000007
2218#define MWL8K_CAP_5GHZ 0x00000004
2219#define MWL8K_CAP_2GHZ4 0x00000001
341c9791 2220
06953235
LB		 2221static void
2222mwl8k_set_ht_caps(struct ieee80211_hw *hw,
2223 struct ieee80211_supported_band *band, u32 cap)
341c9791 2224{
341c9791
LB		 2225 int rx_streams;
2226 int tx_streams;
2227
777ad375 2228 band->ht_cap.ht_supported = 1;
341c9791
LB		 2229
2230 if (cap & MWL8K_CAP_MAX_AMSDU)
777ad375 2231 band->ht_cap.cap |= IEEE80211_HT_CAP_MAX_AMSDU;
341c9791 2232 if (cap & MWL8K_CAP_GREENFIELD)
777ad375 2233 band->ht_cap.cap |= IEEE80211_HT_CAP_GRN_FLD;
341c9791
LB		 2234 if (cap & MWL8K_CAP_AMPDU) {
2235 hw->flags |= IEEE80211_HW_AMPDU_AGGREGATION;
777ad375
LB		 2236 band->ht_cap.ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
2237 band->ht_cap.ampdu_density = IEEE80211_HT_MPDU_DENSITY_NONE;
341c9791
LB		 2238 }
2239 if (cap & MWL8K_CAP_RX_STBC)
777ad375 2240 band->ht_cap.cap |= IEEE80211_HT_CAP_RX_STBC;
341c9791 2241 if (cap & MWL8K_CAP_TX_STBC)
777ad375 2242 band->ht_cap.cap |= IEEE80211_HT_CAP_TX_STBC;
341c9791 2243 if (cap & MWL8K_CAP_SHORTGI_40MHZ)
777ad375 2244 band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_40;
341c9791 2245 if (cap & MWL8K_CAP_SHORTGI_20MHZ)
777ad375 2246 band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_20;
341c9791 2247 if (cap & MWL8K_CAP_DELAY_BA)
777ad375 2248 band->ht_cap.cap |= IEEE80211_HT_CAP_DELAY_BA;
341c9791 2249 if (cap & MWL8K_CAP_40MHZ)
777ad375 2250 band->ht_cap.cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
341c9791
LB		 2251
2252 rx_streams = hweight32(cap & MWL8K_CAP_RX_ANTENNA_MASK);
2253 tx_streams = hweight32(cap & MWL8K_CAP_TX_ANTENNA_MASK);
2254
777ad375 2255 band->ht_cap.mcs.rx_mask[0] = 0xff;
341c9791 2256 if (rx_streams >= 2)
777ad375 2257 band->ht_cap.mcs.rx_mask[1] = 0xff;
341c9791 2258 if (rx_streams >= 3)
777ad375
LB		 2259 band->ht_cap.mcs.rx_mask[2] = 0xff;
2260 band->ht_cap.mcs.rx_mask[4] = 0x01;
2261 band->ht_cap.mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
341c9791
LB		 2262
2263 if (rx_streams != tx_streams) {
777ad375
LB		 2264 band->ht_cap.mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
2265 band->ht_cap.mcs.tx_params |= (tx_streams - 1) <<
341c9791
LB		 2266 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
2267 }
2268}
2269
06953235
LB		 2270static void
2271mwl8k_set_caps(struct ieee80211_hw *hw, u32 caps)
2272{
2273 struct mwl8k_priv *priv = hw->priv;
2274
2275 if ((caps & MWL8K_CAP_2GHZ4) || !(caps & MWL8K_CAP_BAND_MASK)) {
2276 mwl8k_setup_2ghz_band(hw);
2277 if (caps & MWL8K_CAP_MIMO)
2278 mwl8k_set_ht_caps(hw, &priv->band_24, caps);
2279 }
2280
2281 if (caps & MWL8K_CAP_5GHZ) {
2282 mwl8k_setup_5ghz_band(hw);
2283 if (caps & MWL8K_CAP_MIMO)
2284 mwl8k_set_ht_caps(hw, &priv->band_50, caps);
2285 }
2286}
2287
04b147b1 2288static int mwl8k_cmd_get_hw_spec_sta(struct ieee80211_hw *hw)
a66098da
LB		 2289{
2290 struct mwl8k_priv *priv = hw->priv;
04b147b1 2291 struct mwl8k_cmd_get_hw_spec_sta *cmd;
a66098da
LB		 2292 int rc;
2293 int i;
2294
2295 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2296 if (cmd == NULL)
2297 return -ENOMEM;
2298
2299 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
2300 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2301
2302 memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
2303 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
45eb400d 2304 cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
e600707b
BC		 2305 cmd->num_tx_queues = cpu_to_le32(mwl8k_tx_queues(priv));
2306 for (i = 0; i < mwl8k_tx_queues(priv); i++)
45eb400d 2307 cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma);
4ff6432e 2308 cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
45eb400d 2309 cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
a66098da
LB		 2310
2311 rc = mwl8k_post_cmd(hw, &cmd->header);
2312
2313 if (!rc) {
2314 SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
2315 priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
4ff6432e 2316 priv->fw_rev = le32_to_cpu(cmd->fw_rev);
a66098da 2317 priv->hw_rev = cmd->hw_rev;
06953235 2318 mwl8k_set_caps(hw, le32_to_cpu(cmd->caps));
ee0ddf18
LB		 2319 priv->ap_macids_supported = 0x00000000;
2320 priv->sta_macids_supported = 0x00000001;
a66098da
LB		 2321 }
2322
2323 kfree(cmd);
2324 return rc;
2325}
2326
42fba21d
LB		 2327/*
2328 * CMD_GET_HW_SPEC (AP version).
2329 */
2330struct mwl8k_cmd_get_hw_spec_ap {
2331 struct mwl8k_cmd_pkt header;
2332 __u8 hw_rev;
2333 __u8 host_interface;
2334 __le16 num_wcb;
2335 __le16 num_mcaddrs;
2336 __u8 perm_addr[ETH_ALEN];
2337 __le16 region_code;
2338 __le16 num_antenna;
2339 __le32 fw_rev;
2340 __le32 wcbbase0;
2341 __le32 rxwrptr;
2342 __le32 rxrdptr;
2343 __le32 ps_cookie;
2344 __le32 wcbbase1;
2345 __le32 wcbbase2;
2346 __le32 wcbbase3;
952a0e96 2347 __le32 fw_api_version;
8a7a578c
BC		 2348 __le32 caps;
2349 __le32 num_of_ampdu_queues;
2350 __le32 wcbbase_ampdu[MWL8K_MAX_AMPDU_QUEUES];
ba2d3587 2351} __packed;
42fba21d
LB		 2352
2353static int mwl8k_cmd_get_hw_spec_ap(struct ieee80211_hw *hw)
2354{
2355 struct mwl8k_priv *priv = hw->priv;
2356 struct mwl8k_cmd_get_hw_spec_ap *cmd;
8a7a578c 2357 int rc, i;
952a0e96 2358 u32 api_version;
42fba21d
LB		 2359
2360 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2361 if (cmd == NULL)
2362 return -ENOMEM;
2363
2364 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
2365 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2366
2367 memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
2368 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
2369
2370 rc = mwl8k_post_cmd(hw, &cmd->header);
2371
2372 if (!rc) {
2373 int off;
2374
952a0e96
BC		 2375 api_version = le32_to_cpu(cmd->fw_api_version);
2376 if (priv->device_info->fw_api_ap != api_version) {
2377 printk(KERN_ERR "%s: Unsupported fw API version for %s."
2378 " Expected %d got %d.\n", MWL8K_NAME,
2379 priv->device_info->part_name,
2380 priv->device_info->fw_api_ap,
2381 api_version);
2382 rc = -EINVAL;
2383 goto done;
2384 }
42fba21d
LB		 2385 SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
2386 priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
2387 priv->fw_rev = le32_to_cpu(cmd->fw_rev);
2388 priv->hw_rev = cmd->hw_rev;
8a7a578c 2389 mwl8k_set_caps(hw, le32_to_cpu(cmd->caps));
ee0ddf18
LB		 2390 priv->ap_macids_supported = 0x000000ff;
2391 priv->sta_macids_supported = 0x00000000;
8a7a578c
BC		 2392 priv->num_ampdu_queues = le32_to_cpu(cmd->num_of_ampdu_queues);
2393 if (priv->num_ampdu_queues > MWL8K_MAX_AMPDU_QUEUES) {
2394 wiphy_warn(hw->wiphy, "fw reported %d ampdu queues"
2395 " but we only support %d.\n",
2396 priv->num_ampdu_queues,
2397 MWL8K_MAX_AMPDU_QUEUES);
2398 priv->num_ampdu_queues = MWL8K_MAX_AMPDU_QUEUES;
2399 }
42fba21d 2400 off = le32_to_cpu(cmd->rxwrptr) & 0xffff;
b603742f 2401 iowrite32(priv->rxq[0].rxd_dma, priv->sram + off);
42fba21d
LB		 2402
2403 off = le32_to_cpu(cmd->rxrdptr) & 0xffff;
b603742f 2404 iowrite32(priv->rxq[0].rxd_dma, priv->sram + off);
42fba21d 2405
73b46320
BC		 2406 priv->txq_offset[0] = le32_to_cpu(cmd->wcbbase0) & 0xffff;
2407 priv->txq_offset[1] = le32_to_cpu(cmd->wcbbase1) & 0xffff;
2408 priv->txq_offset[2] = le32_to_cpu(cmd->wcbbase2) & 0xffff;
2409 priv->txq_offset[3] = le32_to_cpu(cmd->wcbbase3) & 0xffff;
8a7a578c
BC		 2410
2411 for (i = 0; i < priv->num_ampdu_queues; i++)
e600707b 2412 priv->txq_offset[i + MWL8K_TX_WMM_QUEUES] =
8a7a578c 2413 le32_to_cpu(cmd->wcbbase_ampdu[i]) & 0xffff;
42fba21d
LB		 2414 }
2415
952a0e96 2416done:
42fba21d
LB		 2417 kfree(cmd);
2418 return rc;
2419}
2420
2421/*
2422 * CMD_SET_HW_SPEC.
2423 */
2424struct mwl8k_cmd_set_hw_spec {
2425 struct mwl8k_cmd_pkt header;
2426 __u8 hw_rev;
2427 __u8 host_interface;
2428 __le16 num_mcaddrs;
2429 __u8 perm_addr[ETH_ALEN];
2430 __le16 region_code;
2431 __le32 fw_rev;
2432 __le32 ps_cookie;
2433 __le32 caps;
2434 __le32 rx_queue_ptr;
2435 __le32 num_tx_queues;
e600707b 2436 __le32 tx_queue_ptrs[MWL8K_MAX_TX_QUEUES];
42fba21d
LB		 2437 __le32 flags;
2438 __le32 num_tx_desc_per_queue;
2439 __le32 total_rxd;
ba2d3587 2440} __packed;
42fba21d 2441
8a7a578c
BC		 2442/* If enabled, MWL8K_SET_HW_SPEC_FLAG_ENABLE_LIFE_TIME_EXPIRY will cause
2443 * packets to expire 500 ms after the timestamp in the tx descriptor. That is,
2444 * the packets that are queued for more than 500ms, will be dropped in the
2445 * hardware. This helps minimizing the issues caused due to head-of-line
2446 * blocking where a slow client can hog the bandwidth and affect traffic to a
2447 * faster client.
2448 */
2449#define MWL8K_SET_HW_SPEC_FLAG_ENABLE_LIFE_TIME_EXPIRY 0x00000400
b64fe619
LB		 2450#define MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT 0x00000080
2451#define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP 0x00000020
2452#define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON 0x00000010
42fba21d
LB		 2453
2454static int mwl8k_cmd_set_hw_spec(struct ieee80211_hw *hw)
2455{
2456 struct mwl8k_priv *priv = hw->priv;
2457 struct mwl8k_cmd_set_hw_spec *cmd;
2458 int rc;
2459 int i;
2460
2461 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2462 if (cmd == NULL)
2463 return -ENOMEM;
2464
2465 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_HW_SPEC);
2466 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2467
2468 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
2469 cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
e600707b 2470 cmd->num_tx_queues = cpu_to_le32(mwl8k_tx_queues(priv));
85c9205c
NS		 2471
2472 /*
2473 * Mac80211 stack has Q0 as highest priority and Q3 as lowest in
2474 * that order. Firmware has Q3 as highest priority and Q0 as lowest
2475 * in that order. Map Q3 of mac80211 to Q0 of firmware so that the
2476 * priority is interpreted the right way in firmware.
2477 */
e600707b
BC		 2478 for (i = 0; i < mwl8k_tx_queues(priv); i++) {
2479 int j = mwl8k_tx_queues(priv) - 1 - i;
85c9205c
NS		 2480 cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[j].txd_dma);
2481 }
2482
b64fe619
LB		 2483 cmd->flags = cpu_to_le32(MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT |
2484 MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP |
2485 MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON);
42fba21d
LB		 2486 cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
2487 cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
2488
2489 rc = mwl8k_post_cmd(hw, &cmd->header);
2490 kfree(cmd);
2491
2492 return rc;
2493}
2494
a66098da
LB		 2495/*
2496 * CMD_MAC_MULTICAST_ADR.
2497 */
2498struct mwl8k_cmd_mac_multicast_adr {
2499 struct mwl8k_cmd_pkt header;
2500 __le16 action;
2501 __le16 numaddr;
ce9e2e1b 2502 __u8 addr[0][ETH_ALEN];
a66098da
LB		 2503};
2504
d5e30845
LB		 2505#define MWL8K_ENABLE_RX_DIRECTED 0x0001
2506#define MWL8K_ENABLE_RX_MULTICAST 0x0002
2507#define MWL8K_ENABLE_RX_ALL_MULTICAST 0x0004
2508#define MWL8K_ENABLE_RX_BROADCAST 0x0008
ce9e2e1b 2509
e81cd2d6 2510static struct mwl8k_cmd_pkt *
447ced07 2511__mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw *hw, int allmulti,
22bedad3 2512 struct netdev_hw_addr_list *mc_list)
a66098da 2513{
e81cd2d6 2514 struct mwl8k_priv *priv = hw->priv;
a66098da 2515 struct mwl8k_cmd_mac_multicast_adr *cmd;
e81cd2d6 2516 int size;
22bedad3
JP		 2517 int mc_count = 0;
2518
2519 if (mc_list)
2520 mc_count = netdev_hw_addr_list_count(mc_list);
e81cd2d6 2521
447ced07 2522 if (allmulti || mc_count > priv->num_mcaddrs) {
d5e30845
LB		 2523 allmulti = 1;
2524 mc_count = 0;
2525 }
e81cd2d6
LB		 2526
2527 size = sizeof(*cmd) + mc_count * ETH_ALEN;
ce9e2e1b 2528
e81cd2d6 2529 cmd = kzalloc(size, GFP_ATOMIC);
a66098da 2530 if (cmd == NULL)
e81cd2d6 2531 return NULL;
a66098da
LB		 2532
2533 cmd->header.code = cpu_to_le16(MWL8K_CMD_MAC_MULTICAST_ADR);
2534 cmd->header.length = cpu_to_le16(size);
d5e30845
LB		 2535 cmd->action = cpu_to_le16(MWL8K_ENABLE_RX_DIRECTED |
2536 MWL8K_ENABLE_RX_BROADCAST);
2537
2538 if (allmulti) {
2539 cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_ALL_MULTICAST);
2540 } else if (mc_count) {
22bedad3
JP		 2541 struct netdev_hw_addr *ha;
2542 int i = 0;
d5e30845
LB		 2543
2544 cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_MULTICAST);
2545 cmd->numaddr = cpu_to_le16(mc_count);
22bedad3
JP		 2546 netdev_hw_addr_list_for_each(ha, mc_list) {
2547 memcpy(cmd->addr[i], ha->addr, ETH_ALEN);
a66098da 2548 }
a66098da
LB		 2549 }
2550
e81cd2d6 2551 return &cmd->header;
a66098da
LB		 2552}
2553
2554/*
55489b6e 2555 * CMD_GET_STAT.
a66098da 2556 */
55489b6e 2557struct mwl8k_cmd_get_stat {
a66098da 2558 struct mwl8k_cmd_pkt header;
a66098da 2559 __le32 stats[64];
ba2d3587 2560} __packed;
a66098da
LB		 2561
2562#define MWL8K_STAT_ACK_FAILURE 9
2563#define MWL8K_STAT_RTS_FAILURE 12
2564#define MWL8K_STAT_FCS_ERROR 24
2565#define MWL8K_STAT_RTS_SUCCESS 11
2566
55489b6e
LB		 2567static int mwl8k_cmd_get_stat(struct ieee80211_hw *hw,
2568 struct ieee80211_low_level_stats *stats)
a66098da 2569{
55489b6e 2570 struct mwl8k_cmd_get_stat *cmd;
a66098da
LB		 2571 int rc;
2572
2573 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2574 if (cmd == NULL)
2575 return -ENOMEM;
2576
2577 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_STAT);
2578 cmd->header.length = cpu_to_le16(sizeof(*cmd));
a66098da
LB		 2579
2580 rc = mwl8k_post_cmd(hw, &cmd->header);
2581 if (!rc) {
2582 stats->dot11ACKFailureCount =
2583 le32_to_cpu(cmd->stats[MWL8K_STAT_ACK_FAILURE]);
2584 stats->dot11RTSFailureCount =
2585 le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_FAILURE]);
2586 stats->dot11FCSErrorCount =
2587 le32_to_cpu(cmd->stats[MWL8K_STAT_FCS_ERROR]);
2588 stats->dot11RTSSuccessCount =
2589 le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_SUCCESS]);
2590 }
2591 kfree(cmd);
2592
2593 return rc;
2594}
2595
2596/*
55489b6e 2597 * CMD_RADIO_CONTROL.
a66098da 2598 */
55489b6e 2599struct mwl8k_cmd_radio_control {
a66098da
LB		 2600 struct mwl8k_cmd_pkt header;
2601 __le16 action;
2602 __le16 control;
2603 __le16 radio_on;
ba2d3587 2604} __packed;
a66098da 2605
c46563b7 2606static int
55489b6e 2607mwl8k_cmd_radio_control(struct ieee80211_hw *hw, bool enable, bool force)
a66098da
LB		 2608{
2609 struct mwl8k_priv *priv = hw->priv;
55489b6e 2610 struct mwl8k_cmd_radio_control *cmd;
a66098da
LB		 2611 int rc;
2612
c46563b7 2613 if (enable == priv->radio_on && !force)
a66098da
LB		 2614 return 0;
2615
a66098da
LB		 2616 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2617 if (cmd == NULL)
2618 return -ENOMEM;
2619
2620 cmd->header.code = cpu_to_le16(MWL8K_CMD_RADIO_CONTROL);
2621 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2622 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
68ce3884 2623 cmd->control = cpu_to_le16(priv->radio_short_preamble ? 3 : 1);
a66098da
LB		 2624 cmd->radio_on = cpu_to_le16(enable ? 0x0001 : 0x0000);
2625
2626 rc = mwl8k_post_cmd(hw, &cmd->header);
2627 kfree(cmd);
2628
2629 if (!rc)
c46563b7 2630 priv->radio_on = enable;
a66098da
LB		 2631
2632 return rc;
2633}
2634
55489b6e 2635static int mwl8k_cmd_radio_disable(struct ieee80211_hw *hw)
c46563b7 2636{
55489b6e 2637 return mwl8k_cmd_radio_control(hw, 0, 0);
c46563b7
LB		 2638}
2639
55489b6e 2640static int mwl8k_cmd_radio_enable(struct ieee80211_hw *hw)
c46563b7 2641{
55489b6e 2642 return mwl8k_cmd_radio_control(hw, 1, 0);
c46563b7
LB		 2643}
2644
a66098da
LB		 2645static int
2646mwl8k_set_radio_preamble(struct ieee80211_hw *hw, bool short_preamble)
2647{
99200a99 2648 struct mwl8k_priv *priv = hw->priv;
a66098da 2649
68ce3884 2650 priv->radio_short_preamble = short_preamble;
a66098da 2651
55489b6e 2652 return mwl8k_cmd_radio_control(hw, 1, 1);
a66098da
LB		 2653}
2654
2655/*
55489b6e 2656 * CMD_RF_TX_POWER.
a66098da 2657 */
41fdf097 2658#define MWL8K_RF_TX_POWER_LEVEL_TOTAL 8
a66098da 2659
55489b6e 2660struct mwl8k_cmd_rf_tx_power {
a66098da
LB		 2661 struct mwl8k_cmd_pkt header;
2662 __le16 action;
2663 __le16 support_level;
2664 __le16 current_level;
2665 __le16 reserved;
41fdf097 2666 __le16 power_level_list[MWL8K_RF_TX_POWER_LEVEL_TOTAL];
ba2d3587 2667} __packed;
a66098da 2668
55489b6e 2669static int mwl8k_cmd_rf_tx_power(struct ieee80211_hw *hw, int dBm)
a66098da 2670{
55489b6e 2671 struct mwl8k_cmd_rf_tx_power *cmd;
a66098da
LB		 2672 int rc;
2673
2674 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2675 if (cmd == NULL)
2676 return -ENOMEM;
2677
2678 cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_TX_POWER);
2679 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2680 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2681 cmd->support_level = cpu_to_le16(dBm);
2682
2683 rc = mwl8k_post_cmd(hw, &cmd->header);
2684 kfree(cmd);
2685
2686 return rc;
2687}
2688
41fdf097
NS		 2689/*
2690 * CMD_TX_POWER.
2691 */
2692#define MWL8K_TX_POWER_LEVEL_TOTAL 12
2693
2694struct mwl8k_cmd_tx_power {
2695 struct mwl8k_cmd_pkt header;
2696 __le16 action;
2697 __le16 band;
2698 __le16 channel;
2699 __le16 bw;
2700 __le16 sub_ch;
2701 __le16 power_level_list[MWL8K_TX_POWER_LEVEL_TOTAL];
ba30c4a5 2702} __packed;
41fdf097
NS		 2703
2704static int mwl8k_cmd_tx_power(struct ieee80211_hw *hw,
2705 struct ieee80211_conf *conf,
2706 unsigned short pwr)
2707{
2708 struct ieee80211_channel *channel = conf->channel;
2709 struct mwl8k_cmd_tx_power *cmd;
2710 int rc;
2711 int i;
2712
2713 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2714 if (cmd == NULL)
2715 return -ENOMEM;
2716
2717 cmd->header.code = cpu_to_le16(MWL8K_CMD_TX_POWER);
2718 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2719 cmd->action = cpu_to_le16(MWL8K_CMD_SET_LIST);
2720
2721 if (channel->band == IEEE80211_BAND_2GHZ)
2722 cmd->band = cpu_to_le16(0x1);
2723 else if (channel->band == IEEE80211_BAND_5GHZ)
2724 cmd->band = cpu_to_le16(0x4);
2725
2726 cmd->channel = channel->hw_value;
2727
2728 if (conf->channel_type == NL80211_CHAN_NO_HT ||
2729 conf->channel_type == NL80211_CHAN_HT20) {
2730 cmd->bw = cpu_to_le16(0x2);
2731 } else {
2732 cmd->bw = cpu_to_le16(0x4);
2733 if (conf->channel_type == NL80211_CHAN_HT40MINUS)
2734 cmd->sub_ch = cpu_to_le16(0x3);
2735 else if (conf->channel_type == NL80211_CHAN_HT40PLUS)
2736 cmd->sub_ch = cpu_to_le16(0x1);
2737 }
2738
2739 for (i = 0; i < MWL8K_TX_POWER_LEVEL_TOTAL; i++)
2740 cmd->power_level_list[i] = cpu_to_le16(pwr);
2741
2742 rc = mwl8k_post_cmd(hw, &cmd->header);
2743 kfree(cmd);
2744
2745 return rc;
2746}
2747
08b06347
LB		 2748/*
2749 * CMD_RF_ANTENNA.
2750 */
2751struct mwl8k_cmd_rf_antenna {
2752 struct mwl8k_cmd_pkt header;
2753 __le16 antenna;
2754 __le16 mode;
ba2d3587 2755} __packed;
08b06347
LB		 2756
2757#define MWL8K_RF_ANTENNA_RX 1
2758#define MWL8K_RF_ANTENNA_TX 2
2759
2760static int
2761mwl8k_cmd_rf_antenna(struct ieee80211_hw *hw, int antenna, int mask)
2762{
2763 struct mwl8k_cmd_rf_antenna *cmd;
2764 int rc;
2765
2766 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2767 if (cmd == NULL)
2768 return -ENOMEM;
2769
2770 cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_ANTENNA);
2771 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2772 cmd->antenna = cpu_to_le16(antenna);
2773 cmd->mode = cpu_to_le16(mask);
2774
2775 rc = mwl8k_post_cmd(hw, &cmd->header);
2776 kfree(cmd);
2777
2778 return rc;
2779}
2780
b64fe619
LB		 2781/*
2782 * CMD_SET_BEACON.
2783 */
2784struct mwl8k_cmd_set_beacon {
2785 struct mwl8k_cmd_pkt header;
2786 __le16 beacon_len;
2787 __u8 beacon[0];
2788};
2789
aa21d0f6
LB		 2790static int mwl8k_cmd_set_beacon(struct ieee80211_hw *hw,
2791 struct ieee80211_vif *vif, u8 *beacon, int len)
b64fe619
LB		 2792{
2793 struct mwl8k_cmd_set_beacon *cmd;
2794 int rc;
2795
2796 cmd = kzalloc(sizeof(*cmd) + len, GFP_KERNEL);
2797 if (cmd == NULL)
2798 return -ENOMEM;
2799
2800 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_BEACON);
2801 cmd->header.length = cpu_to_le16(sizeof(*cmd) + len);
2802 cmd->beacon_len = cpu_to_le16(len);
2803 memcpy(cmd->beacon, beacon, len);
2804
aa21d0f6 2805 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
b64fe619
LB		 2806 kfree(cmd);
2807
2808 return rc;
2809}
2810
a66098da
LB		 2811/*
2812 * CMD_SET_PRE_SCAN.
2813 */
2814struct mwl8k_cmd_set_pre_scan {
2815 struct mwl8k_cmd_pkt header;
ba2d3587 2816} __packed;
a66098da
LB		 2817
2818static int mwl8k_cmd_set_pre_scan(struct ieee80211_hw *hw)
2819{
2820 struct mwl8k_cmd_set_pre_scan *cmd;
2821 int rc;
2822
2823 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2824 if (cmd == NULL)
2825 return -ENOMEM;
2826
2827 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_PRE_SCAN);
2828 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2829
2830 rc = mwl8k_post_cmd(hw, &cmd->header);
2831 kfree(cmd);
2832
2833 return rc;
2834}
2835
2836/*
2837 * CMD_SET_POST_SCAN.
2838 */
2839struct mwl8k_cmd_set_post_scan {
2840 struct mwl8k_cmd_pkt header;
2841 __le32 isibss;
d89173f2 2842 __u8 bssid[ETH_ALEN];
ba2d3587 2843} __packed;
a66098da
LB		 2844
2845static int
0a11dfc3 2846mwl8k_cmd_set_post_scan(struct ieee80211_hw *hw, const __u8 *mac)
a66098da
LB		 2847{
2848 struct mwl8k_cmd_set_post_scan *cmd;
2849 int rc;
2850
2851 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2852 if (cmd == NULL)
2853 return -ENOMEM;
2854
2855 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_POST_SCAN);
2856 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2857 cmd->isibss = 0;
d89173f2 2858 memcpy(cmd->bssid, mac, ETH_ALEN);
a66098da
LB		 2859
2860 rc = mwl8k_post_cmd(hw, &cmd->header);
2861 kfree(cmd);
2862
2863 return rc;
2864}
2865
2866/*
2867 * CMD_SET_RF_CHANNEL.
2868 */
2869struct mwl8k_cmd_set_rf_channel {
2870 struct mwl8k_cmd_pkt header;
2871 __le16 action;
2872 __u8 current_channel;
2873 __le32 channel_flags;
ba2d3587 2874} __packed;
a66098da
LB		 2875
2876static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw *hw,
610677d2 2877 struct ieee80211_conf *conf)
a66098da 2878{
610677d2 2879 struct ieee80211_channel *channel = conf->channel;
a66098da
LB		 2880 struct mwl8k_cmd_set_rf_channel *cmd;
2881 int rc;
2882
2883 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2884 if (cmd == NULL)
2885 return -ENOMEM;
2886
2887 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RF_CHANNEL);
2888 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2889 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2890 cmd->current_channel = channel->hw_value;
610677d2 2891
a66098da 2892 if (channel->band == IEEE80211_BAND_2GHZ)
610677d2 2893 cmd->channel_flags |= cpu_to_le32(0x00000001);
42574ea2
LB		 2894 else if (channel->band == IEEE80211_BAND_5GHZ)
2895 cmd->channel_flags |= cpu_to_le32(0x00000004);
610677d2
LB		 2896
2897 if (conf->channel_type == NL80211_CHAN_NO_HT ||
2898 conf->channel_type == NL80211_CHAN_HT20)
2899 cmd->channel_flags |= cpu_to_le32(0x00000080);
2900 else if (conf->channel_type == NL80211_CHAN_HT40MINUS)
2901 cmd->channel_flags |= cpu_to_le32(0x000001900);
2902 else if (conf->channel_type == NL80211_CHAN_HT40PLUS)
2903 cmd->channel_flags |= cpu_to_le32(0x000000900);
a66098da
LB		 2904
2905 rc = mwl8k_post_cmd(hw, &cmd->header);
2906 kfree(cmd);
2907
2908 return rc;
2909}
2910
2911/*
55489b6e 2912 * CMD_SET_AID.
a66098da 2913 */
55489b6e
LB		 2914#define MWL8K_FRAME_PROT_DISABLED 0x00
2915#define MWL8K_FRAME_PROT_11G 0x07
2916#define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02
2917#define MWL8K_FRAME_PROT_11N_HT_ALL 0x06
a66098da 2918
55489b6e
LB		 2919struct mwl8k_cmd_update_set_aid {
2920 struct mwl8k_cmd_pkt header;
2921 __le16 aid;
a66098da 2922
55489b6e
LB		 2923 /* AP's MAC address (BSSID) */
2924 __u8 bssid[ETH_ALEN];
2925 __le16 protection_mode;
2926 __u8 supp_rates[14];
ba2d3587 2927} __packed;
a66098da 2928
c6e96010
LB		 2929static void legacy_rate_mask_to_array(u8 *rates, u32 mask)
2930{
2931 int i;
2932 int j;
2933
2934 /*
2935 * Clear nonstandard rates 4 and 13.
2936 */
2937 mask &= 0x1fef;
2938
2939 for (i = 0, j = 0; i < 14; i++) {
2940 if (mask & (1 << i))
777ad375 2941 rates[j++] = mwl8k_rates_24[i].hw_value;
c6e96010
LB		 2942 }
2943}
2944
55489b6e 2945static int
c6e96010
LB		 2946mwl8k_cmd_set_aid(struct ieee80211_hw *hw,
2947 struct ieee80211_vif *vif, u32 legacy_rate_mask)
a66098da 2948{
55489b6e
LB		 2949 struct mwl8k_cmd_update_set_aid *cmd;
2950 u16 prot_mode;
a66098da
LB		 2951 int rc;
2952
2953 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2954 if (cmd == NULL)
2955 return -ENOMEM;
2956
55489b6e 2957 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_AID);
a66098da 2958 cmd->header.length = cpu_to_le16(sizeof(*cmd));
7dc6a7a7 2959 cmd->aid = cpu_to_le16(vif->bss_conf.aid);
0a11dfc3 2960 memcpy(cmd->bssid, vif->bss_conf.bssid, ETH_ALEN);
a66098da 2961
7dc6a7a7 2962 if (vif->bss_conf.use_cts_prot) {
55489b6e
LB		 2963 prot_mode = MWL8K_FRAME_PROT_11G;
2964 } else {
7dc6a7a7 2965 switch (vif->bss_conf.ht_operation_mode &
55489b6e
LB		 2966 IEEE80211_HT_OP_MODE_PROTECTION) {
2967 case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ:
2968 prot_mode = MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY;
2969 break;
2970 case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED:
2971 prot_mode = MWL8K_FRAME_PROT_11N_HT_ALL;
2972 break;
2973 default:
2974 prot_mode = MWL8K_FRAME_PROT_DISABLED;
2975 break;
2976 }
2977 }
2978 cmd->protection_mode = cpu_to_le16(prot_mode);
a66098da 2979
c6e96010 2980 legacy_rate_mask_to_array(cmd->supp_rates, legacy_rate_mask);
a66098da
LB		 2981
2982 rc = mwl8k_post_cmd(hw, &cmd->header);
2983 kfree(cmd);
2984
2985 return rc;
2986}
2987
32060e1b 2988/*
55489b6e 2989 * CMD_SET_RATE.
32060e1b 2990 */
55489b6e
LB		 2991struct mwl8k_cmd_set_rate {
2992 struct mwl8k_cmd_pkt header;
2993 __u8 legacy_rates[14];
2994
2995 /* Bitmap for supported MCS codes. */
2996 __u8 mcs_set[16];
2997 __u8 reserved[16];
ba2d3587 2998} __packed;
32060e1b 2999
55489b6e 3000static int
c6e96010 3001mwl8k_cmd_set_rate(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
13935e2c 3002 u32 legacy_rate_mask, u8 *mcs_rates)
32060e1b 3003{
55489b6e 3004 struct mwl8k_cmd_set_rate *cmd;
32060e1b
LB		 3005 int rc;
3006
3007 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3008 if (cmd == NULL)
3009 return -ENOMEM;
3010
55489b6e 3011 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATE);
32060e1b 3012 cmd->header.length = cpu_to_le16(sizeof(*cmd));
c6e96010 3013 legacy_rate_mask_to_array(cmd->legacy_rates, legacy_rate_mask);
13935e2c 3014 memcpy(cmd->mcs_set, mcs_rates, 16);
32060e1b
LB		 3015
3016 rc = mwl8k_post_cmd(hw, &cmd->header);
3017 kfree(cmd);
3018
3019 return rc;
3020}
3021
a66098da 3022/*
55489b6e 3023 * CMD_FINALIZE_JOIN.
a66098da 3024 */
55489b6e
LB		 3025#define MWL8K_FJ_BEACON_MAXLEN 128
3026
3027struct mwl8k_cmd_finalize_join {
a66098da 3028 struct mwl8k_cmd_pkt header;
55489b6e
LB		 3029 __le32 sleep_interval; /* Number of beacon periods to sleep */
3030 __u8 beacon_data[MWL8K_FJ_BEACON_MAXLEN];
ba2d3587 3031} __packed;
a66098da 3032
55489b6e
LB		 3033static int mwl8k_cmd_finalize_join(struct ieee80211_hw *hw, void *frame,
3034 int framelen, int dtim)
a66098da 3035{
55489b6e
LB		 3036 struct mwl8k_cmd_finalize_join *cmd;
3037 struct ieee80211_mgmt *payload = frame;
3038 int payload_len;
a66098da
LB		 3039 int rc;
3040
3041 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3042 if (cmd == NULL)
3043 return -ENOMEM;
3044
55489b6e 3045 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_FINALIZE_JOIN);
a66098da 3046 cmd->header.length = cpu_to_le16(sizeof(*cmd));
55489b6e
LB		 3047 cmd->sleep_interval = cpu_to_le32(dtim ? dtim : 1);
3048
3049 payload_len = framelen - ieee80211_hdrlen(payload->frame_control);
3050 if (payload_len < 0)
3051 payload_len = 0;
3052 else if (payload_len > MWL8K_FJ_BEACON_MAXLEN)
3053 payload_len = MWL8K_FJ_BEACON_MAXLEN;
3054
3055 memcpy(cmd->beacon_data, &payload->u.beacon, payload_len);
a66098da
LB		 3056
3057 rc = mwl8k_post_cmd(hw, &cmd->header);
3058 kfree(cmd);
3059
3060 return rc;
3061}
3062
3063/*
55489b6e 3064 * CMD_SET_RTS_THRESHOLD.
a66098da 3065 */
55489b6e 3066struct mwl8k_cmd_set_rts_threshold {
a66098da
LB		 3067 struct mwl8k_cmd_pkt header;
3068 __le16 action;
55489b6e 3069 __le16 threshold;
ba2d3587 3070} __packed;
a66098da 3071
c2c2b12a
LB		 3072static int
3073mwl8k_cmd_set_rts_threshold(struct ieee80211_hw *hw, int rts_thresh)
a66098da 3074{
55489b6e 3075 struct mwl8k_cmd_set_rts_threshold *cmd;
a66098da
LB		 3076 int rc;
3077
3078 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3079 if (cmd == NULL)
3080 return -ENOMEM;
3081
55489b6e 3082 cmd->header.code = cpu_to_le16(MWL8K_CMD_RTS_THRESHOLD);
a66098da 3083 cmd->header.length = cpu_to_le16(sizeof(*cmd));
c2c2b12a
LB		 3084 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
3085 cmd->threshold = cpu_to_le16(rts_thresh);
a66098da
LB		 3086
3087 rc = mwl8k_post_cmd(hw, &cmd->header);
3088 kfree(cmd);
3089
a66098da
LB		 3090 return rc;
3091}
3092
3093/*
55489b6e 3094 * CMD_SET_SLOT.
a66098da 3095 */
55489b6e 3096struct mwl8k_cmd_set_slot {
a66098da
LB		 3097 struct mwl8k_cmd_pkt header;
3098 __le16 action;
55489b6e 3099 __u8 short_slot;
ba2d3587 3100} __packed;
a66098da 3101
55489b6e 3102static int mwl8k_cmd_set_slot(struct ieee80211_hw *hw, bool short_slot_time)
a66098da 3103{
55489b6e 3104 struct mwl8k_cmd_set_slot *cmd;
a66098da
LB		 3105 int rc;
3106
3107 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3108 if (cmd == NULL)
3109 return -ENOMEM;
3110
55489b6e 3111 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_SLOT);
a66098da 3112 cmd->header.length = cpu_to_le16(sizeof(*cmd));
55489b6e
LB		 3113 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
3114 cmd->short_slot = short_slot_time;
a66098da
LB		 3115
3116 rc = mwl8k_post_cmd(hw, &cmd->header);
3117 kfree(cmd);
3118
3119 return rc;
3120}
3121
3122/*
3123 * CMD_SET_EDCA_PARAMS.
3124 */
3125struct mwl8k_cmd_set_edca_params {
3126 struct mwl8k_cmd_pkt header;
3127
3128 /* See MWL8K_SET_EDCA_XXX below */
3129 __le16 action;
3130
3131 /* TX opportunity in units of 32 us */
3132 __le16 txop;
3133
2e484c89
LB		 3134 union {
3135 struct {
3136 /* Log exponent of max contention period: 0...15 */
3137 __le32 log_cw_max;
3138
3139 /* Log exponent of min contention period: 0...15 */
3140 __le32 log_cw_min;
3141
3142 /* Adaptive interframe spacing in units of 32us */
3143 __u8 aifs;
3144
3145 /* TX queue to configure */
3146 __u8 txq;
3147 } ap;
3148 struct {
3149 /* Log exponent of max contention period: 0...15 */
3150 __u8 log_cw_max;
a66098da 3151
2e484c89
LB		 3152 /* Log exponent of min contention period: 0...15 */
3153 __u8 log_cw_min;
a66098da 3154
2e484c89
LB		 3155 /* Adaptive interframe spacing in units of 32us */
3156 __u8 aifs;
a66098da 3157
2e484c89
LB		 3158 /* TX queue to configure */
3159 __u8 txq;
3160 } sta;
3161 };
ba2d3587 3162} __packed;
a66098da 3163
a66098da
LB		 3164#define MWL8K_SET_EDCA_CW 0x01
3165#define MWL8K_SET_EDCA_TXOP 0x02
3166#define MWL8K_SET_EDCA_AIFS 0x04
3167
3168#define MWL8K_SET_EDCA_ALL (MWL8K_SET_EDCA_CW | \
3169 MWL8K_SET_EDCA_TXOP | \
3170 MWL8K_SET_EDCA_AIFS)
3171
3172static int
55489b6e
LB		 3173mwl8k_cmd_set_edca_params(struct ieee80211_hw *hw, __u8 qnum,
3174 __u16 cw_min, __u16 cw_max,
3175 __u8 aifs, __u16 txop)
a66098da 3176{
2e484c89 3177 struct mwl8k_priv *priv = hw->priv;
a66098da 3178 struct mwl8k_cmd_set_edca_params *cmd;
a66098da
LB		 3179 int rc;
3180
3181 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3182 if (cmd == NULL)
3183 return -ENOMEM;
3184
a66098da
LB		 3185 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_EDCA_PARAMS);
3186 cmd->header.length = cpu_to_le16(sizeof(*cmd));
a66098da
LB		 3187 cmd->action = cpu_to_le16(MWL8K_SET_EDCA_ALL);
3188 cmd->txop = cpu_to_le16(txop);
2e484c89
LB		 3189 if (priv->ap_fw) {
3190 cmd->ap.log_cw_max = cpu_to_le32(ilog2(cw_max + 1));
3191 cmd->ap.log_cw_min = cpu_to_le32(ilog2(cw_min + 1));
3192 cmd->ap.aifs = aifs;
3193 cmd->ap.txq = qnum;
3194 } else {
3195 cmd->sta.log_cw_max = (u8)ilog2(cw_max + 1);
3196 cmd->sta.log_cw_min = (u8)ilog2(cw_min + 1);
3197 cmd->sta.aifs = aifs;
3198 cmd->sta.txq = qnum;
3199 }
a66098da
LB		 3200
3201 rc = mwl8k_post_cmd(hw, &cmd->header);
3202 kfree(cmd);
3203
3204 return rc;
3205}
3206
3207/*
55489b6e 3208 * CMD_SET_WMM_MODE.
a66098da 3209 */
55489b6e 3210struct mwl8k_cmd_set_wmm_mode {
a66098da 3211 struct mwl8k_cmd_pkt header;
55489b6e 3212 __le16 action;
ba2d3587 3213} __packed;
a66098da 3214
55489b6e 3215static int mwl8k_cmd_set_wmm_mode(struct ieee80211_hw *hw, bool enable)
a66098da 3216{
55489b6e
LB		 3217 struct mwl8k_priv *priv = hw->priv;
3218 struct mwl8k_cmd_set_wmm_mode *cmd;
a66098da
LB		 3219 int rc;
3220
a66098da
LB		 3221 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3222 if (cmd == NULL)
3223 return -ENOMEM;
3224
55489b6e 3225 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_WMM_MODE);
a66098da 3226 cmd->header.length = cpu_to_le16(sizeof(*cmd));
55489b6e 3227 cmd->action = cpu_to_le16(!!enable);
a66098da
LB		 3228
3229 rc = mwl8k_post_cmd(hw, &cmd->header);
3230 kfree(cmd);
16cec43d 3231
55489b6e
LB		 3232 if (!rc)
3233 priv->wmm_enabled = enable;
a66098da
LB		 3234
3235 return rc;
3236}
3237
3238/*
55489b6e 3239 * CMD_MIMO_CONFIG.
a66098da 3240 */
55489b6e
LB		 3241struct mwl8k_cmd_mimo_config {
3242 struct mwl8k_cmd_pkt header;
3243 __le32 action;
3244 __u8 rx_antenna_map;
3245 __u8 tx_antenna_map;
ba2d3587 3246} __packed;
a66098da 3247
55489b6e 3248static int mwl8k_cmd_mimo_config(struct ieee80211_hw *hw, __u8 rx, __u8 tx)
a66098da 3249{
55489b6e 3250 struct mwl8k_cmd_mimo_config *cmd;
a66098da
LB		 3251 int rc;
3252
3253 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3254 if (cmd == NULL)
3255 return -ENOMEM;
3256
55489b6e 3257 cmd->header.code = cpu_to_le16(MWL8K_CMD_MIMO_CONFIG);
a66098da 3258 cmd->header.length = cpu_to_le16(sizeof(*cmd));
55489b6e
LB		 3259 cmd->action = cpu_to_le32((u32)MWL8K_CMD_SET);
3260 cmd->rx_antenna_map = rx;
3261 cmd->tx_antenna_map = tx;
a66098da
LB		 3262
3263 rc = mwl8k_post_cmd(hw, &cmd->header);
3264 kfree(cmd);
3265
3266 return rc;
3267}
3268
3269/*
b71ed2c6 3270 * CMD_USE_FIXED_RATE (STA version).
a66098da 3271 */
b71ed2c6
LB		 3272struct mwl8k_cmd_use_fixed_rate_sta {
3273 struct mwl8k_cmd_pkt header;
3274 __le32 action;
3275 __le32 allow_rate_drop;
3276 __le32 num_rates;
3277 struct {
3278 __le32 is_ht_rate;
3279 __le32 enable_retry;
3280 __le32 rate;
3281 __le32 retry_count;
3282 } rate_entry[8];
3283 __le32 rate_type;
3284 __le32 reserved1;
3285 __le32 reserved2;
ba2d3587 3286} __packed;
a66098da 3287
b71ed2c6
LB		 3288#define MWL8K_USE_AUTO_RATE 0x0002
3289#define MWL8K_UCAST_RATE 0
a66098da 3290
b71ed2c6 3291static int mwl8k_cmd_use_fixed_rate_sta(struct ieee80211_hw *hw)
a66098da 3292{
b71ed2c6 3293 struct mwl8k_cmd_use_fixed_rate_sta *cmd;
a66098da
LB		 3294 int rc;
3295
3296 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3297 if (cmd == NULL)
3298 return -ENOMEM;
3299
3300 cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
3301 cmd->header.length = cpu_to_le16(sizeof(*cmd));
b71ed2c6
LB		 3302 cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE);
3303 cmd->rate_type = cpu_to_le32(MWL8K_UCAST_RATE);
a66098da
LB		 3304
3305 rc = mwl8k_post_cmd(hw, &cmd->header);
3306 kfree(cmd);
3307
3308 return rc;
3309}
3310
088aab8b
LB		 3311/*
3312 * CMD_USE_FIXED_RATE (AP version).
3313 */
3314struct mwl8k_cmd_use_fixed_rate_ap {
3315 struct mwl8k_cmd_pkt header;
3316 __le32 action;
3317 __le32 allow_rate_drop;
3318 __le32 num_rates;
3319 struct mwl8k_rate_entry_ap {
3320 __le32 is_ht_rate;
3321 __le32 enable_retry;
3322 __le32 rate;
3323 __le32 retry_count;
3324 } rate_entry[4];
3325 u8 multicast_rate;
3326 u8 multicast_rate_type;
3327 u8 management_rate;
ba2d3587 3328} __packed;
088aab8b
LB		 3329
3330static int
3331mwl8k_cmd_use_fixed_rate_ap(struct ieee80211_hw *hw, int mcast, int mgmt)
3332{
3333 struct mwl8k_cmd_use_fixed_rate_ap *cmd;
3334 int rc;
3335
3336 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3337 if (cmd == NULL)
3338 return -ENOMEM;
3339
3340 cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
3341 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3342 cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE);
3343 cmd->multicast_rate = mcast;
3344 cmd->management_rate = mgmt;
3345
3346 rc = mwl8k_post_cmd(hw, &cmd->header);
3347 kfree(cmd);
3348
3349 return rc;
3350}
3351
55489b6e
LB		 3352/*
3353 * CMD_ENABLE_SNIFFER.
3354 */
3355struct mwl8k_cmd_enable_sniffer {
3356 struct mwl8k_cmd_pkt header;
3357 __le32 action;
ba2d3587 3358} __packed;
55489b6e
LB		 3359
3360static int mwl8k_cmd_enable_sniffer(struct ieee80211_hw *hw, bool enable)
3361{
3362 struct mwl8k_cmd_enable_sniffer *cmd;
3363 int rc;
3364
3365 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3366 if (cmd == NULL)
3367 return -ENOMEM;
3368
3369 cmd->header.code = cpu_to_le16(MWL8K_CMD_ENABLE_SNIFFER);
3370 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3371 cmd->action = cpu_to_le32(!!enable);
3372
3373 rc = mwl8k_post_cmd(hw, &cmd->header);
3374 kfree(cmd);
3375
3376 return rc;
3377}
3378
3379/*
3380 * CMD_SET_MAC_ADDR.
3381 */
3382struct mwl8k_cmd_set_mac_addr {
3383 struct mwl8k_cmd_pkt header;
3384 union {
3385 struct {
3386 __le16 mac_type;
3387 __u8 mac_addr[ETH_ALEN];
3388 } mbss;
3389 __u8 mac_addr[ETH_ALEN];
3390 };
ba2d3587 3391} __packed;
55489b6e 3392
ee0ddf18
LB		 3393#define MWL8K_MAC_TYPE_PRIMARY_CLIENT 0
3394#define MWL8K_MAC_TYPE_SECONDARY_CLIENT 1
3395#define MWL8K_MAC_TYPE_PRIMARY_AP 2
3396#define MWL8K_MAC_TYPE_SECONDARY_AP 3
a9e00b15 3397
aa21d0f6
LB		 3398static int mwl8k_cmd_set_mac_addr(struct ieee80211_hw *hw,
3399 struct ieee80211_vif *vif, u8 *mac)
55489b6e
LB		 3400{
3401 struct mwl8k_priv *priv = hw->priv;
ee0ddf18 3402 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
55489b6e 3403 struct mwl8k_cmd_set_mac_addr *cmd;
ee0ddf18 3404 int mac_type;
55489b6e
LB		 3405 int rc;
3406
ee0ddf18
LB		 3407 mac_type = MWL8K_MAC_TYPE_PRIMARY_AP;
3408 if (vif != NULL && vif->type == NL80211_IFTYPE_STATION) {
3409 if (mwl8k_vif->macid + 1 == ffs(priv->sta_macids_supported))
3410 mac_type = MWL8K_MAC_TYPE_PRIMARY_CLIENT;
3411 else
3412 mac_type = MWL8K_MAC_TYPE_SECONDARY_CLIENT;
3413 } else if (vif != NULL && vif->type == NL80211_IFTYPE_AP) {
3414 if (mwl8k_vif->macid + 1 == ffs(priv->ap_macids_supported))
3415 mac_type = MWL8K_MAC_TYPE_PRIMARY_AP;
3416 else
3417 mac_type = MWL8K_MAC_TYPE_SECONDARY_AP;
3418 }
3419
55489b6e
LB		 3420 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3421 if (cmd == NULL)
3422 return -ENOMEM;
3423
3424 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_MAC_ADDR);
3425 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3426 if (priv->ap_fw) {
ee0ddf18 3427 cmd->mbss.mac_type = cpu_to_le16(mac_type);
55489b6e
LB		 3428 memcpy(cmd->mbss.mac_addr, mac, ETH_ALEN);
3429 } else {
3430 memcpy(cmd->mac_addr, mac, ETH_ALEN);
3431 }
3432
aa21d0f6 3433 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
55489b6e
LB		 3434 kfree(cmd);
3435
3436 return rc;
3437}
3438
3439/*
3440 * CMD_SET_RATEADAPT_MODE.
3441 */
3442struct mwl8k_cmd_set_rate_adapt_mode {
3443 struct mwl8k_cmd_pkt header;
3444 __le16 action;
3445 __le16 mode;
ba2d3587 3446} __packed;
55489b6e
LB		 3447
3448static int mwl8k_cmd_set_rateadapt_mode(struct ieee80211_hw *hw, __u16 mode)
3449{
3450 struct mwl8k_cmd_set_rate_adapt_mode *cmd;
3451 int rc;
3452
3453 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3454 if (cmd == NULL)
3455 return -ENOMEM;
3456
3457 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATEADAPT_MODE);
3458 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3459 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
3460 cmd->mode = cpu_to_le16(mode);
3461
3462 rc = mwl8k_post_cmd(hw, &cmd->header);
3463 kfree(cmd);
3464
3465 return rc;
3466}
3467
3aefc37e
NS		 3468/*
3469 * CMD_GET_WATCHDOG_BITMAP.
3470 */
3471struct mwl8k_cmd_get_watchdog_bitmap {
3472 struct mwl8k_cmd_pkt header;
3473 u8 bitmap;
3474} __packed;
3475
3476static int mwl8k_cmd_get_watchdog_bitmap(struct ieee80211_hw *hw, u8 *bitmap)
3477{
3478 struct mwl8k_cmd_get_watchdog_bitmap *cmd;
3479 int rc;
3480
3481 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3482 if (cmd == NULL)
3483 return -ENOMEM;
3484
3485 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_WATCHDOG_BITMAP);
3486 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3487
3488 rc = mwl8k_post_cmd(hw, &cmd->header);
3489 if (!rc)
3490 *bitmap = cmd->bitmap;
3491
3492 kfree(cmd);
3493
3494 return rc;
3495}
3496
3497#define INVALID_BA 0xAA
3498static void mwl8k_watchdog_ba_events(struct work_struct *work)
3499{
3500 int rc;
3501 u8 bitmap = 0, stream_index;
3502 struct mwl8k_ampdu_stream *streams;
3503 struct mwl8k_priv *priv =
3504 container_of(work, struct mwl8k_priv, watchdog_ba_handle);
3505
3506 rc = mwl8k_cmd_get_watchdog_bitmap(priv->hw, &bitmap);
3507 if (rc)
3508 return;
3509
3510 if (bitmap == INVALID_BA)
3511 return;
3512
3513 /* the bitmap is the hw queue number. Map it to the ampdu queue. */
3514 stream_index = bitmap - MWL8K_TX_WMM_QUEUES;
3515
3516 BUG_ON(stream_index >= priv->num_ampdu_queues);
3517
3518 streams = &priv->ampdu[stream_index];
3519
3520 if (streams->state == AMPDU_STREAM_ACTIVE)
3521 ieee80211_stop_tx_ba_session(streams->sta, streams->tid);
3522
3523 return;
3524}
3525
3526
b64fe619
LB		 3527/*
3528 * CMD_BSS_START.
3529 */
3530struct mwl8k_cmd_bss_start {
3531 struct mwl8k_cmd_pkt header;
3532 __le32 enable;
ba2d3587 3533} __packed;
b64fe619 3534
aa21d0f6
LB		 3535static int mwl8k_cmd_bss_start(struct ieee80211_hw *hw,
3536 struct ieee80211_vif *vif, int enable)
b64fe619
LB		 3537{
3538 struct mwl8k_cmd_bss_start *cmd;
3539 int rc;
3540
3541 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3542 if (cmd == NULL)
3543 return -ENOMEM;
3544
3545 cmd->header.code = cpu_to_le16(MWL8K_CMD_BSS_START);
3546 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3547 cmd->enable = cpu_to_le32(enable);
3548
aa21d0f6 3549 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
b64fe619
LB		 3550 kfree(cmd);
3551
3552 return rc;
3553}
3554
5faa1aff
NS		 3555/*
3556 * CMD_BASTREAM.
3557 */
3558
3559/*
3560 * UPSTREAM is tx direction
3561 */
3562#define BASTREAM_FLAG_DIRECTION_UPSTREAM 0x00
3563#define BASTREAM_FLAG_IMMEDIATE_TYPE 0x01
3564
ba30c4a5 3565enum ba_stream_action_type {
5faa1aff
NS		 3566 MWL8K_BA_CREATE,
3567 MWL8K_BA_UPDATE,
3568 MWL8K_BA_DESTROY,
3569 MWL8K_BA_FLUSH,
3570 MWL8K_BA_CHECK,
ba30c4a5 3571};
5faa1aff
NS		 3572
3573
3574struct mwl8k_create_ba_stream {
3575 __le32 flags;
3576 __le32 idle_thrs;
3577 __le32 bar_thrs;
3578 __le32 window_size;
3579 u8 peer_mac_addr[6];
3580 u8 dialog_token;
3581 u8 tid;
3582 u8 queue_id;
3583 u8 param_info;
3584 __le32 ba_context;
3585 u8 reset_seq_no_flag;
3586 __le16 curr_seq_no;
3587 u8 sta_src_mac_addr[6];
3588} __packed;
3589
3590struct mwl8k_destroy_ba_stream {
3591 __le32 flags;
3592 __le32 ba_context;
3593} __packed;
3594
3595struct mwl8k_cmd_bastream {
3596 struct mwl8k_cmd_pkt header;
3597 __le32 action;
3598 union {
3599 struct mwl8k_create_ba_stream create_params;
3600 struct mwl8k_destroy_ba_stream destroy_params;
3601 };
3602} __packed;
3603
3604static int
3605mwl8k_check_ba(struct ieee80211_hw *hw, struct mwl8k_ampdu_stream *stream)
3606{
3607 struct mwl8k_cmd_bastream *cmd;
3608 int rc;
3609
3610 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3611 if (cmd == NULL)
3612 return -ENOMEM;
3613
3614 cmd->header.code = cpu_to_le16(MWL8K_CMD_BASTREAM);
3615 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3616
3617 cmd->action = cpu_to_le32(MWL8K_BA_CHECK);
3618
3619 cmd->create_params.queue_id = stream->idx;
3620 memcpy(&cmd->create_params.peer_mac_addr[0], stream->sta->addr,
3621 ETH_ALEN);
3622 cmd->create_params.tid = stream->tid;
3623
3624 cmd->create_params.flags =
3625 cpu_to_le32(BASTREAM_FLAG_IMMEDIATE_TYPE) |
3626 cpu_to_le32(BASTREAM_FLAG_DIRECTION_UPSTREAM);
3627
3628 rc = mwl8k_post_cmd(hw, &cmd->header);
3629
3630 kfree(cmd);
3631
3632 return rc;
3633}
3634
3635static int
3636mwl8k_create_ba(struct ieee80211_hw *hw, struct mwl8k_ampdu_stream *stream,
3637 u8 buf_size)
3638{
3639 struct mwl8k_cmd_bastream *cmd;
3640 int rc;
3641
3642 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3643 if (cmd == NULL)
3644 return -ENOMEM;
3645
3646
3647 cmd->header.code = cpu_to_le16(MWL8K_CMD_BASTREAM);
3648 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3649
3650 cmd->action = cpu_to_le32(MWL8K_BA_CREATE);
3651
3652 cmd->create_params.bar_thrs = cpu_to_le32((u32)buf_size);
3653 cmd->create_params.window_size = cpu_to_le32((u32)buf_size);
3654 cmd->create_params.queue_id = stream->idx;
3655
3656 memcpy(cmd->create_params.peer_mac_addr, stream->sta->addr, ETH_ALEN);
3657 cmd->create_params.tid = stream->tid;
3658 cmd->create_params.curr_seq_no = cpu_to_le16(0);
3659 cmd->create_params.reset_seq_no_flag = 1;
3660
3661 cmd->create_params.param_info =
3662 (stream->sta->ht_cap.ampdu_factor &
3663 IEEE80211_HT_AMPDU_PARM_FACTOR) |
3664 ((stream->sta->ht_cap.ampdu_density << 2) &
3665 IEEE80211_HT_AMPDU_PARM_DENSITY);
3666
3667 cmd->create_params.flags =
3668 cpu_to_le32(BASTREAM_FLAG_IMMEDIATE_TYPE |
3669 BASTREAM_FLAG_DIRECTION_UPSTREAM);
3670
3671 rc = mwl8k_post_cmd(hw, &cmd->header);
3672
3673 wiphy_debug(hw->wiphy, "Created a BA stream for %pM : tid %d\n",
3674 stream->sta->addr, stream->tid);
3675 kfree(cmd);
3676
3677 return rc;
3678}
3679
3680static void mwl8k_destroy_ba(struct ieee80211_hw *hw,
3681 struct mwl8k_ampdu_stream *stream)
3682{
3683 struct mwl8k_cmd_bastream *cmd;
3684
3685 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3686 if (cmd == NULL)
3687 return;
3688
3689 cmd->header.code = cpu_to_le16(MWL8K_CMD_BASTREAM);
3690 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3691 cmd->action = cpu_to_le32(MWL8K_BA_DESTROY);
3692
3693 cmd->destroy_params.ba_context = cpu_to_le32(stream->idx);
3694 mwl8k_post_cmd(hw, &cmd->header);
3695
3696 wiphy_debug(hw->wiphy, "Deleted BA stream index %d\n", stream->idx);
3697
3698 kfree(cmd);
3699}
3700
3f5610ff
LB		 3701/*
3702 * CMD_SET_NEW_STN.
3703 */
3704struct mwl8k_cmd_set_new_stn {
3705 struct mwl8k_cmd_pkt header;
3706 __le16 aid;
3707 __u8 mac_addr[6];
3708 __le16 stn_id;
3709 __le16 action;
3710 __le16 rsvd;
3711 __le32 legacy_rates;
3712 __u8 ht_rates[4];
3713 __le16 cap_info;
3714 __le16 ht_capabilities_info;
3715 __u8 mac_ht_param_info;
3716 __u8 rev;
3717 __u8 control_channel;
3718 __u8 add_channel;
3719 __le16 op_mode;
3720 __le16 stbc;
3721 __u8 add_qos_info;
3722 __u8 is_qos_sta;
3723 __le32 fw_sta_ptr;
ba2d3587 3724} __packed;
3f5610ff
LB		 3725
3726#define MWL8K_STA_ACTION_ADD 0
3727#define MWL8K_STA_ACTION_REMOVE 2
3728
3729static int mwl8k_cmd_set_new_stn_add(struct ieee80211_hw *hw,
3730 struct ieee80211_vif *vif,
3731 struct ieee80211_sta *sta)
3732{
3733 struct mwl8k_cmd_set_new_stn *cmd;
8707d026 3734 u32 rates;
3f5610ff
LB		 3735 int rc;
3736
3737 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3738 if (cmd == NULL)
3739 return -ENOMEM;
3740
3741 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
3742 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3743 cmd->aid = cpu_to_le16(sta->aid);
3744 memcpy(cmd->mac_addr, sta->addr, ETH_ALEN);
3745 cmd->stn_id = cpu_to_le16(sta->aid);
3746 cmd->action = cpu_to_le16(MWL8K_STA_ACTION_ADD);
8707d026
LB		 3747 if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
3748 rates = sta->supp_rates[IEEE80211_BAND_2GHZ];
3749 else
3750 rates = sta->supp_rates[IEEE80211_BAND_5GHZ] << 5;
3751 cmd->legacy_rates = cpu_to_le32(rates);
3f5610ff
LB		 3752 if (sta->ht_cap.ht_supported) {
3753 cmd->ht_rates[0] = sta->ht_cap.mcs.rx_mask[0];
3754 cmd->ht_rates[1] = sta->ht_cap.mcs.rx_mask[1];
3755 cmd->ht_rates[2] = sta->ht_cap.mcs.rx_mask[2];
3756 cmd->ht_rates[3] = sta->ht_cap.mcs.rx_mask[3];
3757 cmd->ht_capabilities_info = cpu_to_le16(sta->ht_cap.cap);
3758 cmd->mac_ht_param_info = (sta->ht_cap.ampdu_factor & 3) |
3759 ((sta->ht_cap.ampdu_density & 7) << 2);
3760 cmd->is_qos_sta = 1;
3761 }
3762
aa21d0f6 3763 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
3f5610ff
LB		 3764 kfree(cmd);
3765
3766 return rc;
3767}
3768
b64fe619
LB		 3769static int mwl8k_cmd_set_new_stn_add_self(struct ieee80211_hw *hw,
3770 struct ieee80211_vif *vif)
3771{
3772 struct mwl8k_cmd_set_new_stn *cmd;
3773 int rc;
3774
3775 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3776 if (cmd == NULL)
3777 return -ENOMEM;
3778
3779 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
3780 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3781 memcpy(cmd->mac_addr, vif->addr, ETH_ALEN);
3782
aa21d0f6 3783 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
b64fe619
LB		 3784 kfree(cmd);
3785
3786 return rc;
3787}
3788
3f5610ff
LB		 3789static int mwl8k_cmd_set_new_stn_del(struct ieee80211_hw *hw,
3790 struct ieee80211_vif *vif, u8 *addr)
3791{
3792 struct mwl8k_cmd_set_new_stn *cmd;
3793 int rc;
3794
3795 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3796 if (cmd == NULL)
3797 return -ENOMEM;
3798
3799 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
3800 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3801 memcpy(cmd->mac_addr, addr, ETH_ALEN);
3802 cmd->action = cpu_to_le16(MWL8K_STA_ACTION_REMOVE);
3803
aa21d0f6 3804 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
3f5610ff
LB		 3805 kfree(cmd);
3806
3807 return rc;
3808}
3809
fcdc403c
NS		 3810/*
3811 * CMD_UPDATE_ENCRYPTION.
3812 */
3813
3814#define MAX_ENCR_KEY_LENGTH 16
3815#define MIC_KEY_LENGTH 8
3816
3817struct mwl8k_cmd_update_encryption {
3818 struct mwl8k_cmd_pkt header;
3819
3820 __le32 action;
3821 __le32 reserved;
3822 __u8 mac_addr[6];
3823 __u8 encr_type;
3824
ba30c4a5 3825} __packed;
fcdc403c
NS		 3826
3827struct mwl8k_cmd_set_key {
3828 struct mwl8k_cmd_pkt header;
3829
3830 __le32 action;
3831 __le32 reserved;
3832 __le16 length;
3833 __le16 key_type_id;
3834 __le32 key_info;
3835 __le32 key_id;
3836 __le16 key_len;
3837 __u8 key_material[MAX_ENCR_KEY_LENGTH];
3838 __u8 tkip_tx_mic_key[MIC_KEY_LENGTH];
3839 __u8 tkip_rx_mic_key[MIC_KEY_LENGTH];
3840 __le16 tkip_rsc_low;
3841 __le32 tkip_rsc_high;
3842 __le16 tkip_tsc_low;
3843 __le32 tkip_tsc_high;
3844 __u8 mac_addr[6];
ba30c4a5 3845} __packed;
fcdc403c
NS		 3846
3847enum {
3848 MWL8K_ENCR_ENABLE,
3849 MWL8K_ENCR_SET_KEY,
3850 MWL8K_ENCR_REMOVE_KEY,
3851 MWL8K_ENCR_SET_GROUP_KEY,
3852};
3853
3854#define MWL8K_UPDATE_ENCRYPTION_TYPE_WEP 0
3855#define MWL8K_UPDATE_ENCRYPTION_TYPE_DISABLE 1
3856#define MWL8K_UPDATE_ENCRYPTION_TYPE_TKIP 4
3857#define MWL8K_UPDATE_ENCRYPTION_TYPE_MIXED 7
3858#define MWL8K_UPDATE_ENCRYPTION_TYPE_AES 8
3859
3860enum {
3861 MWL8K_ALG_WEP,
3862 MWL8K_ALG_TKIP,
3863 MWL8K_ALG_CCMP,
3864};
3865
3866#define MWL8K_KEY_FLAG_TXGROUPKEY 0x00000004
3867#define MWL8K_KEY_FLAG_PAIRWISE 0x00000008
3868#define MWL8K_KEY_FLAG_TSC_VALID 0x00000040
3869#define MWL8K_KEY_FLAG_WEP_TXKEY 0x01000000
3870#define MWL8K_KEY_FLAG_MICKEY_VALID 0x02000000
3871
3872static int mwl8k_cmd_update_encryption_enable(struct ieee80211_hw *hw,
3873 struct ieee80211_vif *vif,
3874 u8 *addr,
3875 u8 encr_type)
3876{
3877 struct mwl8k_cmd_update_encryption *cmd;
3878 int rc;
3879
3880 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3881 if (cmd == NULL)
3882 return -ENOMEM;
3883
3884 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_ENCRYPTION);
3885 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3886 cmd->action = cpu_to_le32(MWL8K_ENCR_ENABLE);
3887 memcpy(cmd->mac_addr, addr, ETH_ALEN);
3888 cmd->encr_type = encr_type;
3889
3890 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
3891 kfree(cmd);
3892
3893 return rc;
3894}
3895
3896static int mwl8k_encryption_set_cmd_info(struct mwl8k_cmd_set_key *cmd,
3897 u8 *addr,
3898 struct ieee80211_key_conf *key)
3899{
3900 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_ENCRYPTION);
3901 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3902 cmd->length = cpu_to_le16(sizeof(*cmd) -
3903 offsetof(struct mwl8k_cmd_set_key, length));
3904 cmd->key_id = cpu_to_le32(key->keyidx);
3905 cmd->key_len = cpu_to_le16(key->keylen);
3906 memcpy(cmd->mac_addr, addr, ETH_ALEN);
3907
3908 switch (key->cipher) {
3909 case WLAN_CIPHER_SUITE_WEP40:
3910 case WLAN_CIPHER_SUITE_WEP104:
3911 cmd->key_type_id = cpu_to_le16(MWL8K_ALG_WEP);
3912 if (key->keyidx == 0)
3913 cmd->key_info = cpu_to_le32(MWL8K_KEY_FLAG_WEP_TXKEY);
3914
3915 break;
3916 case WLAN_CIPHER_SUITE_TKIP:
3917 cmd->key_type_id = cpu_to_le16(MWL8K_ALG_TKIP);
3918 cmd->key_info = (key->flags & IEEE80211_KEY_FLAG_PAIRWISE)
3919 ? cpu_to_le32(MWL8K_KEY_FLAG_PAIRWISE)
3920 : cpu_to_le32(MWL8K_KEY_FLAG_TXGROUPKEY);
3921 cmd->key_info |= cpu_to_le32(MWL8K_KEY_FLAG_MICKEY_VALID
3922 | MWL8K_KEY_FLAG_TSC_VALID);
3923 break;
3924 case WLAN_CIPHER_SUITE_CCMP:
3925 cmd->key_type_id = cpu_to_le16(MWL8K_ALG_CCMP);
3926 cmd->key_info = (key->flags & IEEE80211_KEY_FLAG_PAIRWISE)
3927 ? cpu_to_le32(MWL8K_KEY_FLAG_PAIRWISE)
3928 : cpu_to_le32(MWL8K_KEY_FLAG_TXGROUPKEY);
3929 break;
3930 default:
3931 return -ENOTSUPP;
3932 }
3933
3934 return 0;
3935}
3936
3937static int mwl8k_cmd_encryption_set_key(struct ieee80211_hw *hw,
3938 struct ieee80211_vif *vif,
3939 u8 *addr,
3940 struct ieee80211_key_conf *key)
3941{
3942 struct mwl8k_cmd_set_key *cmd;
3943 int rc;
3944 int keymlen;
3945 u32 action;
3946 u8 idx;
3947 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
3948
3949 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3950 if (cmd == NULL)
3951 return -ENOMEM;
3952
3953 rc = mwl8k_encryption_set_cmd_info(cmd, addr, key);
3954 if (rc < 0)
3955 goto done;
3956
3957 idx = key->keyidx;
3958
3959 if (key->flags & IEEE80211_KEY_FLAG_PAIRWISE)
3960 action = MWL8K_ENCR_SET_KEY;
3961 else
3962 action = MWL8K_ENCR_SET_GROUP_KEY;
3963
3964 switch (key->cipher) {
3965 case WLAN_CIPHER_SUITE_WEP40:
3966 case WLAN_CIPHER_SUITE_WEP104:
3967 if (!mwl8k_vif->wep_key_conf[idx].enabled) {
3968 memcpy(mwl8k_vif->wep_key_conf[idx].key, key,
3969 sizeof(*key) + key->keylen);
3970 mwl8k_vif->wep_key_conf[idx].enabled = 1;
3971 }
3972
3973 keymlen = 0;
3974 action = MWL8K_ENCR_SET_KEY;
3975 break;
3976 case WLAN_CIPHER_SUITE_TKIP:
3977 keymlen = MAX_ENCR_KEY_LENGTH + 2 * MIC_KEY_LENGTH;
3978 break;
3979 case WLAN_CIPHER_SUITE_CCMP:
3980 keymlen = key->keylen;
3981 break;
3982 default:
3983 rc = -ENOTSUPP;
3984 goto done;
3985 }
3986
3987 memcpy(cmd->key_material, key->key, keymlen);
3988 cmd->action = cpu_to_le32(action);
3989
3990 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
3991done:
3992 kfree(cmd);
3993
3994 return rc;
3995}
3996
3997static int mwl8k_cmd_encryption_remove_key(struct ieee80211_hw *hw,
3998 struct ieee80211_vif *vif,
3999 u8 *addr,
4000 struct ieee80211_key_conf *key)
4001{
4002 struct mwl8k_cmd_set_key *cmd;
4003 int rc;
4004 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
4005
4006 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
4007 if (cmd == NULL)
4008 return -ENOMEM;
4009
4010 rc = mwl8k_encryption_set_cmd_info(cmd, addr, key);
4011 if (rc < 0)
4012 goto done;
4013
4014 if (key->cipher == WLAN_CIPHER_SUITE_WEP40 ||
4015 WLAN_CIPHER_SUITE_WEP104)
4016 mwl8k_vif->wep_key_conf[key->keyidx].enabled = 0;
4017
4018 cmd->action = cpu_to_le32(MWL8K_ENCR_REMOVE_KEY);
4019
4020 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
4021done:
4022 kfree(cmd);
4023
4024 return rc;
4025}
4026
4027static int mwl8k_set_key(struct ieee80211_hw *hw,
4028 enum set_key_cmd cmd_param,
4029 struct ieee80211_vif *vif,
4030 struct ieee80211_sta *sta,
4031 struct ieee80211_key_conf *key)
4032{
4033 int rc = 0;
4034 u8 encr_type;
4035 u8 *addr;
4036 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
4037
4038 if (vif->type == NL80211_IFTYPE_STATION)
4039 return -EOPNOTSUPP;
4040
4041 if (sta == NULL)
4042 addr = hw->wiphy->perm_addr;
4043 else
4044 addr = sta->addr;
4045
4046 if (cmd_param == SET_KEY) {
4047 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
4048 rc = mwl8k_cmd_encryption_set_key(hw, vif, addr, key);
4049 if (rc)
4050 goto out;
4051
4052 if ((key->cipher == WLAN_CIPHER_SUITE_WEP40)
4053 || (key->cipher == WLAN_CIPHER_SUITE_WEP104))
4054 encr_type = MWL8K_UPDATE_ENCRYPTION_TYPE_WEP;
4055 else
4056 encr_type = MWL8K_UPDATE_ENCRYPTION_TYPE_MIXED;
4057
4058 rc = mwl8k_cmd_update_encryption_enable(hw, vif, addr,
4059 encr_type);
4060 if (rc)
4061 goto out;
4062
4063 mwl8k_vif->is_hw_crypto_enabled = true;
4064
4065 } else {
4066 rc = mwl8k_cmd_encryption_remove_key(hw, vif, addr, key);
4067
4068 if (rc)
4069 goto out;
4070
4071 mwl8k_vif->is_hw_crypto_enabled = false;
4072
4073 }
4074out:
4075 return rc;
4076}
4077
55489b6e
LB		 4078/*
4079 * CMD_UPDATE_STADB.
4080 */
25d81b1e
LB		 4081struct ewc_ht_info {
4082 __le16 control1;
4083 __le16 control2;
4084 __le16 control3;
ba2d3587 4085} __packed;
25d81b1e
LB		 4086
4087struct peer_capability_info {
4088 /* Peer type - AP vs. STA. */
4089 __u8 peer_type;
4090
4091 /* Basic 802.11 capabilities from assoc resp. */
4092 __le16 basic_caps;
4093
4094 /* Set if peer supports 802.11n high throughput (HT). */
4095 __u8 ht_support;
4096
4097 /* Valid if HT is supported. */
4098 __le16 ht_caps;
4099 __u8 extended_ht_caps;
4100 struct ewc_ht_info ewc_info;
4101
4102 /* Legacy rate table. Intersection of our rates and peer rates. */
4103 __u8 legacy_rates[12];
4104
4105 /* HT rate table. Intersection of our rates and peer rates. */
4106 __u8 ht_rates[16];
4107 __u8 pad[16];
4108
4109 /* If set, interoperability mode, no proprietary extensions. */
4110 __u8 interop;
4111 __u8 pad2;
4112 __u8 station_id;
4113 __le16 amsdu_enabled;
ba2d3587 4114} __packed;
25d81b1e 4115
55489b6e
LB		 4116struct mwl8k_cmd_update_stadb {
4117 struct mwl8k_cmd_pkt header;
4118
4119 /* See STADB_ACTION_TYPE */
4120 __le32 action;
4121
4122 /* Peer MAC address */
4123 __u8 peer_addr[ETH_ALEN];
4124
4125 __le32 reserved;
4126
4127 /* Peer info - valid during add/update. */
4128 struct peer_capability_info peer_info;
ba2d3587 4129} __packed;
55489b6e 4130
a680400e
LB		 4131#define MWL8K_STA_DB_MODIFY_ENTRY 1
4132#define MWL8K_STA_DB_DEL_ENTRY 2
4133
4134/* Peer Entry flags - used to define the type of the peer node */
4135#define MWL8K_PEER_TYPE_ACCESSPOINT 2
4136
4137static int mwl8k_cmd_update_stadb_add(struct ieee80211_hw *hw,
c6e96010 4138 struct ieee80211_vif *vif,
13935e2c 4139 struct ieee80211_sta *sta)
55489b6e 4140{
55489b6e 4141 struct mwl8k_cmd_update_stadb *cmd;
a680400e 4142 struct peer_capability_info *p;
8707d026 4143 u32 rates;
55489b6e
LB		 4144 int rc;
4145
4146 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
4147 if (cmd == NULL)
4148 return -ENOMEM;
4149
4150 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
4151 cmd->header.length = cpu_to_le16(sizeof(*cmd));
a680400e 4152 cmd->action = cpu_to_le32(MWL8K_STA_DB_MODIFY_ENTRY);
13935e2c 4153 memcpy(cmd->peer_addr, sta->addr, ETH_ALEN);
55489b6e 4154
a680400e
LB		 4155 p = &cmd->peer_info;
4156 p->peer_type = MWL8K_PEER_TYPE_ACCESSPOINT;
4157 p->basic_caps = cpu_to_le16(vif->bss_conf.assoc_capability);
13935e2c 4158 p->ht_support = sta->ht_cap.ht_supported;
b603742f 4159 p->ht_caps = cpu_to_le16(sta->ht_cap.cap);
13935e2c
LB		 4160 p->extended_ht_caps = (sta->ht_cap.ampdu_factor & 3) |
4161 ((sta->ht_cap.ampdu_density & 7) << 2);
8707d026
LB		 4162 if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
4163 rates = sta->supp_rates[IEEE80211_BAND_2GHZ];
4164 else
4165 rates = sta->supp_rates[IEEE80211_BAND_5GHZ] << 5;
4166 legacy_rate_mask_to_array(p->legacy_rates, rates);
13935e2c 4167 memcpy(p->ht_rates, sta->ht_cap.mcs.rx_mask, 16);
a680400e
LB		 4168 p->interop = 1;
4169 p->amsdu_enabled = 0;
4170
4171 rc = mwl8k_post_cmd(hw, &cmd->header);
4172 kfree(cmd);
4173
4174 return rc ? rc : p->station_id;
4175}
4176
4177static int mwl8k_cmd_update_stadb_del(struct ieee80211_hw *hw,
4178 struct ieee80211_vif *vif, u8 *addr)
4179{
4180 struct mwl8k_cmd_update_stadb *cmd;
4181 int rc;
4182
4183 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
4184 if (cmd == NULL)
4185 return -ENOMEM;
4186
4187 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
4188 cmd->header.length = cpu_to_le16(sizeof(*cmd));
4189 cmd->action = cpu_to_le32(MWL8K_STA_DB_DEL_ENTRY);
bbfd9128 4190 memcpy(cmd->peer_addr, addr, ETH_ALEN);
55489b6e 4191
a680400e 4192 rc = mwl8k_post_cmd(hw, &cmd->header);
55489b6e
LB		 4193 kfree(cmd);
4194
4195 return rc;
4196}
4197
a66098da
LB		 4198
4199/*
4200 * Interrupt handling.
4201 */
4202static irqreturn_t mwl8k_interrupt(int irq, void *dev_id)
4203{
4204 struct ieee80211_hw *hw = dev_id;
4205 struct mwl8k_priv *priv = hw->priv;
4206 u32 status;
4207
4208 status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
a66098da
LB		 4209 if (!status)
4210 return IRQ_NONE;
4211
1e9f9de3
LB		 4212 if (status & MWL8K_A2H_INT_TX_DONE) {
4213 status &= ~MWL8K_A2H_INT_TX_DONE;
4214 tasklet_schedule(&priv->poll_tx_task);
4215 }
4216
a66098da 4217 if (status & MWL8K_A2H_INT_RX_READY) {
67e2eb27
LB		 4218 status &= ~MWL8K_A2H_INT_RX_READY;
4219 tasklet_schedule(&priv->poll_rx_task);
a66098da
LB		 4220 }
4221
3aefc37e
NS		 4222 if (status & MWL8K_A2H_INT_BA_WATCHDOG) {
4223 status &= ~MWL8K_A2H_INT_BA_WATCHDOG;
4224 ieee80211_queue_work(hw, &priv->watchdog_ba_handle);
4225 }
4226
67e2eb27
LB		 4227 if (status)
4228 iowrite32(~status, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
4229
a66098da 4230 if (status & MWL8K_A2H_INT_OPC_DONE) {
618952a7 4231 if (priv->hostcmd_wait != NULL)
a66098da 4232 complete(priv->hostcmd_wait);
a66098da
LB		 4233 }
4234
4235 if (status & MWL8K_A2H_INT_QUEUE_EMPTY) {
618952a7 4236 if (!mutex_is_locked(&priv->fw_mutex) &&
88de754a 4237 priv->radio_on && priv->pending_tx_pkts)
618952a7 4238 mwl8k_tx_start(priv);
a66098da
LB		 4239 }
4240
4241 return IRQ_HANDLED;
4242}
4243
1e9f9de3
LB		 4244static void mwl8k_tx_poll(unsigned long data)
4245{
4246 struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
4247 struct mwl8k_priv *priv = hw->priv;
4248 int limit;
4249 int i;
4250
4251 limit = 32;
4252
4253 spin_lock_bh(&priv->tx_lock);
4254
e600707b 4255 for (i = 0; i < mwl8k_tx_queues(priv); i++)
1e9f9de3
LB		 4256 limit -= mwl8k_txq_reclaim(hw, i, limit, 0);
4257
4258 if (!priv->pending_tx_pkts && priv->tx_wait != NULL) {
4259 complete(priv->tx_wait);
4260 priv->tx_wait = NULL;
4261 }
4262
4263 spin_unlock_bh(&priv->tx_lock);
4264
4265 if (limit) {
4266 writel(~MWL8K_A2H_INT_TX_DONE,
4267 priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
4268 } else {
4269 tasklet_schedule(&priv->poll_tx_task);
4270 }
4271}
4272
67e2eb27
LB		 4273static void mwl8k_rx_poll(unsigned long data)
4274{
4275 struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
4276 struct mwl8k_priv *priv = hw->priv;
4277 int limit;
4278
4279 limit = 32;
4280 limit -= rxq_process(hw, 0, limit);
4281 limit -= rxq_refill(hw, 0, limit);
4282
4283 if (limit) {
4284 writel(~MWL8K_A2H_INT_RX_READY,
4285 priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
4286 } else {
4287 tasklet_schedule(&priv->poll_rx_task);
4288 }
4289}
4290
a66098da
LB		 4291
4292/*
4293 * Core driver operations.
4294 */
7bb45683 4295static void mwl8k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
a66098da
LB		 4296{
4297 struct mwl8k_priv *priv = hw->priv;
4298 int index = skb_get_queue_mapping(skb);
a66098da 4299
9189c100 4300 if (!priv->radio_on) {
c96c31e4
JP		 4301 wiphy_debug(hw->wiphy,
4302 "dropped TX frame since radio disabled\n");
a66098da 4303 dev_kfree_skb(skb);
7bb45683 4304 return;
a66098da
LB		 4305 }
4306
7bb45683 4307 mwl8k_txq_xmit(hw, index, skb);
a66098da
LB		 4308}
4309
a66098da
LB		 4310static int mwl8k_start(struct ieee80211_hw *hw)
4311{
a66098da
LB		 4312 struct mwl8k_priv *priv = hw->priv;
4313 int rc;
4314
a0607fd3 4315 rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
a66098da
LB		 4316 IRQF_SHARED, MWL8K_NAME, hw);
4317 if (rc) {
bf3ca7f7 4318 priv->irq = -1;
5db55844 4319 wiphy_err(hw->wiphy, "failed to register IRQ handler\n");
2ec610cb 4320 return -EIO;
a66098da 4321 }
bf3ca7f7 4322 priv->irq = priv->pdev->irq;
a66098da 4323
67e2eb27 4324 /* Enable TX reclaim and RX tasklets. */
1e9f9de3 4325 tasklet_enable(&priv->poll_tx_task);
67e2eb27 4326 tasklet_enable(&priv->poll_rx_task);
2ec610cb 4327
a66098da 4328 /* Enable interrupts */
c23b5a69 4329 iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
12488e01
NS		 4330 iowrite32(MWL8K_A2H_EVENTS,
4331 priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
a66098da 4332
2ec610cb
LB		 4333 rc = mwl8k_fw_lock(hw);
4334 if (!rc) {
55489b6e 4335 rc = mwl8k_cmd_radio_enable(hw);
a66098da 4336
5e4cf166
LB		 4337 if (!priv->ap_fw) {
4338 if (!rc)
55489b6e 4339 rc = mwl8k_cmd_enable_sniffer(hw, 0);
a66098da 4340
5e4cf166
LB		 4341 if (!rc)
4342 rc = mwl8k_cmd_set_pre_scan(hw);
4343
4344 if (!rc)
4345 rc = mwl8k_cmd_set_post_scan(hw,
4346 "\x00\x00\x00\x00\x00\x00");
4347 }
2ec610cb
LB		 4348
4349 if (!rc)
55489b6e 4350 rc = mwl8k_cmd_set_rateadapt_mode(hw, 0);
a66098da 4351
2ec610cb 4352 if (!rc)
55489b6e 4353 rc = mwl8k_cmd_set_wmm_mode(hw, 0);
a66098da 4354
2ec610cb
LB		 4355 mwl8k_fw_unlock(hw);
4356 }
4357
4358 if (rc) {
4359 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
4360 free_irq(priv->pdev->irq, hw);
bf3ca7f7 4361 priv->irq = -1;
1e9f9de3 4362 tasklet_disable(&priv->poll_tx_task);
67e2eb27 4363 tasklet_disable(&priv->poll_rx_task);
2ec610cb 4364 }
a66098da
LB		 4365
4366 return rc;
4367}
4368
a66098da
LB		 4369static void mwl8k_stop(struct ieee80211_hw *hw)
4370{
a66098da
LB		 4371 struct mwl8k_priv *priv = hw->priv;
4372 int i;
4373
55489b6e 4374 mwl8k_cmd_radio_disable(hw);
a66098da
LB		 4375
4376 ieee80211_stop_queues(hw);
4377
a66098da 4378 /* Disable interrupts */
a66098da 4379 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
bf3ca7f7
BC		 4380 if (priv->irq != -1) {
4381 free_irq(priv->pdev->irq, hw);
4382 priv->irq = -1;
4383 }
a66098da
LB		 4384
4385 /* Stop finalize join worker */
4386 cancel_work_sync(&priv->finalize_join_worker);
3aefc37e 4387 cancel_work_sync(&priv->watchdog_ba_handle);
a66098da
LB		 4388 if (priv->beacon_skb != NULL)
4389 dev_kfree_skb(priv->beacon_skb);
4390
67e2eb27 4391 /* Stop TX reclaim and RX tasklets. */
1e9f9de3 4392 tasklet_disable(&priv->poll_tx_task);
67e2eb27 4393 tasklet_disable(&priv->poll_rx_task);
a66098da 4394
a66098da 4395 /* Return all skbs to mac80211 */
e600707b 4396 for (i = 0; i < mwl8k_tx_queues(priv); i++)
efb7c49a 4397 mwl8k_txq_reclaim(hw, i, INT_MAX, 1);
a66098da
LB		 4398}
4399
0863ade8
BC		 4400static int mwl8k_reload_firmware(struct ieee80211_hw *hw, char *fw_image);
4401
a66098da 4402static int mwl8k_add_interface(struct ieee80211_hw *hw,
f5bb87cf 4403 struct ieee80211_vif *vif)
a66098da
LB		 4404{
4405 struct mwl8k_priv *priv = hw->priv;
4406 struct mwl8k_vif *mwl8k_vif;
ee0ddf18 4407 u32 macids_supported;
0863ade8
BC		 4408 int macid, rc;
4409 struct mwl8k_device_info *di;
a66098da 4410
a43c49a8
LB		 4411 /*
4412 * Reject interface creation if sniffer mode is active, as
4413 * STA operation is mutually exclusive with hardware sniffer
b64fe619 4414 * mode. (Sniffer mode is only used on STA firmware.)
a43c49a8
LB		 4415 */
4416 if (priv->sniffer_enabled) {
c96c31e4
JP		 4417 wiphy_info(hw->wiphy,
4418 "unable to create STA interface because sniffer mode is enabled\n");
a43c49a8
LB		 4419 return -EINVAL;
4420 }
4421
0863ade8 4422 di = priv->device_info;
ee0ddf18
LB		 4423 switch (vif->type) {
4424 case NL80211_IFTYPE_AP:
0863ade8
BC		 4425 if (!priv->ap_fw && di->fw_image_ap) {
4426 /* we must load the ap fw to meet this request */
4427 if (!list_empty(&priv->vif_list))
4428 return -EBUSY;
4429 rc = mwl8k_reload_firmware(hw, di->fw_image_ap);
4430 if (rc)
4431 return rc;
4432 }
ee0ddf18
LB		 4433 macids_supported = priv->ap_macids_supported;
4434 break;
4435 case NL80211_IFTYPE_STATION:
0863ade8
BC		 4436 if (priv->ap_fw && di->fw_image_sta) {
4437 /* we must load the sta fw to meet this request */
4438 if (!list_empty(&priv->vif_list))
4439 return -EBUSY;
4440 rc = mwl8k_reload_firmware(hw, di->fw_image_sta);
4441 if (rc)
4442 return rc;
4443 }
ee0ddf18
LB		 4444 macids_supported = priv->sta_macids_supported;
4445 break;
4446 default:
4447 return -EINVAL;
4448 }
4449
4450 macid = ffs(macids_supported & ~priv->macids_used);
4451 if (!macid--)
4452 return -EBUSY;
4453
f5bb87cf 4454 /* Setup driver private area. */
1ed32e4f 4455 mwl8k_vif = MWL8K_VIF(vif);
a66098da 4456 memset(mwl8k_vif, 0, sizeof(*mwl8k_vif));
f5bb87cf 4457 mwl8k_vif->vif = vif;
ee0ddf18 4458 mwl8k_vif->macid = macid;
a66098da 4459 mwl8k_vif->seqno = 0;
d9a07d49
NS		 4460 memcpy(mwl8k_vif->bssid, vif->addr, ETH_ALEN);
4461 mwl8k_vif->is_hw_crypto_enabled = false;
a66098da 4462
aa21d0f6
LB		 4463 /* Set the mac address. */
4464 mwl8k_cmd_set_mac_addr(hw, vif, vif->addr);
4465
4466 if (priv->ap_fw)
4467 mwl8k_cmd_set_new_stn_add_self(hw, vif);
4468
ee0ddf18 4469 priv->macids_used |= 1 << mwl8k_vif->macid;
f5bb87cf 4470 list_add_tail(&mwl8k_vif->list, &priv->vif_list);
a66098da
LB		 4471
4472 return 0;
4473}
4474
4475static void mwl8k_remove_interface(struct ieee80211_hw *hw,
1ed32e4f 4476 struct ieee80211_vif *vif)
a66098da
LB		 4477{
4478 struct mwl8k_priv *priv = hw->priv;
f5bb87cf 4479 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
a66098da 4480
b64fe619
LB		 4481 if (priv->ap_fw)
4482 mwl8k_cmd_set_new_stn_del(hw, vif, vif->addr);
4483
aa21d0f6 4484 mwl8k_cmd_set_mac_addr(hw, vif, "\x00\x00\x00\x00\x00\x00");
32060e1b 4485
ee0ddf18 4486 priv->macids_used &= ~(1 << mwl8k_vif->macid);
f5bb87cf 4487 list_del(&mwl8k_vif->list);
a66098da
LB		 4488}
4489
ee03a932 4490static int mwl8k_config(struct ieee80211_hw *hw, u32 changed)
a66098da 4491{
a66098da
LB		 4492 struct ieee80211_conf *conf = &hw->conf;
4493 struct mwl8k_priv *priv = hw->priv;
ee03a932 4494 int rc;
a66098da 4495
7595d67a 4496 if (conf->flags & IEEE80211_CONF_IDLE) {
55489b6e 4497 mwl8k_cmd_radio_disable(hw);
ee03a932 4498 return 0;
7595d67a
LB		 4499 }
4500
ee03a932
LB		 4501 rc = mwl8k_fw_lock(hw);
4502 if (rc)
4503 return rc;
a66098da 4504
55489b6e 4505 rc = mwl8k_cmd_radio_enable(hw);
ee03a932
LB		 4506 if (rc)
4507 goto out;
a66098da 4508
610677d2 4509 rc = mwl8k_cmd_set_rf_channel(hw, conf);
ee03a932
LB		 4510 if (rc)
4511 goto out;
4512
a66098da
LB		 4513 if (conf->power_level > 18)
4514 conf->power_level = 18;
a66098da 4515
08b06347 4516 if (priv->ap_fw) {
03217087
NS		 4517
4518 if (conf->flags & IEEE80211_CONF_CHANGE_POWER) {
4519 rc = mwl8k_cmd_tx_power(hw, conf, conf->power_level);
4520 if (rc)
4521 goto out;
4522 }
41fdf097 4523
da62b761
NS		 4524 rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_RX, 0x3);
4525 if (rc)
4526 wiphy_warn(hw->wiphy, "failed to set # of RX antennas");
4527 rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_TX, 0x7);
4528 if (rc)
4529 wiphy_warn(hw->wiphy, "failed to set # of TX antennas");
4530
08b06347 4531 } else {
41fdf097
NS		 4532 rc = mwl8k_cmd_rf_tx_power(hw, conf->power_level);
4533 if (rc)
4534 goto out;
08b06347
LB		 4535 rc = mwl8k_cmd_mimo_config(hw, 0x7, 0x7);
4536 }
a66098da 4537
ee03a932
LB		 4538out:
4539 mwl8k_fw_unlock(hw);
a66098da 4540
ee03a932 4541 return rc;
a66098da
LB		 4542}
4543
b64fe619
LB		 4544static void
4545mwl8k_bss_info_changed_sta(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
4546 struct ieee80211_bss_conf *info, u32 changed)
a66098da 4547{
a66098da 4548 struct mwl8k_priv *priv = hw->priv;
ba30c4a5 4549 u32 ap_legacy_rates = 0;
13935e2c 4550 u8 ap_mcs_rates[16];
3a980d0a
LB		 4551 int rc;
4552
c3cbbe8a 4553 if (mwl8k_fw_lock(hw))
3a980d0a 4554 return;
a66098da 4555
c3cbbe8a
LB		 4556 /*
4557 * No need to capture a beacon if we're no longer associated.
4558 */
4559 if ((changed & BSS_CHANGED_ASSOC) && !vif->bss_conf.assoc)
4560 priv->capture_beacon = false;
3a980d0a 4561
c3cbbe8a 4562 /*
13935e2c 4563 * Get the AP's legacy and MCS rates.
c3cbbe8a 4564 */
7dc6a7a7 4565 if (vif->bss_conf.assoc) {
c6e96010 4566 struct ieee80211_sta *ap;
c97470dd 4567
c6e96010 4568 rcu_read_lock();
c6e96010 4569
c3cbbe8a
LB		 4570 ap = ieee80211_find_sta(vif, vif->bss_conf.bssid);
4571 if (ap == NULL) {
4572 rcu_read_unlock();
c6e96010 4573 goto out;
c3cbbe8a
LB		 4574 }
4575
8707d026
LB		 4576 if (hw->conf.channel->band == IEEE80211_BAND_2GHZ) {
4577 ap_legacy_rates = ap->supp_rates[IEEE80211_BAND_2GHZ];
4578 } else {
4579 ap_legacy_rates =
4580 ap->supp_rates[IEEE80211_BAND_5GHZ] << 5;
4581 }
13935e2c 4582 memcpy(ap_mcs_rates, ap->ht_cap.mcs.rx_mask, 16);
c3cbbe8a
LB		 4583
4584 rcu_read_unlock();
4585 }
c6e96010 4586
c3cbbe8a 4587 if ((changed & BSS_CHANGED_ASSOC) && vif->bss_conf.assoc) {
13935e2c 4588 rc = mwl8k_cmd_set_rate(hw, vif, ap_legacy_rates, ap_mcs_rates);
3a980d0a
LB		 4589 if (rc)
4590 goto out;
a66098da 4591
b71ed2c6 4592 rc = mwl8k_cmd_use_fixed_rate_sta(hw);
3a980d0a
LB		 4593 if (rc)
4594 goto out;
c3cbbe8a 4595 }
a66098da 4596
c3cbbe8a 4597 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
7dc6a7a7
LB		 4598 rc = mwl8k_set_radio_preamble(hw,
4599 vif->bss_conf.use_short_preamble);
3a980d0a
LB		 4600 if (rc)
4601 goto out;
c3cbbe8a 4602 }
a66098da 4603
c3cbbe8a 4604 if (changed & BSS_CHANGED_ERP_SLOT) {
7dc6a7a7 4605 rc = mwl8k_cmd_set_slot(hw, vif->bss_conf.use_short_slot);
3a980d0a
LB		 4606 if (rc)
4607 goto out;
c3cbbe8a 4608 }
a66098da 4609
c97470dd
LB		 4610 if (vif->bss_conf.assoc &&
4611 (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_ERP_CTS_PROT |
4612 BSS_CHANGED_HT))) {
c3cbbe8a 4613 rc = mwl8k_cmd_set_aid(hw, vif, ap_legacy_rates);
3a980d0a
LB		 4614 if (rc)
4615 goto out;
c3cbbe8a 4616 }
a66098da 4617
c3cbbe8a
LB		 4618 if (vif->bss_conf.assoc &&
4619 (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_BEACON_INT))) {
a66098da
LB		 4620 /*
4621 * Finalize the join. Tell rx handler to process
4622 * next beacon from our BSSID.
4623 */
0a11dfc3 4624 memcpy(priv->capture_bssid, vif->bss_conf.bssid, ETH_ALEN);
a66098da 4625 priv->capture_beacon = true;
a66098da
LB		 4626 }
4627
3a980d0a
LB		 4628out:
4629 mwl8k_fw_unlock(hw);
a66098da
LB		 4630}
4631
b64fe619
LB		 4632static void
4633mwl8k_bss_info_changed_ap(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
4634 struct ieee80211_bss_conf *info, u32 changed)
4635{
4636 int rc;
4637
4638 if (mwl8k_fw_lock(hw))
4639 return;
4640
4641 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
4642 rc = mwl8k_set_radio_preamble(hw,
4643 vif->bss_conf.use_short_preamble);
4644 if (rc)
4645 goto out;
4646 }
4647
4648 if (changed & BSS_CHANGED_BASIC_RATES) {
4649 int idx;
4650 int rate;
4651
4652 /*
4653 * Use lowest supported basic rate for multicasts
4654 * and management frames (such as probe responses --
4655 * beacons will always go out at 1 Mb/s).
4656 */
4657 idx = ffs(vif->bss_conf.basic_rates);
8707d026
LB		 4658 if (idx)
4659 idx--;
4660
4661 if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
4662 rate = mwl8k_rates_24[idx].hw_value;
4663 else
4664 rate = mwl8k_rates_50[idx].hw_value;
b64fe619
LB		 4665
4666 mwl8k_cmd_use_fixed_rate_ap(hw, rate, rate);
4667 }
4668
4669 if (changed & (BSS_CHANGED_BEACON_INT | BSS_CHANGED_BEACON)) {
4670 struct sk_buff *skb;
4671
4672 skb = ieee80211_beacon_get(hw, vif);
4673 if (skb != NULL) {
aa21d0f6 4674 mwl8k_cmd_set_beacon(hw, vif, skb->data, skb->len);
b64fe619
LB		 4675 kfree_skb(skb);
4676 }
4677 }
4678
4679 if (changed & BSS_CHANGED_BEACON_ENABLED)
aa21d0f6 4680 mwl8k_cmd_bss_start(hw, vif, info->enable_beacon);
b64fe619
LB		 4681
4682out:
4683 mwl8k_fw_unlock(hw);
4684}
4685
4686static void
4687mwl8k_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
4688 struct ieee80211_bss_conf *info, u32 changed)
4689{
4690 struct mwl8k_priv *priv = hw->priv;
4691
4692 if (!priv->ap_fw)
4693 mwl8k_bss_info_changed_sta(hw, vif, info, changed);
4694 else
4695 mwl8k_bss_info_changed_ap(hw, vif, info, changed);
4696}
4697
e81cd2d6 4698static u64 mwl8k_prepare_multicast(struct ieee80211_hw *hw,
22bedad3 4699 struct netdev_hw_addr_list *mc_list)
e81cd2d6
LB		 4700{
4701 struct mwl8k_cmd_pkt *cmd;
4702
447ced07
LB		 4703 /*
4704 * Synthesize and return a command packet that programs the
4705 * hardware multicast address filter. At this point we don't
4706 * know whether FIF_ALLMULTI is being requested, but if it is,
4707 * we'll end up throwing this packet away and creating a new
4708 * one in mwl8k_configure_filter().
4709 */
22bedad3 4710 cmd = __mwl8k_cmd_mac_multicast_adr(hw, 0, mc_list);
e81cd2d6
LB		 4711
4712 return (unsigned long)cmd;
4713}
4714
a43c49a8
LB		 4715static int
4716mwl8k_configure_filter_sniffer(struct ieee80211_hw *hw,
4717 unsigned int changed_flags,
4718 unsigned int *total_flags)
4719{
4720 struct mwl8k_priv *priv = hw->priv;
4721
4722 /*
4723 * Hardware sniffer mode is mutually exclusive with STA
4724 * operation, so refuse to enable sniffer mode if a STA
4725 * interface is active.
4726 */
f5bb87cf 4727 if (!list_empty(&priv->vif_list)) {
a43c49a8 4728 if (net_ratelimit())
c96c31e4
JP		 4729 wiphy_info(hw->wiphy,
4730 "not enabling sniffer mode because STA interface is active\n");
a43c49a8
LB		 4731 return 0;
4732 }
4733
4734 if (!priv->sniffer_enabled) {
55489b6e 4735 if (mwl8k_cmd_enable_sniffer(hw, 1))
a43c49a8
LB		 4736 return 0;
4737 priv->sniffer_enabled = true;
4738 }
4739
4740 *total_flags &= FIF_PROMISC_IN_BSS | FIF_ALLMULTI |
4741 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL |
4742 FIF_OTHER_BSS;
4743
4744 return 1;
4745}
4746
f5bb87cf
LB		 4747static struct mwl8k_vif *mwl8k_first_vif(struct mwl8k_priv *priv)
4748{
4749 if (!list_empty(&priv->vif_list))
4750 return list_entry(priv->vif_list.next, struct mwl8k_vif, list);
4751
4752 return NULL;
4753}
4754
e6935ea1
LB		 4755static void mwl8k_configure_filter(struct ieee80211_hw *hw,
4756 unsigned int changed_flags,
4757 unsigned int *total_flags,
4758 u64 multicast)
4759{
4760 struct mwl8k_priv *priv = hw->priv;
a43c49a8
LB		 4761 struct mwl8k_cmd_pkt *cmd = (void *)(unsigned long)multicast;
4762
c0adae2c
LB		 4763 /*
4764 * AP firmware doesn't allow fine-grained control over
4765 * the receive filter.
4766 */
4767 if (priv->ap_fw) {
4768 *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
4769 kfree(cmd);
4770 return;
4771 }
4772
a43c49a8
LB		 4773 /*
4774 * Enable hardware sniffer mode if FIF_CONTROL or
4775 * FIF_OTHER_BSS is requested.
4776 */
4777 if (*total_flags & (FIF_CONTROL | FIF_OTHER_BSS) &&
4778 mwl8k_configure_filter_sniffer(hw, changed_flags, total_flags)) {
4779 kfree(cmd);
4780 return;
4781 }
a66098da 4782
e6935ea1 4783 /* Clear unsupported feature flags */
447ced07 4784 *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
a66098da 4785
90852f7a
LB		 4786 if (mwl8k_fw_lock(hw)) {
4787 kfree(cmd);
e6935ea1 4788 return;
90852f7a 4789 }
a66098da 4790
a43c49a8 4791 if (priv->sniffer_enabled) {
55489b6e 4792 mwl8k_cmd_enable_sniffer(hw, 0);
a43c49a8
LB		 4793 priv->sniffer_enabled = false;
4794 }
4795
e6935ea1 4796 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
77165d88
LB		 4797 if (*total_flags & FIF_BCN_PRBRESP_PROMISC) {
4798 /*
4799 * Disable the BSS filter.
4800 */
e6935ea1 4801 mwl8k_cmd_set_pre_scan(hw);
77165d88 4802 } else {
f5bb87cf 4803 struct mwl8k_vif *mwl8k_vif;
0a11dfc3 4804 const u8 *bssid;
a94cc97e 4805
77165d88
LB		 4806 /*
4807 * Enable the BSS filter.
4808 *
4809 * If there is an active STA interface, use that
4810 * interface's BSSID, otherwise use a dummy one
4811 * (where the OUI part needs to be nonzero for
4812 * the BSSID to be accepted by POST_SCAN).
4813 */
f5bb87cf
LB		 4814 mwl8k_vif = mwl8k_first_vif(priv);
4815 if (mwl8k_vif != NULL)
4816 bssid = mwl8k_vif->vif->bss_conf.bssid;
4817 else
4818 bssid = "\x01\x00\x00\x00\x00\x00";
a94cc97e 4819
e6935ea1 4820 mwl8k_cmd_set_post_scan(hw, bssid);
a66098da
LB		 4821 }
4822 }
4823
447ced07
LB		 4824 /*
4825 * If FIF_ALLMULTI is being requested, throw away the command
4826 * packet that ->prepare_multicast() built and replace it with
4827 * a command packet that enables reception of all multicast
4828 * packets.
4829 */
4830 if (*total_flags & FIF_ALLMULTI) {
4831 kfree(cmd);
22bedad3 4832 cmd = __mwl8k_cmd_mac_multicast_adr(hw, 1, NULL);
447ced07
LB		 4833 }
4834
4835 if (cmd != NULL) {
4836 mwl8k_post_cmd(hw, cmd);
4837 kfree(cmd);
e6935ea1 4838 }
a66098da 4839
e6935ea1 4840 mwl8k_fw_unlock(hw);
a66098da
LB		 4841}
4842
a66098da
LB		 4843static int mwl8k_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
4844{
c2c2b12a 4845 return mwl8k_cmd_set_rts_threshold(hw, value);
a66098da
LB		 4846}
4847
4a6967b8
JB		 4848static int mwl8k_sta_remove(struct ieee80211_hw *hw,
4849 struct ieee80211_vif *vif,
4850 struct ieee80211_sta *sta)
3f5610ff
LB		 4851{
4852 struct mwl8k_priv *priv = hw->priv;
4853
4a6967b8
JB		 4854 if (priv->ap_fw)
4855 return mwl8k_cmd_set_new_stn_del(hw, vif, sta->addr);
4856 else
4857 return mwl8k_cmd_update_stadb_del(hw, vif, sta->addr);
bbfd9128
LB		 4858}
4859
4a6967b8
JB		 4860static int mwl8k_sta_add(struct ieee80211_hw *hw,
4861 struct ieee80211_vif *vif,
4862 struct ieee80211_sta *sta)
bbfd9128
LB		 4863{
4864 struct mwl8k_priv *priv = hw->priv;
4a6967b8 4865 int ret;
fcdc403c
NS		 4866 int i;
4867 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
4868 struct ieee80211_key_conf *key;
bbfd9128 4869
4a6967b8
JB		 4870 if (!priv->ap_fw) {
4871 ret = mwl8k_cmd_update_stadb_add(hw, vif, sta);
4872 if (ret >= 0) {
4873 MWL8K_STA(sta)->peer_id = ret;
17033543
NS		 4874 if (sta->ht_cap.ht_supported)
4875 MWL8K_STA(sta)->is_ampdu_allowed = true;
fcdc403c 4876 ret = 0;
4a6967b8 4877 }
bbfd9128 4878
d9a07d49
NS		 4879 } else {
4880 ret = mwl8k_cmd_set_new_stn_add(hw, vif, sta);
bbfd9128 4881 }
4a6967b8 4882
d9a07d49
NS		 4883 for (i = 0; i < NUM_WEP_KEYS; i++) {
4884 key = IEEE80211_KEY_CONF(mwl8k_vif->wep_key_conf[i].key);
4885 if (mwl8k_vif->wep_key_conf[i].enabled)
4886 mwl8k_set_key(hw, SET_KEY, vif, sta, key);
4887 }
fcdc403c 4888 return ret;
bbfd9128
LB		 4889}
4890
a66098da
LB		 4891static int mwl8k_conf_tx(struct ieee80211_hw *hw, u16 queue,
4892 const struct ieee80211_tx_queue_params *params)
4893{
3e4f542c 4894 struct mwl8k_priv *priv = hw->priv;
a66098da 4895 int rc;
a66098da 4896
3e4f542c
LB		 4897 rc = mwl8k_fw_lock(hw);
4898 if (!rc) {
e600707b 4899 BUG_ON(queue > MWL8K_TX_WMM_QUEUES - 1);
0863ade8
BC		 4900 memcpy(&priv->wmm_params[queue], params, sizeof(*params));
4901
3e4f542c 4902 if (!priv->wmm_enabled)
55489b6e 4903 rc = mwl8k_cmd_set_wmm_mode(hw, 1);
a66098da 4904
85c9205c 4905 if (!rc) {
e600707b 4906 int q = MWL8K_TX_WMM_QUEUES - 1 - queue;
85c9205c 4907 rc = mwl8k_cmd_set_edca_params(hw, q,
55489b6e
LB		 4908 params->cw_min,
4909 params->cw_max,
4910 params->aifs,
4911 params->txop);
85c9205c 4912 }
3e4f542c
LB		 4913
4914 mwl8k_fw_unlock(hw);
a66098da 4915 }
3e4f542c 4916
a66098da
LB		 4917 return rc;
4918}
4919
a66098da
LB		 4920static int mwl8k_get_stats(struct ieee80211_hw *hw,
4921 struct ieee80211_low_level_stats *stats)
4922{
55489b6e 4923 return mwl8k_cmd_get_stat(hw, stats);
a66098da
LB		 4924}
4925
0d462bbb
JL		 4926static int mwl8k_get_survey(struct ieee80211_hw *hw, int idx,
4927 struct survey_info *survey)
4928{
4929 struct mwl8k_priv *priv = hw->priv;
4930 struct ieee80211_conf *conf = &hw->conf;
4931
4932 if (idx != 0)
4933 return -ENOENT;
4934
4935 survey->channel = conf->channel;
4936 survey->filled = SURVEY_INFO_NOISE_DBM;
4937 survey->noise = priv->noise;
4938
4939 return 0;
4940}
4941
65f3ddcd
NS		 4942#define MAX_AMPDU_ATTEMPTS 5
4943
a2292d83
LB		 4944static int
4945mwl8k_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
4946 enum ieee80211_ampdu_mlme_action action,
0b01f030
JB		 4947 struct ieee80211_sta *sta, u16 tid, u16 *ssn,
4948 u8 buf_size)
a2292d83 4949{
65f3ddcd
NS		 4950
4951 int i, rc = 0;
4952 struct mwl8k_priv *priv = hw->priv;
4953 struct mwl8k_ampdu_stream *stream;
4954 u8 *addr = sta->addr;
4955
4956 if (!(hw->flags & IEEE80211_HW_AMPDU_AGGREGATION))
4957 return -ENOTSUPP;
4958
4959 spin_lock(&priv->stream_lock);
4960 stream = mwl8k_lookup_stream(hw, addr, tid);
4961
a2292d83
LB		 4962 switch (action) {
4963 case IEEE80211_AMPDU_RX_START:
4964 case IEEE80211_AMPDU_RX_STOP:
65f3ddcd
NS		 4965 break;
4966 case IEEE80211_AMPDU_TX_START:
4967 /* By the time we get here the hw queues may contain outgoing
4968 * packets for this RA/TID that are not part of this BA
4969 * session. The hw will assign sequence numbers to these
4970 * packets as they go out. So if we query the hw for its next
4971 * sequence number and use that for the SSN here, it may end up
4972 * being wrong, which will lead to sequence number mismatch at
4973 * the recipient. To avoid this, we reset the sequence number
4974 * to O for the first MPDU in this BA stream.
4975 */
4976 *ssn = 0;
4977 if (stream == NULL) {
4978 /* This means that somebody outside this driver called
4979 * ieee80211_start_tx_ba_session. This is unexpected
4980 * because we do our own rate control. Just warn and
4981 * move on.
4982 */
4983 wiphy_warn(hw->wiphy, "Unexpected call to %s. "
4984 "Proceeding anyway.\n", __func__);
4985 stream = mwl8k_add_stream(hw, sta, tid);
4986 }
4987 if (stream == NULL) {
4988 wiphy_debug(hw->wiphy, "no free AMPDU streams\n");
4989 rc = -EBUSY;
4990 break;
4991 }
4992 stream->state = AMPDU_STREAM_IN_PROGRESS;
4993
4994 /* Release the lock before we do the time consuming stuff */
4995 spin_unlock(&priv->stream_lock);
4996 for (i = 0; i < MAX_AMPDU_ATTEMPTS; i++) {
4997 rc = mwl8k_check_ba(hw, stream);
4998
4999 if (!rc)
5000 break;
5001 /*
5002 * HW queues take time to be flushed, give them
5003 * sufficient time
5004 */
5005
5006 msleep(1000);
5007 }
5008 spin_lock(&priv->stream_lock);
5009 if (rc) {
5010 wiphy_err(hw->wiphy, "Stream for tid %d busy after %d"
5011 " attempts\n", tid, MAX_AMPDU_ATTEMPTS);
5012 mwl8k_remove_stream(hw, stream);
5013 rc = -EBUSY;
5014 break;
5015 }
5016 ieee80211_start_tx_ba_cb_irqsafe(vif, addr, tid);
5017 break;
5018 case IEEE80211_AMPDU_TX_STOP:
5019 if (stream == NULL)
5020 break;
5021 if (stream->state == AMPDU_STREAM_ACTIVE) {
5022 spin_unlock(&priv->stream_lock);
5023 mwl8k_destroy_ba(hw, stream);
5024 spin_lock(&priv->stream_lock);
5025 }
5026 mwl8k_remove_stream(hw, stream);
5027 ieee80211_stop_tx_ba_cb_irqsafe(vif, addr, tid);
5028 break;
5029 case IEEE80211_AMPDU_TX_OPERATIONAL:
5030 BUG_ON(stream == NULL);
5031 BUG_ON(stream->state != AMPDU_STREAM_IN_PROGRESS);
5032 spin_unlock(&priv->stream_lock);
5033 rc = mwl8k_create_ba(hw, stream, buf_size);
5034 spin_lock(&priv->stream_lock);
5035 if (!rc)
5036 stream->state = AMPDU_STREAM_ACTIVE;
5037 else {
5038 spin_unlock(&priv->stream_lock);
5039 mwl8k_destroy_ba(hw, stream);
5040 spin_lock(&priv->stream_lock);
5041 wiphy_debug(hw->wiphy,
5042 "Failed adding stream for sta %pM tid %d\n",
5043 addr, tid);
5044 mwl8k_remove_stream(hw, stream);
5045 }
5046 break;
5047
a2292d83 5048 default:
65f3ddcd 5049 rc = -ENOTSUPP;
a2292d83 5050 }
65f3ddcd
NS		 5051
5052 spin_unlock(&priv->stream_lock);
5053 return rc;
a2292d83
LB		 5054}
5055
a66098da
LB		 5056static const struct ieee80211_ops mwl8k_ops = {
5057 .tx = mwl8k_tx,
5058 .start = mwl8k_start,
5059 .stop = mwl8k_stop,
5060 .add_interface = mwl8k_add_interface,
5061 .remove_interface = mwl8k_remove_interface,
5062 .config = mwl8k_config,
a66098da 5063 .bss_info_changed = mwl8k_bss_info_changed,
3ac64bee 5064 .prepare_multicast = mwl8k_prepare_multicast,
a66098da 5065 .configure_filter = mwl8k_configure_filter,
fcdc403c 5066 .set_key = mwl8k_set_key,
a66098da 5067 .set_rts_threshold = mwl8k_set_rts_threshold,
4a6967b8
JB		 5068 .sta_add = mwl8k_sta_add,
5069 .sta_remove = mwl8k_sta_remove,
a66098da 5070 .conf_tx = mwl8k_conf_tx,
a66098da 5071 .get_stats = mwl8k_get_stats,
0d462bbb 5072 .get_survey = mwl8k_get_survey,
a2292d83 5073 .ampdu_action = mwl8k_ampdu_action,
a66098da
LB		 5074};
5075
a66098da
LB		 5076static void mwl8k_finalize_join_worker(struct work_struct *work)
5077{
5078 struct mwl8k_priv *priv =
5079 container_of(work, struct mwl8k_priv, finalize_join_worker);
5080 struct sk_buff *skb = priv->beacon_skb;
56007a02
JB		 5081 struct ieee80211_mgmt *mgmt = (void *)skb->data;
5082 int len = skb->len - offsetof(struct ieee80211_mgmt, u.beacon.variable);
5083 const u8 *tim = cfg80211_find_ie(WLAN_EID_TIM,
5084 mgmt->u.beacon.variable, len);
5085 int dtim_period = 1;
5086
5087 if (tim && tim[1] >= 2)
5088 dtim_period = tim[3];
a66098da 5089
56007a02 5090 mwl8k_cmd_finalize_join(priv->hw, skb->data, skb->len, dtim_period);
a66098da 5091
f5bb87cf 5092 dev_kfree_skb(skb);
a66098da
LB		 5093 priv->beacon_skb = NULL;
5094}
5095
bcb628d5 5096enum {
9e1b17ea
LB		 5097 MWL8363 = 0,
5098 MWL8687,
bcb628d5 5099 MWL8366,
6f6d1e9a
LB		 5100};
5101
8a7a578c 5102#define MWL8K_8366_AP_FW_API 2
952a0e96
BC		 5103#define _MWL8K_8366_AP_FW(api) "mwl8k/fmimage_8366_ap-" #api ".fw"
5104#define MWL8K_8366_AP_FW(api) _MWL8K_8366_AP_FW(api)
5105
bcb628d5 5106static struct mwl8k_device_info mwl8k_info_tbl[] __devinitdata = {
9e1b17ea
LB		 5107 [MWL8363] = {
5108 .part_name = "88w8363",
5109 .helper_image = "mwl8k/helper_8363.fw",
0863ade8 5110 .fw_image_sta = "mwl8k/fmimage_8363.fw",
9e1b17ea 5111 },
49eb691c 5112 [MWL8687] = {
bcb628d5
JL		 5113 .part_name = "88w8687",
5114 .helper_image = "mwl8k/helper_8687.fw",
0863ade8 5115 .fw_image_sta = "mwl8k/fmimage_8687.fw",
bcb628d5 5116 },
49eb691c 5117 [MWL8366] = {
bcb628d5
JL		 5118 .part_name = "88w8366",
5119 .helper_image = "mwl8k/helper_8366.fw",
0863ade8 5120 .fw_image_sta = "mwl8k/fmimage_8366.fw",
952a0e96
BC		 5121 .fw_image_ap = MWL8K_8366_AP_FW(MWL8K_8366_AP_FW_API),
5122 .fw_api_ap = MWL8K_8366_AP_FW_API,
89a91f4f 5123 .ap_rxd_ops = &rxd_8366_ap_ops,
bcb628d5 5124 },
45a390dd
LB		 5125};
5126
c92d4ede
LB		 5127MODULE_FIRMWARE("mwl8k/helper_8363.fw");
5128MODULE_FIRMWARE("mwl8k/fmimage_8363.fw");
5129MODULE_FIRMWARE("mwl8k/helper_8687.fw");
5130MODULE_FIRMWARE("mwl8k/fmimage_8687.fw");
5131MODULE_FIRMWARE("mwl8k/helper_8366.fw");
5132MODULE_FIRMWARE("mwl8k/fmimage_8366.fw");
952a0e96 5133MODULE_FIRMWARE(MWL8K_8366_AP_FW(MWL8K_8366_AP_FW_API));
c92d4ede 5134
45a390dd 5135static DEFINE_PCI_DEVICE_TABLE(mwl8k_pci_id_table) = {
e5868ba1 5136 { PCI_VDEVICE(MARVELL, 0x2a0a), .driver_data = MWL8363, },
9e1b17ea
LB		 5137 { PCI_VDEVICE(MARVELL, 0x2a0c), .driver_data = MWL8363, },
5138 { PCI_VDEVICE(MARVELL, 0x2a24), .driver_data = MWL8363, },
bcb628d5
JL		 5139 { PCI_VDEVICE(MARVELL, 0x2a2b), .driver_data = MWL8687, },
5140 { PCI_VDEVICE(MARVELL, 0x2a30), .driver_data = MWL8687, },
5141 { PCI_VDEVICE(MARVELL, 0x2a40), .driver_data = MWL8366, },
ca66527c 5142 { PCI_VDEVICE(MARVELL, 0x2a43), .driver_data = MWL8366, },
bcb628d5 5143 { },
45a390dd
LB		 5144};
5145MODULE_DEVICE_TABLE(pci, mwl8k_pci_id_table);
5146
99020471
BC		 5147static int mwl8k_request_alt_fw(struct mwl8k_priv *priv)
5148{
5149 int rc;
5150 printk(KERN_ERR "%s: Error requesting preferred fw %s.\n"
5151 "Trying alternative firmware %s\n", pci_name(priv->pdev),
5152 priv->fw_pref, priv->fw_alt);
5153 rc = mwl8k_request_fw(priv, priv->fw_alt, &priv->fw_ucode, true);
5154 if (rc) {
5155 printk(KERN_ERR "%s: Error requesting alt fw %s\n",
5156 pci_name(priv->pdev), priv->fw_alt);
5157 return rc;
5158 }
5159 return 0;
5160}
5161
5162static int mwl8k_firmware_load_success(struct mwl8k_priv *priv);
5163static void mwl8k_fw_state_machine(const struct firmware *fw, void *context)
5164{
5165 struct mwl8k_priv *priv = context;
5166 struct mwl8k_device_info *di = priv->device_info;
5167 int rc;
5168
5169 switch (priv->fw_state) {
5170 case FW_STATE_INIT:
5171 if (!fw) {
5172 printk(KERN_ERR "%s: Error requesting helper fw %s\n",
5173 pci_name(priv->pdev), di->helper_image);
5174 goto fail;
5175 }
5176 priv->fw_helper = fw;
5177 rc = mwl8k_request_fw(priv, priv->fw_pref, &priv->fw_ucode,
5178 true);
5179 if (rc && priv->fw_alt) {
5180 rc = mwl8k_request_alt_fw(priv);
5181 if (rc)
5182 goto fail;
5183 priv->fw_state = FW_STATE_LOADING_ALT;
5184 } else if (rc)
5185 goto fail;
5186 else
5187 priv->fw_state = FW_STATE_LOADING_PREF;
5188 break;
5189
5190 case FW_STATE_LOADING_PREF:
5191 if (!fw) {
5192 if (priv->fw_alt) {
5193 rc = mwl8k_request_alt_fw(priv);
5194 if (rc)
5195 goto fail;
5196 priv->fw_state = FW_STATE_LOADING_ALT;
5197 } else
5198 goto fail;
5199 } else {
5200 priv->fw_ucode = fw;
5201 rc = mwl8k_firmware_load_success(priv);
5202 if (rc)
5203 goto fail;
5204 else
5205 complete(&priv->firmware_loading_complete);
5206 }
5207 break;
5208
5209 case FW_STATE_LOADING_ALT:
5210 if (!fw) {
5211 printk(KERN_ERR "%s: Error requesting alt fw %s\n",
5212 pci_name(priv->pdev), di->helper_image);
5213 goto fail;
5214 }
5215 priv->fw_ucode = fw;
5216 rc = mwl8k_firmware_load_success(priv);
5217 if (rc)
5218 goto fail;
5219 else
5220 complete(&priv->firmware_loading_complete);
5221 break;
5222
5223 default:
5224 printk(KERN_ERR "%s: Unexpected firmware loading state: %d\n",
5225 MWL8K_NAME, priv->fw_state);
5226 BUG_ON(1);
5227 }
5228
5229 return;
5230
5231fail:
5232 priv->fw_state = FW_STATE_ERROR;
5233 complete(&priv->firmware_loading_complete);
5234 device_release_driver(&priv->pdev->dev);
5235 mwl8k_release_firmware(priv);
5236}
5237
5238static int mwl8k_init_firmware(struct ieee80211_hw *hw, char *fw_image,
5239 bool nowait)
a66098da 5240{
3cc7772c 5241 struct mwl8k_priv *priv = hw->priv;
a66098da 5242 int rc;
be695fc4
LB		 5243
5244 /* Reset firmware and hardware */
5245 mwl8k_hw_reset(priv);
5246
5247 /* Ask userland hotplug daemon for the device firmware */
99020471 5248 rc = mwl8k_request_firmware(priv, fw_image, nowait);
be695fc4 5249 if (rc) {
5db55844 5250 wiphy_err(hw->wiphy, "Firmware files not found\n");
3cc7772c 5251 return rc;
be695fc4
LB		 5252 }
5253
99020471
BC		 5254 if (nowait)
5255 return rc;
5256
be695fc4
LB		 5257 /* Load firmware into hardware */
5258 rc = mwl8k_load_firmware(hw);
3cc7772c 5259 if (rc)
5db55844 5260 wiphy_err(hw->wiphy, "Cannot start firmware\n");
be695fc4
LB		 5261
5262 /* Reclaim memory once firmware is successfully loaded */
5263 mwl8k_release_firmware(priv);
5264
3cc7772c
BC		 5265 return rc;
5266}
5267
73b46320
BC		 5268static int mwl8k_init_txqs(struct ieee80211_hw *hw)
5269{
5270 struct mwl8k_priv *priv = hw->priv;
5271 int rc = 0;
5272 int i;
5273
e600707b 5274 for (i = 0; i < mwl8k_tx_queues(priv); i++) {
73b46320
BC		 5275 rc = mwl8k_txq_init(hw, i);
5276 if (rc)
5277 break;
5278 if (priv->ap_fw)
5279 iowrite32(priv->txq[i].txd_dma,
5280 priv->sram + priv->txq_offset[i]);
5281 }
5282 return rc;
5283}
5284
3cc7772c
BC		 5285/* initialize hw after successfully loading a firmware image */
5286static int mwl8k_probe_hw(struct ieee80211_hw *hw)
5287{
5288 struct mwl8k_priv *priv = hw->priv;
5289 int rc = 0;
5290 int i;
be695fc4 5291
91942230 5292 if (priv->ap_fw) {
89a91f4f 5293 priv->rxd_ops = priv->device_info->ap_rxd_ops;
91942230 5294 if (priv->rxd_ops == NULL) {
c96c31e4
JP		 5295 wiphy_err(hw->wiphy,
5296 "Driver does not have AP firmware image support for this hardware\n");
91942230
LB		 5297 goto err_stop_firmware;
5298 }
5299 } else {
89a91f4f 5300 priv->rxd_ops = &rxd_sta_ops;
91942230 5301 }
be695fc4
LB		 5302
5303 priv->sniffer_enabled = false;
5304 priv->wmm_enabled = false;
5305 priv->pending_tx_pkts = 0;
5306
a66098da
LB		 5307 rc = mwl8k_rxq_init(hw, 0);
5308 if (rc)
3cc7772c 5309 goto err_stop_firmware;
a66098da
LB		 5310 rxq_refill(hw, 0, INT_MAX);
5311
73b46320
BC		 5312 /* For the sta firmware, we need to know the dma addresses of tx queues
5313 * before sending MWL8K_CMD_GET_HW_SPEC. So we must initialize them
5314 * prior to issuing this command. But for the AP case, we learn the
5315 * total number of queues from the result CMD_GET_HW_SPEC, so for this
5316 * case we must initialize the tx queues after.
5317 */
8a7a578c 5318 priv->num_ampdu_queues = 0;
73b46320
BC		 5319 if (!priv->ap_fw) {
5320 rc = mwl8k_init_txqs(hw);
a66098da
LB		 5321 if (rc)
5322 goto err_free_queues;
5323 }
5324
5325 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
c23b5a69 5326 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3aefc37e
NS		 5327 iowrite32(MWL8K_A2H_INT_TX_DONE|MWL8K_A2H_INT_RX_READY|
5328 MWL8K_A2H_INT_BA_WATCHDOG,
1e9f9de3 5329 priv->regs + MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL);
12488e01
NS		 5330 iowrite32(MWL8K_A2H_INT_OPC_DONE,
5331 priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
a66098da 5332
a0607fd3 5333 rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
a66098da
LB		 5334 IRQF_SHARED, MWL8K_NAME, hw);
5335 if (rc) {
5db55844 5336 wiphy_err(hw->wiphy, "failed to register IRQ handler\n");
a66098da
LB		 5337 goto err_free_queues;
5338 }
5339
ac109fd0
BC		 5340 memset(priv->ampdu, 0, sizeof(priv->ampdu));
5341
a66098da
LB		 5342 /*
5343 * Temporarily enable interrupts. Initial firmware host
c2c2b12a 5344 * commands use interrupts and avoid polling. Disable
a66098da
LB		 5345 * interrupts when done.
5346 */
c23b5a69 5347 iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
a66098da
LB		 5348
5349 /* Get config data, mac addrs etc */
42fba21d
LB		 5350 if (priv->ap_fw) {
5351 rc = mwl8k_cmd_get_hw_spec_ap(hw);
73b46320
BC		 5352 if (!rc)
5353 rc = mwl8k_init_txqs(hw);
42fba21d
LB		 5354 if (!rc)
5355 rc = mwl8k_cmd_set_hw_spec(hw);
5356 } else {
5357 rc = mwl8k_cmd_get_hw_spec_sta(hw);
5358 }
a66098da 5359 if (rc) {
5db55844 5360 wiphy_err(hw->wiphy, "Cannot initialise firmware\n");
be695fc4 5361 goto err_free_irq;
a66098da
LB		 5362 }
5363
5364 /* Turn radio off */
55489b6e 5365 rc = mwl8k_cmd_radio_disable(hw);
a66098da 5366 if (rc) {
5db55844 5367 wiphy_err(hw->wiphy, "Cannot disable\n");
be695fc4 5368 goto err_free_irq;
a66098da
LB		 5369 }
5370
32060e1b 5371 /* Clear MAC address */
aa21d0f6 5372 rc = mwl8k_cmd_set_mac_addr(hw, NULL, "\x00\x00\x00\x00\x00\x00");
32060e1b 5373 if (rc) {
5db55844 5374 wiphy_err(hw->wiphy, "Cannot clear MAC address\n");
be695fc4 5375 goto err_free_irq;
32060e1b
LB		 5376 }
5377
a66098da 5378 /* Disable interrupts */
a66098da 5379 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
a66098da
LB		 5380 free_irq(priv->pdev->irq, hw);
5381
c96c31e4
JP		 5382 wiphy_info(hw->wiphy, "%s v%d, %pm, %s firmware %u.%u.%u.%u\n",
5383 priv->device_info->part_name,
5384 priv->hw_rev, hw->wiphy->perm_addr,
5385 priv->ap_fw ? "AP" : "STA",
5386 (priv->fw_rev >> 24) & 0xff, (priv->fw_rev >> 16) & 0xff,
5387 (priv->fw_rev >> 8) & 0xff, priv->fw_rev & 0xff);
a66098da
LB		 5388
5389 return 0;
5390
a66098da 5391err_free_irq:
a66098da 5392 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
a66098da
LB		 5393 free_irq(priv->pdev->irq, hw);
5394
5395err_free_queues:
e600707b 5396 for (i = 0; i < mwl8k_tx_queues(priv); i++)
a66098da
LB		 5397 mwl8k_txq_deinit(hw, i);
5398 mwl8k_rxq_deinit(hw, 0);
5399
3cc7772c
BC		 5400err_stop_firmware:
5401 mwl8k_hw_reset(priv);
5402
5403 return rc;
5404}
5405
5406/*
5407 * invoke mwl8k_reload_firmware to change the firmware image after the device
5408 * has already been registered
5409 */
5410static int mwl8k_reload_firmware(struct ieee80211_hw *hw, char *fw_image)
5411{
5412 int i, rc = 0;
5413 struct mwl8k_priv *priv = hw->priv;
5414
5415 mwl8k_stop(hw);
5416 mwl8k_rxq_deinit(hw, 0);
5417
e600707b 5418 for (i = 0; i < mwl8k_tx_queues(priv); i++)
3cc7772c
BC		 5419 mwl8k_txq_deinit(hw, i);
5420
99020471 5421 rc = mwl8k_init_firmware(hw, fw_image, false);
3cc7772c
BC		 5422 if (rc)
5423 goto fail;
5424
5425 rc = mwl8k_probe_hw(hw);
5426 if (rc)
5427 goto fail;
5428
5429 rc = mwl8k_start(hw);
5430 if (rc)
5431 goto fail;
5432
5433 rc = mwl8k_config(hw, ~0);
5434 if (rc)
5435 goto fail;
5436
e600707b 5437 for (i = 0; i < MWL8K_TX_WMM_QUEUES; i++) {
3cc7772c
BC		 5438 rc = mwl8k_conf_tx(hw, i, &priv->wmm_params[i]);
5439 if (rc)
5440 goto fail;
5441 }
5442
5443 return rc;
5444
5445fail:
5446 printk(KERN_WARNING "mwl8k: Failed to reload firmware image.\n");
5447 return rc;
5448}
5449
5450static int mwl8k_firmware_load_success(struct mwl8k_priv *priv)
5451{
5452 struct ieee80211_hw *hw = priv->hw;
5453 int i, rc;
5454
99020471
BC		 5455 rc = mwl8k_load_firmware(hw);
5456 mwl8k_release_firmware(priv);
5457 if (rc) {
5458 wiphy_err(hw->wiphy, "Cannot start firmware\n");
5459 return rc;
5460 }
5461
3cc7772c
BC		 5462 /*
5463 * Extra headroom is the size of the required DMA header
5464 * minus the size of the smallest 802.11 frame (CTS frame).
5465 */
5466 hw->extra_tx_headroom =
5467 sizeof(struct mwl8k_dma_data) - sizeof(struct ieee80211_cts);
5468
5469 hw->channel_change_time = 10;
5470
e600707b 5471 hw->queues = MWL8K_TX_WMM_QUEUES;
3cc7772c
BC		 5472
5473 /* Set rssi values to dBm */
0bf22c37 5474 hw->flags |= IEEE80211_HW_SIGNAL_DBM | IEEE80211_HW_HAS_RATE_CONTROL;
3cc7772c
BC		 5475 hw->vif_data_size = sizeof(struct mwl8k_vif);
5476 hw->sta_data_size = sizeof(struct mwl8k_sta);
5477
5478 priv->macids_used = 0;
5479 INIT_LIST_HEAD(&priv->vif_list);
5480
5481 /* Set default radio state and preamble */
5482 priv->radio_on = 0;
5483 priv->radio_short_preamble = 0;
5484
5485 /* Finalize join worker */
5486 INIT_WORK(&priv->finalize_join_worker, mwl8k_finalize_join_worker);
3aefc37e
NS		 5487 /* Handle watchdog ba events */
5488 INIT_WORK(&priv->watchdog_ba_handle, mwl8k_watchdog_ba_events);
3cc7772c
BC		 5489
5490 /* TX reclaim and RX tasklets. */
5491 tasklet_init(&priv->poll_tx_task, mwl8k_tx_poll, (unsigned long)hw);
5492 tasklet_disable(&priv->poll_tx_task);
5493 tasklet_init(&priv->poll_rx_task, mwl8k_rx_poll, (unsigned long)hw);
5494 tasklet_disable(&priv->poll_rx_task);
5495
5496 /* Power management cookie */
5497 priv->cookie = pci_alloc_consistent(priv->pdev, 4, &priv->cookie_dma);
5498 if (priv->cookie == NULL)
5499 return -ENOMEM;
5500
5501 mutex_init(&priv->fw_mutex);
5502 priv->fw_mutex_owner = NULL;
5503 priv->fw_mutex_depth = 0;
5504 priv->hostcmd_wait = NULL;
5505
5506 spin_lock_init(&priv->tx_lock);
5507
ac109fd0
BC		 5508 spin_lock_init(&priv->stream_lock);
5509
3cc7772c
BC		 5510 priv->tx_wait = NULL;
5511
5512 rc = mwl8k_probe_hw(hw);
5513 if (rc)
5514 goto err_free_cookie;
5515
5516 hw->wiphy->interface_modes = 0;
5517 if (priv->ap_macids_supported || priv->device_info->fw_image_ap)
5518 hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_AP);
5519 if (priv->sta_macids_supported || priv->device_info->fw_image_sta)
5520 hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_STATION);
5521
5522 rc = ieee80211_register_hw(hw);
5523 if (rc) {
5524 wiphy_err(hw->wiphy, "Cannot register device\n");
5525 goto err_unprobe_hw;
5526 }
5527
5528 return 0;
5529
5530err_unprobe_hw:
e600707b 5531 for (i = 0; i < mwl8k_tx_queues(priv); i++)
3cc7772c
BC		 5532 mwl8k_txq_deinit(hw, i);
5533 mwl8k_rxq_deinit(hw, 0);
5534
be695fc4 5535err_free_cookie:
a66098da
LB		 5536 if (priv->cookie != NULL)
5537 pci_free_consistent(priv->pdev, 4,
5538 priv->cookie, priv->cookie_dma);
5539
3cc7772c
BC		 5540 return rc;
5541}
5542static int __devinit mwl8k_probe(struct pci_dev *pdev,
5543 const struct pci_device_id *id)
5544{
5545 static int printed_version;
5546 struct ieee80211_hw *hw;
5547 struct mwl8k_priv *priv;
0863ade8 5548 struct mwl8k_device_info *di;
3cc7772c
BC		 5549 int rc;
5550
5551 if (!printed_version) {
5552 printk(KERN_INFO "%s version %s\n", MWL8K_DESC, MWL8K_VERSION);
5553 printed_version = 1;
5554 }
5555
5556
5557 rc = pci_enable_device(pdev);
5558 if (rc) {
5559 printk(KERN_ERR "%s: Cannot enable new PCI device\n",
5560 MWL8K_NAME);
5561 return rc;
5562 }
5563
5564 rc = pci_request_regions(pdev, MWL8K_NAME);
5565 if (rc) {
5566 printk(KERN_ERR "%s: Cannot obtain PCI resources\n",
5567 MWL8K_NAME);
5568 goto err_disable_device;
5569 }
5570
5571 pci_set_master(pdev);
5572
5573
5574 hw = ieee80211_alloc_hw(sizeof(*priv), &mwl8k_ops);
5575 if (hw == NULL) {
5576 printk(KERN_ERR "%s: ieee80211 alloc failed\n", MWL8K_NAME);
5577 rc = -ENOMEM;
5578 goto err_free_reg;
5579 }
5580
5581 SET_IEEE80211_DEV(hw, &pdev->dev);
5582 pci_set_drvdata(pdev, hw);
5583
5584 priv = hw->priv;
5585 priv->hw = hw;
5586 priv->pdev = pdev;
5587 priv->device_info = &mwl8k_info_tbl[id->driver_data];
5588
5589
5590 priv->sram = pci_iomap(pdev, 0, 0x10000);
5591 if (priv->sram == NULL) {
5592 wiphy_err(hw->wiphy, "Cannot map device SRAM\n");
5593 goto err_iounmap;
5594 }
5595
5596 /*
5597 * If BAR0 is a 32 bit BAR, the register BAR will be BAR1.
5598 * If BAR0 is a 64 bit BAR, the register BAR will be BAR2.
5599 */
5600 priv->regs = pci_iomap(pdev, 1, 0x10000);
5601 if (priv->regs == NULL) {
5602 priv->regs = pci_iomap(pdev, 2, 0x10000);
5603 if (priv->regs == NULL) {
5604 wiphy_err(hw->wiphy, "Cannot map device registers\n");
5605 goto err_iounmap;
5606 }
5607 }
5608
0863ade8 5609 /*
99020471
BC		 5610 * Choose the initial fw image depending on user input. If a second
5611 * image is available, make it the alternative image that will be
5612 * loaded if the first one fails.
0863ade8 5613 */
99020471 5614 init_completion(&priv->firmware_loading_complete);
0863ade8 5615 di = priv->device_info;
99020471
BC		 5616 if (ap_mode_default && di->fw_image_ap) {
5617 priv->fw_pref = di->fw_image_ap;
5618 priv->fw_alt = di->fw_image_sta;
5619 } else if (!ap_mode_default && di->fw_image_sta) {
5620 priv->fw_pref = di->fw_image_sta;
5621 priv->fw_alt = di->fw_image_ap;
5622 } else if (ap_mode_default && !di->fw_image_ap && di->fw_image_sta) {
0863ade8 5623 printk(KERN_WARNING "AP fw is unavailable. Using STA fw.");
99020471 5624 priv->fw_pref = di->fw_image_sta;
0863ade8
BC		 5625 } else if (!ap_mode_default && !di->fw_image_sta && di->fw_image_ap) {
5626 printk(KERN_WARNING "STA fw is unavailable. Using AP fw.");
99020471
BC		 5627 priv->fw_pref = di->fw_image_ap;
5628 }
5629 rc = mwl8k_init_firmware(hw, priv->fw_pref, true);
3cc7772c
BC		 5630 if (rc)
5631 goto err_stop_firmware;
99020471 5632 return rc;
3cc7772c 5633
be695fc4
LB		 5634err_stop_firmware:
5635 mwl8k_hw_reset(priv);
be695fc4
LB		 5636
5637err_iounmap:
a66098da
LB		 5638 if (priv->regs != NULL)
5639 pci_iounmap(pdev, priv->regs);
5640
5b9482dd
LB		 5641 if (priv->sram != NULL)
5642 pci_iounmap(pdev, priv->sram);
5643
a66098da
LB		 5644 pci_set_drvdata(pdev, NULL);
5645 ieee80211_free_hw(hw);
5646
5647err_free_reg:
5648 pci_release_regions(pdev);
3db95e50
LB		 5649
5650err_disable_device:
a66098da
LB		 5651 pci_disable_device(pdev);
5652
5653 return rc;
5654}
5655
230f7af0 5656static void __devexit mwl8k_shutdown(struct pci_dev *pdev)
a66098da
LB		 5657{
5658 printk(KERN_ERR "===>%s(%u)\n", __func__, __LINE__);
5659}
5660
230f7af0 5661static void __devexit mwl8k_remove(struct pci_dev *pdev)
a66098da
LB		 5662{
5663 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
5664 struct mwl8k_priv *priv;
5665 int i;
5666
5667 if (hw == NULL)
5668 return;
5669 priv = hw->priv;
5670
99020471
BC		 5671 wait_for_completion(&priv->firmware_loading_complete);
5672
5673 if (priv->fw_state == FW_STATE_ERROR) {
5674 mwl8k_hw_reset(priv);
5675 goto unmap;
5676 }
5677
a66098da
LB		 5678 ieee80211_stop_queues(hw);
5679
60aa569f
LB		 5680 ieee80211_unregister_hw(hw);
5681
67e2eb27 5682 /* Remove TX reclaim and RX tasklets. */
1e9f9de3 5683 tasklet_kill(&priv->poll_tx_task);
67e2eb27 5684 tasklet_kill(&priv->poll_rx_task);
a66098da 5685
a66098da
LB		 5686 /* Stop hardware */
5687 mwl8k_hw_reset(priv);
5688
5689 /* Return all skbs to mac80211 */
e600707b 5690 for (i = 0; i < mwl8k_tx_queues(priv); i++)
efb7c49a 5691 mwl8k_txq_reclaim(hw, i, INT_MAX, 1);
a66098da 5692
e600707b 5693 for (i = 0; i < mwl8k_tx_queues(priv); i++)
a66098da
LB		 5694 mwl8k_txq_deinit(hw, i);
5695
5696 mwl8k_rxq_deinit(hw, 0);
5697
c2c357ce 5698 pci_free_consistent(priv->pdev, 4, priv->cookie, priv->cookie_dma);
a66098da 5699
99020471 5700unmap:
a66098da 5701 pci_iounmap(pdev, priv->regs);
5b9482dd 5702 pci_iounmap(pdev, priv->sram);
a66098da
LB		 5703 pci_set_drvdata(pdev, NULL);
5704 ieee80211_free_hw(hw);
5705 pci_release_regions(pdev);
5706 pci_disable_device(pdev);
5707}
5708
5709static struct pci_driver mwl8k_driver = {
5710 .name = MWL8K_NAME,
45a390dd 5711 .id_table = mwl8k_pci_id_table,
a66098da
LB		 5712 .probe = mwl8k_probe,
5713 .remove = __devexit_p(mwl8k_remove),
5714 .shutdown = __devexit_p(mwl8k_shutdown),
5715};
5716
5717static int __init mwl8k_init(void)
5718{
5719 return pci_register_driver(&mwl8k_driver);
5720}
5721
5722static void __exit mwl8k_exit(void)
5723{
5724 pci_unregister_driver(&mwl8k_driver);
5725}
5726
5727module_init(mwl8k_init);
5728module_exit(mwl8k_exit);
c2c357ce
LB		 5729
5730MODULE_DESCRIPTION(MWL8K_DESC);
5731MODULE_VERSION(MWL8K_VERSION);
5732MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>");
5733MODULE_LICENSE("GPL");
Linux kernel - Deliverables
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