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mac80211: move ieee80211_remove_tid_tx function
[deliverable/linux.git] / drivers / net / wireless / mwl8k.c
CommitLineData
a66098da 1/*
ce9e2e1b
LB		 2 * drivers/net/wireless/mwl8k.c
3 * Driver for Marvell TOPDOG 802.11 Wireless cards
a66098da 4 *
a5fb297d 5 * Copyright (C) 2008, 2009, 2010 Marvell Semiconductor Inc.
a66098da
LB		 6 *
7 * This file is licensed under the terms of the GNU General Public
8 * License version 2. This program is licensed "as is" without any
9 * warranty of any kind, whether express or implied.
10 */
11
12#include <linux/init.h>
a6b7a407 13#include <linux/interrupt.h>
a66098da
LB		 14#include <linux/module.h>
15#include <linux/kernel.h>
3d76e82c 16#include <linux/sched.h>
a66098da
LB		 17#include <linux/spinlock.h>
18#include <linux/list.h>
19#include <linux/pci.h>
20#include <linux/delay.h>
21#include <linux/completion.h>
22#include <linux/etherdevice.h>
5a0e3ad6 23#include <linux/slab.h>
a66098da
LB		 24#include <net/mac80211.h>
25#include <linux/moduleparam.h>
26#include <linux/firmware.h>
27#include <linux/workqueue.h>
28
29#define MWL8K_DESC "Marvell TOPDOG(R) 802.11 Wireless Network Driver"
30#define MWL8K_NAME KBUILD_MODNAME
00e8e692 31#define MWL8K_VERSION "0.13"
a66098da 32
0863ade8 33/* Module parameters */
eb939922 34static bool ap_mode_default;
0863ade8
BC		 35module_param(ap_mode_default, bool, 0);
36MODULE_PARM_DESC(ap_mode_default,
37 "Set to 1 to make ap mode the default instead of sta mode");
38
a66098da
LB		 39/* Register definitions */
40#define MWL8K_HIU_GEN_PTR 0x00000c10
ce9e2e1b
LB		 41#define MWL8K_MODE_STA 0x0000005a
42#define MWL8K_MODE_AP 0x000000a5
a66098da 43#define MWL8K_HIU_INT_CODE 0x00000c14
ce9e2e1b
LB		 44#define MWL8K_FWSTA_READY 0xf0f1f2f4
45#define MWL8K_FWAP_READY 0xf1f2f4a5
46#define MWL8K_INT_CODE_CMD_FINISHED 0x00000005
a66098da
LB		 47#define MWL8K_HIU_SCRATCH 0x00000c40
48
49/* Host->device communications */
50#define MWL8K_HIU_H2A_INTERRUPT_EVENTS 0x00000c18
51#define MWL8K_HIU_H2A_INTERRUPT_STATUS 0x00000c1c
52#define MWL8K_HIU_H2A_INTERRUPT_MASK 0x00000c20
53#define MWL8K_HIU_H2A_INTERRUPT_CLEAR_SEL 0x00000c24
54#define MWL8K_HIU_H2A_INTERRUPT_STATUS_MASK 0x00000c28
ce9e2e1b
LB		 55#define MWL8K_H2A_INT_DUMMY (1 << 20)
56#define MWL8K_H2A_INT_RESET (1 << 15)
57#define MWL8K_H2A_INT_DOORBELL (1 << 1)
58#define MWL8K_H2A_INT_PPA_READY (1 << 0)
a66098da
LB		 59
60/* Device->host communications */
61#define MWL8K_HIU_A2H_INTERRUPT_EVENTS 0x00000c2c
62#define MWL8K_HIU_A2H_INTERRUPT_STATUS 0x00000c30
63#define MWL8K_HIU_A2H_INTERRUPT_MASK 0x00000c34
64#define MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL 0x00000c38
65#define MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK 0x00000c3c
ce9e2e1b 66#define MWL8K_A2H_INT_DUMMY (1 << 20)
3aefc37e 67#define MWL8K_A2H_INT_BA_WATCHDOG (1 << 14)
ce9e2e1b
LB		 68#define MWL8K_A2H_INT_CHNL_SWITCHED (1 << 11)
69#define MWL8K_A2H_INT_QUEUE_EMPTY (1 << 10)
70#define MWL8K_A2H_INT_RADAR_DETECT (1 << 7)
71#define MWL8K_A2H_INT_RADIO_ON (1 << 6)
72#define MWL8K_A2H_INT_RADIO_OFF (1 << 5)
73#define MWL8K_A2H_INT_MAC_EVENT (1 << 3)
74#define MWL8K_A2H_INT_OPC_DONE (1 << 2)
75#define MWL8K_A2H_INT_RX_READY (1 << 1)
76#define MWL8K_A2H_INT_TX_DONE (1 << 0)
a66098da 77
566875db
PN		 78/* HW micro second timer register
79 * located at offset 0xA600. This
80 * will be used to timestamp tx
81 * packets.
82 */
83
84#define MWL8K_HW_TIMER_REGISTER 0x0000a600
85
a66098da
LB		 86#define MWL8K_A2H_EVENTS (MWL8K_A2H_INT_DUMMY | \
87 MWL8K_A2H_INT_CHNL_SWITCHED | \
88 MWL8K_A2H_INT_QUEUE_EMPTY | \
89 MWL8K_A2H_INT_RADAR_DETECT | \
90 MWL8K_A2H_INT_RADIO_ON | \
91 MWL8K_A2H_INT_RADIO_OFF | \
92 MWL8K_A2H_INT_MAC_EVENT | \
93 MWL8K_A2H_INT_OPC_DONE | \
94 MWL8K_A2H_INT_RX_READY | \
3aefc37e
NS		 95 MWL8K_A2H_INT_TX_DONE | \
96 MWL8K_A2H_INT_BA_WATCHDOG)
a66098da 97
a66098da 98#define MWL8K_RX_QUEUES 1
e600707b 99#define MWL8K_TX_WMM_QUEUES 4
8a7a578c 100#define MWL8K_MAX_AMPDU_QUEUES 8
e600707b
BC		 101#define MWL8K_MAX_TX_QUEUES (MWL8K_TX_WMM_QUEUES + MWL8K_MAX_AMPDU_QUEUES)
102#define mwl8k_tx_queues(priv) (MWL8K_TX_WMM_QUEUES + (priv)->num_ampdu_queues)
a66098da 103
54bc3a0d
LB		 104struct rxd_ops {
105 int rxd_size;
106 void (*rxd_init)(void *rxd, dma_addr_t next_dma_addr);
107 void (*rxd_refill)(void *rxd, dma_addr_t addr, int len);
20f09c3d 108 int (*rxd_process)(void *rxd, struct ieee80211_rx_status *status,
0d462bbb 109 __le16 *qos, s8 *noise);
54bc3a0d
LB		 110};
111
45a390dd 112struct mwl8k_device_info {
a74b295e
LB		 113 char *part_name;
114 char *helper_image;
0863ade8
BC		 115 char *fw_image_sta;
116 char *fw_image_ap;
89a91f4f 117 struct rxd_ops *ap_rxd_ops;
952a0e96 118 u32 fw_api_ap;
45a390dd
LB		 119};
120
a66098da 121struct mwl8k_rx_queue {
45eb400d 122 int rxd_count;
a66098da
LB		 123
124 /* hw receives here */
45eb400d 125 int head;
a66098da
LB		 126
127 /* refill descs here */
45eb400d 128 int tail;
a66098da 129
54bc3a0d 130 void *rxd;
45eb400d 131 dma_addr_t rxd_dma;
788838eb
LB		 132 struct {
133 struct sk_buff *skb;
53b1b3e1 134 DEFINE_DMA_UNMAP_ADDR(dma);
788838eb 135 } *buf;
a66098da
LB		 136};
137
a66098da
LB		 138struct mwl8k_tx_queue {
139 /* hw transmits here */
45eb400d 140 int head;
a66098da
LB		 141
142 /* sw appends here */
45eb400d 143 int tail;
a66098da 144
8ccbc3b8 145 unsigned int len;
45eb400d
LB		 146 struct mwl8k_tx_desc *txd;
147 dma_addr_t txd_dma;
148 struct sk_buff **skb;
a66098da
LB		 149};
150
ac109fd0
BC		 151enum {
152 AMPDU_NO_STREAM,
153 AMPDU_STREAM_NEW,
154 AMPDU_STREAM_IN_PROGRESS,
155 AMPDU_STREAM_ACTIVE,
156};
157
5faa1aff
NS		 158struct mwl8k_ampdu_stream {
159 struct ieee80211_sta *sta;
160 u8 tid;
161 u8 state;
162 u8 idx;
163 u8 txq_idx; /* index of this stream in priv->txq */
164};
165
a66098da 166struct mwl8k_priv {
a66098da 167 struct ieee80211_hw *hw;
a66098da 168 struct pci_dev *pdev;
bf3ca7f7 169 int irq;
a66098da 170
45a390dd
LB		 171 struct mwl8k_device_info *device_info;
172
be695fc4
LB		 173 void __iomem *sram;
174 void __iomem *regs;
175
176 /* firmware */
d1f9e41d
BC		 177 const struct firmware *fw_helper;
178 const struct firmware *fw_ucode;
a66098da 179
be695fc4
LB		 180 /* hardware/firmware parameters */
181 bool ap_fw;
182 struct rxd_ops *rxd_ops;
777ad375
LB		 183 struct ieee80211_supported_band band_24;
184 struct ieee80211_channel channels_24[14];
185 struct ieee80211_rate rates_24[14];
4eae9edd
LB		 186 struct ieee80211_supported_band band_50;
187 struct ieee80211_channel channels_50[4];
188 struct ieee80211_rate rates_50[9];
ee0ddf18
LB		 189 u32 ap_macids_supported;
190 u32 sta_macids_supported;
be695fc4 191
8a7a578c
BC		 192 /* Ampdu stream information */
193 u8 num_ampdu_queues;
ac109fd0
BC		 194 spinlock_t stream_lock;
195 struct mwl8k_ampdu_stream ampdu[MWL8K_MAX_AMPDU_QUEUES];
3aefc37e 196 struct work_struct watchdog_ba_handle;
8a7a578c 197
618952a7
LB		 198 /* firmware access */
199 struct mutex fw_mutex;
200 struct task_struct *fw_mutex_owner;
6b6accc3 201 struct task_struct *hw_restart_owner;
618952a7 202 int fw_mutex_depth;
618952a7
LB		 203 struct completion *hostcmd_wait;
204
a66098da
LB		 205 /* lock held over TX and TX reap */
206 spinlock_t tx_lock;
a66098da 207
88de754a
LB		 208 /* TX quiesce completion, protected by fw_mutex and tx_lock */
209 struct completion *tx_wait;
210
f5bb87cf 211 /* List of interfaces. */
ee0ddf18 212 u32 macids_used;
f5bb87cf 213 struct list_head vif_list;
a66098da 214
a66098da
LB		 215 /* power management status cookie from firmware */
216 u32 *cookie;
217 dma_addr_t cookie_dma;
218
219 u16 num_mcaddrs;
a66098da 220 u8 hw_rev;
2aa7b01f 221 u32 fw_rev;
a66098da
LB		 222
223 /*
224 * Running count of TX packets in flight, to avoid
225 * iterating over the transmit rings each time.
226 */
227 int pending_tx_pkts;
228
229 struct mwl8k_rx_queue rxq[MWL8K_RX_QUEUES];
e600707b
BC		 230 struct mwl8k_tx_queue txq[MWL8K_MAX_TX_QUEUES];
231 u32 txq_offset[MWL8K_MAX_TX_QUEUES];
a66098da 232
c46563b7 233 bool radio_on;
68ce3884 234 bool radio_short_preamble;
a43c49a8 235 bool sniffer_enabled;
0439b1f5 236 bool wmm_enabled;
a66098da 237
a66098da
LB		 238 /* XXX need to convert this to handle multiple interfaces */
239 bool capture_beacon;
d89173f2 240 u8 capture_bssid[ETH_ALEN];
a66098da
LB		 241 struct sk_buff *beacon_skb;
242
243 /*
244 * This FJ worker has to be global as it is scheduled from the
245 * RX handler. At this point we don't know which interface it
246 * belongs to until the list of bssids waiting to complete join
247 * is checked.
248 */
249 struct work_struct finalize_join_worker;
250
1e9f9de3
LB		 251 /* Tasklet to perform TX reclaim. */
252 struct tasklet_struct poll_tx_task;
67e2eb27
LB		 253
254 /* Tasklet to perform RX. */
255 struct tasklet_struct poll_rx_task;
0d462bbb
JL		 256
257 /* Most recently reported noise in dBm */
258 s8 noise;
0863ade8
BC		 259
260 /*
261 * preserve the queue configurations so they can be restored if/when
262 * the firmware image is swapped.
263 */
e600707b 264 struct ieee80211_tx_queue_params wmm_params[MWL8K_TX_WMM_QUEUES];
99020471 265
6b6accc3
YAP		 266 /* To perform the task of reloading the firmware */
267 struct work_struct fw_reload;
268 bool hw_restart_in_progress;
269
99020471
BC		 270 /* async firmware loading state */
271 unsigned fw_state;
272 char *fw_pref;
273 char *fw_alt;
274 struct completion firmware_loading_complete;
a66098da
LB		 275};
276
e53d9b96
NS		 277#define MAX_WEP_KEY_LEN 13
278#define NUM_WEP_KEYS 4
279
a66098da
LB		 280/* Per interface specific private data */
281struct mwl8k_vif {
f5bb87cf
LB		 282 struct list_head list;
283 struct ieee80211_vif *vif;
284
f57ca9c1
LB		 285 /* Firmware macid for this vif. */
286 int macid;
287
c2c2b12a 288 /* Non AMPDU sequence number assigned by driver. */
a680400e 289 u16 seqno;
e53d9b96
NS		 290
291 /* Saved WEP keys */
292 struct {
293 u8 enabled;
294 u8 key[sizeof(struct ieee80211_key_conf) + MAX_WEP_KEY_LEN];
295 } wep_key_conf[NUM_WEP_KEYS];
d9a07d49
NS		 296
297 /* BSSID */
298 u8 bssid[ETH_ALEN];
299
300 /* A flag to indicate is HW crypto is enabled for this bssid */
301 bool is_hw_crypto_enabled;
a66098da 302};
a94cc97e 303#define MWL8K_VIF(_vif) ((struct mwl8k_vif *)&((_vif)->drv_priv))
fcdc403c 304#define IEEE80211_KEY_CONF(_u8) ((struct ieee80211_key_conf *)(_u8))
a66098da 305
d0805c1c
BC		 306struct tx_traffic_info {
307 u32 start_time;
308 u32 pkts;
309};
310
311#define MWL8K_MAX_TID 8
a680400e
LB		 312struct mwl8k_sta {
313 /* Index into station database. Returned by UPDATE_STADB. */
314 u8 peer_id;
17033543 315 u8 is_ampdu_allowed;
d0805c1c 316 struct tx_traffic_info tx_stats[MWL8K_MAX_TID];
a680400e
LB		 317};
318#define MWL8K_STA(_sta) ((struct mwl8k_sta *)&((_sta)->drv_priv))
319
777ad375 320static const struct ieee80211_channel mwl8k_channels_24[] = {
a66098da
LB		 321 { .center_freq = 2412, .hw_value = 1, },
322 { .center_freq = 2417, .hw_value = 2, },
323 { .center_freq = 2422, .hw_value = 3, },
324 { .center_freq = 2427, .hw_value = 4, },
325 { .center_freq = 2432, .hw_value = 5, },
326 { .center_freq = 2437, .hw_value = 6, },
327 { .center_freq = 2442, .hw_value = 7, },
328 { .center_freq = 2447, .hw_value = 8, },
329 { .center_freq = 2452, .hw_value = 9, },
330 { .center_freq = 2457, .hw_value = 10, },
331 { .center_freq = 2462, .hw_value = 11, },
647ca6b0
LB		 332 { .center_freq = 2467, .hw_value = 12, },
333 { .center_freq = 2472, .hw_value = 13, },
334 { .center_freq = 2484, .hw_value = 14, },
a66098da
LB		 335};
336
777ad375 337static const struct ieee80211_rate mwl8k_rates_24[] = {
a66098da
LB		 338 { .bitrate = 10, .hw_value = 2, },
339 { .bitrate = 20, .hw_value = 4, },
340 { .bitrate = 55, .hw_value = 11, },
5dfd3e2c
LB		 341 { .bitrate = 110, .hw_value = 22, },
342 { .bitrate = 220, .hw_value = 44, },
a66098da
LB		 343 { .bitrate = 60, .hw_value = 12, },
344 { .bitrate = 90, .hw_value = 18, },
a66098da
LB		 345 { .bitrate = 120, .hw_value = 24, },
346 { .bitrate = 180, .hw_value = 36, },
347 { .bitrate = 240, .hw_value = 48, },
348 { .bitrate = 360, .hw_value = 72, },
349 { .bitrate = 480, .hw_value = 96, },
350 { .bitrate = 540, .hw_value = 108, },
140eb5e2
LB		 351 { .bitrate = 720, .hw_value = 144, },
352};
353
4eae9edd
LB		 354static const struct ieee80211_channel mwl8k_channels_50[] = {
355 { .center_freq = 5180, .hw_value = 36, },
356 { .center_freq = 5200, .hw_value = 40, },
357 { .center_freq = 5220, .hw_value = 44, },
358 { .center_freq = 5240, .hw_value = 48, },
359};
360
361static const struct ieee80211_rate mwl8k_rates_50[] = {
362 { .bitrate = 60, .hw_value = 12, },
363 { .bitrate = 90, .hw_value = 18, },
364 { .bitrate = 120, .hw_value = 24, },
365 { .bitrate = 180, .hw_value = 36, },
366 { .bitrate = 240, .hw_value = 48, },
367 { .bitrate = 360, .hw_value = 72, },
368 { .bitrate = 480, .hw_value = 96, },
369 { .bitrate = 540, .hw_value = 108, },
370 { .bitrate = 720, .hw_value = 144, },
371};
372
a66098da 373/* Set or get info from Firmware */
a66098da 374#define MWL8K_CMD_GET 0x0000
41fdf097
NS		 375#define MWL8K_CMD_SET 0x0001
376#define MWL8K_CMD_SET_LIST 0x0002
a66098da
LB		 377
378/* Firmware command codes */
379#define MWL8K_CMD_CODE_DNLD 0x0001
380#define MWL8K_CMD_GET_HW_SPEC 0x0003
42fba21d 381#define MWL8K_CMD_SET_HW_SPEC 0x0004
a66098da
LB		 382#define MWL8K_CMD_MAC_MULTICAST_ADR 0x0010
383#define MWL8K_CMD_GET_STAT 0x0014
ff45fc60
LB		 384#define MWL8K_CMD_RADIO_CONTROL 0x001c
385#define MWL8K_CMD_RF_TX_POWER 0x001e
41fdf097 386#define MWL8K_CMD_TX_POWER 0x001f
08b06347 387#define MWL8K_CMD_RF_ANTENNA 0x0020
aa21d0f6 388#define MWL8K_CMD_SET_BEACON 0x0100 /* per-vif */
a66098da
LB		 389#define MWL8K_CMD_SET_PRE_SCAN 0x0107
390#define MWL8K_CMD_SET_POST_SCAN 0x0108
ff45fc60
LB		 391#define MWL8K_CMD_SET_RF_CHANNEL 0x010a
392#define MWL8K_CMD_SET_AID 0x010d
393#define MWL8K_CMD_SET_RATE 0x0110
394#define MWL8K_CMD_SET_FINALIZE_JOIN 0x0111
395#define MWL8K_CMD_RTS_THRESHOLD 0x0113
a66098da 396#define MWL8K_CMD_SET_SLOT 0x0114
ff45fc60
LB		 397#define MWL8K_CMD_SET_EDCA_PARAMS 0x0115
398#define MWL8K_CMD_SET_WMM_MODE 0x0123
a66098da 399#define MWL8K_CMD_MIMO_CONFIG 0x0125
ff45fc60 400#define MWL8K_CMD_USE_FIXED_RATE 0x0126
a66098da 401#define MWL8K_CMD_ENABLE_SNIFFER 0x0150
aa21d0f6 402#define MWL8K_CMD_SET_MAC_ADDR 0x0202 /* per-vif */
a66098da 403#define MWL8K_CMD_SET_RATEADAPT_MODE 0x0203
3aefc37e 404#define MWL8K_CMD_GET_WATCHDOG_BITMAP 0x0205
197a4e4e 405#define MWL8K_CMD_DEL_MAC_ADDR 0x0206 /* per-vif */
aa21d0f6
LB		 406#define MWL8K_CMD_BSS_START 0x1100 /* per-vif */
407#define MWL8K_CMD_SET_NEW_STN 0x1111 /* per-vif */
fcdc403c 408#define MWL8K_CMD_UPDATE_ENCRYPTION 0x1122 /* per-vif */
ff45fc60 409#define MWL8K_CMD_UPDATE_STADB 0x1123
5faa1aff 410#define MWL8K_CMD_BASTREAM 0x1125
a66098da 411
b603742f 412static const char *mwl8k_cmd_name(__le16 cmd, char *buf, int bufsize)
a66098da 413{
b603742f
JL		 414 u16 command = le16_to_cpu(cmd);
415
a66098da
LB		 416#define MWL8K_CMDNAME(x) case MWL8K_CMD_##x: do {\
417 snprintf(buf, bufsize, "%s", #x);\
418 return buf;\
419 } while (0)
b603742f 420 switch (command & ~0x8000) {
a66098da
LB		 421 MWL8K_CMDNAME(CODE_DNLD);
422 MWL8K_CMDNAME(GET_HW_SPEC);
42fba21d 423 MWL8K_CMDNAME(SET_HW_SPEC);
a66098da
LB		 424 MWL8K_CMDNAME(MAC_MULTICAST_ADR);
425 MWL8K_CMDNAME(GET_STAT);
426 MWL8K_CMDNAME(RADIO_CONTROL);
427 MWL8K_CMDNAME(RF_TX_POWER);
41fdf097 428 MWL8K_CMDNAME(TX_POWER);
08b06347 429 MWL8K_CMDNAME(RF_ANTENNA);
b64fe619 430 MWL8K_CMDNAME(SET_BEACON);
a66098da
LB		 431 MWL8K_CMDNAME(SET_PRE_SCAN);
432 MWL8K_CMDNAME(SET_POST_SCAN);
433 MWL8K_CMDNAME(SET_RF_CHANNEL);
ff45fc60
LB		 434 MWL8K_CMDNAME(SET_AID);
435 MWL8K_CMDNAME(SET_RATE);
436 MWL8K_CMDNAME(SET_FINALIZE_JOIN);
437 MWL8K_CMDNAME(RTS_THRESHOLD);
a66098da 438 MWL8K_CMDNAME(SET_SLOT);
ff45fc60
LB		 439 MWL8K_CMDNAME(SET_EDCA_PARAMS);
440 MWL8K_CMDNAME(SET_WMM_MODE);
a66098da 441 MWL8K_CMDNAME(MIMO_CONFIG);
ff45fc60 442 MWL8K_CMDNAME(USE_FIXED_RATE);
a66098da 443 MWL8K_CMDNAME(ENABLE_SNIFFER);
32060e1b 444 MWL8K_CMDNAME(SET_MAC_ADDR);
a66098da 445 MWL8K_CMDNAME(SET_RATEADAPT_MODE);
b64fe619 446 MWL8K_CMDNAME(BSS_START);
3f5610ff 447 MWL8K_CMDNAME(SET_NEW_STN);
fcdc403c 448 MWL8K_CMDNAME(UPDATE_ENCRYPTION);
ff45fc60 449 MWL8K_CMDNAME(UPDATE_STADB);
5faa1aff 450 MWL8K_CMDNAME(BASTREAM);
3aefc37e 451 MWL8K_CMDNAME(GET_WATCHDOG_BITMAP);
a66098da
LB		 452 default:
453 snprintf(buf, bufsize, "0x%x", cmd);
454 }
455#undef MWL8K_CMDNAME
456
457 return buf;
458}
459
460/* Hardware and firmware reset */
461static void mwl8k_hw_reset(struct mwl8k_priv *priv)
462{
463 iowrite32(MWL8K_H2A_INT_RESET,
464 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
465 iowrite32(MWL8K_H2A_INT_RESET,
466 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
467 msleep(20);
468}
469
470/* Release fw image */
d1f9e41d 471static void mwl8k_release_fw(const struct firmware **fw)
a66098da
LB		 472{
473 if (*fw == NULL)
474 return;
475 release_firmware(*fw);
476 *fw = NULL;
477}
478
479static void mwl8k_release_firmware(struct mwl8k_priv *priv)
480{
22be40d9
LB		 481 mwl8k_release_fw(&priv->fw_ucode);
482 mwl8k_release_fw(&priv->fw_helper);
a66098da
LB		 483}
484
99020471
BC		 485/* states for asynchronous f/w loading */
486static void mwl8k_fw_state_machine(const struct firmware *fw, void *context);
487enum {
488 FW_STATE_INIT = 0,
489 FW_STATE_LOADING_PREF,
490 FW_STATE_LOADING_ALT,
491 FW_STATE_ERROR,
492};
493
a66098da
LB		 494/* Request fw image */
495static int mwl8k_request_fw(struct mwl8k_priv *priv,
d1f9e41d 496 const char *fname, const struct firmware **fw,
99020471 497 bool nowait)
a66098da
LB		 498{
499 /* release current image */
500 if (*fw != NULL)
501 mwl8k_release_fw(fw);
502
99020471
BC		 503 if (nowait)
504 return request_firmware_nowait(THIS_MODULE, 1, fname,
505 &priv->pdev->dev, GFP_KERNEL,
506 priv, mwl8k_fw_state_machine);
507 else
d1f9e41d 508 return request_firmware(fw, fname, &priv->pdev->dev);
a66098da
LB		 509}
510
99020471
BC		 511static int mwl8k_request_firmware(struct mwl8k_priv *priv, char *fw_image,
512 bool nowait)
a66098da 513{
a74b295e 514 struct mwl8k_device_info *di = priv->device_info;
a66098da
LB		 515 int rc;
516
a74b295e 517 if (di->helper_image != NULL) {
99020471
BC		 518 if (nowait)
519 rc = mwl8k_request_fw(priv, di->helper_image,
520 &priv->fw_helper, true);
521 else
522 rc = mwl8k_request_fw(priv, di->helper_image,
523 &priv->fw_helper, false);
524 if (rc)
525 printk(KERN_ERR "%s: Error requesting helper fw %s\n",
526 pci_name(priv->pdev), di->helper_image);
527
528 if (rc || nowait)
a74b295e 529 return rc;
a66098da
LB		 530 }
531
99020471
BC		 532 if (nowait) {
533 /*
534 * if we get here, no helper image is needed. Skip the
535 * FW_STATE_INIT state.
536 */
537 priv->fw_state = FW_STATE_LOADING_PREF;
538 rc = mwl8k_request_fw(priv, fw_image,
539 &priv->fw_ucode,
540 true);
541 } else
542 rc = mwl8k_request_fw(priv, fw_image,
543 &priv->fw_ucode, false);
a66098da 544 if (rc) {
c2c357ce 545 printk(KERN_ERR "%s: Error requesting firmware file %s\n",
0863ade8 546 pci_name(priv->pdev), fw_image);
22be40d9 547 mwl8k_release_fw(&priv->fw_helper);
a66098da
LB		 548 return rc;
549 }
550
551 return 0;
552}
553
554struct mwl8k_cmd_pkt {
555 __le16 code;
556 __le16 length;
f57ca9c1
LB		 557 __u8 seq_num;
558 __u8 macid;
a66098da
LB		 559 __le16 result;
560 char payload[0];
ba2d3587 561} __packed;
a66098da
LB		 562
563/*
564 * Firmware loading.
565 */
566static int
567mwl8k_send_fw_load_cmd(struct mwl8k_priv *priv, void *data, int length)
568{
569 void __iomem *regs = priv->regs;
570 dma_addr_t dma_addr;
a66098da
LB		 571 int loops;
572
573 dma_addr = pci_map_single(priv->pdev, data, length, PCI_DMA_TODEVICE);
574 if (pci_dma_mapping_error(priv->pdev, dma_addr))
575 return -ENOMEM;
576
577 iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
578 iowrite32(0, regs + MWL8K_HIU_INT_CODE);
579 iowrite32(MWL8K_H2A_INT_DOORBELL,
580 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
581 iowrite32(MWL8K_H2A_INT_DUMMY,
582 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
583
a66098da
LB		 584 loops = 1000;
585 do {
586 u32 int_code;
587
588 int_code = ioread32(regs + MWL8K_HIU_INT_CODE);
589 if (int_code == MWL8K_INT_CODE_CMD_FINISHED) {
590 iowrite32(0, regs + MWL8K_HIU_INT_CODE);
a66098da
LB		 591 break;
592 }
593
3d76e82c 594 cond_resched();
a66098da
LB		 595 udelay(1);
596 } while (--loops);
597
598 pci_unmap_single(priv->pdev, dma_addr, length, PCI_DMA_TODEVICE);
599
d4b70570 600 return loops ? 0 : -ETIMEDOUT;
a66098da
LB		 601}
602
603static int mwl8k_load_fw_image(struct mwl8k_priv *priv,
604 const u8 *data, size_t length)
605{
606 struct mwl8k_cmd_pkt *cmd;
607 int done;
608 int rc = 0;
609
610 cmd = kmalloc(sizeof(*cmd) + 256, GFP_KERNEL);
611 if (cmd == NULL)
612 return -ENOMEM;
613
614 cmd->code = cpu_to_le16(MWL8K_CMD_CODE_DNLD);
615 cmd->seq_num = 0;
f57ca9c1 616 cmd->macid = 0;
a66098da
LB		 617 cmd->result = 0;
618
619 done = 0;
620 while (length) {
621 int block_size = length > 256 ? 256 : length;
622
623 memcpy(cmd->payload, data + done, block_size);
624 cmd->length = cpu_to_le16(block_size);
625
626 rc = mwl8k_send_fw_load_cmd(priv, cmd,
627 sizeof(*cmd) + block_size);
628 if (rc)
629 break;
630
631 done += block_size;
632 length -= block_size;
633 }
634
635 if (!rc) {
636 cmd->length = 0;
637 rc = mwl8k_send_fw_load_cmd(priv, cmd, sizeof(*cmd));
638 }
639
640 kfree(cmd);
641
642 return rc;
643}
644
645static int mwl8k_feed_fw_image(struct mwl8k_priv *priv,
646 const u8 *data, size_t length)
647{
648 unsigned char *buffer;
649 int may_continue, rc = 0;
650 u32 done, prev_block_size;
651
652 buffer = kmalloc(1024, GFP_KERNEL);
653 if (buffer == NULL)
654 return -ENOMEM;
655
656 done = 0;
657 prev_block_size = 0;
658 may_continue = 1000;
659 while (may_continue > 0) {
660 u32 block_size;
661
662 block_size = ioread32(priv->regs + MWL8K_HIU_SCRATCH);
663 if (block_size & 1) {
664 block_size &= ~1;
665 may_continue--;
666 } else {
667 done += prev_block_size;
668 length -= prev_block_size;
669 }
670
671 if (block_size > 1024 || block_size > length) {
672 rc = -EOVERFLOW;
673 break;
674 }
675
676 if (length == 0) {
677 rc = 0;
678 break;
679 }
680
681 if (block_size == 0) {
682 rc = -EPROTO;
683 may_continue--;
684 udelay(1);
685 continue;
686 }
687
688 prev_block_size = block_size;
689 memcpy(buffer, data + done, block_size);
690
691 rc = mwl8k_send_fw_load_cmd(priv, buffer, block_size);
692 if (rc)
693 break;
694 }
695
696 if (!rc && length != 0)
697 rc = -EREMOTEIO;
698
699 kfree(buffer);
700
701 return rc;
702}
703
c2c357ce 704static int mwl8k_load_firmware(struct ieee80211_hw *hw)
a66098da 705{
c2c357ce 706 struct mwl8k_priv *priv = hw->priv;
d1f9e41d 707 const struct firmware *fw = priv->fw_ucode;
c2c357ce
LB		 708 int rc;
709 int loops;
710
711 if (!memcmp(fw->data, "\x01\x00\x00\x00", 4)) {
d1f9e41d 712 const struct firmware *helper = priv->fw_helper;
a66098da 713
c2c357ce
LB		 714 if (helper == NULL) {
715 printk(KERN_ERR "%s: helper image needed but none "
716 "given\n", pci_name(priv->pdev));
717 return -EINVAL;
718 }
a66098da 719
c2c357ce 720 rc = mwl8k_load_fw_image(priv, helper->data, helper->size);
a66098da
LB		 721 if (rc) {
722 printk(KERN_ERR "%s: unable to load firmware "
c2c357ce 723 "helper image\n", pci_name(priv->pdev));
a66098da
LB		 724 return rc;
725 }
ba30c4a5 726 msleep(20);
a66098da 727
c2c357ce 728 rc = mwl8k_feed_fw_image(priv, fw->data, fw->size);
a66098da 729 } else {
c2c357ce 730 rc = mwl8k_load_fw_image(priv, fw->data, fw->size);
a66098da
LB		 731 }
732
733 if (rc) {
c2c357ce
LB		 734 printk(KERN_ERR "%s: unable to load firmware image\n",
735 pci_name(priv->pdev));
a66098da
LB		 736 return rc;
737 }
738
89a91f4f 739 iowrite32(MWL8K_MODE_STA, priv->regs + MWL8K_HIU_GEN_PTR);
a66098da 740
89b872e2 741 loops = 500000;
a66098da 742 do {
eae74e65
LB		 743 u32 ready_code;
744
745 ready_code = ioread32(priv->regs + MWL8K_HIU_INT_CODE);
746 if (ready_code == MWL8K_FWAP_READY) {
3db1cd5c 747 priv->ap_fw = true;
eae74e65
LB		 748 break;
749 } else if (ready_code == MWL8K_FWSTA_READY) {
3db1cd5c 750 priv->ap_fw = false;
a66098da 751 break;
eae74e65
LB		 752 }
753
754 cond_resched();
a66098da
LB		 755 udelay(1);
756 } while (--loops);
757
758 return loops ? 0 : -ETIMEDOUT;
759}
760
761
a66098da
LB		 762/* DMA header used by firmware and hardware. */
763struct mwl8k_dma_data {
764 __le16 fwlen;
765 struct ieee80211_hdr wh;
20f09c3d 766 char data[0];
ba2d3587 767} __packed;
a66098da
LB		 768
769/* Routines to add/remove DMA header from skb. */
20f09c3d 770static inline void mwl8k_remove_dma_header(struct sk_buff *skb, __le16 qos)
a66098da 771{
20f09c3d
LB		 772 struct mwl8k_dma_data *tr;
773 int hdrlen;
774
775 tr = (struct mwl8k_dma_data *)skb->data;
776 hdrlen = ieee80211_hdrlen(tr->wh.frame_control);
777
778 if (hdrlen != sizeof(tr->wh)) {
779 if (ieee80211_is_data_qos(tr->wh.frame_control)) {
780 memmove(tr->data - hdrlen, &tr->wh, hdrlen - 2);
781 *((__le16 *)(tr->data - 2)) = qos;
782 } else {
783 memmove(tr->data - hdrlen, &tr->wh, hdrlen);
784 }
a66098da 785 }
20f09c3d
LB		 786
787 if (hdrlen != sizeof(*tr))
788 skb_pull(skb, sizeof(*tr) - hdrlen);
a66098da
LB		 789}
790
ff776cec
YAP		 791#define REDUCED_TX_HEADROOM 8
792
252486a1 793static void
e4eefec7
YAP		 794mwl8k_add_dma_header(struct mwl8k_priv *priv, struct sk_buff *skb,
795 int head_pad, int tail_pad)
a66098da
LB		 796{
797 struct ieee80211_hdr *wh;
ca009301 798 int hdrlen;
252486a1 799 int reqd_hdrlen;
a66098da
LB		 800 struct mwl8k_dma_data *tr;
801
ca009301
LB		 802 /*
803 * Add a firmware DMA header; the firmware requires that we
804 * present a 2-byte payload length followed by a 4-address
805 * header (without QoS field), followed (optionally) by any
806 * WEP/ExtIV header (but only filled in for CCMP).
807 */
a66098da 808 wh = (struct ieee80211_hdr *)skb->data;
ca009301 809
a66098da 810 hdrlen = ieee80211_hdrlen(wh->frame_control);
ff776cec
YAP		 811
812 /*
813 * Check if skb_resize is required because of
814 * tx_headroom adjustment.
815 */
816 if (priv->ap_fw && (hdrlen < (sizeof(struct ieee80211_cts)
817 + REDUCED_TX_HEADROOM))) {
818 if (pskb_expand_head(skb, REDUCED_TX_HEADROOM, 0, GFP_ATOMIC)) {
819
820 wiphy_err(priv->hw->wiphy,
821 "Failed to reallocate TX buffer\n");
822 return;
823 }
824 skb->truesize += REDUCED_TX_HEADROOM;
825 }
826
e4eefec7 827 reqd_hdrlen = sizeof(*tr) + head_pad;
252486a1
NS		 828
829 if (hdrlen != reqd_hdrlen)
830 skb_push(skb, reqd_hdrlen - hdrlen);
a66098da 831
ca009301 832 if (ieee80211_is_data_qos(wh->frame_control))
252486a1 833 hdrlen -= IEEE80211_QOS_CTL_LEN;
a66098da
LB		 834
835 tr = (struct mwl8k_dma_data *)skb->data;
836 if (wh != &tr->wh)
837 memmove(&tr->wh, wh, hdrlen);
ca009301
LB		 838 if (hdrlen != sizeof(tr->wh))
839 memset(((void *)&tr->wh) + hdrlen, 0, sizeof(tr->wh) - hdrlen);
a66098da
LB		 840
841 /*
842 * Firmware length is the length of the fully formed "802.11
843 * payload". That is, everything except for the 802.11 header.
844 * This includes all crypto material including the MIC.
845 */
252486a1 846 tr->fwlen = cpu_to_le16(skb->len - sizeof(*tr) + tail_pad);
a66098da
LB		 847}
848
ff776cec
YAP		 849static void mwl8k_encapsulate_tx_frame(struct mwl8k_priv *priv,
850 struct sk_buff *skb)
e53d9b96
NS		 851{
852 struct ieee80211_hdr *wh;
853 struct ieee80211_tx_info *tx_info;
854 struct ieee80211_key_conf *key_conf;
855 int data_pad;
e4eefec7 856 int head_pad = 0;
e53d9b96
NS		 857
858 wh = (struct ieee80211_hdr *)skb->data;
859
860 tx_info = IEEE80211_SKB_CB(skb);
861
862 key_conf = NULL;
863 if (ieee80211_is_data(wh->frame_control))
864 key_conf = tx_info->control.hw_key;
865
866 /*
867 * Make sure the packet header is in the DMA header format (4-address
e4eefec7 868 * without QoS), and add head & tail padding when HW crypto is enabled.
e53d9b96
NS		 869 *
870 * We have the following trailer padding requirements:
871 * - WEP: 4 trailer bytes (ICV)
872 * - TKIP: 12 trailer bytes (8 MIC + 4 ICV)
873 * - CCMP: 8 trailer bytes (MIC)
874 */
875 data_pad = 0;
876 if (key_conf != NULL) {
e4eefec7 877 head_pad = key_conf->iv_len;
e53d9b96
NS		 878 switch (key_conf->cipher) {
879 case WLAN_CIPHER_SUITE_WEP40:
880 case WLAN_CIPHER_SUITE_WEP104:
881 data_pad = 4;
882 break;
883 case WLAN_CIPHER_SUITE_TKIP:
884 data_pad = 12;
885 break;
886 case WLAN_CIPHER_SUITE_CCMP:
887 data_pad = 8;
888 break;
889 }
890 }
e4eefec7 891 mwl8k_add_dma_header(priv, skb, head_pad, data_pad);
e53d9b96 892}
a66098da
LB		 893
894/*
89a91f4f 895 * Packet reception for 88w8366 AP firmware.
6f6d1e9a 896 */
89a91f4f 897struct mwl8k_rxd_8366_ap {
6f6d1e9a
LB		 898 __le16 pkt_len;
899 __u8 sq2;
900 __u8 rate;
901 __le32 pkt_phys_addr;
902 __le32 next_rxd_phys_addr;
903 __le16 qos_control;
904 __le16 htsig2;
905 __le32 hw_rssi_info;
906 __le32 hw_noise_floor_info;
907 __u8 noise_floor;
908 __u8 pad0[3];
909 __u8 rssi;
910 __u8 rx_status;
911 __u8 channel;
912 __u8 rx_ctrl;
ba2d3587 913} __packed;
6f6d1e9a 914
89a91f4f
LB		 915#define MWL8K_8366_AP_RATE_INFO_MCS_FORMAT 0x80
916#define MWL8K_8366_AP_RATE_INFO_40MHZ 0x40
917#define MWL8K_8366_AP_RATE_INFO_RATEID(x) ((x) & 0x3f)
8e9f33f0 918
89a91f4f 919#define MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST 0x80
6f6d1e9a 920
d9a07d49
NS		 921/* 8366 AP rx_status bits */
922#define MWL8K_8366_AP_RXSTAT_DECRYPT_ERR_MASK 0x80
923#define MWL8K_8366_AP_RXSTAT_GENERAL_DECRYPT_ERR 0xFF
924#define MWL8K_8366_AP_RXSTAT_TKIP_DECRYPT_MIC_ERR 0x02
925#define MWL8K_8366_AP_RXSTAT_WEP_DECRYPT_ICV_ERR 0x04
926#define MWL8K_8366_AP_RXSTAT_TKIP_DECRYPT_ICV_ERR 0x08
927
89a91f4f 928static void mwl8k_rxd_8366_ap_init(void *_rxd, dma_addr_t next_dma_addr)
6f6d1e9a 929{
89a91f4f 930 struct mwl8k_rxd_8366_ap *rxd = _rxd;
6f6d1e9a
LB		 931
932 rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
89a91f4f 933 rxd->rx_ctrl = MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST;
6f6d1e9a
LB		 934}
935
89a91f4f 936static void mwl8k_rxd_8366_ap_refill(void *_rxd, dma_addr_t addr, int len)
6f6d1e9a 937{
89a91f4f 938 struct mwl8k_rxd_8366_ap *rxd = _rxd;
6f6d1e9a
LB		 939
940 rxd->pkt_len = cpu_to_le16(len);
941 rxd->pkt_phys_addr = cpu_to_le32(addr);
942 wmb();
943 rxd->rx_ctrl = 0;
944}
945
946static int
89a91f4f 947mwl8k_rxd_8366_ap_process(void *_rxd, struct ieee80211_rx_status *status,
0d462bbb 948 __le16 *qos, s8 *noise)
6f6d1e9a 949{
89a91f4f 950 struct mwl8k_rxd_8366_ap *rxd = _rxd;
6f6d1e9a 951
89a91f4f 952 if (!(rxd->rx_ctrl & MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST))
6f6d1e9a
LB		 953 return -1;
954 rmb();
955
956 memset(status, 0, sizeof(*status));
957
958 status->signal = -rxd->rssi;
0d462bbb 959 *noise = -rxd->noise_floor;
6f6d1e9a 960
89a91f4f 961 if (rxd->rate & MWL8K_8366_AP_RATE_INFO_MCS_FORMAT) {
6f6d1e9a 962 status->flag |= RX_FLAG_HT;
89a91f4f 963 if (rxd->rate & MWL8K_8366_AP_RATE_INFO_40MHZ)
8e9f33f0 964 status->flag |= RX_FLAG_40MHZ;
89a91f4f 965 status->rate_idx = MWL8K_8366_AP_RATE_INFO_RATEID(rxd->rate);
6f6d1e9a
LB		 966 } else {
967 int i;
968
777ad375
LB		 969 for (i = 0; i < ARRAY_SIZE(mwl8k_rates_24); i++) {
970 if (mwl8k_rates_24[i].hw_value == rxd->rate) {
6f6d1e9a
LB		 971 status->rate_idx = i;
972 break;
973 }
974 }
975 }
976
85478344
LB		 977 if (rxd->channel > 14) {
978 status->band = IEEE80211_BAND_5GHZ;
979 if (!(status->flag & RX_FLAG_HT))
980 status->rate_idx -= 5;
981 } else {
982 status->band = IEEE80211_BAND_2GHZ;
983 }
59eb21a6
BR		 984 status->freq = ieee80211_channel_to_frequency(rxd->channel,
985 status->band);
6f6d1e9a 986
20f09c3d
LB		 987 *qos = rxd->qos_control;
988
d9a07d49
NS		 989 if ((rxd->rx_status != MWL8K_8366_AP_RXSTAT_GENERAL_DECRYPT_ERR) &&
990 (rxd->rx_status & MWL8K_8366_AP_RXSTAT_DECRYPT_ERR_MASK) &&
991 (rxd->rx_status & MWL8K_8366_AP_RXSTAT_TKIP_DECRYPT_MIC_ERR))
992 status->flag |= RX_FLAG_MMIC_ERROR;
993
6f6d1e9a
LB		 994 return le16_to_cpu(rxd->pkt_len);
995}
996
89a91f4f
LB		 997static struct rxd_ops rxd_8366_ap_ops = {
998 .rxd_size = sizeof(struct mwl8k_rxd_8366_ap),
999 .rxd_init = mwl8k_rxd_8366_ap_init,
1000 .rxd_refill = mwl8k_rxd_8366_ap_refill,
1001 .rxd_process = mwl8k_rxd_8366_ap_process,
6f6d1e9a
LB		 1002};
1003
1004/*
89a91f4f 1005 * Packet reception for STA firmware.
a66098da 1006 */
89a91f4f 1007struct mwl8k_rxd_sta {
a66098da
LB		 1008 __le16 pkt_len;
1009 __u8 link_quality;
1010 __u8 noise_level;
1011 __le32 pkt_phys_addr;
45eb400d 1012 __le32 next_rxd_phys_addr;
a66098da
LB		 1013 __le16 qos_control;
1014 __le16 rate_info;
1015 __le32 pad0[4];
1016 __u8 rssi;
1017 __u8 channel;
1018 __le16 pad1;
1019 __u8 rx_ctrl;
1020 __u8 rx_status;
1021 __u8 pad2[2];
ba2d3587 1022} __packed;
a66098da 1023
89a91f4f
LB		 1024#define MWL8K_STA_RATE_INFO_SHORTPRE 0x8000
1025#define MWL8K_STA_RATE_INFO_ANTSELECT(x) (((x) >> 11) & 0x3)
1026#define MWL8K_STA_RATE_INFO_RATEID(x) (((x) >> 3) & 0x3f)
1027#define MWL8K_STA_RATE_INFO_40MHZ 0x0004
1028#define MWL8K_STA_RATE_INFO_SHORTGI 0x0002
1029#define MWL8K_STA_RATE_INFO_MCS_FORMAT 0x0001
54bc3a0d 1030
89a91f4f 1031#define MWL8K_STA_RX_CTRL_OWNED_BY_HOST 0x02
d9a07d49
NS		 1032#define MWL8K_STA_RX_CTRL_DECRYPT_ERROR 0x04
1033/* ICV=0 or MIC=1 */
1034#define MWL8K_STA_RX_CTRL_DEC_ERR_TYPE 0x08
1035/* Key is uploaded only in failure case */
1036#define MWL8K_STA_RX_CTRL_KEY_INDEX 0x30
54bc3a0d 1037
89a91f4f 1038static void mwl8k_rxd_sta_init(void *_rxd, dma_addr_t next_dma_addr)
54bc3a0d 1039{
89a91f4f 1040 struct mwl8k_rxd_sta *rxd = _rxd;
54bc3a0d
LB		 1041
1042 rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
89a91f4f 1043 rxd->rx_ctrl = MWL8K_STA_RX_CTRL_OWNED_BY_HOST;
54bc3a0d
LB		 1044}
1045
89a91f4f 1046static void mwl8k_rxd_sta_refill(void *_rxd, dma_addr_t addr, int len)
54bc3a0d 1047{
89a91f4f 1048 struct mwl8k_rxd_sta *rxd = _rxd;
54bc3a0d
LB		 1049
1050 rxd->pkt_len = cpu_to_le16(len);
1051 rxd->pkt_phys_addr = cpu_to_le32(addr);
1052 wmb();
1053 rxd->rx_ctrl = 0;
1054}
1055
1056static int
89a91f4f 1057mwl8k_rxd_sta_process(void *_rxd, struct ieee80211_rx_status *status,
0d462bbb 1058 __le16 *qos, s8 *noise)
54bc3a0d 1059{
89a91f4f 1060 struct mwl8k_rxd_sta *rxd = _rxd;
54bc3a0d
LB		 1061 u16 rate_info;
1062
89a91f4f 1063 if (!(rxd->rx_ctrl & MWL8K_STA_RX_CTRL_OWNED_BY_HOST))
54bc3a0d
LB		 1064 return -1;
1065 rmb();
1066
1067 rate_info = le16_to_cpu(rxd->rate_info);
1068
1069 memset(status, 0, sizeof(*status));
1070
1071 status->signal = -rxd->rssi;
0d462bbb 1072 *noise = -rxd->noise_level;
89a91f4f
LB		 1073 status->antenna = MWL8K_STA_RATE_INFO_ANTSELECT(rate_info);
1074 status->rate_idx = MWL8K_STA_RATE_INFO_RATEID(rate_info);
54bc3a0d 1075
89a91f4f 1076 if (rate_info & MWL8K_STA_RATE_INFO_SHORTPRE)
54bc3a0d 1077 status->flag |= RX_FLAG_SHORTPRE;
89a91f4f 1078 if (rate_info & MWL8K_STA_RATE_INFO_40MHZ)
54bc3a0d 1079 status->flag |= RX_FLAG_40MHZ;
89a91f4f 1080 if (rate_info & MWL8K_STA_RATE_INFO_SHORTGI)
54bc3a0d 1081 status->flag |= RX_FLAG_SHORT_GI;
89a91f4f 1082 if (rate_info & MWL8K_STA_RATE_INFO_MCS_FORMAT)
54bc3a0d
LB		 1083 status->flag |= RX_FLAG_HT;
1084
85478344
LB		 1085 if (rxd->channel > 14) {
1086 status->band = IEEE80211_BAND_5GHZ;
1087 if (!(status->flag & RX_FLAG_HT))
1088 status->rate_idx -= 5;
1089 } else {
1090 status->band = IEEE80211_BAND_2GHZ;
1091 }
59eb21a6
BR		 1092 status->freq = ieee80211_channel_to_frequency(rxd->channel,
1093 status->band);
54bc3a0d 1094
20f09c3d 1095 *qos = rxd->qos_control;
d9a07d49
NS		 1096 if ((rxd->rx_ctrl & MWL8K_STA_RX_CTRL_DECRYPT_ERROR) &&
1097 (rxd->rx_ctrl & MWL8K_STA_RX_CTRL_DEC_ERR_TYPE))
1098 status->flag |= RX_FLAG_MMIC_ERROR;
20f09c3d 1099
54bc3a0d
LB		 1100 return le16_to_cpu(rxd->pkt_len);
1101}
1102
89a91f4f
LB		 1103static struct rxd_ops rxd_sta_ops = {
1104 .rxd_size = sizeof(struct mwl8k_rxd_sta),
1105 .rxd_init = mwl8k_rxd_sta_init,
1106 .rxd_refill = mwl8k_rxd_sta_refill,
1107 .rxd_process = mwl8k_rxd_sta_process,
54bc3a0d
LB		 1108};
1109
1110
a66098da
LB		 1111#define MWL8K_RX_DESCS 256
1112#define MWL8K_RX_MAXSZ 3800
1113
1114static int mwl8k_rxq_init(struct ieee80211_hw *hw, int index)
1115{
1116 struct mwl8k_priv *priv = hw->priv;
1117 struct mwl8k_rx_queue *rxq = priv->rxq + index;
1118 int size;
1119 int i;
1120
45eb400d
LB		 1121 rxq->rxd_count = 0;
1122 rxq->head = 0;
1123 rxq->tail = 0;
a66098da 1124
54bc3a0d 1125 size = MWL8K_RX_DESCS * priv->rxd_ops->rxd_size;
a66098da 1126
45eb400d
LB		 1127 rxq->rxd = pci_alloc_consistent(priv->pdev, size, &rxq->rxd_dma);
1128 if (rxq->rxd == NULL) {
5db55844 1129 wiphy_err(hw->wiphy, "failed to alloc RX descriptors\n");
a66098da
LB		 1130 return -ENOMEM;
1131 }
45eb400d 1132 memset(rxq->rxd, 0, size);
a66098da 1133
b9ede5f1 1134 rxq->buf = kcalloc(MWL8K_RX_DESCS, sizeof(*rxq->buf), GFP_KERNEL);
788838eb 1135 if (rxq->buf == NULL) {
5db55844 1136 wiphy_err(hw->wiphy, "failed to alloc RX skbuff list\n");
45eb400d 1137 pci_free_consistent(priv->pdev, size, rxq->rxd, rxq->rxd_dma);
a66098da
LB		 1138 return -ENOMEM;
1139 }
a66098da
LB		 1140
1141 for (i = 0; i < MWL8K_RX_DESCS; i++) {
54bc3a0d
LB		 1142 int desc_size;
1143 void *rxd;
a66098da 1144 int nexti;
54bc3a0d
LB		 1145 dma_addr_t next_dma_addr;
1146
1147 desc_size = priv->rxd_ops->rxd_size;
1148 rxd = rxq->rxd + (i * priv->rxd_ops->rxd_size);
a66098da 1149
54bc3a0d
LB		 1150 nexti = i + 1;
1151 if (nexti == MWL8K_RX_DESCS)
1152 nexti = 0;
1153 next_dma_addr = rxq->rxd_dma + (nexti * desc_size);
a66098da 1154
54bc3a0d 1155 priv->rxd_ops->rxd_init(rxd, next_dma_addr);
a66098da
LB		 1156 }
1157
1158 return 0;
1159}
1160
1161static int rxq_refill(struct ieee80211_hw *hw, int index, int limit)
1162{
1163 struct mwl8k_priv *priv = hw->priv;
1164 struct mwl8k_rx_queue *rxq = priv->rxq + index;
1165 int refilled;
1166
1167 refilled = 0;
45eb400d 1168 while (rxq->rxd_count < MWL8K_RX_DESCS && limit--) {
a66098da 1169 struct sk_buff *skb;
788838eb 1170 dma_addr_t addr;
a66098da 1171 int rx;
54bc3a0d 1172 void *rxd;
a66098da
LB		 1173
1174 skb = dev_alloc_skb(MWL8K_RX_MAXSZ);
1175 if (skb == NULL)
1176 break;
1177
788838eb
LB		 1178 addr = pci_map_single(priv->pdev, skb->data,
1179 MWL8K_RX_MAXSZ, DMA_FROM_DEVICE);
a66098da 1180
54bc3a0d
LB		 1181 rxq->rxd_count++;
1182 rx = rxq->tail++;
1183 if (rxq->tail == MWL8K_RX_DESCS)
1184 rxq->tail = 0;
788838eb 1185 rxq->buf[rx].skb = skb;
53b1b3e1 1186 dma_unmap_addr_set(&rxq->buf[rx], dma, addr);
54bc3a0d
LB		 1187
1188 rxd = rxq->rxd + (rx * priv->rxd_ops->rxd_size);
1189 priv->rxd_ops->rxd_refill(rxd, addr, MWL8K_RX_MAXSZ);
a66098da
LB		 1190
1191 refilled++;
1192 }
1193
1194 return refilled;
1195}
1196
1197/* Must be called only when the card's reception is completely halted */
1198static void mwl8k_rxq_deinit(struct ieee80211_hw *hw, int index)
1199{
1200 struct mwl8k_priv *priv = hw->priv;
1201 struct mwl8k_rx_queue *rxq = priv->rxq + index;
1202 int i;
1203
73b46320
BC		 1204 if (rxq->rxd == NULL)
1205 return;
1206
a66098da 1207 for (i = 0; i < MWL8K_RX_DESCS; i++) {
788838eb
LB		 1208 if (rxq->buf[i].skb != NULL) {
1209 pci_unmap_single(priv->pdev,
53b1b3e1 1210 dma_unmap_addr(&rxq->buf[i], dma),
788838eb 1211 MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
53b1b3e1 1212 dma_unmap_addr_set(&rxq->buf[i], dma, 0);
788838eb
LB		 1213
1214 kfree_skb(rxq->buf[i].skb);
1215 rxq->buf[i].skb = NULL;
a66098da
LB		 1216 }
1217 }
1218
788838eb
LB		 1219 kfree(rxq->buf);
1220 rxq->buf = NULL;
a66098da
LB		 1221
1222 pci_free_consistent(priv->pdev,
54bc3a0d 1223 MWL8K_RX_DESCS * priv->rxd_ops->rxd_size,
45eb400d
LB		 1224 rxq->rxd, rxq->rxd_dma);
1225 rxq->rxd = NULL;
a66098da
LB		 1226}
1227
1228
1229/*
1230 * Scan a list of BSSIDs to process for finalize join.
1231 * Allows for extension to process multiple BSSIDs.
1232 */
1233static inline int
1234mwl8k_capture_bssid(struct mwl8k_priv *priv, struct ieee80211_hdr *wh)
1235{
1236 return priv->capture_beacon &&
1237 ieee80211_is_beacon(wh->frame_control) &&
2e42e474 1238 ether_addr_equal(wh->addr3, priv->capture_bssid);
a66098da
LB		 1239}
1240
3779752d
LB		 1241static inline void mwl8k_save_beacon(struct ieee80211_hw *hw,
1242 struct sk_buff *skb)
a66098da 1243{
3779752d
LB		 1244 struct mwl8k_priv *priv = hw->priv;
1245
a66098da 1246 priv->capture_beacon = false;
d89173f2 1247 memset(priv->capture_bssid, 0, ETH_ALEN);
a66098da
LB		 1248
1249 /*
1250 * Use GFP_ATOMIC as rxq_process is called from
1251 * the primary interrupt handler, memory allocation call
1252 * must not sleep.
1253 */
1254 priv->beacon_skb = skb_copy(skb, GFP_ATOMIC);
1255 if (priv->beacon_skb != NULL)
3779752d 1256 ieee80211_queue_work(hw, &priv->finalize_join_worker);
a66098da
LB		 1257}
1258
d9a07d49
NS		 1259static inline struct mwl8k_vif *mwl8k_find_vif_bss(struct list_head *vif_list,
1260 u8 *bssid)
1261{
1262 struct mwl8k_vif *mwl8k_vif;
1263
1264 list_for_each_entry(mwl8k_vif,
1265 vif_list, list) {
1266 if (memcmp(bssid, mwl8k_vif->bssid,
1267 ETH_ALEN) == 0)
1268 return mwl8k_vif;
1269 }
1270
1271 return NULL;
1272}
1273
a66098da
LB		 1274static int rxq_process(struct ieee80211_hw *hw, int index, int limit)
1275{
1276 struct mwl8k_priv *priv = hw->priv;
d9a07d49 1277 struct mwl8k_vif *mwl8k_vif = NULL;
a66098da
LB		 1278 struct mwl8k_rx_queue *rxq = priv->rxq + index;
1279 int processed;
1280
1281 processed = 0;
45eb400d 1282 while (rxq->rxd_count && limit--) {
a66098da 1283 struct sk_buff *skb;
54bc3a0d
LB		 1284 void *rxd;
1285 int pkt_len;
a66098da 1286 struct ieee80211_rx_status status;
d9a07d49 1287 struct ieee80211_hdr *wh;
20f09c3d 1288 __le16 qos;
a66098da 1289
788838eb 1290 skb = rxq->buf[rxq->head].skb;
d25f9f13
LB		 1291 if (skb == NULL)
1292 break;
54bc3a0d
LB		 1293
1294 rxd = rxq->rxd + (rxq->head * priv->rxd_ops->rxd_size);
1295
0d462bbb
JL		 1296 pkt_len = priv->rxd_ops->rxd_process(rxd, &status, &qos,
1297 &priv->noise);
54bc3a0d
LB		 1298 if (pkt_len < 0)
1299 break;
1300
788838eb
LB		 1301 rxq->buf[rxq->head].skb = NULL;
1302
1303 pci_unmap_single(priv->pdev,
53b1b3e1 1304 dma_unmap_addr(&rxq->buf[rxq->head], dma),
788838eb 1305 MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
53b1b3e1 1306 dma_unmap_addr_set(&rxq->buf[rxq->head], dma, 0);
a66098da 1307
54bc3a0d
LB		 1308 rxq->head++;
1309 if (rxq->head == MWL8K_RX_DESCS)
1310 rxq->head = 0;
1311
45eb400d 1312 rxq->rxd_count--;
a66098da 1313
d9a07d49 1314 wh = &((struct mwl8k_dma_data *)skb->data)->wh;
a66098da 1315
a66098da 1316 /*
c2c357ce
LB		 1317 * Check for a pending join operation. Save a
1318 * copy of the beacon and schedule a tasklet to
1319 * send a FINALIZE_JOIN command to the firmware.
a66098da 1320 */
54bc3a0d 1321 if (mwl8k_capture_bssid(priv, (void *)skb->data))
3779752d 1322 mwl8k_save_beacon(hw, skb);
a66098da 1323
d9a07d49
NS		 1324 if (ieee80211_has_protected(wh->frame_control)) {
1325
1326 /* Check if hw crypto has been enabled for
1327 * this bss. If yes, set the status flags
1328 * accordingly
1329 */
1330 mwl8k_vif = mwl8k_find_vif_bss(&priv->vif_list,
1331 wh->addr1);
1332
1333 if (mwl8k_vif != NULL &&
23677ce3 1334 mwl8k_vif->is_hw_crypto_enabled) {
d9a07d49
NS		 1335 /*
1336 * When MMIC ERROR is encountered
1337 * by the firmware, payload is
1338 * dropped and only 32 bytes of
1339 * mwl8k Firmware header is sent
1340 * to the host.
1341 *
1342 * We need to add four bytes of
1343 * key information. In it
1344 * MAC80211 expects keyidx set to
1345 * 0 for triggering Counter
1346 * Measure of MMIC failure.
1347 */
1348 if (status.flag & RX_FLAG_MMIC_ERROR) {
1349 struct mwl8k_dma_data *tr;
1350 tr = (struct mwl8k_dma_data *)skb->data;
1351 memset((void *)&(tr->data), 0, 4);
1352 pkt_len += 4;
1353 }
1354
1355 if (!ieee80211_is_auth(wh->frame_control))
1356 status.flag |= RX_FLAG_IV_STRIPPED |
1357 RX_FLAG_DECRYPTED |
1358 RX_FLAG_MMIC_STRIPPED;
1359 }
1360 }
1361
1362 skb_put(skb, pkt_len);
1363 mwl8k_remove_dma_header(skb, qos);
f1d58c25
JB		 1364 memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status));
1365 ieee80211_rx_irqsafe(hw, skb);
a66098da
LB		 1366
1367 processed++;
1368 }
1369
1370 return processed;
1371}
1372
1373
1374/*
1375 * Packet transmission.
1376 */
1377
a66098da
LB		 1378#define MWL8K_TXD_STATUS_OK 0x00000001
1379#define MWL8K_TXD_STATUS_OK_RETRY 0x00000002
1380#define MWL8K_TXD_STATUS_OK_MORE_RETRY 0x00000004
1381#define MWL8K_TXD_STATUS_MULTICAST_TX 0x00000008
a66098da 1382#define MWL8K_TXD_STATUS_FW_OWNED 0x80000000
a66098da 1383
e0493a8d
LB		 1384#define MWL8K_QOS_QLEN_UNSPEC 0xff00
1385#define MWL8K_QOS_ACK_POLICY_MASK 0x0060
1386#define MWL8K_QOS_ACK_POLICY_NORMAL 0x0000
1387#define MWL8K_QOS_ACK_POLICY_BLOCKACK 0x0060
1388#define MWL8K_QOS_EOSP 0x0010
1389
a66098da
LB		 1390struct mwl8k_tx_desc {
1391 __le32 status;
1392 __u8 data_rate;
1393 __u8 tx_priority;
1394 __le16 qos_control;
1395 __le32 pkt_phys_addr;
1396 __le16 pkt_len;
d89173f2 1397 __u8 dest_MAC_addr[ETH_ALEN];
45eb400d 1398 __le32 next_txd_phys_addr;
8a7a578c 1399 __le32 timestamp;
a66098da
LB		 1400 __le16 rate_info;
1401 __u8 peer_id;
a1fe24b0 1402 __u8 tx_frag_cnt;
ba2d3587 1403} __packed;
a66098da
LB		 1404
1405#define MWL8K_TX_DESCS 128
1406
1407static int mwl8k_txq_init(struct ieee80211_hw *hw, int index)
1408{
1409 struct mwl8k_priv *priv = hw->priv;
1410 struct mwl8k_tx_queue *txq = priv->txq + index;
1411 int size;
1412 int i;
1413
8ccbc3b8 1414 txq->len = 0;
45eb400d
LB		 1415 txq->head = 0;
1416 txq->tail = 0;
a66098da
LB		 1417
1418 size = MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc);
1419
45eb400d
LB		 1420 txq->txd = pci_alloc_consistent(priv->pdev, size, &txq->txd_dma);
1421 if (txq->txd == NULL) {
5db55844 1422 wiphy_err(hw->wiphy, "failed to alloc TX descriptors\n");
a66098da
LB		 1423 return -ENOMEM;
1424 }
45eb400d 1425 memset(txq->txd, 0, size);
a66098da 1426
b9ede5f1 1427 txq->skb = kcalloc(MWL8K_TX_DESCS, sizeof(*txq->skb), GFP_KERNEL);
45eb400d 1428 if (txq->skb == NULL) {
5db55844 1429 wiphy_err(hw->wiphy, "failed to alloc TX skbuff list\n");
45eb400d 1430 pci_free_consistent(priv->pdev, size, txq->txd, txq->txd_dma);
a66098da
LB		 1431 return -ENOMEM;
1432 }
a66098da
LB		 1433
1434 for (i = 0; i < MWL8K_TX_DESCS; i++) {
1435 struct mwl8k_tx_desc *tx_desc;
1436 int nexti;
1437
45eb400d 1438 tx_desc = txq->txd + i;
a66098da
LB		 1439 nexti = (i + 1) % MWL8K_TX_DESCS;
1440
1441 tx_desc->status = 0;
45eb400d
LB		 1442 tx_desc->next_txd_phys_addr =
1443 cpu_to_le32(txq->txd_dma + nexti * sizeof(*tx_desc));
a66098da
LB		 1444 }
1445
1446 return 0;
1447}
1448
1449static inline void mwl8k_tx_start(struct mwl8k_priv *priv)
1450{
1451 iowrite32(MWL8K_H2A_INT_PPA_READY,
1452 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1453 iowrite32(MWL8K_H2A_INT_DUMMY,
1454 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1455 ioread32(priv->regs + MWL8K_HIU_INT_CODE);
1456}
1457
7e1112d3 1458static void mwl8k_dump_tx_rings(struct ieee80211_hw *hw)
a66098da 1459{
7e1112d3
LB		 1460 struct mwl8k_priv *priv = hw->priv;
1461 int i;
1462
e600707b 1463 for (i = 0; i < mwl8k_tx_queues(priv); i++) {
7e1112d3
LB		 1464 struct mwl8k_tx_queue *txq = priv->txq + i;
1465 int fw_owned = 0;
1466 int drv_owned = 0;
1467 int unused = 0;
1468 int desc;
1469
a66098da 1470 for (desc = 0; desc < MWL8K_TX_DESCS; desc++) {
7e1112d3
LB		 1471 struct mwl8k_tx_desc *tx_desc = txq->txd + desc;
1472 u32 status;
a66098da 1473
7e1112d3 1474 status = le32_to_cpu(tx_desc->status);
a66098da 1475 if (status & MWL8K_TXD_STATUS_FW_OWNED)
7e1112d3 1476 fw_owned++;
a66098da 1477 else
7e1112d3 1478 drv_owned++;
a66098da
LB		 1479
1480 if (tx_desc->pkt_len == 0)
7e1112d3 1481 unused++;
a66098da 1482 }
a66098da 1483
c96c31e4
JP		 1484 wiphy_err(hw->wiphy,
1485 "txq[%d] len=%d head=%d tail=%d "
1486 "fw_owned=%d drv_owned=%d unused=%d\n",
1487 i,
1488 txq->len, txq->head, txq->tail,
1489 fw_owned, drv_owned, unused);
7e1112d3 1490 }
a66098da
LB		 1491}
1492
618952a7 1493/*
88de754a 1494 * Must be called with priv->fw_mutex held and tx queues stopped.
618952a7 1495 */
62abd3cf 1496#define MWL8K_TX_WAIT_TIMEOUT_MS 5000
7e1112d3 1497
950d5b01 1498static int mwl8k_tx_wait_empty(struct ieee80211_hw *hw)
a66098da 1499{
a66098da 1500 struct mwl8k_priv *priv = hw->priv;
88de754a 1501 DECLARE_COMPLETION_ONSTACK(tx_wait);
7e1112d3
LB		 1502 int retry;
1503 int rc;
a66098da
LB		 1504
1505 might_sleep();
1506
6b6accc3
YAP		 1507 /* Since fw restart is in progress, allow only the firmware
1508 * commands from the restart code and block the other
1509 * commands since they are going to fail in any case since
1510 * the firmware has crashed
1511 */
1512 if (priv->hw_restart_in_progress) {
1513 if (priv->hw_restart_owner == current)
1514 return 0;
1515 else
1516 return -EBUSY;
1517 }
1518
7e1112d3
LB		 1519 /*
1520 * The TX queues are stopped at this point, so this test
1521 * doesn't need to take ->tx_lock.
1522 */
1523 if (!priv->pending_tx_pkts)
1524 return 0;
1525
1526 retry = 0;
1527 rc = 0;
1528
a66098da 1529 spin_lock_bh(&priv->tx_lock);
7e1112d3
LB		 1530 priv->tx_wait = &tx_wait;
1531 while (!rc) {
1532 int oldcount;
1533 unsigned long timeout;
a66098da 1534
7e1112d3 1535 oldcount = priv->pending_tx_pkts;
a66098da 1536
7e1112d3 1537 spin_unlock_bh(&priv->tx_lock);
88de754a 1538 timeout = wait_for_completion_timeout(&tx_wait,
7e1112d3 1539 msecs_to_jiffies(MWL8K_TX_WAIT_TIMEOUT_MS));
a66098da 1540 spin_lock_bh(&priv->tx_lock);
7e1112d3
LB		 1541
1542 if (timeout) {
1543 WARN_ON(priv->pending_tx_pkts);
ba30c4a5 1544 if (retry)
c96c31e4 1545 wiphy_notice(hw->wiphy, "tx rings drained\n");
7e1112d3
LB		 1546 break;
1547 }
1548
1549 if (priv->pending_tx_pkts < oldcount) {
c96c31e4
JP		 1550 wiphy_notice(hw->wiphy,
1551 "waiting for tx rings to drain (%d -> %d pkts)\n",
1552 oldcount, priv->pending_tx_pkts);
7e1112d3
LB		 1553 retry = 1;
1554 continue;
1555 }
1556
a66098da 1557 priv->tx_wait = NULL;
a66098da 1558
c96c31e4
JP		 1559 wiphy_err(hw->wiphy, "tx rings stuck for %d ms\n",
1560 MWL8K_TX_WAIT_TIMEOUT_MS);
7e1112d3 1561 mwl8k_dump_tx_rings(hw);
6b6accc3
YAP		 1562 priv->hw_restart_in_progress = true;
1563 ieee80211_queue_work(hw, &priv->fw_reload);
7e1112d3
LB		 1564
1565 rc = -ETIMEDOUT;
a66098da 1566 }
7e1112d3 1567 spin_unlock_bh(&priv->tx_lock);
a66098da 1568
7e1112d3 1569 return rc;
a66098da
LB		 1570}
1571
c23b5a69
LB		 1572#define MWL8K_TXD_SUCCESS(status) \
1573 ((status) & (MWL8K_TXD_STATUS_OK | \
1574 MWL8K_TXD_STATUS_OK_RETRY | \
1575 MWL8K_TXD_STATUS_OK_MORE_RETRY))
a66098da 1576
a0e7c6cf
NS		 1577static int mwl8k_tid_queue_mapping(u8 tid)
1578{
1579 BUG_ON(tid > 7);
1580
1581 switch (tid) {
1582 case 0:
1583 case 3:
1584 return IEEE80211_AC_BE;
1585 break;
1586 case 1:
1587 case 2:
1588 return IEEE80211_AC_BK;
1589 break;
1590 case 4:
1591 case 5:
1592 return IEEE80211_AC_VI;
1593 break;
1594 case 6:
1595 case 7:
1596 return IEEE80211_AC_VO;
1597 break;
1598 default:
1599 return -1;
1600 break;
1601 }
1602}
1603
17033543
NS		 1604/* The firmware will fill in the rate information
1605 * for each packet that gets queued in the hardware
49adc5ce 1606 * and these macros will interpret that info.
17033543
NS		 1607 */
1608
49adc5ce
JL		 1609#define RI_FORMAT(a) (a & 0x0001)
1610#define RI_RATE_ID_MCS(a) ((a & 0x01f8) >> 3)
17033543 1611
efb7c49a
LB		 1612static int
1613mwl8k_txq_reclaim(struct ieee80211_hw *hw, int index, int limit, int force)
a66098da
LB		 1614{
1615 struct mwl8k_priv *priv = hw->priv;
1616 struct mwl8k_tx_queue *txq = priv->txq + index;
efb7c49a 1617 int processed;
a66098da 1618
efb7c49a 1619 processed = 0;
8ccbc3b8 1620 while (txq->len > 0 && limit--) {
a66098da 1621 int tx;
a66098da
LB		 1622 struct mwl8k_tx_desc *tx_desc;
1623 unsigned long addr;
ce9e2e1b 1624 int size;
a66098da
LB		 1625 struct sk_buff *skb;
1626 struct ieee80211_tx_info *info;
1627 u32 status;
17033543
NS		 1628 struct ieee80211_sta *sta;
1629 struct mwl8k_sta *sta_info = NULL;
1630 u16 rate_info;
17033543 1631 struct ieee80211_hdr *wh;
a66098da 1632
45eb400d
LB		 1633 tx = txq->head;
1634 tx_desc = txq->txd + tx;
a66098da
LB		 1635
1636 status = le32_to_cpu(tx_desc->status);
1637
1638 if (status & MWL8K_TXD_STATUS_FW_OWNED) {
1639 if (!force)
1640 break;
1641 tx_desc->status &=
1642 ~cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED);
1643 }
1644
45eb400d 1645 txq->head = (tx + 1) % MWL8K_TX_DESCS;
8ccbc3b8
KV		 1646 BUG_ON(txq->len == 0);
1647 txq->len--;
a66098da
LB		 1648 priv->pending_tx_pkts--;
1649
1650 addr = le32_to_cpu(tx_desc->pkt_phys_addr);
ce9e2e1b 1651 size = le16_to_cpu(tx_desc->pkt_len);
45eb400d
LB		 1652 skb = txq->skb[tx];
1653 txq->skb[tx] = NULL;
a66098da
LB		 1654
1655 BUG_ON(skb == NULL);
1656 pci_unmap_single(priv->pdev, addr, size, PCI_DMA_TODEVICE);
1657
20f09c3d 1658 mwl8k_remove_dma_header(skb, tx_desc->qos_control);
a66098da 1659
17033543
NS		 1660 wh = (struct ieee80211_hdr *) skb->data;
1661
a66098da
LB		 1662 /* Mark descriptor as unused */
1663 tx_desc->pkt_phys_addr = 0;
1664 tx_desc->pkt_len = 0;
1665
a66098da 1666 info = IEEE80211_SKB_CB(skb);
17033543 1667 if (ieee80211_is_data(wh->frame_control)) {
89e11801
TH		 1668 rcu_read_lock();
1669 sta = ieee80211_find_sta_by_ifaddr(hw, wh->addr1,
1670 wh->addr2);
17033543
NS		 1671 if (sta) {
1672 sta_info = MWL8K_STA(sta);
1673 BUG_ON(sta_info == NULL);
1674 rate_info = le16_to_cpu(tx_desc->rate_info);
17033543
NS		 1675 /* If rate is < 6.5 Mpbs for an ht station
1676 * do not form an ampdu. If the station is a
1677 * legacy station (format = 0), do not form an
1678 * ampdu
1679 */
49adc5ce
JL		 1680 if (RI_RATE_ID_MCS(rate_info) < 1 ||
1681 RI_FORMAT(rate_info) == 0) {
17033543
NS		 1682 sta_info->is_ampdu_allowed = false;
1683 } else {
1684 sta_info->is_ampdu_allowed = true;
1685 }
1686 }
89e11801 1687 rcu_read_unlock();
17033543
NS		 1688 }
1689
a66098da 1690 ieee80211_tx_info_clear_status(info);
0bf22c37
NS		 1691
1692 /* Rate control is happening in the firmware.
1693 * Ensure no tx rate is being reported.
1694 */
ba30c4a5
YAP		 1695 info->status.rates[0].idx = -1;
1696 info->status.rates[0].count = 1;
0bf22c37 1697
ce9e2e1b 1698 if (MWL8K_TXD_SUCCESS(status))
a66098da 1699 info->flags |= IEEE80211_TX_STAT_ACK;
a66098da
LB		 1700
1701 ieee80211_tx_status_irqsafe(hw, skb);
1702
efb7c49a 1703 processed++;
a66098da
LB		 1704 }
1705
efb7c49a 1706 return processed;
a66098da
LB		 1707}
1708
1709/* must be called only when the card's transmit is completely halted */
1710static void mwl8k_txq_deinit(struct ieee80211_hw *hw, int index)
1711{
1712 struct mwl8k_priv *priv = hw->priv;
1713 struct mwl8k_tx_queue *txq = priv->txq + index;
1714
73b46320
BC		 1715 if (txq->txd == NULL)
1716 return;
1717
efb7c49a 1718 mwl8k_txq_reclaim(hw, index, INT_MAX, 1);
a66098da 1719
45eb400d
LB		 1720 kfree(txq->skb);
1721 txq->skb = NULL;
a66098da
LB		 1722
1723 pci_free_consistent(priv->pdev,
1724 MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc),
45eb400d
LB		 1725 txq->txd, txq->txd_dma);
1726 txq->txd = NULL;
a66098da
LB		 1727}
1728
ac109fd0 1729/* caller must hold priv->stream_lock when calling the stream functions */
ba30c4a5 1730static struct mwl8k_ampdu_stream *
ac109fd0
BC		 1731mwl8k_add_stream(struct ieee80211_hw *hw, struct ieee80211_sta *sta, u8 tid)
1732{
1733 struct mwl8k_ampdu_stream *stream;
1734 struct mwl8k_priv *priv = hw->priv;
1735 int i;
1736
1737 for (i = 0; i < priv->num_ampdu_queues; i++) {
1738 stream = &priv->ampdu[i];
1739 if (stream->state == AMPDU_NO_STREAM) {
1740 stream->sta = sta;
1741 stream->state = AMPDU_STREAM_NEW;
1742 stream->tid = tid;
1743 stream->idx = i;
1744 stream->txq_idx = MWL8K_TX_WMM_QUEUES + i;
1745 wiphy_debug(hw->wiphy, "Added a new stream for %pM %d",
1746 sta->addr, tid);
1747 return stream;
1748 }
1749 }
1750 return NULL;
1751}
1752
1753static int
1754mwl8k_start_stream(struct ieee80211_hw *hw, struct mwl8k_ampdu_stream *stream)
1755{
1756 int ret;
1757
1758 /* if the stream has already been started, don't start it again */
1759 if (stream->state != AMPDU_STREAM_NEW)
1760 return 0;
1761 ret = ieee80211_start_tx_ba_session(stream->sta, stream->tid, 0);
1762 if (ret)
1763 wiphy_debug(hw->wiphy, "Failed to start stream for %pM %d: "
1764 "%d\n", stream->sta->addr, stream->tid, ret);
1765 else
1766 wiphy_debug(hw->wiphy, "Started stream for %pM %d\n",
1767 stream->sta->addr, stream->tid);
1768 return ret;
1769}
1770
1771static void
1772mwl8k_remove_stream(struct ieee80211_hw *hw, struct mwl8k_ampdu_stream *stream)
1773{
1774 wiphy_debug(hw->wiphy, "Remove stream for %pM %d\n", stream->sta->addr,
1775 stream->tid);
1776 memset(stream, 0, sizeof(*stream));
1777}
1778
1779static struct mwl8k_ampdu_stream *
1780mwl8k_lookup_stream(struct ieee80211_hw *hw, u8 *addr, u8 tid)
1781{
1782 struct mwl8k_priv *priv = hw->priv;
1783 int i;
1784
1785 for (i = 0 ; i < priv->num_ampdu_queues; i++) {
1786 struct mwl8k_ampdu_stream *stream;
1787 stream = &priv->ampdu[i];
1788 if (stream->state == AMPDU_NO_STREAM)
1789 continue;
1790 if (!memcmp(stream->sta->addr, addr, ETH_ALEN) &&
1791 stream->tid == tid)
1792 return stream;
1793 }
1794 return NULL;
1795}
1796
d0805c1c
BC		 1797#define MWL8K_AMPDU_PACKET_THRESHOLD 64
1798static inline bool mwl8k_ampdu_allowed(struct ieee80211_sta *sta, u8 tid)
1799{
1800 struct mwl8k_sta *sta_info = MWL8K_STA(sta);
1801 struct tx_traffic_info *tx_stats;
1802
1803 BUG_ON(tid >= MWL8K_MAX_TID);
1804 tx_stats = &sta_info->tx_stats[tid];
1805
1806 return sta_info->is_ampdu_allowed &&
1807 tx_stats->pkts > MWL8K_AMPDU_PACKET_THRESHOLD;
1808}
1809
1810static inline void mwl8k_tx_count_packet(struct ieee80211_sta *sta, u8 tid)
1811{
1812 struct mwl8k_sta *sta_info = MWL8K_STA(sta);
1813 struct tx_traffic_info *tx_stats;
1814
1815 BUG_ON(tid >= MWL8K_MAX_TID);
1816 tx_stats = &sta_info->tx_stats[tid];
1817
1818 if (tx_stats->start_time == 0)
1819 tx_stats->start_time = jiffies;
1820
1821 /* reset the packet count after each second elapses. If the number of
1822 * packets ever exceeds the ampdu_min_traffic threshold, we will allow
1823 * an ampdu stream to be started.
1824 */
1825 if (jiffies - tx_stats->start_time > HZ) {
1826 tx_stats->pkts = 0;
1827 tx_stats->start_time = 0;
1828 } else
1829 tx_stats->pkts++;
1830}
1831
7bb45683 1832static void
36323f81
TH		 1833mwl8k_txq_xmit(struct ieee80211_hw *hw,
1834 int index,
1835 struct ieee80211_sta *sta,
1836 struct sk_buff *skb)
a66098da
LB		 1837{
1838 struct mwl8k_priv *priv = hw->priv;
1839 struct ieee80211_tx_info *tx_info;
23b33906 1840 struct mwl8k_vif *mwl8k_vif;
a66098da
LB		 1841 struct ieee80211_hdr *wh;
1842 struct mwl8k_tx_queue *txq;
1843 struct mwl8k_tx_desc *tx;
a66098da 1844 dma_addr_t dma;
23b33906
LB		 1845 u32 txstatus;
1846 u8 txdatarate;
1847 u16 qos;
65f3ddcd
NS		 1848 int txpriority;
1849 u8 tid = 0;
1850 struct mwl8k_ampdu_stream *stream = NULL;
1851 bool start_ba_session = false;
3a769888 1852 bool mgmtframe = false;
a0e7c6cf 1853 struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)skb->data;
e1f4d69b 1854 bool eapol_frame = false;
a66098da 1855
23b33906
LB		 1856 wh = (struct ieee80211_hdr *)skb->data;
1857 if (ieee80211_is_data_qos(wh->frame_control))
1858 qos = le16_to_cpu(*((__le16 *)ieee80211_get_qos_ctl(wh)));
1859 else
1860 qos = 0;
a66098da 1861
e1f4d69b
NS		 1862 if (skb->protocol == cpu_to_be16(ETH_P_PAE))
1863 eapol_frame = true;
1864
3a769888
NS		 1865 if (ieee80211_is_mgmt(wh->frame_control))
1866 mgmtframe = true;
1867
d9a07d49 1868 if (priv->ap_fw)
ff776cec 1869 mwl8k_encapsulate_tx_frame(priv, skb);
d9a07d49 1870 else
e4eefec7 1871 mwl8k_add_dma_header(priv, skb, 0, 0);
d9a07d49 1872
23b33906 1873 wh = &((struct mwl8k_dma_data *)skb->data)->wh;
a66098da
LB		 1874
1875 tx_info = IEEE80211_SKB_CB(skb);
1876 mwl8k_vif = MWL8K_VIF(tx_info->control.vif);
a66098da
LB		 1877
1878 if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
a66098da 1879 wh->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
657232b6
LB		 1880 wh->seq_ctrl |= cpu_to_le16(mwl8k_vif->seqno);
1881 mwl8k_vif->seqno += 0x10;
a66098da
LB		 1882 }
1883
23b33906
LB		 1884 /* Setup firmware control bit fields for each frame type. */
1885 txstatus = 0;
1886 txdatarate = 0;
1887 if (ieee80211_is_mgmt(wh->frame_control) ||
1888 ieee80211_is_ctl(wh->frame_control)) {
1889 txdatarate = 0;
e0493a8d 1890 qos |= MWL8K_QOS_QLEN_UNSPEC | MWL8K_QOS_EOSP;
23b33906
LB		 1891 } else if (ieee80211_is_data(wh->frame_control)) {
1892 txdatarate = 1;
1893 if (is_multicast_ether_addr(wh->addr1))
1894 txstatus |= MWL8K_TXD_STATUS_MULTICAST_TX;
1895
e0493a8d 1896 qos &= ~MWL8K_QOS_ACK_POLICY_MASK;
23b33906 1897 if (tx_info->flags & IEEE80211_TX_CTL_AMPDU)
e0493a8d 1898 qos |= MWL8K_QOS_ACK_POLICY_BLOCKACK;
23b33906 1899 else
e0493a8d 1900 qos |= MWL8K_QOS_ACK_POLICY_NORMAL;
23b33906 1901 }
a66098da 1902
a0e7c6cf
NS		 1903 /* Queue ADDBA request in the respective data queue. While setting up
1904 * the ampdu stream, mac80211 queues further packets for that
1905 * particular ra/tid pair. However, packets piled up in the hardware
1906 * for that ra/tid pair will still go out. ADDBA request and the
1907 * related data packets going out from different queues asynchronously
1908 * will cause a shift in the receiver window which might result in
1909 * ampdu packets getting dropped at the receiver after the stream has
1910 * been setup.
1911 */
1912 if (unlikely(ieee80211_is_action(wh->frame_control) &&
1913 mgmt->u.action.category == WLAN_CATEGORY_BACK &&
1914 mgmt->u.action.u.addba_req.action_code == WLAN_ACTION_ADDBA_REQ &&
1915 priv->ap_fw)) {
1916 u16 capab = le16_to_cpu(mgmt->u.action.u.addba_req.capab);
1917 tid = (capab & IEEE80211_ADDBA_PARAM_TID_MASK) >> 2;
1918 index = mwl8k_tid_queue_mapping(tid);
1919 }
1920
65f3ddcd
NS		 1921 txpriority = index;
1922
e1f4d69b
NS		 1923 if (priv->ap_fw && sta && sta->ht_cap.ht_supported && !eapol_frame &&
1924 ieee80211_is_data_qos(wh->frame_control)) {
65f3ddcd 1925 tid = qos & 0xf;
d0805c1c 1926 mwl8k_tx_count_packet(sta, tid);
65f3ddcd
NS		 1927 spin_lock(&priv->stream_lock);
1928 stream = mwl8k_lookup_stream(hw, sta->addr, tid);
1929 if (stream != NULL) {
1930 if (stream->state == AMPDU_STREAM_ACTIVE) {
1931 txpriority = stream->txq_idx;
1932 index = stream->txq_idx;
1933 } else if (stream->state == AMPDU_STREAM_NEW) {
1934 /* We get here if the driver sends us packets
1935 * after we've initiated a stream, but before
1936 * our ampdu_action routine has been called
1937 * with IEEE80211_AMPDU_TX_START to get the SSN
1938 * for the ADDBA request. So this packet can
1939 * go out with no risk of sequence number
1940 * mismatch. No special handling is required.
1941 */
1942 } else {
1943 /* Drop packets that would go out after the
1944 * ADDBA request was sent but before the ADDBA
1945 * response is received. If we don't do this,
1946 * the recipient would probably receive it
1947 * after the ADDBA request with SSN 0. This
1948 * will cause the recipient's BA receive window
1949 * to shift, which would cause the subsequent
1950 * packets in the BA stream to be discarded.
1951 * mac80211 queues our packets for us in this
1952 * case, so this is really just a safety check.
1953 */
1954 wiphy_warn(hw->wiphy,
1955 "Cannot send packet while ADDBA "
1956 "dialog is underway.\n");
1957 spin_unlock(&priv->stream_lock);
1958 dev_kfree_skb(skb);
1959 return;
1960 }
1961 } else {
1962 /* Defer calling mwl8k_start_stream so that the current
1963 * skb can go out before the ADDBA request. This
1964 * prevents sequence number mismatch at the recepient
1965 * as described above.
1966 */
d0805c1c 1967 if (mwl8k_ampdu_allowed(sta, tid)) {
17033543
NS		 1968 stream = mwl8k_add_stream(hw, sta, tid);
1969 if (stream != NULL)
1970 start_ba_session = true;
1971 }
65f3ddcd
NS		 1972 }
1973 spin_unlock(&priv->stream_lock);
1974 }
1975
a66098da
LB		 1976 dma = pci_map_single(priv->pdev, skb->data,
1977 skb->len, PCI_DMA_TODEVICE);
1978
1979 if (pci_dma_mapping_error(priv->pdev, dma)) {
c96c31e4
JP		 1980 wiphy_debug(hw->wiphy,
1981 "failed to dma map skb, dropping TX frame.\n");
65f3ddcd
NS		 1982 if (start_ba_session) {
1983 spin_lock(&priv->stream_lock);
1984 mwl8k_remove_stream(hw, stream);
1985 spin_unlock(&priv->stream_lock);
1986 }
23b33906 1987 dev_kfree_skb(skb);
7bb45683 1988 return;
a66098da
LB		 1989 }
1990
23b33906 1991 spin_lock_bh(&priv->tx_lock);
a66098da 1992
23b33906 1993 txq = priv->txq + index;
a66098da 1994
3a769888
NS		 1995 /* Mgmt frames that go out frequently are probe
1996 * responses. Other mgmt frames got out relatively
1997 * infrequently. Hence reserve 2 buffers so that
1998 * other mgmt frames do not get dropped due to an
1999 * already queued probe response in one of the
2000 * reserved buffers.
2001 */
2002
2003 if (txq->len >= MWL8K_TX_DESCS - 2) {
23677ce3 2004 if (!mgmtframe || txq->len == MWL8K_TX_DESCS) {
3a769888
NS		 2005 if (start_ba_session) {
2006 spin_lock(&priv->stream_lock);
2007 mwl8k_remove_stream(hw, stream);
2008 spin_unlock(&priv->stream_lock);
2009 }
2010 spin_unlock_bh(&priv->tx_lock);
ff7aa96f
NS		 2011 pci_unmap_single(priv->pdev, dma, skb->len,
2012 PCI_DMA_TODEVICE);
3a769888
NS		 2013 dev_kfree_skb(skb);
2014 return;
3a7dbc3b 2015 }
65f3ddcd
NS		 2016 }
2017
45eb400d
LB		 2018 BUG_ON(txq->skb[txq->tail] != NULL);
2019 txq->skb[txq->tail] = skb;
a66098da 2020
45eb400d 2021 tx = txq->txd + txq->tail;
23b33906 2022 tx->data_rate = txdatarate;
65f3ddcd 2023 tx->tx_priority = txpriority;
a66098da 2024 tx->qos_control = cpu_to_le16(qos);
a66098da
LB		 2025 tx->pkt_phys_addr = cpu_to_le32(dma);
2026 tx->pkt_len = cpu_to_le16(skb->len);
23b33906 2027 tx->rate_info = 0;
36323f81
TH		 2028 if (!priv->ap_fw && sta != NULL)
2029 tx->peer_id = MWL8K_STA(sta)->peer_id;
a680400e
LB		 2030 else
2031 tx->peer_id = 0;
566875db 2032
e1f4d69b 2033 if (priv->ap_fw && ieee80211_is_data(wh->frame_control) && !eapol_frame)
566875db
PN		 2034 tx->timestamp = cpu_to_le32(ioread32(priv->regs +
2035 MWL8K_HW_TIMER_REGISTER));
b8d9e572
NS		 2036 else
2037 tx->timestamp = 0;
566875db 2038
a66098da 2039 wmb();
23b33906
LB		 2040 tx->status = cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED | txstatus);
2041
8ccbc3b8 2042 txq->len++;
a66098da 2043 priv->pending_tx_pkts++;
a66098da 2044
45eb400d
LB		 2045 txq->tail++;
2046 if (txq->tail == MWL8K_TX_DESCS)
2047 txq->tail = 0;
23b33906 2048
23b33906 2049 mwl8k_tx_start(priv);
a66098da
LB		 2050
2051 spin_unlock_bh(&priv->tx_lock);
65f3ddcd
NS		 2052
2053 /* Initiate the ampdu session here */
2054 if (start_ba_session) {
2055 spin_lock(&priv->stream_lock);
2056 if (mwl8k_start_stream(hw, stream))
2057 mwl8k_remove_stream(hw, stream);
2058 spin_unlock(&priv->stream_lock);
2059 }
a66098da
LB		 2060}
2061
2062
618952a7
LB		 2063/*
2064 * Firmware access.
2065 *
2066 * We have the following requirements for issuing firmware commands:
2067 * - Some commands require that the packet transmit path is idle when
2068 * the command is issued. (For simplicity, we'll just quiesce the
2069 * transmit path for every command.)
2070 * - There are certain sequences of commands that need to be issued to
2071 * the hardware sequentially, with no other intervening commands.
2072 *
2073 * This leads to an implementation of a "firmware lock" as a mutex that
2074 * can be taken recursively, and which is taken by both the low-level
2075 * command submission function (mwl8k_post_cmd) as well as any users of
2076 * that function that require issuing of an atomic sequence of commands,
2077 * and quiesces the transmit path whenever it's taken.
2078 */
2079static int mwl8k_fw_lock(struct ieee80211_hw *hw)
2080{
2081 struct mwl8k_priv *priv = hw->priv;
2082
2083 if (priv->fw_mutex_owner != current) {
2084 int rc;
2085
2086 mutex_lock(&priv->fw_mutex);
2087 ieee80211_stop_queues(hw);
2088
2089 rc = mwl8k_tx_wait_empty(hw);
2090 if (rc) {
6b6accc3
YAP		 2091 if (!priv->hw_restart_in_progress)
2092 ieee80211_wake_queues(hw);
2093
618952a7
LB		 2094 mutex_unlock(&priv->fw_mutex);
2095
2096 return rc;
2097 }
2098
2099 priv->fw_mutex_owner = current;
2100 }
2101
2102 priv->fw_mutex_depth++;
2103
2104 return 0;
2105}
2106
2107static void mwl8k_fw_unlock(struct ieee80211_hw *hw)
2108{
2109 struct mwl8k_priv *priv = hw->priv;
2110
2111 if (!--priv->fw_mutex_depth) {
6b6accc3
YAP		 2112 if (!priv->hw_restart_in_progress)
2113 ieee80211_wake_queues(hw);
2114
618952a7
LB		 2115 priv->fw_mutex_owner = NULL;
2116 mutex_unlock(&priv->fw_mutex);
2117 }
2118}
2119
2120
a66098da
LB		 2121/*
2122 * Command processing.
2123 */
2124
0c9cc640
LB		 2125/* Timeout firmware commands after 10s */
2126#define MWL8K_CMD_TIMEOUT_MS 10000
a66098da
LB		 2127
2128static int mwl8k_post_cmd(struct ieee80211_hw *hw, struct mwl8k_cmd_pkt *cmd)
2129{
2130 DECLARE_COMPLETION_ONSTACK(cmd_wait);
2131 struct mwl8k_priv *priv = hw->priv;
2132 void __iomem *regs = priv->regs;
2133 dma_addr_t dma_addr;
2134 unsigned int dma_size;
2135 int rc;
a66098da
LB		 2136 unsigned long timeout = 0;
2137 u8 buf[32];
2138
b603742f 2139 cmd->result = (__force __le16) 0xffff;
a66098da
LB		 2140 dma_size = le16_to_cpu(cmd->length);
2141 dma_addr = pci_map_single(priv->pdev, cmd, dma_size,
2142 PCI_DMA_BIDIRECTIONAL);
2143 if (pci_dma_mapping_error(priv->pdev, dma_addr))
2144 return -ENOMEM;
2145
618952a7 2146 rc = mwl8k_fw_lock(hw);
39a1e42e
LB		 2147 if (rc) {
2148 pci_unmap_single(priv->pdev, dma_addr, dma_size,
2149 PCI_DMA_BIDIRECTIONAL);
618952a7 2150 return rc;
39a1e42e 2151 }
a66098da 2152
a66098da
LB		 2153 priv->hostcmd_wait = &cmd_wait;
2154 iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
2155 iowrite32(MWL8K_H2A_INT_DOORBELL,
2156 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
2157 iowrite32(MWL8K_H2A_INT_DUMMY,
2158 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
a66098da
LB		 2159
2160 timeout = wait_for_completion_timeout(&cmd_wait,
2161 msecs_to_jiffies(MWL8K_CMD_TIMEOUT_MS));
2162
618952a7
LB		 2163 priv->hostcmd_wait = NULL;
2164
2165 mwl8k_fw_unlock(hw);
2166
37055bd4
LB		 2167 pci_unmap_single(priv->pdev, dma_addr, dma_size,
2168 PCI_DMA_BIDIRECTIONAL);
2169
a66098da 2170 if (!timeout) {
5db55844 2171 wiphy_err(hw->wiphy, "Command %s timeout after %u ms\n",
c96c31e4
JP		 2172 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
2173 MWL8K_CMD_TIMEOUT_MS);
a66098da
LB		 2174 rc = -ETIMEDOUT;
2175 } else {
0c9cc640
LB		 2176 int ms;
2177
2178 ms = MWL8K_CMD_TIMEOUT_MS - jiffies_to_msecs(timeout);
2179
ce9e2e1b 2180 rc = cmd->result ? -EINVAL : 0;
a66098da 2181 if (rc)
5db55844 2182 wiphy_err(hw->wiphy, "Command %s error 0x%x\n",
c96c31e4
JP		 2183 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
2184 le16_to_cpu(cmd->result));
0c9cc640 2185 else if (ms > 2000)
5db55844 2186 wiphy_notice(hw->wiphy, "Command %s took %d ms\n",
c96c31e4
JP		 2187 mwl8k_cmd_name(cmd->code,
2188 buf, sizeof(buf)),
2189 ms);
a66098da
LB		 2190 }
2191
a66098da
LB		 2192 return rc;
2193}
2194
f57ca9c1
LB		 2195static int mwl8k_post_pervif_cmd(struct ieee80211_hw *hw,
2196 struct ieee80211_vif *vif,
2197 struct mwl8k_cmd_pkt *cmd)
2198{
2199 if (vif != NULL)
2200 cmd->macid = MWL8K_VIF(vif)->macid;
2201 return mwl8k_post_cmd(hw, cmd);
2202}
2203
1349ad2f
LB		 2204/*
2205 * Setup code shared between STA and AP firmware images.
2206 */
2207static void mwl8k_setup_2ghz_band(struct ieee80211_hw *hw)
2208{
2209 struct mwl8k_priv *priv = hw->priv;
2210
2211 BUILD_BUG_ON(sizeof(priv->channels_24) != sizeof(mwl8k_channels_24));
2212 memcpy(priv->channels_24, mwl8k_channels_24, sizeof(mwl8k_channels_24));
2213
2214 BUILD_BUG_ON(sizeof(priv->rates_24) != sizeof(mwl8k_rates_24));
2215 memcpy(priv->rates_24, mwl8k_rates_24, sizeof(mwl8k_rates_24));
2216
2217 priv->band_24.band = IEEE80211_BAND_2GHZ;
2218 priv->band_24.channels = priv->channels_24;
2219 priv->band_24.n_channels = ARRAY_SIZE(mwl8k_channels_24);
2220 priv->band_24.bitrates = priv->rates_24;
2221 priv->band_24.n_bitrates = ARRAY_SIZE(mwl8k_rates_24);
2222
2223 hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band_24;
2224}
2225
4eae9edd
LB		 2226static void mwl8k_setup_5ghz_band(struct ieee80211_hw *hw)
2227{
2228 struct mwl8k_priv *priv = hw->priv;
2229
2230 BUILD_BUG_ON(sizeof(priv->channels_50) != sizeof(mwl8k_channels_50));
2231 memcpy(priv->channels_50, mwl8k_channels_50, sizeof(mwl8k_channels_50));
2232
2233 BUILD_BUG_ON(sizeof(priv->rates_50) != sizeof(mwl8k_rates_50));
2234 memcpy(priv->rates_50, mwl8k_rates_50, sizeof(mwl8k_rates_50));
2235
2236 priv->band_50.band = IEEE80211_BAND_5GHZ;
2237 priv->band_50.channels = priv->channels_50;
2238 priv->band_50.n_channels = ARRAY_SIZE(mwl8k_channels_50);
2239 priv->band_50.bitrates = priv->rates_50;
2240 priv->band_50.n_bitrates = ARRAY_SIZE(mwl8k_rates_50);
2241
2242 hw->wiphy->bands[IEEE80211_BAND_5GHZ] = &priv->band_50;
2243}
2244
a66098da 2245/*
04b147b1 2246 * CMD_GET_HW_SPEC (STA version).
a66098da 2247 */
04b147b1 2248struct mwl8k_cmd_get_hw_spec_sta {
a66098da
LB		 2249 struct mwl8k_cmd_pkt header;
2250 __u8 hw_rev;
2251 __u8 host_interface;
2252 __le16 num_mcaddrs;
d89173f2 2253 __u8 perm_addr[ETH_ALEN];
a66098da
LB		 2254 __le16 region_code;
2255 __le32 fw_rev;
2256 __le32 ps_cookie;
2257 __le32 caps;
2258 __u8 mcs_bitmap[16];
2259 __le32 rx_queue_ptr;
2260 __le32 num_tx_queues;
e600707b 2261 __le32 tx_queue_ptrs[MWL8K_TX_WMM_QUEUES];
a66098da
LB		 2262 __le32 caps2;
2263 __le32 num_tx_desc_per_queue;
45eb400d 2264 __le32 total_rxd;
ba2d3587 2265} __packed;
a66098da 2266
341c9791
LB		 2267#define MWL8K_CAP_MAX_AMSDU 0x20000000
2268#define MWL8K_CAP_GREENFIELD 0x08000000
2269#define MWL8K_CAP_AMPDU 0x04000000
2270#define MWL8K_CAP_RX_STBC 0x01000000
2271#define MWL8K_CAP_TX_STBC 0x00800000
2272#define MWL8K_CAP_SHORTGI_40MHZ 0x00400000
2273#define MWL8K_CAP_SHORTGI_20MHZ 0x00200000
2274#define MWL8K_CAP_RX_ANTENNA_MASK 0x000e0000
2275#define MWL8K_CAP_TX_ANTENNA_MASK 0x0001c000
2276#define MWL8K_CAP_DELAY_BA 0x00003000
2277#define MWL8K_CAP_MIMO 0x00000200
2278#define MWL8K_CAP_40MHZ 0x00000100
06953235
LB		 2279#define MWL8K_CAP_BAND_MASK 0x00000007
2280#define MWL8K_CAP_5GHZ 0x00000004
2281#define MWL8K_CAP_2GHZ4 0x00000001
341c9791 2282
06953235
LB		 2283static void
2284mwl8k_set_ht_caps(struct ieee80211_hw *hw,
2285 struct ieee80211_supported_band *band, u32 cap)
341c9791 2286{
341c9791
LB		 2287 int rx_streams;
2288 int tx_streams;
2289
777ad375 2290 band->ht_cap.ht_supported = 1;
341c9791
LB		 2291
2292 if (cap & MWL8K_CAP_MAX_AMSDU)
777ad375 2293 band->ht_cap.cap |= IEEE80211_HT_CAP_MAX_AMSDU;
341c9791 2294 if (cap & MWL8K_CAP_GREENFIELD)
777ad375 2295 band->ht_cap.cap |= IEEE80211_HT_CAP_GRN_FLD;
341c9791
LB		 2296 if (cap & MWL8K_CAP_AMPDU) {
2297 hw->flags |= IEEE80211_HW_AMPDU_AGGREGATION;
777ad375
LB		 2298 band->ht_cap.ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
2299 band->ht_cap.ampdu_density = IEEE80211_HT_MPDU_DENSITY_NONE;
341c9791
LB		 2300 }
2301 if (cap & MWL8K_CAP_RX_STBC)
777ad375 2302 band->ht_cap.cap |= IEEE80211_HT_CAP_RX_STBC;
341c9791 2303 if (cap & MWL8K_CAP_TX_STBC)
777ad375 2304 band->ht_cap.cap |= IEEE80211_HT_CAP_TX_STBC;
341c9791 2305 if (cap & MWL8K_CAP_SHORTGI_40MHZ)
777ad375 2306 band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_40;
341c9791 2307 if (cap & MWL8K_CAP_SHORTGI_20MHZ)
777ad375 2308 band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_20;
341c9791 2309 if (cap & MWL8K_CAP_DELAY_BA)
777ad375 2310 band->ht_cap.cap |= IEEE80211_HT_CAP_DELAY_BA;
341c9791 2311 if (cap & MWL8K_CAP_40MHZ)
777ad375 2312 band->ht_cap.cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
341c9791
LB		 2313
2314 rx_streams = hweight32(cap & MWL8K_CAP_RX_ANTENNA_MASK);
2315 tx_streams = hweight32(cap & MWL8K_CAP_TX_ANTENNA_MASK);
2316
777ad375 2317 band->ht_cap.mcs.rx_mask[0] = 0xff;
341c9791 2318 if (rx_streams >= 2)
777ad375 2319 band->ht_cap.mcs.rx_mask[1] = 0xff;
341c9791 2320 if (rx_streams >= 3)
777ad375
LB		 2321 band->ht_cap.mcs.rx_mask[2] = 0xff;
2322 band->ht_cap.mcs.rx_mask[4] = 0x01;
2323 band->ht_cap.mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
341c9791
LB		 2324
2325 if (rx_streams != tx_streams) {
777ad375
LB		 2326 band->ht_cap.mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
2327 band->ht_cap.mcs.tx_params |= (tx_streams - 1) <<
341c9791
LB		 2328 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
2329 }
2330}
2331
06953235
LB		 2332static void
2333mwl8k_set_caps(struct ieee80211_hw *hw, u32 caps)
2334{
2335 struct mwl8k_priv *priv = hw->priv;
2336
2337 if ((caps & MWL8K_CAP_2GHZ4) || !(caps & MWL8K_CAP_BAND_MASK)) {
2338 mwl8k_setup_2ghz_band(hw);
2339 if (caps & MWL8K_CAP_MIMO)
2340 mwl8k_set_ht_caps(hw, &priv->band_24, caps);
2341 }
2342
2343 if (caps & MWL8K_CAP_5GHZ) {
2344 mwl8k_setup_5ghz_band(hw);
2345 if (caps & MWL8K_CAP_MIMO)
2346 mwl8k_set_ht_caps(hw, &priv->band_50, caps);
2347 }
2348}
2349
04b147b1 2350static int mwl8k_cmd_get_hw_spec_sta(struct ieee80211_hw *hw)
a66098da
LB		 2351{
2352 struct mwl8k_priv *priv = hw->priv;
04b147b1 2353 struct mwl8k_cmd_get_hw_spec_sta *cmd;
a66098da
LB		 2354 int rc;
2355 int i;
2356
2357 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2358 if (cmd == NULL)
2359 return -ENOMEM;
2360
2361 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
2362 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2363
2364 memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
2365 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
45eb400d 2366 cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
e600707b
BC		 2367 cmd->num_tx_queues = cpu_to_le32(mwl8k_tx_queues(priv));
2368 for (i = 0; i < mwl8k_tx_queues(priv); i++)
45eb400d 2369 cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma);
4ff6432e 2370 cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
45eb400d 2371 cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
a66098da
LB		 2372
2373 rc = mwl8k_post_cmd(hw, &cmd->header);
2374
2375 if (!rc) {
2376 SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
2377 priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
4ff6432e 2378 priv->fw_rev = le32_to_cpu(cmd->fw_rev);
a66098da 2379 priv->hw_rev = cmd->hw_rev;
06953235 2380 mwl8k_set_caps(hw, le32_to_cpu(cmd->caps));
ee0ddf18
LB		 2381 priv->ap_macids_supported = 0x00000000;
2382 priv->sta_macids_supported = 0x00000001;
a66098da
LB		 2383 }
2384
2385 kfree(cmd);
2386 return rc;
2387}
2388
42fba21d
LB		 2389/*
2390 * CMD_GET_HW_SPEC (AP version).
2391 */
2392struct mwl8k_cmd_get_hw_spec_ap {
2393 struct mwl8k_cmd_pkt header;
2394 __u8 hw_rev;
2395 __u8 host_interface;
2396 __le16 num_wcb;
2397 __le16 num_mcaddrs;
2398 __u8 perm_addr[ETH_ALEN];
2399 __le16 region_code;
2400 __le16 num_antenna;
2401 __le32 fw_rev;
2402 __le32 wcbbase0;
2403 __le32 rxwrptr;
2404 __le32 rxrdptr;
2405 __le32 ps_cookie;
2406 __le32 wcbbase1;
2407 __le32 wcbbase2;
2408 __le32 wcbbase3;
952a0e96 2409 __le32 fw_api_version;
8a7a578c
BC		 2410 __le32 caps;
2411 __le32 num_of_ampdu_queues;
2412 __le32 wcbbase_ampdu[MWL8K_MAX_AMPDU_QUEUES];
ba2d3587 2413} __packed;
42fba21d
LB		 2414
2415static int mwl8k_cmd_get_hw_spec_ap(struct ieee80211_hw *hw)
2416{
2417 struct mwl8k_priv *priv = hw->priv;
2418 struct mwl8k_cmd_get_hw_spec_ap *cmd;
8a7a578c 2419 int rc, i;
952a0e96 2420 u32 api_version;
42fba21d
LB		 2421
2422 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2423 if (cmd == NULL)
2424 return -ENOMEM;
2425
2426 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
2427 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2428
2429 memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
2430 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
2431
2432 rc = mwl8k_post_cmd(hw, &cmd->header);
2433
2434 if (!rc) {
2435 int off;
2436
952a0e96
BC		 2437 api_version = le32_to_cpu(cmd->fw_api_version);
2438 if (priv->device_info->fw_api_ap != api_version) {
2439 printk(KERN_ERR "%s: Unsupported fw API version for %s."
2440 " Expected %d got %d.\n", MWL8K_NAME,
2441 priv->device_info->part_name,
2442 priv->device_info->fw_api_ap,
2443 api_version);
2444 rc = -EINVAL;
2445 goto done;
2446 }
42fba21d
LB		 2447 SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
2448 priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
2449 priv->fw_rev = le32_to_cpu(cmd->fw_rev);
2450 priv->hw_rev = cmd->hw_rev;
8a7a578c 2451 mwl8k_set_caps(hw, le32_to_cpu(cmd->caps));
ee0ddf18
LB		 2452 priv->ap_macids_supported = 0x000000ff;
2453 priv->sta_macids_supported = 0x00000000;
8a7a578c
BC		 2454 priv->num_ampdu_queues = le32_to_cpu(cmd->num_of_ampdu_queues);
2455 if (priv->num_ampdu_queues > MWL8K_MAX_AMPDU_QUEUES) {
2456 wiphy_warn(hw->wiphy, "fw reported %d ampdu queues"
2457 " but we only support %d.\n",
2458 priv->num_ampdu_queues,
2459 MWL8K_MAX_AMPDU_QUEUES);
2460 priv->num_ampdu_queues = MWL8K_MAX_AMPDU_QUEUES;
2461 }
42fba21d 2462 off = le32_to_cpu(cmd->rxwrptr) & 0xffff;
b603742f 2463 iowrite32(priv->rxq[0].rxd_dma, priv->sram + off);
42fba21d
LB		 2464
2465 off = le32_to_cpu(cmd->rxrdptr) & 0xffff;
b603742f 2466 iowrite32(priv->rxq[0].rxd_dma, priv->sram + off);
42fba21d 2467
73b46320
BC		 2468 priv->txq_offset[0] = le32_to_cpu(cmd->wcbbase0) & 0xffff;
2469 priv->txq_offset[1] = le32_to_cpu(cmd->wcbbase1) & 0xffff;
2470 priv->txq_offset[2] = le32_to_cpu(cmd->wcbbase2) & 0xffff;
2471 priv->txq_offset[3] = le32_to_cpu(cmd->wcbbase3) & 0xffff;
8a7a578c
BC		 2472
2473 for (i = 0; i < priv->num_ampdu_queues; i++)
e600707b 2474 priv->txq_offset[i + MWL8K_TX_WMM_QUEUES] =
8a7a578c 2475 le32_to_cpu(cmd->wcbbase_ampdu[i]) & 0xffff;
42fba21d
LB		 2476 }
2477
952a0e96 2478done:
42fba21d
LB		 2479 kfree(cmd);
2480 return rc;
2481}
2482
2483/*
2484 * CMD_SET_HW_SPEC.
2485 */
2486struct mwl8k_cmd_set_hw_spec {
2487 struct mwl8k_cmd_pkt header;
2488 __u8 hw_rev;
2489 __u8 host_interface;
2490 __le16 num_mcaddrs;
2491 __u8 perm_addr[ETH_ALEN];
2492 __le16 region_code;
2493 __le32 fw_rev;
2494 __le32 ps_cookie;
2495 __le32 caps;
2496 __le32 rx_queue_ptr;
2497 __le32 num_tx_queues;
e600707b 2498 __le32 tx_queue_ptrs[MWL8K_MAX_TX_QUEUES];
42fba21d
LB		 2499 __le32 flags;
2500 __le32 num_tx_desc_per_queue;
2501 __le32 total_rxd;
ba2d3587 2502} __packed;
42fba21d 2503
8a7a578c
BC		 2504/* If enabled, MWL8K_SET_HW_SPEC_FLAG_ENABLE_LIFE_TIME_EXPIRY will cause
2505 * packets to expire 500 ms after the timestamp in the tx descriptor. That is,
2506 * the packets that are queued for more than 500ms, will be dropped in the
2507 * hardware. This helps minimizing the issues caused due to head-of-line
2508 * blocking where a slow client can hog the bandwidth and affect traffic to a
2509 * faster client.
2510 */
2511#define MWL8K_SET_HW_SPEC_FLAG_ENABLE_LIFE_TIME_EXPIRY 0x00000400
3373b28e 2512#define MWL8K_SET_HW_SPEC_FLAG_GENERATE_CCMP_HDR 0x00000200
b64fe619
LB		 2513#define MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT 0x00000080
2514#define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP 0x00000020
2515#define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON 0x00000010
42fba21d
LB		 2516
2517static int mwl8k_cmd_set_hw_spec(struct ieee80211_hw *hw)
2518{
2519 struct mwl8k_priv *priv = hw->priv;
2520 struct mwl8k_cmd_set_hw_spec *cmd;
2521 int rc;
2522 int i;
2523
2524 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2525 if (cmd == NULL)
2526 return -ENOMEM;
2527
2528 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_HW_SPEC);
2529 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2530
2531 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
2532 cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
e600707b 2533 cmd->num_tx_queues = cpu_to_le32(mwl8k_tx_queues(priv));
85c9205c
NS		 2534
2535 /*
2536 * Mac80211 stack has Q0 as highest priority and Q3 as lowest in
2537 * that order. Firmware has Q3 as highest priority and Q0 as lowest
2538 * in that order. Map Q3 of mac80211 to Q0 of firmware so that the
2539 * priority is interpreted the right way in firmware.
2540 */
e600707b
BC		 2541 for (i = 0; i < mwl8k_tx_queues(priv); i++) {
2542 int j = mwl8k_tx_queues(priv) - 1 - i;
85c9205c
NS		 2543 cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[j].txd_dma);
2544 }
2545
b64fe619
LB		 2546 cmd->flags = cpu_to_le32(MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT |
2547 MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP |
31d291a7 2548 MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON |
3373b28e
NS		 2549 MWL8K_SET_HW_SPEC_FLAG_ENABLE_LIFE_TIME_EXPIRY |
2550 MWL8K_SET_HW_SPEC_FLAG_GENERATE_CCMP_HDR);
42fba21d
LB		 2551 cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
2552 cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
2553
2554 rc = mwl8k_post_cmd(hw, &cmd->header);
2555 kfree(cmd);
2556
2557 return rc;
2558}
2559
a66098da
LB		 2560/*
2561 * CMD_MAC_MULTICAST_ADR.
2562 */
2563struct mwl8k_cmd_mac_multicast_adr {
2564 struct mwl8k_cmd_pkt header;
2565 __le16 action;
2566 __le16 numaddr;
ce9e2e1b 2567 __u8 addr[0][ETH_ALEN];
a66098da
LB		 2568};
2569
d5e30845
LB		 2570#define MWL8K_ENABLE_RX_DIRECTED 0x0001
2571#define MWL8K_ENABLE_RX_MULTICAST 0x0002
2572#define MWL8K_ENABLE_RX_ALL_MULTICAST 0x0004
2573#define MWL8K_ENABLE_RX_BROADCAST 0x0008
ce9e2e1b 2574
e81cd2d6 2575static struct mwl8k_cmd_pkt *
447ced07 2576__mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw *hw, int allmulti,
22bedad3 2577 struct netdev_hw_addr_list *mc_list)
a66098da 2578{
e81cd2d6 2579 struct mwl8k_priv *priv = hw->priv;
a66098da 2580 struct mwl8k_cmd_mac_multicast_adr *cmd;
e81cd2d6 2581 int size;
22bedad3
JP		 2582 int mc_count = 0;
2583
2584 if (mc_list)
2585 mc_count = netdev_hw_addr_list_count(mc_list);
e81cd2d6 2586
447ced07 2587 if (allmulti || mc_count > priv->num_mcaddrs) {
d5e30845
LB		 2588 allmulti = 1;
2589 mc_count = 0;
2590 }
e81cd2d6
LB		 2591
2592 size = sizeof(*cmd) + mc_count * ETH_ALEN;
ce9e2e1b 2593
e81cd2d6 2594 cmd = kzalloc(size, GFP_ATOMIC);
a66098da 2595 if (cmd == NULL)
e81cd2d6 2596 return NULL;
a66098da
LB		 2597
2598 cmd->header.code = cpu_to_le16(MWL8K_CMD_MAC_MULTICAST_ADR);
2599 cmd->header.length = cpu_to_le16(size);
d5e30845
LB		 2600 cmd->action = cpu_to_le16(MWL8K_ENABLE_RX_DIRECTED |
2601 MWL8K_ENABLE_RX_BROADCAST);
2602
2603 if (allmulti) {
2604 cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_ALL_MULTICAST);
2605 } else if (mc_count) {
22bedad3
JP		 2606 struct netdev_hw_addr *ha;
2607 int i = 0;
d5e30845
LB		 2608
2609 cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_MULTICAST);
2610 cmd->numaddr = cpu_to_le16(mc_count);
22bedad3
JP		 2611 netdev_hw_addr_list_for_each(ha, mc_list) {
2612 memcpy(cmd->addr[i], ha->addr, ETH_ALEN);
a66098da 2613 }
a66098da
LB		 2614 }
2615
e81cd2d6 2616 return &cmd->header;
a66098da
LB		 2617}
2618
2619/*
55489b6e 2620 * CMD_GET_STAT.
a66098da 2621 */
55489b6e 2622struct mwl8k_cmd_get_stat {
a66098da 2623 struct mwl8k_cmd_pkt header;
a66098da 2624 __le32 stats[64];
ba2d3587 2625} __packed;
a66098da
LB		 2626
2627#define MWL8K_STAT_ACK_FAILURE 9
2628#define MWL8K_STAT_RTS_FAILURE 12
2629#define MWL8K_STAT_FCS_ERROR 24
2630#define MWL8K_STAT_RTS_SUCCESS 11
2631
55489b6e
LB		 2632static int mwl8k_cmd_get_stat(struct ieee80211_hw *hw,
2633 struct ieee80211_low_level_stats *stats)
a66098da 2634{
55489b6e 2635 struct mwl8k_cmd_get_stat *cmd;
a66098da
LB		 2636 int rc;
2637
2638 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2639 if (cmd == NULL)
2640 return -ENOMEM;
2641
2642 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_STAT);
2643 cmd->header.length = cpu_to_le16(sizeof(*cmd));
a66098da
LB		 2644
2645 rc = mwl8k_post_cmd(hw, &cmd->header);
2646 if (!rc) {
2647 stats->dot11ACKFailureCount =
2648 le32_to_cpu(cmd->stats[MWL8K_STAT_ACK_FAILURE]);
2649 stats->dot11RTSFailureCount =
2650 le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_FAILURE]);
2651 stats->dot11FCSErrorCount =
2652 le32_to_cpu(cmd->stats[MWL8K_STAT_FCS_ERROR]);
2653 stats->dot11RTSSuccessCount =
2654 le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_SUCCESS]);
2655 }
2656 kfree(cmd);
2657
2658 return rc;
2659}
2660
2661/*
55489b6e 2662 * CMD_RADIO_CONTROL.
a66098da 2663 */
55489b6e 2664struct mwl8k_cmd_radio_control {
a66098da
LB		 2665 struct mwl8k_cmd_pkt header;
2666 __le16 action;
2667 __le16 control;
2668 __le16 radio_on;
ba2d3587 2669} __packed;
a66098da 2670
c46563b7 2671static int
55489b6e 2672mwl8k_cmd_radio_control(struct ieee80211_hw *hw, bool enable, bool force)
a66098da
LB		 2673{
2674 struct mwl8k_priv *priv = hw->priv;
55489b6e 2675 struct mwl8k_cmd_radio_control *cmd;
a66098da
LB		 2676 int rc;
2677
c46563b7 2678 if (enable == priv->radio_on && !force)
a66098da
LB		 2679 return 0;
2680
a66098da
LB		 2681 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2682 if (cmd == NULL)
2683 return -ENOMEM;
2684
2685 cmd->header.code = cpu_to_le16(MWL8K_CMD_RADIO_CONTROL);
2686 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2687 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
68ce3884 2688 cmd->control = cpu_to_le16(priv->radio_short_preamble ? 3 : 1);
a66098da
LB		 2689 cmd->radio_on = cpu_to_le16(enable ? 0x0001 : 0x0000);
2690
2691 rc = mwl8k_post_cmd(hw, &cmd->header);
2692 kfree(cmd);
2693
2694 if (!rc)
c46563b7 2695 priv->radio_on = enable;
a66098da
LB		 2696
2697 return rc;
2698}
2699
55489b6e 2700static int mwl8k_cmd_radio_disable(struct ieee80211_hw *hw)
c46563b7 2701{
55489b6e 2702 return mwl8k_cmd_radio_control(hw, 0, 0);
c46563b7
LB		 2703}
2704
55489b6e 2705static int mwl8k_cmd_radio_enable(struct ieee80211_hw *hw)
c46563b7 2706{
55489b6e 2707 return mwl8k_cmd_radio_control(hw, 1, 0);
c46563b7
LB		 2708}
2709
a66098da
LB		 2710static int
2711mwl8k_set_radio_preamble(struct ieee80211_hw *hw, bool short_preamble)
2712{
99200a99 2713 struct mwl8k_priv *priv = hw->priv;
a66098da 2714
68ce3884 2715 priv->radio_short_preamble = short_preamble;
a66098da 2716
55489b6e 2717 return mwl8k_cmd_radio_control(hw, 1, 1);
a66098da
LB		 2718}
2719
2720/*
55489b6e 2721 * CMD_RF_TX_POWER.
a66098da 2722 */
41fdf097 2723#define MWL8K_RF_TX_POWER_LEVEL_TOTAL 8
a66098da 2724
55489b6e 2725struct mwl8k_cmd_rf_tx_power {
a66098da
LB		 2726 struct mwl8k_cmd_pkt header;
2727 __le16 action;
2728 __le16 support_level;
2729 __le16 current_level;
2730 __le16 reserved;
41fdf097 2731 __le16 power_level_list[MWL8K_RF_TX_POWER_LEVEL_TOTAL];
ba2d3587 2732} __packed;
a66098da 2733
55489b6e 2734static int mwl8k_cmd_rf_tx_power(struct ieee80211_hw *hw, int dBm)
a66098da 2735{
55489b6e 2736 struct mwl8k_cmd_rf_tx_power *cmd;
a66098da
LB		 2737 int rc;
2738
2739 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2740 if (cmd == NULL)
2741 return -ENOMEM;
2742
2743 cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_TX_POWER);
2744 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2745 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2746 cmd->support_level = cpu_to_le16(dBm);
2747
2748 rc = mwl8k_post_cmd(hw, &cmd->header);
2749 kfree(cmd);
2750
2751 return rc;
2752}
2753
41fdf097
NS		 2754/*
2755 * CMD_TX_POWER.
2756 */
2757#define MWL8K_TX_POWER_LEVEL_TOTAL 12
2758
2759struct mwl8k_cmd_tx_power {
2760 struct mwl8k_cmd_pkt header;
2761 __le16 action;
2762 __le16 band;
2763 __le16 channel;
2764 __le16 bw;
2765 __le16 sub_ch;
2766 __le16 power_level_list[MWL8K_TX_POWER_LEVEL_TOTAL];
ba30c4a5 2767} __packed;
41fdf097
NS		 2768
2769static int mwl8k_cmd_tx_power(struct ieee80211_hw *hw,
2770 struct ieee80211_conf *conf,
2771 unsigned short pwr)
2772{
2773 struct ieee80211_channel *channel = conf->channel;
2774 struct mwl8k_cmd_tx_power *cmd;
2775 int rc;
2776 int i;
2777
2778 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2779 if (cmd == NULL)
2780 return -ENOMEM;
2781
2782 cmd->header.code = cpu_to_le16(MWL8K_CMD_TX_POWER);
2783 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2784 cmd->action = cpu_to_le16(MWL8K_CMD_SET_LIST);
2785
2786 if (channel->band == IEEE80211_BAND_2GHZ)
2787 cmd->band = cpu_to_le16(0x1);
2788 else if (channel->band == IEEE80211_BAND_5GHZ)
2789 cmd->band = cpu_to_le16(0x4);
2790
604c4ef1 2791 cmd->channel = cpu_to_le16(channel->hw_value);
41fdf097
NS		 2792
2793 if (conf->channel_type == NL80211_CHAN_NO_HT ||
2794 conf->channel_type == NL80211_CHAN_HT20) {
2795 cmd->bw = cpu_to_le16(0x2);
2796 } else {
2797 cmd->bw = cpu_to_le16(0x4);
2798 if (conf->channel_type == NL80211_CHAN_HT40MINUS)
2799 cmd->sub_ch = cpu_to_le16(0x3);
2800 else if (conf->channel_type == NL80211_CHAN_HT40PLUS)
2801 cmd->sub_ch = cpu_to_le16(0x1);
2802 }
2803
2804 for (i = 0; i < MWL8K_TX_POWER_LEVEL_TOTAL; i++)
2805 cmd->power_level_list[i] = cpu_to_le16(pwr);
2806
2807 rc = mwl8k_post_cmd(hw, &cmd->header);
2808 kfree(cmd);
2809
2810 return rc;
2811}
2812
08b06347
LB		 2813/*
2814 * CMD_RF_ANTENNA.
2815 */
2816struct mwl8k_cmd_rf_antenna {
2817 struct mwl8k_cmd_pkt header;
2818 __le16 antenna;
2819 __le16 mode;
ba2d3587 2820} __packed;
08b06347
LB		 2821
2822#define MWL8K_RF_ANTENNA_RX 1
2823#define MWL8K_RF_ANTENNA_TX 2
2824
2825static int
2826mwl8k_cmd_rf_antenna(struct ieee80211_hw *hw, int antenna, int mask)
2827{
2828 struct mwl8k_cmd_rf_antenna *cmd;
2829 int rc;
2830
2831 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2832 if (cmd == NULL)
2833 return -ENOMEM;
2834
2835 cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_ANTENNA);
2836 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2837 cmd->antenna = cpu_to_le16(antenna);
2838 cmd->mode = cpu_to_le16(mask);
2839
2840 rc = mwl8k_post_cmd(hw, &cmd->header);
2841 kfree(cmd);
2842
2843 return rc;
2844}
2845
b64fe619
LB		 2846/*
2847 * CMD_SET_BEACON.
2848 */
2849struct mwl8k_cmd_set_beacon {
2850 struct mwl8k_cmd_pkt header;
2851 __le16 beacon_len;
2852 __u8 beacon[0];
2853};
2854
aa21d0f6
LB		 2855static int mwl8k_cmd_set_beacon(struct ieee80211_hw *hw,
2856 struct ieee80211_vif *vif, u8 *beacon, int len)
b64fe619
LB		 2857{
2858 struct mwl8k_cmd_set_beacon *cmd;
2859 int rc;
2860
2861 cmd = kzalloc(sizeof(*cmd) + len, GFP_KERNEL);
2862 if (cmd == NULL)
2863 return -ENOMEM;
2864
2865 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_BEACON);
2866 cmd->header.length = cpu_to_le16(sizeof(*cmd) + len);
2867 cmd->beacon_len = cpu_to_le16(len);
2868 memcpy(cmd->beacon, beacon, len);
2869
aa21d0f6 2870 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
b64fe619
LB		 2871 kfree(cmd);
2872
2873 return rc;
2874}
2875
a66098da
LB		 2876/*
2877 * CMD_SET_PRE_SCAN.
2878 */
2879struct mwl8k_cmd_set_pre_scan {
2880 struct mwl8k_cmd_pkt header;
ba2d3587 2881} __packed;
a66098da
LB		 2882
2883static int mwl8k_cmd_set_pre_scan(struct ieee80211_hw *hw)
2884{
2885 struct mwl8k_cmd_set_pre_scan *cmd;
2886 int rc;
2887
2888 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2889 if (cmd == NULL)
2890 return -ENOMEM;
2891
2892 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_PRE_SCAN);
2893 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2894
2895 rc = mwl8k_post_cmd(hw, &cmd->header);
2896 kfree(cmd);
2897
2898 return rc;
2899}
2900
2901/*
2902 * CMD_SET_POST_SCAN.
2903 */
2904struct mwl8k_cmd_set_post_scan {
2905 struct mwl8k_cmd_pkt header;
2906 __le32 isibss;
d89173f2 2907 __u8 bssid[ETH_ALEN];
ba2d3587 2908} __packed;
a66098da
LB		 2909
2910static int
0a11dfc3 2911mwl8k_cmd_set_post_scan(struct ieee80211_hw *hw, const __u8 *mac)
a66098da
LB		 2912{
2913 struct mwl8k_cmd_set_post_scan *cmd;
2914 int rc;
2915
2916 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2917 if (cmd == NULL)
2918 return -ENOMEM;
2919
2920 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_POST_SCAN);
2921 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2922 cmd->isibss = 0;
d89173f2 2923 memcpy(cmd->bssid, mac, ETH_ALEN);
a66098da
LB		 2924
2925 rc = mwl8k_post_cmd(hw, &cmd->header);
2926 kfree(cmd);
2927
2928 return rc;
2929}
2930
2931/*
2932 * CMD_SET_RF_CHANNEL.
2933 */
2934struct mwl8k_cmd_set_rf_channel {
2935 struct mwl8k_cmd_pkt header;
2936 __le16 action;
2937 __u8 current_channel;
2938 __le32 channel_flags;
ba2d3587 2939} __packed;
a66098da
LB		 2940
2941static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw *hw,
610677d2 2942 struct ieee80211_conf *conf)
a66098da 2943{
610677d2 2944 struct ieee80211_channel *channel = conf->channel;
a66098da
LB		 2945 struct mwl8k_cmd_set_rf_channel *cmd;
2946 int rc;
2947
2948 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2949 if (cmd == NULL)
2950 return -ENOMEM;
2951
2952 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RF_CHANNEL);
2953 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2954 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2955 cmd->current_channel = channel->hw_value;
610677d2 2956
a66098da 2957 if (channel->band == IEEE80211_BAND_2GHZ)
610677d2 2958 cmd->channel_flags |= cpu_to_le32(0x00000001);
42574ea2
LB		 2959 else if (channel->band == IEEE80211_BAND_5GHZ)
2960 cmd->channel_flags |= cpu_to_le32(0x00000004);
610677d2
LB		 2961
2962 if (conf->channel_type == NL80211_CHAN_NO_HT ||
2963 conf->channel_type == NL80211_CHAN_HT20)
2964 cmd->channel_flags |= cpu_to_le32(0x00000080);
2965 else if (conf->channel_type == NL80211_CHAN_HT40MINUS)
2966 cmd->channel_flags |= cpu_to_le32(0x000001900);
2967 else if (conf->channel_type == NL80211_CHAN_HT40PLUS)
2968 cmd->channel_flags |= cpu_to_le32(0x000000900);
a66098da
LB		 2969
2970 rc = mwl8k_post_cmd(hw, &cmd->header);
2971 kfree(cmd);
2972
2973 return rc;
2974}
2975
2976/*
55489b6e 2977 * CMD_SET_AID.
a66098da 2978 */
55489b6e
LB		 2979#define MWL8K_FRAME_PROT_DISABLED 0x00
2980#define MWL8K_FRAME_PROT_11G 0x07
2981#define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02
2982#define MWL8K_FRAME_PROT_11N_HT_ALL 0x06
a66098da 2983
55489b6e
LB		 2984struct mwl8k_cmd_update_set_aid {
2985 struct mwl8k_cmd_pkt header;
2986 __le16 aid;
a66098da 2987
55489b6e
LB		 2988 /* AP's MAC address (BSSID) */
2989 __u8 bssid[ETH_ALEN];
2990 __le16 protection_mode;
2991 __u8 supp_rates[14];
ba2d3587 2992} __packed;
a66098da 2993
c6e96010
LB		 2994static void legacy_rate_mask_to_array(u8 *rates, u32 mask)
2995{
2996 int i;
2997 int j;
2998
2999 /*
3000 * Clear nonstandard rates 4 and 13.
3001 */
3002 mask &= 0x1fef;
3003
3004 for (i = 0, j = 0; i < 14; i++) {
3005 if (mask & (1 << i))
777ad375 3006 rates[j++] = mwl8k_rates_24[i].hw_value;
c6e96010
LB		 3007 }
3008}
3009
55489b6e 3010static int
c6e96010
LB		 3011mwl8k_cmd_set_aid(struct ieee80211_hw *hw,
3012 struct ieee80211_vif *vif, u32 legacy_rate_mask)
a66098da 3013{
55489b6e
LB		 3014 struct mwl8k_cmd_update_set_aid *cmd;
3015 u16 prot_mode;
a66098da
LB		 3016 int rc;
3017
3018 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3019 if (cmd == NULL)
3020 return -ENOMEM;
3021
55489b6e 3022 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_AID);
a66098da 3023 cmd->header.length = cpu_to_le16(sizeof(*cmd));
7dc6a7a7 3024 cmd->aid = cpu_to_le16(vif->bss_conf.aid);
0a11dfc3 3025 memcpy(cmd->bssid, vif->bss_conf.bssid, ETH_ALEN);
a66098da 3026
7dc6a7a7 3027 if (vif->bss_conf.use_cts_prot) {
55489b6e
LB		 3028 prot_mode = MWL8K_FRAME_PROT_11G;
3029 } else {
7dc6a7a7 3030 switch (vif->bss_conf.ht_operation_mode &
55489b6e
LB		 3031 IEEE80211_HT_OP_MODE_PROTECTION) {
3032 case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ:
3033 prot_mode = MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY;
3034 break;
3035 case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED:
3036 prot_mode = MWL8K_FRAME_PROT_11N_HT_ALL;
3037 break;
3038 default:
3039 prot_mode = MWL8K_FRAME_PROT_DISABLED;
3040 break;
3041 }
3042 }
3043 cmd->protection_mode = cpu_to_le16(prot_mode);
a66098da 3044
c6e96010 3045 legacy_rate_mask_to_array(cmd->supp_rates, legacy_rate_mask);
a66098da
LB		 3046
3047 rc = mwl8k_post_cmd(hw, &cmd->header);
3048 kfree(cmd);
3049
3050 return rc;
3051}
3052
32060e1b 3053/*
55489b6e 3054 * CMD_SET_RATE.
32060e1b 3055 */
55489b6e
LB		 3056struct mwl8k_cmd_set_rate {
3057 struct mwl8k_cmd_pkt header;
3058 __u8 legacy_rates[14];
3059
3060 /* Bitmap for supported MCS codes. */
3061 __u8 mcs_set[16];
3062 __u8 reserved[16];
ba2d3587 3063} __packed;
32060e1b 3064
55489b6e 3065static int
c6e96010 3066mwl8k_cmd_set_rate(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
13935e2c 3067 u32 legacy_rate_mask, u8 *mcs_rates)
32060e1b 3068{
55489b6e 3069 struct mwl8k_cmd_set_rate *cmd;
32060e1b
LB		 3070 int rc;
3071
3072 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3073 if (cmd == NULL)
3074 return -ENOMEM;
3075
55489b6e 3076 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATE);
32060e1b 3077 cmd->header.length = cpu_to_le16(sizeof(*cmd));
c6e96010 3078 legacy_rate_mask_to_array(cmd->legacy_rates, legacy_rate_mask);
13935e2c 3079 memcpy(cmd->mcs_set, mcs_rates, 16);
32060e1b
LB		 3080
3081 rc = mwl8k_post_cmd(hw, &cmd->header);
3082 kfree(cmd);
3083
3084 return rc;
3085}
3086
a66098da 3087/*
55489b6e 3088 * CMD_FINALIZE_JOIN.
a66098da 3089 */
55489b6e
LB		 3090#define MWL8K_FJ_BEACON_MAXLEN 128
3091
3092struct mwl8k_cmd_finalize_join {
a66098da 3093 struct mwl8k_cmd_pkt header;
55489b6e
LB		 3094 __le32 sleep_interval; /* Number of beacon periods to sleep */
3095 __u8 beacon_data[MWL8K_FJ_BEACON_MAXLEN];
ba2d3587 3096} __packed;
a66098da 3097
55489b6e
LB		 3098static int mwl8k_cmd_finalize_join(struct ieee80211_hw *hw, void *frame,
3099 int framelen, int dtim)
a66098da 3100{
55489b6e
LB		 3101 struct mwl8k_cmd_finalize_join *cmd;
3102 struct ieee80211_mgmt *payload = frame;
3103 int payload_len;
a66098da
LB		 3104 int rc;
3105
3106 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3107 if (cmd == NULL)
3108 return -ENOMEM;
3109
55489b6e 3110 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_FINALIZE_JOIN);
a66098da 3111 cmd->header.length = cpu_to_le16(sizeof(*cmd));
55489b6e
LB		 3112 cmd->sleep_interval = cpu_to_le32(dtim ? dtim : 1);
3113
3114 payload_len = framelen - ieee80211_hdrlen(payload->frame_control);
3115 if (payload_len < 0)
3116 payload_len = 0;
3117 else if (payload_len > MWL8K_FJ_BEACON_MAXLEN)
3118 payload_len = MWL8K_FJ_BEACON_MAXLEN;
3119
3120 memcpy(cmd->beacon_data, &payload->u.beacon, payload_len);
a66098da
LB		 3121
3122 rc = mwl8k_post_cmd(hw, &cmd->header);
3123 kfree(cmd);
3124
3125 return rc;
3126}
3127
3128/*
55489b6e 3129 * CMD_SET_RTS_THRESHOLD.
a66098da 3130 */
55489b6e 3131struct mwl8k_cmd_set_rts_threshold {
a66098da
LB		 3132 struct mwl8k_cmd_pkt header;
3133 __le16 action;
55489b6e 3134 __le16 threshold;
ba2d3587 3135} __packed;
a66098da 3136
c2c2b12a
LB		 3137static int
3138mwl8k_cmd_set_rts_threshold(struct ieee80211_hw *hw, int rts_thresh)
a66098da 3139{
55489b6e 3140 struct mwl8k_cmd_set_rts_threshold *cmd;
a66098da
LB		 3141 int rc;
3142
3143 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3144 if (cmd == NULL)
3145 return -ENOMEM;
3146
55489b6e 3147 cmd->header.code = cpu_to_le16(MWL8K_CMD_RTS_THRESHOLD);
a66098da 3148 cmd->header.length = cpu_to_le16(sizeof(*cmd));
c2c2b12a
LB		 3149 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
3150 cmd->threshold = cpu_to_le16(rts_thresh);
a66098da
LB		 3151
3152 rc = mwl8k_post_cmd(hw, &cmd->header);
3153 kfree(cmd);
3154
a66098da
LB		 3155 return rc;
3156}
3157
3158/*
55489b6e 3159 * CMD_SET_SLOT.
a66098da 3160 */
55489b6e 3161struct mwl8k_cmd_set_slot {
a66098da
LB		 3162 struct mwl8k_cmd_pkt header;
3163 __le16 action;
55489b6e 3164 __u8 short_slot;
ba2d3587 3165} __packed;
a66098da 3166
55489b6e 3167static int mwl8k_cmd_set_slot(struct ieee80211_hw *hw, bool short_slot_time)
a66098da 3168{
55489b6e 3169 struct mwl8k_cmd_set_slot *cmd;
a66098da
LB		 3170 int rc;
3171
3172 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3173 if (cmd == NULL)
3174 return -ENOMEM;
3175
55489b6e 3176 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_SLOT);
a66098da 3177 cmd->header.length = cpu_to_le16(sizeof(*cmd));
55489b6e
LB		 3178 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
3179 cmd->short_slot = short_slot_time;
a66098da
LB		 3180
3181 rc = mwl8k_post_cmd(hw, &cmd->header);
3182 kfree(cmd);
3183
3184 return rc;
3185}
3186
3187/*
3188 * CMD_SET_EDCA_PARAMS.
3189 */
3190struct mwl8k_cmd_set_edca_params {
3191 struct mwl8k_cmd_pkt header;
3192
3193 /* See MWL8K_SET_EDCA_XXX below */
3194 __le16 action;
3195
3196 /* TX opportunity in units of 32 us */
3197 __le16 txop;
3198
2e484c89
LB		 3199 union {
3200 struct {
3201 /* Log exponent of max contention period: 0...15 */
3202 __le32 log_cw_max;
3203
3204 /* Log exponent of min contention period: 0...15 */
3205 __le32 log_cw_min;
3206
3207 /* Adaptive interframe spacing in units of 32us */
3208 __u8 aifs;
3209
3210 /* TX queue to configure */
3211 __u8 txq;
3212 } ap;
3213 struct {
3214 /* Log exponent of max contention period: 0...15 */
3215 __u8 log_cw_max;
a66098da 3216
2e484c89
LB		 3217 /* Log exponent of min contention period: 0...15 */
3218 __u8 log_cw_min;
a66098da 3219
2e484c89
LB		 3220 /* Adaptive interframe spacing in units of 32us */
3221 __u8 aifs;
a66098da 3222
2e484c89
LB		 3223 /* TX queue to configure */
3224 __u8 txq;
3225 } sta;
3226 };
ba2d3587 3227} __packed;
a66098da 3228
a66098da
LB		 3229#define MWL8K_SET_EDCA_CW 0x01
3230#define MWL8K_SET_EDCA_TXOP 0x02
3231#define MWL8K_SET_EDCA_AIFS 0x04
3232
3233#define MWL8K_SET_EDCA_ALL (MWL8K_SET_EDCA_CW | \
3234 MWL8K_SET_EDCA_TXOP | \
3235 MWL8K_SET_EDCA_AIFS)
3236
3237static int
55489b6e
LB		 3238mwl8k_cmd_set_edca_params(struct ieee80211_hw *hw, __u8 qnum,
3239 __u16 cw_min, __u16 cw_max,
3240 __u8 aifs, __u16 txop)
a66098da 3241{
2e484c89 3242 struct mwl8k_priv *priv = hw->priv;
a66098da 3243 struct mwl8k_cmd_set_edca_params *cmd;
a66098da
LB		 3244 int rc;
3245
3246 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3247 if (cmd == NULL)
3248 return -ENOMEM;
3249
a66098da
LB		 3250 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_EDCA_PARAMS);
3251 cmd->header.length = cpu_to_le16(sizeof(*cmd));
a66098da
LB		 3252 cmd->action = cpu_to_le16(MWL8K_SET_EDCA_ALL);
3253 cmd->txop = cpu_to_le16(txop);
2e484c89
LB		 3254 if (priv->ap_fw) {
3255 cmd->ap.log_cw_max = cpu_to_le32(ilog2(cw_max + 1));
3256 cmd->ap.log_cw_min = cpu_to_le32(ilog2(cw_min + 1));
3257 cmd->ap.aifs = aifs;
3258 cmd->ap.txq = qnum;
3259 } else {
3260 cmd->sta.log_cw_max = (u8)ilog2(cw_max + 1);
3261 cmd->sta.log_cw_min = (u8)ilog2(cw_min + 1);
3262 cmd->sta.aifs = aifs;
3263 cmd->sta.txq = qnum;
3264 }
a66098da
LB		 3265
3266 rc = mwl8k_post_cmd(hw, &cmd->header);
3267 kfree(cmd);
3268
3269 return rc;
3270}
3271
3272/*
55489b6e 3273 * CMD_SET_WMM_MODE.
a66098da 3274 */
55489b6e 3275struct mwl8k_cmd_set_wmm_mode {
a66098da 3276 struct mwl8k_cmd_pkt header;
55489b6e 3277 __le16 action;
ba2d3587 3278} __packed;
a66098da 3279
55489b6e 3280static int mwl8k_cmd_set_wmm_mode(struct ieee80211_hw *hw, bool enable)
a66098da 3281{
55489b6e
LB		 3282 struct mwl8k_priv *priv = hw->priv;
3283 struct mwl8k_cmd_set_wmm_mode *cmd;
a66098da
LB		 3284 int rc;
3285
a66098da
LB		 3286 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3287 if (cmd == NULL)
3288 return -ENOMEM;
3289
55489b6e 3290 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_WMM_MODE);
a66098da 3291 cmd->header.length = cpu_to_le16(sizeof(*cmd));
55489b6e 3292 cmd->action = cpu_to_le16(!!enable);
a66098da
LB		 3293
3294 rc = mwl8k_post_cmd(hw, &cmd->header);
3295 kfree(cmd);
16cec43d 3296
55489b6e
LB		 3297 if (!rc)
3298 priv->wmm_enabled = enable;
a66098da
LB		 3299
3300 return rc;
3301}
3302
3303/*
55489b6e 3304 * CMD_MIMO_CONFIG.
a66098da 3305 */
55489b6e
LB		 3306struct mwl8k_cmd_mimo_config {
3307 struct mwl8k_cmd_pkt header;
3308 __le32 action;
3309 __u8 rx_antenna_map;
3310 __u8 tx_antenna_map;
ba2d3587 3311} __packed;
a66098da 3312
55489b6e 3313static int mwl8k_cmd_mimo_config(struct ieee80211_hw *hw, __u8 rx, __u8 tx)
a66098da 3314{
55489b6e 3315 struct mwl8k_cmd_mimo_config *cmd;
a66098da
LB		 3316 int rc;
3317
3318 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3319 if (cmd == NULL)
3320 return -ENOMEM;
3321
55489b6e 3322 cmd->header.code = cpu_to_le16(MWL8K_CMD_MIMO_CONFIG);
a66098da 3323 cmd->header.length = cpu_to_le16(sizeof(*cmd));
55489b6e
LB		 3324 cmd->action = cpu_to_le32((u32)MWL8K_CMD_SET);
3325 cmd->rx_antenna_map = rx;
3326 cmd->tx_antenna_map = tx;
a66098da
LB		 3327
3328 rc = mwl8k_post_cmd(hw, &cmd->header);
3329 kfree(cmd);
3330
3331 return rc;
3332}
3333
3334/*
b71ed2c6 3335 * CMD_USE_FIXED_RATE (STA version).
a66098da 3336 */
b71ed2c6
LB		 3337struct mwl8k_cmd_use_fixed_rate_sta {
3338 struct mwl8k_cmd_pkt header;
3339 __le32 action;
3340 __le32 allow_rate_drop;
3341 __le32 num_rates;
3342 struct {
3343 __le32 is_ht_rate;
3344 __le32 enable_retry;
3345 __le32 rate;
3346 __le32 retry_count;
3347 } rate_entry[8];
3348 __le32 rate_type;
3349 __le32 reserved1;
3350 __le32 reserved2;
ba2d3587 3351} __packed;
a66098da 3352
b71ed2c6
LB		 3353#define MWL8K_USE_AUTO_RATE 0x0002
3354#define MWL8K_UCAST_RATE 0
a66098da 3355
b71ed2c6 3356static int mwl8k_cmd_use_fixed_rate_sta(struct ieee80211_hw *hw)
a66098da 3357{
b71ed2c6 3358 struct mwl8k_cmd_use_fixed_rate_sta *cmd;
a66098da
LB		 3359 int rc;
3360
3361 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3362 if (cmd == NULL)
3363 return -ENOMEM;
3364
3365 cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
3366 cmd->header.length = cpu_to_le16(sizeof(*cmd));
b71ed2c6
LB		 3367 cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE);
3368 cmd->rate_type = cpu_to_le32(MWL8K_UCAST_RATE);
a66098da
LB		 3369
3370 rc = mwl8k_post_cmd(hw, &cmd->header);
3371 kfree(cmd);
3372
3373 return rc;
3374}
3375
088aab8b
LB		 3376/*
3377 * CMD_USE_FIXED_RATE (AP version).
3378 */
3379struct mwl8k_cmd_use_fixed_rate_ap {
3380 struct mwl8k_cmd_pkt header;
3381 __le32 action;
3382 __le32 allow_rate_drop;
3383 __le32 num_rates;
3384 struct mwl8k_rate_entry_ap {
3385 __le32 is_ht_rate;
3386 __le32 enable_retry;
3387 __le32 rate;
3388 __le32 retry_count;
3389 } rate_entry[4];
3390 u8 multicast_rate;
3391 u8 multicast_rate_type;
3392 u8 management_rate;
ba2d3587 3393} __packed;
088aab8b
LB		 3394
3395static int
3396mwl8k_cmd_use_fixed_rate_ap(struct ieee80211_hw *hw, int mcast, int mgmt)
3397{
3398 struct mwl8k_cmd_use_fixed_rate_ap *cmd;
3399 int rc;
3400
3401 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3402 if (cmd == NULL)
3403 return -ENOMEM;
3404
3405 cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
3406 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3407 cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE);
3408 cmd->multicast_rate = mcast;
3409 cmd->management_rate = mgmt;
3410
3411 rc = mwl8k_post_cmd(hw, &cmd->header);
3412 kfree(cmd);
3413
3414 return rc;
3415}
3416
55489b6e
LB		 3417/*
3418 * CMD_ENABLE_SNIFFER.
3419 */
3420struct mwl8k_cmd_enable_sniffer {
3421 struct mwl8k_cmd_pkt header;
3422 __le32 action;
ba2d3587 3423} __packed;
55489b6e
LB		 3424
3425static int mwl8k_cmd_enable_sniffer(struct ieee80211_hw *hw, bool enable)
3426{
3427 struct mwl8k_cmd_enable_sniffer *cmd;
3428 int rc;
3429
3430 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3431 if (cmd == NULL)
3432 return -ENOMEM;
3433
3434 cmd->header.code = cpu_to_le16(MWL8K_CMD_ENABLE_SNIFFER);
3435 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3436 cmd->action = cpu_to_le32(!!enable);
3437
3438 rc = mwl8k_post_cmd(hw, &cmd->header);
3439 kfree(cmd);
3440
3441 return rc;
3442}
3443
197a4e4e 3444struct mwl8k_cmd_update_mac_addr {
55489b6e
LB		 3445 struct mwl8k_cmd_pkt header;
3446 union {
3447 struct {
3448 __le16 mac_type;
3449 __u8 mac_addr[ETH_ALEN];
3450 } mbss;
3451 __u8 mac_addr[ETH_ALEN];
3452 };
ba2d3587 3453} __packed;
55489b6e 3454
ee0ddf18
LB		 3455#define MWL8K_MAC_TYPE_PRIMARY_CLIENT 0
3456#define MWL8K_MAC_TYPE_SECONDARY_CLIENT 1
3457#define MWL8K_MAC_TYPE_PRIMARY_AP 2
3458#define MWL8K_MAC_TYPE_SECONDARY_AP 3
a9e00b15 3459
197a4e4e
YAP		 3460static int mwl8k_cmd_update_mac_addr(struct ieee80211_hw *hw,
3461 struct ieee80211_vif *vif, u8 *mac, bool set)
55489b6e
LB		 3462{
3463 struct mwl8k_priv *priv = hw->priv;
ee0ddf18 3464 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
197a4e4e 3465 struct mwl8k_cmd_update_mac_addr *cmd;
ee0ddf18 3466 int mac_type;
55489b6e
LB		 3467 int rc;
3468
ee0ddf18
LB		 3469 mac_type = MWL8K_MAC_TYPE_PRIMARY_AP;
3470 if (vif != NULL && vif->type == NL80211_IFTYPE_STATION) {
3471 if (mwl8k_vif->macid + 1 == ffs(priv->sta_macids_supported))
3472 mac_type = MWL8K_MAC_TYPE_PRIMARY_CLIENT;
3473 else
3474 mac_type = MWL8K_MAC_TYPE_SECONDARY_CLIENT;
3475 } else if (vif != NULL && vif->type == NL80211_IFTYPE_AP) {
3476 if (mwl8k_vif->macid + 1 == ffs(priv->ap_macids_supported))
3477 mac_type = MWL8K_MAC_TYPE_PRIMARY_AP;
3478 else
3479 mac_type = MWL8K_MAC_TYPE_SECONDARY_AP;
3480 }
3481
55489b6e
LB		 3482 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3483 if (cmd == NULL)
3484 return -ENOMEM;
3485
197a4e4e
YAP		 3486 if (set)
3487 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_MAC_ADDR);
3488 else
3489 cmd->header.code = cpu_to_le16(MWL8K_CMD_DEL_MAC_ADDR);
3490
55489b6e
LB		 3491 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3492 if (priv->ap_fw) {
ee0ddf18 3493 cmd->mbss.mac_type = cpu_to_le16(mac_type);
55489b6e
LB		 3494 memcpy(cmd->mbss.mac_addr, mac, ETH_ALEN);
3495 } else {
3496 memcpy(cmd->mac_addr, mac, ETH_ALEN);
3497 }
3498
aa21d0f6 3499 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
55489b6e
LB		 3500 kfree(cmd);
3501
3502 return rc;
3503}
3504
197a4e4e
YAP		 3505/*
3506 * MWL8K_CMD_SET_MAC_ADDR.
3507 */
3508static inline int mwl8k_cmd_set_mac_addr(struct ieee80211_hw *hw,
3509 struct ieee80211_vif *vif, u8 *mac)
3510{
3511 return mwl8k_cmd_update_mac_addr(hw, vif, mac, true);
3512}
3513
3514/*
3515 * MWL8K_CMD_DEL_MAC_ADDR.
3516 */
3517static inline int mwl8k_cmd_del_mac_addr(struct ieee80211_hw *hw,
3518 struct ieee80211_vif *vif, u8 *mac)
3519{
3520 return mwl8k_cmd_update_mac_addr(hw, vif, mac, false);
3521}
3522
55489b6e
LB		 3523/*
3524 * CMD_SET_RATEADAPT_MODE.
3525 */
3526struct mwl8k_cmd_set_rate_adapt_mode {
3527 struct mwl8k_cmd_pkt header;
3528 __le16 action;
3529 __le16 mode;
ba2d3587 3530} __packed;
55489b6e
LB		 3531
3532static int mwl8k_cmd_set_rateadapt_mode(struct ieee80211_hw *hw, __u16 mode)
3533{
3534 struct mwl8k_cmd_set_rate_adapt_mode *cmd;
3535 int rc;
3536
3537 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3538 if (cmd == NULL)
3539 return -ENOMEM;
3540
3541 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATEADAPT_MODE);
3542 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3543 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
3544 cmd->mode = cpu_to_le16(mode);
3545
3546 rc = mwl8k_post_cmd(hw, &cmd->header);
3547 kfree(cmd);
3548
3549 return rc;
3550}
3551
3aefc37e
NS		 3552/*
3553 * CMD_GET_WATCHDOG_BITMAP.
3554 */
3555struct mwl8k_cmd_get_watchdog_bitmap {
3556 struct mwl8k_cmd_pkt header;
3557 u8 bitmap;
3558} __packed;
3559
3560static int mwl8k_cmd_get_watchdog_bitmap(struct ieee80211_hw *hw, u8 *bitmap)
3561{
3562 struct mwl8k_cmd_get_watchdog_bitmap *cmd;
3563 int rc;
3564
3565 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3566 if (cmd == NULL)
3567 return -ENOMEM;
3568
3569 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_WATCHDOG_BITMAP);
3570 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3571
3572 rc = mwl8k_post_cmd(hw, &cmd->header);
3573 if (!rc)
3574 *bitmap = cmd->bitmap;
3575
3576 kfree(cmd);
3577
3578 return rc;
3579}
3580
3581#define INVALID_BA 0xAA
3582static void mwl8k_watchdog_ba_events(struct work_struct *work)
3583{
3584 int rc;
3585 u8 bitmap = 0, stream_index;
3586 struct mwl8k_ampdu_stream *streams;
3587 struct mwl8k_priv *priv =
3588 container_of(work, struct mwl8k_priv, watchdog_ba_handle);
3589
3590 rc = mwl8k_cmd_get_watchdog_bitmap(priv->hw, &bitmap);
3591 if (rc)
3592 return;
3593
3594 if (bitmap == INVALID_BA)
3595 return;
3596
3597 /* the bitmap is the hw queue number. Map it to the ampdu queue. */
3598 stream_index = bitmap - MWL8K_TX_WMM_QUEUES;
3599
3600 BUG_ON(stream_index >= priv->num_ampdu_queues);
3601
3602 streams = &priv->ampdu[stream_index];
3603
3604 if (streams->state == AMPDU_STREAM_ACTIVE)
3605 ieee80211_stop_tx_ba_session(streams->sta, streams->tid);
3606
3607 return;
3608}
3609
3610
b64fe619
LB		 3611/*
3612 * CMD_BSS_START.
3613 */
3614struct mwl8k_cmd_bss_start {
3615 struct mwl8k_cmd_pkt header;
3616 __le32 enable;
ba2d3587 3617} __packed;
b64fe619 3618
aa21d0f6
LB		 3619static int mwl8k_cmd_bss_start(struct ieee80211_hw *hw,
3620 struct ieee80211_vif *vif, int enable)
b64fe619
LB		 3621{
3622 struct mwl8k_cmd_bss_start *cmd;
3623 int rc;
3624
3625 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3626 if (cmd == NULL)
3627 return -ENOMEM;
3628
3629 cmd->header.code = cpu_to_le16(MWL8K_CMD_BSS_START);
3630 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3631 cmd->enable = cpu_to_le32(enable);
3632
aa21d0f6 3633 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
b64fe619
LB		 3634 kfree(cmd);
3635
3636 return rc;
3637}
3638
5faa1aff
NS		 3639/*
3640 * CMD_BASTREAM.
3641 */
3642
3643/*
3644 * UPSTREAM is tx direction
3645 */
3646#define BASTREAM_FLAG_DIRECTION_UPSTREAM 0x00
3647#define BASTREAM_FLAG_IMMEDIATE_TYPE 0x01
3648
ba30c4a5 3649enum ba_stream_action_type {
5faa1aff
NS		 3650 MWL8K_BA_CREATE,
3651 MWL8K_BA_UPDATE,
3652 MWL8K_BA_DESTROY,
3653 MWL8K_BA_FLUSH,
3654 MWL8K_BA_CHECK,
ba30c4a5 3655};
5faa1aff
NS		 3656
3657
3658struct mwl8k_create_ba_stream {
3659 __le32 flags;
3660 __le32 idle_thrs;
3661 __le32 bar_thrs;
3662 __le32 window_size;
3663 u8 peer_mac_addr[6];
3664 u8 dialog_token;
3665 u8 tid;
3666 u8 queue_id;
3667 u8 param_info;
3668 __le32 ba_context;
3669 u8 reset_seq_no_flag;
3670 __le16 curr_seq_no;
3671 u8 sta_src_mac_addr[6];
3672} __packed;
3673
3674struct mwl8k_destroy_ba_stream {
3675 __le32 flags;
3676 __le32 ba_context;
3677} __packed;
3678
3679struct mwl8k_cmd_bastream {
3680 struct mwl8k_cmd_pkt header;
3681 __le32 action;
3682 union {
3683 struct mwl8k_create_ba_stream create_params;
3684 struct mwl8k_destroy_ba_stream destroy_params;
3685 };
3686} __packed;
3687
3688static int
f95275c4
YAP		 3689mwl8k_check_ba(struct ieee80211_hw *hw, struct mwl8k_ampdu_stream *stream,
3690 struct ieee80211_vif *vif)
5faa1aff
NS		 3691{
3692 struct mwl8k_cmd_bastream *cmd;
3693 int rc;
3694
3695 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3696 if (cmd == NULL)
3697 return -ENOMEM;
3698
3699 cmd->header.code = cpu_to_le16(MWL8K_CMD_BASTREAM);
3700 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3701
3702 cmd->action = cpu_to_le32(MWL8K_BA_CHECK);
3703
3704 cmd->create_params.queue_id = stream->idx;
3705 memcpy(&cmd->create_params.peer_mac_addr[0], stream->sta->addr,
3706 ETH_ALEN);
3707 cmd->create_params.tid = stream->tid;
3708
3709 cmd->create_params.flags =
3710 cpu_to_le32(BASTREAM_FLAG_IMMEDIATE_TYPE) |
3711 cpu_to_le32(BASTREAM_FLAG_DIRECTION_UPSTREAM);
3712
f95275c4 3713 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
5faa1aff
NS		 3714
3715 kfree(cmd);
3716
3717 return rc;
3718}
3719
3720static int
3721mwl8k_create_ba(struct ieee80211_hw *hw, struct mwl8k_ampdu_stream *stream,
f95275c4 3722 u8 buf_size, struct ieee80211_vif *vif)
5faa1aff
NS		 3723{
3724 struct mwl8k_cmd_bastream *cmd;
3725 int rc;
3726
3727 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3728 if (cmd == NULL)
3729 return -ENOMEM;
3730
3731
3732 cmd->header.code = cpu_to_le16(MWL8K_CMD_BASTREAM);
3733 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3734
3735 cmd->action = cpu_to_le32(MWL8K_BA_CREATE);
3736
3737 cmd->create_params.bar_thrs = cpu_to_le32((u32)buf_size);
3738 cmd->create_params.window_size = cpu_to_le32((u32)buf_size);
3739 cmd->create_params.queue_id = stream->idx;
3740
3741 memcpy(cmd->create_params.peer_mac_addr, stream->sta->addr, ETH_ALEN);
3742 cmd->create_params.tid = stream->tid;
3743 cmd->create_params.curr_seq_no = cpu_to_le16(0);
3744 cmd->create_params.reset_seq_no_flag = 1;
3745
3746 cmd->create_params.param_info =
3747 (stream->sta->ht_cap.ampdu_factor &
3748 IEEE80211_HT_AMPDU_PARM_FACTOR) |
3749 ((stream->sta->ht_cap.ampdu_density << 2) &
3750 IEEE80211_HT_AMPDU_PARM_DENSITY);
3751
3752 cmd->create_params.flags =
3753 cpu_to_le32(BASTREAM_FLAG_IMMEDIATE_TYPE |
3754 BASTREAM_FLAG_DIRECTION_UPSTREAM);
3755
f95275c4 3756 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
5faa1aff
NS		 3757
3758 wiphy_debug(hw->wiphy, "Created a BA stream for %pM : tid %d\n",
3759 stream->sta->addr, stream->tid);
3760 kfree(cmd);
3761
3762 return rc;
3763}
3764
3765static void mwl8k_destroy_ba(struct ieee80211_hw *hw,
3766 struct mwl8k_ampdu_stream *stream)
3767{
3768 struct mwl8k_cmd_bastream *cmd;
3769
3770 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3771 if (cmd == NULL)
3772 return;
3773
3774 cmd->header.code = cpu_to_le16(MWL8K_CMD_BASTREAM);
3775 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3776 cmd->action = cpu_to_le32(MWL8K_BA_DESTROY);
3777
3778 cmd->destroy_params.ba_context = cpu_to_le32(stream->idx);
3779 mwl8k_post_cmd(hw, &cmd->header);
3780
3781 wiphy_debug(hw->wiphy, "Deleted BA stream index %d\n", stream->idx);
3782
3783 kfree(cmd);
3784}
3785
3f5610ff
LB		 3786/*
3787 * CMD_SET_NEW_STN.
3788 */
3789struct mwl8k_cmd_set_new_stn {
3790 struct mwl8k_cmd_pkt header;
3791 __le16 aid;
3792 __u8 mac_addr[6];
3793 __le16 stn_id;
3794 __le16 action;
3795 __le16 rsvd;
3796 __le32 legacy_rates;
3797 __u8 ht_rates[4];
3798 __le16 cap_info;
3799 __le16 ht_capabilities_info;
3800 __u8 mac_ht_param_info;
3801 __u8 rev;
3802 __u8 control_channel;
3803 __u8 add_channel;
3804 __le16 op_mode;
3805 __le16 stbc;
3806 __u8 add_qos_info;
3807 __u8 is_qos_sta;
3808 __le32 fw_sta_ptr;
ba2d3587 3809} __packed;
3f5610ff
LB		 3810
3811#define MWL8K_STA_ACTION_ADD 0
3812#define MWL8K_STA_ACTION_REMOVE 2
3813
3814static int mwl8k_cmd_set_new_stn_add(struct ieee80211_hw *hw,
3815 struct ieee80211_vif *vif,
3816 struct ieee80211_sta *sta)
3817{
3818 struct mwl8k_cmd_set_new_stn *cmd;
8707d026 3819 u32 rates;
3f5610ff
LB		 3820 int rc;
3821
3822 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3823 if (cmd == NULL)
3824 return -ENOMEM;
3825
3826 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
3827 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3828 cmd->aid = cpu_to_le16(sta->aid);
3829 memcpy(cmd->mac_addr, sta->addr, ETH_ALEN);
3830 cmd->stn_id = cpu_to_le16(sta->aid);
3831 cmd->action = cpu_to_le16(MWL8K_STA_ACTION_ADD);
8707d026
LB		 3832 if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
3833 rates = sta->supp_rates[IEEE80211_BAND_2GHZ];
3834 else
3835 rates = sta->supp_rates[IEEE80211_BAND_5GHZ] << 5;
3836 cmd->legacy_rates = cpu_to_le32(rates);
3f5610ff
LB		 3837 if (sta->ht_cap.ht_supported) {
3838 cmd->ht_rates[0] = sta->ht_cap.mcs.rx_mask[0];
3839 cmd->ht_rates[1] = sta->ht_cap.mcs.rx_mask[1];
3840 cmd->ht_rates[2] = sta->ht_cap.mcs.rx_mask[2];
3841 cmd->ht_rates[3] = sta->ht_cap.mcs.rx_mask[3];
3842 cmd->ht_capabilities_info = cpu_to_le16(sta->ht_cap.cap);
3843 cmd->mac_ht_param_info = (sta->ht_cap.ampdu_factor & 3) |
3844 ((sta->ht_cap.ampdu_density & 7) << 2);
3845 cmd->is_qos_sta = 1;
3846 }
3847
aa21d0f6 3848 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
3f5610ff
LB		 3849 kfree(cmd);
3850
3851 return rc;
3852}
3853
b64fe619
LB		 3854static int mwl8k_cmd_set_new_stn_add_self(struct ieee80211_hw *hw,
3855 struct ieee80211_vif *vif)
3856{
3857 struct mwl8k_cmd_set_new_stn *cmd;
3858 int rc;
3859
3860 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3861 if (cmd == NULL)
3862 return -ENOMEM;
3863
3864 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
3865 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3866 memcpy(cmd->mac_addr, vif->addr, ETH_ALEN);
3867
aa21d0f6 3868 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
b64fe619
LB		 3869 kfree(cmd);
3870
3871 return rc;
3872}
3873
3f5610ff
LB		 3874static int mwl8k_cmd_set_new_stn_del(struct ieee80211_hw *hw,
3875 struct ieee80211_vif *vif, u8 *addr)
3876{
3877 struct mwl8k_cmd_set_new_stn *cmd;
3878 int rc;
3879
3880 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3881 if (cmd == NULL)
3882 return -ENOMEM;
3883
3884 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
3885 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3886 memcpy(cmd->mac_addr, addr, ETH_ALEN);
3887 cmd->action = cpu_to_le16(MWL8K_STA_ACTION_REMOVE);
3888
aa21d0f6 3889 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
3f5610ff
LB		 3890 kfree(cmd);
3891
3892 return rc;
3893}
3894
fcdc403c
NS		 3895/*
3896 * CMD_UPDATE_ENCRYPTION.
3897 */
3898
3899#define MAX_ENCR_KEY_LENGTH 16
3900#define MIC_KEY_LENGTH 8
3901
3902struct mwl8k_cmd_update_encryption {
3903 struct mwl8k_cmd_pkt header;
3904
3905 __le32 action;
3906 __le32 reserved;
3907 __u8 mac_addr[6];
3908 __u8 encr_type;
3909
ba30c4a5 3910} __packed;
fcdc403c
NS		 3911
3912struct mwl8k_cmd_set_key {
3913 struct mwl8k_cmd_pkt header;
3914
3915 __le32 action;
3916 __le32 reserved;
3917 __le16 length;
3918 __le16 key_type_id;
3919 __le32 key_info;
3920 __le32 key_id;
3921 __le16 key_len;
3922 __u8 key_material[MAX_ENCR_KEY_LENGTH];
3923 __u8 tkip_tx_mic_key[MIC_KEY_LENGTH];
3924 __u8 tkip_rx_mic_key[MIC_KEY_LENGTH];
3925 __le16 tkip_rsc_low;
3926 __le32 tkip_rsc_high;
3927 __le16 tkip_tsc_low;
3928 __le32 tkip_tsc_high;
3929 __u8 mac_addr[6];
ba30c4a5 3930} __packed;
fcdc403c
NS		 3931
3932enum {
3933 MWL8K_ENCR_ENABLE,
3934 MWL8K_ENCR_SET_KEY,
3935 MWL8K_ENCR_REMOVE_KEY,
3936 MWL8K_ENCR_SET_GROUP_KEY,
3937};
3938
3939#define MWL8K_UPDATE_ENCRYPTION_TYPE_WEP 0
3940#define MWL8K_UPDATE_ENCRYPTION_TYPE_DISABLE 1
3941#define MWL8K_UPDATE_ENCRYPTION_TYPE_TKIP 4
3942#define MWL8K_UPDATE_ENCRYPTION_TYPE_MIXED 7
3943#define MWL8K_UPDATE_ENCRYPTION_TYPE_AES 8
3944
3945enum {
3946 MWL8K_ALG_WEP,
3947 MWL8K_ALG_TKIP,
3948 MWL8K_ALG_CCMP,
3949};
3950
3951#define MWL8K_KEY_FLAG_TXGROUPKEY 0x00000004
3952#define MWL8K_KEY_FLAG_PAIRWISE 0x00000008
3953#define MWL8K_KEY_FLAG_TSC_VALID 0x00000040
3954#define MWL8K_KEY_FLAG_WEP_TXKEY 0x01000000
3955#define MWL8K_KEY_FLAG_MICKEY_VALID 0x02000000
3956
3957static int mwl8k_cmd_update_encryption_enable(struct ieee80211_hw *hw,
3958 struct ieee80211_vif *vif,
3959 u8 *addr,
3960 u8 encr_type)
3961{
3962 struct mwl8k_cmd_update_encryption *cmd;
3963 int rc;
3964
3965 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3966 if (cmd == NULL)
3967 return -ENOMEM;
3968
3969 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_ENCRYPTION);
3970 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3971 cmd->action = cpu_to_le32(MWL8K_ENCR_ENABLE);
3972 memcpy(cmd->mac_addr, addr, ETH_ALEN);
3973 cmd->encr_type = encr_type;
3974
3975 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
3976 kfree(cmd);
3977
3978 return rc;
3979}
3980
3981static int mwl8k_encryption_set_cmd_info(struct mwl8k_cmd_set_key *cmd,
3982 u8 *addr,
3983 struct ieee80211_key_conf *key)
3984{
3985 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_ENCRYPTION);
3986 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3987 cmd->length = cpu_to_le16(sizeof(*cmd) -
3988 offsetof(struct mwl8k_cmd_set_key, length));
3989 cmd->key_id = cpu_to_le32(key->keyidx);
3990 cmd->key_len = cpu_to_le16(key->keylen);
3991 memcpy(cmd->mac_addr, addr, ETH_ALEN);
3992
3993 switch (key->cipher) {
3994 case WLAN_CIPHER_SUITE_WEP40:
3995 case WLAN_CIPHER_SUITE_WEP104:
3996 cmd->key_type_id = cpu_to_le16(MWL8K_ALG_WEP);
3997 if (key->keyidx == 0)
3998 cmd->key_info = cpu_to_le32(MWL8K_KEY_FLAG_WEP_TXKEY);
3999
4000 break;
4001 case WLAN_CIPHER_SUITE_TKIP:
4002 cmd->key_type_id = cpu_to_le16(MWL8K_ALG_TKIP);
4003 cmd->key_info = (key->flags & IEEE80211_KEY_FLAG_PAIRWISE)
4004 ? cpu_to_le32(MWL8K_KEY_FLAG_PAIRWISE)
4005 : cpu_to_le32(MWL8K_KEY_FLAG_TXGROUPKEY);
4006 cmd->key_info |= cpu_to_le32(MWL8K_KEY_FLAG_MICKEY_VALID
4007 | MWL8K_KEY_FLAG_TSC_VALID);
4008 break;
4009 case WLAN_CIPHER_SUITE_CCMP:
4010 cmd->key_type_id = cpu_to_le16(MWL8K_ALG_CCMP);
4011 cmd->key_info = (key->flags & IEEE80211_KEY_FLAG_PAIRWISE)
4012 ? cpu_to_le32(MWL8K_KEY_FLAG_PAIRWISE)
4013 : cpu_to_le32(MWL8K_KEY_FLAG_TXGROUPKEY);
4014 break;
4015 default:
4016 return -ENOTSUPP;
4017 }
4018
4019 return 0;
4020}
4021
4022static int mwl8k_cmd_encryption_set_key(struct ieee80211_hw *hw,
4023 struct ieee80211_vif *vif,
4024 u8 *addr,
4025 struct ieee80211_key_conf *key)
4026{
4027 struct mwl8k_cmd_set_key *cmd;
4028 int rc;
4029 int keymlen;
4030 u32 action;
4031 u8 idx;
4032 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
4033
4034 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
4035 if (cmd == NULL)
4036 return -ENOMEM;
4037
4038 rc = mwl8k_encryption_set_cmd_info(cmd, addr, key);
4039 if (rc < 0)
4040 goto done;
4041
4042 idx = key->keyidx;
4043
4044 if (key->flags & IEEE80211_KEY_FLAG_PAIRWISE)
4045 action = MWL8K_ENCR_SET_KEY;
4046 else
4047 action = MWL8K_ENCR_SET_GROUP_KEY;
4048
4049 switch (key->cipher) {
4050 case WLAN_CIPHER_SUITE_WEP40:
4051 case WLAN_CIPHER_SUITE_WEP104:
4052 if (!mwl8k_vif->wep_key_conf[idx].enabled) {
4053 memcpy(mwl8k_vif->wep_key_conf[idx].key, key,
4054 sizeof(*key) + key->keylen);
4055 mwl8k_vif->wep_key_conf[idx].enabled = 1;
4056 }
4057
9b571e24 4058 keymlen = key->keylen;
fcdc403c
NS		 4059 action = MWL8K_ENCR_SET_KEY;
4060 break;
4061 case WLAN_CIPHER_SUITE_TKIP:
4062 keymlen = MAX_ENCR_KEY_LENGTH + 2 * MIC_KEY_LENGTH;
4063 break;
4064 case WLAN_CIPHER_SUITE_CCMP:
4065 keymlen = key->keylen;
4066 break;
4067 default:
4068 rc = -ENOTSUPP;
4069 goto done;
4070 }
4071
4072 memcpy(cmd->key_material, key->key, keymlen);
4073 cmd->action = cpu_to_le32(action);
4074
4075 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
4076done:
4077 kfree(cmd);
4078
4079 return rc;
4080}
4081
4082static int mwl8k_cmd_encryption_remove_key(struct ieee80211_hw *hw,
4083 struct ieee80211_vif *vif,
4084 u8 *addr,
4085 struct ieee80211_key_conf *key)
4086{
4087 struct mwl8k_cmd_set_key *cmd;
4088 int rc;
4089 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
4090
4091 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
4092 if (cmd == NULL)
4093 return -ENOMEM;
4094
4095 rc = mwl8k_encryption_set_cmd_info(cmd, addr, key);
4096 if (rc < 0)
4097 goto done;
4098
4099 if (key->cipher == WLAN_CIPHER_SUITE_WEP40 ||
d981e059 4100 key->cipher == WLAN_CIPHER_SUITE_WEP104)
fcdc403c
NS		 4101 mwl8k_vif->wep_key_conf[key->keyidx].enabled = 0;
4102
4103 cmd->action = cpu_to_le32(MWL8K_ENCR_REMOVE_KEY);
4104
4105 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
4106done:
4107 kfree(cmd);
4108
4109 return rc;
4110}
4111
4112static int mwl8k_set_key(struct ieee80211_hw *hw,
4113 enum set_key_cmd cmd_param,
4114 struct ieee80211_vif *vif,
4115 struct ieee80211_sta *sta,
4116 struct ieee80211_key_conf *key)
4117{
4118 int rc = 0;
4119 u8 encr_type;
4120 u8 *addr;
4121 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
4122
4123 if (vif->type == NL80211_IFTYPE_STATION)
4124 return -EOPNOTSUPP;
4125
4126 if (sta == NULL)
ff7e9f99 4127 addr = vif->addr;
fcdc403c
NS		 4128 else
4129 addr = sta->addr;
4130
4131 if (cmd_param == SET_KEY) {
fcdc403c
NS		 4132 rc = mwl8k_cmd_encryption_set_key(hw, vif, addr, key);
4133 if (rc)
4134 goto out;
4135
4136 if ((key->cipher == WLAN_CIPHER_SUITE_WEP40)
4137 || (key->cipher == WLAN_CIPHER_SUITE_WEP104))
4138 encr_type = MWL8K_UPDATE_ENCRYPTION_TYPE_WEP;
4139 else
4140 encr_type = MWL8K_UPDATE_ENCRYPTION_TYPE_MIXED;
4141
4142 rc = mwl8k_cmd_update_encryption_enable(hw, vif, addr,
4143 encr_type);
4144 if (rc)
4145 goto out;
4146
4147 mwl8k_vif->is_hw_crypto_enabled = true;
4148
4149 } else {
4150 rc = mwl8k_cmd_encryption_remove_key(hw, vif, addr, key);
4151
4152 if (rc)
4153 goto out;
fcdc403c
NS		 4154 }
4155out:
4156 return rc;
4157}
4158
55489b6e
LB		 4159/*
4160 * CMD_UPDATE_STADB.
4161 */
25d81b1e
LB		 4162struct ewc_ht_info {
4163 __le16 control1;
4164 __le16 control2;
4165 __le16 control3;
ba2d3587 4166} __packed;
25d81b1e
LB		 4167
4168struct peer_capability_info {
4169 /* Peer type - AP vs. STA. */
4170 __u8 peer_type;
4171
4172 /* Basic 802.11 capabilities from assoc resp. */
4173 __le16 basic_caps;
4174
4175 /* Set if peer supports 802.11n high throughput (HT). */
4176 __u8 ht_support;
4177
4178 /* Valid if HT is supported. */
4179 __le16 ht_caps;
4180 __u8 extended_ht_caps;
4181 struct ewc_ht_info ewc_info;
4182
4183 /* Legacy rate table. Intersection of our rates and peer rates. */
4184 __u8 legacy_rates[12];
4185
4186 /* HT rate table. Intersection of our rates and peer rates. */
4187 __u8 ht_rates[16];
4188 __u8 pad[16];
4189
4190 /* If set, interoperability mode, no proprietary extensions. */
4191 __u8 interop;
4192 __u8 pad2;
4193 __u8 station_id;
4194 __le16 amsdu_enabled;
ba2d3587 4195} __packed;
25d81b1e 4196
55489b6e
LB		 4197struct mwl8k_cmd_update_stadb {
4198 struct mwl8k_cmd_pkt header;
4199
4200 /* See STADB_ACTION_TYPE */
4201 __le32 action;
4202
4203 /* Peer MAC address */
4204 __u8 peer_addr[ETH_ALEN];
4205
4206 __le32 reserved;
4207
4208 /* Peer info - valid during add/update. */
4209 struct peer_capability_info peer_info;
ba2d3587 4210} __packed;
55489b6e 4211
a680400e
LB		 4212#define MWL8K_STA_DB_MODIFY_ENTRY 1
4213#define MWL8K_STA_DB_DEL_ENTRY 2
4214
4215/* Peer Entry flags - used to define the type of the peer node */
4216#define MWL8K_PEER_TYPE_ACCESSPOINT 2
4217
4218static int mwl8k_cmd_update_stadb_add(struct ieee80211_hw *hw,
c6e96010 4219 struct ieee80211_vif *vif,
13935e2c 4220 struct ieee80211_sta *sta)
55489b6e 4221{
55489b6e 4222 struct mwl8k_cmd_update_stadb *cmd;
a680400e 4223 struct peer_capability_info *p;
8707d026 4224 u32 rates;
55489b6e
LB		 4225 int rc;
4226
4227 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
4228 if (cmd == NULL)
4229 return -ENOMEM;
4230
4231 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
4232 cmd->header.length = cpu_to_le16(sizeof(*cmd));
a680400e 4233 cmd->action = cpu_to_le32(MWL8K_STA_DB_MODIFY_ENTRY);
13935e2c 4234 memcpy(cmd->peer_addr, sta->addr, ETH_ALEN);
55489b6e 4235
a680400e
LB		 4236 p = &cmd->peer_info;
4237 p->peer_type = MWL8K_PEER_TYPE_ACCESSPOINT;
4238 p->basic_caps = cpu_to_le16(vif->bss_conf.assoc_capability);
13935e2c 4239 p->ht_support = sta->ht_cap.ht_supported;
b603742f 4240 p->ht_caps = cpu_to_le16(sta->ht_cap.cap);
13935e2c
LB		 4241 p->extended_ht_caps = (sta->ht_cap.ampdu_factor & 3) |
4242 ((sta->ht_cap.ampdu_density & 7) << 2);
8707d026
LB		 4243 if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
4244 rates = sta->supp_rates[IEEE80211_BAND_2GHZ];
4245 else
4246 rates = sta->supp_rates[IEEE80211_BAND_5GHZ] << 5;
4247 legacy_rate_mask_to_array(p->legacy_rates, rates);
13935e2c 4248 memcpy(p->ht_rates, sta->ht_cap.mcs.rx_mask, 16);
a680400e
LB		 4249 p->interop = 1;
4250 p->amsdu_enabled = 0;
4251
4252 rc = mwl8k_post_cmd(hw, &cmd->header);
4253 kfree(cmd);
4254
4255 return rc ? rc : p->station_id;
4256}
4257
4258static int mwl8k_cmd_update_stadb_del(struct ieee80211_hw *hw,
4259 struct ieee80211_vif *vif, u8 *addr)
4260{
4261 struct mwl8k_cmd_update_stadb *cmd;
4262 int rc;
4263
4264 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
4265 if (cmd == NULL)
4266 return -ENOMEM;
4267
4268 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
4269 cmd->header.length = cpu_to_le16(sizeof(*cmd));
4270 cmd->action = cpu_to_le32(MWL8K_STA_DB_DEL_ENTRY);
bbfd9128 4271 memcpy(cmd->peer_addr, addr, ETH_ALEN);
55489b6e 4272
a680400e 4273 rc = mwl8k_post_cmd(hw, &cmd->header);
55489b6e
LB		 4274 kfree(cmd);
4275
4276 return rc;
4277}
4278
a66098da
LB		 4279
4280/*
4281 * Interrupt handling.
4282 */
4283static irqreturn_t mwl8k_interrupt(int irq, void *dev_id)
4284{
4285 struct ieee80211_hw *hw = dev_id;
4286 struct mwl8k_priv *priv = hw->priv;
4287 u32 status;
4288
4289 status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
a66098da
LB		 4290 if (!status)
4291 return IRQ_NONE;
4292
1e9f9de3
LB		 4293 if (status & MWL8K_A2H_INT_TX_DONE) {
4294 status &= ~MWL8K_A2H_INT_TX_DONE;
4295 tasklet_schedule(&priv->poll_tx_task);
4296 }
4297
a66098da 4298 if (status & MWL8K_A2H_INT_RX_READY) {
67e2eb27
LB		 4299 status &= ~MWL8K_A2H_INT_RX_READY;
4300 tasklet_schedule(&priv->poll_rx_task);
a66098da
LB		 4301 }
4302
3aefc37e
NS		 4303 if (status & MWL8K_A2H_INT_BA_WATCHDOG) {
4304 status &= ~MWL8K_A2H_INT_BA_WATCHDOG;
4305 ieee80211_queue_work(hw, &priv->watchdog_ba_handle);
4306 }
4307
67e2eb27
LB		 4308 if (status)
4309 iowrite32(~status, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
4310
a66098da 4311 if (status & MWL8K_A2H_INT_OPC_DONE) {
618952a7 4312 if (priv->hostcmd_wait != NULL)
a66098da 4313 complete(priv->hostcmd_wait);
a66098da
LB		 4314 }
4315
4316 if (status & MWL8K_A2H_INT_QUEUE_EMPTY) {
618952a7 4317 if (!mutex_is_locked(&priv->fw_mutex) &&
88de754a 4318 priv->radio_on && priv->pending_tx_pkts)
618952a7 4319 mwl8k_tx_start(priv);
a66098da
LB		 4320 }
4321
4322 return IRQ_HANDLED;
4323}
4324
1e9f9de3
LB		 4325static void mwl8k_tx_poll(unsigned long data)
4326{
4327 struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
4328 struct mwl8k_priv *priv = hw->priv;
4329 int limit;
4330 int i;
4331
4332 limit = 32;
4333
4334 spin_lock_bh(&priv->tx_lock);
4335
e600707b 4336 for (i = 0; i < mwl8k_tx_queues(priv); i++)
1e9f9de3
LB		 4337 limit -= mwl8k_txq_reclaim(hw, i, limit, 0);
4338
4339 if (!priv->pending_tx_pkts && priv->tx_wait != NULL) {
4340 complete(priv->tx_wait);
4341 priv->tx_wait = NULL;
4342 }
4343
4344 spin_unlock_bh(&priv->tx_lock);
4345
4346 if (limit) {
4347 writel(~MWL8K_A2H_INT_TX_DONE,
4348 priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
4349 } else {
4350 tasklet_schedule(&priv->poll_tx_task);
4351 }
4352}
4353
67e2eb27
LB		 4354static void mwl8k_rx_poll(unsigned long data)
4355{
4356 struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
4357 struct mwl8k_priv *priv = hw->priv;
4358 int limit;
4359
4360 limit = 32;
4361 limit -= rxq_process(hw, 0, limit);
4362 limit -= rxq_refill(hw, 0, limit);
4363
4364 if (limit) {
4365 writel(~MWL8K_A2H_INT_RX_READY,
4366 priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
4367 } else {
4368 tasklet_schedule(&priv->poll_rx_task);
4369 }
4370}
4371
a66098da
LB		 4372
4373/*
4374 * Core driver operations.
4375 */
36323f81
TH		 4376static void mwl8k_tx(struct ieee80211_hw *hw,
4377 struct ieee80211_tx_control *control,
4378 struct sk_buff *skb)
a66098da
LB		 4379{
4380 struct mwl8k_priv *priv = hw->priv;
4381 int index = skb_get_queue_mapping(skb);
a66098da 4382
9189c100 4383 if (!priv->radio_on) {
c96c31e4
JP		 4384 wiphy_debug(hw->wiphy,
4385 "dropped TX frame since radio disabled\n");
a66098da 4386 dev_kfree_skb(skb);
7bb45683 4387 return;
a66098da
LB		 4388 }
4389
36323f81 4390 mwl8k_txq_xmit(hw, index, control->sta, skb);
a66098da
LB		 4391}
4392
a66098da
LB		 4393static int mwl8k_start(struct ieee80211_hw *hw)
4394{
a66098da
LB		 4395 struct mwl8k_priv *priv = hw->priv;
4396 int rc;
4397
a0607fd3 4398 rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
a66098da
LB		 4399 IRQF_SHARED, MWL8K_NAME, hw);
4400 if (rc) {
bf3ca7f7 4401 priv->irq = -1;
5db55844 4402 wiphy_err(hw->wiphy, "failed to register IRQ handler\n");
2ec610cb 4403 return -EIO;
a66098da 4404 }
bf3ca7f7 4405 priv->irq = priv->pdev->irq;
a66098da 4406
67e2eb27 4407 /* Enable TX reclaim and RX tasklets. */
1e9f9de3 4408 tasklet_enable(&priv->poll_tx_task);
67e2eb27 4409 tasklet_enable(&priv->poll_rx_task);
2ec610cb 4410
a66098da 4411 /* Enable interrupts */
c23b5a69 4412 iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
12488e01
NS		 4413 iowrite32(MWL8K_A2H_EVENTS,
4414 priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
a66098da 4415
2ec610cb
LB		 4416 rc = mwl8k_fw_lock(hw);
4417 if (!rc) {
55489b6e 4418 rc = mwl8k_cmd_radio_enable(hw);
a66098da 4419
5e4cf166
LB		 4420 if (!priv->ap_fw) {
4421 if (!rc)
55489b6e 4422 rc = mwl8k_cmd_enable_sniffer(hw, 0);
a66098da 4423
5e4cf166
LB		 4424 if (!rc)
4425 rc = mwl8k_cmd_set_pre_scan(hw);
4426
4427 if (!rc)
4428 rc = mwl8k_cmd_set_post_scan(hw,
4429 "\x00\x00\x00\x00\x00\x00");
4430 }
2ec610cb
LB		 4431
4432 if (!rc)
55489b6e 4433 rc = mwl8k_cmd_set_rateadapt_mode(hw, 0);
a66098da 4434
2ec610cb 4435 if (!rc)
55489b6e 4436 rc = mwl8k_cmd_set_wmm_mode(hw, 0);
a66098da 4437
2ec610cb
LB		 4438 mwl8k_fw_unlock(hw);
4439 }
4440
4441 if (rc) {
4442 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
4443 free_irq(priv->pdev->irq, hw);
bf3ca7f7 4444 priv->irq = -1;
1e9f9de3 4445 tasklet_disable(&priv->poll_tx_task);
67e2eb27 4446 tasklet_disable(&priv->poll_rx_task);
2ec610cb 4447 }
a66098da
LB		 4448
4449 return rc;
4450}
4451
a66098da
LB		 4452static void mwl8k_stop(struct ieee80211_hw *hw)
4453{
a66098da
LB		 4454 struct mwl8k_priv *priv = hw->priv;
4455 int i;
4456
6b6accc3
YAP		 4457 if (!priv->hw_restart_in_progress)
4458 mwl8k_cmd_radio_disable(hw);
a66098da
LB		 4459
4460 ieee80211_stop_queues(hw);
4461
a66098da 4462 /* Disable interrupts */
a66098da 4463 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
bf3ca7f7
BC		 4464 if (priv->irq != -1) {
4465 free_irq(priv->pdev->irq, hw);
4466 priv->irq = -1;
4467 }
a66098da
LB		 4468
4469 /* Stop finalize join worker */
4470 cancel_work_sync(&priv->finalize_join_worker);
3aefc37e 4471 cancel_work_sync(&priv->watchdog_ba_handle);
a66098da
LB		 4472 if (priv->beacon_skb != NULL)
4473 dev_kfree_skb(priv->beacon_skb);
4474
67e2eb27 4475 /* Stop TX reclaim and RX tasklets. */
1e9f9de3 4476 tasklet_disable(&priv->poll_tx_task);
67e2eb27 4477 tasklet_disable(&priv->poll_rx_task);
a66098da 4478
a66098da 4479 /* Return all skbs to mac80211 */
e600707b 4480 for (i = 0; i < mwl8k_tx_queues(priv); i++)
efb7c49a 4481 mwl8k_txq_reclaim(hw, i, INT_MAX, 1);
a66098da
LB		 4482}
4483
0863ade8
BC		 4484static int mwl8k_reload_firmware(struct ieee80211_hw *hw, char *fw_image);
4485
a66098da 4486static int mwl8k_add_interface(struct ieee80211_hw *hw,
f5bb87cf 4487 struct ieee80211_vif *vif)
a66098da
LB		 4488{
4489 struct mwl8k_priv *priv = hw->priv;
4490 struct mwl8k_vif *mwl8k_vif;
ee0ddf18 4491 u32 macids_supported;
0863ade8
BC		 4492 int macid, rc;
4493 struct mwl8k_device_info *di;
a66098da 4494
a43c49a8
LB		 4495 /*
4496 * Reject interface creation if sniffer mode is active, as
4497 * STA operation is mutually exclusive with hardware sniffer
b64fe619 4498 * mode. (Sniffer mode is only used on STA firmware.)
a43c49a8
LB		 4499 */
4500 if (priv->sniffer_enabled) {
c96c31e4
JP		 4501 wiphy_info(hw->wiphy,
4502 "unable to create STA interface because sniffer mode is enabled\n");
a43c49a8
LB		 4503 return -EINVAL;
4504 }
4505
0863ade8 4506 di = priv->device_info;
ee0ddf18
LB		 4507 switch (vif->type) {
4508 case NL80211_IFTYPE_AP:
0863ade8
BC		 4509 if (!priv->ap_fw && di->fw_image_ap) {
4510 /* we must load the ap fw to meet this request */
4511 if (!list_empty(&priv->vif_list))
4512 return -EBUSY;
4513 rc = mwl8k_reload_firmware(hw, di->fw_image_ap);
4514 if (rc)
4515 return rc;
4516 }
ee0ddf18
LB		 4517 macids_supported = priv->ap_macids_supported;
4518 break;
4519 case NL80211_IFTYPE_STATION:
0863ade8
BC		 4520 if (priv->ap_fw && di->fw_image_sta) {
4521 /* we must load the sta fw to meet this request */
4522 if (!list_empty(&priv->vif_list))
4523 return -EBUSY;
4524 rc = mwl8k_reload_firmware(hw, di->fw_image_sta);
4525 if (rc)
4526 return rc;
4527 }
ee0ddf18
LB		 4528 macids_supported = priv->sta_macids_supported;
4529 break;
4530 default:
4531 return -EINVAL;
4532 }
4533
4534 macid = ffs(macids_supported & ~priv->macids_used);
4535 if (!macid--)
4536 return -EBUSY;
4537
f5bb87cf 4538 /* Setup driver private area. */
1ed32e4f 4539 mwl8k_vif = MWL8K_VIF(vif);
a66098da 4540 memset(mwl8k_vif, 0, sizeof(*mwl8k_vif));
f5bb87cf 4541 mwl8k_vif->vif = vif;
ee0ddf18 4542 mwl8k_vif->macid = macid;
a66098da 4543 mwl8k_vif->seqno = 0;
d9a07d49
NS		 4544 memcpy(mwl8k_vif->bssid, vif->addr, ETH_ALEN);
4545 mwl8k_vif->is_hw_crypto_enabled = false;
a66098da 4546
aa21d0f6
LB		 4547 /* Set the mac address. */
4548 mwl8k_cmd_set_mac_addr(hw, vif, vif->addr);
4549
4550 if (priv->ap_fw)
4551 mwl8k_cmd_set_new_stn_add_self(hw, vif);
4552
ee0ddf18 4553 priv->macids_used |= 1 << mwl8k_vif->macid;
f5bb87cf 4554 list_add_tail(&mwl8k_vif->list, &priv->vif_list);
a66098da
LB		 4555
4556 return 0;
4557}
4558
6b6accc3
YAP		 4559static void mwl8k_remove_vif(struct mwl8k_priv *priv, struct mwl8k_vif *vif)
4560{
4561 /* Has ieee80211_restart_hw re-added the removed interfaces? */
4562 if (!priv->macids_used)
4563 return;
4564
4565 priv->macids_used &= ~(1 << vif->macid);
4566 list_del(&vif->list);
4567}
4568
a66098da 4569static void mwl8k_remove_interface(struct ieee80211_hw *hw,
1ed32e4f 4570 struct ieee80211_vif *vif)
a66098da
LB		 4571{
4572 struct mwl8k_priv *priv = hw->priv;
f5bb87cf 4573 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
a66098da 4574
b64fe619
LB		 4575 if (priv->ap_fw)
4576 mwl8k_cmd_set_new_stn_del(hw, vif, vif->addr);
4577
197a4e4e 4578 mwl8k_cmd_del_mac_addr(hw, vif, vif->addr);
32060e1b 4579
6b6accc3
YAP		 4580 mwl8k_remove_vif(priv, mwl8k_vif);
4581}
4582
4583static void mwl8k_hw_restart_work(struct work_struct *work)
4584{
4585 struct mwl8k_priv *priv =
4586 container_of(work, struct mwl8k_priv, fw_reload);
4587 struct ieee80211_hw *hw = priv->hw;
4588 struct mwl8k_device_info *di;
4589 int rc;
4590
4591 /* If some command is waiting for a response, clear it */
4592 if (priv->hostcmd_wait != NULL) {
4593 complete(priv->hostcmd_wait);
4594 priv->hostcmd_wait = NULL;
4595 }
4596
4597 priv->hw_restart_owner = current;
4598 di = priv->device_info;
4599 mwl8k_fw_lock(hw);
4600
4601 if (priv->ap_fw)
4602 rc = mwl8k_reload_firmware(hw, di->fw_image_ap);
4603 else
4604 rc = mwl8k_reload_firmware(hw, di->fw_image_sta);
4605
4606 if (rc)
4607 goto fail;
4608
4609 priv->hw_restart_owner = NULL;
4610 priv->hw_restart_in_progress = false;
4611
4612 /*
4613 * This unlock will wake up the queues and
4614 * also opens the command path for other
4615 * commands
4616 */
4617 mwl8k_fw_unlock(hw);
4618
4619 ieee80211_restart_hw(hw);
4620
4621 wiphy_err(hw->wiphy, "Firmware restarted successfully\n");
4622
4623 return;
4624fail:
4625 mwl8k_fw_unlock(hw);
4626
4627 wiphy_err(hw->wiphy, "Firmware restart failed\n");
a66098da
LB		 4628}
4629
ee03a932 4630static int mwl8k_config(struct ieee80211_hw *hw, u32 changed)
a66098da 4631{
a66098da
LB		 4632 struct ieee80211_conf *conf = &hw->conf;
4633 struct mwl8k_priv *priv = hw->priv;
ee03a932 4634 int rc;
a66098da 4635
7595d67a 4636 if (conf->flags & IEEE80211_CONF_IDLE) {
55489b6e 4637 mwl8k_cmd_radio_disable(hw);
ee03a932 4638 return 0;
7595d67a
LB		 4639 }
4640
ee03a932
LB		 4641 rc = mwl8k_fw_lock(hw);
4642 if (rc)
4643 return rc;
a66098da 4644
55489b6e 4645 rc = mwl8k_cmd_radio_enable(hw);
ee03a932
LB		 4646 if (rc)
4647 goto out;
a66098da 4648
610677d2 4649 rc = mwl8k_cmd_set_rf_channel(hw, conf);
ee03a932
LB		 4650 if (rc)
4651 goto out;
4652
a66098da
LB		 4653 if (conf->power_level > 18)
4654 conf->power_level = 18;
a66098da 4655
08b06347 4656 if (priv->ap_fw) {
03217087
NS		 4657
4658 if (conf->flags & IEEE80211_CONF_CHANGE_POWER) {
4659 rc = mwl8k_cmd_tx_power(hw, conf, conf->power_level);
4660 if (rc)
4661 goto out;
4662 }
41fdf097 4663
da62b761
NS		 4664 rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_RX, 0x3);
4665 if (rc)
4666 wiphy_warn(hw->wiphy, "failed to set # of RX antennas");
4667 rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_TX, 0x7);
4668 if (rc)
4669 wiphy_warn(hw->wiphy, "failed to set # of TX antennas");
4670
08b06347 4671 } else {
41fdf097
NS		 4672 rc = mwl8k_cmd_rf_tx_power(hw, conf->power_level);
4673 if (rc)
4674 goto out;
08b06347
LB		 4675 rc = mwl8k_cmd_mimo_config(hw, 0x7, 0x7);
4676 }
a66098da 4677
ee03a932
LB		 4678out:
4679 mwl8k_fw_unlock(hw);
a66098da 4680
ee03a932 4681 return rc;
a66098da
LB		 4682}
4683
b64fe619
LB		 4684static void
4685mwl8k_bss_info_changed_sta(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
4686 struct ieee80211_bss_conf *info, u32 changed)
a66098da 4687{
a66098da 4688 struct mwl8k_priv *priv = hw->priv;
ba30c4a5 4689 u32 ap_legacy_rates = 0;
13935e2c 4690 u8 ap_mcs_rates[16];
3a980d0a
LB		 4691 int rc;
4692
c3cbbe8a 4693 if (mwl8k_fw_lock(hw))
3a980d0a 4694 return;
a66098da 4695
c3cbbe8a
LB		 4696 /*
4697 * No need to capture a beacon if we're no longer associated.
4698 */
4699 if ((changed & BSS_CHANGED_ASSOC) && !vif->bss_conf.assoc)
4700 priv->capture_beacon = false;
3a980d0a 4701
c3cbbe8a 4702 /*
13935e2c 4703 * Get the AP's legacy and MCS rates.
c3cbbe8a 4704 */
7dc6a7a7 4705 if (vif->bss_conf.assoc) {
c6e96010 4706 struct ieee80211_sta *ap;
c97470dd 4707
c6e96010 4708 rcu_read_lock();
c6e96010 4709
c3cbbe8a
LB		 4710 ap = ieee80211_find_sta(vif, vif->bss_conf.bssid);
4711 if (ap == NULL) {
4712 rcu_read_unlock();
c6e96010 4713 goto out;
c3cbbe8a
LB		 4714 }
4715
8707d026
LB		 4716 if (hw->conf.channel->band == IEEE80211_BAND_2GHZ) {
4717 ap_legacy_rates = ap->supp_rates[IEEE80211_BAND_2GHZ];
4718 } else {
4719 ap_legacy_rates =
4720 ap->supp_rates[IEEE80211_BAND_5GHZ] << 5;
4721 }
13935e2c 4722 memcpy(ap_mcs_rates, ap->ht_cap.mcs.rx_mask, 16);
c3cbbe8a
LB		 4723
4724 rcu_read_unlock();
4725 }
c6e96010 4726
c3cbbe8a 4727 if ((changed & BSS_CHANGED_ASSOC) && vif->bss_conf.assoc) {
13935e2c 4728 rc = mwl8k_cmd_set_rate(hw, vif, ap_legacy_rates, ap_mcs_rates);
3a980d0a
LB		 4729 if (rc)
4730 goto out;
a66098da 4731
b71ed2c6 4732 rc = mwl8k_cmd_use_fixed_rate_sta(hw);
3a980d0a
LB		 4733 if (rc)
4734 goto out;
c3cbbe8a 4735 }
a66098da 4736
c3cbbe8a 4737 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
7dc6a7a7
LB		 4738 rc = mwl8k_set_radio_preamble(hw,
4739 vif->bss_conf.use_short_preamble);
3a980d0a
LB		 4740 if (rc)
4741 goto out;
c3cbbe8a 4742 }
a66098da 4743
c3cbbe8a 4744 if (changed & BSS_CHANGED_ERP_SLOT) {
7dc6a7a7 4745 rc = mwl8k_cmd_set_slot(hw, vif->bss_conf.use_short_slot);
3a980d0a
LB		 4746 if (rc)
4747 goto out;
c3cbbe8a 4748 }
a66098da 4749
c97470dd
LB		 4750 if (vif->bss_conf.assoc &&
4751 (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_ERP_CTS_PROT |
4752 BSS_CHANGED_HT))) {
c3cbbe8a 4753 rc = mwl8k_cmd_set_aid(hw, vif, ap_legacy_rates);
3a980d0a
LB		 4754 if (rc)
4755 goto out;
c3cbbe8a 4756 }
a66098da 4757
c3cbbe8a
LB		 4758 if (vif->bss_conf.assoc &&
4759 (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_BEACON_INT))) {
a66098da
LB		 4760 /*
4761 * Finalize the join. Tell rx handler to process
4762 * next beacon from our BSSID.
4763 */
0a11dfc3 4764 memcpy(priv->capture_bssid, vif->bss_conf.bssid, ETH_ALEN);
a66098da 4765 priv->capture_beacon = true;
a66098da
LB		 4766 }
4767
3a980d0a
LB		 4768out:
4769 mwl8k_fw_unlock(hw);
a66098da
LB		 4770}
4771
b64fe619
LB		 4772static void
4773mwl8k_bss_info_changed_ap(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
4774 struct ieee80211_bss_conf *info, u32 changed)
4775{
4776 int rc;
4777
4778 if (mwl8k_fw_lock(hw))
4779 return;
4780
4781 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
4782 rc = mwl8k_set_radio_preamble(hw,
4783 vif->bss_conf.use_short_preamble);
4784 if (rc)
4785 goto out;
4786 }
4787
4788 if (changed & BSS_CHANGED_BASIC_RATES) {
4789 int idx;
4790 int rate;
4791
4792 /*
4793 * Use lowest supported basic rate for multicasts
4794 * and management frames (such as probe responses --
4795 * beacons will always go out at 1 Mb/s).
4796 */
4797 idx = ffs(vif->bss_conf.basic_rates);
8707d026
LB		 4798 if (idx)
4799 idx--;
4800
4801 if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
4802 rate = mwl8k_rates_24[idx].hw_value;
4803 else
4804 rate = mwl8k_rates_50[idx].hw_value;
b64fe619
LB		 4805
4806 mwl8k_cmd_use_fixed_rate_ap(hw, rate, rate);
4807 }
4808
4809 if (changed & (BSS_CHANGED_BEACON_INT | BSS_CHANGED_BEACON)) {
4810 struct sk_buff *skb;
4811
4812 skb = ieee80211_beacon_get(hw, vif);
4813 if (skb != NULL) {
aa21d0f6 4814 mwl8k_cmd_set_beacon(hw, vif, skb->data, skb->len);
b64fe619
LB		 4815 kfree_skb(skb);
4816 }
4817 }
4818
4819 if (changed & BSS_CHANGED_BEACON_ENABLED)
aa21d0f6 4820 mwl8k_cmd_bss_start(hw, vif, info->enable_beacon);
b64fe619
LB		 4821
4822out:
4823 mwl8k_fw_unlock(hw);
4824}
4825
4826static void
4827mwl8k_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
4828 struct ieee80211_bss_conf *info, u32 changed)
4829{
4830 struct mwl8k_priv *priv = hw->priv;
4831
4832 if (!priv->ap_fw)
4833 mwl8k_bss_info_changed_sta(hw, vif, info, changed);
4834 else
4835 mwl8k_bss_info_changed_ap(hw, vif, info, changed);
4836}
4837
e81cd2d6 4838static u64 mwl8k_prepare_multicast(struct ieee80211_hw *hw,
22bedad3 4839 struct netdev_hw_addr_list *mc_list)
e81cd2d6
LB		 4840{
4841 struct mwl8k_cmd_pkt *cmd;
4842
447ced07
LB		 4843 /*
4844 * Synthesize and return a command packet that programs the
4845 * hardware multicast address filter. At this point we don't
4846 * know whether FIF_ALLMULTI is being requested, but if it is,
4847 * we'll end up throwing this packet away and creating a new
4848 * one in mwl8k_configure_filter().
4849 */
22bedad3 4850 cmd = __mwl8k_cmd_mac_multicast_adr(hw, 0, mc_list);
e81cd2d6
LB		 4851
4852 return (unsigned long)cmd;
4853}
4854
a43c49a8
LB		 4855static int
4856mwl8k_configure_filter_sniffer(struct ieee80211_hw *hw,
4857 unsigned int changed_flags,
4858 unsigned int *total_flags)
4859{
4860 struct mwl8k_priv *priv = hw->priv;
4861
4862 /*
4863 * Hardware sniffer mode is mutually exclusive with STA
4864 * operation, so refuse to enable sniffer mode if a STA
4865 * interface is active.
4866 */
f5bb87cf 4867 if (!list_empty(&priv->vif_list)) {
a43c49a8 4868 if (net_ratelimit())
c96c31e4
JP		 4869 wiphy_info(hw->wiphy,
4870 "not enabling sniffer mode because STA interface is active\n");
a43c49a8
LB		 4871 return 0;
4872 }
4873
4874 if (!priv->sniffer_enabled) {
55489b6e 4875 if (mwl8k_cmd_enable_sniffer(hw, 1))
a43c49a8
LB		 4876 return 0;
4877 priv->sniffer_enabled = true;
4878 }
4879
4880 *total_flags &= FIF_PROMISC_IN_BSS | FIF_ALLMULTI |
4881 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL |
4882 FIF_OTHER_BSS;
4883
4884 return 1;
4885}
4886
f5bb87cf
LB		 4887static struct mwl8k_vif *mwl8k_first_vif(struct mwl8k_priv *priv)
4888{
4889 if (!list_empty(&priv->vif_list))
4890 return list_entry(priv->vif_list.next, struct mwl8k_vif, list);
4891
4892 return NULL;
4893}
4894
e6935ea1
LB		 4895static void mwl8k_configure_filter(struct ieee80211_hw *hw,
4896 unsigned int changed_flags,
4897 unsigned int *total_flags,
4898 u64 multicast)
4899{
4900 struct mwl8k_priv *priv = hw->priv;
a43c49a8
LB		 4901 struct mwl8k_cmd_pkt *cmd = (void *)(unsigned long)multicast;
4902
c0adae2c
LB		 4903 /*
4904 * AP firmware doesn't allow fine-grained control over
4905 * the receive filter.
4906 */
4907 if (priv->ap_fw) {
4908 *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
4909 kfree(cmd);
4910 return;
4911 }
4912
a43c49a8
LB		 4913 /*
4914 * Enable hardware sniffer mode if FIF_CONTROL or
4915 * FIF_OTHER_BSS is requested.
4916 */
4917 if (*total_flags & (FIF_CONTROL | FIF_OTHER_BSS) &&
4918 mwl8k_configure_filter_sniffer(hw, changed_flags, total_flags)) {
4919 kfree(cmd);
4920 return;
4921 }
a66098da 4922
e6935ea1 4923 /* Clear unsupported feature flags */
447ced07 4924 *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
a66098da 4925
90852f7a
LB		 4926 if (mwl8k_fw_lock(hw)) {
4927 kfree(cmd);
e6935ea1 4928 return;
90852f7a 4929 }
a66098da 4930
a43c49a8 4931 if (priv->sniffer_enabled) {
55489b6e 4932 mwl8k_cmd_enable_sniffer(hw, 0);
a43c49a8
LB		 4933 priv->sniffer_enabled = false;
4934 }
4935
e6935ea1 4936 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
77165d88
LB		 4937 if (*total_flags & FIF_BCN_PRBRESP_PROMISC) {
4938 /*
4939 * Disable the BSS filter.
4940 */
e6935ea1 4941 mwl8k_cmd_set_pre_scan(hw);
77165d88 4942 } else {
f5bb87cf 4943 struct mwl8k_vif *mwl8k_vif;
0a11dfc3 4944 const u8 *bssid;
a94cc97e 4945
77165d88
LB		 4946 /*
4947 * Enable the BSS filter.
4948 *
4949 * If there is an active STA interface, use that
4950 * interface's BSSID, otherwise use a dummy one
4951 * (where the OUI part needs to be nonzero for
4952 * the BSSID to be accepted by POST_SCAN).
4953 */
f5bb87cf
LB		 4954 mwl8k_vif = mwl8k_first_vif(priv);
4955 if (mwl8k_vif != NULL)
4956 bssid = mwl8k_vif->vif->bss_conf.bssid;
4957 else
4958 bssid = "\x01\x00\x00\x00\x00\x00";
a94cc97e 4959
e6935ea1 4960 mwl8k_cmd_set_post_scan(hw, bssid);
a66098da
LB		 4961 }
4962 }
4963
447ced07
LB		 4964 /*
4965 * If FIF_ALLMULTI is being requested, throw away the command
4966 * packet that ->prepare_multicast() built and replace it with
4967 * a command packet that enables reception of all multicast
4968 * packets.
4969 */
4970 if (*total_flags & FIF_ALLMULTI) {
4971 kfree(cmd);
22bedad3 4972 cmd = __mwl8k_cmd_mac_multicast_adr(hw, 1, NULL);
447ced07
LB		 4973 }
4974
4975 if (cmd != NULL) {
4976 mwl8k_post_cmd(hw, cmd);
4977 kfree(cmd);
e6935ea1 4978 }
a66098da 4979
e6935ea1 4980 mwl8k_fw_unlock(hw);
a66098da
LB		 4981}
4982
a66098da
LB		 4983static int mwl8k_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
4984{
c2c2b12a 4985 return mwl8k_cmd_set_rts_threshold(hw, value);
a66098da
LB		 4986}
4987
4a6967b8
JB		 4988static int mwl8k_sta_remove(struct ieee80211_hw *hw,
4989 struct ieee80211_vif *vif,
4990 struct ieee80211_sta *sta)
3f5610ff
LB		 4991{
4992 struct mwl8k_priv *priv = hw->priv;
4993
4a6967b8
JB		 4994 if (priv->ap_fw)
4995 return mwl8k_cmd_set_new_stn_del(hw, vif, sta->addr);
4996 else
4997 return mwl8k_cmd_update_stadb_del(hw, vif, sta->addr);
bbfd9128
LB		 4998}
4999
4a6967b8
JB		 5000static int mwl8k_sta_add(struct ieee80211_hw *hw,
5001 struct ieee80211_vif *vif,
5002 struct ieee80211_sta *sta)
bbfd9128
LB		 5003{
5004 struct mwl8k_priv *priv = hw->priv;
4a6967b8 5005 int ret;
fcdc403c
NS		 5006 int i;
5007 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
5008 struct ieee80211_key_conf *key;
bbfd9128 5009
4a6967b8
JB		 5010 if (!priv->ap_fw) {
5011 ret = mwl8k_cmd_update_stadb_add(hw, vif, sta);
5012 if (ret >= 0) {
5013 MWL8K_STA(sta)->peer_id = ret;
17033543
NS		 5014 if (sta->ht_cap.ht_supported)
5015 MWL8K_STA(sta)->is_ampdu_allowed = true;
fcdc403c 5016 ret = 0;
4a6967b8 5017 }
bbfd9128 5018
d9a07d49
NS		 5019 } else {
5020 ret = mwl8k_cmd_set_new_stn_add(hw, vif, sta);
bbfd9128 5021 }
4a6967b8 5022
d9a07d49
NS		 5023 for (i = 0; i < NUM_WEP_KEYS; i++) {
5024 key = IEEE80211_KEY_CONF(mwl8k_vif->wep_key_conf[i].key);
5025 if (mwl8k_vif->wep_key_conf[i].enabled)
5026 mwl8k_set_key(hw, SET_KEY, vif, sta, key);
5027 }
fcdc403c 5028 return ret;
bbfd9128
LB		 5029}
5030
8a3a3c85
EP		 5031static int mwl8k_conf_tx(struct ieee80211_hw *hw,
5032 struct ieee80211_vif *vif, u16 queue,
a66098da
LB		 5033 const struct ieee80211_tx_queue_params *params)
5034{
3e4f542c 5035 struct mwl8k_priv *priv = hw->priv;
a66098da 5036 int rc;
a66098da 5037
3e4f542c
LB		 5038 rc = mwl8k_fw_lock(hw);
5039 if (!rc) {
e600707b 5040 BUG_ON(queue > MWL8K_TX_WMM_QUEUES - 1);
0863ade8
BC		 5041 memcpy(&priv->wmm_params[queue], params, sizeof(*params));
5042
3e4f542c 5043 if (!priv->wmm_enabled)
55489b6e 5044 rc = mwl8k_cmd_set_wmm_mode(hw, 1);
a66098da 5045
85c9205c 5046 if (!rc) {
e600707b 5047 int q = MWL8K_TX_WMM_QUEUES - 1 - queue;
85c9205c 5048 rc = mwl8k_cmd_set_edca_params(hw, q,
55489b6e
LB		 5049 params->cw_min,
5050 params->cw_max,
5051 params->aifs,
5052 params->txop);
85c9205c 5053 }
3e4f542c
LB		 5054
5055 mwl8k_fw_unlock(hw);
a66098da 5056 }
3e4f542c 5057
a66098da
LB		 5058 return rc;
5059}
5060
a66098da
LB		 5061static int mwl8k_get_stats(struct ieee80211_hw *hw,
5062 struct ieee80211_low_level_stats *stats)
5063{
55489b6e 5064 return mwl8k_cmd_get_stat(hw, stats);
a66098da
LB		 5065}
5066
0d462bbb
JL		 5067static int mwl8k_get_survey(struct ieee80211_hw *hw, int idx,
5068 struct survey_info *survey)
5069{
5070 struct mwl8k_priv *priv = hw->priv;
5071 struct ieee80211_conf *conf = &hw->conf;
5072
5073 if (idx != 0)
5074 return -ENOENT;
5075
5076 survey->channel = conf->channel;
5077 survey->filled = SURVEY_INFO_NOISE_DBM;
5078 survey->noise = priv->noise;
5079
5080 return 0;
5081}
5082
65f3ddcd
NS		 5083#define MAX_AMPDU_ATTEMPTS 5
5084
a2292d83
LB		 5085static int
5086mwl8k_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
5087 enum ieee80211_ampdu_mlme_action action,
0b01f030
JB		 5088 struct ieee80211_sta *sta, u16 tid, u16 *ssn,
5089 u8 buf_size)
a2292d83 5090{
65f3ddcd
NS		 5091
5092 int i, rc = 0;
5093 struct mwl8k_priv *priv = hw->priv;
5094 struct mwl8k_ampdu_stream *stream;
5095 u8 *addr = sta->addr;
fd712f5f 5096 struct mwl8k_sta *sta_info = MWL8K_STA(sta);
65f3ddcd
NS		 5097
5098 if (!(hw->flags & IEEE80211_HW_AMPDU_AGGREGATION))
5099 return -ENOTSUPP;
5100
5101 spin_lock(&priv->stream_lock);
5102 stream = mwl8k_lookup_stream(hw, addr, tid);
5103
a2292d83
LB		 5104 switch (action) {
5105 case IEEE80211_AMPDU_RX_START:
5106 case IEEE80211_AMPDU_RX_STOP:
65f3ddcd
NS		 5107 break;
5108 case IEEE80211_AMPDU_TX_START:
5109 /* By the time we get here the hw queues may contain outgoing
5110 * packets for this RA/TID that are not part of this BA
5111 * session. The hw will assign sequence numbers to these
5112 * packets as they go out. So if we query the hw for its next
5113 * sequence number and use that for the SSN here, it may end up
5114 * being wrong, which will lead to sequence number mismatch at
5115 * the recipient. To avoid this, we reset the sequence number
5116 * to O for the first MPDU in this BA stream.
5117 */
5118 *ssn = 0;
5119 if (stream == NULL) {
5120 /* This means that somebody outside this driver called
5121 * ieee80211_start_tx_ba_session. This is unexpected
5122 * because we do our own rate control. Just warn and
5123 * move on.
5124 */
5125 wiphy_warn(hw->wiphy, "Unexpected call to %s. "
5126 "Proceeding anyway.\n", __func__);
5127 stream = mwl8k_add_stream(hw, sta, tid);
5128 }
5129 if (stream == NULL) {
5130 wiphy_debug(hw->wiphy, "no free AMPDU streams\n");
5131 rc = -EBUSY;
5132 break;
5133 }
5134 stream->state = AMPDU_STREAM_IN_PROGRESS;
5135
5136 /* Release the lock before we do the time consuming stuff */
5137 spin_unlock(&priv->stream_lock);
5138 for (i = 0; i < MAX_AMPDU_ATTEMPTS; i++) {
fd712f5f
YAP		 5139
5140 /* Check if link is still valid */
5141 if (!sta_info->is_ampdu_allowed) {
5142 spin_lock(&priv->stream_lock);
5143 mwl8k_remove_stream(hw, stream);
5144 spin_unlock(&priv->stream_lock);
5145 return -EBUSY;
5146 }
5147
f95275c4 5148 rc = mwl8k_check_ba(hw, stream, vif);
65f3ddcd 5149
6b6accc3
YAP		 5150 /* If HW restart is in progress mwl8k_post_cmd will
5151 * return -EBUSY. Avoid retrying mwl8k_check_ba in
5152 * such cases
5153 */
5154 if (!rc || rc == -EBUSY)
65f3ddcd
NS		 5155 break;
5156 /*
5157 * HW queues take time to be flushed, give them
5158 * sufficient time
5159 */
5160
5161 msleep(1000);
5162 }
5163 spin_lock(&priv->stream_lock);
5164 if (rc) {
5165 wiphy_err(hw->wiphy, "Stream for tid %d busy after %d"
5166 " attempts\n", tid, MAX_AMPDU_ATTEMPTS);
5167 mwl8k_remove_stream(hw, stream);
5168 rc = -EBUSY;
5169 break;
5170 }
5171 ieee80211_start_tx_ba_cb_irqsafe(vif, addr, tid);
5172 break;
5173 case IEEE80211_AMPDU_TX_STOP:
eca107ff
YAP		 5174 if (stream) {
5175 if (stream->state == AMPDU_STREAM_ACTIVE) {
5176 spin_unlock(&priv->stream_lock);
5177 mwl8k_destroy_ba(hw, stream);
5178 spin_lock(&priv->stream_lock);
5179 }
5180 mwl8k_remove_stream(hw, stream);
65f3ddcd 5181 }
65f3ddcd
NS		 5182 ieee80211_stop_tx_ba_cb_irqsafe(vif, addr, tid);
5183 break;
5184 case IEEE80211_AMPDU_TX_OPERATIONAL:
5185 BUG_ON(stream == NULL);
5186 BUG_ON(stream->state != AMPDU_STREAM_IN_PROGRESS);
5187 spin_unlock(&priv->stream_lock);
f95275c4 5188 rc = mwl8k_create_ba(hw, stream, buf_size, vif);
65f3ddcd
NS		 5189 spin_lock(&priv->stream_lock);
5190 if (!rc)
5191 stream->state = AMPDU_STREAM_ACTIVE;
5192 else {
5193 spin_unlock(&priv->stream_lock);
5194 mwl8k_destroy_ba(hw, stream);
5195 spin_lock(&priv->stream_lock);
5196 wiphy_debug(hw->wiphy,
5197 "Failed adding stream for sta %pM tid %d\n",
5198 addr, tid);
5199 mwl8k_remove_stream(hw, stream);
5200 }
5201 break;
5202
a2292d83 5203 default:
65f3ddcd 5204 rc = -ENOTSUPP;
a2292d83 5205 }
65f3ddcd
NS		 5206
5207 spin_unlock(&priv->stream_lock);
5208 return rc;
a2292d83
LB		 5209}
5210
a66098da
LB		 5211static const struct ieee80211_ops mwl8k_ops = {
5212 .tx = mwl8k_tx,
5213 .start = mwl8k_start,
5214 .stop = mwl8k_stop,
5215 .add_interface = mwl8k_add_interface,
5216 .remove_interface = mwl8k_remove_interface,
5217 .config = mwl8k_config,
a66098da 5218 .bss_info_changed = mwl8k_bss_info_changed,
3ac64bee 5219 .prepare_multicast = mwl8k_prepare_multicast,
a66098da 5220 .configure_filter = mwl8k_configure_filter,
fcdc403c 5221 .set_key = mwl8k_set_key,
a66098da 5222 .set_rts_threshold = mwl8k_set_rts_threshold,
4a6967b8
JB		 5223 .sta_add = mwl8k_sta_add,
5224 .sta_remove = mwl8k_sta_remove,
a66098da 5225 .conf_tx = mwl8k_conf_tx,
a66098da 5226 .get_stats = mwl8k_get_stats,
0d462bbb 5227 .get_survey = mwl8k_get_survey,
a2292d83 5228 .ampdu_action = mwl8k_ampdu_action,
a66098da
LB		 5229};
5230
a66098da
LB		 5231static void mwl8k_finalize_join_worker(struct work_struct *work)
5232{
5233 struct mwl8k_priv *priv =
5234 container_of(work, struct mwl8k_priv, finalize_join_worker);
5235 struct sk_buff *skb = priv->beacon_skb;
56007a02
JB		 5236 struct ieee80211_mgmt *mgmt = (void *)skb->data;
5237 int len = skb->len - offsetof(struct ieee80211_mgmt, u.beacon.variable);
5238 const u8 *tim = cfg80211_find_ie(WLAN_EID_TIM,
5239 mgmt->u.beacon.variable, len);
5240 int dtim_period = 1;
5241
5242 if (tim && tim[1] >= 2)
5243 dtim_period = tim[3];
a66098da 5244
56007a02 5245 mwl8k_cmd_finalize_join(priv->hw, skb->data, skb->len, dtim_period);
a66098da 5246
f5bb87cf 5247 dev_kfree_skb(skb);
a66098da
LB		 5248 priv->beacon_skb = NULL;
5249}
5250
bcb628d5 5251enum {
9e1b17ea
LB		 5252 MWL8363 = 0,
5253 MWL8687,
bcb628d5 5254 MWL8366,
6f6d1e9a
LB		 5255};
5256
8a7a578c 5257#define MWL8K_8366_AP_FW_API 2
952a0e96
BC		 5258#define _MWL8K_8366_AP_FW(api) "mwl8k/fmimage_8366_ap-" #api ".fw"
5259#define MWL8K_8366_AP_FW(api) _MWL8K_8366_AP_FW(api)
5260
8dee5eef 5261static struct mwl8k_device_info mwl8k_info_tbl[] = {
9e1b17ea
LB		 5262 [MWL8363] = {
5263 .part_name = "88w8363",
5264 .helper_image = "mwl8k/helper_8363.fw",
0863ade8 5265 .fw_image_sta = "mwl8k/fmimage_8363.fw",
9e1b17ea 5266 },
49eb691c 5267 [MWL8687] = {
bcb628d5
JL		 5268 .part_name = "88w8687",
5269 .helper_image = "mwl8k/helper_8687.fw",
0863ade8 5270 .fw_image_sta = "mwl8k/fmimage_8687.fw",
bcb628d5 5271 },
49eb691c 5272 [MWL8366] = {
bcb628d5
JL		 5273 .part_name = "88w8366",
5274 .helper_image = "mwl8k/helper_8366.fw",
0863ade8 5275 .fw_image_sta = "mwl8k/fmimage_8366.fw",
952a0e96
BC		 5276 .fw_image_ap = MWL8K_8366_AP_FW(MWL8K_8366_AP_FW_API),
5277 .fw_api_ap = MWL8K_8366_AP_FW_API,
89a91f4f 5278 .ap_rxd_ops = &rxd_8366_ap_ops,
bcb628d5 5279 },
45a390dd
LB		 5280};
5281
c92d4ede
LB		 5282MODULE_FIRMWARE("mwl8k/helper_8363.fw");
5283MODULE_FIRMWARE("mwl8k/fmimage_8363.fw");
5284MODULE_FIRMWARE("mwl8k/helper_8687.fw");
5285MODULE_FIRMWARE("mwl8k/fmimage_8687.fw");
5286MODULE_FIRMWARE("mwl8k/helper_8366.fw");
5287MODULE_FIRMWARE("mwl8k/fmimage_8366.fw");
952a0e96 5288MODULE_FIRMWARE(MWL8K_8366_AP_FW(MWL8K_8366_AP_FW_API));
c92d4ede 5289
45a390dd 5290static DEFINE_PCI_DEVICE_TABLE(mwl8k_pci_id_table) = {
e5868ba1 5291 { PCI_VDEVICE(MARVELL, 0x2a0a), .driver_data = MWL8363, },
9e1b17ea
LB		 5292 { PCI_VDEVICE(MARVELL, 0x2a0c), .driver_data = MWL8363, },
5293 { PCI_VDEVICE(MARVELL, 0x2a24), .driver_data = MWL8363, },
bcb628d5
JL		 5294 { PCI_VDEVICE(MARVELL, 0x2a2b), .driver_data = MWL8687, },
5295 { PCI_VDEVICE(MARVELL, 0x2a30), .driver_data = MWL8687, },
5296 { PCI_VDEVICE(MARVELL, 0x2a40), .driver_data = MWL8366, },
ca66527c 5297 { PCI_VDEVICE(MARVELL, 0x2a43), .driver_data = MWL8366, },
bcb628d5 5298 { },
45a390dd
LB		 5299};
5300MODULE_DEVICE_TABLE(pci, mwl8k_pci_id_table);
5301
99020471
BC		 5302static int mwl8k_request_alt_fw(struct mwl8k_priv *priv)
5303{
5304 int rc;
5305 printk(KERN_ERR "%s: Error requesting preferred fw %s.\n"
5306 "Trying alternative firmware %s\n", pci_name(priv->pdev),
5307 priv->fw_pref, priv->fw_alt);
5308 rc = mwl8k_request_fw(priv, priv->fw_alt, &priv->fw_ucode, true);
5309 if (rc) {
5310 printk(KERN_ERR "%s: Error requesting alt fw %s\n",
5311 pci_name(priv->pdev), priv->fw_alt);
5312 return rc;
5313 }
5314 return 0;
5315}
5316
5317static int mwl8k_firmware_load_success(struct mwl8k_priv *priv);
5318static void mwl8k_fw_state_machine(const struct firmware *fw, void *context)
5319{
5320 struct mwl8k_priv *priv = context;
5321 struct mwl8k_device_info *di = priv->device_info;
5322 int rc;
5323
5324 switch (priv->fw_state) {
5325 case FW_STATE_INIT:
5326 if (!fw) {
5327 printk(KERN_ERR "%s: Error requesting helper fw %s\n",
5328 pci_name(priv->pdev), di->helper_image);
5329 goto fail;
5330 }
5331 priv->fw_helper = fw;
5332 rc = mwl8k_request_fw(priv, priv->fw_pref, &priv->fw_ucode,
5333 true);
5334 if (rc && priv->fw_alt) {
5335 rc = mwl8k_request_alt_fw(priv);
5336 if (rc)
5337 goto fail;
5338 priv->fw_state = FW_STATE_LOADING_ALT;
5339 } else if (rc)
5340 goto fail;
5341 else
5342 priv->fw_state = FW_STATE_LOADING_PREF;
5343 break;
5344
5345 case FW_STATE_LOADING_PREF:
5346 if (!fw) {
5347 if (priv->fw_alt) {
5348 rc = mwl8k_request_alt_fw(priv);
5349 if (rc)
5350 goto fail;
5351 priv->fw_state = FW_STATE_LOADING_ALT;
5352 } else
5353 goto fail;
5354 } else {
5355 priv->fw_ucode = fw;
5356 rc = mwl8k_firmware_load_success(priv);
5357 if (rc)
5358 goto fail;
5359 else
5360 complete(&priv->firmware_loading_complete);
5361 }
5362 break;
5363
5364 case FW_STATE_LOADING_ALT:
5365 if (!fw) {
5366 printk(KERN_ERR "%s: Error requesting alt fw %s\n",
5367 pci_name(priv->pdev), di->helper_image);
5368 goto fail;
5369 }
5370 priv->fw_ucode = fw;
5371 rc = mwl8k_firmware_load_success(priv);
5372 if (rc)
5373 goto fail;
5374 else
5375 complete(&priv->firmware_loading_complete);
5376 break;
5377
5378 default:
5379 printk(KERN_ERR "%s: Unexpected firmware loading state: %d\n",
5380 MWL8K_NAME, priv->fw_state);
5381 BUG_ON(1);
5382 }
5383
5384 return;
5385
5386fail:
5387 priv->fw_state = FW_STATE_ERROR;
5388 complete(&priv->firmware_loading_complete);
5389 device_release_driver(&priv->pdev->dev);
5390 mwl8k_release_firmware(priv);
5391}
5392
6b6accc3 5393#define MAX_RESTART_ATTEMPTS 1
99020471
BC		 5394static int mwl8k_init_firmware(struct ieee80211_hw *hw, char *fw_image,
5395 bool nowait)
a66098da 5396{
3cc7772c 5397 struct mwl8k_priv *priv = hw->priv;
a66098da 5398 int rc;
6b6accc3 5399 int count = MAX_RESTART_ATTEMPTS;
be695fc4 5400
6b6accc3 5401retry:
be695fc4
LB		 5402 /* Reset firmware and hardware */
5403 mwl8k_hw_reset(priv);
5404
5405 /* Ask userland hotplug daemon for the device firmware */
99020471 5406 rc = mwl8k_request_firmware(priv, fw_image, nowait);
be695fc4 5407 if (rc) {
5db55844 5408 wiphy_err(hw->wiphy, "Firmware files not found\n");
3cc7772c 5409 return rc;
be695fc4
LB		 5410 }
5411
99020471
BC		 5412 if (nowait)
5413 return rc;
5414
be695fc4
LB		 5415 /* Load firmware into hardware */
5416 rc = mwl8k_load_firmware(hw);
3cc7772c 5417 if (rc)
5db55844 5418 wiphy_err(hw->wiphy, "Cannot start firmware\n");
be695fc4
LB		 5419
5420 /* Reclaim memory once firmware is successfully loaded */
5421 mwl8k_release_firmware(priv);
5422
6b6accc3
YAP		 5423 if (rc && count) {
5424 /* FW did not start successfully;
5425 * lets try one more time
5426 */
5427 count--;
5428 wiphy_err(hw->wiphy, "Trying to reload the firmware again\n");
5429 msleep(20);
5430 goto retry;
5431 }
5432
3cc7772c
BC		 5433 return rc;
5434}
5435
73b46320
BC		 5436static int mwl8k_init_txqs(struct ieee80211_hw *hw)
5437{
5438 struct mwl8k_priv *priv = hw->priv;
5439 int rc = 0;
5440 int i;
5441
e600707b 5442 for (i = 0; i < mwl8k_tx_queues(priv); i++) {
73b46320
BC		 5443 rc = mwl8k_txq_init(hw, i);
5444 if (rc)
5445 break;
5446 if (priv->ap_fw)
5447 iowrite32(priv->txq[i].txd_dma,
5448 priv->sram + priv->txq_offset[i]);
5449 }
5450 return rc;
5451}
5452
3cc7772c
BC		 5453/* initialize hw after successfully loading a firmware image */
5454static int mwl8k_probe_hw(struct ieee80211_hw *hw)
5455{
5456 struct mwl8k_priv *priv = hw->priv;
5457 int rc = 0;
5458 int i;
be695fc4 5459
91942230 5460 if (priv->ap_fw) {
89a91f4f 5461 priv->rxd_ops = priv->device_info->ap_rxd_ops;
91942230 5462 if (priv->rxd_ops == NULL) {
c96c31e4
JP		 5463 wiphy_err(hw->wiphy,
5464 "Driver does not have AP firmware image support for this hardware\n");
91942230
LB		 5465 goto err_stop_firmware;
5466 }
5467 } else {
89a91f4f 5468 priv->rxd_ops = &rxd_sta_ops;
91942230 5469 }
be695fc4
LB		 5470
5471 priv->sniffer_enabled = false;
5472 priv->wmm_enabled = false;
5473 priv->pending_tx_pkts = 0;
5474
a66098da
LB		 5475 rc = mwl8k_rxq_init(hw, 0);
5476 if (rc)
3cc7772c 5477 goto err_stop_firmware;
a66098da
LB		 5478 rxq_refill(hw, 0, INT_MAX);
5479
73b46320
BC		 5480 /* For the sta firmware, we need to know the dma addresses of tx queues
5481 * before sending MWL8K_CMD_GET_HW_SPEC. So we must initialize them
5482 * prior to issuing this command. But for the AP case, we learn the
5483 * total number of queues from the result CMD_GET_HW_SPEC, so for this
5484 * case we must initialize the tx queues after.
5485 */
8a7a578c 5486 priv->num_ampdu_queues = 0;
73b46320
BC		 5487 if (!priv->ap_fw) {
5488 rc = mwl8k_init_txqs(hw);
a66098da
LB		 5489 if (rc)
5490 goto err_free_queues;
5491 }
5492
5493 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
c23b5a69 5494 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3aefc37e
NS		 5495 iowrite32(MWL8K_A2H_INT_TX_DONE|MWL8K_A2H_INT_RX_READY|
5496 MWL8K_A2H_INT_BA_WATCHDOG,
1e9f9de3 5497 priv->regs + MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL);
12488e01
NS		 5498 iowrite32(MWL8K_A2H_INT_OPC_DONE,
5499 priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
a66098da 5500
a0607fd3 5501 rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
a66098da
LB		 5502 IRQF_SHARED, MWL8K_NAME, hw);
5503 if (rc) {
5db55844 5504 wiphy_err(hw->wiphy, "failed to register IRQ handler\n");
a66098da
LB		 5505 goto err_free_queues;
5506 }
5507
6b6accc3
YAP		 5508 /*
5509 * When hw restart is requested,
5510 * mac80211 will take care of clearing
5511 * the ampdu streams, so do not clear
5512 * the ampdu state here
5513 */
5514 if (!priv->hw_restart_in_progress)
5515 memset(priv->ampdu, 0, sizeof(priv->ampdu));
ac109fd0 5516
a66098da
LB		 5517 /*
5518 * Temporarily enable interrupts. Initial firmware host
c2c2b12a 5519 * commands use interrupts and avoid polling. Disable
a66098da
LB		 5520 * interrupts when done.
5521 */
c23b5a69 5522 iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
a66098da
LB		 5523
5524 /* Get config data, mac addrs etc */
42fba21d
LB		 5525 if (priv->ap_fw) {
5526 rc = mwl8k_cmd_get_hw_spec_ap(hw);
73b46320
BC		 5527 if (!rc)
5528 rc = mwl8k_init_txqs(hw);
42fba21d
LB		 5529 if (!rc)
5530 rc = mwl8k_cmd_set_hw_spec(hw);
5531 } else {
5532 rc = mwl8k_cmd_get_hw_spec_sta(hw);
5533 }
a66098da 5534 if (rc) {
5db55844 5535 wiphy_err(hw->wiphy, "Cannot initialise firmware\n");
be695fc4 5536 goto err_free_irq;
a66098da
LB		 5537 }
5538
5539 /* Turn radio off */
55489b6e 5540 rc = mwl8k_cmd_radio_disable(hw);
a66098da 5541 if (rc) {
5db55844 5542 wiphy_err(hw->wiphy, "Cannot disable\n");
be695fc4 5543 goto err_free_irq;
a66098da
LB		 5544 }
5545
32060e1b 5546 /* Clear MAC address */
aa21d0f6 5547 rc = mwl8k_cmd_set_mac_addr(hw, NULL, "\x00\x00\x00\x00\x00\x00");
32060e1b 5548 if (rc) {
5db55844 5549 wiphy_err(hw->wiphy, "Cannot clear MAC address\n");
be695fc4 5550 goto err_free_irq;
32060e1b
LB		 5551 }
5552
a66098da 5553 /* Disable interrupts */
a66098da 5554 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
a66098da
LB		 5555 free_irq(priv->pdev->irq, hw);
5556
c96c31e4
JP		 5557 wiphy_info(hw->wiphy, "%s v%d, %pm, %s firmware %u.%u.%u.%u\n",
5558 priv->device_info->part_name,
5559 priv->hw_rev, hw->wiphy->perm_addr,
5560 priv->ap_fw ? "AP" : "STA",
5561 (priv->fw_rev >> 24) & 0xff, (priv->fw_rev >> 16) & 0xff,
5562 (priv->fw_rev >> 8) & 0xff, priv->fw_rev & 0xff);
a66098da
LB		 5563
5564 return 0;
5565
a66098da 5566err_free_irq:
a66098da 5567 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
a66098da
LB		 5568 free_irq(priv->pdev->irq, hw);
5569
5570err_free_queues:
e600707b 5571 for (i = 0; i < mwl8k_tx_queues(priv); i++)
a66098da
LB		 5572 mwl8k_txq_deinit(hw, i);
5573 mwl8k_rxq_deinit(hw, 0);
5574
3cc7772c
BC		 5575err_stop_firmware:
5576 mwl8k_hw_reset(priv);
5577
5578 return rc;
5579}
5580
5581/*
5582 * invoke mwl8k_reload_firmware to change the firmware image after the device
5583 * has already been registered
5584 */
5585static int mwl8k_reload_firmware(struct ieee80211_hw *hw, char *fw_image)
5586{
5587 int i, rc = 0;
5588 struct mwl8k_priv *priv = hw->priv;
6b6accc3 5589 struct mwl8k_vif *vif, *tmp_vif;
3cc7772c
BC		 5590
5591 mwl8k_stop(hw);
5592 mwl8k_rxq_deinit(hw, 0);
5593
6b6accc3
YAP		 5594 /*
5595 * All the existing interfaces are re-added by the ieee80211_reconfig;
5596 * which means driver should remove existing interfaces before calling
5597 * ieee80211_restart_hw
5598 */
5599 if (priv->hw_restart_in_progress)
5600 list_for_each_entry_safe(vif, tmp_vif, &priv->vif_list, list)
5601 mwl8k_remove_vif(priv, vif);
5602
e600707b 5603 for (i = 0; i < mwl8k_tx_queues(priv); i++)
3cc7772c
BC		 5604 mwl8k_txq_deinit(hw, i);
5605
99020471 5606 rc = mwl8k_init_firmware(hw, fw_image, false);
3cc7772c
BC		 5607 if (rc)
5608 goto fail;
5609
5610 rc = mwl8k_probe_hw(hw);
5611 if (rc)
5612 goto fail;
5613
6b6accc3
YAP		 5614 if (priv->hw_restart_in_progress)
5615 return rc;
5616
3cc7772c
BC		 5617 rc = mwl8k_start(hw);
5618 if (rc)
5619 goto fail;
5620
5621 rc = mwl8k_config(hw, ~0);
5622 if (rc)
5623 goto fail;
5624
e600707b 5625 for (i = 0; i < MWL8K_TX_WMM_QUEUES; i++) {
8a3a3c85 5626 rc = mwl8k_conf_tx(hw, NULL, i, &priv->wmm_params[i]);
3cc7772c
BC		 5627 if (rc)
5628 goto fail;
5629 }
5630
5631 return rc;
5632
5633fail:
5634 printk(KERN_WARNING "mwl8k: Failed to reload firmware image.\n");
5635 return rc;
5636}
5637
5d377fca
YAP		 5638static const struct ieee80211_iface_limit ap_if_limits[] = {
5639 { .max = 8, .types = BIT(NL80211_IFTYPE_AP) },
5640};
5641
5642static const struct ieee80211_iface_combination ap_if_comb = {
5643 .limits = ap_if_limits,
5644 .n_limits = ARRAY_SIZE(ap_if_limits),
5645 .max_interfaces = 8,
5646 .num_different_channels = 1,
5647};
5648
5649
3cc7772c
BC		 5650static int mwl8k_firmware_load_success(struct mwl8k_priv *priv)
5651{
5652 struct ieee80211_hw *hw = priv->hw;
5653 int i, rc;
5654
99020471
BC		 5655 rc = mwl8k_load_firmware(hw);
5656 mwl8k_release_firmware(priv);
5657 if (rc) {
5658 wiphy_err(hw->wiphy, "Cannot start firmware\n");
5659 return rc;
5660 }
5661
3cc7772c
BC		 5662 /*
5663 * Extra headroom is the size of the required DMA header
5664 * minus the size of the smallest 802.11 frame (CTS frame).
5665 */
5666 hw->extra_tx_headroom =
5667 sizeof(struct mwl8k_dma_data) - sizeof(struct ieee80211_cts);
5668
ff776cec
YAP		 5669 hw->extra_tx_headroom -= priv->ap_fw ? REDUCED_TX_HEADROOM : 0;
5670
3cc7772c
BC		 5671 hw->channel_change_time = 10;
5672
e600707b 5673 hw->queues = MWL8K_TX_WMM_QUEUES;
3cc7772c
BC		 5674
5675 /* Set rssi values to dBm */
0bf22c37 5676 hw->flags |= IEEE80211_HW_SIGNAL_DBM | IEEE80211_HW_HAS_RATE_CONTROL;
2a36a0ec
YAP		 5677
5678 /*
5679 * Ask mac80211 to not to trigger PS mode
5680 * based on PM bit of incoming frames.
5681 */
5682 if (priv->ap_fw)
5683 hw->flags |= IEEE80211_HW_AP_LINK_PS;
5684
3cc7772c
BC		 5685 hw->vif_data_size = sizeof(struct mwl8k_vif);
5686 hw->sta_data_size = sizeof(struct mwl8k_sta);
5687
5688 priv->macids_used = 0;
5689 INIT_LIST_HEAD(&priv->vif_list);
5690
5691 /* Set default radio state and preamble */
3db1cd5c
RR		 5692 priv->radio_on = false;
5693 priv->radio_short_preamble = false;
3cc7772c
BC		 5694
5695 /* Finalize join worker */
5696 INIT_WORK(&priv->finalize_join_worker, mwl8k_finalize_join_worker);
3aefc37e
NS		 5697 /* Handle watchdog ba events */
5698 INIT_WORK(&priv->watchdog_ba_handle, mwl8k_watchdog_ba_events);
6b6accc3
YAP		 5699 /* To reload the firmware if it crashes */
5700 INIT_WORK(&priv->fw_reload, mwl8k_hw_restart_work);
3cc7772c
BC		 5701
5702 /* TX reclaim and RX tasklets. */
5703 tasklet_init(&priv->poll_tx_task, mwl8k_tx_poll, (unsigned long)hw);
5704 tasklet_disable(&priv->poll_tx_task);
5705 tasklet_init(&priv->poll_rx_task, mwl8k_rx_poll, (unsigned long)hw);
5706 tasklet_disable(&priv->poll_rx_task);
5707
5708 /* Power management cookie */
5709 priv->cookie = pci_alloc_consistent(priv->pdev, 4, &priv->cookie_dma);
5710 if (priv->cookie == NULL)
5711 return -ENOMEM;
5712
5713 mutex_init(&priv->fw_mutex);
5714 priv->fw_mutex_owner = NULL;
5715 priv->fw_mutex_depth = 0;
5716 priv->hostcmd_wait = NULL;
5717
5718 spin_lock_init(&priv->tx_lock);
5719
ac109fd0
BC		 5720 spin_lock_init(&priv->stream_lock);
5721
3cc7772c
BC		 5722 priv->tx_wait = NULL;
5723
5724 rc = mwl8k_probe_hw(hw);
5725 if (rc)
5726 goto err_free_cookie;
5727
5728 hw->wiphy->interface_modes = 0;
5d377fca
YAP		 5729
5730 if (priv->ap_macids_supported || priv->device_info->fw_image_ap) {
3cc7772c 5731 hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_AP);
5d377fca
YAP		 5732 hw->wiphy->iface_combinations = &ap_if_comb;
5733 hw->wiphy->n_iface_combinations = 1;
5734 }
5735
3cc7772c
BC		 5736 if (priv->sta_macids_supported || priv->device_info->fw_image_sta)
5737 hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_STATION);
5738
5739 rc = ieee80211_register_hw(hw);
5740 if (rc) {
5741 wiphy_err(hw->wiphy, "Cannot register device\n");
5742 goto err_unprobe_hw;
5743 }
5744
5745 return 0;
5746
5747err_unprobe_hw:
e600707b 5748 for (i = 0; i < mwl8k_tx_queues(priv); i++)
3cc7772c
BC		 5749 mwl8k_txq_deinit(hw, i);
5750 mwl8k_rxq_deinit(hw, 0);
5751
be695fc4 5752err_free_cookie:
a66098da
LB		 5753 if (priv->cookie != NULL)
5754 pci_free_consistent(priv->pdev, 4,
5755 priv->cookie, priv->cookie_dma);
5756
3cc7772c
BC		 5757 return rc;
5758}
8dee5eef 5759static int mwl8k_probe(struct pci_dev *pdev,
3cc7772c
BC		 5760 const struct pci_device_id *id)
5761{
5762 static int printed_version;
5763 struct ieee80211_hw *hw;
5764 struct mwl8k_priv *priv;
0863ade8 5765 struct mwl8k_device_info *di;
3cc7772c
BC		 5766 int rc;
5767
5768 if (!printed_version) {
5769 printk(KERN_INFO "%s version %s\n", MWL8K_DESC, MWL8K_VERSION);
5770 printed_version = 1;
5771 }
5772
5773
5774 rc = pci_enable_device(pdev);
5775 if (rc) {
5776 printk(KERN_ERR "%s: Cannot enable new PCI device\n",
5777 MWL8K_NAME);
5778 return rc;
5779 }
5780
5781 rc = pci_request_regions(pdev, MWL8K_NAME);
5782 if (rc) {
5783 printk(KERN_ERR "%s: Cannot obtain PCI resources\n",
5784 MWL8K_NAME);
5785 goto err_disable_device;
5786 }
5787
5788 pci_set_master(pdev);
5789
5790
5791 hw = ieee80211_alloc_hw(sizeof(*priv), &mwl8k_ops);
5792 if (hw == NULL) {
5793 printk(KERN_ERR "%s: ieee80211 alloc failed\n", MWL8K_NAME);
5794 rc = -ENOMEM;
5795 goto err_free_reg;
5796 }
5797
5798 SET_IEEE80211_DEV(hw, &pdev->dev);
5799 pci_set_drvdata(pdev, hw);
5800
5801 priv = hw->priv;
5802 priv->hw = hw;
5803 priv->pdev = pdev;
5804 priv->device_info = &mwl8k_info_tbl[id->driver_data];
5805
5806
5807 priv->sram = pci_iomap(pdev, 0, 0x10000);
5808 if (priv->sram == NULL) {
5809 wiphy_err(hw->wiphy, "Cannot map device SRAM\n");
5810 goto err_iounmap;
5811 }
5812
5813 /*
5814 * If BAR0 is a 32 bit BAR, the register BAR will be BAR1.
5815 * If BAR0 is a 64 bit BAR, the register BAR will be BAR2.
5816 */
5817 priv->regs = pci_iomap(pdev, 1, 0x10000);
5818 if (priv->regs == NULL) {
5819 priv->regs = pci_iomap(pdev, 2, 0x10000);
5820 if (priv->regs == NULL) {
5821 wiphy_err(hw->wiphy, "Cannot map device registers\n");
5822 goto err_iounmap;
5823 }
5824 }
5825
0863ade8 5826 /*
99020471
BC		 5827 * Choose the initial fw image depending on user input. If a second
5828 * image is available, make it the alternative image that will be
5829 * loaded if the first one fails.
0863ade8 5830 */
99020471 5831 init_completion(&priv->firmware_loading_complete);
0863ade8 5832 di = priv->device_info;
99020471
BC		 5833 if (ap_mode_default && di->fw_image_ap) {
5834 priv->fw_pref = di->fw_image_ap;
5835 priv->fw_alt = di->fw_image_sta;
5836 } else if (!ap_mode_default && di->fw_image_sta) {
5837 priv->fw_pref = di->fw_image_sta;
5838 priv->fw_alt = di->fw_image_ap;
5839 } else if (ap_mode_default && !di->fw_image_ap && di->fw_image_sta) {
0863ade8 5840 printk(KERN_WARNING "AP fw is unavailable. Using STA fw.");
99020471 5841 priv->fw_pref = di->fw_image_sta;
0863ade8
BC		 5842 } else if (!ap_mode_default && !di->fw_image_sta && di->fw_image_ap) {
5843 printk(KERN_WARNING "STA fw is unavailable. Using AP fw.");
99020471
BC		 5844 priv->fw_pref = di->fw_image_ap;
5845 }
5846 rc = mwl8k_init_firmware(hw, priv->fw_pref, true);
3cc7772c
BC		 5847 if (rc)
5848 goto err_stop_firmware;
6b6accc3
YAP		 5849
5850 priv->hw_restart_in_progress = false;
5851
99020471 5852 return rc;
3cc7772c 5853
be695fc4
LB		 5854err_stop_firmware:
5855 mwl8k_hw_reset(priv);
be695fc4
LB		 5856
5857err_iounmap:
a66098da
LB		 5858 if (priv->regs != NULL)
5859 pci_iounmap(pdev, priv->regs);
5860
5b9482dd
LB		 5861 if (priv->sram != NULL)
5862 pci_iounmap(pdev, priv->sram);
5863
a66098da
LB		 5864 pci_set_drvdata(pdev, NULL);
5865 ieee80211_free_hw(hw);
5866
5867err_free_reg:
5868 pci_release_regions(pdev);
3db95e50
LB		 5869
5870err_disable_device:
a66098da
LB		 5871 pci_disable_device(pdev);
5872
5873 return rc;
5874}
5875
8dee5eef 5876static void mwl8k_remove(struct pci_dev *pdev)
a66098da
LB		 5877{
5878 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
5879 struct mwl8k_priv *priv;
5880 int i;
5881
5882 if (hw == NULL)
5883 return;
5884 priv = hw->priv;
5885
99020471
BC		 5886 wait_for_completion(&priv->firmware_loading_complete);
5887
5888 if (priv->fw_state == FW_STATE_ERROR) {
5889 mwl8k_hw_reset(priv);
5890 goto unmap;
5891 }
5892
a66098da
LB		 5893 ieee80211_stop_queues(hw);
5894
60aa569f
LB		 5895 ieee80211_unregister_hw(hw);
5896
67e2eb27 5897 /* Remove TX reclaim and RX tasklets. */
1e9f9de3 5898 tasklet_kill(&priv->poll_tx_task);
67e2eb27 5899 tasklet_kill(&priv->poll_rx_task);
a66098da 5900
a66098da
LB		 5901 /* Stop hardware */
5902 mwl8k_hw_reset(priv);
5903
5904 /* Return all skbs to mac80211 */
e600707b 5905 for (i = 0; i < mwl8k_tx_queues(priv); i++)
efb7c49a 5906 mwl8k_txq_reclaim(hw, i, INT_MAX, 1);
a66098da 5907
e600707b 5908 for (i = 0; i < mwl8k_tx_queues(priv); i++)
a66098da
LB		 5909 mwl8k_txq_deinit(hw, i);
5910
5911 mwl8k_rxq_deinit(hw, 0);
5912
c2c357ce 5913 pci_free_consistent(priv->pdev, 4, priv->cookie, priv->cookie_dma);
a66098da 5914
99020471 5915unmap:
a66098da 5916 pci_iounmap(pdev, priv->regs);
5b9482dd 5917 pci_iounmap(pdev, priv->sram);
a66098da
LB		 5918 pci_set_drvdata(pdev, NULL);
5919 ieee80211_free_hw(hw);
5920 pci_release_regions(pdev);
5921 pci_disable_device(pdev);
5922}
5923
5924static struct pci_driver mwl8k_driver = {
5925 .name = MWL8K_NAME,
45a390dd 5926 .id_table = mwl8k_pci_id_table,
a66098da 5927 .probe = mwl8k_probe,
8dee5eef 5928 .remove = mwl8k_remove,
a66098da
LB		 5929};
5930
5b0a3b7e 5931module_pci_driver(mwl8k_driver);
c2c357ce
LB		 5932
5933MODULE_DESCRIPTION(MWL8K_DESC);
5934MODULE_VERSION(MWL8K_VERSION);
5935MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>");
5936MODULE_LICENSE("GPL");
Linux kernel - Deliverables
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