Commit | Line | Data |
---|---|---|
a66098da | 1 | /* |
ce9e2e1b LB |
2 | * drivers/net/wireless/mwl8k.c |
3 | * Driver for Marvell TOPDOG 802.11 Wireless cards | |
a66098da | 4 | * |
a5fb297d | 5 | * Copyright (C) 2008, 2009, 2010 Marvell Semiconductor Inc. |
a66098da LB |
6 | * |
7 | * This file is licensed under the terms of the GNU General Public | |
8 | * License version 2. This program is licensed "as is" without any | |
9 | * warranty of any kind, whether express or implied. | |
10 | */ | |
11 | ||
12 | #include <linux/init.h> | |
13 | #include <linux/module.h> | |
14 | #include <linux/kernel.h> | |
3d76e82c | 15 | #include <linux/sched.h> |
a66098da LB |
16 | #include <linux/spinlock.h> |
17 | #include <linux/list.h> | |
18 | #include <linux/pci.h> | |
19 | #include <linux/delay.h> | |
20 | #include <linux/completion.h> | |
21 | #include <linux/etherdevice.h> | |
5a0e3ad6 | 22 | #include <linux/slab.h> |
a66098da LB |
23 | #include <net/mac80211.h> |
24 | #include <linux/moduleparam.h> | |
25 | #include <linux/firmware.h> | |
26 | #include <linux/workqueue.h> | |
27 | ||
28 | #define MWL8K_DESC "Marvell TOPDOG(R) 802.11 Wireless Network Driver" | |
29 | #define MWL8K_NAME KBUILD_MODNAME | |
a5fb297d | 30 | #define MWL8K_VERSION "0.12" |
a66098da | 31 | |
0863ade8 BC |
32 | /* Module parameters */ |
33 | static unsigned ap_mode_default; | |
34 | module_param(ap_mode_default, bool, 0); | |
35 | MODULE_PARM_DESC(ap_mode_default, | |
36 | "Set to 1 to make ap mode the default instead of sta mode"); | |
37 | ||
a66098da LB |
38 | /* Register definitions */ |
39 | #define MWL8K_HIU_GEN_PTR 0x00000c10 | |
ce9e2e1b LB |
40 | #define MWL8K_MODE_STA 0x0000005a |
41 | #define MWL8K_MODE_AP 0x000000a5 | |
a66098da | 42 | #define MWL8K_HIU_INT_CODE 0x00000c14 |
ce9e2e1b LB |
43 | #define MWL8K_FWSTA_READY 0xf0f1f2f4 |
44 | #define MWL8K_FWAP_READY 0xf1f2f4a5 | |
45 | #define MWL8K_INT_CODE_CMD_FINISHED 0x00000005 | |
a66098da LB |
46 | #define MWL8K_HIU_SCRATCH 0x00000c40 |
47 | ||
48 | /* Host->device communications */ | |
49 | #define MWL8K_HIU_H2A_INTERRUPT_EVENTS 0x00000c18 | |
50 | #define MWL8K_HIU_H2A_INTERRUPT_STATUS 0x00000c1c | |
51 | #define MWL8K_HIU_H2A_INTERRUPT_MASK 0x00000c20 | |
52 | #define MWL8K_HIU_H2A_INTERRUPT_CLEAR_SEL 0x00000c24 | |
53 | #define MWL8K_HIU_H2A_INTERRUPT_STATUS_MASK 0x00000c28 | |
ce9e2e1b LB |
54 | #define MWL8K_H2A_INT_DUMMY (1 << 20) |
55 | #define MWL8K_H2A_INT_RESET (1 << 15) | |
56 | #define MWL8K_H2A_INT_DOORBELL (1 << 1) | |
57 | #define MWL8K_H2A_INT_PPA_READY (1 << 0) | |
a66098da LB |
58 | |
59 | /* Device->host communications */ | |
60 | #define MWL8K_HIU_A2H_INTERRUPT_EVENTS 0x00000c2c | |
61 | #define MWL8K_HIU_A2H_INTERRUPT_STATUS 0x00000c30 | |
62 | #define MWL8K_HIU_A2H_INTERRUPT_MASK 0x00000c34 | |
63 | #define MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL 0x00000c38 | |
64 | #define MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK 0x00000c3c | |
ce9e2e1b LB |
65 | #define MWL8K_A2H_INT_DUMMY (1 << 20) |
66 | #define MWL8K_A2H_INT_CHNL_SWITCHED (1 << 11) | |
67 | #define MWL8K_A2H_INT_QUEUE_EMPTY (1 << 10) | |
68 | #define MWL8K_A2H_INT_RADAR_DETECT (1 << 7) | |
69 | #define MWL8K_A2H_INT_RADIO_ON (1 << 6) | |
70 | #define MWL8K_A2H_INT_RADIO_OFF (1 << 5) | |
71 | #define MWL8K_A2H_INT_MAC_EVENT (1 << 3) | |
72 | #define MWL8K_A2H_INT_OPC_DONE (1 << 2) | |
73 | #define MWL8K_A2H_INT_RX_READY (1 << 1) | |
74 | #define MWL8K_A2H_INT_TX_DONE (1 << 0) | |
a66098da LB |
75 | |
76 | #define MWL8K_A2H_EVENTS (MWL8K_A2H_INT_DUMMY | \ | |
77 | MWL8K_A2H_INT_CHNL_SWITCHED | \ | |
78 | MWL8K_A2H_INT_QUEUE_EMPTY | \ | |
79 | MWL8K_A2H_INT_RADAR_DETECT | \ | |
80 | MWL8K_A2H_INT_RADIO_ON | \ | |
81 | MWL8K_A2H_INT_RADIO_OFF | \ | |
82 | MWL8K_A2H_INT_MAC_EVENT | \ | |
83 | MWL8K_A2H_INT_OPC_DONE | \ | |
84 | MWL8K_A2H_INT_RX_READY | \ | |
85 | MWL8K_A2H_INT_TX_DONE) | |
86 | ||
a66098da LB |
87 | #define MWL8K_RX_QUEUES 1 |
88 | #define MWL8K_TX_QUEUES 4 | |
8a7a578c | 89 | #define MWL8K_MAX_AMPDU_QUEUES 8 |
a66098da | 90 | |
54bc3a0d LB |
91 | struct rxd_ops { |
92 | int rxd_size; | |
93 | void (*rxd_init)(void *rxd, dma_addr_t next_dma_addr); | |
94 | void (*rxd_refill)(void *rxd, dma_addr_t addr, int len); | |
20f09c3d | 95 | int (*rxd_process)(void *rxd, struct ieee80211_rx_status *status, |
0d462bbb | 96 | __le16 *qos, s8 *noise); |
54bc3a0d LB |
97 | }; |
98 | ||
45a390dd | 99 | struct mwl8k_device_info { |
a74b295e LB |
100 | char *part_name; |
101 | char *helper_image; | |
0863ade8 BC |
102 | char *fw_image_sta; |
103 | char *fw_image_ap; | |
89a91f4f | 104 | struct rxd_ops *ap_rxd_ops; |
952a0e96 | 105 | u32 fw_api_ap; |
45a390dd LB |
106 | }; |
107 | ||
a66098da | 108 | struct mwl8k_rx_queue { |
45eb400d | 109 | int rxd_count; |
a66098da LB |
110 | |
111 | /* hw receives here */ | |
45eb400d | 112 | int head; |
a66098da LB |
113 | |
114 | /* refill descs here */ | |
45eb400d | 115 | int tail; |
a66098da | 116 | |
54bc3a0d | 117 | void *rxd; |
45eb400d | 118 | dma_addr_t rxd_dma; |
788838eb LB |
119 | struct { |
120 | struct sk_buff *skb; | |
53b1b3e1 | 121 | DEFINE_DMA_UNMAP_ADDR(dma); |
788838eb | 122 | } *buf; |
a66098da LB |
123 | }; |
124 | ||
a66098da LB |
125 | struct mwl8k_tx_queue { |
126 | /* hw transmits here */ | |
45eb400d | 127 | int head; |
a66098da LB |
128 | |
129 | /* sw appends here */ | |
45eb400d | 130 | int tail; |
a66098da | 131 | |
8ccbc3b8 | 132 | unsigned int len; |
45eb400d LB |
133 | struct mwl8k_tx_desc *txd; |
134 | dma_addr_t txd_dma; | |
135 | struct sk_buff **skb; | |
a66098da LB |
136 | }; |
137 | ||
5faa1aff NS |
138 | struct mwl8k_ampdu_stream { |
139 | struct ieee80211_sta *sta; | |
140 | u8 tid; | |
141 | u8 state; | |
142 | u8 idx; | |
143 | u8 txq_idx; /* index of this stream in priv->txq */ | |
144 | }; | |
145 | ||
a66098da | 146 | struct mwl8k_priv { |
a66098da | 147 | struct ieee80211_hw *hw; |
a66098da | 148 | struct pci_dev *pdev; |
a66098da | 149 | |
45a390dd LB |
150 | struct mwl8k_device_info *device_info; |
151 | ||
be695fc4 LB |
152 | void __iomem *sram; |
153 | void __iomem *regs; | |
154 | ||
155 | /* firmware */ | |
d1f9e41d BC |
156 | const struct firmware *fw_helper; |
157 | const struct firmware *fw_ucode; | |
a66098da | 158 | |
be695fc4 LB |
159 | /* hardware/firmware parameters */ |
160 | bool ap_fw; | |
161 | struct rxd_ops *rxd_ops; | |
777ad375 LB |
162 | struct ieee80211_supported_band band_24; |
163 | struct ieee80211_channel channels_24[14]; | |
164 | struct ieee80211_rate rates_24[14]; | |
4eae9edd LB |
165 | struct ieee80211_supported_band band_50; |
166 | struct ieee80211_channel channels_50[4]; | |
167 | struct ieee80211_rate rates_50[9]; | |
ee0ddf18 LB |
168 | u32 ap_macids_supported; |
169 | u32 sta_macids_supported; | |
be695fc4 | 170 | |
8a7a578c BC |
171 | /* Ampdu stream information */ |
172 | u8 num_ampdu_queues; | |
173 | ||
618952a7 LB |
174 | /* firmware access */ |
175 | struct mutex fw_mutex; | |
176 | struct task_struct *fw_mutex_owner; | |
177 | int fw_mutex_depth; | |
618952a7 LB |
178 | struct completion *hostcmd_wait; |
179 | ||
a66098da LB |
180 | /* lock held over TX and TX reap */ |
181 | spinlock_t tx_lock; | |
a66098da | 182 | |
88de754a LB |
183 | /* TX quiesce completion, protected by fw_mutex and tx_lock */ |
184 | struct completion *tx_wait; | |
185 | ||
f5bb87cf | 186 | /* List of interfaces. */ |
ee0ddf18 | 187 | u32 macids_used; |
f5bb87cf | 188 | struct list_head vif_list; |
a66098da | 189 | |
a66098da LB |
190 | /* power management status cookie from firmware */ |
191 | u32 *cookie; | |
192 | dma_addr_t cookie_dma; | |
193 | ||
194 | u16 num_mcaddrs; | |
a66098da | 195 | u8 hw_rev; |
2aa7b01f | 196 | u32 fw_rev; |
a66098da LB |
197 | |
198 | /* | |
199 | * Running count of TX packets in flight, to avoid | |
200 | * iterating over the transmit rings each time. | |
201 | */ | |
202 | int pending_tx_pkts; | |
203 | ||
204 | struct mwl8k_rx_queue rxq[MWL8K_RX_QUEUES]; | |
8a7a578c BC |
205 | struct mwl8k_tx_queue txq[MWL8K_TX_QUEUES + MWL8K_MAX_AMPDU_QUEUES]; |
206 | u32 txq_offset[MWL8K_TX_QUEUES + MWL8K_MAX_AMPDU_QUEUES]; | |
a66098da | 207 | |
c46563b7 | 208 | bool radio_on; |
68ce3884 | 209 | bool radio_short_preamble; |
a43c49a8 | 210 | bool sniffer_enabled; |
0439b1f5 | 211 | bool wmm_enabled; |
a66098da | 212 | |
a66098da LB |
213 | /* XXX need to convert this to handle multiple interfaces */ |
214 | bool capture_beacon; | |
d89173f2 | 215 | u8 capture_bssid[ETH_ALEN]; |
a66098da LB |
216 | struct sk_buff *beacon_skb; |
217 | ||
218 | /* | |
219 | * This FJ worker has to be global as it is scheduled from the | |
220 | * RX handler. At this point we don't know which interface it | |
221 | * belongs to until the list of bssids waiting to complete join | |
222 | * is checked. | |
223 | */ | |
224 | struct work_struct finalize_join_worker; | |
225 | ||
1e9f9de3 LB |
226 | /* Tasklet to perform TX reclaim. */ |
227 | struct tasklet_struct poll_tx_task; | |
67e2eb27 LB |
228 | |
229 | /* Tasklet to perform RX. */ | |
230 | struct tasklet_struct poll_rx_task; | |
0d462bbb JL |
231 | |
232 | /* Most recently reported noise in dBm */ | |
233 | s8 noise; | |
0863ade8 BC |
234 | |
235 | /* | |
236 | * preserve the queue configurations so they can be restored if/when | |
237 | * the firmware image is swapped. | |
238 | */ | |
239 | struct ieee80211_tx_queue_params wmm_params[MWL8K_TX_QUEUES]; | |
99020471 BC |
240 | |
241 | /* async firmware loading state */ | |
242 | unsigned fw_state; | |
243 | char *fw_pref; | |
244 | char *fw_alt; | |
245 | struct completion firmware_loading_complete; | |
a66098da LB |
246 | }; |
247 | ||
e53d9b96 NS |
248 | #define MAX_WEP_KEY_LEN 13 |
249 | #define NUM_WEP_KEYS 4 | |
250 | ||
a66098da LB |
251 | /* Per interface specific private data */ |
252 | struct mwl8k_vif { | |
f5bb87cf LB |
253 | struct list_head list; |
254 | struct ieee80211_vif *vif; | |
255 | ||
f57ca9c1 LB |
256 | /* Firmware macid for this vif. */ |
257 | int macid; | |
258 | ||
c2c2b12a | 259 | /* Non AMPDU sequence number assigned by driver. */ |
a680400e | 260 | u16 seqno; |
e53d9b96 NS |
261 | |
262 | /* Saved WEP keys */ | |
263 | struct { | |
264 | u8 enabled; | |
265 | u8 key[sizeof(struct ieee80211_key_conf) + MAX_WEP_KEY_LEN]; | |
266 | } wep_key_conf[NUM_WEP_KEYS]; | |
d9a07d49 NS |
267 | |
268 | /* BSSID */ | |
269 | u8 bssid[ETH_ALEN]; | |
270 | ||
271 | /* A flag to indicate is HW crypto is enabled for this bssid */ | |
272 | bool is_hw_crypto_enabled; | |
a66098da | 273 | }; |
a94cc97e | 274 | #define MWL8K_VIF(_vif) ((struct mwl8k_vif *)&((_vif)->drv_priv)) |
fcdc403c | 275 | #define IEEE80211_KEY_CONF(_u8) ((struct ieee80211_key_conf *)(_u8)) |
a66098da | 276 | |
a680400e LB |
277 | struct mwl8k_sta { |
278 | /* Index into station database. Returned by UPDATE_STADB. */ | |
279 | u8 peer_id; | |
280 | }; | |
281 | #define MWL8K_STA(_sta) ((struct mwl8k_sta *)&((_sta)->drv_priv)) | |
282 | ||
777ad375 | 283 | static const struct ieee80211_channel mwl8k_channels_24[] = { |
a66098da LB |
284 | { .center_freq = 2412, .hw_value = 1, }, |
285 | { .center_freq = 2417, .hw_value = 2, }, | |
286 | { .center_freq = 2422, .hw_value = 3, }, | |
287 | { .center_freq = 2427, .hw_value = 4, }, | |
288 | { .center_freq = 2432, .hw_value = 5, }, | |
289 | { .center_freq = 2437, .hw_value = 6, }, | |
290 | { .center_freq = 2442, .hw_value = 7, }, | |
291 | { .center_freq = 2447, .hw_value = 8, }, | |
292 | { .center_freq = 2452, .hw_value = 9, }, | |
293 | { .center_freq = 2457, .hw_value = 10, }, | |
294 | { .center_freq = 2462, .hw_value = 11, }, | |
647ca6b0 LB |
295 | { .center_freq = 2467, .hw_value = 12, }, |
296 | { .center_freq = 2472, .hw_value = 13, }, | |
297 | { .center_freq = 2484, .hw_value = 14, }, | |
a66098da LB |
298 | }; |
299 | ||
777ad375 | 300 | static const struct ieee80211_rate mwl8k_rates_24[] = { |
a66098da LB |
301 | { .bitrate = 10, .hw_value = 2, }, |
302 | { .bitrate = 20, .hw_value = 4, }, | |
303 | { .bitrate = 55, .hw_value = 11, }, | |
5dfd3e2c LB |
304 | { .bitrate = 110, .hw_value = 22, }, |
305 | { .bitrate = 220, .hw_value = 44, }, | |
a66098da LB |
306 | { .bitrate = 60, .hw_value = 12, }, |
307 | { .bitrate = 90, .hw_value = 18, }, | |
a66098da LB |
308 | { .bitrate = 120, .hw_value = 24, }, |
309 | { .bitrate = 180, .hw_value = 36, }, | |
310 | { .bitrate = 240, .hw_value = 48, }, | |
311 | { .bitrate = 360, .hw_value = 72, }, | |
312 | { .bitrate = 480, .hw_value = 96, }, | |
313 | { .bitrate = 540, .hw_value = 108, }, | |
140eb5e2 LB |
314 | { .bitrate = 720, .hw_value = 144, }, |
315 | }; | |
316 | ||
4eae9edd LB |
317 | static const struct ieee80211_channel mwl8k_channels_50[] = { |
318 | { .center_freq = 5180, .hw_value = 36, }, | |
319 | { .center_freq = 5200, .hw_value = 40, }, | |
320 | { .center_freq = 5220, .hw_value = 44, }, | |
321 | { .center_freq = 5240, .hw_value = 48, }, | |
322 | }; | |
323 | ||
324 | static const struct ieee80211_rate mwl8k_rates_50[] = { | |
325 | { .bitrate = 60, .hw_value = 12, }, | |
326 | { .bitrate = 90, .hw_value = 18, }, | |
327 | { .bitrate = 120, .hw_value = 24, }, | |
328 | { .bitrate = 180, .hw_value = 36, }, | |
329 | { .bitrate = 240, .hw_value = 48, }, | |
330 | { .bitrate = 360, .hw_value = 72, }, | |
331 | { .bitrate = 480, .hw_value = 96, }, | |
332 | { .bitrate = 540, .hw_value = 108, }, | |
333 | { .bitrate = 720, .hw_value = 144, }, | |
334 | }; | |
335 | ||
a66098da | 336 | /* Set or get info from Firmware */ |
a66098da | 337 | #define MWL8K_CMD_GET 0x0000 |
41fdf097 NS |
338 | #define MWL8K_CMD_SET 0x0001 |
339 | #define MWL8K_CMD_SET_LIST 0x0002 | |
a66098da LB |
340 | |
341 | /* Firmware command codes */ | |
342 | #define MWL8K_CMD_CODE_DNLD 0x0001 | |
343 | #define MWL8K_CMD_GET_HW_SPEC 0x0003 | |
42fba21d | 344 | #define MWL8K_CMD_SET_HW_SPEC 0x0004 |
a66098da LB |
345 | #define MWL8K_CMD_MAC_MULTICAST_ADR 0x0010 |
346 | #define MWL8K_CMD_GET_STAT 0x0014 | |
ff45fc60 LB |
347 | #define MWL8K_CMD_RADIO_CONTROL 0x001c |
348 | #define MWL8K_CMD_RF_TX_POWER 0x001e | |
41fdf097 | 349 | #define MWL8K_CMD_TX_POWER 0x001f |
08b06347 | 350 | #define MWL8K_CMD_RF_ANTENNA 0x0020 |
aa21d0f6 | 351 | #define MWL8K_CMD_SET_BEACON 0x0100 /* per-vif */ |
a66098da LB |
352 | #define MWL8K_CMD_SET_PRE_SCAN 0x0107 |
353 | #define MWL8K_CMD_SET_POST_SCAN 0x0108 | |
ff45fc60 LB |
354 | #define MWL8K_CMD_SET_RF_CHANNEL 0x010a |
355 | #define MWL8K_CMD_SET_AID 0x010d | |
356 | #define MWL8K_CMD_SET_RATE 0x0110 | |
357 | #define MWL8K_CMD_SET_FINALIZE_JOIN 0x0111 | |
358 | #define MWL8K_CMD_RTS_THRESHOLD 0x0113 | |
a66098da | 359 | #define MWL8K_CMD_SET_SLOT 0x0114 |
ff45fc60 LB |
360 | #define MWL8K_CMD_SET_EDCA_PARAMS 0x0115 |
361 | #define MWL8K_CMD_SET_WMM_MODE 0x0123 | |
a66098da | 362 | #define MWL8K_CMD_MIMO_CONFIG 0x0125 |
ff45fc60 | 363 | #define MWL8K_CMD_USE_FIXED_RATE 0x0126 |
a66098da | 364 | #define MWL8K_CMD_ENABLE_SNIFFER 0x0150 |
aa21d0f6 | 365 | #define MWL8K_CMD_SET_MAC_ADDR 0x0202 /* per-vif */ |
a66098da | 366 | #define MWL8K_CMD_SET_RATEADAPT_MODE 0x0203 |
aa21d0f6 LB |
367 | #define MWL8K_CMD_BSS_START 0x1100 /* per-vif */ |
368 | #define MWL8K_CMD_SET_NEW_STN 0x1111 /* per-vif */ | |
fcdc403c | 369 | #define MWL8K_CMD_UPDATE_ENCRYPTION 0x1122 /* per-vif */ |
ff45fc60 | 370 | #define MWL8K_CMD_UPDATE_STADB 0x1123 |
5faa1aff | 371 | #define MWL8K_CMD_BASTREAM 0x1125 |
a66098da | 372 | |
b603742f | 373 | static const char *mwl8k_cmd_name(__le16 cmd, char *buf, int bufsize) |
a66098da | 374 | { |
b603742f JL |
375 | u16 command = le16_to_cpu(cmd); |
376 | ||
a66098da LB |
377 | #define MWL8K_CMDNAME(x) case MWL8K_CMD_##x: do {\ |
378 | snprintf(buf, bufsize, "%s", #x);\ | |
379 | return buf;\ | |
380 | } while (0) | |
b603742f | 381 | switch (command & ~0x8000) { |
a66098da LB |
382 | MWL8K_CMDNAME(CODE_DNLD); |
383 | MWL8K_CMDNAME(GET_HW_SPEC); | |
42fba21d | 384 | MWL8K_CMDNAME(SET_HW_SPEC); |
a66098da LB |
385 | MWL8K_CMDNAME(MAC_MULTICAST_ADR); |
386 | MWL8K_CMDNAME(GET_STAT); | |
387 | MWL8K_CMDNAME(RADIO_CONTROL); | |
388 | MWL8K_CMDNAME(RF_TX_POWER); | |
41fdf097 | 389 | MWL8K_CMDNAME(TX_POWER); |
08b06347 | 390 | MWL8K_CMDNAME(RF_ANTENNA); |
b64fe619 | 391 | MWL8K_CMDNAME(SET_BEACON); |
a66098da LB |
392 | MWL8K_CMDNAME(SET_PRE_SCAN); |
393 | MWL8K_CMDNAME(SET_POST_SCAN); | |
394 | MWL8K_CMDNAME(SET_RF_CHANNEL); | |
ff45fc60 LB |
395 | MWL8K_CMDNAME(SET_AID); |
396 | MWL8K_CMDNAME(SET_RATE); | |
397 | MWL8K_CMDNAME(SET_FINALIZE_JOIN); | |
398 | MWL8K_CMDNAME(RTS_THRESHOLD); | |
a66098da | 399 | MWL8K_CMDNAME(SET_SLOT); |
ff45fc60 LB |
400 | MWL8K_CMDNAME(SET_EDCA_PARAMS); |
401 | MWL8K_CMDNAME(SET_WMM_MODE); | |
a66098da | 402 | MWL8K_CMDNAME(MIMO_CONFIG); |
ff45fc60 | 403 | MWL8K_CMDNAME(USE_FIXED_RATE); |
a66098da | 404 | MWL8K_CMDNAME(ENABLE_SNIFFER); |
32060e1b | 405 | MWL8K_CMDNAME(SET_MAC_ADDR); |
a66098da | 406 | MWL8K_CMDNAME(SET_RATEADAPT_MODE); |
b64fe619 | 407 | MWL8K_CMDNAME(BSS_START); |
3f5610ff | 408 | MWL8K_CMDNAME(SET_NEW_STN); |
fcdc403c | 409 | MWL8K_CMDNAME(UPDATE_ENCRYPTION); |
ff45fc60 | 410 | MWL8K_CMDNAME(UPDATE_STADB); |
5faa1aff | 411 | MWL8K_CMDNAME(BASTREAM); |
a66098da LB |
412 | default: |
413 | snprintf(buf, bufsize, "0x%x", cmd); | |
414 | } | |
415 | #undef MWL8K_CMDNAME | |
416 | ||
417 | return buf; | |
418 | } | |
419 | ||
420 | /* Hardware and firmware reset */ | |
421 | static void mwl8k_hw_reset(struct mwl8k_priv *priv) | |
422 | { | |
423 | iowrite32(MWL8K_H2A_INT_RESET, | |
424 | priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS); | |
425 | iowrite32(MWL8K_H2A_INT_RESET, | |
426 | priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS); | |
427 | msleep(20); | |
428 | } | |
429 | ||
430 | /* Release fw image */ | |
d1f9e41d | 431 | static void mwl8k_release_fw(const struct firmware **fw) |
a66098da LB |
432 | { |
433 | if (*fw == NULL) | |
434 | return; | |
435 | release_firmware(*fw); | |
436 | *fw = NULL; | |
437 | } | |
438 | ||
439 | static void mwl8k_release_firmware(struct mwl8k_priv *priv) | |
440 | { | |
22be40d9 LB |
441 | mwl8k_release_fw(&priv->fw_ucode); |
442 | mwl8k_release_fw(&priv->fw_helper); | |
a66098da LB |
443 | } |
444 | ||
99020471 BC |
445 | /* states for asynchronous f/w loading */ |
446 | static void mwl8k_fw_state_machine(const struct firmware *fw, void *context); | |
447 | enum { | |
448 | FW_STATE_INIT = 0, | |
449 | FW_STATE_LOADING_PREF, | |
450 | FW_STATE_LOADING_ALT, | |
451 | FW_STATE_ERROR, | |
452 | }; | |
453 | ||
a66098da LB |
454 | /* Request fw image */ |
455 | static int mwl8k_request_fw(struct mwl8k_priv *priv, | |
d1f9e41d | 456 | const char *fname, const struct firmware **fw, |
99020471 | 457 | bool nowait) |
a66098da LB |
458 | { |
459 | /* release current image */ | |
460 | if (*fw != NULL) | |
461 | mwl8k_release_fw(fw); | |
462 | ||
99020471 BC |
463 | if (nowait) |
464 | return request_firmware_nowait(THIS_MODULE, 1, fname, | |
465 | &priv->pdev->dev, GFP_KERNEL, | |
466 | priv, mwl8k_fw_state_machine); | |
467 | else | |
d1f9e41d | 468 | return request_firmware(fw, fname, &priv->pdev->dev); |
a66098da LB |
469 | } |
470 | ||
99020471 BC |
471 | static int mwl8k_request_firmware(struct mwl8k_priv *priv, char *fw_image, |
472 | bool nowait) | |
a66098da | 473 | { |
a74b295e | 474 | struct mwl8k_device_info *di = priv->device_info; |
a66098da LB |
475 | int rc; |
476 | ||
a74b295e | 477 | if (di->helper_image != NULL) { |
99020471 BC |
478 | if (nowait) |
479 | rc = mwl8k_request_fw(priv, di->helper_image, | |
480 | &priv->fw_helper, true); | |
481 | else | |
482 | rc = mwl8k_request_fw(priv, di->helper_image, | |
483 | &priv->fw_helper, false); | |
484 | if (rc) | |
485 | printk(KERN_ERR "%s: Error requesting helper fw %s\n", | |
486 | pci_name(priv->pdev), di->helper_image); | |
487 | ||
488 | if (rc || nowait) | |
a74b295e | 489 | return rc; |
a66098da LB |
490 | } |
491 | ||
99020471 BC |
492 | if (nowait) { |
493 | /* | |
494 | * if we get here, no helper image is needed. Skip the | |
495 | * FW_STATE_INIT state. | |
496 | */ | |
497 | priv->fw_state = FW_STATE_LOADING_PREF; | |
498 | rc = mwl8k_request_fw(priv, fw_image, | |
499 | &priv->fw_ucode, | |
500 | true); | |
501 | } else | |
502 | rc = mwl8k_request_fw(priv, fw_image, | |
503 | &priv->fw_ucode, false); | |
a66098da | 504 | if (rc) { |
c2c357ce | 505 | printk(KERN_ERR "%s: Error requesting firmware file %s\n", |
0863ade8 | 506 | pci_name(priv->pdev), fw_image); |
22be40d9 | 507 | mwl8k_release_fw(&priv->fw_helper); |
a66098da LB |
508 | return rc; |
509 | } | |
510 | ||
511 | return 0; | |
512 | } | |
513 | ||
514 | struct mwl8k_cmd_pkt { | |
515 | __le16 code; | |
516 | __le16 length; | |
f57ca9c1 LB |
517 | __u8 seq_num; |
518 | __u8 macid; | |
a66098da LB |
519 | __le16 result; |
520 | char payload[0]; | |
ba2d3587 | 521 | } __packed; |
a66098da LB |
522 | |
523 | /* | |
524 | * Firmware loading. | |
525 | */ | |
526 | static int | |
527 | mwl8k_send_fw_load_cmd(struct mwl8k_priv *priv, void *data, int length) | |
528 | { | |
529 | void __iomem *regs = priv->regs; | |
530 | dma_addr_t dma_addr; | |
a66098da LB |
531 | int loops; |
532 | ||
533 | dma_addr = pci_map_single(priv->pdev, data, length, PCI_DMA_TODEVICE); | |
534 | if (pci_dma_mapping_error(priv->pdev, dma_addr)) | |
535 | return -ENOMEM; | |
536 | ||
537 | iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR); | |
538 | iowrite32(0, regs + MWL8K_HIU_INT_CODE); | |
539 | iowrite32(MWL8K_H2A_INT_DOORBELL, | |
540 | regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS); | |
541 | iowrite32(MWL8K_H2A_INT_DUMMY, | |
542 | regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS); | |
543 | ||
a66098da LB |
544 | loops = 1000; |
545 | do { | |
546 | u32 int_code; | |
547 | ||
548 | int_code = ioread32(regs + MWL8K_HIU_INT_CODE); | |
549 | if (int_code == MWL8K_INT_CODE_CMD_FINISHED) { | |
550 | iowrite32(0, regs + MWL8K_HIU_INT_CODE); | |
a66098da LB |
551 | break; |
552 | } | |
553 | ||
3d76e82c | 554 | cond_resched(); |
a66098da LB |
555 | udelay(1); |
556 | } while (--loops); | |
557 | ||
558 | pci_unmap_single(priv->pdev, dma_addr, length, PCI_DMA_TODEVICE); | |
559 | ||
d4b70570 | 560 | return loops ? 0 : -ETIMEDOUT; |
a66098da LB |
561 | } |
562 | ||
563 | static int mwl8k_load_fw_image(struct mwl8k_priv *priv, | |
564 | const u8 *data, size_t length) | |
565 | { | |
566 | struct mwl8k_cmd_pkt *cmd; | |
567 | int done; | |
568 | int rc = 0; | |
569 | ||
570 | cmd = kmalloc(sizeof(*cmd) + 256, GFP_KERNEL); | |
571 | if (cmd == NULL) | |
572 | return -ENOMEM; | |
573 | ||
574 | cmd->code = cpu_to_le16(MWL8K_CMD_CODE_DNLD); | |
575 | cmd->seq_num = 0; | |
f57ca9c1 | 576 | cmd->macid = 0; |
a66098da LB |
577 | cmd->result = 0; |
578 | ||
579 | done = 0; | |
580 | while (length) { | |
581 | int block_size = length > 256 ? 256 : length; | |
582 | ||
583 | memcpy(cmd->payload, data + done, block_size); | |
584 | cmd->length = cpu_to_le16(block_size); | |
585 | ||
586 | rc = mwl8k_send_fw_load_cmd(priv, cmd, | |
587 | sizeof(*cmd) + block_size); | |
588 | if (rc) | |
589 | break; | |
590 | ||
591 | done += block_size; | |
592 | length -= block_size; | |
593 | } | |
594 | ||
595 | if (!rc) { | |
596 | cmd->length = 0; | |
597 | rc = mwl8k_send_fw_load_cmd(priv, cmd, sizeof(*cmd)); | |
598 | } | |
599 | ||
600 | kfree(cmd); | |
601 | ||
602 | return rc; | |
603 | } | |
604 | ||
605 | static int mwl8k_feed_fw_image(struct mwl8k_priv *priv, | |
606 | const u8 *data, size_t length) | |
607 | { | |
608 | unsigned char *buffer; | |
609 | int may_continue, rc = 0; | |
610 | u32 done, prev_block_size; | |
611 | ||
612 | buffer = kmalloc(1024, GFP_KERNEL); | |
613 | if (buffer == NULL) | |
614 | return -ENOMEM; | |
615 | ||
616 | done = 0; | |
617 | prev_block_size = 0; | |
618 | may_continue = 1000; | |
619 | while (may_continue > 0) { | |
620 | u32 block_size; | |
621 | ||
622 | block_size = ioread32(priv->regs + MWL8K_HIU_SCRATCH); | |
623 | if (block_size & 1) { | |
624 | block_size &= ~1; | |
625 | may_continue--; | |
626 | } else { | |
627 | done += prev_block_size; | |
628 | length -= prev_block_size; | |
629 | } | |
630 | ||
631 | if (block_size > 1024 || block_size > length) { | |
632 | rc = -EOVERFLOW; | |
633 | break; | |
634 | } | |
635 | ||
636 | if (length == 0) { | |
637 | rc = 0; | |
638 | break; | |
639 | } | |
640 | ||
641 | if (block_size == 0) { | |
642 | rc = -EPROTO; | |
643 | may_continue--; | |
644 | udelay(1); | |
645 | continue; | |
646 | } | |
647 | ||
648 | prev_block_size = block_size; | |
649 | memcpy(buffer, data + done, block_size); | |
650 | ||
651 | rc = mwl8k_send_fw_load_cmd(priv, buffer, block_size); | |
652 | if (rc) | |
653 | break; | |
654 | } | |
655 | ||
656 | if (!rc && length != 0) | |
657 | rc = -EREMOTEIO; | |
658 | ||
659 | kfree(buffer); | |
660 | ||
661 | return rc; | |
662 | } | |
663 | ||
c2c357ce | 664 | static int mwl8k_load_firmware(struct ieee80211_hw *hw) |
a66098da | 665 | { |
c2c357ce | 666 | struct mwl8k_priv *priv = hw->priv; |
d1f9e41d | 667 | const struct firmware *fw = priv->fw_ucode; |
c2c357ce LB |
668 | int rc; |
669 | int loops; | |
670 | ||
671 | if (!memcmp(fw->data, "\x01\x00\x00\x00", 4)) { | |
d1f9e41d | 672 | const struct firmware *helper = priv->fw_helper; |
a66098da | 673 | |
c2c357ce LB |
674 | if (helper == NULL) { |
675 | printk(KERN_ERR "%s: helper image needed but none " | |
676 | "given\n", pci_name(priv->pdev)); | |
677 | return -EINVAL; | |
678 | } | |
a66098da | 679 | |
c2c357ce | 680 | rc = mwl8k_load_fw_image(priv, helper->data, helper->size); |
a66098da LB |
681 | if (rc) { |
682 | printk(KERN_ERR "%s: unable to load firmware " | |
c2c357ce | 683 | "helper image\n", pci_name(priv->pdev)); |
a66098da LB |
684 | return rc; |
685 | } | |
89b872e2 | 686 | msleep(5); |
a66098da | 687 | |
c2c357ce | 688 | rc = mwl8k_feed_fw_image(priv, fw->data, fw->size); |
a66098da | 689 | } else { |
c2c357ce | 690 | rc = mwl8k_load_fw_image(priv, fw->data, fw->size); |
a66098da LB |
691 | } |
692 | ||
693 | if (rc) { | |
c2c357ce LB |
694 | printk(KERN_ERR "%s: unable to load firmware image\n", |
695 | pci_name(priv->pdev)); | |
a66098da LB |
696 | return rc; |
697 | } | |
698 | ||
89a91f4f | 699 | iowrite32(MWL8K_MODE_STA, priv->regs + MWL8K_HIU_GEN_PTR); |
a66098da | 700 | |
89b872e2 | 701 | loops = 500000; |
a66098da | 702 | do { |
eae74e65 LB |
703 | u32 ready_code; |
704 | ||
705 | ready_code = ioread32(priv->regs + MWL8K_HIU_INT_CODE); | |
706 | if (ready_code == MWL8K_FWAP_READY) { | |
707 | priv->ap_fw = 1; | |
708 | break; | |
709 | } else if (ready_code == MWL8K_FWSTA_READY) { | |
710 | priv->ap_fw = 0; | |
a66098da | 711 | break; |
eae74e65 LB |
712 | } |
713 | ||
714 | cond_resched(); | |
a66098da LB |
715 | udelay(1); |
716 | } while (--loops); | |
717 | ||
718 | return loops ? 0 : -ETIMEDOUT; | |
719 | } | |
720 | ||
721 | ||
a66098da LB |
722 | /* DMA header used by firmware and hardware. */ |
723 | struct mwl8k_dma_data { | |
724 | __le16 fwlen; | |
725 | struct ieee80211_hdr wh; | |
20f09c3d | 726 | char data[0]; |
ba2d3587 | 727 | } __packed; |
a66098da LB |
728 | |
729 | /* Routines to add/remove DMA header from skb. */ | |
20f09c3d | 730 | static inline void mwl8k_remove_dma_header(struct sk_buff *skb, __le16 qos) |
a66098da | 731 | { |
20f09c3d LB |
732 | struct mwl8k_dma_data *tr; |
733 | int hdrlen; | |
734 | ||
735 | tr = (struct mwl8k_dma_data *)skb->data; | |
736 | hdrlen = ieee80211_hdrlen(tr->wh.frame_control); | |
737 | ||
738 | if (hdrlen != sizeof(tr->wh)) { | |
739 | if (ieee80211_is_data_qos(tr->wh.frame_control)) { | |
740 | memmove(tr->data - hdrlen, &tr->wh, hdrlen - 2); | |
741 | *((__le16 *)(tr->data - 2)) = qos; | |
742 | } else { | |
743 | memmove(tr->data - hdrlen, &tr->wh, hdrlen); | |
744 | } | |
a66098da | 745 | } |
20f09c3d LB |
746 | |
747 | if (hdrlen != sizeof(*tr)) | |
748 | skb_pull(skb, sizeof(*tr) - hdrlen); | |
a66098da LB |
749 | } |
750 | ||
252486a1 NS |
751 | static void |
752 | mwl8k_add_dma_header(struct sk_buff *skb, int tail_pad) | |
a66098da LB |
753 | { |
754 | struct ieee80211_hdr *wh; | |
ca009301 | 755 | int hdrlen; |
252486a1 | 756 | int reqd_hdrlen; |
a66098da LB |
757 | struct mwl8k_dma_data *tr; |
758 | ||
ca009301 LB |
759 | /* |
760 | * Add a firmware DMA header; the firmware requires that we | |
761 | * present a 2-byte payload length followed by a 4-address | |
762 | * header (without QoS field), followed (optionally) by any | |
763 | * WEP/ExtIV header (but only filled in for CCMP). | |
764 | */ | |
a66098da | 765 | wh = (struct ieee80211_hdr *)skb->data; |
ca009301 | 766 | |
a66098da | 767 | hdrlen = ieee80211_hdrlen(wh->frame_control); |
252486a1 NS |
768 | reqd_hdrlen = sizeof(*tr); |
769 | ||
770 | if (hdrlen != reqd_hdrlen) | |
771 | skb_push(skb, reqd_hdrlen - hdrlen); | |
a66098da | 772 | |
ca009301 | 773 | if (ieee80211_is_data_qos(wh->frame_control)) |
252486a1 | 774 | hdrlen -= IEEE80211_QOS_CTL_LEN; |
a66098da LB |
775 | |
776 | tr = (struct mwl8k_dma_data *)skb->data; | |
777 | if (wh != &tr->wh) | |
778 | memmove(&tr->wh, wh, hdrlen); | |
ca009301 LB |
779 | if (hdrlen != sizeof(tr->wh)) |
780 | memset(((void *)&tr->wh) + hdrlen, 0, sizeof(tr->wh) - hdrlen); | |
a66098da LB |
781 | |
782 | /* | |
783 | * Firmware length is the length of the fully formed "802.11 | |
784 | * payload". That is, everything except for the 802.11 header. | |
785 | * This includes all crypto material including the MIC. | |
786 | */ | |
252486a1 | 787 | tr->fwlen = cpu_to_le16(skb->len - sizeof(*tr) + tail_pad); |
a66098da LB |
788 | } |
789 | ||
e53d9b96 NS |
790 | static void mwl8k_encapsulate_tx_frame(struct sk_buff *skb) |
791 | { | |
792 | struct ieee80211_hdr *wh; | |
793 | struct ieee80211_tx_info *tx_info; | |
794 | struct ieee80211_key_conf *key_conf; | |
795 | int data_pad; | |
796 | ||
797 | wh = (struct ieee80211_hdr *)skb->data; | |
798 | ||
799 | tx_info = IEEE80211_SKB_CB(skb); | |
800 | ||
801 | key_conf = NULL; | |
802 | if (ieee80211_is_data(wh->frame_control)) | |
803 | key_conf = tx_info->control.hw_key; | |
804 | ||
805 | /* | |
806 | * Make sure the packet header is in the DMA header format (4-address | |
807 | * without QoS), the necessary crypto padding between the header and the | |
808 | * payload has already been provided by mac80211, but it doesn't add tail | |
809 | * padding when HW crypto is enabled. | |
810 | * | |
811 | * We have the following trailer padding requirements: | |
812 | * - WEP: 4 trailer bytes (ICV) | |
813 | * - TKIP: 12 trailer bytes (8 MIC + 4 ICV) | |
814 | * - CCMP: 8 trailer bytes (MIC) | |
815 | */ | |
816 | data_pad = 0; | |
817 | if (key_conf != NULL) { | |
818 | switch (key_conf->cipher) { | |
819 | case WLAN_CIPHER_SUITE_WEP40: | |
820 | case WLAN_CIPHER_SUITE_WEP104: | |
821 | data_pad = 4; | |
822 | break; | |
823 | case WLAN_CIPHER_SUITE_TKIP: | |
824 | data_pad = 12; | |
825 | break; | |
826 | case WLAN_CIPHER_SUITE_CCMP: | |
827 | data_pad = 8; | |
828 | break; | |
829 | } | |
830 | } | |
831 | mwl8k_add_dma_header(skb, data_pad); | |
832 | } | |
a66098da LB |
833 | |
834 | /* | |
89a91f4f | 835 | * Packet reception for 88w8366 AP firmware. |
6f6d1e9a | 836 | */ |
89a91f4f | 837 | struct mwl8k_rxd_8366_ap { |
6f6d1e9a LB |
838 | __le16 pkt_len; |
839 | __u8 sq2; | |
840 | __u8 rate; | |
841 | __le32 pkt_phys_addr; | |
842 | __le32 next_rxd_phys_addr; | |
843 | __le16 qos_control; | |
844 | __le16 htsig2; | |
845 | __le32 hw_rssi_info; | |
846 | __le32 hw_noise_floor_info; | |
847 | __u8 noise_floor; | |
848 | __u8 pad0[3]; | |
849 | __u8 rssi; | |
850 | __u8 rx_status; | |
851 | __u8 channel; | |
852 | __u8 rx_ctrl; | |
ba2d3587 | 853 | } __packed; |
6f6d1e9a | 854 | |
89a91f4f LB |
855 | #define MWL8K_8366_AP_RATE_INFO_MCS_FORMAT 0x80 |
856 | #define MWL8K_8366_AP_RATE_INFO_40MHZ 0x40 | |
857 | #define MWL8K_8366_AP_RATE_INFO_RATEID(x) ((x) & 0x3f) | |
8e9f33f0 | 858 | |
89a91f4f | 859 | #define MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST 0x80 |
6f6d1e9a | 860 | |
d9a07d49 NS |
861 | /* 8366 AP rx_status bits */ |
862 | #define MWL8K_8366_AP_RXSTAT_DECRYPT_ERR_MASK 0x80 | |
863 | #define MWL8K_8366_AP_RXSTAT_GENERAL_DECRYPT_ERR 0xFF | |
864 | #define MWL8K_8366_AP_RXSTAT_TKIP_DECRYPT_MIC_ERR 0x02 | |
865 | #define MWL8K_8366_AP_RXSTAT_WEP_DECRYPT_ICV_ERR 0x04 | |
866 | #define MWL8K_8366_AP_RXSTAT_TKIP_DECRYPT_ICV_ERR 0x08 | |
867 | ||
89a91f4f | 868 | static void mwl8k_rxd_8366_ap_init(void *_rxd, dma_addr_t next_dma_addr) |
6f6d1e9a | 869 | { |
89a91f4f | 870 | struct mwl8k_rxd_8366_ap *rxd = _rxd; |
6f6d1e9a LB |
871 | |
872 | rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr); | |
89a91f4f | 873 | rxd->rx_ctrl = MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST; |
6f6d1e9a LB |
874 | } |
875 | ||
89a91f4f | 876 | static void mwl8k_rxd_8366_ap_refill(void *_rxd, dma_addr_t addr, int len) |
6f6d1e9a | 877 | { |
89a91f4f | 878 | struct mwl8k_rxd_8366_ap *rxd = _rxd; |
6f6d1e9a LB |
879 | |
880 | rxd->pkt_len = cpu_to_le16(len); | |
881 | rxd->pkt_phys_addr = cpu_to_le32(addr); | |
882 | wmb(); | |
883 | rxd->rx_ctrl = 0; | |
884 | } | |
885 | ||
886 | static int | |
89a91f4f | 887 | mwl8k_rxd_8366_ap_process(void *_rxd, struct ieee80211_rx_status *status, |
0d462bbb | 888 | __le16 *qos, s8 *noise) |
6f6d1e9a | 889 | { |
89a91f4f | 890 | struct mwl8k_rxd_8366_ap *rxd = _rxd; |
6f6d1e9a | 891 | |
89a91f4f | 892 | if (!(rxd->rx_ctrl & MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST)) |
6f6d1e9a LB |
893 | return -1; |
894 | rmb(); | |
895 | ||
896 | memset(status, 0, sizeof(*status)); | |
897 | ||
898 | status->signal = -rxd->rssi; | |
0d462bbb | 899 | *noise = -rxd->noise_floor; |
6f6d1e9a | 900 | |
89a91f4f | 901 | if (rxd->rate & MWL8K_8366_AP_RATE_INFO_MCS_FORMAT) { |
6f6d1e9a | 902 | status->flag |= RX_FLAG_HT; |
89a91f4f | 903 | if (rxd->rate & MWL8K_8366_AP_RATE_INFO_40MHZ) |
8e9f33f0 | 904 | status->flag |= RX_FLAG_40MHZ; |
89a91f4f | 905 | status->rate_idx = MWL8K_8366_AP_RATE_INFO_RATEID(rxd->rate); |
6f6d1e9a LB |
906 | } else { |
907 | int i; | |
908 | ||
777ad375 LB |
909 | for (i = 0; i < ARRAY_SIZE(mwl8k_rates_24); i++) { |
910 | if (mwl8k_rates_24[i].hw_value == rxd->rate) { | |
6f6d1e9a LB |
911 | status->rate_idx = i; |
912 | break; | |
913 | } | |
914 | } | |
915 | } | |
916 | ||
85478344 LB |
917 | if (rxd->channel > 14) { |
918 | status->band = IEEE80211_BAND_5GHZ; | |
919 | if (!(status->flag & RX_FLAG_HT)) | |
920 | status->rate_idx -= 5; | |
921 | } else { | |
922 | status->band = IEEE80211_BAND_2GHZ; | |
923 | } | |
59eb21a6 BR |
924 | status->freq = ieee80211_channel_to_frequency(rxd->channel, |
925 | status->band); | |
6f6d1e9a | 926 | |
20f09c3d LB |
927 | *qos = rxd->qos_control; |
928 | ||
d9a07d49 NS |
929 | if ((rxd->rx_status != MWL8K_8366_AP_RXSTAT_GENERAL_DECRYPT_ERR) && |
930 | (rxd->rx_status & MWL8K_8366_AP_RXSTAT_DECRYPT_ERR_MASK) && | |
931 | (rxd->rx_status & MWL8K_8366_AP_RXSTAT_TKIP_DECRYPT_MIC_ERR)) | |
932 | status->flag |= RX_FLAG_MMIC_ERROR; | |
933 | ||
6f6d1e9a LB |
934 | return le16_to_cpu(rxd->pkt_len); |
935 | } | |
936 | ||
89a91f4f LB |
937 | static struct rxd_ops rxd_8366_ap_ops = { |
938 | .rxd_size = sizeof(struct mwl8k_rxd_8366_ap), | |
939 | .rxd_init = mwl8k_rxd_8366_ap_init, | |
940 | .rxd_refill = mwl8k_rxd_8366_ap_refill, | |
941 | .rxd_process = mwl8k_rxd_8366_ap_process, | |
6f6d1e9a LB |
942 | }; |
943 | ||
944 | /* | |
89a91f4f | 945 | * Packet reception for STA firmware. |
a66098da | 946 | */ |
89a91f4f | 947 | struct mwl8k_rxd_sta { |
a66098da LB |
948 | __le16 pkt_len; |
949 | __u8 link_quality; | |
950 | __u8 noise_level; | |
951 | __le32 pkt_phys_addr; | |
45eb400d | 952 | __le32 next_rxd_phys_addr; |
a66098da LB |
953 | __le16 qos_control; |
954 | __le16 rate_info; | |
955 | __le32 pad0[4]; | |
956 | __u8 rssi; | |
957 | __u8 channel; | |
958 | __le16 pad1; | |
959 | __u8 rx_ctrl; | |
960 | __u8 rx_status; | |
961 | __u8 pad2[2]; | |
ba2d3587 | 962 | } __packed; |
a66098da | 963 | |
89a91f4f LB |
964 | #define MWL8K_STA_RATE_INFO_SHORTPRE 0x8000 |
965 | #define MWL8K_STA_RATE_INFO_ANTSELECT(x) (((x) >> 11) & 0x3) | |
966 | #define MWL8K_STA_RATE_INFO_RATEID(x) (((x) >> 3) & 0x3f) | |
967 | #define MWL8K_STA_RATE_INFO_40MHZ 0x0004 | |
968 | #define MWL8K_STA_RATE_INFO_SHORTGI 0x0002 | |
969 | #define MWL8K_STA_RATE_INFO_MCS_FORMAT 0x0001 | |
54bc3a0d | 970 | |
89a91f4f | 971 | #define MWL8K_STA_RX_CTRL_OWNED_BY_HOST 0x02 |
d9a07d49 NS |
972 | #define MWL8K_STA_RX_CTRL_DECRYPT_ERROR 0x04 |
973 | /* ICV=0 or MIC=1 */ | |
974 | #define MWL8K_STA_RX_CTRL_DEC_ERR_TYPE 0x08 | |
975 | /* Key is uploaded only in failure case */ | |
976 | #define MWL8K_STA_RX_CTRL_KEY_INDEX 0x30 | |
54bc3a0d | 977 | |
89a91f4f | 978 | static void mwl8k_rxd_sta_init(void *_rxd, dma_addr_t next_dma_addr) |
54bc3a0d | 979 | { |
89a91f4f | 980 | struct mwl8k_rxd_sta *rxd = _rxd; |
54bc3a0d LB |
981 | |
982 | rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr); | |
89a91f4f | 983 | rxd->rx_ctrl = MWL8K_STA_RX_CTRL_OWNED_BY_HOST; |
54bc3a0d LB |
984 | } |
985 | ||
89a91f4f | 986 | static void mwl8k_rxd_sta_refill(void *_rxd, dma_addr_t addr, int len) |
54bc3a0d | 987 | { |
89a91f4f | 988 | struct mwl8k_rxd_sta *rxd = _rxd; |
54bc3a0d LB |
989 | |
990 | rxd->pkt_len = cpu_to_le16(len); | |
991 | rxd->pkt_phys_addr = cpu_to_le32(addr); | |
992 | wmb(); | |
993 | rxd->rx_ctrl = 0; | |
994 | } | |
995 | ||
996 | static int | |
89a91f4f | 997 | mwl8k_rxd_sta_process(void *_rxd, struct ieee80211_rx_status *status, |
0d462bbb | 998 | __le16 *qos, s8 *noise) |
54bc3a0d | 999 | { |
89a91f4f | 1000 | struct mwl8k_rxd_sta *rxd = _rxd; |
54bc3a0d LB |
1001 | u16 rate_info; |
1002 | ||
89a91f4f | 1003 | if (!(rxd->rx_ctrl & MWL8K_STA_RX_CTRL_OWNED_BY_HOST)) |
54bc3a0d LB |
1004 | return -1; |
1005 | rmb(); | |
1006 | ||
1007 | rate_info = le16_to_cpu(rxd->rate_info); | |
1008 | ||
1009 | memset(status, 0, sizeof(*status)); | |
1010 | ||
1011 | status->signal = -rxd->rssi; | |
0d462bbb | 1012 | *noise = -rxd->noise_level; |
89a91f4f LB |
1013 | status->antenna = MWL8K_STA_RATE_INFO_ANTSELECT(rate_info); |
1014 | status->rate_idx = MWL8K_STA_RATE_INFO_RATEID(rate_info); | |
54bc3a0d | 1015 | |
89a91f4f | 1016 | if (rate_info & MWL8K_STA_RATE_INFO_SHORTPRE) |
54bc3a0d | 1017 | status->flag |= RX_FLAG_SHORTPRE; |
89a91f4f | 1018 | if (rate_info & MWL8K_STA_RATE_INFO_40MHZ) |
54bc3a0d | 1019 | status->flag |= RX_FLAG_40MHZ; |
89a91f4f | 1020 | if (rate_info & MWL8K_STA_RATE_INFO_SHORTGI) |
54bc3a0d | 1021 | status->flag |= RX_FLAG_SHORT_GI; |
89a91f4f | 1022 | if (rate_info & MWL8K_STA_RATE_INFO_MCS_FORMAT) |
54bc3a0d LB |
1023 | status->flag |= RX_FLAG_HT; |
1024 | ||
85478344 LB |
1025 | if (rxd->channel > 14) { |
1026 | status->band = IEEE80211_BAND_5GHZ; | |
1027 | if (!(status->flag & RX_FLAG_HT)) | |
1028 | status->rate_idx -= 5; | |
1029 | } else { | |
1030 | status->band = IEEE80211_BAND_2GHZ; | |
1031 | } | |
59eb21a6 BR |
1032 | status->freq = ieee80211_channel_to_frequency(rxd->channel, |
1033 | status->band); | |
54bc3a0d | 1034 | |
20f09c3d | 1035 | *qos = rxd->qos_control; |
d9a07d49 NS |
1036 | if ((rxd->rx_ctrl & MWL8K_STA_RX_CTRL_DECRYPT_ERROR) && |
1037 | (rxd->rx_ctrl & MWL8K_STA_RX_CTRL_DEC_ERR_TYPE)) | |
1038 | status->flag |= RX_FLAG_MMIC_ERROR; | |
20f09c3d | 1039 | |
54bc3a0d LB |
1040 | return le16_to_cpu(rxd->pkt_len); |
1041 | } | |
1042 | ||
89a91f4f LB |
1043 | static struct rxd_ops rxd_sta_ops = { |
1044 | .rxd_size = sizeof(struct mwl8k_rxd_sta), | |
1045 | .rxd_init = mwl8k_rxd_sta_init, | |
1046 | .rxd_refill = mwl8k_rxd_sta_refill, | |
1047 | .rxd_process = mwl8k_rxd_sta_process, | |
54bc3a0d LB |
1048 | }; |
1049 | ||
1050 | ||
a66098da LB |
1051 | #define MWL8K_RX_DESCS 256 |
1052 | #define MWL8K_RX_MAXSZ 3800 | |
1053 | ||
1054 | static int mwl8k_rxq_init(struct ieee80211_hw *hw, int index) | |
1055 | { | |
1056 | struct mwl8k_priv *priv = hw->priv; | |
1057 | struct mwl8k_rx_queue *rxq = priv->rxq + index; | |
1058 | int size; | |
1059 | int i; | |
1060 | ||
45eb400d LB |
1061 | rxq->rxd_count = 0; |
1062 | rxq->head = 0; | |
1063 | rxq->tail = 0; | |
a66098da | 1064 | |
54bc3a0d | 1065 | size = MWL8K_RX_DESCS * priv->rxd_ops->rxd_size; |
a66098da | 1066 | |
45eb400d LB |
1067 | rxq->rxd = pci_alloc_consistent(priv->pdev, size, &rxq->rxd_dma); |
1068 | if (rxq->rxd == NULL) { | |
5db55844 | 1069 | wiphy_err(hw->wiphy, "failed to alloc RX descriptors\n"); |
a66098da LB |
1070 | return -ENOMEM; |
1071 | } | |
45eb400d | 1072 | memset(rxq->rxd, 0, size); |
a66098da | 1073 | |
b9ede5f1 | 1074 | rxq->buf = kcalloc(MWL8K_RX_DESCS, sizeof(*rxq->buf), GFP_KERNEL); |
788838eb | 1075 | if (rxq->buf == NULL) { |
5db55844 | 1076 | wiphy_err(hw->wiphy, "failed to alloc RX skbuff list\n"); |
45eb400d | 1077 | pci_free_consistent(priv->pdev, size, rxq->rxd, rxq->rxd_dma); |
a66098da LB |
1078 | return -ENOMEM; |
1079 | } | |
a66098da LB |
1080 | |
1081 | for (i = 0; i < MWL8K_RX_DESCS; i++) { | |
54bc3a0d LB |
1082 | int desc_size; |
1083 | void *rxd; | |
a66098da | 1084 | int nexti; |
54bc3a0d LB |
1085 | dma_addr_t next_dma_addr; |
1086 | ||
1087 | desc_size = priv->rxd_ops->rxd_size; | |
1088 | rxd = rxq->rxd + (i * priv->rxd_ops->rxd_size); | |
a66098da | 1089 | |
54bc3a0d LB |
1090 | nexti = i + 1; |
1091 | if (nexti == MWL8K_RX_DESCS) | |
1092 | nexti = 0; | |
1093 | next_dma_addr = rxq->rxd_dma + (nexti * desc_size); | |
a66098da | 1094 | |
54bc3a0d | 1095 | priv->rxd_ops->rxd_init(rxd, next_dma_addr); |
a66098da LB |
1096 | } |
1097 | ||
1098 | return 0; | |
1099 | } | |
1100 | ||
1101 | static int rxq_refill(struct ieee80211_hw *hw, int index, int limit) | |
1102 | { | |
1103 | struct mwl8k_priv *priv = hw->priv; | |
1104 | struct mwl8k_rx_queue *rxq = priv->rxq + index; | |
1105 | int refilled; | |
1106 | ||
1107 | refilled = 0; | |
45eb400d | 1108 | while (rxq->rxd_count < MWL8K_RX_DESCS && limit--) { |
a66098da | 1109 | struct sk_buff *skb; |
788838eb | 1110 | dma_addr_t addr; |
a66098da | 1111 | int rx; |
54bc3a0d | 1112 | void *rxd; |
a66098da LB |
1113 | |
1114 | skb = dev_alloc_skb(MWL8K_RX_MAXSZ); | |
1115 | if (skb == NULL) | |
1116 | break; | |
1117 | ||
788838eb LB |
1118 | addr = pci_map_single(priv->pdev, skb->data, |
1119 | MWL8K_RX_MAXSZ, DMA_FROM_DEVICE); | |
a66098da | 1120 | |
54bc3a0d LB |
1121 | rxq->rxd_count++; |
1122 | rx = rxq->tail++; | |
1123 | if (rxq->tail == MWL8K_RX_DESCS) | |
1124 | rxq->tail = 0; | |
788838eb | 1125 | rxq->buf[rx].skb = skb; |
53b1b3e1 | 1126 | dma_unmap_addr_set(&rxq->buf[rx], dma, addr); |
54bc3a0d LB |
1127 | |
1128 | rxd = rxq->rxd + (rx * priv->rxd_ops->rxd_size); | |
1129 | priv->rxd_ops->rxd_refill(rxd, addr, MWL8K_RX_MAXSZ); | |
a66098da LB |
1130 | |
1131 | refilled++; | |
1132 | } | |
1133 | ||
1134 | return refilled; | |
1135 | } | |
1136 | ||
1137 | /* Must be called only when the card's reception is completely halted */ | |
1138 | static void mwl8k_rxq_deinit(struct ieee80211_hw *hw, int index) | |
1139 | { | |
1140 | struct mwl8k_priv *priv = hw->priv; | |
1141 | struct mwl8k_rx_queue *rxq = priv->rxq + index; | |
1142 | int i; | |
1143 | ||
73b46320 BC |
1144 | if (rxq->rxd == NULL) |
1145 | return; | |
1146 | ||
a66098da | 1147 | for (i = 0; i < MWL8K_RX_DESCS; i++) { |
788838eb LB |
1148 | if (rxq->buf[i].skb != NULL) { |
1149 | pci_unmap_single(priv->pdev, | |
53b1b3e1 | 1150 | dma_unmap_addr(&rxq->buf[i], dma), |
788838eb | 1151 | MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE); |
53b1b3e1 | 1152 | dma_unmap_addr_set(&rxq->buf[i], dma, 0); |
788838eb LB |
1153 | |
1154 | kfree_skb(rxq->buf[i].skb); | |
1155 | rxq->buf[i].skb = NULL; | |
a66098da LB |
1156 | } |
1157 | } | |
1158 | ||
788838eb LB |
1159 | kfree(rxq->buf); |
1160 | rxq->buf = NULL; | |
a66098da LB |
1161 | |
1162 | pci_free_consistent(priv->pdev, | |
54bc3a0d | 1163 | MWL8K_RX_DESCS * priv->rxd_ops->rxd_size, |
45eb400d LB |
1164 | rxq->rxd, rxq->rxd_dma); |
1165 | rxq->rxd = NULL; | |
a66098da LB |
1166 | } |
1167 | ||
1168 | ||
1169 | /* | |
1170 | * Scan a list of BSSIDs to process for finalize join. | |
1171 | * Allows for extension to process multiple BSSIDs. | |
1172 | */ | |
1173 | static inline int | |
1174 | mwl8k_capture_bssid(struct mwl8k_priv *priv, struct ieee80211_hdr *wh) | |
1175 | { | |
1176 | return priv->capture_beacon && | |
1177 | ieee80211_is_beacon(wh->frame_control) && | |
1178 | !compare_ether_addr(wh->addr3, priv->capture_bssid); | |
1179 | } | |
1180 | ||
3779752d LB |
1181 | static inline void mwl8k_save_beacon(struct ieee80211_hw *hw, |
1182 | struct sk_buff *skb) | |
a66098da | 1183 | { |
3779752d LB |
1184 | struct mwl8k_priv *priv = hw->priv; |
1185 | ||
a66098da | 1186 | priv->capture_beacon = false; |
d89173f2 | 1187 | memset(priv->capture_bssid, 0, ETH_ALEN); |
a66098da LB |
1188 | |
1189 | /* | |
1190 | * Use GFP_ATOMIC as rxq_process is called from | |
1191 | * the primary interrupt handler, memory allocation call | |
1192 | * must not sleep. | |
1193 | */ | |
1194 | priv->beacon_skb = skb_copy(skb, GFP_ATOMIC); | |
1195 | if (priv->beacon_skb != NULL) | |
3779752d | 1196 | ieee80211_queue_work(hw, &priv->finalize_join_worker); |
a66098da LB |
1197 | } |
1198 | ||
d9a07d49 NS |
1199 | static inline struct mwl8k_vif *mwl8k_find_vif_bss(struct list_head *vif_list, |
1200 | u8 *bssid) | |
1201 | { | |
1202 | struct mwl8k_vif *mwl8k_vif; | |
1203 | ||
1204 | list_for_each_entry(mwl8k_vif, | |
1205 | vif_list, list) { | |
1206 | if (memcmp(bssid, mwl8k_vif->bssid, | |
1207 | ETH_ALEN) == 0) | |
1208 | return mwl8k_vif; | |
1209 | } | |
1210 | ||
1211 | return NULL; | |
1212 | } | |
1213 | ||
a66098da LB |
1214 | static int rxq_process(struct ieee80211_hw *hw, int index, int limit) |
1215 | { | |
1216 | struct mwl8k_priv *priv = hw->priv; | |
d9a07d49 | 1217 | struct mwl8k_vif *mwl8k_vif = NULL; |
a66098da LB |
1218 | struct mwl8k_rx_queue *rxq = priv->rxq + index; |
1219 | int processed; | |
1220 | ||
1221 | processed = 0; | |
45eb400d | 1222 | while (rxq->rxd_count && limit--) { |
a66098da | 1223 | struct sk_buff *skb; |
54bc3a0d LB |
1224 | void *rxd; |
1225 | int pkt_len; | |
a66098da | 1226 | struct ieee80211_rx_status status; |
d9a07d49 | 1227 | struct ieee80211_hdr *wh; |
20f09c3d | 1228 | __le16 qos; |
a66098da | 1229 | |
788838eb | 1230 | skb = rxq->buf[rxq->head].skb; |
d25f9f13 LB |
1231 | if (skb == NULL) |
1232 | break; | |
54bc3a0d LB |
1233 | |
1234 | rxd = rxq->rxd + (rxq->head * priv->rxd_ops->rxd_size); | |
1235 | ||
0d462bbb JL |
1236 | pkt_len = priv->rxd_ops->rxd_process(rxd, &status, &qos, |
1237 | &priv->noise); | |
54bc3a0d LB |
1238 | if (pkt_len < 0) |
1239 | break; | |
1240 | ||
788838eb LB |
1241 | rxq->buf[rxq->head].skb = NULL; |
1242 | ||
1243 | pci_unmap_single(priv->pdev, | |
53b1b3e1 | 1244 | dma_unmap_addr(&rxq->buf[rxq->head], dma), |
788838eb | 1245 | MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE); |
53b1b3e1 | 1246 | dma_unmap_addr_set(&rxq->buf[rxq->head], dma, 0); |
a66098da | 1247 | |
54bc3a0d LB |
1248 | rxq->head++; |
1249 | if (rxq->head == MWL8K_RX_DESCS) | |
1250 | rxq->head = 0; | |
1251 | ||
45eb400d | 1252 | rxq->rxd_count--; |
a66098da | 1253 | |
d9a07d49 | 1254 | wh = &((struct mwl8k_dma_data *)skb->data)->wh; |
a66098da | 1255 | |
a66098da | 1256 | /* |
c2c357ce LB |
1257 | * Check for a pending join operation. Save a |
1258 | * copy of the beacon and schedule a tasklet to | |
1259 | * send a FINALIZE_JOIN command to the firmware. | |
a66098da | 1260 | */ |
54bc3a0d | 1261 | if (mwl8k_capture_bssid(priv, (void *)skb->data)) |
3779752d | 1262 | mwl8k_save_beacon(hw, skb); |
a66098da | 1263 | |
d9a07d49 NS |
1264 | if (ieee80211_has_protected(wh->frame_control)) { |
1265 | ||
1266 | /* Check if hw crypto has been enabled for | |
1267 | * this bss. If yes, set the status flags | |
1268 | * accordingly | |
1269 | */ | |
1270 | mwl8k_vif = mwl8k_find_vif_bss(&priv->vif_list, | |
1271 | wh->addr1); | |
1272 | ||
1273 | if (mwl8k_vif != NULL && | |
1274 | mwl8k_vif->is_hw_crypto_enabled == true) { | |
1275 | /* | |
1276 | * When MMIC ERROR is encountered | |
1277 | * by the firmware, payload is | |
1278 | * dropped and only 32 bytes of | |
1279 | * mwl8k Firmware header is sent | |
1280 | * to the host. | |
1281 | * | |
1282 | * We need to add four bytes of | |
1283 | * key information. In it | |
1284 | * MAC80211 expects keyidx set to | |
1285 | * 0 for triggering Counter | |
1286 | * Measure of MMIC failure. | |
1287 | */ | |
1288 | if (status.flag & RX_FLAG_MMIC_ERROR) { | |
1289 | struct mwl8k_dma_data *tr; | |
1290 | tr = (struct mwl8k_dma_data *)skb->data; | |
1291 | memset((void *)&(tr->data), 0, 4); | |
1292 | pkt_len += 4; | |
1293 | } | |
1294 | ||
1295 | if (!ieee80211_is_auth(wh->frame_control)) | |
1296 | status.flag |= RX_FLAG_IV_STRIPPED | | |
1297 | RX_FLAG_DECRYPTED | | |
1298 | RX_FLAG_MMIC_STRIPPED; | |
1299 | } | |
1300 | } | |
1301 | ||
1302 | skb_put(skb, pkt_len); | |
1303 | mwl8k_remove_dma_header(skb, qos); | |
f1d58c25 JB |
1304 | memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status)); |
1305 | ieee80211_rx_irqsafe(hw, skb); | |
a66098da LB |
1306 | |
1307 | processed++; | |
1308 | } | |
1309 | ||
1310 | return processed; | |
1311 | } | |
1312 | ||
1313 | ||
1314 | /* | |
1315 | * Packet transmission. | |
1316 | */ | |
1317 | ||
a66098da LB |
1318 | #define MWL8K_TXD_STATUS_OK 0x00000001 |
1319 | #define MWL8K_TXD_STATUS_OK_RETRY 0x00000002 | |
1320 | #define MWL8K_TXD_STATUS_OK_MORE_RETRY 0x00000004 | |
1321 | #define MWL8K_TXD_STATUS_MULTICAST_TX 0x00000008 | |
a66098da | 1322 | #define MWL8K_TXD_STATUS_FW_OWNED 0x80000000 |
a66098da | 1323 | |
e0493a8d LB |
1324 | #define MWL8K_QOS_QLEN_UNSPEC 0xff00 |
1325 | #define MWL8K_QOS_ACK_POLICY_MASK 0x0060 | |
1326 | #define MWL8K_QOS_ACK_POLICY_NORMAL 0x0000 | |
1327 | #define MWL8K_QOS_ACK_POLICY_BLOCKACK 0x0060 | |
1328 | #define MWL8K_QOS_EOSP 0x0010 | |
1329 | ||
a66098da LB |
1330 | struct mwl8k_tx_desc { |
1331 | __le32 status; | |
1332 | __u8 data_rate; | |
1333 | __u8 tx_priority; | |
1334 | __le16 qos_control; | |
1335 | __le32 pkt_phys_addr; | |
1336 | __le16 pkt_len; | |
d89173f2 | 1337 | __u8 dest_MAC_addr[ETH_ALEN]; |
45eb400d | 1338 | __le32 next_txd_phys_addr; |
8a7a578c | 1339 | __le32 timestamp; |
a66098da LB |
1340 | __le16 rate_info; |
1341 | __u8 peer_id; | |
a1fe24b0 | 1342 | __u8 tx_frag_cnt; |
ba2d3587 | 1343 | } __packed; |
a66098da LB |
1344 | |
1345 | #define MWL8K_TX_DESCS 128 | |
1346 | ||
1347 | static int mwl8k_txq_init(struct ieee80211_hw *hw, int index) | |
1348 | { | |
1349 | struct mwl8k_priv *priv = hw->priv; | |
1350 | struct mwl8k_tx_queue *txq = priv->txq + index; | |
1351 | int size; | |
1352 | int i; | |
1353 | ||
8ccbc3b8 | 1354 | txq->len = 0; |
45eb400d LB |
1355 | txq->head = 0; |
1356 | txq->tail = 0; | |
a66098da LB |
1357 | |
1358 | size = MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc); | |
1359 | ||
45eb400d LB |
1360 | txq->txd = pci_alloc_consistent(priv->pdev, size, &txq->txd_dma); |
1361 | if (txq->txd == NULL) { | |
5db55844 | 1362 | wiphy_err(hw->wiphy, "failed to alloc TX descriptors\n"); |
a66098da LB |
1363 | return -ENOMEM; |
1364 | } | |
45eb400d | 1365 | memset(txq->txd, 0, size); |
a66098da | 1366 | |
b9ede5f1 | 1367 | txq->skb = kcalloc(MWL8K_TX_DESCS, sizeof(*txq->skb), GFP_KERNEL); |
45eb400d | 1368 | if (txq->skb == NULL) { |
5db55844 | 1369 | wiphy_err(hw->wiphy, "failed to alloc TX skbuff list\n"); |
45eb400d | 1370 | pci_free_consistent(priv->pdev, size, txq->txd, txq->txd_dma); |
a66098da LB |
1371 | return -ENOMEM; |
1372 | } | |
a66098da LB |
1373 | |
1374 | for (i = 0; i < MWL8K_TX_DESCS; i++) { | |
1375 | struct mwl8k_tx_desc *tx_desc; | |
1376 | int nexti; | |
1377 | ||
45eb400d | 1378 | tx_desc = txq->txd + i; |
a66098da LB |
1379 | nexti = (i + 1) % MWL8K_TX_DESCS; |
1380 | ||
1381 | tx_desc->status = 0; | |
45eb400d LB |
1382 | tx_desc->next_txd_phys_addr = |
1383 | cpu_to_le32(txq->txd_dma + nexti * sizeof(*tx_desc)); | |
a66098da LB |
1384 | } |
1385 | ||
1386 | return 0; | |
1387 | } | |
1388 | ||
1389 | static inline void mwl8k_tx_start(struct mwl8k_priv *priv) | |
1390 | { | |
1391 | iowrite32(MWL8K_H2A_INT_PPA_READY, | |
1392 | priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS); | |
1393 | iowrite32(MWL8K_H2A_INT_DUMMY, | |
1394 | priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS); | |
1395 | ioread32(priv->regs + MWL8K_HIU_INT_CODE); | |
1396 | } | |
1397 | ||
7e1112d3 | 1398 | static void mwl8k_dump_tx_rings(struct ieee80211_hw *hw) |
a66098da | 1399 | { |
7e1112d3 LB |
1400 | struct mwl8k_priv *priv = hw->priv; |
1401 | int i; | |
1402 | ||
1403 | for (i = 0; i < MWL8K_TX_QUEUES; i++) { | |
1404 | struct mwl8k_tx_queue *txq = priv->txq + i; | |
1405 | int fw_owned = 0; | |
1406 | int drv_owned = 0; | |
1407 | int unused = 0; | |
1408 | int desc; | |
1409 | ||
a66098da | 1410 | for (desc = 0; desc < MWL8K_TX_DESCS; desc++) { |
7e1112d3 LB |
1411 | struct mwl8k_tx_desc *tx_desc = txq->txd + desc; |
1412 | u32 status; | |
a66098da | 1413 | |
7e1112d3 | 1414 | status = le32_to_cpu(tx_desc->status); |
a66098da | 1415 | if (status & MWL8K_TXD_STATUS_FW_OWNED) |
7e1112d3 | 1416 | fw_owned++; |
a66098da | 1417 | else |
7e1112d3 | 1418 | drv_owned++; |
a66098da LB |
1419 | |
1420 | if (tx_desc->pkt_len == 0) | |
7e1112d3 | 1421 | unused++; |
a66098da | 1422 | } |
a66098da | 1423 | |
c96c31e4 JP |
1424 | wiphy_err(hw->wiphy, |
1425 | "txq[%d] len=%d head=%d tail=%d " | |
1426 | "fw_owned=%d drv_owned=%d unused=%d\n", | |
1427 | i, | |
1428 | txq->len, txq->head, txq->tail, | |
1429 | fw_owned, drv_owned, unused); | |
7e1112d3 | 1430 | } |
a66098da LB |
1431 | } |
1432 | ||
618952a7 | 1433 | /* |
88de754a | 1434 | * Must be called with priv->fw_mutex held and tx queues stopped. |
618952a7 | 1435 | */ |
62abd3cf | 1436 | #define MWL8K_TX_WAIT_TIMEOUT_MS 5000 |
7e1112d3 | 1437 | |
950d5b01 | 1438 | static int mwl8k_tx_wait_empty(struct ieee80211_hw *hw) |
a66098da | 1439 | { |
a66098da | 1440 | struct mwl8k_priv *priv = hw->priv; |
88de754a | 1441 | DECLARE_COMPLETION_ONSTACK(tx_wait); |
7e1112d3 LB |
1442 | int retry; |
1443 | int rc; | |
a66098da LB |
1444 | |
1445 | might_sleep(); | |
1446 | ||
7e1112d3 LB |
1447 | /* |
1448 | * The TX queues are stopped at this point, so this test | |
1449 | * doesn't need to take ->tx_lock. | |
1450 | */ | |
1451 | if (!priv->pending_tx_pkts) | |
1452 | return 0; | |
1453 | ||
1454 | retry = 0; | |
1455 | rc = 0; | |
1456 | ||
a66098da | 1457 | spin_lock_bh(&priv->tx_lock); |
7e1112d3 LB |
1458 | priv->tx_wait = &tx_wait; |
1459 | while (!rc) { | |
1460 | int oldcount; | |
1461 | unsigned long timeout; | |
a66098da | 1462 | |
7e1112d3 | 1463 | oldcount = priv->pending_tx_pkts; |
a66098da | 1464 | |
7e1112d3 | 1465 | spin_unlock_bh(&priv->tx_lock); |
88de754a | 1466 | timeout = wait_for_completion_timeout(&tx_wait, |
7e1112d3 | 1467 | msecs_to_jiffies(MWL8K_TX_WAIT_TIMEOUT_MS)); |
a66098da | 1468 | spin_lock_bh(&priv->tx_lock); |
7e1112d3 LB |
1469 | |
1470 | if (timeout) { | |
1471 | WARN_ON(priv->pending_tx_pkts); | |
1472 | if (retry) { | |
c96c31e4 | 1473 | wiphy_notice(hw->wiphy, "tx rings drained\n"); |
7e1112d3 LB |
1474 | } |
1475 | break; | |
1476 | } | |
1477 | ||
1478 | if (priv->pending_tx_pkts < oldcount) { | |
c96c31e4 JP |
1479 | wiphy_notice(hw->wiphy, |
1480 | "waiting for tx rings to drain (%d -> %d pkts)\n", | |
1481 | oldcount, priv->pending_tx_pkts); | |
7e1112d3 LB |
1482 | retry = 1; |
1483 | continue; | |
1484 | } | |
1485 | ||
a66098da | 1486 | priv->tx_wait = NULL; |
a66098da | 1487 | |
c96c31e4 JP |
1488 | wiphy_err(hw->wiphy, "tx rings stuck for %d ms\n", |
1489 | MWL8K_TX_WAIT_TIMEOUT_MS); | |
7e1112d3 LB |
1490 | mwl8k_dump_tx_rings(hw); |
1491 | ||
1492 | rc = -ETIMEDOUT; | |
a66098da | 1493 | } |
7e1112d3 | 1494 | spin_unlock_bh(&priv->tx_lock); |
a66098da | 1495 | |
7e1112d3 | 1496 | return rc; |
a66098da LB |
1497 | } |
1498 | ||
c23b5a69 LB |
1499 | #define MWL8K_TXD_SUCCESS(status) \ |
1500 | ((status) & (MWL8K_TXD_STATUS_OK | \ | |
1501 | MWL8K_TXD_STATUS_OK_RETRY | \ | |
1502 | MWL8K_TXD_STATUS_OK_MORE_RETRY)) | |
a66098da | 1503 | |
efb7c49a LB |
1504 | static int |
1505 | mwl8k_txq_reclaim(struct ieee80211_hw *hw, int index, int limit, int force) | |
a66098da LB |
1506 | { |
1507 | struct mwl8k_priv *priv = hw->priv; | |
1508 | struct mwl8k_tx_queue *txq = priv->txq + index; | |
efb7c49a | 1509 | int processed; |
a66098da | 1510 | |
efb7c49a | 1511 | processed = 0; |
8ccbc3b8 | 1512 | while (txq->len > 0 && limit--) { |
a66098da | 1513 | int tx; |
a66098da LB |
1514 | struct mwl8k_tx_desc *tx_desc; |
1515 | unsigned long addr; | |
ce9e2e1b | 1516 | int size; |
a66098da LB |
1517 | struct sk_buff *skb; |
1518 | struct ieee80211_tx_info *info; | |
1519 | u32 status; | |
1520 | ||
45eb400d LB |
1521 | tx = txq->head; |
1522 | tx_desc = txq->txd + tx; | |
a66098da LB |
1523 | |
1524 | status = le32_to_cpu(tx_desc->status); | |
1525 | ||
1526 | if (status & MWL8K_TXD_STATUS_FW_OWNED) { | |
1527 | if (!force) | |
1528 | break; | |
1529 | tx_desc->status &= | |
1530 | ~cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED); | |
1531 | } | |
1532 | ||
45eb400d | 1533 | txq->head = (tx + 1) % MWL8K_TX_DESCS; |
8ccbc3b8 KV |
1534 | BUG_ON(txq->len == 0); |
1535 | txq->len--; | |
a66098da LB |
1536 | priv->pending_tx_pkts--; |
1537 | ||
1538 | addr = le32_to_cpu(tx_desc->pkt_phys_addr); | |
ce9e2e1b | 1539 | size = le16_to_cpu(tx_desc->pkt_len); |
45eb400d LB |
1540 | skb = txq->skb[tx]; |
1541 | txq->skb[tx] = NULL; | |
a66098da LB |
1542 | |
1543 | BUG_ON(skb == NULL); | |
1544 | pci_unmap_single(priv->pdev, addr, size, PCI_DMA_TODEVICE); | |
1545 | ||
20f09c3d | 1546 | mwl8k_remove_dma_header(skb, tx_desc->qos_control); |
a66098da LB |
1547 | |
1548 | /* Mark descriptor as unused */ | |
1549 | tx_desc->pkt_phys_addr = 0; | |
1550 | tx_desc->pkt_len = 0; | |
1551 | ||
a66098da LB |
1552 | info = IEEE80211_SKB_CB(skb); |
1553 | ieee80211_tx_info_clear_status(info); | |
0bf22c37 NS |
1554 | |
1555 | /* Rate control is happening in the firmware. | |
1556 | * Ensure no tx rate is being reported. | |
1557 | */ | |
1558 | info->status.rates[0].idx = -1; | |
1559 | info->status.rates[0].count = 1; | |
1560 | ||
ce9e2e1b | 1561 | if (MWL8K_TXD_SUCCESS(status)) |
a66098da | 1562 | info->flags |= IEEE80211_TX_STAT_ACK; |
a66098da LB |
1563 | |
1564 | ieee80211_tx_status_irqsafe(hw, skb); | |
1565 | ||
efb7c49a | 1566 | processed++; |
a66098da LB |
1567 | } |
1568 | ||
efb7c49a | 1569 | if (processed && priv->radio_on && !mutex_is_locked(&priv->fw_mutex)) |
a66098da | 1570 | ieee80211_wake_queue(hw, index); |
efb7c49a LB |
1571 | |
1572 | return processed; | |
a66098da LB |
1573 | } |
1574 | ||
1575 | /* must be called only when the card's transmit is completely halted */ | |
1576 | static void mwl8k_txq_deinit(struct ieee80211_hw *hw, int index) | |
1577 | { | |
1578 | struct mwl8k_priv *priv = hw->priv; | |
1579 | struct mwl8k_tx_queue *txq = priv->txq + index; | |
1580 | ||
73b46320 BC |
1581 | if (txq->txd == NULL) |
1582 | return; | |
1583 | ||
efb7c49a | 1584 | mwl8k_txq_reclaim(hw, index, INT_MAX, 1); |
a66098da | 1585 | |
45eb400d LB |
1586 | kfree(txq->skb); |
1587 | txq->skb = NULL; | |
a66098da LB |
1588 | |
1589 | pci_free_consistent(priv->pdev, | |
1590 | MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc), | |
45eb400d LB |
1591 | txq->txd, txq->txd_dma); |
1592 | txq->txd = NULL; | |
a66098da LB |
1593 | } |
1594 | ||
7bb45683 | 1595 | static void |
a66098da LB |
1596 | mwl8k_txq_xmit(struct ieee80211_hw *hw, int index, struct sk_buff *skb) |
1597 | { | |
1598 | struct mwl8k_priv *priv = hw->priv; | |
1599 | struct ieee80211_tx_info *tx_info; | |
23b33906 | 1600 | struct mwl8k_vif *mwl8k_vif; |
a66098da LB |
1601 | struct ieee80211_hdr *wh; |
1602 | struct mwl8k_tx_queue *txq; | |
1603 | struct mwl8k_tx_desc *tx; | |
a66098da | 1604 | dma_addr_t dma; |
23b33906 LB |
1605 | u32 txstatus; |
1606 | u8 txdatarate; | |
1607 | u16 qos; | |
a66098da | 1608 | |
23b33906 LB |
1609 | wh = (struct ieee80211_hdr *)skb->data; |
1610 | if (ieee80211_is_data_qos(wh->frame_control)) | |
1611 | qos = le16_to_cpu(*((__le16 *)ieee80211_get_qos_ctl(wh))); | |
1612 | else | |
1613 | qos = 0; | |
a66098da | 1614 | |
d9a07d49 NS |
1615 | if (priv->ap_fw) |
1616 | mwl8k_encapsulate_tx_frame(skb); | |
1617 | else | |
1618 | mwl8k_add_dma_header(skb, 0); | |
1619 | ||
23b33906 | 1620 | wh = &((struct mwl8k_dma_data *)skb->data)->wh; |
a66098da LB |
1621 | |
1622 | tx_info = IEEE80211_SKB_CB(skb); | |
1623 | mwl8k_vif = MWL8K_VIF(tx_info->control.vif); | |
a66098da LB |
1624 | |
1625 | if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) { | |
a66098da | 1626 | wh->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG); |
657232b6 LB |
1627 | wh->seq_ctrl |= cpu_to_le16(mwl8k_vif->seqno); |
1628 | mwl8k_vif->seqno += 0x10; | |
a66098da LB |
1629 | } |
1630 | ||
23b33906 LB |
1631 | /* Setup firmware control bit fields for each frame type. */ |
1632 | txstatus = 0; | |
1633 | txdatarate = 0; | |
1634 | if (ieee80211_is_mgmt(wh->frame_control) || | |
1635 | ieee80211_is_ctl(wh->frame_control)) { | |
1636 | txdatarate = 0; | |
e0493a8d | 1637 | qos |= MWL8K_QOS_QLEN_UNSPEC | MWL8K_QOS_EOSP; |
23b33906 LB |
1638 | } else if (ieee80211_is_data(wh->frame_control)) { |
1639 | txdatarate = 1; | |
1640 | if (is_multicast_ether_addr(wh->addr1)) | |
1641 | txstatus |= MWL8K_TXD_STATUS_MULTICAST_TX; | |
1642 | ||
e0493a8d | 1643 | qos &= ~MWL8K_QOS_ACK_POLICY_MASK; |
23b33906 | 1644 | if (tx_info->flags & IEEE80211_TX_CTL_AMPDU) |
e0493a8d | 1645 | qos |= MWL8K_QOS_ACK_POLICY_BLOCKACK; |
23b33906 | 1646 | else |
e0493a8d | 1647 | qos |= MWL8K_QOS_ACK_POLICY_NORMAL; |
23b33906 | 1648 | } |
a66098da LB |
1649 | |
1650 | dma = pci_map_single(priv->pdev, skb->data, | |
1651 | skb->len, PCI_DMA_TODEVICE); | |
1652 | ||
1653 | if (pci_dma_mapping_error(priv->pdev, dma)) { | |
c96c31e4 JP |
1654 | wiphy_debug(hw->wiphy, |
1655 | "failed to dma map skb, dropping TX frame.\n"); | |
23b33906 | 1656 | dev_kfree_skb(skb); |
7bb45683 | 1657 | return; |
a66098da LB |
1658 | } |
1659 | ||
23b33906 | 1660 | spin_lock_bh(&priv->tx_lock); |
a66098da | 1661 | |
23b33906 | 1662 | txq = priv->txq + index; |
a66098da | 1663 | |
45eb400d LB |
1664 | BUG_ON(txq->skb[txq->tail] != NULL); |
1665 | txq->skb[txq->tail] = skb; | |
a66098da | 1666 | |
45eb400d | 1667 | tx = txq->txd + txq->tail; |
23b33906 LB |
1668 | tx->data_rate = txdatarate; |
1669 | tx->tx_priority = index; | |
a66098da | 1670 | tx->qos_control = cpu_to_le16(qos); |
a66098da LB |
1671 | tx->pkt_phys_addr = cpu_to_le32(dma); |
1672 | tx->pkt_len = cpu_to_le16(skb->len); | |
23b33906 | 1673 | tx->rate_info = 0; |
a680400e LB |
1674 | if (!priv->ap_fw && tx_info->control.sta != NULL) |
1675 | tx->peer_id = MWL8K_STA(tx_info->control.sta)->peer_id; | |
1676 | else | |
1677 | tx->peer_id = 0; | |
a66098da | 1678 | wmb(); |
23b33906 LB |
1679 | tx->status = cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED | txstatus); |
1680 | ||
8ccbc3b8 | 1681 | txq->len++; |
a66098da | 1682 | priv->pending_tx_pkts++; |
a66098da | 1683 | |
45eb400d LB |
1684 | txq->tail++; |
1685 | if (txq->tail == MWL8K_TX_DESCS) | |
1686 | txq->tail = 0; | |
23b33906 | 1687 | |
45eb400d | 1688 | if (txq->head == txq->tail) |
a66098da LB |
1689 | ieee80211_stop_queue(hw, index); |
1690 | ||
23b33906 | 1691 | mwl8k_tx_start(priv); |
a66098da LB |
1692 | |
1693 | spin_unlock_bh(&priv->tx_lock); | |
a66098da LB |
1694 | } |
1695 | ||
1696 | ||
618952a7 LB |
1697 | /* |
1698 | * Firmware access. | |
1699 | * | |
1700 | * We have the following requirements for issuing firmware commands: | |
1701 | * - Some commands require that the packet transmit path is idle when | |
1702 | * the command is issued. (For simplicity, we'll just quiesce the | |
1703 | * transmit path for every command.) | |
1704 | * - There are certain sequences of commands that need to be issued to | |
1705 | * the hardware sequentially, with no other intervening commands. | |
1706 | * | |
1707 | * This leads to an implementation of a "firmware lock" as a mutex that | |
1708 | * can be taken recursively, and which is taken by both the low-level | |
1709 | * command submission function (mwl8k_post_cmd) as well as any users of | |
1710 | * that function that require issuing of an atomic sequence of commands, | |
1711 | * and quiesces the transmit path whenever it's taken. | |
1712 | */ | |
1713 | static int mwl8k_fw_lock(struct ieee80211_hw *hw) | |
1714 | { | |
1715 | struct mwl8k_priv *priv = hw->priv; | |
1716 | ||
1717 | if (priv->fw_mutex_owner != current) { | |
1718 | int rc; | |
1719 | ||
1720 | mutex_lock(&priv->fw_mutex); | |
1721 | ieee80211_stop_queues(hw); | |
1722 | ||
1723 | rc = mwl8k_tx_wait_empty(hw); | |
1724 | if (rc) { | |
1725 | ieee80211_wake_queues(hw); | |
1726 | mutex_unlock(&priv->fw_mutex); | |
1727 | ||
1728 | return rc; | |
1729 | } | |
1730 | ||
1731 | priv->fw_mutex_owner = current; | |
1732 | } | |
1733 | ||
1734 | priv->fw_mutex_depth++; | |
1735 | ||
1736 | return 0; | |
1737 | } | |
1738 | ||
1739 | static void mwl8k_fw_unlock(struct ieee80211_hw *hw) | |
1740 | { | |
1741 | struct mwl8k_priv *priv = hw->priv; | |
1742 | ||
1743 | if (!--priv->fw_mutex_depth) { | |
1744 | ieee80211_wake_queues(hw); | |
1745 | priv->fw_mutex_owner = NULL; | |
1746 | mutex_unlock(&priv->fw_mutex); | |
1747 | } | |
1748 | } | |
1749 | ||
1750 | ||
a66098da LB |
1751 | /* |
1752 | * Command processing. | |
1753 | */ | |
1754 | ||
0c9cc640 LB |
1755 | /* Timeout firmware commands after 10s */ |
1756 | #define MWL8K_CMD_TIMEOUT_MS 10000 | |
a66098da LB |
1757 | |
1758 | static int mwl8k_post_cmd(struct ieee80211_hw *hw, struct mwl8k_cmd_pkt *cmd) | |
1759 | { | |
1760 | DECLARE_COMPLETION_ONSTACK(cmd_wait); | |
1761 | struct mwl8k_priv *priv = hw->priv; | |
1762 | void __iomem *regs = priv->regs; | |
1763 | dma_addr_t dma_addr; | |
1764 | unsigned int dma_size; | |
1765 | int rc; | |
a66098da LB |
1766 | unsigned long timeout = 0; |
1767 | u8 buf[32]; | |
1768 | ||
b603742f | 1769 | cmd->result = (__force __le16) 0xffff; |
a66098da LB |
1770 | dma_size = le16_to_cpu(cmd->length); |
1771 | dma_addr = pci_map_single(priv->pdev, cmd, dma_size, | |
1772 | PCI_DMA_BIDIRECTIONAL); | |
1773 | if (pci_dma_mapping_error(priv->pdev, dma_addr)) | |
1774 | return -ENOMEM; | |
1775 | ||
618952a7 | 1776 | rc = mwl8k_fw_lock(hw); |
39a1e42e LB |
1777 | if (rc) { |
1778 | pci_unmap_single(priv->pdev, dma_addr, dma_size, | |
1779 | PCI_DMA_BIDIRECTIONAL); | |
618952a7 | 1780 | return rc; |
39a1e42e | 1781 | } |
a66098da | 1782 | |
a66098da LB |
1783 | priv->hostcmd_wait = &cmd_wait; |
1784 | iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR); | |
1785 | iowrite32(MWL8K_H2A_INT_DOORBELL, | |
1786 | regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS); | |
1787 | iowrite32(MWL8K_H2A_INT_DUMMY, | |
1788 | regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS); | |
a66098da LB |
1789 | |
1790 | timeout = wait_for_completion_timeout(&cmd_wait, | |
1791 | msecs_to_jiffies(MWL8K_CMD_TIMEOUT_MS)); | |
1792 | ||
618952a7 LB |
1793 | priv->hostcmd_wait = NULL; |
1794 | ||
1795 | mwl8k_fw_unlock(hw); | |
1796 | ||
37055bd4 LB |
1797 | pci_unmap_single(priv->pdev, dma_addr, dma_size, |
1798 | PCI_DMA_BIDIRECTIONAL); | |
1799 | ||
a66098da | 1800 | if (!timeout) { |
5db55844 | 1801 | wiphy_err(hw->wiphy, "Command %s timeout after %u ms\n", |
c96c31e4 JP |
1802 | mwl8k_cmd_name(cmd->code, buf, sizeof(buf)), |
1803 | MWL8K_CMD_TIMEOUT_MS); | |
a66098da LB |
1804 | rc = -ETIMEDOUT; |
1805 | } else { | |
0c9cc640 LB |
1806 | int ms; |
1807 | ||
1808 | ms = MWL8K_CMD_TIMEOUT_MS - jiffies_to_msecs(timeout); | |
1809 | ||
ce9e2e1b | 1810 | rc = cmd->result ? -EINVAL : 0; |
a66098da | 1811 | if (rc) |
5db55844 | 1812 | wiphy_err(hw->wiphy, "Command %s error 0x%x\n", |
c96c31e4 JP |
1813 | mwl8k_cmd_name(cmd->code, buf, sizeof(buf)), |
1814 | le16_to_cpu(cmd->result)); | |
0c9cc640 | 1815 | else if (ms > 2000) |
5db55844 | 1816 | wiphy_notice(hw->wiphy, "Command %s took %d ms\n", |
c96c31e4 JP |
1817 | mwl8k_cmd_name(cmd->code, |
1818 | buf, sizeof(buf)), | |
1819 | ms); | |
a66098da LB |
1820 | } |
1821 | ||
a66098da LB |
1822 | return rc; |
1823 | } | |
1824 | ||
f57ca9c1 LB |
1825 | static int mwl8k_post_pervif_cmd(struct ieee80211_hw *hw, |
1826 | struct ieee80211_vif *vif, | |
1827 | struct mwl8k_cmd_pkt *cmd) | |
1828 | { | |
1829 | if (vif != NULL) | |
1830 | cmd->macid = MWL8K_VIF(vif)->macid; | |
1831 | return mwl8k_post_cmd(hw, cmd); | |
1832 | } | |
1833 | ||
1349ad2f LB |
1834 | /* |
1835 | * Setup code shared between STA and AP firmware images. | |
1836 | */ | |
1837 | static void mwl8k_setup_2ghz_band(struct ieee80211_hw *hw) | |
1838 | { | |
1839 | struct mwl8k_priv *priv = hw->priv; | |
1840 | ||
1841 | BUILD_BUG_ON(sizeof(priv->channels_24) != sizeof(mwl8k_channels_24)); | |
1842 | memcpy(priv->channels_24, mwl8k_channels_24, sizeof(mwl8k_channels_24)); | |
1843 | ||
1844 | BUILD_BUG_ON(sizeof(priv->rates_24) != sizeof(mwl8k_rates_24)); | |
1845 | memcpy(priv->rates_24, mwl8k_rates_24, sizeof(mwl8k_rates_24)); | |
1846 | ||
1847 | priv->band_24.band = IEEE80211_BAND_2GHZ; | |
1848 | priv->band_24.channels = priv->channels_24; | |
1849 | priv->band_24.n_channels = ARRAY_SIZE(mwl8k_channels_24); | |
1850 | priv->band_24.bitrates = priv->rates_24; | |
1851 | priv->band_24.n_bitrates = ARRAY_SIZE(mwl8k_rates_24); | |
1852 | ||
1853 | hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band_24; | |
1854 | } | |
1855 | ||
4eae9edd LB |
1856 | static void mwl8k_setup_5ghz_band(struct ieee80211_hw *hw) |
1857 | { | |
1858 | struct mwl8k_priv *priv = hw->priv; | |
1859 | ||
1860 | BUILD_BUG_ON(sizeof(priv->channels_50) != sizeof(mwl8k_channels_50)); | |
1861 | memcpy(priv->channels_50, mwl8k_channels_50, sizeof(mwl8k_channels_50)); | |
1862 | ||
1863 | BUILD_BUG_ON(sizeof(priv->rates_50) != sizeof(mwl8k_rates_50)); | |
1864 | memcpy(priv->rates_50, mwl8k_rates_50, sizeof(mwl8k_rates_50)); | |
1865 | ||
1866 | priv->band_50.band = IEEE80211_BAND_5GHZ; | |
1867 | priv->band_50.channels = priv->channels_50; | |
1868 | priv->band_50.n_channels = ARRAY_SIZE(mwl8k_channels_50); | |
1869 | priv->band_50.bitrates = priv->rates_50; | |
1870 | priv->band_50.n_bitrates = ARRAY_SIZE(mwl8k_rates_50); | |
1871 | ||
1872 | hw->wiphy->bands[IEEE80211_BAND_5GHZ] = &priv->band_50; | |
1873 | } | |
1874 | ||
a66098da | 1875 | /* |
04b147b1 | 1876 | * CMD_GET_HW_SPEC (STA version). |
a66098da | 1877 | */ |
04b147b1 | 1878 | struct mwl8k_cmd_get_hw_spec_sta { |
a66098da LB |
1879 | struct mwl8k_cmd_pkt header; |
1880 | __u8 hw_rev; | |
1881 | __u8 host_interface; | |
1882 | __le16 num_mcaddrs; | |
d89173f2 | 1883 | __u8 perm_addr[ETH_ALEN]; |
a66098da LB |
1884 | __le16 region_code; |
1885 | __le32 fw_rev; | |
1886 | __le32 ps_cookie; | |
1887 | __le32 caps; | |
1888 | __u8 mcs_bitmap[16]; | |
1889 | __le32 rx_queue_ptr; | |
1890 | __le32 num_tx_queues; | |
1891 | __le32 tx_queue_ptrs[MWL8K_TX_QUEUES]; | |
1892 | __le32 caps2; | |
1893 | __le32 num_tx_desc_per_queue; | |
45eb400d | 1894 | __le32 total_rxd; |
ba2d3587 | 1895 | } __packed; |
a66098da | 1896 | |
341c9791 LB |
1897 | #define MWL8K_CAP_MAX_AMSDU 0x20000000 |
1898 | #define MWL8K_CAP_GREENFIELD 0x08000000 | |
1899 | #define MWL8K_CAP_AMPDU 0x04000000 | |
1900 | #define MWL8K_CAP_RX_STBC 0x01000000 | |
1901 | #define MWL8K_CAP_TX_STBC 0x00800000 | |
1902 | #define MWL8K_CAP_SHORTGI_40MHZ 0x00400000 | |
1903 | #define MWL8K_CAP_SHORTGI_20MHZ 0x00200000 | |
1904 | #define MWL8K_CAP_RX_ANTENNA_MASK 0x000e0000 | |
1905 | #define MWL8K_CAP_TX_ANTENNA_MASK 0x0001c000 | |
1906 | #define MWL8K_CAP_DELAY_BA 0x00003000 | |
1907 | #define MWL8K_CAP_MIMO 0x00000200 | |
1908 | #define MWL8K_CAP_40MHZ 0x00000100 | |
06953235 LB |
1909 | #define MWL8K_CAP_BAND_MASK 0x00000007 |
1910 | #define MWL8K_CAP_5GHZ 0x00000004 | |
1911 | #define MWL8K_CAP_2GHZ4 0x00000001 | |
341c9791 | 1912 | |
06953235 LB |
1913 | static void |
1914 | mwl8k_set_ht_caps(struct ieee80211_hw *hw, | |
1915 | struct ieee80211_supported_band *band, u32 cap) | |
341c9791 | 1916 | { |
341c9791 LB |
1917 | int rx_streams; |
1918 | int tx_streams; | |
1919 | ||
777ad375 | 1920 | band->ht_cap.ht_supported = 1; |
341c9791 LB |
1921 | |
1922 | if (cap & MWL8K_CAP_MAX_AMSDU) | |
777ad375 | 1923 | band->ht_cap.cap |= IEEE80211_HT_CAP_MAX_AMSDU; |
341c9791 | 1924 | if (cap & MWL8K_CAP_GREENFIELD) |
777ad375 | 1925 | band->ht_cap.cap |= IEEE80211_HT_CAP_GRN_FLD; |
341c9791 LB |
1926 | if (cap & MWL8K_CAP_AMPDU) { |
1927 | hw->flags |= IEEE80211_HW_AMPDU_AGGREGATION; | |
777ad375 LB |
1928 | band->ht_cap.ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K; |
1929 | band->ht_cap.ampdu_density = IEEE80211_HT_MPDU_DENSITY_NONE; | |
341c9791 LB |
1930 | } |
1931 | if (cap & MWL8K_CAP_RX_STBC) | |
777ad375 | 1932 | band->ht_cap.cap |= IEEE80211_HT_CAP_RX_STBC; |
341c9791 | 1933 | if (cap & MWL8K_CAP_TX_STBC) |
777ad375 | 1934 | band->ht_cap.cap |= IEEE80211_HT_CAP_TX_STBC; |
341c9791 | 1935 | if (cap & MWL8K_CAP_SHORTGI_40MHZ) |
777ad375 | 1936 | band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_40; |
341c9791 | 1937 | if (cap & MWL8K_CAP_SHORTGI_20MHZ) |
777ad375 | 1938 | band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_20; |
341c9791 | 1939 | if (cap & MWL8K_CAP_DELAY_BA) |
777ad375 | 1940 | band->ht_cap.cap |= IEEE80211_HT_CAP_DELAY_BA; |
341c9791 | 1941 | if (cap & MWL8K_CAP_40MHZ) |
777ad375 | 1942 | band->ht_cap.cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40; |
341c9791 LB |
1943 | |
1944 | rx_streams = hweight32(cap & MWL8K_CAP_RX_ANTENNA_MASK); | |
1945 | tx_streams = hweight32(cap & MWL8K_CAP_TX_ANTENNA_MASK); | |
1946 | ||
777ad375 | 1947 | band->ht_cap.mcs.rx_mask[0] = 0xff; |
341c9791 | 1948 | if (rx_streams >= 2) |
777ad375 | 1949 | band->ht_cap.mcs.rx_mask[1] = 0xff; |
341c9791 | 1950 | if (rx_streams >= 3) |
777ad375 LB |
1951 | band->ht_cap.mcs.rx_mask[2] = 0xff; |
1952 | band->ht_cap.mcs.rx_mask[4] = 0x01; | |
1953 | band->ht_cap.mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED; | |
341c9791 LB |
1954 | |
1955 | if (rx_streams != tx_streams) { | |
777ad375 LB |
1956 | band->ht_cap.mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF; |
1957 | band->ht_cap.mcs.tx_params |= (tx_streams - 1) << | |
341c9791 LB |
1958 | IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT; |
1959 | } | |
1960 | } | |
1961 | ||
06953235 LB |
1962 | static void |
1963 | mwl8k_set_caps(struct ieee80211_hw *hw, u32 caps) | |
1964 | { | |
1965 | struct mwl8k_priv *priv = hw->priv; | |
1966 | ||
1967 | if ((caps & MWL8K_CAP_2GHZ4) || !(caps & MWL8K_CAP_BAND_MASK)) { | |
1968 | mwl8k_setup_2ghz_band(hw); | |
1969 | if (caps & MWL8K_CAP_MIMO) | |
1970 | mwl8k_set_ht_caps(hw, &priv->band_24, caps); | |
1971 | } | |
1972 | ||
1973 | if (caps & MWL8K_CAP_5GHZ) { | |
1974 | mwl8k_setup_5ghz_band(hw); | |
1975 | if (caps & MWL8K_CAP_MIMO) | |
1976 | mwl8k_set_ht_caps(hw, &priv->band_50, caps); | |
1977 | } | |
1978 | } | |
1979 | ||
04b147b1 | 1980 | static int mwl8k_cmd_get_hw_spec_sta(struct ieee80211_hw *hw) |
a66098da LB |
1981 | { |
1982 | struct mwl8k_priv *priv = hw->priv; | |
04b147b1 | 1983 | struct mwl8k_cmd_get_hw_spec_sta *cmd; |
a66098da LB |
1984 | int rc; |
1985 | int i; | |
1986 | ||
1987 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
1988 | if (cmd == NULL) | |
1989 | return -ENOMEM; | |
1990 | ||
1991 | cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC); | |
1992 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
1993 | ||
1994 | memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr)); | |
1995 | cmd->ps_cookie = cpu_to_le32(priv->cookie_dma); | |
45eb400d | 1996 | cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma); |
4ff6432e | 1997 | cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES); |
a66098da | 1998 | for (i = 0; i < MWL8K_TX_QUEUES; i++) |
45eb400d | 1999 | cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma); |
4ff6432e | 2000 | cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS); |
45eb400d | 2001 | cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS); |
a66098da LB |
2002 | |
2003 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2004 | ||
2005 | if (!rc) { | |
2006 | SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr); | |
2007 | priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs); | |
4ff6432e | 2008 | priv->fw_rev = le32_to_cpu(cmd->fw_rev); |
a66098da | 2009 | priv->hw_rev = cmd->hw_rev; |
06953235 | 2010 | mwl8k_set_caps(hw, le32_to_cpu(cmd->caps)); |
ee0ddf18 LB |
2011 | priv->ap_macids_supported = 0x00000000; |
2012 | priv->sta_macids_supported = 0x00000001; | |
a66098da LB |
2013 | } |
2014 | ||
2015 | kfree(cmd); | |
2016 | return rc; | |
2017 | } | |
2018 | ||
42fba21d LB |
2019 | /* |
2020 | * CMD_GET_HW_SPEC (AP version). | |
2021 | */ | |
2022 | struct mwl8k_cmd_get_hw_spec_ap { | |
2023 | struct mwl8k_cmd_pkt header; | |
2024 | __u8 hw_rev; | |
2025 | __u8 host_interface; | |
2026 | __le16 num_wcb; | |
2027 | __le16 num_mcaddrs; | |
2028 | __u8 perm_addr[ETH_ALEN]; | |
2029 | __le16 region_code; | |
2030 | __le16 num_antenna; | |
2031 | __le32 fw_rev; | |
2032 | __le32 wcbbase0; | |
2033 | __le32 rxwrptr; | |
2034 | __le32 rxrdptr; | |
2035 | __le32 ps_cookie; | |
2036 | __le32 wcbbase1; | |
2037 | __le32 wcbbase2; | |
2038 | __le32 wcbbase3; | |
952a0e96 | 2039 | __le32 fw_api_version; |
8a7a578c BC |
2040 | __le32 caps; |
2041 | __le32 num_of_ampdu_queues; | |
2042 | __le32 wcbbase_ampdu[MWL8K_MAX_AMPDU_QUEUES]; | |
ba2d3587 | 2043 | } __packed; |
42fba21d LB |
2044 | |
2045 | static int mwl8k_cmd_get_hw_spec_ap(struct ieee80211_hw *hw) | |
2046 | { | |
2047 | struct mwl8k_priv *priv = hw->priv; | |
2048 | struct mwl8k_cmd_get_hw_spec_ap *cmd; | |
8a7a578c | 2049 | int rc, i; |
952a0e96 | 2050 | u32 api_version; |
42fba21d LB |
2051 | |
2052 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2053 | if (cmd == NULL) | |
2054 | return -ENOMEM; | |
2055 | ||
2056 | cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC); | |
2057 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
2058 | ||
2059 | memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr)); | |
2060 | cmd->ps_cookie = cpu_to_le32(priv->cookie_dma); | |
2061 | ||
2062 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2063 | ||
2064 | if (!rc) { | |
2065 | int off; | |
2066 | ||
952a0e96 BC |
2067 | api_version = le32_to_cpu(cmd->fw_api_version); |
2068 | if (priv->device_info->fw_api_ap != api_version) { | |
2069 | printk(KERN_ERR "%s: Unsupported fw API version for %s." | |
2070 | " Expected %d got %d.\n", MWL8K_NAME, | |
2071 | priv->device_info->part_name, | |
2072 | priv->device_info->fw_api_ap, | |
2073 | api_version); | |
2074 | rc = -EINVAL; | |
2075 | goto done; | |
2076 | } | |
42fba21d LB |
2077 | SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr); |
2078 | priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs); | |
2079 | priv->fw_rev = le32_to_cpu(cmd->fw_rev); | |
2080 | priv->hw_rev = cmd->hw_rev; | |
8a7a578c | 2081 | mwl8k_set_caps(hw, le32_to_cpu(cmd->caps)); |
ee0ddf18 LB |
2082 | priv->ap_macids_supported = 0x000000ff; |
2083 | priv->sta_macids_supported = 0x00000000; | |
8a7a578c BC |
2084 | priv->num_ampdu_queues = le32_to_cpu(cmd->num_of_ampdu_queues); |
2085 | if (priv->num_ampdu_queues > MWL8K_MAX_AMPDU_QUEUES) { | |
2086 | wiphy_warn(hw->wiphy, "fw reported %d ampdu queues" | |
2087 | " but we only support %d.\n", | |
2088 | priv->num_ampdu_queues, | |
2089 | MWL8K_MAX_AMPDU_QUEUES); | |
2090 | priv->num_ampdu_queues = MWL8K_MAX_AMPDU_QUEUES; | |
2091 | } | |
42fba21d | 2092 | off = le32_to_cpu(cmd->rxwrptr) & 0xffff; |
b603742f | 2093 | iowrite32(priv->rxq[0].rxd_dma, priv->sram + off); |
42fba21d LB |
2094 | |
2095 | off = le32_to_cpu(cmd->rxrdptr) & 0xffff; | |
b603742f | 2096 | iowrite32(priv->rxq[0].rxd_dma, priv->sram + off); |
42fba21d | 2097 | |
73b46320 BC |
2098 | priv->txq_offset[0] = le32_to_cpu(cmd->wcbbase0) & 0xffff; |
2099 | priv->txq_offset[1] = le32_to_cpu(cmd->wcbbase1) & 0xffff; | |
2100 | priv->txq_offset[2] = le32_to_cpu(cmd->wcbbase2) & 0xffff; | |
2101 | priv->txq_offset[3] = le32_to_cpu(cmd->wcbbase3) & 0xffff; | |
8a7a578c BC |
2102 | |
2103 | for (i = 0; i < priv->num_ampdu_queues; i++) | |
2104 | priv->txq_offset[i + MWL8K_TX_QUEUES] = | |
2105 | le32_to_cpu(cmd->wcbbase_ampdu[i]) & 0xffff; | |
42fba21d LB |
2106 | } |
2107 | ||
952a0e96 | 2108 | done: |
42fba21d LB |
2109 | kfree(cmd); |
2110 | return rc; | |
2111 | } | |
2112 | ||
2113 | /* | |
2114 | * CMD_SET_HW_SPEC. | |
2115 | */ | |
2116 | struct mwl8k_cmd_set_hw_spec { | |
2117 | struct mwl8k_cmd_pkt header; | |
2118 | __u8 hw_rev; | |
2119 | __u8 host_interface; | |
2120 | __le16 num_mcaddrs; | |
2121 | __u8 perm_addr[ETH_ALEN]; | |
2122 | __le16 region_code; | |
2123 | __le32 fw_rev; | |
2124 | __le32 ps_cookie; | |
2125 | __le32 caps; | |
2126 | __le32 rx_queue_ptr; | |
2127 | __le32 num_tx_queues; | |
2128 | __le32 tx_queue_ptrs[MWL8K_TX_QUEUES]; | |
2129 | __le32 flags; | |
2130 | __le32 num_tx_desc_per_queue; | |
2131 | __le32 total_rxd; | |
ba2d3587 | 2132 | } __packed; |
42fba21d | 2133 | |
8a7a578c BC |
2134 | /* If enabled, MWL8K_SET_HW_SPEC_FLAG_ENABLE_LIFE_TIME_EXPIRY will cause |
2135 | * packets to expire 500 ms after the timestamp in the tx descriptor. That is, | |
2136 | * the packets that are queued for more than 500ms, will be dropped in the | |
2137 | * hardware. This helps minimizing the issues caused due to head-of-line | |
2138 | * blocking where a slow client can hog the bandwidth and affect traffic to a | |
2139 | * faster client. | |
2140 | */ | |
2141 | #define MWL8K_SET_HW_SPEC_FLAG_ENABLE_LIFE_TIME_EXPIRY 0x00000400 | |
b64fe619 LB |
2142 | #define MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT 0x00000080 |
2143 | #define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP 0x00000020 | |
2144 | #define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON 0x00000010 | |
42fba21d LB |
2145 | |
2146 | static int mwl8k_cmd_set_hw_spec(struct ieee80211_hw *hw) | |
2147 | { | |
2148 | struct mwl8k_priv *priv = hw->priv; | |
2149 | struct mwl8k_cmd_set_hw_spec *cmd; | |
2150 | int rc; | |
2151 | int i; | |
2152 | ||
2153 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2154 | if (cmd == NULL) | |
2155 | return -ENOMEM; | |
2156 | ||
2157 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_HW_SPEC); | |
2158 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
2159 | ||
2160 | cmd->ps_cookie = cpu_to_le32(priv->cookie_dma); | |
2161 | cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma); | |
2162 | cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES); | |
85c9205c NS |
2163 | |
2164 | /* | |
2165 | * Mac80211 stack has Q0 as highest priority and Q3 as lowest in | |
2166 | * that order. Firmware has Q3 as highest priority and Q0 as lowest | |
2167 | * in that order. Map Q3 of mac80211 to Q0 of firmware so that the | |
2168 | * priority is interpreted the right way in firmware. | |
2169 | */ | |
2170 | for (i = 0; i < MWL8K_TX_QUEUES; i++) { | |
2171 | int j = MWL8K_TX_QUEUES - 1 - i; | |
2172 | cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[j].txd_dma); | |
2173 | } | |
2174 | ||
b64fe619 LB |
2175 | cmd->flags = cpu_to_le32(MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT | |
2176 | MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP | | |
2177 | MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON); | |
42fba21d LB |
2178 | cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS); |
2179 | cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS); | |
2180 | ||
2181 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2182 | kfree(cmd); | |
2183 | ||
2184 | return rc; | |
2185 | } | |
2186 | ||
a66098da LB |
2187 | /* |
2188 | * CMD_MAC_MULTICAST_ADR. | |
2189 | */ | |
2190 | struct mwl8k_cmd_mac_multicast_adr { | |
2191 | struct mwl8k_cmd_pkt header; | |
2192 | __le16 action; | |
2193 | __le16 numaddr; | |
ce9e2e1b | 2194 | __u8 addr[0][ETH_ALEN]; |
a66098da LB |
2195 | }; |
2196 | ||
d5e30845 LB |
2197 | #define MWL8K_ENABLE_RX_DIRECTED 0x0001 |
2198 | #define MWL8K_ENABLE_RX_MULTICAST 0x0002 | |
2199 | #define MWL8K_ENABLE_RX_ALL_MULTICAST 0x0004 | |
2200 | #define MWL8K_ENABLE_RX_BROADCAST 0x0008 | |
ce9e2e1b | 2201 | |
e81cd2d6 | 2202 | static struct mwl8k_cmd_pkt * |
447ced07 | 2203 | __mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw *hw, int allmulti, |
22bedad3 | 2204 | struct netdev_hw_addr_list *mc_list) |
a66098da | 2205 | { |
e81cd2d6 | 2206 | struct mwl8k_priv *priv = hw->priv; |
a66098da | 2207 | struct mwl8k_cmd_mac_multicast_adr *cmd; |
e81cd2d6 | 2208 | int size; |
22bedad3 JP |
2209 | int mc_count = 0; |
2210 | ||
2211 | if (mc_list) | |
2212 | mc_count = netdev_hw_addr_list_count(mc_list); | |
e81cd2d6 | 2213 | |
447ced07 | 2214 | if (allmulti || mc_count > priv->num_mcaddrs) { |
d5e30845 LB |
2215 | allmulti = 1; |
2216 | mc_count = 0; | |
2217 | } | |
e81cd2d6 LB |
2218 | |
2219 | size = sizeof(*cmd) + mc_count * ETH_ALEN; | |
ce9e2e1b | 2220 | |
e81cd2d6 | 2221 | cmd = kzalloc(size, GFP_ATOMIC); |
a66098da | 2222 | if (cmd == NULL) |
e81cd2d6 | 2223 | return NULL; |
a66098da LB |
2224 | |
2225 | cmd->header.code = cpu_to_le16(MWL8K_CMD_MAC_MULTICAST_ADR); | |
2226 | cmd->header.length = cpu_to_le16(size); | |
d5e30845 LB |
2227 | cmd->action = cpu_to_le16(MWL8K_ENABLE_RX_DIRECTED | |
2228 | MWL8K_ENABLE_RX_BROADCAST); | |
2229 | ||
2230 | if (allmulti) { | |
2231 | cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_ALL_MULTICAST); | |
2232 | } else if (mc_count) { | |
22bedad3 JP |
2233 | struct netdev_hw_addr *ha; |
2234 | int i = 0; | |
d5e30845 LB |
2235 | |
2236 | cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_MULTICAST); | |
2237 | cmd->numaddr = cpu_to_le16(mc_count); | |
22bedad3 JP |
2238 | netdev_hw_addr_list_for_each(ha, mc_list) { |
2239 | memcpy(cmd->addr[i], ha->addr, ETH_ALEN); | |
a66098da | 2240 | } |
a66098da LB |
2241 | } |
2242 | ||
e81cd2d6 | 2243 | return &cmd->header; |
a66098da LB |
2244 | } |
2245 | ||
2246 | /* | |
55489b6e | 2247 | * CMD_GET_STAT. |
a66098da | 2248 | */ |
55489b6e | 2249 | struct mwl8k_cmd_get_stat { |
a66098da | 2250 | struct mwl8k_cmd_pkt header; |
a66098da | 2251 | __le32 stats[64]; |
ba2d3587 | 2252 | } __packed; |
a66098da LB |
2253 | |
2254 | #define MWL8K_STAT_ACK_FAILURE 9 | |
2255 | #define MWL8K_STAT_RTS_FAILURE 12 | |
2256 | #define MWL8K_STAT_FCS_ERROR 24 | |
2257 | #define MWL8K_STAT_RTS_SUCCESS 11 | |
2258 | ||
55489b6e LB |
2259 | static int mwl8k_cmd_get_stat(struct ieee80211_hw *hw, |
2260 | struct ieee80211_low_level_stats *stats) | |
a66098da | 2261 | { |
55489b6e | 2262 | struct mwl8k_cmd_get_stat *cmd; |
a66098da LB |
2263 | int rc; |
2264 | ||
2265 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2266 | if (cmd == NULL) | |
2267 | return -ENOMEM; | |
2268 | ||
2269 | cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_STAT); | |
2270 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
a66098da LB |
2271 | |
2272 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2273 | if (!rc) { | |
2274 | stats->dot11ACKFailureCount = | |
2275 | le32_to_cpu(cmd->stats[MWL8K_STAT_ACK_FAILURE]); | |
2276 | stats->dot11RTSFailureCount = | |
2277 | le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_FAILURE]); | |
2278 | stats->dot11FCSErrorCount = | |
2279 | le32_to_cpu(cmd->stats[MWL8K_STAT_FCS_ERROR]); | |
2280 | stats->dot11RTSSuccessCount = | |
2281 | le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_SUCCESS]); | |
2282 | } | |
2283 | kfree(cmd); | |
2284 | ||
2285 | return rc; | |
2286 | } | |
2287 | ||
2288 | /* | |
55489b6e | 2289 | * CMD_RADIO_CONTROL. |
a66098da | 2290 | */ |
55489b6e | 2291 | struct mwl8k_cmd_radio_control { |
a66098da LB |
2292 | struct mwl8k_cmd_pkt header; |
2293 | __le16 action; | |
2294 | __le16 control; | |
2295 | __le16 radio_on; | |
ba2d3587 | 2296 | } __packed; |
a66098da | 2297 | |
c46563b7 | 2298 | static int |
55489b6e | 2299 | mwl8k_cmd_radio_control(struct ieee80211_hw *hw, bool enable, bool force) |
a66098da LB |
2300 | { |
2301 | struct mwl8k_priv *priv = hw->priv; | |
55489b6e | 2302 | struct mwl8k_cmd_radio_control *cmd; |
a66098da LB |
2303 | int rc; |
2304 | ||
c46563b7 | 2305 | if (enable == priv->radio_on && !force) |
a66098da LB |
2306 | return 0; |
2307 | ||
a66098da LB |
2308 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); |
2309 | if (cmd == NULL) | |
2310 | return -ENOMEM; | |
2311 | ||
2312 | cmd->header.code = cpu_to_le16(MWL8K_CMD_RADIO_CONTROL); | |
2313 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
2314 | cmd->action = cpu_to_le16(MWL8K_CMD_SET); | |
68ce3884 | 2315 | cmd->control = cpu_to_le16(priv->radio_short_preamble ? 3 : 1); |
a66098da LB |
2316 | cmd->radio_on = cpu_to_le16(enable ? 0x0001 : 0x0000); |
2317 | ||
2318 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2319 | kfree(cmd); | |
2320 | ||
2321 | if (!rc) | |
c46563b7 | 2322 | priv->radio_on = enable; |
a66098da LB |
2323 | |
2324 | return rc; | |
2325 | } | |
2326 | ||
55489b6e | 2327 | static int mwl8k_cmd_radio_disable(struct ieee80211_hw *hw) |
c46563b7 | 2328 | { |
55489b6e | 2329 | return mwl8k_cmd_radio_control(hw, 0, 0); |
c46563b7 LB |
2330 | } |
2331 | ||
55489b6e | 2332 | static int mwl8k_cmd_radio_enable(struct ieee80211_hw *hw) |
c46563b7 | 2333 | { |
55489b6e | 2334 | return mwl8k_cmd_radio_control(hw, 1, 0); |
c46563b7 LB |
2335 | } |
2336 | ||
a66098da LB |
2337 | static int |
2338 | mwl8k_set_radio_preamble(struct ieee80211_hw *hw, bool short_preamble) | |
2339 | { | |
99200a99 | 2340 | struct mwl8k_priv *priv = hw->priv; |
a66098da | 2341 | |
68ce3884 | 2342 | priv->radio_short_preamble = short_preamble; |
a66098da | 2343 | |
55489b6e | 2344 | return mwl8k_cmd_radio_control(hw, 1, 1); |
a66098da LB |
2345 | } |
2346 | ||
2347 | /* | |
55489b6e | 2348 | * CMD_RF_TX_POWER. |
a66098da | 2349 | */ |
41fdf097 | 2350 | #define MWL8K_RF_TX_POWER_LEVEL_TOTAL 8 |
a66098da | 2351 | |
55489b6e | 2352 | struct mwl8k_cmd_rf_tx_power { |
a66098da LB |
2353 | struct mwl8k_cmd_pkt header; |
2354 | __le16 action; | |
2355 | __le16 support_level; | |
2356 | __le16 current_level; | |
2357 | __le16 reserved; | |
41fdf097 | 2358 | __le16 power_level_list[MWL8K_RF_TX_POWER_LEVEL_TOTAL]; |
ba2d3587 | 2359 | } __packed; |
a66098da | 2360 | |
55489b6e | 2361 | static int mwl8k_cmd_rf_tx_power(struct ieee80211_hw *hw, int dBm) |
a66098da | 2362 | { |
55489b6e | 2363 | struct mwl8k_cmd_rf_tx_power *cmd; |
a66098da LB |
2364 | int rc; |
2365 | ||
2366 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2367 | if (cmd == NULL) | |
2368 | return -ENOMEM; | |
2369 | ||
2370 | cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_TX_POWER); | |
2371 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
2372 | cmd->action = cpu_to_le16(MWL8K_CMD_SET); | |
2373 | cmd->support_level = cpu_to_le16(dBm); | |
2374 | ||
2375 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2376 | kfree(cmd); | |
2377 | ||
2378 | return rc; | |
2379 | } | |
2380 | ||
41fdf097 NS |
2381 | /* |
2382 | * CMD_TX_POWER. | |
2383 | */ | |
2384 | #define MWL8K_TX_POWER_LEVEL_TOTAL 12 | |
2385 | ||
2386 | struct mwl8k_cmd_tx_power { | |
2387 | struct mwl8k_cmd_pkt header; | |
2388 | __le16 action; | |
2389 | __le16 band; | |
2390 | __le16 channel; | |
2391 | __le16 bw; | |
2392 | __le16 sub_ch; | |
2393 | __le16 power_level_list[MWL8K_TX_POWER_LEVEL_TOTAL]; | |
2394 | } __attribute__((packed)); | |
2395 | ||
2396 | static int mwl8k_cmd_tx_power(struct ieee80211_hw *hw, | |
2397 | struct ieee80211_conf *conf, | |
2398 | unsigned short pwr) | |
2399 | { | |
2400 | struct ieee80211_channel *channel = conf->channel; | |
2401 | struct mwl8k_cmd_tx_power *cmd; | |
2402 | int rc; | |
2403 | int i; | |
2404 | ||
2405 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2406 | if (cmd == NULL) | |
2407 | return -ENOMEM; | |
2408 | ||
2409 | cmd->header.code = cpu_to_le16(MWL8K_CMD_TX_POWER); | |
2410 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
2411 | cmd->action = cpu_to_le16(MWL8K_CMD_SET_LIST); | |
2412 | ||
2413 | if (channel->band == IEEE80211_BAND_2GHZ) | |
2414 | cmd->band = cpu_to_le16(0x1); | |
2415 | else if (channel->band == IEEE80211_BAND_5GHZ) | |
2416 | cmd->band = cpu_to_le16(0x4); | |
2417 | ||
2418 | cmd->channel = channel->hw_value; | |
2419 | ||
2420 | if (conf->channel_type == NL80211_CHAN_NO_HT || | |
2421 | conf->channel_type == NL80211_CHAN_HT20) { | |
2422 | cmd->bw = cpu_to_le16(0x2); | |
2423 | } else { | |
2424 | cmd->bw = cpu_to_le16(0x4); | |
2425 | if (conf->channel_type == NL80211_CHAN_HT40MINUS) | |
2426 | cmd->sub_ch = cpu_to_le16(0x3); | |
2427 | else if (conf->channel_type == NL80211_CHAN_HT40PLUS) | |
2428 | cmd->sub_ch = cpu_to_le16(0x1); | |
2429 | } | |
2430 | ||
2431 | for (i = 0; i < MWL8K_TX_POWER_LEVEL_TOTAL; i++) | |
2432 | cmd->power_level_list[i] = cpu_to_le16(pwr); | |
2433 | ||
2434 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2435 | kfree(cmd); | |
2436 | ||
2437 | return rc; | |
2438 | } | |
2439 | ||
08b06347 LB |
2440 | /* |
2441 | * CMD_RF_ANTENNA. | |
2442 | */ | |
2443 | struct mwl8k_cmd_rf_antenna { | |
2444 | struct mwl8k_cmd_pkt header; | |
2445 | __le16 antenna; | |
2446 | __le16 mode; | |
ba2d3587 | 2447 | } __packed; |
08b06347 LB |
2448 | |
2449 | #define MWL8K_RF_ANTENNA_RX 1 | |
2450 | #define MWL8K_RF_ANTENNA_TX 2 | |
2451 | ||
2452 | static int | |
2453 | mwl8k_cmd_rf_antenna(struct ieee80211_hw *hw, int antenna, int mask) | |
2454 | { | |
2455 | struct mwl8k_cmd_rf_antenna *cmd; | |
2456 | int rc; | |
2457 | ||
2458 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2459 | if (cmd == NULL) | |
2460 | return -ENOMEM; | |
2461 | ||
2462 | cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_ANTENNA); | |
2463 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
2464 | cmd->antenna = cpu_to_le16(antenna); | |
2465 | cmd->mode = cpu_to_le16(mask); | |
2466 | ||
2467 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2468 | kfree(cmd); | |
2469 | ||
2470 | return rc; | |
2471 | } | |
2472 | ||
b64fe619 LB |
2473 | /* |
2474 | * CMD_SET_BEACON. | |
2475 | */ | |
2476 | struct mwl8k_cmd_set_beacon { | |
2477 | struct mwl8k_cmd_pkt header; | |
2478 | __le16 beacon_len; | |
2479 | __u8 beacon[0]; | |
2480 | }; | |
2481 | ||
aa21d0f6 LB |
2482 | static int mwl8k_cmd_set_beacon(struct ieee80211_hw *hw, |
2483 | struct ieee80211_vif *vif, u8 *beacon, int len) | |
b64fe619 LB |
2484 | { |
2485 | struct mwl8k_cmd_set_beacon *cmd; | |
2486 | int rc; | |
2487 | ||
2488 | cmd = kzalloc(sizeof(*cmd) + len, GFP_KERNEL); | |
2489 | if (cmd == NULL) | |
2490 | return -ENOMEM; | |
2491 | ||
2492 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_BEACON); | |
2493 | cmd->header.length = cpu_to_le16(sizeof(*cmd) + len); | |
2494 | cmd->beacon_len = cpu_to_le16(len); | |
2495 | memcpy(cmd->beacon, beacon, len); | |
2496 | ||
aa21d0f6 | 2497 | rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header); |
b64fe619 LB |
2498 | kfree(cmd); |
2499 | ||
2500 | return rc; | |
2501 | } | |
2502 | ||
a66098da LB |
2503 | /* |
2504 | * CMD_SET_PRE_SCAN. | |
2505 | */ | |
2506 | struct mwl8k_cmd_set_pre_scan { | |
2507 | struct mwl8k_cmd_pkt header; | |
ba2d3587 | 2508 | } __packed; |
a66098da LB |
2509 | |
2510 | static int mwl8k_cmd_set_pre_scan(struct ieee80211_hw *hw) | |
2511 | { | |
2512 | struct mwl8k_cmd_set_pre_scan *cmd; | |
2513 | int rc; | |
2514 | ||
2515 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2516 | if (cmd == NULL) | |
2517 | return -ENOMEM; | |
2518 | ||
2519 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_PRE_SCAN); | |
2520 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
2521 | ||
2522 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2523 | kfree(cmd); | |
2524 | ||
2525 | return rc; | |
2526 | } | |
2527 | ||
2528 | /* | |
2529 | * CMD_SET_POST_SCAN. | |
2530 | */ | |
2531 | struct mwl8k_cmd_set_post_scan { | |
2532 | struct mwl8k_cmd_pkt header; | |
2533 | __le32 isibss; | |
d89173f2 | 2534 | __u8 bssid[ETH_ALEN]; |
ba2d3587 | 2535 | } __packed; |
a66098da LB |
2536 | |
2537 | static int | |
0a11dfc3 | 2538 | mwl8k_cmd_set_post_scan(struct ieee80211_hw *hw, const __u8 *mac) |
a66098da LB |
2539 | { |
2540 | struct mwl8k_cmd_set_post_scan *cmd; | |
2541 | int rc; | |
2542 | ||
2543 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2544 | if (cmd == NULL) | |
2545 | return -ENOMEM; | |
2546 | ||
2547 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_POST_SCAN); | |
2548 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
2549 | cmd->isibss = 0; | |
d89173f2 | 2550 | memcpy(cmd->bssid, mac, ETH_ALEN); |
a66098da LB |
2551 | |
2552 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2553 | kfree(cmd); | |
2554 | ||
2555 | return rc; | |
2556 | } | |
2557 | ||
2558 | /* | |
2559 | * CMD_SET_RF_CHANNEL. | |
2560 | */ | |
2561 | struct mwl8k_cmd_set_rf_channel { | |
2562 | struct mwl8k_cmd_pkt header; | |
2563 | __le16 action; | |
2564 | __u8 current_channel; | |
2565 | __le32 channel_flags; | |
ba2d3587 | 2566 | } __packed; |
a66098da LB |
2567 | |
2568 | static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw *hw, | |
610677d2 | 2569 | struct ieee80211_conf *conf) |
a66098da | 2570 | { |
610677d2 | 2571 | struct ieee80211_channel *channel = conf->channel; |
a66098da LB |
2572 | struct mwl8k_cmd_set_rf_channel *cmd; |
2573 | int rc; | |
2574 | ||
2575 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2576 | if (cmd == NULL) | |
2577 | return -ENOMEM; | |
2578 | ||
2579 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RF_CHANNEL); | |
2580 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
2581 | cmd->action = cpu_to_le16(MWL8K_CMD_SET); | |
2582 | cmd->current_channel = channel->hw_value; | |
610677d2 | 2583 | |
a66098da | 2584 | if (channel->band == IEEE80211_BAND_2GHZ) |
610677d2 | 2585 | cmd->channel_flags |= cpu_to_le32(0x00000001); |
42574ea2 LB |
2586 | else if (channel->band == IEEE80211_BAND_5GHZ) |
2587 | cmd->channel_flags |= cpu_to_le32(0x00000004); | |
610677d2 LB |
2588 | |
2589 | if (conf->channel_type == NL80211_CHAN_NO_HT || | |
2590 | conf->channel_type == NL80211_CHAN_HT20) | |
2591 | cmd->channel_flags |= cpu_to_le32(0x00000080); | |
2592 | else if (conf->channel_type == NL80211_CHAN_HT40MINUS) | |
2593 | cmd->channel_flags |= cpu_to_le32(0x000001900); | |
2594 | else if (conf->channel_type == NL80211_CHAN_HT40PLUS) | |
2595 | cmd->channel_flags |= cpu_to_le32(0x000000900); | |
a66098da LB |
2596 | |
2597 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2598 | kfree(cmd); | |
2599 | ||
2600 | return rc; | |
2601 | } | |
2602 | ||
2603 | /* | |
55489b6e | 2604 | * CMD_SET_AID. |
a66098da | 2605 | */ |
55489b6e LB |
2606 | #define MWL8K_FRAME_PROT_DISABLED 0x00 |
2607 | #define MWL8K_FRAME_PROT_11G 0x07 | |
2608 | #define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02 | |
2609 | #define MWL8K_FRAME_PROT_11N_HT_ALL 0x06 | |
a66098da | 2610 | |
55489b6e LB |
2611 | struct mwl8k_cmd_update_set_aid { |
2612 | struct mwl8k_cmd_pkt header; | |
2613 | __le16 aid; | |
a66098da | 2614 | |
55489b6e LB |
2615 | /* AP's MAC address (BSSID) */ |
2616 | __u8 bssid[ETH_ALEN]; | |
2617 | __le16 protection_mode; | |
2618 | __u8 supp_rates[14]; | |
ba2d3587 | 2619 | } __packed; |
a66098da | 2620 | |
c6e96010 LB |
2621 | static void legacy_rate_mask_to_array(u8 *rates, u32 mask) |
2622 | { | |
2623 | int i; | |
2624 | int j; | |
2625 | ||
2626 | /* | |
2627 | * Clear nonstandard rates 4 and 13. | |
2628 | */ | |
2629 | mask &= 0x1fef; | |
2630 | ||
2631 | for (i = 0, j = 0; i < 14; i++) { | |
2632 | if (mask & (1 << i)) | |
777ad375 | 2633 | rates[j++] = mwl8k_rates_24[i].hw_value; |
c6e96010 LB |
2634 | } |
2635 | } | |
2636 | ||
55489b6e | 2637 | static int |
c6e96010 LB |
2638 | mwl8k_cmd_set_aid(struct ieee80211_hw *hw, |
2639 | struct ieee80211_vif *vif, u32 legacy_rate_mask) | |
a66098da | 2640 | { |
55489b6e LB |
2641 | struct mwl8k_cmd_update_set_aid *cmd; |
2642 | u16 prot_mode; | |
a66098da LB |
2643 | int rc; |
2644 | ||
2645 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2646 | if (cmd == NULL) | |
2647 | return -ENOMEM; | |
2648 | ||
55489b6e | 2649 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_AID); |
a66098da | 2650 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); |
7dc6a7a7 | 2651 | cmd->aid = cpu_to_le16(vif->bss_conf.aid); |
0a11dfc3 | 2652 | memcpy(cmd->bssid, vif->bss_conf.bssid, ETH_ALEN); |
a66098da | 2653 | |
7dc6a7a7 | 2654 | if (vif->bss_conf.use_cts_prot) { |
55489b6e LB |
2655 | prot_mode = MWL8K_FRAME_PROT_11G; |
2656 | } else { | |
7dc6a7a7 | 2657 | switch (vif->bss_conf.ht_operation_mode & |
55489b6e LB |
2658 | IEEE80211_HT_OP_MODE_PROTECTION) { |
2659 | case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ: | |
2660 | prot_mode = MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY; | |
2661 | break; | |
2662 | case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED: | |
2663 | prot_mode = MWL8K_FRAME_PROT_11N_HT_ALL; | |
2664 | break; | |
2665 | default: | |
2666 | prot_mode = MWL8K_FRAME_PROT_DISABLED; | |
2667 | break; | |
2668 | } | |
2669 | } | |
2670 | cmd->protection_mode = cpu_to_le16(prot_mode); | |
a66098da | 2671 | |
c6e96010 | 2672 | legacy_rate_mask_to_array(cmd->supp_rates, legacy_rate_mask); |
a66098da LB |
2673 | |
2674 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2675 | kfree(cmd); | |
2676 | ||
2677 | return rc; | |
2678 | } | |
2679 | ||
32060e1b | 2680 | /* |
55489b6e | 2681 | * CMD_SET_RATE. |
32060e1b | 2682 | */ |
55489b6e LB |
2683 | struct mwl8k_cmd_set_rate { |
2684 | struct mwl8k_cmd_pkt header; | |
2685 | __u8 legacy_rates[14]; | |
2686 | ||
2687 | /* Bitmap for supported MCS codes. */ | |
2688 | __u8 mcs_set[16]; | |
2689 | __u8 reserved[16]; | |
ba2d3587 | 2690 | } __packed; |
32060e1b | 2691 | |
55489b6e | 2692 | static int |
c6e96010 | 2693 | mwl8k_cmd_set_rate(struct ieee80211_hw *hw, struct ieee80211_vif *vif, |
13935e2c | 2694 | u32 legacy_rate_mask, u8 *mcs_rates) |
32060e1b | 2695 | { |
55489b6e | 2696 | struct mwl8k_cmd_set_rate *cmd; |
32060e1b LB |
2697 | int rc; |
2698 | ||
2699 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2700 | if (cmd == NULL) | |
2701 | return -ENOMEM; | |
2702 | ||
55489b6e | 2703 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATE); |
32060e1b | 2704 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); |
c6e96010 | 2705 | legacy_rate_mask_to_array(cmd->legacy_rates, legacy_rate_mask); |
13935e2c | 2706 | memcpy(cmd->mcs_set, mcs_rates, 16); |
32060e1b LB |
2707 | |
2708 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2709 | kfree(cmd); | |
2710 | ||
2711 | return rc; | |
2712 | } | |
2713 | ||
a66098da | 2714 | /* |
55489b6e | 2715 | * CMD_FINALIZE_JOIN. |
a66098da | 2716 | */ |
55489b6e LB |
2717 | #define MWL8K_FJ_BEACON_MAXLEN 128 |
2718 | ||
2719 | struct mwl8k_cmd_finalize_join { | |
a66098da | 2720 | struct mwl8k_cmd_pkt header; |
55489b6e LB |
2721 | __le32 sleep_interval; /* Number of beacon periods to sleep */ |
2722 | __u8 beacon_data[MWL8K_FJ_BEACON_MAXLEN]; | |
ba2d3587 | 2723 | } __packed; |
a66098da | 2724 | |
55489b6e LB |
2725 | static int mwl8k_cmd_finalize_join(struct ieee80211_hw *hw, void *frame, |
2726 | int framelen, int dtim) | |
a66098da | 2727 | { |
55489b6e LB |
2728 | struct mwl8k_cmd_finalize_join *cmd; |
2729 | struct ieee80211_mgmt *payload = frame; | |
2730 | int payload_len; | |
a66098da LB |
2731 | int rc; |
2732 | ||
2733 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2734 | if (cmd == NULL) | |
2735 | return -ENOMEM; | |
2736 | ||
55489b6e | 2737 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_FINALIZE_JOIN); |
a66098da | 2738 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); |
55489b6e LB |
2739 | cmd->sleep_interval = cpu_to_le32(dtim ? dtim : 1); |
2740 | ||
2741 | payload_len = framelen - ieee80211_hdrlen(payload->frame_control); | |
2742 | if (payload_len < 0) | |
2743 | payload_len = 0; | |
2744 | else if (payload_len > MWL8K_FJ_BEACON_MAXLEN) | |
2745 | payload_len = MWL8K_FJ_BEACON_MAXLEN; | |
2746 | ||
2747 | memcpy(cmd->beacon_data, &payload->u.beacon, payload_len); | |
a66098da LB |
2748 | |
2749 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2750 | kfree(cmd); | |
2751 | ||
2752 | return rc; | |
2753 | } | |
2754 | ||
2755 | /* | |
55489b6e | 2756 | * CMD_SET_RTS_THRESHOLD. |
a66098da | 2757 | */ |
55489b6e | 2758 | struct mwl8k_cmd_set_rts_threshold { |
a66098da LB |
2759 | struct mwl8k_cmd_pkt header; |
2760 | __le16 action; | |
55489b6e | 2761 | __le16 threshold; |
ba2d3587 | 2762 | } __packed; |
a66098da | 2763 | |
c2c2b12a LB |
2764 | static int |
2765 | mwl8k_cmd_set_rts_threshold(struct ieee80211_hw *hw, int rts_thresh) | |
a66098da | 2766 | { |
55489b6e | 2767 | struct mwl8k_cmd_set_rts_threshold *cmd; |
a66098da LB |
2768 | int rc; |
2769 | ||
2770 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2771 | if (cmd == NULL) | |
2772 | return -ENOMEM; | |
2773 | ||
55489b6e | 2774 | cmd->header.code = cpu_to_le16(MWL8K_CMD_RTS_THRESHOLD); |
a66098da | 2775 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); |
c2c2b12a LB |
2776 | cmd->action = cpu_to_le16(MWL8K_CMD_SET); |
2777 | cmd->threshold = cpu_to_le16(rts_thresh); | |
a66098da LB |
2778 | |
2779 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2780 | kfree(cmd); | |
2781 | ||
a66098da LB |
2782 | return rc; |
2783 | } | |
2784 | ||
2785 | /* | |
55489b6e | 2786 | * CMD_SET_SLOT. |
a66098da | 2787 | */ |
55489b6e | 2788 | struct mwl8k_cmd_set_slot { |
a66098da LB |
2789 | struct mwl8k_cmd_pkt header; |
2790 | __le16 action; | |
55489b6e | 2791 | __u8 short_slot; |
ba2d3587 | 2792 | } __packed; |
a66098da | 2793 | |
55489b6e | 2794 | static int mwl8k_cmd_set_slot(struct ieee80211_hw *hw, bool short_slot_time) |
a66098da | 2795 | { |
55489b6e | 2796 | struct mwl8k_cmd_set_slot *cmd; |
a66098da LB |
2797 | int rc; |
2798 | ||
2799 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2800 | if (cmd == NULL) | |
2801 | return -ENOMEM; | |
2802 | ||
55489b6e | 2803 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_SLOT); |
a66098da | 2804 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); |
55489b6e LB |
2805 | cmd->action = cpu_to_le16(MWL8K_CMD_SET); |
2806 | cmd->short_slot = short_slot_time; | |
a66098da LB |
2807 | |
2808 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2809 | kfree(cmd); | |
2810 | ||
2811 | return rc; | |
2812 | } | |
2813 | ||
2814 | /* | |
2815 | * CMD_SET_EDCA_PARAMS. | |
2816 | */ | |
2817 | struct mwl8k_cmd_set_edca_params { | |
2818 | struct mwl8k_cmd_pkt header; | |
2819 | ||
2820 | /* See MWL8K_SET_EDCA_XXX below */ | |
2821 | __le16 action; | |
2822 | ||
2823 | /* TX opportunity in units of 32 us */ | |
2824 | __le16 txop; | |
2825 | ||
2e484c89 LB |
2826 | union { |
2827 | struct { | |
2828 | /* Log exponent of max contention period: 0...15 */ | |
2829 | __le32 log_cw_max; | |
2830 | ||
2831 | /* Log exponent of min contention period: 0...15 */ | |
2832 | __le32 log_cw_min; | |
2833 | ||
2834 | /* Adaptive interframe spacing in units of 32us */ | |
2835 | __u8 aifs; | |
2836 | ||
2837 | /* TX queue to configure */ | |
2838 | __u8 txq; | |
2839 | } ap; | |
2840 | struct { | |
2841 | /* Log exponent of max contention period: 0...15 */ | |
2842 | __u8 log_cw_max; | |
a66098da | 2843 | |
2e484c89 LB |
2844 | /* Log exponent of min contention period: 0...15 */ |
2845 | __u8 log_cw_min; | |
a66098da | 2846 | |
2e484c89 LB |
2847 | /* Adaptive interframe spacing in units of 32us */ |
2848 | __u8 aifs; | |
a66098da | 2849 | |
2e484c89 LB |
2850 | /* TX queue to configure */ |
2851 | __u8 txq; | |
2852 | } sta; | |
2853 | }; | |
ba2d3587 | 2854 | } __packed; |
a66098da | 2855 | |
a66098da LB |
2856 | #define MWL8K_SET_EDCA_CW 0x01 |
2857 | #define MWL8K_SET_EDCA_TXOP 0x02 | |
2858 | #define MWL8K_SET_EDCA_AIFS 0x04 | |
2859 | ||
2860 | #define MWL8K_SET_EDCA_ALL (MWL8K_SET_EDCA_CW | \ | |
2861 | MWL8K_SET_EDCA_TXOP | \ | |
2862 | MWL8K_SET_EDCA_AIFS) | |
2863 | ||
2864 | static int | |
55489b6e LB |
2865 | mwl8k_cmd_set_edca_params(struct ieee80211_hw *hw, __u8 qnum, |
2866 | __u16 cw_min, __u16 cw_max, | |
2867 | __u8 aifs, __u16 txop) | |
a66098da | 2868 | { |
2e484c89 | 2869 | struct mwl8k_priv *priv = hw->priv; |
a66098da | 2870 | struct mwl8k_cmd_set_edca_params *cmd; |
a66098da LB |
2871 | int rc; |
2872 | ||
2873 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2874 | if (cmd == NULL) | |
2875 | return -ENOMEM; | |
2876 | ||
a66098da LB |
2877 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_EDCA_PARAMS); |
2878 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
a66098da LB |
2879 | cmd->action = cpu_to_le16(MWL8K_SET_EDCA_ALL); |
2880 | cmd->txop = cpu_to_le16(txop); | |
2e484c89 LB |
2881 | if (priv->ap_fw) { |
2882 | cmd->ap.log_cw_max = cpu_to_le32(ilog2(cw_max + 1)); | |
2883 | cmd->ap.log_cw_min = cpu_to_le32(ilog2(cw_min + 1)); | |
2884 | cmd->ap.aifs = aifs; | |
2885 | cmd->ap.txq = qnum; | |
2886 | } else { | |
2887 | cmd->sta.log_cw_max = (u8)ilog2(cw_max + 1); | |
2888 | cmd->sta.log_cw_min = (u8)ilog2(cw_min + 1); | |
2889 | cmd->sta.aifs = aifs; | |
2890 | cmd->sta.txq = qnum; | |
2891 | } | |
a66098da LB |
2892 | |
2893 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2894 | kfree(cmd); | |
2895 | ||
2896 | return rc; | |
2897 | } | |
2898 | ||
2899 | /* | |
55489b6e | 2900 | * CMD_SET_WMM_MODE. |
a66098da | 2901 | */ |
55489b6e | 2902 | struct mwl8k_cmd_set_wmm_mode { |
a66098da | 2903 | struct mwl8k_cmd_pkt header; |
55489b6e | 2904 | __le16 action; |
ba2d3587 | 2905 | } __packed; |
a66098da | 2906 | |
55489b6e | 2907 | static int mwl8k_cmd_set_wmm_mode(struct ieee80211_hw *hw, bool enable) |
a66098da | 2908 | { |
55489b6e LB |
2909 | struct mwl8k_priv *priv = hw->priv; |
2910 | struct mwl8k_cmd_set_wmm_mode *cmd; | |
a66098da LB |
2911 | int rc; |
2912 | ||
a66098da LB |
2913 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); |
2914 | if (cmd == NULL) | |
2915 | return -ENOMEM; | |
2916 | ||
55489b6e | 2917 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_WMM_MODE); |
a66098da | 2918 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); |
55489b6e | 2919 | cmd->action = cpu_to_le16(!!enable); |
a66098da LB |
2920 | |
2921 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2922 | kfree(cmd); | |
16cec43d | 2923 | |
55489b6e LB |
2924 | if (!rc) |
2925 | priv->wmm_enabled = enable; | |
a66098da LB |
2926 | |
2927 | return rc; | |
2928 | } | |
2929 | ||
2930 | /* | |
55489b6e | 2931 | * CMD_MIMO_CONFIG. |
a66098da | 2932 | */ |
55489b6e LB |
2933 | struct mwl8k_cmd_mimo_config { |
2934 | struct mwl8k_cmd_pkt header; | |
2935 | __le32 action; | |
2936 | __u8 rx_antenna_map; | |
2937 | __u8 tx_antenna_map; | |
ba2d3587 | 2938 | } __packed; |
a66098da | 2939 | |
55489b6e | 2940 | static int mwl8k_cmd_mimo_config(struct ieee80211_hw *hw, __u8 rx, __u8 tx) |
a66098da | 2941 | { |
55489b6e | 2942 | struct mwl8k_cmd_mimo_config *cmd; |
a66098da LB |
2943 | int rc; |
2944 | ||
2945 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2946 | if (cmd == NULL) | |
2947 | return -ENOMEM; | |
2948 | ||
55489b6e | 2949 | cmd->header.code = cpu_to_le16(MWL8K_CMD_MIMO_CONFIG); |
a66098da | 2950 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); |
55489b6e LB |
2951 | cmd->action = cpu_to_le32((u32)MWL8K_CMD_SET); |
2952 | cmd->rx_antenna_map = rx; | |
2953 | cmd->tx_antenna_map = tx; | |
a66098da LB |
2954 | |
2955 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2956 | kfree(cmd); | |
2957 | ||
2958 | return rc; | |
2959 | } | |
2960 | ||
2961 | /* | |
b71ed2c6 | 2962 | * CMD_USE_FIXED_RATE (STA version). |
a66098da | 2963 | */ |
b71ed2c6 LB |
2964 | struct mwl8k_cmd_use_fixed_rate_sta { |
2965 | struct mwl8k_cmd_pkt header; | |
2966 | __le32 action; | |
2967 | __le32 allow_rate_drop; | |
2968 | __le32 num_rates; | |
2969 | struct { | |
2970 | __le32 is_ht_rate; | |
2971 | __le32 enable_retry; | |
2972 | __le32 rate; | |
2973 | __le32 retry_count; | |
2974 | } rate_entry[8]; | |
2975 | __le32 rate_type; | |
2976 | __le32 reserved1; | |
2977 | __le32 reserved2; | |
ba2d3587 | 2978 | } __packed; |
a66098da | 2979 | |
b71ed2c6 LB |
2980 | #define MWL8K_USE_AUTO_RATE 0x0002 |
2981 | #define MWL8K_UCAST_RATE 0 | |
a66098da | 2982 | |
b71ed2c6 | 2983 | static int mwl8k_cmd_use_fixed_rate_sta(struct ieee80211_hw *hw) |
a66098da | 2984 | { |
b71ed2c6 | 2985 | struct mwl8k_cmd_use_fixed_rate_sta *cmd; |
a66098da LB |
2986 | int rc; |
2987 | ||
2988 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2989 | if (cmd == NULL) | |
2990 | return -ENOMEM; | |
2991 | ||
2992 | cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE); | |
2993 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
b71ed2c6 LB |
2994 | cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE); |
2995 | cmd->rate_type = cpu_to_le32(MWL8K_UCAST_RATE); | |
a66098da LB |
2996 | |
2997 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2998 | kfree(cmd); | |
2999 | ||
3000 | return rc; | |
3001 | } | |
3002 | ||
088aab8b LB |
3003 | /* |
3004 | * CMD_USE_FIXED_RATE (AP version). | |
3005 | */ | |
3006 | struct mwl8k_cmd_use_fixed_rate_ap { | |
3007 | struct mwl8k_cmd_pkt header; | |
3008 | __le32 action; | |
3009 | __le32 allow_rate_drop; | |
3010 | __le32 num_rates; | |
3011 | struct mwl8k_rate_entry_ap { | |
3012 | __le32 is_ht_rate; | |
3013 | __le32 enable_retry; | |
3014 | __le32 rate; | |
3015 | __le32 retry_count; | |
3016 | } rate_entry[4]; | |
3017 | u8 multicast_rate; | |
3018 | u8 multicast_rate_type; | |
3019 | u8 management_rate; | |
ba2d3587 | 3020 | } __packed; |
088aab8b LB |
3021 | |
3022 | static int | |
3023 | mwl8k_cmd_use_fixed_rate_ap(struct ieee80211_hw *hw, int mcast, int mgmt) | |
3024 | { | |
3025 | struct mwl8k_cmd_use_fixed_rate_ap *cmd; | |
3026 | int rc; | |
3027 | ||
3028 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3029 | if (cmd == NULL) | |
3030 | return -ENOMEM; | |
3031 | ||
3032 | cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE); | |
3033 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
3034 | cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE); | |
3035 | cmd->multicast_rate = mcast; | |
3036 | cmd->management_rate = mgmt; | |
3037 | ||
3038 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
3039 | kfree(cmd); | |
3040 | ||
3041 | return rc; | |
3042 | } | |
3043 | ||
55489b6e LB |
3044 | /* |
3045 | * CMD_ENABLE_SNIFFER. | |
3046 | */ | |
3047 | struct mwl8k_cmd_enable_sniffer { | |
3048 | struct mwl8k_cmd_pkt header; | |
3049 | __le32 action; | |
ba2d3587 | 3050 | } __packed; |
55489b6e LB |
3051 | |
3052 | static int mwl8k_cmd_enable_sniffer(struct ieee80211_hw *hw, bool enable) | |
3053 | { | |
3054 | struct mwl8k_cmd_enable_sniffer *cmd; | |
3055 | int rc; | |
3056 | ||
3057 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3058 | if (cmd == NULL) | |
3059 | return -ENOMEM; | |
3060 | ||
3061 | cmd->header.code = cpu_to_le16(MWL8K_CMD_ENABLE_SNIFFER); | |
3062 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
3063 | cmd->action = cpu_to_le32(!!enable); | |
3064 | ||
3065 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
3066 | kfree(cmd); | |
3067 | ||
3068 | return rc; | |
3069 | } | |
3070 | ||
3071 | /* | |
3072 | * CMD_SET_MAC_ADDR. | |
3073 | */ | |
3074 | struct mwl8k_cmd_set_mac_addr { | |
3075 | struct mwl8k_cmd_pkt header; | |
3076 | union { | |
3077 | struct { | |
3078 | __le16 mac_type; | |
3079 | __u8 mac_addr[ETH_ALEN]; | |
3080 | } mbss; | |
3081 | __u8 mac_addr[ETH_ALEN]; | |
3082 | }; | |
ba2d3587 | 3083 | } __packed; |
55489b6e | 3084 | |
ee0ddf18 LB |
3085 | #define MWL8K_MAC_TYPE_PRIMARY_CLIENT 0 |
3086 | #define MWL8K_MAC_TYPE_SECONDARY_CLIENT 1 | |
3087 | #define MWL8K_MAC_TYPE_PRIMARY_AP 2 | |
3088 | #define MWL8K_MAC_TYPE_SECONDARY_AP 3 | |
a9e00b15 | 3089 | |
aa21d0f6 LB |
3090 | static int mwl8k_cmd_set_mac_addr(struct ieee80211_hw *hw, |
3091 | struct ieee80211_vif *vif, u8 *mac) | |
55489b6e LB |
3092 | { |
3093 | struct mwl8k_priv *priv = hw->priv; | |
ee0ddf18 | 3094 | struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif); |
55489b6e | 3095 | struct mwl8k_cmd_set_mac_addr *cmd; |
ee0ddf18 | 3096 | int mac_type; |
55489b6e LB |
3097 | int rc; |
3098 | ||
ee0ddf18 LB |
3099 | mac_type = MWL8K_MAC_TYPE_PRIMARY_AP; |
3100 | if (vif != NULL && vif->type == NL80211_IFTYPE_STATION) { | |
3101 | if (mwl8k_vif->macid + 1 == ffs(priv->sta_macids_supported)) | |
3102 | mac_type = MWL8K_MAC_TYPE_PRIMARY_CLIENT; | |
3103 | else | |
3104 | mac_type = MWL8K_MAC_TYPE_SECONDARY_CLIENT; | |
3105 | } else if (vif != NULL && vif->type == NL80211_IFTYPE_AP) { | |
3106 | if (mwl8k_vif->macid + 1 == ffs(priv->ap_macids_supported)) | |
3107 | mac_type = MWL8K_MAC_TYPE_PRIMARY_AP; | |
3108 | else | |
3109 | mac_type = MWL8K_MAC_TYPE_SECONDARY_AP; | |
3110 | } | |
3111 | ||
55489b6e LB |
3112 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); |
3113 | if (cmd == NULL) | |
3114 | return -ENOMEM; | |
3115 | ||
3116 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_MAC_ADDR); | |
3117 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
3118 | if (priv->ap_fw) { | |
ee0ddf18 | 3119 | cmd->mbss.mac_type = cpu_to_le16(mac_type); |
55489b6e LB |
3120 | memcpy(cmd->mbss.mac_addr, mac, ETH_ALEN); |
3121 | } else { | |
3122 | memcpy(cmd->mac_addr, mac, ETH_ALEN); | |
3123 | } | |
3124 | ||
aa21d0f6 | 3125 | rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header); |
55489b6e LB |
3126 | kfree(cmd); |
3127 | ||
3128 | return rc; | |
3129 | } | |
3130 | ||
3131 | /* | |
3132 | * CMD_SET_RATEADAPT_MODE. | |
3133 | */ | |
3134 | struct mwl8k_cmd_set_rate_adapt_mode { | |
3135 | struct mwl8k_cmd_pkt header; | |
3136 | __le16 action; | |
3137 | __le16 mode; | |
ba2d3587 | 3138 | } __packed; |
55489b6e LB |
3139 | |
3140 | static int mwl8k_cmd_set_rateadapt_mode(struct ieee80211_hw *hw, __u16 mode) | |
3141 | { | |
3142 | struct mwl8k_cmd_set_rate_adapt_mode *cmd; | |
3143 | int rc; | |
3144 | ||
3145 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3146 | if (cmd == NULL) | |
3147 | return -ENOMEM; | |
3148 | ||
3149 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATEADAPT_MODE); | |
3150 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
3151 | cmd->action = cpu_to_le16(MWL8K_CMD_SET); | |
3152 | cmd->mode = cpu_to_le16(mode); | |
3153 | ||
3154 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
3155 | kfree(cmd); | |
3156 | ||
3157 | return rc; | |
3158 | } | |
3159 | ||
b64fe619 LB |
3160 | /* |
3161 | * CMD_BSS_START. | |
3162 | */ | |
3163 | struct mwl8k_cmd_bss_start { | |
3164 | struct mwl8k_cmd_pkt header; | |
3165 | __le32 enable; | |
ba2d3587 | 3166 | } __packed; |
b64fe619 | 3167 | |
aa21d0f6 LB |
3168 | static int mwl8k_cmd_bss_start(struct ieee80211_hw *hw, |
3169 | struct ieee80211_vif *vif, int enable) | |
b64fe619 LB |
3170 | { |
3171 | struct mwl8k_cmd_bss_start *cmd; | |
3172 | int rc; | |
3173 | ||
3174 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3175 | if (cmd == NULL) | |
3176 | return -ENOMEM; | |
3177 | ||
3178 | cmd->header.code = cpu_to_le16(MWL8K_CMD_BSS_START); | |
3179 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
3180 | cmd->enable = cpu_to_le32(enable); | |
3181 | ||
aa21d0f6 | 3182 | rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header); |
b64fe619 LB |
3183 | kfree(cmd); |
3184 | ||
3185 | return rc; | |
3186 | } | |
3187 | ||
5faa1aff NS |
3188 | /* |
3189 | * CMD_BASTREAM. | |
3190 | */ | |
3191 | ||
3192 | /* | |
3193 | * UPSTREAM is tx direction | |
3194 | */ | |
3195 | #define BASTREAM_FLAG_DIRECTION_UPSTREAM 0x00 | |
3196 | #define BASTREAM_FLAG_IMMEDIATE_TYPE 0x01 | |
3197 | ||
3198 | enum { | |
3199 | MWL8K_BA_CREATE, | |
3200 | MWL8K_BA_UPDATE, | |
3201 | MWL8K_BA_DESTROY, | |
3202 | MWL8K_BA_FLUSH, | |
3203 | MWL8K_BA_CHECK, | |
3204 | } ba_stream_action_type; | |
3205 | ||
3206 | ||
3207 | struct mwl8k_create_ba_stream { | |
3208 | __le32 flags; | |
3209 | __le32 idle_thrs; | |
3210 | __le32 bar_thrs; | |
3211 | __le32 window_size; | |
3212 | u8 peer_mac_addr[6]; | |
3213 | u8 dialog_token; | |
3214 | u8 tid; | |
3215 | u8 queue_id; | |
3216 | u8 param_info; | |
3217 | __le32 ba_context; | |
3218 | u8 reset_seq_no_flag; | |
3219 | __le16 curr_seq_no; | |
3220 | u8 sta_src_mac_addr[6]; | |
3221 | } __packed; | |
3222 | ||
3223 | struct mwl8k_destroy_ba_stream { | |
3224 | __le32 flags; | |
3225 | __le32 ba_context; | |
3226 | } __packed; | |
3227 | ||
3228 | struct mwl8k_cmd_bastream { | |
3229 | struct mwl8k_cmd_pkt header; | |
3230 | __le32 action; | |
3231 | union { | |
3232 | struct mwl8k_create_ba_stream create_params; | |
3233 | struct mwl8k_destroy_ba_stream destroy_params; | |
3234 | }; | |
3235 | } __packed; | |
3236 | ||
3237 | static int | |
3238 | mwl8k_check_ba(struct ieee80211_hw *hw, struct mwl8k_ampdu_stream *stream) | |
3239 | { | |
3240 | struct mwl8k_cmd_bastream *cmd; | |
3241 | int rc; | |
3242 | ||
3243 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3244 | if (cmd == NULL) | |
3245 | return -ENOMEM; | |
3246 | ||
3247 | cmd->header.code = cpu_to_le16(MWL8K_CMD_BASTREAM); | |
3248 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
3249 | ||
3250 | cmd->action = cpu_to_le32(MWL8K_BA_CHECK); | |
3251 | ||
3252 | cmd->create_params.queue_id = stream->idx; | |
3253 | memcpy(&cmd->create_params.peer_mac_addr[0], stream->sta->addr, | |
3254 | ETH_ALEN); | |
3255 | cmd->create_params.tid = stream->tid; | |
3256 | ||
3257 | cmd->create_params.flags = | |
3258 | cpu_to_le32(BASTREAM_FLAG_IMMEDIATE_TYPE) | | |
3259 | cpu_to_le32(BASTREAM_FLAG_DIRECTION_UPSTREAM); | |
3260 | ||
3261 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
3262 | ||
3263 | kfree(cmd); | |
3264 | ||
3265 | return rc; | |
3266 | } | |
3267 | ||
3268 | static int | |
3269 | mwl8k_create_ba(struct ieee80211_hw *hw, struct mwl8k_ampdu_stream *stream, | |
3270 | u8 buf_size) | |
3271 | { | |
3272 | struct mwl8k_cmd_bastream *cmd; | |
3273 | int rc; | |
3274 | ||
3275 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3276 | if (cmd == NULL) | |
3277 | return -ENOMEM; | |
3278 | ||
3279 | ||
3280 | cmd->header.code = cpu_to_le16(MWL8K_CMD_BASTREAM); | |
3281 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
3282 | ||
3283 | cmd->action = cpu_to_le32(MWL8K_BA_CREATE); | |
3284 | ||
3285 | cmd->create_params.bar_thrs = cpu_to_le32((u32)buf_size); | |
3286 | cmd->create_params.window_size = cpu_to_le32((u32)buf_size); | |
3287 | cmd->create_params.queue_id = stream->idx; | |
3288 | ||
3289 | memcpy(cmd->create_params.peer_mac_addr, stream->sta->addr, ETH_ALEN); | |
3290 | cmd->create_params.tid = stream->tid; | |
3291 | cmd->create_params.curr_seq_no = cpu_to_le16(0); | |
3292 | cmd->create_params.reset_seq_no_flag = 1; | |
3293 | ||
3294 | cmd->create_params.param_info = | |
3295 | (stream->sta->ht_cap.ampdu_factor & | |
3296 | IEEE80211_HT_AMPDU_PARM_FACTOR) | | |
3297 | ((stream->sta->ht_cap.ampdu_density << 2) & | |
3298 | IEEE80211_HT_AMPDU_PARM_DENSITY); | |
3299 | ||
3300 | cmd->create_params.flags = | |
3301 | cpu_to_le32(BASTREAM_FLAG_IMMEDIATE_TYPE | | |
3302 | BASTREAM_FLAG_DIRECTION_UPSTREAM); | |
3303 | ||
3304 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
3305 | ||
3306 | wiphy_debug(hw->wiphy, "Created a BA stream for %pM : tid %d\n", | |
3307 | stream->sta->addr, stream->tid); | |
3308 | kfree(cmd); | |
3309 | ||
3310 | return rc; | |
3311 | } | |
3312 | ||
3313 | static void mwl8k_destroy_ba(struct ieee80211_hw *hw, | |
3314 | struct mwl8k_ampdu_stream *stream) | |
3315 | { | |
3316 | struct mwl8k_cmd_bastream *cmd; | |
3317 | ||
3318 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3319 | if (cmd == NULL) | |
3320 | return; | |
3321 | ||
3322 | cmd->header.code = cpu_to_le16(MWL8K_CMD_BASTREAM); | |
3323 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
3324 | cmd->action = cpu_to_le32(MWL8K_BA_DESTROY); | |
3325 | ||
3326 | cmd->destroy_params.ba_context = cpu_to_le32(stream->idx); | |
3327 | mwl8k_post_cmd(hw, &cmd->header); | |
3328 | ||
3329 | wiphy_debug(hw->wiphy, "Deleted BA stream index %d\n", stream->idx); | |
3330 | ||
3331 | kfree(cmd); | |
3332 | } | |
3333 | ||
3f5610ff LB |
3334 | /* |
3335 | * CMD_SET_NEW_STN. | |
3336 | */ | |
3337 | struct mwl8k_cmd_set_new_stn { | |
3338 | struct mwl8k_cmd_pkt header; | |
3339 | __le16 aid; | |
3340 | __u8 mac_addr[6]; | |
3341 | __le16 stn_id; | |
3342 | __le16 action; | |
3343 | __le16 rsvd; | |
3344 | __le32 legacy_rates; | |
3345 | __u8 ht_rates[4]; | |
3346 | __le16 cap_info; | |
3347 | __le16 ht_capabilities_info; | |
3348 | __u8 mac_ht_param_info; | |
3349 | __u8 rev; | |
3350 | __u8 control_channel; | |
3351 | __u8 add_channel; | |
3352 | __le16 op_mode; | |
3353 | __le16 stbc; | |
3354 | __u8 add_qos_info; | |
3355 | __u8 is_qos_sta; | |
3356 | __le32 fw_sta_ptr; | |
ba2d3587 | 3357 | } __packed; |
3f5610ff LB |
3358 | |
3359 | #define MWL8K_STA_ACTION_ADD 0 | |
3360 | #define MWL8K_STA_ACTION_REMOVE 2 | |
3361 | ||
3362 | static int mwl8k_cmd_set_new_stn_add(struct ieee80211_hw *hw, | |
3363 | struct ieee80211_vif *vif, | |
3364 | struct ieee80211_sta *sta) | |
3365 | { | |
3366 | struct mwl8k_cmd_set_new_stn *cmd; | |
8707d026 | 3367 | u32 rates; |
3f5610ff LB |
3368 | int rc; |
3369 | ||
3370 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3371 | if (cmd == NULL) | |
3372 | return -ENOMEM; | |
3373 | ||
3374 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN); | |
3375 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
3376 | cmd->aid = cpu_to_le16(sta->aid); | |
3377 | memcpy(cmd->mac_addr, sta->addr, ETH_ALEN); | |
3378 | cmd->stn_id = cpu_to_le16(sta->aid); | |
3379 | cmd->action = cpu_to_le16(MWL8K_STA_ACTION_ADD); | |
8707d026 LB |
3380 | if (hw->conf.channel->band == IEEE80211_BAND_2GHZ) |
3381 | rates = sta->supp_rates[IEEE80211_BAND_2GHZ]; | |
3382 | else | |
3383 | rates = sta->supp_rates[IEEE80211_BAND_5GHZ] << 5; | |
3384 | cmd->legacy_rates = cpu_to_le32(rates); | |
3f5610ff LB |
3385 | if (sta->ht_cap.ht_supported) { |
3386 | cmd->ht_rates[0] = sta->ht_cap.mcs.rx_mask[0]; | |
3387 | cmd->ht_rates[1] = sta->ht_cap.mcs.rx_mask[1]; | |
3388 | cmd->ht_rates[2] = sta->ht_cap.mcs.rx_mask[2]; | |
3389 | cmd->ht_rates[3] = sta->ht_cap.mcs.rx_mask[3]; | |
3390 | cmd->ht_capabilities_info = cpu_to_le16(sta->ht_cap.cap); | |
3391 | cmd->mac_ht_param_info = (sta->ht_cap.ampdu_factor & 3) | | |
3392 | ((sta->ht_cap.ampdu_density & 7) << 2); | |
3393 | cmd->is_qos_sta = 1; | |
3394 | } | |
3395 | ||
aa21d0f6 | 3396 | rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header); |
3f5610ff LB |
3397 | kfree(cmd); |
3398 | ||
3399 | return rc; | |
3400 | } | |
3401 | ||
b64fe619 LB |
3402 | static int mwl8k_cmd_set_new_stn_add_self(struct ieee80211_hw *hw, |
3403 | struct ieee80211_vif *vif) | |
3404 | { | |
3405 | struct mwl8k_cmd_set_new_stn *cmd; | |
3406 | int rc; | |
3407 | ||
3408 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3409 | if (cmd == NULL) | |
3410 | return -ENOMEM; | |
3411 | ||
3412 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN); | |
3413 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
3414 | memcpy(cmd->mac_addr, vif->addr, ETH_ALEN); | |
3415 | ||
aa21d0f6 | 3416 | rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header); |
b64fe619 LB |
3417 | kfree(cmd); |
3418 | ||
3419 | return rc; | |
3420 | } | |
3421 | ||
3f5610ff LB |
3422 | static int mwl8k_cmd_set_new_stn_del(struct ieee80211_hw *hw, |
3423 | struct ieee80211_vif *vif, u8 *addr) | |
3424 | { | |
3425 | struct mwl8k_cmd_set_new_stn *cmd; | |
3426 | int rc; | |
3427 | ||
3428 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3429 | if (cmd == NULL) | |
3430 | return -ENOMEM; | |
3431 | ||
3432 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN); | |
3433 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
3434 | memcpy(cmd->mac_addr, addr, ETH_ALEN); | |
3435 | cmd->action = cpu_to_le16(MWL8K_STA_ACTION_REMOVE); | |
3436 | ||
aa21d0f6 | 3437 | rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header); |
3f5610ff LB |
3438 | kfree(cmd); |
3439 | ||
3440 | return rc; | |
3441 | } | |
3442 | ||
fcdc403c NS |
3443 | /* |
3444 | * CMD_UPDATE_ENCRYPTION. | |
3445 | */ | |
3446 | ||
3447 | #define MAX_ENCR_KEY_LENGTH 16 | |
3448 | #define MIC_KEY_LENGTH 8 | |
3449 | ||
3450 | struct mwl8k_cmd_update_encryption { | |
3451 | struct mwl8k_cmd_pkt header; | |
3452 | ||
3453 | __le32 action; | |
3454 | __le32 reserved; | |
3455 | __u8 mac_addr[6]; | |
3456 | __u8 encr_type; | |
3457 | ||
3458 | } __attribute__((packed)); | |
3459 | ||
3460 | struct mwl8k_cmd_set_key { | |
3461 | struct mwl8k_cmd_pkt header; | |
3462 | ||
3463 | __le32 action; | |
3464 | __le32 reserved; | |
3465 | __le16 length; | |
3466 | __le16 key_type_id; | |
3467 | __le32 key_info; | |
3468 | __le32 key_id; | |
3469 | __le16 key_len; | |
3470 | __u8 key_material[MAX_ENCR_KEY_LENGTH]; | |
3471 | __u8 tkip_tx_mic_key[MIC_KEY_LENGTH]; | |
3472 | __u8 tkip_rx_mic_key[MIC_KEY_LENGTH]; | |
3473 | __le16 tkip_rsc_low; | |
3474 | __le32 tkip_rsc_high; | |
3475 | __le16 tkip_tsc_low; | |
3476 | __le32 tkip_tsc_high; | |
3477 | __u8 mac_addr[6]; | |
3478 | } __attribute__((packed)); | |
3479 | ||
3480 | enum { | |
3481 | MWL8K_ENCR_ENABLE, | |
3482 | MWL8K_ENCR_SET_KEY, | |
3483 | MWL8K_ENCR_REMOVE_KEY, | |
3484 | MWL8K_ENCR_SET_GROUP_KEY, | |
3485 | }; | |
3486 | ||
3487 | #define MWL8K_UPDATE_ENCRYPTION_TYPE_WEP 0 | |
3488 | #define MWL8K_UPDATE_ENCRYPTION_TYPE_DISABLE 1 | |
3489 | #define MWL8K_UPDATE_ENCRYPTION_TYPE_TKIP 4 | |
3490 | #define MWL8K_UPDATE_ENCRYPTION_TYPE_MIXED 7 | |
3491 | #define MWL8K_UPDATE_ENCRYPTION_TYPE_AES 8 | |
3492 | ||
3493 | enum { | |
3494 | MWL8K_ALG_WEP, | |
3495 | MWL8K_ALG_TKIP, | |
3496 | MWL8K_ALG_CCMP, | |
3497 | }; | |
3498 | ||
3499 | #define MWL8K_KEY_FLAG_TXGROUPKEY 0x00000004 | |
3500 | #define MWL8K_KEY_FLAG_PAIRWISE 0x00000008 | |
3501 | #define MWL8K_KEY_FLAG_TSC_VALID 0x00000040 | |
3502 | #define MWL8K_KEY_FLAG_WEP_TXKEY 0x01000000 | |
3503 | #define MWL8K_KEY_FLAG_MICKEY_VALID 0x02000000 | |
3504 | ||
3505 | static int mwl8k_cmd_update_encryption_enable(struct ieee80211_hw *hw, | |
3506 | struct ieee80211_vif *vif, | |
3507 | u8 *addr, | |
3508 | u8 encr_type) | |
3509 | { | |
3510 | struct mwl8k_cmd_update_encryption *cmd; | |
3511 | int rc; | |
3512 | ||
3513 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3514 | if (cmd == NULL) | |
3515 | return -ENOMEM; | |
3516 | ||
3517 | cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_ENCRYPTION); | |
3518 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
3519 | cmd->action = cpu_to_le32(MWL8K_ENCR_ENABLE); | |
3520 | memcpy(cmd->mac_addr, addr, ETH_ALEN); | |
3521 | cmd->encr_type = encr_type; | |
3522 | ||
3523 | rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header); | |
3524 | kfree(cmd); | |
3525 | ||
3526 | return rc; | |
3527 | } | |
3528 | ||
3529 | static int mwl8k_encryption_set_cmd_info(struct mwl8k_cmd_set_key *cmd, | |
3530 | u8 *addr, | |
3531 | struct ieee80211_key_conf *key) | |
3532 | { | |
3533 | cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_ENCRYPTION); | |
3534 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
3535 | cmd->length = cpu_to_le16(sizeof(*cmd) - | |
3536 | offsetof(struct mwl8k_cmd_set_key, length)); | |
3537 | cmd->key_id = cpu_to_le32(key->keyidx); | |
3538 | cmd->key_len = cpu_to_le16(key->keylen); | |
3539 | memcpy(cmd->mac_addr, addr, ETH_ALEN); | |
3540 | ||
3541 | switch (key->cipher) { | |
3542 | case WLAN_CIPHER_SUITE_WEP40: | |
3543 | case WLAN_CIPHER_SUITE_WEP104: | |
3544 | cmd->key_type_id = cpu_to_le16(MWL8K_ALG_WEP); | |
3545 | if (key->keyidx == 0) | |
3546 | cmd->key_info = cpu_to_le32(MWL8K_KEY_FLAG_WEP_TXKEY); | |
3547 | ||
3548 | break; | |
3549 | case WLAN_CIPHER_SUITE_TKIP: | |
3550 | cmd->key_type_id = cpu_to_le16(MWL8K_ALG_TKIP); | |
3551 | cmd->key_info = (key->flags & IEEE80211_KEY_FLAG_PAIRWISE) | |
3552 | ? cpu_to_le32(MWL8K_KEY_FLAG_PAIRWISE) | |
3553 | : cpu_to_le32(MWL8K_KEY_FLAG_TXGROUPKEY); | |
3554 | cmd->key_info |= cpu_to_le32(MWL8K_KEY_FLAG_MICKEY_VALID | |
3555 | | MWL8K_KEY_FLAG_TSC_VALID); | |
3556 | break; | |
3557 | case WLAN_CIPHER_SUITE_CCMP: | |
3558 | cmd->key_type_id = cpu_to_le16(MWL8K_ALG_CCMP); | |
3559 | cmd->key_info = (key->flags & IEEE80211_KEY_FLAG_PAIRWISE) | |
3560 | ? cpu_to_le32(MWL8K_KEY_FLAG_PAIRWISE) | |
3561 | : cpu_to_le32(MWL8K_KEY_FLAG_TXGROUPKEY); | |
3562 | break; | |
3563 | default: | |
3564 | return -ENOTSUPP; | |
3565 | } | |
3566 | ||
3567 | return 0; | |
3568 | } | |
3569 | ||
3570 | static int mwl8k_cmd_encryption_set_key(struct ieee80211_hw *hw, | |
3571 | struct ieee80211_vif *vif, | |
3572 | u8 *addr, | |
3573 | struct ieee80211_key_conf *key) | |
3574 | { | |
3575 | struct mwl8k_cmd_set_key *cmd; | |
3576 | int rc; | |
3577 | int keymlen; | |
3578 | u32 action; | |
3579 | u8 idx; | |
3580 | struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif); | |
3581 | ||
3582 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3583 | if (cmd == NULL) | |
3584 | return -ENOMEM; | |
3585 | ||
3586 | rc = mwl8k_encryption_set_cmd_info(cmd, addr, key); | |
3587 | if (rc < 0) | |
3588 | goto done; | |
3589 | ||
3590 | idx = key->keyidx; | |
3591 | ||
3592 | if (key->flags & IEEE80211_KEY_FLAG_PAIRWISE) | |
3593 | action = MWL8K_ENCR_SET_KEY; | |
3594 | else | |
3595 | action = MWL8K_ENCR_SET_GROUP_KEY; | |
3596 | ||
3597 | switch (key->cipher) { | |
3598 | case WLAN_CIPHER_SUITE_WEP40: | |
3599 | case WLAN_CIPHER_SUITE_WEP104: | |
3600 | if (!mwl8k_vif->wep_key_conf[idx].enabled) { | |
3601 | memcpy(mwl8k_vif->wep_key_conf[idx].key, key, | |
3602 | sizeof(*key) + key->keylen); | |
3603 | mwl8k_vif->wep_key_conf[idx].enabled = 1; | |
3604 | } | |
3605 | ||
3606 | keymlen = 0; | |
3607 | action = MWL8K_ENCR_SET_KEY; | |
3608 | break; | |
3609 | case WLAN_CIPHER_SUITE_TKIP: | |
3610 | keymlen = MAX_ENCR_KEY_LENGTH + 2 * MIC_KEY_LENGTH; | |
3611 | break; | |
3612 | case WLAN_CIPHER_SUITE_CCMP: | |
3613 | keymlen = key->keylen; | |
3614 | break; | |
3615 | default: | |
3616 | rc = -ENOTSUPP; | |
3617 | goto done; | |
3618 | } | |
3619 | ||
3620 | memcpy(cmd->key_material, key->key, keymlen); | |
3621 | cmd->action = cpu_to_le32(action); | |
3622 | ||
3623 | rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header); | |
3624 | done: | |
3625 | kfree(cmd); | |
3626 | ||
3627 | return rc; | |
3628 | } | |
3629 | ||
3630 | static int mwl8k_cmd_encryption_remove_key(struct ieee80211_hw *hw, | |
3631 | struct ieee80211_vif *vif, | |
3632 | u8 *addr, | |
3633 | struct ieee80211_key_conf *key) | |
3634 | { | |
3635 | struct mwl8k_cmd_set_key *cmd; | |
3636 | int rc; | |
3637 | struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif); | |
3638 | ||
3639 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3640 | if (cmd == NULL) | |
3641 | return -ENOMEM; | |
3642 | ||
3643 | rc = mwl8k_encryption_set_cmd_info(cmd, addr, key); | |
3644 | if (rc < 0) | |
3645 | goto done; | |
3646 | ||
3647 | if (key->cipher == WLAN_CIPHER_SUITE_WEP40 || | |
3648 | WLAN_CIPHER_SUITE_WEP104) | |
3649 | mwl8k_vif->wep_key_conf[key->keyidx].enabled = 0; | |
3650 | ||
3651 | cmd->action = cpu_to_le32(MWL8K_ENCR_REMOVE_KEY); | |
3652 | ||
3653 | rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header); | |
3654 | done: | |
3655 | kfree(cmd); | |
3656 | ||
3657 | return rc; | |
3658 | } | |
3659 | ||
3660 | static int mwl8k_set_key(struct ieee80211_hw *hw, | |
3661 | enum set_key_cmd cmd_param, | |
3662 | struct ieee80211_vif *vif, | |
3663 | struct ieee80211_sta *sta, | |
3664 | struct ieee80211_key_conf *key) | |
3665 | { | |
3666 | int rc = 0; | |
3667 | u8 encr_type; | |
3668 | u8 *addr; | |
3669 | struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif); | |
3670 | ||
3671 | if (vif->type == NL80211_IFTYPE_STATION) | |
3672 | return -EOPNOTSUPP; | |
3673 | ||
3674 | if (sta == NULL) | |
3675 | addr = hw->wiphy->perm_addr; | |
3676 | else | |
3677 | addr = sta->addr; | |
3678 | ||
3679 | if (cmd_param == SET_KEY) { | |
3680 | key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV; | |
3681 | rc = mwl8k_cmd_encryption_set_key(hw, vif, addr, key); | |
3682 | if (rc) | |
3683 | goto out; | |
3684 | ||
3685 | if ((key->cipher == WLAN_CIPHER_SUITE_WEP40) | |
3686 | || (key->cipher == WLAN_CIPHER_SUITE_WEP104)) | |
3687 | encr_type = MWL8K_UPDATE_ENCRYPTION_TYPE_WEP; | |
3688 | else | |
3689 | encr_type = MWL8K_UPDATE_ENCRYPTION_TYPE_MIXED; | |
3690 | ||
3691 | rc = mwl8k_cmd_update_encryption_enable(hw, vif, addr, | |
3692 | encr_type); | |
3693 | if (rc) | |
3694 | goto out; | |
3695 | ||
3696 | mwl8k_vif->is_hw_crypto_enabled = true; | |
3697 | ||
3698 | } else { | |
3699 | rc = mwl8k_cmd_encryption_remove_key(hw, vif, addr, key); | |
3700 | ||
3701 | if (rc) | |
3702 | goto out; | |
3703 | ||
3704 | mwl8k_vif->is_hw_crypto_enabled = false; | |
3705 | ||
3706 | } | |
3707 | out: | |
3708 | return rc; | |
3709 | } | |
3710 | ||
55489b6e LB |
3711 | /* |
3712 | * CMD_UPDATE_STADB. | |
3713 | */ | |
25d81b1e LB |
3714 | struct ewc_ht_info { |
3715 | __le16 control1; | |
3716 | __le16 control2; | |
3717 | __le16 control3; | |
ba2d3587 | 3718 | } __packed; |
25d81b1e LB |
3719 | |
3720 | struct peer_capability_info { | |
3721 | /* Peer type - AP vs. STA. */ | |
3722 | __u8 peer_type; | |
3723 | ||
3724 | /* Basic 802.11 capabilities from assoc resp. */ | |
3725 | __le16 basic_caps; | |
3726 | ||
3727 | /* Set if peer supports 802.11n high throughput (HT). */ | |
3728 | __u8 ht_support; | |
3729 | ||
3730 | /* Valid if HT is supported. */ | |
3731 | __le16 ht_caps; | |
3732 | __u8 extended_ht_caps; | |
3733 | struct ewc_ht_info ewc_info; | |
3734 | ||
3735 | /* Legacy rate table. Intersection of our rates and peer rates. */ | |
3736 | __u8 legacy_rates[12]; | |
3737 | ||
3738 | /* HT rate table. Intersection of our rates and peer rates. */ | |
3739 | __u8 ht_rates[16]; | |
3740 | __u8 pad[16]; | |
3741 | ||
3742 | /* If set, interoperability mode, no proprietary extensions. */ | |
3743 | __u8 interop; | |
3744 | __u8 pad2; | |
3745 | __u8 station_id; | |
3746 | __le16 amsdu_enabled; | |
ba2d3587 | 3747 | } __packed; |
25d81b1e | 3748 | |
55489b6e LB |
3749 | struct mwl8k_cmd_update_stadb { |
3750 | struct mwl8k_cmd_pkt header; | |
3751 | ||
3752 | /* See STADB_ACTION_TYPE */ | |
3753 | __le32 action; | |
3754 | ||
3755 | /* Peer MAC address */ | |
3756 | __u8 peer_addr[ETH_ALEN]; | |
3757 | ||
3758 | __le32 reserved; | |
3759 | ||
3760 | /* Peer info - valid during add/update. */ | |
3761 | struct peer_capability_info peer_info; | |
ba2d3587 | 3762 | } __packed; |
55489b6e | 3763 | |
a680400e LB |
3764 | #define MWL8K_STA_DB_MODIFY_ENTRY 1 |
3765 | #define MWL8K_STA_DB_DEL_ENTRY 2 | |
3766 | ||
3767 | /* Peer Entry flags - used to define the type of the peer node */ | |
3768 | #define MWL8K_PEER_TYPE_ACCESSPOINT 2 | |
3769 | ||
3770 | static int mwl8k_cmd_update_stadb_add(struct ieee80211_hw *hw, | |
c6e96010 | 3771 | struct ieee80211_vif *vif, |
13935e2c | 3772 | struct ieee80211_sta *sta) |
55489b6e | 3773 | { |
55489b6e | 3774 | struct mwl8k_cmd_update_stadb *cmd; |
a680400e | 3775 | struct peer_capability_info *p; |
8707d026 | 3776 | u32 rates; |
55489b6e LB |
3777 | int rc; |
3778 | ||
3779 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3780 | if (cmd == NULL) | |
3781 | return -ENOMEM; | |
3782 | ||
3783 | cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB); | |
3784 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
a680400e | 3785 | cmd->action = cpu_to_le32(MWL8K_STA_DB_MODIFY_ENTRY); |
13935e2c | 3786 | memcpy(cmd->peer_addr, sta->addr, ETH_ALEN); |
55489b6e | 3787 | |
a680400e LB |
3788 | p = &cmd->peer_info; |
3789 | p->peer_type = MWL8K_PEER_TYPE_ACCESSPOINT; | |
3790 | p->basic_caps = cpu_to_le16(vif->bss_conf.assoc_capability); | |
13935e2c | 3791 | p->ht_support = sta->ht_cap.ht_supported; |
b603742f | 3792 | p->ht_caps = cpu_to_le16(sta->ht_cap.cap); |
13935e2c LB |
3793 | p->extended_ht_caps = (sta->ht_cap.ampdu_factor & 3) | |
3794 | ((sta->ht_cap.ampdu_density & 7) << 2); | |
8707d026 LB |
3795 | if (hw->conf.channel->band == IEEE80211_BAND_2GHZ) |
3796 | rates = sta->supp_rates[IEEE80211_BAND_2GHZ]; | |
3797 | else | |
3798 | rates = sta->supp_rates[IEEE80211_BAND_5GHZ] << 5; | |
3799 | legacy_rate_mask_to_array(p->legacy_rates, rates); | |
13935e2c | 3800 | memcpy(p->ht_rates, sta->ht_cap.mcs.rx_mask, 16); |
a680400e LB |
3801 | p->interop = 1; |
3802 | p->amsdu_enabled = 0; | |
3803 | ||
3804 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
3805 | kfree(cmd); | |
3806 | ||
3807 | return rc ? rc : p->station_id; | |
3808 | } | |
3809 | ||
3810 | static int mwl8k_cmd_update_stadb_del(struct ieee80211_hw *hw, | |
3811 | struct ieee80211_vif *vif, u8 *addr) | |
3812 | { | |
3813 | struct mwl8k_cmd_update_stadb *cmd; | |
3814 | int rc; | |
3815 | ||
3816 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3817 | if (cmd == NULL) | |
3818 | return -ENOMEM; | |
3819 | ||
3820 | cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB); | |
3821 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
3822 | cmd->action = cpu_to_le32(MWL8K_STA_DB_DEL_ENTRY); | |
bbfd9128 | 3823 | memcpy(cmd->peer_addr, addr, ETH_ALEN); |
55489b6e | 3824 | |
a680400e | 3825 | rc = mwl8k_post_cmd(hw, &cmd->header); |
55489b6e LB |
3826 | kfree(cmd); |
3827 | ||
3828 | return rc; | |
3829 | } | |
3830 | ||
a66098da LB |
3831 | |
3832 | /* | |
3833 | * Interrupt handling. | |
3834 | */ | |
3835 | static irqreturn_t mwl8k_interrupt(int irq, void *dev_id) | |
3836 | { | |
3837 | struct ieee80211_hw *hw = dev_id; | |
3838 | struct mwl8k_priv *priv = hw->priv; | |
3839 | u32 status; | |
3840 | ||
3841 | status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS); | |
a66098da LB |
3842 | if (!status) |
3843 | return IRQ_NONE; | |
3844 | ||
1e9f9de3 LB |
3845 | if (status & MWL8K_A2H_INT_TX_DONE) { |
3846 | status &= ~MWL8K_A2H_INT_TX_DONE; | |
3847 | tasklet_schedule(&priv->poll_tx_task); | |
3848 | } | |
3849 | ||
a66098da | 3850 | if (status & MWL8K_A2H_INT_RX_READY) { |
67e2eb27 LB |
3851 | status &= ~MWL8K_A2H_INT_RX_READY; |
3852 | tasklet_schedule(&priv->poll_rx_task); | |
a66098da LB |
3853 | } |
3854 | ||
67e2eb27 LB |
3855 | if (status) |
3856 | iowrite32(~status, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS); | |
3857 | ||
a66098da | 3858 | if (status & MWL8K_A2H_INT_OPC_DONE) { |
618952a7 | 3859 | if (priv->hostcmd_wait != NULL) |
a66098da | 3860 | complete(priv->hostcmd_wait); |
a66098da LB |
3861 | } |
3862 | ||
3863 | if (status & MWL8K_A2H_INT_QUEUE_EMPTY) { | |
618952a7 | 3864 | if (!mutex_is_locked(&priv->fw_mutex) && |
88de754a | 3865 | priv->radio_on && priv->pending_tx_pkts) |
618952a7 | 3866 | mwl8k_tx_start(priv); |
a66098da LB |
3867 | } |
3868 | ||
3869 | return IRQ_HANDLED; | |
3870 | } | |
3871 | ||
1e9f9de3 LB |
3872 | static void mwl8k_tx_poll(unsigned long data) |
3873 | { | |
3874 | struct ieee80211_hw *hw = (struct ieee80211_hw *)data; | |
3875 | struct mwl8k_priv *priv = hw->priv; | |
3876 | int limit; | |
3877 | int i; | |
3878 | ||
3879 | limit = 32; | |
3880 | ||
3881 | spin_lock_bh(&priv->tx_lock); | |
3882 | ||
3883 | for (i = 0; i < MWL8K_TX_QUEUES; i++) | |
3884 | limit -= mwl8k_txq_reclaim(hw, i, limit, 0); | |
3885 | ||
3886 | if (!priv->pending_tx_pkts && priv->tx_wait != NULL) { | |
3887 | complete(priv->tx_wait); | |
3888 | priv->tx_wait = NULL; | |
3889 | } | |
3890 | ||
3891 | spin_unlock_bh(&priv->tx_lock); | |
3892 | ||
3893 | if (limit) { | |
3894 | writel(~MWL8K_A2H_INT_TX_DONE, | |
3895 | priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS); | |
3896 | } else { | |
3897 | tasklet_schedule(&priv->poll_tx_task); | |
3898 | } | |
3899 | } | |
3900 | ||
67e2eb27 LB |
3901 | static void mwl8k_rx_poll(unsigned long data) |
3902 | { | |
3903 | struct ieee80211_hw *hw = (struct ieee80211_hw *)data; | |
3904 | struct mwl8k_priv *priv = hw->priv; | |
3905 | int limit; | |
3906 | ||
3907 | limit = 32; | |
3908 | limit -= rxq_process(hw, 0, limit); | |
3909 | limit -= rxq_refill(hw, 0, limit); | |
3910 | ||
3911 | if (limit) { | |
3912 | writel(~MWL8K_A2H_INT_RX_READY, | |
3913 | priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS); | |
3914 | } else { | |
3915 | tasklet_schedule(&priv->poll_rx_task); | |
3916 | } | |
3917 | } | |
3918 | ||
a66098da LB |
3919 | |
3920 | /* | |
3921 | * Core driver operations. | |
3922 | */ | |
7bb45683 | 3923 | static void mwl8k_tx(struct ieee80211_hw *hw, struct sk_buff *skb) |
a66098da LB |
3924 | { |
3925 | struct mwl8k_priv *priv = hw->priv; | |
3926 | int index = skb_get_queue_mapping(skb); | |
a66098da | 3927 | |
9189c100 | 3928 | if (!priv->radio_on) { |
c96c31e4 JP |
3929 | wiphy_debug(hw->wiphy, |
3930 | "dropped TX frame since radio disabled\n"); | |
a66098da | 3931 | dev_kfree_skb(skb); |
7bb45683 | 3932 | return; |
a66098da LB |
3933 | } |
3934 | ||
7bb45683 | 3935 | mwl8k_txq_xmit(hw, index, skb); |
a66098da LB |
3936 | } |
3937 | ||
a66098da LB |
3938 | static int mwl8k_start(struct ieee80211_hw *hw) |
3939 | { | |
a66098da LB |
3940 | struct mwl8k_priv *priv = hw->priv; |
3941 | int rc; | |
3942 | ||
a0607fd3 | 3943 | rc = request_irq(priv->pdev->irq, mwl8k_interrupt, |
a66098da LB |
3944 | IRQF_SHARED, MWL8K_NAME, hw); |
3945 | if (rc) { | |
5db55844 | 3946 | wiphy_err(hw->wiphy, "failed to register IRQ handler\n"); |
2ec610cb | 3947 | return -EIO; |
a66098da LB |
3948 | } |
3949 | ||
67e2eb27 | 3950 | /* Enable TX reclaim and RX tasklets. */ |
1e9f9de3 | 3951 | tasklet_enable(&priv->poll_tx_task); |
67e2eb27 | 3952 | tasklet_enable(&priv->poll_rx_task); |
2ec610cb | 3953 | |
a66098da | 3954 | /* Enable interrupts */ |
c23b5a69 | 3955 | iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK); |
a66098da | 3956 | |
2ec610cb LB |
3957 | rc = mwl8k_fw_lock(hw); |
3958 | if (!rc) { | |
55489b6e | 3959 | rc = mwl8k_cmd_radio_enable(hw); |
a66098da | 3960 | |
5e4cf166 LB |
3961 | if (!priv->ap_fw) { |
3962 | if (!rc) | |
55489b6e | 3963 | rc = mwl8k_cmd_enable_sniffer(hw, 0); |
a66098da | 3964 | |
5e4cf166 LB |
3965 | if (!rc) |
3966 | rc = mwl8k_cmd_set_pre_scan(hw); | |
3967 | ||
3968 | if (!rc) | |
3969 | rc = mwl8k_cmd_set_post_scan(hw, | |
3970 | "\x00\x00\x00\x00\x00\x00"); | |
3971 | } | |
2ec610cb LB |
3972 | |
3973 | if (!rc) | |
55489b6e | 3974 | rc = mwl8k_cmd_set_rateadapt_mode(hw, 0); |
a66098da | 3975 | |
2ec610cb | 3976 | if (!rc) |
55489b6e | 3977 | rc = mwl8k_cmd_set_wmm_mode(hw, 0); |
a66098da | 3978 | |
2ec610cb LB |
3979 | mwl8k_fw_unlock(hw); |
3980 | } | |
3981 | ||
3982 | if (rc) { | |
3983 | iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK); | |
3984 | free_irq(priv->pdev->irq, hw); | |
1e9f9de3 | 3985 | tasklet_disable(&priv->poll_tx_task); |
67e2eb27 | 3986 | tasklet_disable(&priv->poll_rx_task); |
2ec610cb | 3987 | } |
a66098da LB |
3988 | |
3989 | return rc; | |
3990 | } | |
3991 | ||
a66098da LB |
3992 | static void mwl8k_stop(struct ieee80211_hw *hw) |
3993 | { | |
a66098da LB |
3994 | struct mwl8k_priv *priv = hw->priv; |
3995 | int i; | |
3996 | ||
55489b6e | 3997 | mwl8k_cmd_radio_disable(hw); |
a66098da LB |
3998 | |
3999 | ieee80211_stop_queues(hw); | |
4000 | ||
a66098da | 4001 | /* Disable interrupts */ |
a66098da | 4002 | iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK); |
a66098da LB |
4003 | free_irq(priv->pdev->irq, hw); |
4004 | ||
4005 | /* Stop finalize join worker */ | |
4006 | cancel_work_sync(&priv->finalize_join_worker); | |
4007 | if (priv->beacon_skb != NULL) | |
4008 | dev_kfree_skb(priv->beacon_skb); | |
4009 | ||
67e2eb27 | 4010 | /* Stop TX reclaim and RX tasklets. */ |
1e9f9de3 | 4011 | tasklet_disable(&priv->poll_tx_task); |
67e2eb27 | 4012 | tasklet_disable(&priv->poll_rx_task); |
a66098da | 4013 | |
a66098da LB |
4014 | /* Return all skbs to mac80211 */ |
4015 | for (i = 0; i < MWL8K_TX_QUEUES; i++) | |
efb7c49a | 4016 | mwl8k_txq_reclaim(hw, i, INT_MAX, 1); |
a66098da LB |
4017 | } |
4018 | ||
0863ade8 BC |
4019 | static int mwl8k_reload_firmware(struct ieee80211_hw *hw, char *fw_image); |
4020 | ||
a66098da | 4021 | static int mwl8k_add_interface(struct ieee80211_hw *hw, |
f5bb87cf | 4022 | struct ieee80211_vif *vif) |
a66098da LB |
4023 | { |
4024 | struct mwl8k_priv *priv = hw->priv; | |
4025 | struct mwl8k_vif *mwl8k_vif; | |
ee0ddf18 | 4026 | u32 macids_supported; |
0863ade8 BC |
4027 | int macid, rc; |
4028 | struct mwl8k_device_info *di; | |
a66098da | 4029 | |
a43c49a8 LB |
4030 | /* |
4031 | * Reject interface creation if sniffer mode is active, as | |
4032 | * STA operation is mutually exclusive with hardware sniffer | |
b64fe619 | 4033 | * mode. (Sniffer mode is only used on STA firmware.) |
a43c49a8 LB |
4034 | */ |
4035 | if (priv->sniffer_enabled) { | |
c96c31e4 JP |
4036 | wiphy_info(hw->wiphy, |
4037 | "unable to create STA interface because sniffer mode is enabled\n"); | |
a43c49a8 LB |
4038 | return -EINVAL; |
4039 | } | |
4040 | ||
0863ade8 | 4041 | di = priv->device_info; |
ee0ddf18 LB |
4042 | switch (vif->type) { |
4043 | case NL80211_IFTYPE_AP: | |
0863ade8 BC |
4044 | if (!priv->ap_fw && di->fw_image_ap) { |
4045 | /* we must load the ap fw to meet this request */ | |
4046 | if (!list_empty(&priv->vif_list)) | |
4047 | return -EBUSY; | |
4048 | rc = mwl8k_reload_firmware(hw, di->fw_image_ap); | |
4049 | if (rc) | |
4050 | return rc; | |
4051 | } | |
ee0ddf18 LB |
4052 | macids_supported = priv->ap_macids_supported; |
4053 | break; | |
4054 | case NL80211_IFTYPE_STATION: | |
0863ade8 BC |
4055 | if (priv->ap_fw && di->fw_image_sta) { |
4056 | /* we must load the sta fw to meet this request */ | |
4057 | if (!list_empty(&priv->vif_list)) | |
4058 | return -EBUSY; | |
4059 | rc = mwl8k_reload_firmware(hw, di->fw_image_sta); | |
4060 | if (rc) | |
4061 | return rc; | |
4062 | } | |
ee0ddf18 LB |
4063 | macids_supported = priv->sta_macids_supported; |
4064 | break; | |
4065 | default: | |
4066 | return -EINVAL; | |
4067 | } | |
4068 | ||
4069 | macid = ffs(macids_supported & ~priv->macids_used); | |
4070 | if (!macid--) | |
4071 | return -EBUSY; | |
4072 | ||
f5bb87cf | 4073 | /* Setup driver private area. */ |
1ed32e4f | 4074 | mwl8k_vif = MWL8K_VIF(vif); |
a66098da | 4075 | memset(mwl8k_vif, 0, sizeof(*mwl8k_vif)); |
f5bb87cf | 4076 | mwl8k_vif->vif = vif; |
ee0ddf18 | 4077 | mwl8k_vif->macid = macid; |
a66098da | 4078 | mwl8k_vif->seqno = 0; |
d9a07d49 NS |
4079 | memcpy(mwl8k_vif->bssid, vif->addr, ETH_ALEN); |
4080 | mwl8k_vif->is_hw_crypto_enabled = false; | |
a66098da | 4081 | |
aa21d0f6 LB |
4082 | /* Set the mac address. */ |
4083 | mwl8k_cmd_set_mac_addr(hw, vif, vif->addr); | |
4084 | ||
4085 | if (priv->ap_fw) | |
4086 | mwl8k_cmd_set_new_stn_add_self(hw, vif); | |
4087 | ||
ee0ddf18 | 4088 | priv->macids_used |= 1 << mwl8k_vif->macid; |
f5bb87cf | 4089 | list_add_tail(&mwl8k_vif->list, &priv->vif_list); |
a66098da LB |
4090 | |
4091 | return 0; | |
4092 | } | |
4093 | ||
4094 | static void mwl8k_remove_interface(struct ieee80211_hw *hw, | |
1ed32e4f | 4095 | struct ieee80211_vif *vif) |
a66098da LB |
4096 | { |
4097 | struct mwl8k_priv *priv = hw->priv; | |
f5bb87cf | 4098 | struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif); |
a66098da | 4099 | |
b64fe619 LB |
4100 | if (priv->ap_fw) |
4101 | mwl8k_cmd_set_new_stn_del(hw, vif, vif->addr); | |
4102 | ||
aa21d0f6 | 4103 | mwl8k_cmd_set_mac_addr(hw, vif, "\x00\x00\x00\x00\x00\x00"); |
32060e1b | 4104 | |
ee0ddf18 | 4105 | priv->macids_used &= ~(1 << mwl8k_vif->macid); |
f5bb87cf | 4106 | list_del(&mwl8k_vif->list); |
a66098da LB |
4107 | } |
4108 | ||
ee03a932 | 4109 | static int mwl8k_config(struct ieee80211_hw *hw, u32 changed) |
a66098da | 4110 | { |
a66098da LB |
4111 | struct ieee80211_conf *conf = &hw->conf; |
4112 | struct mwl8k_priv *priv = hw->priv; | |
ee03a932 | 4113 | int rc; |
a66098da | 4114 | |
7595d67a | 4115 | if (conf->flags & IEEE80211_CONF_IDLE) { |
55489b6e | 4116 | mwl8k_cmd_radio_disable(hw); |
ee03a932 | 4117 | return 0; |
7595d67a LB |
4118 | } |
4119 | ||
ee03a932 LB |
4120 | rc = mwl8k_fw_lock(hw); |
4121 | if (rc) | |
4122 | return rc; | |
a66098da | 4123 | |
55489b6e | 4124 | rc = mwl8k_cmd_radio_enable(hw); |
ee03a932 LB |
4125 | if (rc) |
4126 | goto out; | |
a66098da | 4127 | |
610677d2 | 4128 | rc = mwl8k_cmd_set_rf_channel(hw, conf); |
ee03a932 LB |
4129 | if (rc) |
4130 | goto out; | |
4131 | ||
a66098da LB |
4132 | if (conf->power_level > 18) |
4133 | conf->power_level = 18; | |
a66098da | 4134 | |
08b06347 | 4135 | if (priv->ap_fw) { |
41fdf097 NS |
4136 | rc = mwl8k_cmd_tx_power(hw, conf, conf->power_level); |
4137 | if (rc) | |
4138 | goto out; | |
4139 | ||
da62b761 NS |
4140 | rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_RX, 0x3); |
4141 | if (rc) | |
4142 | wiphy_warn(hw->wiphy, "failed to set # of RX antennas"); | |
4143 | rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_TX, 0x7); | |
4144 | if (rc) | |
4145 | wiphy_warn(hw->wiphy, "failed to set # of TX antennas"); | |
4146 | ||
08b06347 | 4147 | } else { |
41fdf097 NS |
4148 | rc = mwl8k_cmd_rf_tx_power(hw, conf->power_level); |
4149 | if (rc) | |
4150 | goto out; | |
08b06347 LB |
4151 | rc = mwl8k_cmd_mimo_config(hw, 0x7, 0x7); |
4152 | } | |
a66098da | 4153 | |
ee03a932 LB |
4154 | out: |
4155 | mwl8k_fw_unlock(hw); | |
a66098da | 4156 | |
ee03a932 | 4157 | return rc; |
a66098da LB |
4158 | } |
4159 | ||
b64fe619 LB |
4160 | static void |
4161 | mwl8k_bss_info_changed_sta(struct ieee80211_hw *hw, struct ieee80211_vif *vif, | |
4162 | struct ieee80211_bss_conf *info, u32 changed) | |
a66098da | 4163 | { |
a66098da | 4164 | struct mwl8k_priv *priv = hw->priv; |
c3cbbe8a | 4165 | u32 ap_legacy_rates; |
13935e2c | 4166 | u8 ap_mcs_rates[16]; |
3a980d0a LB |
4167 | int rc; |
4168 | ||
c3cbbe8a | 4169 | if (mwl8k_fw_lock(hw)) |
3a980d0a | 4170 | return; |
a66098da | 4171 | |
c3cbbe8a LB |
4172 | /* |
4173 | * No need to capture a beacon if we're no longer associated. | |
4174 | */ | |
4175 | if ((changed & BSS_CHANGED_ASSOC) && !vif->bss_conf.assoc) | |
4176 | priv->capture_beacon = false; | |
3a980d0a | 4177 | |
c3cbbe8a | 4178 | /* |
13935e2c | 4179 | * Get the AP's legacy and MCS rates. |
c3cbbe8a | 4180 | */ |
7dc6a7a7 | 4181 | if (vif->bss_conf.assoc) { |
c6e96010 | 4182 | struct ieee80211_sta *ap; |
c97470dd | 4183 | |
c6e96010 | 4184 | rcu_read_lock(); |
c6e96010 | 4185 | |
c3cbbe8a LB |
4186 | ap = ieee80211_find_sta(vif, vif->bss_conf.bssid); |
4187 | if (ap == NULL) { | |
4188 | rcu_read_unlock(); | |
c6e96010 | 4189 | goto out; |
c3cbbe8a LB |
4190 | } |
4191 | ||
8707d026 LB |
4192 | if (hw->conf.channel->band == IEEE80211_BAND_2GHZ) { |
4193 | ap_legacy_rates = ap->supp_rates[IEEE80211_BAND_2GHZ]; | |
4194 | } else { | |
4195 | ap_legacy_rates = | |
4196 | ap->supp_rates[IEEE80211_BAND_5GHZ] << 5; | |
4197 | } | |
13935e2c | 4198 | memcpy(ap_mcs_rates, ap->ht_cap.mcs.rx_mask, 16); |
c3cbbe8a LB |
4199 | |
4200 | rcu_read_unlock(); | |
4201 | } | |
c6e96010 | 4202 | |
c3cbbe8a | 4203 | if ((changed & BSS_CHANGED_ASSOC) && vif->bss_conf.assoc) { |
13935e2c | 4204 | rc = mwl8k_cmd_set_rate(hw, vif, ap_legacy_rates, ap_mcs_rates); |
3a980d0a LB |
4205 | if (rc) |
4206 | goto out; | |
a66098da | 4207 | |
b71ed2c6 | 4208 | rc = mwl8k_cmd_use_fixed_rate_sta(hw); |
3a980d0a LB |
4209 | if (rc) |
4210 | goto out; | |
c3cbbe8a | 4211 | } |
a66098da | 4212 | |
c3cbbe8a | 4213 | if (changed & BSS_CHANGED_ERP_PREAMBLE) { |
7dc6a7a7 LB |
4214 | rc = mwl8k_set_radio_preamble(hw, |
4215 | vif->bss_conf.use_short_preamble); | |
3a980d0a LB |
4216 | if (rc) |
4217 | goto out; | |
c3cbbe8a | 4218 | } |
a66098da | 4219 | |
c3cbbe8a | 4220 | if (changed & BSS_CHANGED_ERP_SLOT) { |
7dc6a7a7 | 4221 | rc = mwl8k_cmd_set_slot(hw, vif->bss_conf.use_short_slot); |
3a980d0a LB |
4222 | if (rc) |
4223 | goto out; | |
c3cbbe8a | 4224 | } |
a66098da | 4225 | |
c97470dd LB |
4226 | if (vif->bss_conf.assoc && |
4227 | (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_ERP_CTS_PROT | | |
4228 | BSS_CHANGED_HT))) { | |
c3cbbe8a | 4229 | rc = mwl8k_cmd_set_aid(hw, vif, ap_legacy_rates); |
3a980d0a LB |
4230 | if (rc) |
4231 | goto out; | |
c3cbbe8a | 4232 | } |
a66098da | 4233 | |
c3cbbe8a LB |
4234 | if (vif->bss_conf.assoc && |
4235 | (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_BEACON_INT))) { | |
a66098da LB |
4236 | /* |
4237 | * Finalize the join. Tell rx handler to process | |
4238 | * next beacon from our BSSID. | |
4239 | */ | |
0a11dfc3 | 4240 | memcpy(priv->capture_bssid, vif->bss_conf.bssid, ETH_ALEN); |
a66098da | 4241 | priv->capture_beacon = true; |
a66098da LB |
4242 | } |
4243 | ||
3a980d0a LB |
4244 | out: |
4245 | mwl8k_fw_unlock(hw); | |
a66098da LB |
4246 | } |
4247 | ||
b64fe619 LB |
4248 | static void |
4249 | mwl8k_bss_info_changed_ap(struct ieee80211_hw *hw, struct ieee80211_vif *vif, | |
4250 | struct ieee80211_bss_conf *info, u32 changed) | |
4251 | { | |
4252 | int rc; | |
4253 | ||
4254 | if (mwl8k_fw_lock(hw)) | |
4255 | return; | |
4256 | ||
4257 | if (changed & BSS_CHANGED_ERP_PREAMBLE) { | |
4258 | rc = mwl8k_set_radio_preamble(hw, | |
4259 | vif->bss_conf.use_short_preamble); | |
4260 | if (rc) | |
4261 | goto out; | |
4262 | } | |
4263 | ||
4264 | if (changed & BSS_CHANGED_BASIC_RATES) { | |
4265 | int idx; | |
4266 | int rate; | |
4267 | ||
4268 | /* | |
4269 | * Use lowest supported basic rate for multicasts | |
4270 | * and management frames (such as probe responses -- | |
4271 | * beacons will always go out at 1 Mb/s). | |
4272 | */ | |
4273 | idx = ffs(vif->bss_conf.basic_rates); | |
8707d026 LB |
4274 | if (idx) |
4275 | idx--; | |
4276 | ||
4277 | if (hw->conf.channel->band == IEEE80211_BAND_2GHZ) | |
4278 | rate = mwl8k_rates_24[idx].hw_value; | |
4279 | else | |
4280 | rate = mwl8k_rates_50[idx].hw_value; | |
b64fe619 LB |
4281 | |
4282 | mwl8k_cmd_use_fixed_rate_ap(hw, rate, rate); | |
4283 | } | |
4284 | ||
4285 | if (changed & (BSS_CHANGED_BEACON_INT | BSS_CHANGED_BEACON)) { | |
4286 | struct sk_buff *skb; | |
4287 | ||
4288 | skb = ieee80211_beacon_get(hw, vif); | |
4289 | if (skb != NULL) { | |
aa21d0f6 | 4290 | mwl8k_cmd_set_beacon(hw, vif, skb->data, skb->len); |
b64fe619 LB |
4291 | kfree_skb(skb); |
4292 | } | |
4293 | } | |
4294 | ||
4295 | if (changed & BSS_CHANGED_BEACON_ENABLED) | |
aa21d0f6 | 4296 | mwl8k_cmd_bss_start(hw, vif, info->enable_beacon); |
b64fe619 LB |
4297 | |
4298 | out: | |
4299 | mwl8k_fw_unlock(hw); | |
4300 | } | |
4301 | ||
4302 | static void | |
4303 | mwl8k_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif, | |
4304 | struct ieee80211_bss_conf *info, u32 changed) | |
4305 | { | |
4306 | struct mwl8k_priv *priv = hw->priv; | |
4307 | ||
4308 | if (!priv->ap_fw) | |
4309 | mwl8k_bss_info_changed_sta(hw, vif, info, changed); | |
4310 | else | |
4311 | mwl8k_bss_info_changed_ap(hw, vif, info, changed); | |
4312 | } | |
4313 | ||
e81cd2d6 | 4314 | static u64 mwl8k_prepare_multicast(struct ieee80211_hw *hw, |
22bedad3 | 4315 | struct netdev_hw_addr_list *mc_list) |
e81cd2d6 LB |
4316 | { |
4317 | struct mwl8k_cmd_pkt *cmd; | |
4318 | ||
447ced07 LB |
4319 | /* |
4320 | * Synthesize and return a command packet that programs the | |
4321 | * hardware multicast address filter. At this point we don't | |
4322 | * know whether FIF_ALLMULTI is being requested, but if it is, | |
4323 | * we'll end up throwing this packet away and creating a new | |
4324 | * one in mwl8k_configure_filter(). | |
4325 | */ | |
22bedad3 | 4326 | cmd = __mwl8k_cmd_mac_multicast_adr(hw, 0, mc_list); |
e81cd2d6 LB |
4327 | |
4328 | return (unsigned long)cmd; | |
4329 | } | |
4330 | ||
a43c49a8 LB |
4331 | static int |
4332 | mwl8k_configure_filter_sniffer(struct ieee80211_hw *hw, | |
4333 | unsigned int changed_flags, | |
4334 | unsigned int *total_flags) | |
4335 | { | |
4336 | struct mwl8k_priv *priv = hw->priv; | |
4337 | ||
4338 | /* | |
4339 | * Hardware sniffer mode is mutually exclusive with STA | |
4340 | * operation, so refuse to enable sniffer mode if a STA | |
4341 | * interface is active. | |
4342 | */ | |
f5bb87cf | 4343 | if (!list_empty(&priv->vif_list)) { |
a43c49a8 | 4344 | if (net_ratelimit()) |
c96c31e4 JP |
4345 | wiphy_info(hw->wiphy, |
4346 | "not enabling sniffer mode because STA interface is active\n"); | |
a43c49a8 LB |
4347 | return 0; |
4348 | } | |
4349 | ||
4350 | if (!priv->sniffer_enabled) { | |
55489b6e | 4351 | if (mwl8k_cmd_enable_sniffer(hw, 1)) |
a43c49a8 LB |
4352 | return 0; |
4353 | priv->sniffer_enabled = true; | |
4354 | } | |
4355 | ||
4356 | *total_flags &= FIF_PROMISC_IN_BSS | FIF_ALLMULTI | | |
4357 | FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL | | |
4358 | FIF_OTHER_BSS; | |
4359 | ||
4360 | return 1; | |
4361 | } | |
4362 | ||
f5bb87cf LB |
4363 | static struct mwl8k_vif *mwl8k_first_vif(struct mwl8k_priv *priv) |
4364 | { | |
4365 | if (!list_empty(&priv->vif_list)) | |
4366 | return list_entry(priv->vif_list.next, struct mwl8k_vif, list); | |
4367 | ||
4368 | return NULL; | |
4369 | } | |
4370 | ||
e6935ea1 LB |
4371 | static void mwl8k_configure_filter(struct ieee80211_hw *hw, |
4372 | unsigned int changed_flags, | |
4373 | unsigned int *total_flags, | |
4374 | u64 multicast) | |
4375 | { | |
4376 | struct mwl8k_priv *priv = hw->priv; | |
a43c49a8 LB |
4377 | struct mwl8k_cmd_pkt *cmd = (void *)(unsigned long)multicast; |
4378 | ||
c0adae2c LB |
4379 | /* |
4380 | * AP firmware doesn't allow fine-grained control over | |
4381 | * the receive filter. | |
4382 | */ | |
4383 | if (priv->ap_fw) { | |
4384 | *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC; | |
4385 | kfree(cmd); | |
4386 | return; | |
4387 | } | |
4388 | ||
a43c49a8 LB |
4389 | /* |
4390 | * Enable hardware sniffer mode if FIF_CONTROL or | |
4391 | * FIF_OTHER_BSS is requested. | |
4392 | */ | |
4393 | if (*total_flags & (FIF_CONTROL | FIF_OTHER_BSS) && | |
4394 | mwl8k_configure_filter_sniffer(hw, changed_flags, total_flags)) { | |
4395 | kfree(cmd); | |
4396 | return; | |
4397 | } | |
a66098da | 4398 | |
e6935ea1 | 4399 | /* Clear unsupported feature flags */ |
447ced07 | 4400 | *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC; |
a66098da | 4401 | |
90852f7a LB |
4402 | if (mwl8k_fw_lock(hw)) { |
4403 | kfree(cmd); | |
e6935ea1 | 4404 | return; |
90852f7a | 4405 | } |
a66098da | 4406 | |
a43c49a8 | 4407 | if (priv->sniffer_enabled) { |
55489b6e | 4408 | mwl8k_cmd_enable_sniffer(hw, 0); |
a43c49a8 LB |
4409 | priv->sniffer_enabled = false; |
4410 | } | |
4411 | ||
e6935ea1 | 4412 | if (changed_flags & FIF_BCN_PRBRESP_PROMISC) { |
77165d88 LB |
4413 | if (*total_flags & FIF_BCN_PRBRESP_PROMISC) { |
4414 | /* | |
4415 | * Disable the BSS filter. | |
4416 | */ | |
e6935ea1 | 4417 | mwl8k_cmd_set_pre_scan(hw); |
77165d88 | 4418 | } else { |
f5bb87cf | 4419 | struct mwl8k_vif *mwl8k_vif; |
0a11dfc3 | 4420 | const u8 *bssid; |
a94cc97e | 4421 | |
77165d88 LB |
4422 | /* |
4423 | * Enable the BSS filter. | |
4424 | * | |
4425 | * If there is an active STA interface, use that | |
4426 | * interface's BSSID, otherwise use a dummy one | |
4427 | * (where the OUI part needs to be nonzero for | |
4428 | * the BSSID to be accepted by POST_SCAN). | |
4429 | */ | |
f5bb87cf LB |
4430 | mwl8k_vif = mwl8k_first_vif(priv); |
4431 | if (mwl8k_vif != NULL) | |
4432 | bssid = mwl8k_vif->vif->bss_conf.bssid; | |
4433 | else | |
4434 | bssid = "\x01\x00\x00\x00\x00\x00"; | |
a94cc97e | 4435 | |
e6935ea1 | 4436 | mwl8k_cmd_set_post_scan(hw, bssid); |
a66098da LB |
4437 | } |
4438 | } | |
4439 | ||
447ced07 LB |
4440 | /* |
4441 | * If FIF_ALLMULTI is being requested, throw away the command | |
4442 | * packet that ->prepare_multicast() built and replace it with | |
4443 | * a command packet that enables reception of all multicast | |
4444 | * packets. | |
4445 | */ | |
4446 | if (*total_flags & FIF_ALLMULTI) { | |
4447 | kfree(cmd); | |
22bedad3 | 4448 | cmd = __mwl8k_cmd_mac_multicast_adr(hw, 1, NULL); |
447ced07 LB |
4449 | } |
4450 | ||
4451 | if (cmd != NULL) { | |
4452 | mwl8k_post_cmd(hw, cmd); | |
4453 | kfree(cmd); | |
e6935ea1 | 4454 | } |
a66098da | 4455 | |
e6935ea1 | 4456 | mwl8k_fw_unlock(hw); |
a66098da LB |
4457 | } |
4458 | ||
a66098da LB |
4459 | static int mwl8k_set_rts_threshold(struct ieee80211_hw *hw, u32 value) |
4460 | { | |
c2c2b12a | 4461 | return mwl8k_cmd_set_rts_threshold(hw, value); |
a66098da LB |
4462 | } |
4463 | ||
4a6967b8 JB |
4464 | static int mwl8k_sta_remove(struct ieee80211_hw *hw, |
4465 | struct ieee80211_vif *vif, | |
4466 | struct ieee80211_sta *sta) | |
3f5610ff LB |
4467 | { |
4468 | struct mwl8k_priv *priv = hw->priv; | |
4469 | ||
4a6967b8 JB |
4470 | if (priv->ap_fw) |
4471 | return mwl8k_cmd_set_new_stn_del(hw, vif, sta->addr); | |
4472 | else | |
4473 | return mwl8k_cmd_update_stadb_del(hw, vif, sta->addr); | |
bbfd9128 LB |
4474 | } |
4475 | ||
4a6967b8 JB |
4476 | static int mwl8k_sta_add(struct ieee80211_hw *hw, |
4477 | struct ieee80211_vif *vif, | |
4478 | struct ieee80211_sta *sta) | |
bbfd9128 LB |
4479 | { |
4480 | struct mwl8k_priv *priv = hw->priv; | |
4a6967b8 | 4481 | int ret; |
fcdc403c NS |
4482 | int i; |
4483 | struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif); | |
4484 | struct ieee80211_key_conf *key; | |
bbfd9128 | 4485 | |
4a6967b8 JB |
4486 | if (!priv->ap_fw) { |
4487 | ret = mwl8k_cmd_update_stadb_add(hw, vif, sta); | |
4488 | if (ret >= 0) { | |
4489 | MWL8K_STA(sta)->peer_id = ret; | |
fcdc403c | 4490 | ret = 0; |
4a6967b8 | 4491 | } |
bbfd9128 | 4492 | |
d9a07d49 NS |
4493 | } else { |
4494 | ret = mwl8k_cmd_set_new_stn_add(hw, vif, sta); | |
bbfd9128 | 4495 | } |
4a6967b8 | 4496 | |
d9a07d49 NS |
4497 | for (i = 0; i < NUM_WEP_KEYS; i++) { |
4498 | key = IEEE80211_KEY_CONF(mwl8k_vif->wep_key_conf[i].key); | |
4499 | if (mwl8k_vif->wep_key_conf[i].enabled) | |
4500 | mwl8k_set_key(hw, SET_KEY, vif, sta, key); | |
4501 | } | |
fcdc403c | 4502 | return ret; |
bbfd9128 LB |
4503 | } |
4504 | ||
a66098da LB |
4505 | static int mwl8k_conf_tx(struct ieee80211_hw *hw, u16 queue, |
4506 | const struct ieee80211_tx_queue_params *params) | |
4507 | { | |
3e4f542c | 4508 | struct mwl8k_priv *priv = hw->priv; |
a66098da | 4509 | int rc; |
a66098da | 4510 | |
3e4f542c LB |
4511 | rc = mwl8k_fw_lock(hw); |
4512 | if (!rc) { | |
0863ade8 BC |
4513 | BUG_ON(queue > MWL8K_TX_QUEUES - 1); |
4514 | memcpy(&priv->wmm_params[queue], params, sizeof(*params)); | |
4515 | ||
3e4f542c | 4516 | if (!priv->wmm_enabled) |
55489b6e | 4517 | rc = mwl8k_cmd_set_wmm_mode(hw, 1); |
a66098da | 4518 | |
85c9205c NS |
4519 | if (!rc) { |
4520 | int q = MWL8K_TX_QUEUES - 1 - queue; | |
4521 | rc = mwl8k_cmd_set_edca_params(hw, q, | |
55489b6e LB |
4522 | params->cw_min, |
4523 | params->cw_max, | |
4524 | params->aifs, | |
4525 | params->txop); | |
85c9205c | 4526 | } |
3e4f542c LB |
4527 | |
4528 | mwl8k_fw_unlock(hw); | |
a66098da | 4529 | } |
3e4f542c | 4530 | |
a66098da LB |
4531 | return rc; |
4532 | } | |
4533 | ||
a66098da LB |
4534 | static int mwl8k_get_stats(struct ieee80211_hw *hw, |
4535 | struct ieee80211_low_level_stats *stats) | |
4536 | { | |
55489b6e | 4537 | return mwl8k_cmd_get_stat(hw, stats); |
a66098da LB |
4538 | } |
4539 | ||
0d462bbb JL |
4540 | static int mwl8k_get_survey(struct ieee80211_hw *hw, int idx, |
4541 | struct survey_info *survey) | |
4542 | { | |
4543 | struct mwl8k_priv *priv = hw->priv; | |
4544 | struct ieee80211_conf *conf = &hw->conf; | |
4545 | ||
4546 | if (idx != 0) | |
4547 | return -ENOENT; | |
4548 | ||
4549 | survey->channel = conf->channel; | |
4550 | survey->filled = SURVEY_INFO_NOISE_DBM; | |
4551 | survey->noise = priv->noise; | |
4552 | ||
4553 | return 0; | |
4554 | } | |
4555 | ||
a2292d83 LB |
4556 | static int |
4557 | mwl8k_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif, | |
4558 | enum ieee80211_ampdu_mlme_action action, | |
0b01f030 JB |
4559 | struct ieee80211_sta *sta, u16 tid, u16 *ssn, |
4560 | u8 buf_size) | |
a2292d83 LB |
4561 | { |
4562 | switch (action) { | |
4563 | case IEEE80211_AMPDU_RX_START: | |
4564 | case IEEE80211_AMPDU_RX_STOP: | |
4565 | if (!(hw->flags & IEEE80211_HW_AMPDU_AGGREGATION)) | |
4566 | return -ENOTSUPP; | |
4567 | return 0; | |
4568 | default: | |
4569 | return -ENOTSUPP; | |
4570 | } | |
4571 | } | |
4572 | ||
a66098da LB |
4573 | static const struct ieee80211_ops mwl8k_ops = { |
4574 | .tx = mwl8k_tx, | |
4575 | .start = mwl8k_start, | |
4576 | .stop = mwl8k_stop, | |
4577 | .add_interface = mwl8k_add_interface, | |
4578 | .remove_interface = mwl8k_remove_interface, | |
4579 | .config = mwl8k_config, | |
a66098da | 4580 | .bss_info_changed = mwl8k_bss_info_changed, |
3ac64bee | 4581 | .prepare_multicast = mwl8k_prepare_multicast, |
a66098da | 4582 | .configure_filter = mwl8k_configure_filter, |
fcdc403c | 4583 | .set_key = mwl8k_set_key, |
a66098da | 4584 | .set_rts_threshold = mwl8k_set_rts_threshold, |
4a6967b8 JB |
4585 | .sta_add = mwl8k_sta_add, |
4586 | .sta_remove = mwl8k_sta_remove, | |
a66098da | 4587 | .conf_tx = mwl8k_conf_tx, |
a66098da | 4588 | .get_stats = mwl8k_get_stats, |
0d462bbb | 4589 | .get_survey = mwl8k_get_survey, |
a2292d83 | 4590 | .ampdu_action = mwl8k_ampdu_action, |
a66098da LB |
4591 | }; |
4592 | ||
a66098da LB |
4593 | static void mwl8k_finalize_join_worker(struct work_struct *work) |
4594 | { | |
4595 | struct mwl8k_priv *priv = | |
4596 | container_of(work, struct mwl8k_priv, finalize_join_worker); | |
4597 | struct sk_buff *skb = priv->beacon_skb; | |
56007a02 JB |
4598 | struct ieee80211_mgmt *mgmt = (void *)skb->data; |
4599 | int len = skb->len - offsetof(struct ieee80211_mgmt, u.beacon.variable); | |
4600 | const u8 *tim = cfg80211_find_ie(WLAN_EID_TIM, | |
4601 | mgmt->u.beacon.variable, len); | |
4602 | int dtim_period = 1; | |
4603 | ||
4604 | if (tim && tim[1] >= 2) | |
4605 | dtim_period = tim[3]; | |
a66098da | 4606 | |
56007a02 | 4607 | mwl8k_cmd_finalize_join(priv->hw, skb->data, skb->len, dtim_period); |
a66098da | 4608 | |
f5bb87cf | 4609 | dev_kfree_skb(skb); |
a66098da LB |
4610 | priv->beacon_skb = NULL; |
4611 | } | |
4612 | ||
bcb628d5 | 4613 | enum { |
9e1b17ea LB |
4614 | MWL8363 = 0, |
4615 | MWL8687, | |
bcb628d5 | 4616 | MWL8366, |
6f6d1e9a LB |
4617 | }; |
4618 | ||
8a7a578c | 4619 | #define MWL8K_8366_AP_FW_API 2 |
952a0e96 BC |
4620 | #define _MWL8K_8366_AP_FW(api) "mwl8k/fmimage_8366_ap-" #api ".fw" |
4621 | #define MWL8K_8366_AP_FW(api) _MWL8K_8366_AP_FW(api) | |
4622 | ||
bcb628d5 | 4623 | static struct mwl8k_device_info mwl8k_info_tbl[] __devinitdata = { |
9e1b17ea LB |
4624 | [MWL8363] = { |
4625 | .part_name = "88w8363", | |
4626 | .helper_image = "mwl8k/helper_8363.fw", | |
0863ade8 | 4627 | .fw_image_sta = "mwl8k/fmimage_8363.fw", |
9e1b17ea | 4628 | }, |
49eb691c | 4629 | [MWL8687] = { |
bcb628d5 JL |
4630 | .part_name = "88w8687", |
4631 | .helper_image = "mwl8k/helper_8687.fw", | |
0863ade8 | 4632 | .fw_image_sta = "mwl8k/fmimage_8687.fw", |
bcb628d5 | 4633 | }, |
49eb691c | 4634 | [MWL8366] = { |
bcb628d5 JL |
4635 | .part_name = "88w8366", |
4636 | .helper_image = "mwl8k/helper_8366.fw", | |
0863ade8 | 4637 | .fw_image_sta = "mwl8k/fmimage_8366.fw", |
952a0e96 BC |
4638 | .fw_image_ap = MWL8K_8366_AP_FW(MWL8K_8366_AP_FW_API), |
4639 | .fw_api_ap = MWL8K_8366_AP_FW_API, | |
89a91f4f | 4640 | .ap_rxd_ops = &rxd_8366_ap_ops, |
bcb628d5 | 4641 | }, |
45a390dd LB |
4642 | }; |
4643 | ||
c92d4ede LB |
4644 | MODULE_FIRMWARE("mwl8k/helper_8363.fw"); |
4645 | MODULE_FIRMWARE("mwl8k/fmimage_8363.fw"); | |
4646 | MODULE_FIRMWARE("mwl8k/helper_8687.fw"); | |
4647 | MODULE_FIRMWARE("mwl8k/fmimage_8687.fw"); | |
4648 | MODULE_FIRMWARE("mwl8k/helper_8366.fw"); | |
4649 | MODULE_FIRMWARE("mwl8k/fmimage_8366.fw"); | |
952a0e96 | 4650 | MODULE_FIRMWARE(MWL8K_8366_AP_FW(MWL8K_8366_AP_FW_API)); |
c92d4ede | 4651 | |
45a390dd | 4652 | static DEFINE_PCI_DEVICE_TABLE(mwl8k_pci_id_table) = { |
e5868ba1 | 4653 | { PCI_VDEVICE(MARVELL, 0x2a0a), .driver_data = MWL8363, }, |
9e1b17ea LB |
4654 | { PCI_VDEVICE(MARVELL, 0x2a0c), .driver_data = MWL8363, }, |
4655 | { PCI_VDEVICE(MARVELL, 0x2a24), .driver_data = MWL8363, }, | |
bcb628d5 JL |
4656 | { PCI_VDEVICE(MARVELL, 0x2a2b), .driver_data = MWL8687, }, |
4657 | { PCI_VDEVICE(MARVELL, 0x2a30), .driver_data = MWL8687, }, | |
4658 | { PCI_VDEVICE(MARVELL, 0x2a40), .driver_data = MWL8366, }, | |
ca66527c | 4659 | { PCI_VDEVICE(MARVELL, 0x2a43), .driver_data = MWL8366, }, |
bcb628d5 | 4660 | { }, |
45a390dd LB |
4661 | }; |
4662 | MODULE_DEVICE_TABLE(pci, mwl8k_pci_id_table); | |
4663 | ||
99020471 BC |
4664 | static int mwl8k_request_alt_fw(struct mwl8k_priv *priv) |
4665 | { | |
4666 | int rc; | |
4667 | printk(KERN_ERR "%s: Error requesting preferred fw %s.\n" | |
4668 | "Trying alternative firmware %s\n", pci_name(priv->pdev), | |
4669 | priv->fw_pref, priv->fw_alt); | |
4670 | rc = mwl8k_request_fw(priv, priv->fw_alt, &priv->fw_ucode, true); | |
4671 | if (rc) { | |
4672 | printk(KERN_ERR "%s: Error requesting alt fw %s\n", | |
4673 | pci_name(priv->pdev), priv->fw_alt); | |
4674 | return rc; | |
4675 | } | |
4676 | return 0; | |
4677 | } | |
4678 | ||
4679 | static int mwl8k_firmware_load_success(struct mwl8k_priv *priv); | |
4680 | static void mwl8k_fw_state_machine(const struct firmware *fw, void *context) | |
4681 | { | |
4682 | struct mwl8k_priv *priv = context; | |
4683 | struct mwl8k_device_info *di = priv->device_info; | |
4684 | int rc; | |
4685 | ||
4686 | switch (priv->fw_state) { | |
4687 | case FW_STATE_INIT: | |
4688 | if (!fw) { | |
4689 | printk(KERN_ERR "%s: Error requesting helper fw %s\n", | |
4690 | pci_name(priv->pdev), di->helper_image); | |
4691 | goto fail; | |
4692 | } | |
4693 | priv->fw_helper = fw; | |
4694 | rc = mwl8k_request_fw(priv, priv->fw_pref, &priv->fw_ucode, | |
4695 | true); | |
4696 | if (rc && priv->fw_alt) { | |
4697 | rc = mwl8k_request_alt_fw(priv); | |
4698 | if (rc) | |
4699 | goto fail; | |
4700 | priv->fw_state = FW_STATE_LOADING_ALT; | |
4701 | } else if (rc) | |
4702 | goto fail; | |
4703 | else | |
4704 | priv->fw_state = FW_STATE_LOADING_PREF; | |
4705 | break; | |
4706 | ||
4707 | case FW_STATE_LOADING_PREF: | |
4708 | if (!fw) { | |
4709 | if (priv->fw_alt) { | |
4710 | rc = mwl8k_request_alt_fw(priv); | |
4711 | if (rc) | |
4712 | goto fail; | |
4713 | priv->fw_state = FW_STATE_LOADING_ALT; | |
4714 | } else | |
4715 | goto fail; | |
4716 | } else { | |
4717 | priv->fw_ucode = fw; | |
4718 | rc = mwl8k_firmware_load_success(priv); | |
4719 | if (rc) | |
4720 | goto fail; | |
4721 | else | |
4722 | complete(&priv->firmware_loading_complete); | |
4723 | } | |
4724 | break; | |
4725 | ||
4726 | case FW_STATE_LOADING_ALT: | |
4727 | if (!fw) { | |
4728 | printk(KERN_ERR "%s: Error requesting alt fw %s\n", | |
4729 | pci_name(priv->pdev), di->helper_image); | |
4730 | goto fail; | |
4731 | } | |
4732 | priv->fw_ucode = fw; | |
4733 | rc = mwl8k_firmware_load_success(priv); | |
4734 | if (rc) | |
4735 | goto fail; | |
4736 | else | |
4737 | complete(&priv->firmware_loading_complete); | |
4738 | break; | |
4739 | ||
4740 | default: | |
4741 | printk(KERN_ERR "%s: Unexpected firmware loading state: %d\n", | |
4742 | MWL8K_NAME, priv->fw_state); | |
4743 | BUG_ON(1); | |
4744 | } | |
4745 | ||
4746 | return; | |
4747 | ||
4748 | fail: | |
4749 | priv->fw_state = FW_STATE_ERROR; | |
4750 | complete(&priv->firmware_loading_complete); | |
4751 | device_release_driver(&priv->pdev->dev); | |
4752 | mwl8k_release_firmware(priv); | |
4753 | } | |
4754 | ||
4755 | static int mwl8k_init_firmware(struct ieee80211_hw *hw, char *fw_image, | |
4756 | bool nowait) | |
a66098da | 4757 | { |
3cc7772c | 4758 | struct mwl8k_priv *priv = hw->priv; |
a66098da | 4759 | int rc; |
be695fc4 LB |
4760 | |
4761 | /* Reset firmware and hardware */ | |
4762 | mwl8k_hw_reset(priv); | |
4763 | ||
4764 | /* Ask userland hotplug daemon for the device firmware */ | |
99020471 | 4765 | rc = mwl8k_request_firmware(priv, fw_image, nowait); |
be695fc4 | 4766 | if (rc) { |
5db55844 | 4767 | wiphy_err(hw->wiphy, "Firmware files not found\n"); |
3cc7772c | 4768 | return rc; |
be695fc4 LB |
4769 | } |
4770 | ||
99020471 BC |
4771 | if (nowait) |
4772 | return rc; | |
4773 | ||
be695fc4 LB |
4774 | /* Load firmware into hardware */ |
4775 | rc = mwl8k_load_firmware(hw); | |
3cc7772c | 4776 | if (rc) |
5db55844 | 4777 | wiphy_err(hw->wiphy, "Cannot start firmware\n"); |
be695fc4 LB |
4778 | |
4779 | /* Reclaim memory once firmware is successfully loaded */ | |
4780 | mwl8k_release_firmware(priv); | |
4781 | ||
3cc7772c BC |
4782 | return rc; |
4783 | } | |
4784 | ||
73b46320 BC |
4785 | static int mwl8k_init_txqs(struct ieee80211_hw *hw) |
4786 | { | |
4787 | struct mwl8k_priv *priv = hw->priv; | |
4788 | int rc = 0; | |
4789 | int i; | |
4790 | ||
4791 | for (i = 0; i < MWL8K_TX_QUEUES; i++) { | |
4792 | rc = mwl8k_txq_init(hw, i); | |
4793 | if (rc) | |
4794 | break; | |
4795 | if (priv->ap_fw) | |
4796 | iowrite32(priv->txq[i].txd_dma, | |
4797 | priv->sram + priv->txq_offset[i]); | |
4798 | } | |
4799 | return rc; | |
4800 | } | |
4801 | ||
3cc7772c BC |
4802 | /* initialize hw after successfully loading a firmware image */ |
4803 | static int mwl8k_probe_hw(struct ieee80211_hw *hw) | |
4804 | { | |
4805 | struct mwl8k_priv *priv = hw->priv; | |
4806 | int rc = 0; | |
4807 | int i; | |
be695fc4 | 4808 | |
91942230 | 4809 | if (priv->ap_fw) { |
89a91f4f | 4810 | priv->rxd_ops = priv->device_info->ap_rxd_ops; |
91942230 | 4811 | if (priv->rxd_ops == NULL) { |
c96c31e4 JP |
4812 | wiphy_err(hw->wiphy, |
4813 | "Driver does not have AP firmware image support for this hardware\n"); | |
91942230 LB |
4814 | goto err_stop_firmware; |
4815 | } | |
4816 | } else { | |
89a91f4f | 4817 | priv->rxd_ops = &rxd_sta_ops; |
91942230 | 4818 | } |
be695fc4 LB |
4819 | |
4820 | priv->sniffer_enabled = false; | |
4821 | priv->wmm_enabled = false; | |
4822 | priv->pending_tx_pkts = 0; | |
4823 | ||
a66098da LB |
4824 | rc = mwl8k_rxq_init(hw, 0); |
4825 | if (rc) | |
3cc7772c | 4826 | goto err_stop_firmware; |
a66098da LB |
4827 | rxq_refill(hw, 0, INT_MAX); |
4828 | ||
73b46320 BC |
4829 | /* For the sta firmware, we need to know the dma addresses of tx queues |
4830 | * before sending MWL8K_CMD_GET_HW_SPEC. So we must initialize them | |
4831 | * prior to issuing this command. But for the AP case, we learn the | |
4832 | * total number of queues from the result CMD_GET_HW_SPEC, so for this | |
4833 | * case we must initialize the tx queues after. | |
4834 | */ | |
8a7a578c | 4835 | priv->num_ampdu_queues = 0; |
73b46320 BC |
4836 | if (!priv->ap_fw) { |
4837 | rc = mwl8k_init_txqs(hw); | |
a66098da LB |
4838 | if (rc) |
4839 | goto err_free_queues; | |
4840 | } | |
4841 | ||
4842 | iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS); | |
c23b5a69 | 4843 | iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK); |
67e2eb27 | 4844 | iowrite32(MWL8K_A2H_INT_TX_DONE | MWL8K_A2H_INT_RX_READY, |
1e9f9de3 | 4845 | priv->regs + MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL); |
a66098da LB |
4846 | iowrite32(0xffffffff, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK); |
4847 | ||
a0607fd3 | 4848 | rc = request_irq(priv->pdev->irq, mwl8k_interrupt, |
a66098da LB |
4849 | IRQF_SHARED, MWL8K_NAME, hw); |
4850 | if (rc) { | |
5db55844 | 4851 | wiphy_err(hw->wiphy, "failed to register IRQ handler\n"); |
a66098da LB |
4852 | goto err_free_queues; |
4853 | } | |
4854 | ||
a66098da LB |
4855 | /* |
4856 | * Temporarily enable interrupts. Initial firmware host | |
c2c2b12a | 4857 | * commands use interrupts and avoid polling. Disable |
a66098da LB |
4858 | * interrupts when done. |
4859 | */ | |
c23b5a69 | 4860 | iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK); |
a66098da LB |
4861 | |
4862 | /* Get config data, mac addrs etc */ | |
42fba21d LB |
4863 | if (priv->ap_fw) { |
4864 | rc = mwl8k_cmd_get_hw_spec_ap(hw); | |
73b46320 BC |
4865 | if (!rc) |
4866 | rc = mwl8k_init_txqs(hw); | |
42fba21d LB |
4867 | if (!rc) |
4868 | rc = mwl8k_cmd_set_hw_spec(hw); | |
4869 | } else { | |
4870 | rc = mwl8k_cmd_get_hw_spec_sta(hw); | |
4871 | } | |
a66098da | 4872 | if (rc) { |
5db55844 | 4873 | wiphy_err(hw->wiphy, "Cannot initialise firmware\n"); |
be695fc4 | 4874 | goto err_free_irq; |
a66098da LB |
4875 | } |
4876 | ||
4877 | /* Turn radio off */ | |
55489b6e | 4878 | rc = mwl8k_cmd_radio_disable(hw); |
a66098da | 4879 | if (rc) { |
5db55844 | 4880 | wiphy_err(hw->wiphy, "Cannot disable\n"); |
be695fc4 | 4881 | goto err_free_irq; |
a66098da LB |
4882 | } |
4883 | ||
32060e1b | 4884 | /* Clear MAC address */ |
aa21d0f6 | 4885 | rc = mwl8k_cmd_set_mac_addr(hw, NULL, "\x00\x00\x00\x00\x00\x00"); |
32060e1b | 4886 | if (rc) { |
5db55844 | 4887 | wiphy_err(hw->wiphy, "Cannot clear MAC address\n"); |
be695fc4 | 4888 | goto err_free_irq; |
32060e1b LB |
4889 | } |
4890 | ||
a66098da | 4891 | /* Disable interrupts */ |
a66098da | 4892 | iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK); |
a66098da LB |
4893 | free_irq(priv->pdev->irq, hw); |
4894 | ||
c96c31e4 JP |
4895 | wiphy_info(hw->wiphy, "%s v%d, %pm, %s firmware %u.%u.%u.%u\n", |
4896 | priv->device_info->part_name, | |
4897 | priv->hw_rev, hw->wiphy->perm_addr, | |
4898 | priv->ap_fw ? "AP" : "STA", | |
4899 | (priv->fw_rev >> 24) & 0xff, (priv->fw_rev >> 16) & 0xff, | |
4900 | (priv->fw_rev >> 8) & 0xff, priv->fw_rev & 0xff); | |
a66098da LB |
4901 | |
4902 | return 0; | |
4903 | ||
a66098da | 4904 | err_free_irq: |
a66098da | 4905 | iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK); |
a66098da LB |
4906 | free_irq(priv->pdev->irq, hw); |
4907 | ||
4908 | err_free_queues: | |
4909 | for (i = 0; i < MWL8K_TX_QUEUES; i++) | |
4910 | mwl8k_txq_deinit(hw, i); | |
4911 | mwl8k_rxq_deinit(hw, 0); | |
4912 | ||
3cc7772c BC |
4913 | err_stop_firmware: |
4914 | mwl8k_hw_reset(priv); | |
4915 | ||
4916 | return rc; | |
4917 | } | |
4918 | ||
4919 | /* | |
4920 | * invoke mwl8k_reload_firmware to change the firmware image after the device | |
4921 | * has already been registered | |
4922 | */ | |
4923 | static int mwl8k_reload_firmware(struct ieee80211_hw *hw, char *fw_image) | |
4924 | { | |
4925 | int i, rc = 0; | |
4926 | struct mwl8k_priv *priv = hw->priv; | |
4927 | ||
4928 | mwl8k_stop(hw); | |
4929 | mwl8k_rxq_deinit(hw, 0); | |
4930 | ||
4931 | for (i = 0; i < MWL8K_TX_QUEUES; i++) | |
4932 | mwl8k_txq_deinit(hw, i); | |
4933 | ||
99020471 | 4934 | rc = mwl8k_init_firmware(hw, fw_image, false); |
3cc7772c BC |
4935 | if (rc) |
4936 | goto fail; | |
4937 | ||
4938 | rc = mwl8k_probe_hw(hw); | |
4939 | if (rc) | |
4940 | goto fail; | |
4941 | ||
4942 | rc = mwl8k_start(hw); | |
4943 | if (rc) | |
4944 | goto fail; | |
4945 | ||
4946 | rc = mwl8k_config(hw, ~0); | |
4947 | if (rc) | |
4948 | goto fail; | |
4949 | ||
4950 | for (i = 0; i < MWL8K_TX_QUEUES; i++) { | |
4951 | rc = mwl8k_conf_tx(hw, i, &priv->wmm_params[i]); | |
4952 | if (rc) | |
4953 | goto fail; | |
4954 | } | |
4955 | ||
4956 | return rc; | |
4957 | ||
4958 | fail: | |
4959 | printk(KERN_WARNING "mwl8k: Failed to reload firmware image.\n"); | |
4960 | return rc; | |
4961 | } | |
4962 | ||
4963 | static int mwl8k_firmware_load_success(struct mwl8k_priv *priv) | |
4964 | { | |
4965 | struct ieee80211_hw *hw = priv->hw; | |
4966 | int i, rc; | |
4967 | ||
99020471 BC |
4968 | rc = mwl8k_load_firmware(hw); |
4969 | mwl8k_release_firmware(priv); | |
4970 | if (rc) { | |
4971 | wiphy_err(hw->wiphy, "Cannot start firmware\n"); | |
4972 | return rc; | |
4973 | } | |
4974 | ||
3cc7772c BC |
4975 | /* |
4976 | * Extra headroom is the size of the required DMA header | |
4977 | * minus the size of the smallest 802.11 frame (CTS frame). | |
4978 | */ | |
4979 | hw->extra_tx_headroom = | |
4980 | sizeof(struct mwl8k_dma_data) - sizeof(struct ieee80211_cts); | |
4981 | ||
4982 | hw->channel_change_time = 10; | |
4983 | ||
4984 | hw->queues = MWL8K_TX_QUEUES; | |
4985 | ||
4986 | /* Set rssi values to dBm */ | |
0bf22c37 | 4987 | hw->flags |= IEEE80211_HW_SIGNAL_DBM | IEEE80211_HW_HAS_RATE_CONTROL; |
3cc7772c BC |
4988 | hw->vif_data_size = sizeof(struct mwl8k_vif); |
4989 | hw->sta_data_size = sizeof(struct mwl8k_sta); | |
4990 | ||
4991 | priv->macids_used = 0; | |
4992 | INIT_LIST_HEAD(&priv->vif_list); | |
4993 | ||
4994 | /* Set default radio state and preamble */ | |
4995 | priv->radio_on = 0; | |
4996 | priv->radio_short_preamble = 0; | |
4997 | ||
4998 | /* Finalize join worker */ | |
4999 | INIT_WORK(&priv->finalize_join_worker, mwl8k_finalize_join_worker); | |
5000 | ||
5001 | /* TX reclaim and RX tasklets. */ | |
5002 | tasklet_init(&priv->poll_tx_task, mwl8k_tx_poll, (unsigned long)hw); | |
5003 | tasklet_disable(&priv->poll_tx_task); | |
5004 | tasklet_init(&priv->poll_rx_task, mwl8k_rx_poll, (unsigned long)hw); | |
5005 | tasklet_disable(&priv->poll_rx_task); | |
5006 | ||
5007 | /* Power management cookie */ | |
5008 | priv->cookie = pci_alloc_consistent(priv->pdev, 4, &priv->cookie_dma); | |
5009 | if (priv->cookie == NULL) | |
5010 | return -ENOMEM; | |
5011 | ||
5012 | mutex_init(&priv->fw_mutex); | |
5013 | priv->fw_mutex_owner = NULL; | |
5014 | priv->fw_mutex_depth = 0; | |
5015 | priv->hostcmd_wait = NULL; | |
5016 | ||
5017 | spin_lock_init(&priv->tx_lock); | |
5018 | ||
5019 | priv->tx_wait = NULL; | |
5020 | ||
5021 | rc = mwl8k_probe_hw(hw); | |
5022 | if (rc) | |
5023 | goto err_free_cookie; | |
5024 | ||
5025 | hw->wiphy->interface_modes = 0; | |
5026 | if (priv->ap_macids_supported || priv->device_info->fw_image_ap) | |
5027 | hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_AP); | |
5028 | if (priv->sta_macids_supported || priv->device_info->fw_image_sta) | |
5029 | hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_STATION); | |
5030 | ||
5031 | rc = ieee80211_register_hw(hw); | |
5032 | if (rc) { | |
5033 | wiphy_err(hw->wiphy, "Cannot register device\n"); | |
5034 | goto err_unprobe_hw; | |
5035 | } | |
5036 | ||
5037 | return 0; | |
5038 | ||
5039 | err_unprobe_hw: | |
5040 | for (i = 0; i < MWL8K_TX_QUEUES; i++) | |
5041 | mwl8k_txq_deinit(hw, i); | |
5042 | mwl8k_rxq_deinit(hw, 0); | |
5043 | ||
be695fc4 | 5044 | err_free_cookie: |
a66098da LB |
5045 | if (priv->cookie != NULL) |
5046 | pci_free_consistent(priv->pdev, 4, | |
5047 | priv->cookie, priv->cookie_dma); | |
5048 | ||
3cc7772c BC |
5049 | return rc; |
5050 | } | |
5051 | static int __devinit mwl8k_probe(struct pci_dev *pdev, | |
5052 | const struct pci_device_id *id) | |
5053 | { | |
5054 | static int printed_version; | |
5055 | struct ieee80211_hw *hw; | |
5056 | struct mwl8k_priv *priv; | |
0863ade8 | 5057 | struct mwl8k_device_info *di; |
3cc7772c BC |
5058 | int rc; |
5059 | ||
5060 | if (!printed_version) { | |
5061 | printk(KERN_INFO "%s version %s\n", MWL8K_DESC, MWL8K_VERSION); | |
5062 | printed_version = 1; | |
5063 | } | |
5064 | ||
5065 | ||
5066 | rc = pci_enable_device(pdev); | |
5067 | if (rc) { | |
5068 | printk(KERN_ERR "%s: Cannot enable new PCI device\n", | |
5069 | MWL8K_NAME); | |
5070 | return rc; | |
5071 | } | |
5072 | ||
5073 | rc = pci_request_regions(pdev, MWL8K_NAME); | |
5074 | if (rc) { | |
5075 | printk(KERN_ERR "%s: Cannot obtain PCI resources\n", | |
5076 | MWL8K_NAME); | |
5077 | goto err_disable_device; | |
5078 | } | |
5079 | ||
5080 | pci_set_master(pdev); | |
5081 | ||
5082 | ||
5083 | hw = ieee80211_alloc_hw(sizeof(*priv), &mwl8k_ops); | |
5084 | if (hw == NULL) { | |
5085 | printk(KERN_ERR "%s: ieee80211 alloc failed\n", MWL8K_NAME); | |
5086 | rc = -ENOMEM; | |
5087 | goto err_free_reg; | |
5088 | } | |
5089 | ||
5090 | SET_IEEE80211_DEV(hw, &pdev->dev); | |
5091 | pci_set_drvdata(pdev, hw); | |
5092 | ||
5093 | priv = hw->priv; | |
5094 | priv->hw = hw; | |
5095 | priv->pdev = pdev; | |
5096 | priv->device_info = &mwl8k_info_tbl[id->driver_data]; | |
5097 | ||
5098 | ||
5099 | priv->sram = pci_iomap(pdev, 0, 0x10000); | |
5100 | if (priv->sram == NULL) { | |
5101 | wiphy_err(hw->wiphy, "Cannot map device SRAM\n"); | |
5102 | goto err_iounmap; | |
5103 | } | |
5104 | ||
5105 | /* | |
5106 | * If BAR0 is a 32 bit BAR, the register BAR will be BAR1. | |
5107 | * If BAR0 is a 64 bit BAR, the register BAR will be BAR2. | |
5108 | */ | |
5109 | priv->regs = pci_iomap(pdev, 1, 0x10000); | |
5110 | if (priv->regs == NULL) { | |
5111 | priv->regs = pci_iomap(pdev, 2, 0x10000); | |
5112 | if (priv->regs == NULL) { | |
5113 | wiphy_err(hw->wiphy, "Cannot map device registers\n"); | |
5114 | goto err_iounmap; | |
5115 | } | |
5116 | } | |
5117 | ||
0863ade8 | 5118 | /* |
99020471 BC |
5119 | * Choose the initial fw image depending on user input. If a second |
5120 | * image is available, make it the alternative image that will be | |
5121 | * loaded if the first one fails. | |
0863ade8 | 5122 | */ |
99020471 | 5123 | init_completion(&priv->firmware_loading_complete); |
0863ade8 | 5124 | di = priv->device_info; |
99020471 BC |
5125 | if (ap_mode_default && di->fw_image_ap) { |
5126 | priv->fw_pref = di->fw_image_ap; | |
5127 | priv->fw_alt = di->fw_image_sta; | |
5128 | } else if (!ap_mode_default && di->fw_image_sta) { | |
5129 | priv->fw_pref = di->fw_image_sta; | |
5130 | priv->fw_alt = di->fw_image_ap; | |
5131 | } else if (ap_mode_default && !di->fw_image_ap && di->fw_image_sta) { | |
0863ade8 | 5132 | printk(KERN_WARNING "AP fw is unavailable. Using STA fw."); |
99020471 | 5133 | priv->fw_pref = di->fw_image_sta; |
0863ade8 BC |
5134 | } else if (!ap_mode_default && !di->fw_image_sta && di->fw_image_ap) { |
5135 | printk(KERN_WARNING "STA fw is unavailable. Using AP fw."); | |
99020471 BC |
5136 | priv->fw_pref = di->fw_image_ap; |
5137 | } | |
5138 | rc = mwl8k_init_firmware(hw, priv->fw_pref, true); | |
3cc7772c BC |
5139 | if (rc) |
5140 | goto err_stop_firmware; | |
99020471 | 5141 | return rc; |
3cc7772c | 5142 | |
be695fc4 LB |
5143 | err_stop_firmware: |
5144 | mwl8k_hw_reset(priv); | |
be695fc4 LB |
5145 | |
5146 | err_iounmap: | |
a66098da LB |
5147 | if (priv->regs != NULL) |
5148 | pci_iounmap(pdev, priv->regs); | |
5149 | ||
5b9482dd LB |
5150 | if (priv->sram != NULL) |
5151 | pci_iounmap(pdev, priv->sram); | |
5152 | ||
a66098da LB |
5153 | pci_set_drvdata(pdev, NULL); |
5154 | ieee80211_free_hw(hw); | |
5155 | ||
5156 | err_free_reg: | |
5157 | pci_release_regions(pdev); | |
3db95e50 LB |
5158 | |
5159 | err_disable_device: | |
a66098da LB |
5160 | pci_disable_device(pdev); |
5161 | ||
5162 | return rc; | |
5163 | } | |
5164 | ||
230f7af0 | 5165 | static void __devexit mwl8k_shutdown(struct pci_dev *pdev) |
a66098da LB |
5166 | { |
5167 | printk(KERN_ERR "===>%s(%u)\n", __func__, __LINE__); | |
5168 | } | |
5169 | ||
230f7af0 | 5170 | static void __devexit mwl8k_remove(struct pci_dev *pdev) |
a66098da LB |
5171 | { |
5172 | struct ieee80211_hw *hw = pci_get_drvdata(pdev); | |
5173 | struct mwl8k_priv *priv; | |
5174 | int i; | |
5175 | ||
5176 | if (hw == NULL) | |
5177 | return; | |
5178 | priv = hw->priv; | |
5179 | ||
99020471 BC |
5180 | wait_for_completion(&priv->firmware_loading_complete); |
5181 | ||
5182 | if (priv->fw_state == FW_STATE_ERROR) { | |
5183 | mwl8k_hw_reset(priv); | |
5184 | goto unmap; | |
5185 | } | |
5186 | ||
a66098da LB |
5187 | ieee80211_stop_queues(hw); |
5188 | ||
60aa569f LB |
5189 | ieee80211_unregister_hw(hw); |
5190 | ||
67e2eb27 | 5191 | /* Remove TX reclaim and RX tasklets. */ |
1e9f9de3 | 5192 | tasklet_kill(&priv->poll_tx_task); |
67e2eb27 | 5193 | tasklet_kill(&priv->poll_rx_task); |
a66098da | 5194 | |
a66098da LB |
5195 | /* Stop hardware */ |
5196 | mwl8k_hw_reset(priv); | |
5197 | ||
5198 | /* Return all skbs to mac80211 */ | |
5199 | for (i = 0; i < MWL8K_TX_QUEUES; i++) | |
efb7c49a | 5200 | mwl8k_txq_reclaim(hw, i, INT_MAX, 1); |
a66098da | 5201 | |
a66098da LB |
5202 | for (i = 0; i < MWL8K_TX_QUEUES; i++) |
5203 | mwl8k_txq_deinit(hw, i); | |
5204 | ||
5205 | mwl8k_rxq_deinit(hw, 0); | |
5206 | ||
c2c357ce | 5207 | pci_free_consistent(priv->pdev, 4, priv->cookie, priv->cookie_dma); |
a66098da | 5208 | |
99020471 | 5209 | unmap: |
a66098da | 5210 | pci_iounmap(pdev, priv->regs); |
5b9482dd | 5211 | pci_iounmap(pdev, priv->sram); |
a66098da LB |
5212 | pci_set_drvdata(pdev, NULL); |
5213 | ieee80211_free_hw(hw); | |
5214 | pci_release_regions(pdev); | |
5215 | pci_disable_device(pdev); | |
5216 | } | |
5217 | ||
5218 | static struct pci_driver mwl8k_driver = { | |
5219 | .name = MWL8K_NAME, | |
45a390dd | 5220 | .id_table = mwl8k_pci_id_table, |
a66098da LB |
5221 | .probe = mwl8k_probe, |
5222 | .remove = __devexit_p(mwl8k_remove), | |
5223 | .shutdown = __devexit_p(mwl8k_shutdown), | |
5224 | }; | |
5225 | ||
5226 | static int __init mwl8k_init(void) | |
5227 | { | |
5228 | return pci_register_driver(&mwl8k_driver); | |
5229 | } | |
5230 | ||
5231 | static void __exit mwl8k_exit(void) | |
5232 | { | |
5233 | pci_unregister_driver(&mwl8k_driver); | |
5234 | } | |
5235 | ||
5236 | module_init(mwl8k_init); | |
5237 | module_exit(mwl8k_exit); | |
c2c357ce LB |
5238 | |
5239 | MODULE_DESCRIPTION(MWL8K_DESC); | |
5240 | MODULE_VERSION(MWL8K_VERSION); | |
5241 | MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>"); | |
5242 | MODULE_LICENSE("GPL"); |