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mwl8k: fix rf_antenna rx argument for AP
[deliverable/linux.git] / drivers / net / wireless / mwl8k.c
CommitLineData
a66098da 1/*
ce9e2e1b
LB		 2 * drivers/net/wireless/mwl8k.c
3 * Driver for Marvell TOPDOG 802.11 Wireless cards
a66098da 4 *
a5fb297d 5 * Copyright (C) 2008, 2009, 2010 Marvell Semiconductor Inc.
a66098da
LB		 6 *
7 * This file is licensed under the terms of the GNU General Public
8 * License version 2. This program is licensed "as is" without any
9 * warranty of any kind, whether express or implied.
10 */
11
12#include <linux/init.h>
13#include <linux/module.h>
14#include <linux/kernel.h>
3d76e82c 15#include <linux/sched.h>
a66098da
LB		 16#include <linux/spinlock.h>
17#include <linux/list.h>
18#include <linux/pci.h>
19#include <linux/delay.h>
20#include <linux/completion.h>
21#include <linux/etherdevice.h>
5a0e3ad6 22#include <linux/slab.h>
a66098da
LB		 23#include <net/mac80211.h>
24#include <linux/moduleparam.h>
25#include <linux/firmware.h>
26#include <linux/workqueue.h>
27
28#define MWL8K_DESC "Marvell TOPDOG(R) 802.11 Wireless Network Driver"
29#define MWL8K_NAME KBUILD_MODNAME
a5fb297d 30#define MWL8K_VERSION "0.12"
a66098da 31
0863ade8
BC		 32/* Module parameters */
33static unsigned ap_mode_default;
34module_param(ap_mode_default, bool, 0);
35MODULE_PARM_DESC(ap_mode_default,
36 "Set to 1 to make ap mode the default instead of sta mode");
37
a66098da
LB		 38/* Register definitions */
39#define MWL8K_HIU_GEN_PTR 0x00000c10
ce9e2e1b
LB		 40#define MWL8K_MODE_STA 0x0000005a
41#define MWL8K_MODE_AP 0x000000a5
a66098da 42#define MWL8K_HIU_INT_CODE 0x00000c14
ce9e2e1b
LB		 43#define MWL8K_FWSTA_READY 0xf0f1f2f4
44#define MWL8K_FWAP_READY 0xf1f2f4a5
45#define MWL8K_INT_CODE_CMD_FINISHED 0x00000005
a66098da
LB		 46#define MWL8K_HIU_SCRATCH 0x00000c40
47
48/* Host->device communications */
49#define MWL8K_HIU_H2A_INTERRUPT_EVENTS 0x00000c18
50#define MWL8K_HIU_H2A_INTERRUPT_STATUS 0x00000c1c
51#define MWL8K_HIU_H2A_INTERRUPT_MASK 0x00000c20
52#define MWL8K_HIU_H2A_INTERRUPT_CLEAR_SEL 0x00000c24
53#define MWL8K_HIU_H2A_INTERRUPT_STATUS_MASK 0x00000c28
ce9e2e1b
LB		 54#define MWL8K_H2A_INT_DUMMY (1 << 20)
55#define MWL8K_H2A_INT_RESET (1 << 15)
56#define MWL8K_H2A_INT_DOORBELL (1 << 1)
57#define MWL8K_H2A_INT_PPA_READY (1 << 0)
a66098da
LB		 58
59/* Device->host communications */
60#define MWL8K_HIU_A2H_INTERRUPT_EVENTS 0x00000c2c
61#define MWL8K_HIU_A2H_INTERRUPT_STATUS 0x00000c30
62#define MWL8K_HIU_A2H_INTERRUPT_MASK 0x00000c34
63#define MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL 0x00000c38
64#define MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK 0x00000c3c
ce9e2e1b
LB		 65#define MWL8K_A2H_INT_DUMMY (1 << 20)
66#define MWL8K_A2H_INT_CHNL_SWITCHED (1 << 11)
67#define MWL8K_A2H_INT_QUEUE_EMPTY (1 << 10)
68#define MWL8K_A2H_INT_RADAR_DETECT (1 << 7)
69#define MWL8K_A2H_INT_RADIO_ON (1 << 6)
70#define MWL8K_A2H_INT_RADIO_OFF (1 << 5)
71#define MWL8K_A2H_INT_MAC_EVENT (1 << 3)
72#define MWL8K_A2H_INT_OPC_DONE (1 << 2)
73#define MWL8K_A2H_INT_RX_READY (1 << 1)
74#define MWL8K_A2H_INT_TX_DONE (1 << 0)
a66098da
LB		 75
76#define MWL8K_A2H_EVENTS (MWL8K_A2H_INT_DUMMY | \
77 MWL8K_A2H_INT_CHNL_SWITCHED | \
78 MWL8K_A2H_INT_QUEUE_EMPTY | \
79 MWL8K_A2H_INT_RADAR_DETECT | \
80 MWL8K_A2H_INT_RADIO_ON | \
81 MWL8K_A2H_INT_RADIO_OFF | \
82 MWL8K_A2H_INT_MAC_EVENT | \
83 MWL8K_A2H_INT_OPC_DONE | \
84 MWL8K_A2H_INT_RX_READY | \
85 MWL8K_A2H_INT_TX_DONE)
86
a66098da
LB		 87#define MWL8K_RX_QUEUES 1
88#define MWL8K_TX_QUEUES 4
89
54bc3a0d
LB		 90struct rxd_ops {
91 int rxd_size;
92 void (*rxd_init)(void *rxd, dma_addr_t next_dma_addr);
93 void (*rxd_refill)(void *rxd, dma_addr_t addr, int len);
20f09c3d 94 int (*rxd_process)(void *rxd, struct ieee80211_rx_status *status,
0d462bbb 95 __le16 *qos, s8 *noise);
54bc3a0d
LB		 96};
97
45a390dd 98struct mwl8k_device_info {
a74b295e
LB		 99 char *part_name;
100 char *helper_image;
0863ade8
BC		 101 char *fw_image_sta;
102 char *fw_image_ap;
89a91f4f 103 struct rxd_ops *ap_rxd_ops;
952a0e96 104 u32 fw_api_ap;
45a390dd
LB		 105};
106
a66098da 107struct mwl8k_rx_queue {
45eb400d 108 int rxd_count;
a66098da
LB		 109
110 /* hw receives here */
45eb400d 111 int head;
a66098da
LB		 112
113 /* refill descs here */
45eb400d 114 int tail;
a66098da 115
54bc3a0d 116 void *rxd;
45eb400d 117 dma_addr_t rxd_dma;
788838eb
LB		 118 struct {
119 struct sk_buff *skb;
53b1b3e1 120 DEFINE_DMA_UNMAP_ADDR(dma);
788838eb 121 } *buf;
a66098da
LB		 122};
123
a66098da
LB		 124struct mwl8k_tx_queue {
125 /* hw transmits here */
45eb400d 126 int head;
a66098da
LB		 127
128 /* sw appends here */
45eb400d 129 int tail;
a66098da 130
8ccbc3b8 131 unsigned int len;
45eb400d
LB		 132 struct mwl8k_tx_desc *txd;
133 dma_addr_t txd_dma;
134 struct sk_buff **skb;
a66098da
LB		 135};
136
a66098da 137struct mwl8k_priv {
a66098da 138 struct ieee80211_hw *hw;
a66098da 139 struct pci_dev *pdev;
a66098da 140
45a390dd
LB		 141 struct mwl8k_device_info *device_info;
142
be695fc4
LB		 143 void __iomem *sram;
144 void __iomem *regs;
145
146 /* firmware */
d1f9e41d
BC		 147 const struct firmware *fw_helper;
148 const struct firmware *fw_ucode;
a66098da 149
be695fc4
LB		 150 /* hardware/firmware parameters */
151 bool ap_fw;
152 struct rxd_ops *rxd_ops;
777ad375
LB		 153 struct ieee80211_supported_band band_24;
154 struct ieee80211_channel channels_24[14];
155 struct ieee80211_rate rates_24[14];
4eae9edd
LB		 156 struct ieee80211_supported_band band_50;
157 struct ieee80211_channel channels_50[4];
158 struct ieee80211_rate rates_50[9];
ee0ddf18
LB		 159 u32 ap_macids_supported;
160 u32 sta_macids_supported;
be695fc4 161
618952a7
LB		 162 /* firmware access */
163 struct mutex fw_mutex;
164 struct task_struct *fw_mutex_owner;
165 int fw_mutex_depth;
618952a7
LB		 166 struct completion *hostcmd_wait;
167
a66098da
LB		 168 /* lock held over TX and TX reap */
169 spinlock_t tx_lock;
a66098da 170
88de754a
LB		 171 /* TX quiesce completion, protected by fw_mutex and tx_lock */
172 struct completion *tx_wait;
173
f5bb87cf 174 /* List of interfaces. */
ee0ddf18 175 u32 macids_used;
f5bb87cf 176 struct list_head vif_list;
a66098da 177
a66098da
LB		 178 /* power management status cookie from firmware */
179 u32 *cookie;
180 dma_addr_t cookie_dma;
181
182 u16 num_mcaddrs;
a66098da 183 u8 hw_rev;
2aa7b01f 184 u32 fw_rev;
a66098da
LB		 185
186 /*
187 * Running count of TX packets in flight, to avoid
188 * iterating over the transmit rings each time.
189 */
190 int pending_tx_pkts;
191
192 struct mwl8k_rx_queue rxq[MWL8K_RX_QUEUES];
193 struct mwl8k_tx_queue txq[MWL8K_TX_QUEUES];
194
c46563b7 195 bool radio_on;
68ce3884 196 bool radio_short_preamble;
a43c49a8 197 bool sniffer_enabled;
0439b1f5 198 bool wmm_enabled;
a66098da 199
a66098da
LB		 200 /* XXX need to convert this to handle multiple interfaces */
201 bool capture_beacon;
d89173f2 202 u8 capture_bssid[ETH_ALEN];
a66098da
LB		 203 struct sk_buff *beacon_skb;
204
205 /*
206 * This FJ worker has to be global as it is scheduled from the
207 * RX handler. At this point we don't know which interface it
208 * belongs to until the list of bssids waiting to complete join
209 * is checked.
210 */
211 struct work_struct finalize_join_worker;
212
1e9f9de3
LB		 213 /* Tasklet to perform TX reclaim. */
214 struct tasklet_struct poll_tx_task;
67e2eb27
LB		 215
216 /* Tasklet to perform RX. */
217 struct tasklet_struct poll_rx_task;
0d462bbb
JL		 218
219 /* Most recently reported noise in dBm */
220 s8 noise;
0863ade8
BC		 221
222 /*
223 * preserve the queue configurations so they can be restored if/when
224 * the firmware image is swapped.
225 */
226 struct ieee80211_tx_queue_params wmm_params[MWL8K_TX_QUEUES];
99020471
BC		 227
228 /* async firmware loading state */
229 unsigned fw_state;
230 char *fw_pref;
231 char *fw_alt;
232 struct completion firmware_loading_complete;
a66098da
LB		 233};
234
e53d9b96
NS		 235#define MAX_WEP_KEY_LEN 13
236#define NUM_WEP_KEYS 4
237
a66098da
LB		 238/* Per interface specific private data */
239struct mwl8k_vif {
f5bb87cf
LB		 240 struct list_head list;
241 struct ieee80211_vif *vif;
242
f57ca9c1
LB		 243 /* Firmware macid for this vif. */
244 int macid;
245
c2c2b12a 246 /* Non AMPDU sequence number assigned by driver. */
a680400e 247 u16 seqno;
e53d9b96
NS		 248
249 /* Saved WEP keys */
250 struct {
251 u8 enabled;
252 u8 key[sizeof(struct ieee80211_key_conf) + MAX_WEP_KEY_LEN];
253 } wep_key_conf[NUM_WEP_KEYS];
d9a07d49
NS		 254
255 /* BSSID */
256 u8 bssid[ETH_ALEN];
257
258 /* A flag to indicate is HW crypto is enabled for this bssid */
259 bool is_hw_crypto_enabled;
a66098da 260};
a94cc97e 261#define MWL8K_VIF(_vif) ((struct mwl8k_vif *)&((_vif)->drv_priv))
fcdc403c 262#define IEEE80211_KEY_CONF(_u8) ((struct ieee80211_key_conf *)(_u8))
a66098da 263
a680400e
LB		 264struct mwl8k_sta {
265 /* Index into station database. Returned by UPDATE_STADB. */
266 u8 peer_id;
267};
268#define MWL8K_STA(_sta) ((struct mwl8k_sta *)&((_sta)->drv_priv))
269
777ad375 270static const struct ieee80211_channel mwl8k_channels_24[] = {
a66098da
LB		 271 { .center_freq = 2412, .hw_value = 1, },
272 { .center_freq = 2417, .hw_value = 2, },
273 { .center_freq = 2422, .hw_value = 3, },
274 { .center_freq = 2427, .hw_value = 4, },
275 { .center_freq = 2432, .hw_value = 5, },
276 { .center_freq = 2437, .hw_value = 6, },
277 { .center_freq = 2442, .hw_value = 7, },
278 { .center_freq = 2447, .hw_value = 8, },
279 { .center_freq = 2452, .hw_value = 9, },
280 { .center_freq = 2457, .hw_value = 10, },
281 { .center_freq = 2462, .hw_value = 11, },
647ca6b0
LB		 282 { .center_freq = 2467, .hw_value = 12, },
283 { .center_freq = 2472, .hw_value = 13, },
284 { .center_freq = 2484, .hw_value = 14, },
a66098da
LB		 285};
286
777ad375 287static const struct ieee80211_rate mwl8k_rates_24[] = {
a66098da
LB		 288 { .bitrate = 10, .hw_value = 2, },
289 { .bitrate = 20, .hw_value = 4, },
290 { .bitrate = 55, .hw_value = 11, },
5dfd3e2c
LB		 291 { .bitrate = 110, .hw_value = 22, },
292 { .bitrate = 220, .hw_value = 44, },
a66098da
LB		 293 { .bitrate = 60, .hw_value = 12, },
294 { .bitrate = 90, .hw_value = 18, },
a66098da
LB		 295 { .bitrate = 120, .hw_value = 24, },
296 { .bitrate = 180, .hw_value = 36, },
297 { .bitrate = 240, .hw_value = 48, },
298 { .bitrate = 360, .hw_value = 72, },
299 { .bitrate = 480, .hw_value = 96, },
300 { .bitrate = 540, .hw_value = 108, },
140eb5e2
LB		 301 { .bitrate = 720, .hw_value = 144, },
302};
303
4eae9edd
LB		 304static const struct ieee80211_channel mwl8k_channels_50[] = {
305 { .center_freq = 5180, .hw_value = 36, },
306 { .center_freq = 5200, .hw_value = 40, },
307 { .center_freq = 5220, .hw_value = 44, },
308 { .center_freq = 5240, .hw_value = 48, },
309};
310
311static const struct ieee80211_rate mwl8k_rates_50[] = {
312 { .bitrate = 60, .hw_value = 12, },
313 { .bitrate = 90, .hw_value = 18, },
314 { .bitrate = 120, .hw_value = 24, },
315 { .bitrate = 180, .hw_value = 36, },
316 { .bitrate = 240, .hw_value = 48, },
317 { .bitrate = 360, .hw_value = 72, },
318 { .bitrate = 480, .hw_value = 96, },
319 { .bitrate = 540, .hw_value = 108, },
320 { .bitrate = 720, .hw_value = 144, },
321};
322
a66098da 323/* Set or get info from Firmware */
a66098da 324#define MWL8K_CMD_GET 0x0000
41fdf097
NS		 325#define MWL8K_CMD_SET 0x0001
326#define MWL8K_CMD_SET_LIST 0x0002
a66098da
LB		 327
328/* Firmware command codes */
329#define MWL8K_CMD_CODE_DNLD 0x0001
330#define MWL8K_CMD_GET_HW_SPEC 0x0003
42fba21d 331#define MWL8K_CMD_SET_HW_SPEC 0x0004
a66098da
LB		 332#define MWL8K_CMD_MAC_MULTICAST_ADR 0x0010
333#define MWL8K_CMD_GET_STAT 0x0014
ff45fc60
LB		 334#define MWL8K_CMD_RADIO_CONTROL 0x001c
335#define MWL8K_CMD_RF_TX_POWER 0x001e
41fdf097 336#define MWL8K_CMD_TX_POWER 0x001f
08b06347 337#define MWL8K_CMD_RF_ANTENNA 0x0020
aa21d0f6 338#define MWL8K_CMD_SET_BEACON 0x0100 /* per-vif */
a66098da
LB		 339#define MWL8K_CMD_SET_PRE_SCAN 0x0107
340#define MWL8K_CMD_SET_POST_SCAN 0x0108
ff45fc60
LB		 341#define MWL8K_CMD_SET_RF_CHANNEL 0x010a
342#define MWL8K_CMD_SET_AID 0x010d
343#define MWL8K_CMD_SET_RATE 0x0110
344#define MWL8K_CMD_SET_FINALIZE_JOIN 0x0111
345#define MWL8K_CMD_RTS_THRESHOLD 0x0113
a66098da 346#define MWL8K_CMD_SET_SLOT 0x0114
ff45fc60
LB		 347#define MWL8K_CMD_SET_EDCA_PARAMS 0x0115
348#define MWL8K_CMD_SET_WMM_MODE 0x0123
a66098da 349#define MWL8K_CMD_MIMO_CONFIG 0x0125
ff45fc60 350#define MWL8K_CMD_USE_FIXED_RATE 0x0126
a66098da 351#define MWL8K_CMD_ENABLE_SNIFFER 0x0150
aa21d0f6 352#define MWL8K_CMD_SET_MAC_ADDR 0x0202 /* per-vif */
a66098da 353#define MWL8K_CMD_SET_RATEADAPT_MODE 0x0203
aa21d0f6
LB		 354#define MWL8K_CMD_BSS_START 0x1100 /* per-vif */
355#define MWL8K_CMD_SET_NEW_STN 0x1111 /* per-vif */
fcdc403c 356#define MWL8K_CMD_UPDATE_ENCRYPTION 0x1122 /* per-vif */
ff45fc60 357#define MWL8K_CMD_UPDATE_STADB 0x1123
a66098da 358
b603742f 359static const char *mwl8k_cmd_name(__le16 cmd, char *buf, int bufsize)
a66098da 360{
b603742f
JL		 361 u16 command = le16_to_cpu(cmd);
362
a66098da
LB		 363#define MWL8K_CMDNAME(x) case MWL8K_CMD_##x: do {\
364 snprintf(buf, bufsize, "%s", #x);\
365 return buf;\
366 } while (0)
b603742f 367 switch (command & ~0x8000) {
a66098da
LB		 368 MWL8K_CMDNAME(CODE_DNLD);
369 MWL8K_CMDNAME(GET_HW_SPEC);
42fba21d 370 MWL8K_CMDNAME(SET_HW_SPEC);
a66098da
LB		 371 MWL8K_CMDNAME(MAC_MULTICAST_ADR);
372 MWL8K_CMDNAME(GET_STAT);
373 MWL8K_CMDNAME(RADIO_CONTROL);
374 MWL8K_CMDNAME(RF_TX_POWER);
41fdf097 375 MWL8K_CMDNAME(TX_POWER);
08b06347 376 MWL8K_CMDNAME(RF_ANTENNA);
b64fe619 377 MWL8K_CMDNAME(SET_BEACON);
a66098da
LB		 378 MWL8K_CMDNAME(SET_PRE_SCAN);
379 MWL8K_CMDNAME(SET_POST_SCAN);
380 MWL8K_CMDNAME(SET_RF_CHANNEL);
ff45fc60
LB		 381 MWL8K_CMDNAME(SET_AID);
382 MWL8K_CMDNAME(SET_RATE);
383 MWL8K_CMDNAME(SET_FINALIZE_JOIN);
384 MWL8K_CMDNAME(RTS_THRESHOLD);
a66098da 385 MWL8K_CMDNAME(SET_SLOT);
ff45fc60
LB		 386 MWL8K_CMDNAME(SET_EDCA_PARAMS);
387 MWL8K_CMDNAME(SET_WMM_MODE);
a66098da 388 MWL8K_CMDNAME(MIMO_CONFIG);
ff45fc60 389 MWL8K_CMDNAME(USE_FIXED_RATE);
a66098da 390 MWL8K_CMDNAME(ENABLE_SNIFFER);
32060e1b 391 MWL8K_CMDNAME(SET_MAC_ADDR);
a66098da 392 MWL8K_CMDNAME(SET_RATEADAPT_MODE);
b64fe619 393 MWL8K_CMDNAME(BSS_START);
3f5610ff 394 MWL8K_CMDNAME(SET_NEW_STN);
fcdc403c 395 MWL8K_CMDNAME(UPDATE_ENCRYPTION);
ff45fc60 396 MWL8K_CMDNAME(UPDATE_STADB);
a66098da
LB		 397 default:
398 snprintf(buf, bufsize, "0x%x", cmd);
399 }
400#undef MWL8K_CMDNAME
401
402 return buf;
403}
404
405/* Hardware and firmware reset */
406static void mwl8k_hw_reset(struct mwl8k_priv *priv)
407{
408 iowrite32(MWL8K_H2A_INT_RESET,
409 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
410 iowrite32(MWL8K_H2A_INT_RESET,
411 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
412 msleep(20);
413}
414
415/* Release fw image */
d1f9e41d 416static void mwl8k_release_fw(const struct firmware **fw)
a66098da
LB		 417{
418 if (*fw == NULL)
419 return;
420 release_firmware(*fw);
421 *fw = NULL;
422}
423
424static void mwl8k_release_firmware(struct mwl8k_priv *priv)
425{
22be40d9
LB		 426 mwl8k_release_fw(&priv->fw_ucode);
427 mwl8k_release_fw(&priv->fw_helper);
a66098da
LB		 428}
429
99020471
BC		 430/* states for asynchronous f/w loading */
431static void mwl8k_fw_state_machine(const struct firmware *fw, void *context);
432enum {
433 FW_STATE_INIT = 0,
434 FW_STATE_LOADING_PREF,
435 FW_STATE_LOADING_ALT,
436 FW_STATE_ERROR,
437};
438
a66098da
LB		 439/* Request fw image */
440static int mwl8k_request_fw(struct mwl8k_priv *priv,
d1f9e41d 441 const char *fname, const struct firmware **fw,
99020471 442 bool nowait)
a66098da
LB		 443{
444 /* release current image */
445 if (*fw != NULL)
446 mwl8k_release_fw(fw);
447
99020471
BC		 448 if (nowait)
449 return request_firmware_nowait(THIS_MODULE, 1, fname,
450 &priv->pdev->dev, GFP_KERNEL,
451 priv, mwl8k_fw_state_machine);
452 else
d1f9e41d 453 return request_firmware(fw, fname, &priv->pdev->dev);
a66098da
LB		 454}
455
99020471
BC		 456static int mwl8k_request_firmware(struct mwl8k_priv *priv, char *fw_image,
457 bool nowait)
a66098da 458{
a74b295e 459 struct mwl8k_device_info *di = priv->device_info;
a66098da
LB		 460 int rc;
461
a74b295e 462 if (di->helper_image != NULL) {
99020471
BC		 463 if (nowait)
464 rc = mwl8k_request_fw(priv, di->helper_image,
465 &priv->fw_helper, true);
466 else
467 rc = mwl8k_request_fw(priv, di->helper_image,
468 &priv->fw_helper, false);
469 if (rc)
470 printk(KERN_ERR "%s: Error requesting helper fw %s\n",
471 pci_name(priv->pdev), di->helper_image);
472
473 if (rc || nowait)
a74b295e 474 return rc;
a66098da
LB		 475 }
476
99020471
BC		 477 if (nowait) {
478 /*
479 * if we get here, no helper image is needed. Skip the
480 * FW_STATE_INIT state.
481 */
482 priv->fw_state = FW_STATE_LOADING_PREF;
483 rc = mwl8k_request_fw(priv, fw_image,
484 &priv->fw_ucode,
485 true);
486 } else
487 rc = mwl8k_request_fw(priv, fw_image,
488 &priv->fw_ucode, false);
a66098da 489 if (rc) {
c2c357ce 490 printk(KERN_ERR "%s: Error requesting firmware file %s\n",
0863ade8 491 pci_name(priv->pdev), fw_image);
22be40d9 492 mwl8k_release_fw(&priv->fw_helper);
a66098da
LB		 493 return rc;
494 }
495
496 return 0;
497}
498
499struct mwl8k_cmd_pkt {
500 __le16 code;
501 __le16 length;
f57ca9c1
LB		 502 __u8 seq_num;
503 __u8 macid;
a66098da
LB		 504 __le16 result;
505 char payload[0];
ba2d3587 506} __packed;
a66098da
LB		 507
508/*
509 * Firmware loading.
510 */
511static int
512mwl8k_send_fw_load_cmd(struct mwl8k_priv *priv, void *data, int length)
513{
514 void __iomem *regs = priv->regs;
515 dma_addr_t dma_addr;
a66098da
LB		 516 int loops;
517
518 dma_addr = pci_map_single(priv->pdev, data, length, PCI_DMA_TODEVICE);
519 if (pci_dma_mapping_error(priv->pdev, dma_addr))
520 return -ENOMEM;
521
522 iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
523 iowrite32(0, regs + MWL8K_HIU_INT_CODE);
524 iowrite32(MWL8K_H2A_INT_DOORBELL,
525 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
526 iowrite32(MWL8K_H2A_INT_DUMMY,
527 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
528
a66098da
LB		 529 loops = 1000;
530 do {
531 u32 int_code;
532
533 int_code = ioread32(regs + MWL8K_HIU_INT_CODE);
534 if (int_code == MWL8K_INT_CODE_CMD_FINISHED) {
535 iowrite32(0, regs + MWL8K_HIU_INT_CODE);
a66098da
LB		 536 break;
537 }
538
3d76e82c 539 cond_resched();
a66098da
LB		 540 udelay(1);
541 } while (--loops);
542
543 pci_unmap_single(priv->pdev, dma_addr, length, PCI_DMA_TODEVICE);
544
d4b70570 545 return loops ? 0 : -ETIMEDOUT;
a66098da
LB		 546}
547
548static int mwl8k_load_fw_image(struct mwl8k_priv *priv,
549 const u8 *data, size_t length)
550{
551 struct mwl8k_cmd_pkt *cmd;
552 int done;
553 int rc = 0;
554
555 cmd = kmalloc(sizeof(*cmd) + 256, GFP_KERNEL);
556 if (cmd == NULL)
557 return -ENOMEM;
558
559 cmd->code = cpu_to_le16(MWL8K_CMD_CODE_DNLD);
560 cmd->seq_num = 0;
f57ca9c1 561 cmd->macid = 0;
a66098da
LB		 562 cmd->result = 0;
563
564 done = 0;
565 while (length) {
566 int block_size = length > 256 ? 256 : length;
567
568 memcpy(cmd->payload, data + done, block_size);
569 cmd->length = cpu_to_le16(block_size);
570
571 rc = mwl8k_send_fw_load_cmd(priv, cmd,
572 sizeof(*cmd) + block_size);
573 if (rc)
574 break;
575
576 done += block_size;
577 length -= block_size;
578 }
579
580 if (!rc) {
581 cmd->length = 0;
582 rc = mwl8k_send_fw_load_cmd(priv, cmd, sizeof(*cmd));
583 }
584
585 kfree(cmd);
586
587 return rc;
588}
589
590static int mwl8k_feed_fw_image(struct mwl8k_priv *priv,
591 const u8 *data, size_t length)
592{
593 unsigned char *buffer;
594 int may_continue, rc = 0;
595 u32 done, prev_block_size;
596
597 buffer = kmalloc(1024, GFP_KERNEL);
598 if (buffer == NULL)
599 return -ENOMEM;
600
601 done = 0;
602 prev_block_size = 0;
603 may_continue = 1000;
604 while (may_continue > 0) {
605 u32 block_size;
606
607 block_size = ioread32(priv->regs + MWL8K_HIU_SCRATCH);
608 if (block_size & 1) {
609 block_size &= ~1;
610 may_continue--;
611 } else {
612 done += prev_block_size;
613 length -= prev_block_size;
614 }
615
616 if (block_size > 1024 || block_size > length) {
617 rc = -EOVERFLOW;
618 break;
619 }
620
621 if (length == 0) {
622 rc = 0;
623 break;
624 }
625
626 if (block_size == 0) {
627 rc = -EPROTO;
628 may_continue--;
629 udelay(1);
630 continue;
631 }
632
633 prev_block_size = block_size;
634 memcpy(buffer, data + done, block_size);
635
636 rc = mwl8k_send_fw_load_cmd(priv, buffer, block_size);
637 if (rc)
638 break;
639 }
640
641 if (!rc && length != 0)
642 rc = -EREMOTEIO;
643
644 kfree(buffer);
645
646 return rc;
647}
648
c2c357ce 649static int mwl8k_load_firmware(struct ieee80211_hw *hw)
a66098da 650{
c2c357ce 651 struct mwl8k_priv *priv = hw->priv;
d1f9e41d 652 const struct firmware *fw = priv->fw_ucode;
c2c357ce
LB		 653 int rc;
654 int loops;
655
656 if (!memcmp(fw->data, "\x01\x00\x00\x00", 4)) {
d1f9e41d 657 const struct firmware *helper = priv->fw_helper;
a66098da 658
c2c357ce
LB		 659 if (helper == NULL) {
660 printk(KERN_ERR "%s: helper image needed but none "
661 "given\n", pci_name(priv->pdev));
662 return -EINVAL;
663 }
a66098da 664
c2c357ce 665 rc = mwl8k_load_fw_image(priv, helper->data, helper->size);
a66098da
LB		 666 if (rc) {
667 printk(KERN_ERR "%s: unable to load firmware "
c2c357ce 668 "helper image\n", pci_name(priv->pdev));
a66098da
LB		 669 return rc;
670 }
89b872e2 671 msleep(5);
a66098da 672
c2c357ce 673 rc = mwl8k_feed_fw_image(priv, fw->data, fw->size);
a66098da 674 } else {
c2c357ce 675 rc = mwl8k_load_fw_image(priv, fw->data, fw->size);
a66098da
LB		 676 }
677
678 if (rc) {
c2c357ce
LB		 679 printk(KERN_ERR "%s: unable to load firmware image\n",
680 pci_name(priv->pdev));
a66098da
LB		 681 return rc;
682 }
683
89a91f4f 684 iowrite32(MWL8K_MODE_STA, priv->regs + MWL8K_HIU_GEN_PTR);
a66098da 685
89b872e2 686 loops = 500000;
a66098da 687 do {
eae74e65
LB		 688 u32 ready_code;
689
690 ready_code = ioread32(priv->regs + MWL8K_HIU_INT_CODE);
691 if (ready_code == MWL8K_FWAP_READY) {
692 priv->ap_fw = 1;
693 break;
694 } else if (ready_code == MWL8K_FWSTA_READY) {
695 priv->ap_fw = 0;
a66098da 696 break;
eae74e65
LB		 697 }
698
699 cond_resched();
a66098da
LB		 700 udelay(1);
701 } while (--loops);
702
703 return loops ? 0 : -ETIMEDOUT;
704}
705
706
a66098da
LB		 707/* DMA header used by firmware and hardware. */
708struct mwl8k_dma_data {
709 __le16 fwlen;
710 struct ieee80211_hdr wh;
20f09c3d 711 char data[0];
ba2d3587 712} __packed;
a66098da
LB		 713
714/* Routines to add/remove DMA header from skb. */
20f09c3d 715static inline void mwl8k_remove_dma_header(struct sk_buff *skb, __le16 qos)
a66098da 716{
20f09c3d
LB		 717 struct mwl8k_dma_data *tr;
718 int hdrlen;
719
720 tr = (struct mwl8k_dma_data *)skb->data;
721 hdrlen = ieee80211_hdrlen(tr->wh.frame_control);
722
723 if (hdrlen != sizeof(tr->wh)) {
724 if (ieee80211_is_data_qos(tr->wh.frame_control)) {
725 memmove(tr->data - hdrlen, &tr->wh, hdrlen - 2);
726 *((__le16 *)(tr->data - 2)) = qos;
727 } else {
728 memmove(tr->data - hdrlen, &tr->wh, hdrlen);
729 }
a66098da 730 }
20f09c3d
LB		 731
732 if (hdrlen != sizeof(*tr))
733 skb_pull(skb, sizeof(*tr) - hdrlen);
a66098da
LB		 734}
735
252486a1
NS		 736static void
737mwl8k_add_dma_header(struct sk_buff *skb, int tail_pad)
a66098da
LB		 738{
739 struct ieee80211_hdr *wh;
ca009301 740 int hdrlen;
252486a1 741 int reqd_hdrlen;
a66098da
LB		 742 struct mwl8k_dma_data *tr;
743
ca009301
LB		 744 /*
745 * Add a firmware DMA header; the firmware requires that we
746 * present a 2-byte payload length followed by a 4-address
747 * header (without QoS field), followed (optionally) by any
748 * WEP/ExtIV header (but only filled in for CCMP).
749 */
a66098da 750 wh = (struct ieee80211_hdr *)skb->data;
ca009301 751
a66098da 752 hdrlen = ieee80211_hdrlen(wh->frame_control);
252486a1
NS		 753 reqd_hdrlen = sizeof(*tr);
754
755 if (hdrlen != reqd_hdrlen)
756 skb_push(skb, reqd_hdrlen - hdrlen);
a66098da 757
ca009301 758 if (ieee80211_is_data_qos(wh->frame_control))
252486a1 759 hdrlen -= IEEE80211_QOS_CTL_LEN;
a66098da
LB		 760
761 tr = (struct mwl8k_dma_data *)skb->data;
762 if (wh != &tr->wh)
763 memmove(&tr->wh, wh, hdrlen);
ca009301
LB		 764 if (hdrlen != sizeof(tr->wh))
765 memset(((void *)&tr->wh) + hdrlen, 0, sizeof(tr->wh) - hdrlen);
a66098da
LB		 766
767 /*
768 * Firmware length is the length of the fully formed "802.11
769 * payload". That is, everything except for the 802.11 header.
770 * This includes all crypto material including the MIC.
771 */
252486a1 772 tr->fwlen = cpu_to_le16(skb->len - sizeof(*tr) + tail_pad);
a66098da
LB		 773}
774
e53d9b96
NS		 775static void mwl8k_encapsulate_tx_frame(struct sk_buff *skb)
776{
777 struct ieee80211_hdr *wh;
778 struct ieee80211_tx_info *tx_info;
779 struct ieee80211_key_conf *key_conf;
780 int data_pad;
781
782 wh = (struct ieee80211_hdr *)skb->data;
783
784 tx_info = IEEE80211_SKB_CB(skb);
785
786 key_conf = NULL;
787 if (ieee80211_is_data(wh->frame_control))
788 key_conf = tx_info->control.hw_key;
789
790 /*
791 * Make sure the packet header is in the DMA header format (4-address
792 * without QoS), the necessary crypto padding between the header and the
793 * payload has already been provided by mac80211, but it doesn't add tail
794 * padding when HW crypto is enabled.
795 *
796 * We have the following trailer padding requirements:
797 * - WEP: 4 trailer bytes (ICV)
798 * - TKIP: 12 trailer bytes (8 MIC + 4 ICV)
799 * - CCMP: 8 trailer bytes (MIC)
800 */
801 data_pad = 0;
802 if (key_conf != NULL) {
803 switch (key_conf->cipher) {
804 case WLAN_CIPHER_SUITE_WEP40:
805 case WLAN_CIPHER_SUITE_WEP104:
806 data_pad = 4;
807 break;
808 case WLAN_CIPHER_SUITE_TKIP:
809 data_pad = 12;
810 break;
811 case WLAN_CIPHER_SUITE_CCMP:
812 data_pad = 8;
813 break;
814 }
815 }
816 mwl8k_add_dma_header(skb, data_pad);
817}
a66098da
LB		 818
819/*
89a91f4f 820 * Packet reception for 88w8366 AP firmware.
6f6d1e9a 821 */
89a91f4f 822struct mwl8k_rxd_8366_ap {
6f6d1e9a
LB		 823 __le16 pkt_len;
824 __u8 sq2;
825 __u8 rate;
826 __le32 pkt_phys_addr;
827 __le32 next_rxd_phys_addr;
828 __le16 qos_control;
829 __le16 htsig2;
830 __le32 hw_rssi_info;
831 __le32 hw_noise_floor_info;
832 __u8 noise_floor;
833 __u8 pad0[3];
834 __u8 rssi;
835 __u8 rx_status;
836 __u8 channel;
837 __u8 rx_ctrl;
ba2d3587 838} __packed;
6f6d1e9a 839
89a91f4f
LB		 840#define MWL8K_8366_AP_RATE_INFO_MCS_FORMAT 0x80
841#define MWL8K_8366_AP_RATE_INFO_40MHZ 0x40
842#define MWL8K_8366_AP_RATE_INFO_RATEID(x) ((x) & 0x3f)
8e9f33f0 843
89a91f4f 844#define MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST 0x80
6f6d1e9a 845
d9a07d49
NS		 846/* 8366 AP rx_status bits */
847#define MWL8K_8366_AP_RXSTAT_DECRYPT_ERR_MASK 0x80
848#define MWL8K_8366_AP_RXSTAT_GENERAL_DECRYPT_ERR 0xFF
849#define MWL8K_8366_AP_RXSTAT_TKIP_DECRYPT_MIC_ERR 0x02
850#define MWL8K_8366_AP_RXSTAT_WEP_DECRYPT_ICV_ERR 0x04
851#define MWL8K_8366_AP_RXSTAT_TKIP_DECRYPT_ICV_ERR 0x08
852
89a91f4f 853static void mwl8k_rxd_8366_ap_init(void *_rxd, dma_addr_t next_dma_addr)
6f6d1e9a 854{
89a91f4f 855 struct mwl8k_rxd_8366_ap *rxd = _rxd;
6f6d1e9a
LB		 856
857 rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
89a91f4f 858 rxd->rx_ctrl = MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST;
6f6d1e9a
LB		 859}
860
89a91f4f 861static void mwl8k_rxd_8366_ap_refill(void *_rxd, dma_addr_t addr, int len)
6f6d1e9a 862{
89a91f4f 863 struct mwl8k_rxd_8366_ap *rxd = _rxd;
6f6d1e9a
LB		 864
865 rxd->pkt_len = cpu_to_le16(len);
866 rxd->pkt_phys_addr = cpu_to_le32(addr);
867 wmb();
868 rxd->rx_ctrl = 0;
869}
870
871static int
89a91f4f 872mwl8k_rxd_8366_ap_process(void *_rxd, struct ieee80211_rx_status *status,
0d462bbb 873 __le16 *qos, s8 *noise)
6f6d1e9a 874{
89a91f4f 875 struct mwl8k_rxd_8366_ap *rxd = _rxd;
6f6d1e9a 876
89a91f4f 877 if (!(rxd->rx_ctrl & MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST))
6f6d1e9a
LB		 878 return -1;
879 rmb();
880
881 memset(status, 0, sizeof(*status));
882
883 status->signal = -rxd->rssi;
0d462bbb 884 *noise = -rxd->noise_floor;
6f6d1e9a 885
89a91f4f 886 if (rxd->rate & MWL8K_8366_AP_RATE_INFO_MCS_FORMAT) {
6f6d1e9a 887 status->flag |= RX_FLAG_HT;
89a91f4f 888 if (rxd->rate & MWL8K_8366_AP_RATE_INFO_40MHZ)
8e9f33f0 889 status->flag |= RX_FLAG_40MHZ;
89a91f4f 890 status->rate_idx = MWL8K_8366_AP_RATE_INFO_RATEID(rxd->rate);
6f6d1e9a
LB		 891 } else {
892 int i;
893
777ad375
LB		 894 for (i = 0; i < ARRAY_SIZE(mwl8k_rates_24); i++) {
895 if (mwl8k_rates_24[i].hw_value == rxd->rate) {
6f6d1e9a
LB		 896 status->rate_idx = i;
897 break;
898 }
899 }
900 }
901
85478344
LB		 902 if (rxd->channel > 14) {
903 status->band = IEEE80211_BAND_5GHZ;
904 if (!(status->flag & RX_FLAG_HT))
905 status->rate_idx -= 5;
906 } else {
907 status->band = IEEE80211_BAND_2GHZ;
908 }
59eb21a6
BR		 909 status->freq = ieee80211_channel_to_frequency(rxd->channel,
910 status->band);
6f6d1e9a 911
20f09c3d
LB		 912 *qos = rxd->qos_control;
913
d9a07d49
NS		 914 if ((rxd->rx_status != MWL8K_8366_AP_RXSTAT_GENERAL_DECRYPT_ERR) &&
915 (rxd->rx_status & MWL8K_8366_AP_RXSTAT_DECRYPT_ERR_MASK) &&
916 (rxd->rx_status & MWL8K_8366_AP_RXSTAT_TKIP_DECRYPT_MIC_ERR))
917 status->flag |= RX_FLAG_MMIC_ERROR;
918
6f6d1e9a
LB		 919 return le16_to_cpu(rxd->pkt_len);
920}
921
89a91f4f
LB		 922static struct rxd_ops rxd_8366_ap_ops = {
923 .rxd_size = sizeof(struct mwl8k_rxd_8366_ap),
924 .rxd_init = mwl8k_rxd_8366_ap_init,
925 .rxd_refill = mwl8k_rxd_8366_ap_refill,
926 .rxd_process = mwl8k_rxd_8366_ap_process,
6f6d1e9a
LB		 927};
928
929/*
89a91f4f 930 * Packet reception for STA firmware.
a66098da 931 */
89a91f4f 932struct mwl8k_rxd_sta {
a66098da
LB		 933 __le16 pkt_len;
934 __u8 link_quality;
935 __u8 noise_level;
936 __le32 pkt_phys_addr;
45eb400d 937 __le32 next_rxd_phys_addr;
a66098da
LB		 938 __le16 qos_control;
939 __le16 rate_info;
940 __le32 pad0[4];
941 __u8 rssi;
942 __u8 channel;
943 __le16 pad1;
944 __u8 rx_ctrl;
945 __u8 rx_status;
946 __u8 pad2[2];
ba2d3587 947} __packed;
a66098da 948
89a91f4f
LB		 949#define MWL8K_STA_RATE_INFO_SHORTPRE 0x8000
950#define MWL8K_STA_RATE_INFO_ANTSELECT(x) (((x) >> 11) & 0x3)
951#define MWL8K_STA_RATE_INFO_RATEID(x) (((x) >> 3) & 0x3f)
952#define MWL8K_STA_RATE_INFO_40MHZ 0x0004
953#define MWL8K_STA_RATE_INFO_SHORTGI 0x0002
954#define MWL8K_STA_RATE_INFO_MCS_FORMAT 0x0001
54bc3a0d 955
89a91f4f 956#define MWL8K_STA_RX_CTRL_OWNED_BY_HOST 0x02
d9a07d49
NS		 957#define MWL8K_STA_RX_CTRL_DECRYPT_ERROR 0x04
958/* ICV=0 or MIC=1 */
959#define MWL8K_STA_RX_CTRL_DEC_ERR_TYPE 0x08
960/* Key is uploaded only in failure case */
961#define MWL8K_STA_RX_CTRL_KEY_INDEX 0x30
54bc3a0d 962
89a91f4f 963static void mwl8k_rxd_sta_init(void *_rxd, dma_addr_t next_dma_addr)
54bc3a0d 964{
89a91f4f 965 struct mwl8k_rxd_sta *rxd = _rxd;
54bc3a0d
LB		 966
967 rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
89a91f4f 968 rxd->rx_ctrl = MWL8K_STA_RX_CTRL_OWNED_BY_HOST;
54bc3a0d
LB		 969}
970
89a91f4f 971static void mwl8k_rxd_sta_refill(void *_rxd, dma_addr_t addr, int len)
54bc3a0d 972{
89a91f4f 973 struct mwl8k_rxd_sta *rxd = _rxd;
54bc3a0d
LB		 974
975 rxd->pkt_len = cpu_to_le16(len);
976 rxd->pkt_phys_addr = cpu_to_le32(addr);
977 wmb();
978 rxd->rx_ctrl = 0;
979}
980
981static int
89a91f4f 982mwl8k_rxd_sta_process(void *_rxd, struct ieee80211_rx_status *status,
0d462bbb 983 __le16 *qos, s8 *noise)
54bc3a0d 984{
89a91f4f 985 struct mwl8k_rxd_sta *rxd = _rxd;
54bc3a0d
LB		 986 u16 rate_info;
987
89a91f4f 988 if (!(rxd->rx_ctrl & MWL8K_STA_RX_CTRL_OWNED_BY_HOST))
54bc3a0d
LB		 989 return -1;
990 rmb();
991
992 rate_info = le16_to_cpu(rxd->rate_info);
993
994 memset(status, 0, sizeof(*status));
995
996 status->signal = -rxd->rssi;
0d462bbb 997 *noise = -rxd->noise_level;
89a91f4f
LB		 998 status->antenna = MWL8K_STA_RATE_INFO_ANTSELECT(rate_info);
999 status->rate_idx = MWL8K_STA_RATE_INFO_RATEID(rate_info);
54bc3a0d 1000
89a91f4f 1001 if (rate_info & MWL8K_STA_RATE_INFO_SHORTPRE)
54bc3a0d 1002 status->flag |= RX_FLAG_SHORTPRE;
89a91f4f 1003 if (rate_info & MWL8K_STA_RATE_INFO_40MHZ)
54bc3a0d 1004 status->flag |= RX_FLAG_40MHZ;
89a91f4f 1005 if (rate_info & MWL8K_STA_RATE_INFO_SHORTGI)
54bc3a0d 1006 status->flag |= RX_FLAG_SHORT_GI;
89a91f4f 1007 if (rate_info & MWL8K_STA_RATE_INFO_MCS_FORMAT)
54bc3a0d
LB		 1008 status->flag |= RX_FLAG_HT;
1009
85478344
LB		 1010 if (rxd->channel > 14) {
1011 status->band = IEEE80211_BAND_5GHZ;
1012 if (!(status->flag & RX_FLAG_HT))
1013 status->rate_idx -= 5;
1014 } else {
1015 status->band = IEEE80211_BAND_2GHZ;
1016 }
59eb21a6
BR		 1017 status->freq = ieee80211_channel_to_frequency(rxd->channel,
1018 status->band);
54bc3a0d 1019
20f09c3d 1020 *qos = rxd->qos_control;
d9a07d49
NS		 1021 if ((rxd->rx_ctrl & MWL8K_STA_RX_CTRL_DECRYPT_ERROR) &&
1022 (rxd->rx_ctrl & MWL8K_STA_RX_CTRL_DEC_ERR_TYPE))
1023 status->flag |= RX_FLAG_MMIC_ERROR;
20f09c3d 1024
54bc3a0d
LB		 1025 return le16_to_cpu(rxd->pkt_len);
1026}
1027
89a91f4f
LB		 1028static struct rxd_ops rxd_sta_ops = {
1029 .rxd_size = sizeof(struct mwl8k_rxd_sta),
1030 .rxd_init = mwl8k_rxd_sta_init,
1031 .rxd_refill = mwl8k_rxd_sta_refill,
1032 .rxd_process = mwl8k_rxd_sta_process,
54bc3a0d
LB		 1033};
1034
1035
a66098da
LB		 1036#define MWL8K_RX_DESCS 256
1037#define MWL8K_RX_MAXSZ 3800
1038
1039static int mwl8k_rxq_init(struct ieee80211_hw *hw, int index)
1040{
1041 struct mwl8k_priv *priv = hw->priv;
1042 struct mwl8k_rx_queue *rxq = priv->rxq + index;
1043 int size;
1044 int i;
1045
45eb400d
LB		 1046 rxq->rxd_count = 0;
1047 rxq->head = 0;
1048 rxq->tail = 0;
a66098da 1049
54bc3a0d 1050 size = MWL8K_RX_DESCS * priv->rxd_ops->rxd_size;
a66098da 1051
45eb400d
LB		 1052 rxq->rxd = pci_alloc_consistent(priv->pdev, size, &rxq->rxd_dma);
1053 if (rxq->rxd == NULL) {
5db55844 1054 wiphy_err(hw->wiphy, "failed to alloc RX descriptors\n");
a66098da
LB		 1055 return -ENOMEM;
1056 }
45eb400d 1057 memset(rxq->rxd, 0, size);
a66098da 1058
788838eb
LB		 1059 rxq->buf = kmalloc(MWL8K_RX_DESCS * sizeof(*rxq->buf), GFP_KERNEL);
1060 if (rxq->buf == NULL) {
5db55844 1061 wiphy_err(hw->wiphy, "failed to alloc RX skbuff list\n");
45eb400d 1062 pci_free_consistent(priv->pdev, size, rxq->rxd, rxq->rxd_dma);
a66098da
LB		 1063 return -ENOMEM;
1064 }
788838eb 1065 memset(rxq->buf, 0, MWL8K_RX_DESCS * sizeof(*rxq->buf));
a66098da
LB		 1066
1067 for (i = 0; i < MWL8K_RX_DESCS; i++) {
54bc3a0d
LB		 1068 int desc_size;
1069 void *rxd;
a66098da 1070 int nexti;
54bc3a0d
LB		 1071 dma_addr_t next_dma_addr;
1072
1073 desc_size = priv->rxd_ops->rxd_size;
1074 rxd = rxq->rxd + (i * priv->rxd_ops->rxd_size);
a66098da 1075
54bc3a0d
LB		 1076 nexti = i + 1;
1077 if (nexti == MWL8K_RX_DESCS)
1078 nexti = 0;
1079 next_dma_addr = rxq->rxd_dma + (nexti * desc_size);
a66098da 1080
54bc3a0d 1081 priv->rxd_ops->rxd_init(rxd, next_dma_addr);
a66098da
LB		 1082 }
1083
1084 return 0;
1085}
1086
1087static int rxq_refill(struct ieee80211_hw *hw, int index, int limit)
1088{
1089 struct mwl8k_priv *priv = hw->priv;
1090 struct mwl8k_rx_queue *rxq = priv->rxq + index;
1091 int refilled;
1092
1093 refilled = 0;
45eb400d 1094 while (rxq->rxd_count < MWL8K_RX_DESCS && limit--) {
a66098da 1095 struct sk_buff *skb;
788838eb 1096 dma_addr_t addr;
a66098da 1097 int rx;
54bc3a0d 1098 void *rxd;
a66098da
LB		 1099
1100 skb = dev_alloc_skb(MWL8K_RX_MAXSZ);
1101 if (skb == NULL)
1102 break;
1103
788838eb
LB		 1104 addr = pci_map_single(priv->pdev, skb->data,
1105 MWL8K_RX_MAXSZ, DMA_FROM_DEVICE);
a66098da 1106
54bc3a0d
LB		 1107 rxq->rxd_count++;
1108 rx = rxq->tail++;
1109 if (rxq->tail == MWL8K_RX_DESCS)
1110 rxq->tail = 0;
788838eb 1111 rxq->buf[rx].skb = skb;
53b1b3e1 1112 dma_unmap_addr_set(&rxq->buf[rx], dma, addr);
54bc3a0d
LB		 1113
1114 rxd = rxq->rxd + (rx * priv->rxd_ops->rxd_size);
1115 priv->rxd_ops->rxd_refill(rxd, addr, MWL8K_RX_MAXSZ);
a66098da
LB		 1116
1117 refilled++;
1118 }
1119
1120 return refilled;
1121}
1122
1123/* Must be called only when the card's reception is completely halted */
1124static void mwl8k_rxq_deinit(struct ieee80211_hw *hw, int index)
1125{
1126 struct mwl8k_priv *priv = hw->priv;
1127 struct mwl8k_rx_queue *rxq = priv->rxq + index;
1128 int i;
1129
1130 for (i = 0; i < MWL8K_RX_DESCS; i++) {
788838eb
LB		 1131 if (rxq->buf[i].skb != NULL) {
1132 pci_unmap_single(priv->pdev,
53b1b3e1 1133 dma_unmap_addr(&rxq->buf[i], dma),
788838eb 1134 MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
53b1b3e1 1135 dma_unmap_addr_set(&rxq->buf[i], dma, 0);
788838eb
LB		 1136
1137 kfree_skb(rxq->buf[i].skb);
1138 rxq->buf[i].skb = NULL;
a66098da
LB		 1139 }
1140 }
1141
788838eb
LB		 1142 kfree(rxq->buf);
1143 rxq->buf = NULL;
a66098da
LB		 1144
1145 pci_free_consistent(priv->pdev,
54bc3a0d 1146 MWL8K_RX_DESCS * priv->rxd_ops->rxd_size,
45eb400d
LB		 1147 rxq->rxd, rxq->rxd_dma);
1148 rxq->rxd = NULL;
a66098da
LB		 1149}
1150
1151
1152/*
1153 * Scan a list of BSSIDs to process for finalize join.
1154 * Allows for extension to process multiple BSSIDs.
1155 */
1156static inline int
1157mwl8k_capture_bssid(struct mwl8k_priv *priv, struct ieee80211_hdr *wh)
1158{
1159 return priv->capture_beacon &&
1160 ieee80211_is_beacon(wh->frame_control) &&
1161 !compare_ether_addr(wh->addr3, priv->capture_bssid);
1162}
1163
3779752d
LB		 1164static inline void mwl8k_save_beacon(struct ieee80211_hw *hw,
1165 struct sk_buff *skb)
a66098da 1166{
3779752d
LB		 1167 struct mwl8k_priv *priv = hw->priv;
1168
a66098da 1169 priv->capture_beacon = false;
d89173f2 1170 memset(priv->capture_bssid, 0, ETH_ALEN);
a66098da
LB		 1171
1172 /*
1173 * Use GFP_ATOMIC as rxq_process is called from
1174 * the primary interrupt handler, memory allocation call
1175 * must not sleep.
1176 */
1177 priv->beacon_skb = skb_copy(skb, GFP_ATOMIC);
1178 if (priv->beacon_skb != NULL)
3779752d 1179 ieee80211_queue_work(hw, &priv->finalize_join_worker);
a66098da
LB		 1180}
1181
d9a07d49
NS		 1182static inline struct mwl8k_vif *mwl8k_find_vif_bss(struct list_head *vif_list,
1183 u8 *bssid)
1184{
1185 struct mwl8k_vif *mwl8k_vif;
1186
1187 list_for_each_entry(mwl8k_vif,
1188 vif_list, list) {
1189 if (memcmp(bssid, mwl8k_vif->bssid,
1190 ETH_ALEN) == 0)
1191 return mwl8k_vif;
1192 }
1193
1194 return NULL;
1195}
1196
a66098da
LB		 1197static int rxq_process(struct ieee80211_hw *hw, int index, int limit)
1198{
1199 struct mwl8k_priv *priv = hw->priv;
d9a07d49 1200 struct mwl8k_vif *mwl8k_vif = NULL;
a66098da
LB		 1201 struct mwl8k_rx_queue *rxq = priv->rxq + index;
1202 int processed;
1203
1204 processed = 0;
45eb400d 1205 while (rxq->rxd_count && limit--) {
a66098da 1206 struct sk_buff *skb;
54bc3a0d
LB		 1207 void *rxd;
1208 int pkt_len;
a66098da 1209 struct ieee80211_rx_status status;
d9a07d49 1210 struct ieee80211_hdr *wh;
20f09c3d 1211 __le16 qos;
a66098da 1212
788838eb 1213 skb = rxq->buf[rxq->head].skb;
d25f9f13
LB		 1214 if (skb == NULL)
1215 break;
54bc3a0d
LB		 1216
1217 rxd = rxq->rxd + (rxq->head * priv->rxd_ops->rxd_size);
1218
0d462bbb
JL		 1219 pkt_len = priv->rxd_ops->rxd_process(rxd, &status, &qos,
1220 &priv->noise);
54bc3a0d
LB		 1221 if (pkt_len < 0)
1222 break;
1223
788838eb
LB		 1224 rxq->buf[rxq->head].skb = NULL;
1225
1226 pci_unmap_single(priv->pdev,
53b1b3e1 1227 dma_unmap_addr(&rxq->buf[rxq->head], dma),
788838eb 1228 MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
53b1b3e1 1229 dma_unmap_addr_set(&rxq->buf[rxq->head], dma, 0);
a66098da 1230
54bc3a0d
LB		 1231 rxq->head++;
1232 if (rxq->head == MWL8K_RX_DESCS)
1233 rxq->head = 0;
1234
45eb400d 1235 rxq->rxd_count--;
a66098da 1236
d9a07d49 1237 wh = &((struct mwl8k_dma_data *)skb->data)->wh;
a66098da 1238
a66098da 1239 /*
c2c357ce
LB		 1240 * Check for a pending join operation. Save a
1241 * copy of the beacon and schedule a tasklet to
1242 * send a FINALIZE_JOIN command to the firmware.
a66098da 1243 */
54bc3a0d 1244 if (mwl8k_capture_bssid(priv, (void *)skb->data))
3779752d 1245 mwl8k_save_beacon(hw, skb);
a66098da 1246
d9a07d49
NS		 1247 if (ieee80211_has_protected(wh->frame_control)) {
1248
1249 /* Check if hw crypto has been enabled for
1250 * this bss. If yes, set the status flags
1251 * accordingly
1252 */
1253 mwl8k_vif = mwl8k_find_vif_bss(&priv->vif_list,
1254 wh->addr1);
1255
1256 if (mwl8k_vif != NULL &&
1257 mwl8k_vif->is_hw_crypto_enabled == true) {
1258 /*
1259 * When MMIC ERROR is encountered
1260 * by the firmware, payload is
1261 * dropped and only 32 bytes of
1262 * mwl8k Firmware header is sent
1263 * to the host.
1264 *
1265 * We need to add four bytes of
1266 * key information. In it
1267 * MAC80211 expects keyidx set to
1268 * 0 for triggering Counter
1269 * Measure of MMIC failure.
1270 */
1271 if (status.flag & RX_FLAG_MMIC_ERROR) {
1272 struct mwl8k_dma_data *tr;
1273 tr = (struct mwl8k_dma_data *)skb->data;
1274 memset((void *)&(tr->data), 0, 4);
1275 pkt_len += 4;
1276 }
1277
1278 if (!ieee80211_is_auth(wh->frame_control))
1279 status.flag |= RX_FLAG_IV_STRIPPED |
1280 RX_FLAG_DECRYPTED |
1281 RX_FLAG_MMIC_STRIPPED;
1282 }
1283 }
1284
1285 skb_put(skb, pkt_len);
1286 mwl8k_remove_dma_header(skb, qos);
f1d58c25
JB		 1287 memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status));
1288 ieee80211_rx_irqsafe(hw, skb);
a66098da
LB		 1289
1290 processed++;
1291 }
1292
1293 return processed;
1294}
1295
1296
1297/*
1298 * Packet transmission.
1299 */
1300
a66098da
LB		 1301#define MWL8K_TXD_STATUS_OK 0x00000001
1302#define MWL8K_TXD_STATUS_OK_RETRY 0x00000002
1303#define MWL8K_TXD_STATUS_OK_MORE_RETRY 0x00000004
1304#define MWL8K_TXD_STATUS_MULTICAST_TX 0x00000008
a66098da 1305#define MWL8K_TXD_STATUS_FW_OWNED 0x80000000
a66098da 1306
e0493a8d
LB		 1307#define MWL8K_QOS_QLEN_UNSPEC 0xff00
1308#define MWL8K_QOS_ACK_POLICY_MASK 0x0060
1309#define MWL8K_QOS_ACK_POLICY_NORMAL 0x0000
1310#define MWL8K_QOS_ACK_POLICY_BLOCKACK 0x0060
1311#define MWL8K_QOS_EOSP 0x0010
1312
a66098da
LB		 1313struct mwl8k_tx_desc {
1314 __le32 status;
1315 __u8 data_rate;
1316 __u8 tx_priority;
1317 __le16 qos_control;
1318 __le32 pkt_phys_addr;
1319 __le16 pkt_len;
d89173f2 1320 __u8 dest_MAC_addr[ETH_ALEN];
45eb400d 1321 __le32 next_txd_phys_addr;
a66098da
LB		 1322 __le32 reserved;
1323 __le16 rate_info;
1324 __u8 peer_id;
a1fe24b0 1325 __u8 tx_frag_cnt;
ba2d3587 1326} __packed;
a66098da
LB		 1327
1328#define MWL8K_TX_DESCS 128
1329
1330static int mwl8k_txq_init(struct ieee80211_hw *hw, int index)
1331{
1332 struct mwl8k_priv *priv = hw->priv;
1333 struct mwl8k_tx_queue *txq = priv->txq + index;
1334 int size;
1335 int i;
1336
8ccbc3b8 1337 txq->len = 0;
45eb400d
LB		 1338 txq->head = 0;
1339 txq->tail = 0;
a66098da
LB		 1340
1341 size = MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc);
1342
45eb400d
LB		 1343 txq->txd = pci_alloc_consistent(priv->pdev, size, &txq->txd_dma);
1344 if (txq->txd == NULL) {
5db55844 1345 wiphy_err(hw->wiphy, "failed to alloc TX descriptors\n");
a66098da
LB		 1346 return -ENOMEM;
1347 }
45eb400d 1348 memset(txq->txd, 0, size);
a66098da 1349
45eb400d
LB		 1350 txq->skb = kmalloc(MWL8K_TX_DESCS * sizeof(*txq->skb), GFP_KERNEL);
1351 if (txq->skb == NULL) {
5db55844 1352 wiphy_err(hw->wiphy, "failed to alloc TX skbuff list\n");
45eb400d 1353 pci_free_consistent(priv->pdev, size, txq->txd, txq->txd_dma);
a66098da
LB		 1354 return -ENOMEM;
1355 }
45eb400d 1356 memset(txq->skb, 0, MWL8K_TX_DESCS * sizeof(*txq->skb));
a66098da
LB		 1357
1358 for (i = 0; i < MWL8K_TX_DESCS; i++) {
1359 struct mwl8k_tx_desc *tx_desc;
1360 int nexti;
1361
45eb400d 1362 tx_desc = txq->txd + i;
a66098da
LB		 1363 nexti = (i + 1) % MWL8K_TX_DESCS;
1364
1365 tx_desc->status = 0;
45eb400d
LB		 1366 tx_desc->next_txd_phys_addr =
1367 cpu_to_le32(txq->txd_dma + nexti * sizeof(*tx_desc));
a66098da
LB		 1368 }
1369
1370 return 0;
1371}
1372
1373static inline void mwl8k_tx_start(struct mwl8k_priv *priv)
1374{
1375 iowrite32(MWL8K_H2A_INT_PPA_READY,
1376 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1377 iowrite32(MWL8K_H2A_INT_DUMMY,
1378 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1379 ioread32(priv->regs + MWL8K_HIU_INT_CODE);
1380}
1381
7e1112d3 1382static void mwl8k_dump_tx_rings(struct ieee80211_hw *hw)
a66098da 1383{
7e1112d3
LB		 1384 struct mwl8k_priv *priv = hw->priv;
1385 int i;
1386
1387 for (i = 0; i < MWL8K_TX_QUEUES; i++) {
1388 struct mwl8k_tx_queue *txq = priv->txq + i;
1389 int fw_owned = 0;
1390 int drv_owned = 0;
1391 int unused = 0;
1392 int desc;
1393
a66098da 1394 for (desc = 0; desc < MWL8K_TX_DESCS; desc++) {
7e1112d3
LB		 1395 struct mwl8k_tx_desc *tx_desc = txq->txd + desc;
1396 u32 status;
a66098da 1397
7e1112d3 1398 status = le32_to_cpu(tx_desc->status);
a66098da 1399 if (status & MWL8K_TXD_STATUS_FW_OWNED)
7e1112d3 1400 fw_owned++;
a66098da 1401 else
7e1112d3 1402 drv_owned++;
a66098da
LB		 1403
1404 if (tx_desc->pkt_len == 0)
7e1112d3 1405 unused++;
a66098da 1406 }
a66098da 1407
c96c31e4
JP		 1408 wiphy_err(hw->wiphy,
1409 "txq[%d] len=%d head=%d tail=%d "
1410 "fw_owned=%d drv_owned=%d unused=%d\n",
1411 i,
1412 txq->len, txq->head, txq->tail,
1413 fw_owned, drv_owned, unused);
7e1112d3 1414 }
a66098da
LB		 1415}
1416
618952a7 1417/*
88de754a 1418 * Must be called with priv->fw_mutex held and tx queues stopped.
618952a7 1419 */
62abd3cf 1420#define MWL8K_TX_WAIT_TIMEOUT_MS 5000
7e1112d3 1421
950d5b01 1422static int mwl8k_tx_wait_empty(struct ieee80211_hw *hw)
a66098da 1423{
a66098da 1424 struct mwl8k_priv *priv = hw->priv;
88de754a 1425 DECLARE_COMPLETION_ONSTACK(tx_wait);
7e1112d3
LB		 1426 int retry;
1427 int rc;
a66098da
LB		 1428
1429 might_sleep();
1430
7e1112d3
LB		 1431 /*
1432 * The TX queues are stopped at this point, so this test
1433 * doesn't need to take ->tx_lock.
1434 */
1435 if (!priv->pending_tx_pkts)
1436 return 0;
1437
1438 retry = 0;
1439 rc = 0;
1440
a66098da 1441 spin_lock_bh(&priv->tx_lock);
7e1112d3
LB		 1442 priv->tx_wait = &tx_wait;
1443 while (!rc) {
1444 int oldcount;
1445 unsigned long timeout;
a66098da 1446
7e1112d3 1447 oldcount = priv->pending_tx_pkts;
a66098da 1448
7e1112d3 1449 spin_unlock_bh(&priv->tx_lock);
88de754a 1450 timeout = wait_for_completion_timeout(&tx_wait,
7e1112d3 1451 msecs_to_jiffies(MWL8K_TX_WAIT_TIMEOUT_MS));
a66098da 1452 spin_lock_bh(&priv->tx_lock);
7e1112d3
LB		 1453
1454 if (timeout) {
1455 WARN_ON(priv->pending_tx_pkts);
1456 if (retry) {
c96c31e4 1457 wiphy_notice(hw->wiphy, "tx rings drained\n");
7e1112d3
LB		 1458 }
1459 break;
1460 }
1461
1462 if (priv->pending_tx_pkts < oldcount) {
c96c31e4
JP		 1463 wiphy_notice(hw->wiphy,
1464 "waiting for tx rings to drain (%d -> %d pkts)\n",
1465 oldcount, priv->pending_tx_pkts);
7e1112d3
LB		 1466 retry = 1;
1467 continue;
1468 }
1469
a66098da 1470 priv->tx_wait = NULL;
a66098da 1471
c96c31e4
JP		 1472 wiphy_err(hw->wiphy, "tx rings stuck for %d ms\n",
1473 MWL8K_TX_WAIT_TIMEOUT_MS);
7e1112d3
LB		 1474 mwl8k_dump_tx_rings(hw);
1475
1476 rc = -ETIMEDOUT;
a66098da 1477 }
7e1112d3 1478 spin_unlock_bh(&priv->tx_lock);
a66098da 1479
7e1112d3 1480 return rc;
a66098da
LB		 1481}
1482
c23b5a69
LB		 1483#define MWL8K_TXD_SUCCESS(status) \
1484 ((status) & (MWL8K_TXD_STATUS_OK | \
1485 MWL8K_TXD_STATUS_OK_RETRY | \
1486 MWL8K_TXD_STATUS_OK_MORE_RETRY))
a66098da 1487
efb7c49a
LB		 1488static int
1489mwl8k_txq_reclaim(struct ieee80211_hw *hw, int index, int limit, int force)
a66098da
LB		 1490{
1491 struct mwl8k_priv *priv = hw->priv;
1492 struct mwl8k_tx_queue *txq = priv->txq + index;
efb7c49a 1493 int processed;
a66098da 1494
efb7c49a 1495 processed = 0;
8ccbc3b8 1496 while (txq->len > 0 && limit--) {
a66098da 1497 int tx;
a66098da
LB		 1498 struct mwl8k_tx_desc *tx_desc;
1499 unsigned long addr;
ce9e2e1b 1500 int size;
a66098da
LB		 1501 struct sk_buff *skb;
1502 struct ieee80211_tx_info *info;
1503 u32 status;
1504
45eb400d
LB		 1505 tx = txq->head;
1506 tx_desc = txq->txd + tx;
a66098da
LB		 1507
1508 status = le32_to_cpu(tx_desc->status);
1509
1510 if (status & MWL8K_TXD_STATUS_FW_OWNED) {
1511 if (!force)
1512 break;
1513 tx_desc->status &=
1514 ~cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED);
1515 }
1516
45eb400d 1517 txq->head = (tx + 1) % MWL8K_TX_DESCS;
8ccbc3b8
KV		 1518 BUG_ON(txq->len == 0);
1519 txq->len--;
a66098da
LB		 1520 priv->pending_tx_pkts--;
1521
1522 addr = le32_to_cpu(tx_desc->pkt_phys_addr);
ce9e2e1b 1523 size = le16_to_cpu(tx_desc->pkt_len);
45eb400d
LB		 1524 skb = txq->skb[tx];
1525 txq->skb[tx] = NULL;
a66098da
LB		 1526
1527 BUG_ON(skb == NULL);
1528 pci_unmap_single(priv->pdev, addr, size, PCI_DMA_TODEVICE);
1529
20f09c3d 1530 mwl8k_remove_dma_header(skb, tx_desc->qos_control);
a66098da
LB		 1531
1532 /* Mark descriptor as unused */
1533 tx_desc->pkt_phys_addr = 0;
1534 tx_desc->pkt_len = 0;
1535
a66098da
LB		 1536 info = IEEE80211_SKB_CB(skb);
1537 ieee80211_tx_info_clear_status(info);
ce9e2e1b 1538 if (MWL8K_TXD_SUCCESS(status))
a66098da 1539 info->flags |= IEEE80211_TX_STAT_ACK;
a66098da
LB		 1540
1541 ieee80211_tx_status_irqsafe(hw, skb);
1542
efb7c49a 1543 processed++;
a66098da
LB		 1544 }
1545
efb7c49a 1546 if (processed && priv->radio_on && !mutex_is_locked(&priv->fw_mutex))
a66098da 1547 ieee80211_wake_queue(hw, index);
efb7c49a
LB		 1548
1549 return processed;
a66098da
LB		 1550}
1551
1552/* must be called only when the card's transmit is completely halted */
1553static void mwl8k_txq_deinit(struct ieee80211_hw *hw, int index)
1554{
1555 struct mwl8k_priv *priv = hw->priv;
1556 struct mwl8k_tx_queue *txq = priv->txq + index;
1557
efb7c49a 1558 mwl8k_txq_reclaim(hw, index, INT_MAX, 1);
a66098da 1559
45eb400d
LB		 1560 kfree(txq->skb);
1561 txq->skb = NULL;
a66098da
LB		 1562
1563 pci_free_consistent(priv->pdev,
1564 MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc),
45eb400d
LB		 1565 txq->txd, txq->txd_dma);
1566 txq->txd = NULL;
a66098da
LB		 1567}
1568
1569static int
1570mwl8k_txq_xmit(struct ieee80211_hw *hw, int index, struct sk_buff *skb)
1571{
1572 struct mwl8k_priv *priv = hw->priv;
1573 struct ieee80211_tx_info *tx_info;
23b33906 1574 struct mwl8k_vif *mwl8k_vif;
a66098da
LB		 1575 struct ieee80211_hdr *wh;
1576 struct mwl8k_tx_queue *txq;
1577 struct mwl8k_tx_desc *tx;
a66098da 1578 dma_addr_t dma;
23b33906
LB		 1579 u32 txstatus;
1580 u8 txdatarate;
1581 u16 qos;
a66098da 1582
23b33906
LB		 1583 wh = (struct ieee80211_hdr *)skb->data;
1584 if (ieee80211_is_data_qos(wh->frame_control))
1585 qos = le16_to_cpu(*((__le16 *)ieee80211_get_qos_ctl(wh)));
1586 else
1587 qos = 0;
a66098da 1588
d9a07d49
NS		 1589 if (priv->ap_fw)
1590 mwl8k_encapsulate_tx_frame(skb);
1591 else
1592 mwl8k_add_dma_header(skb, 0);
1593
23b33906 1594 wh = &((struct mwl8k_dma_data *)skb->data)->wh;
a66098da
LB		 1595
1596 tx_info = IEEE80211_SKB_CB(skb);
1597 mwl8k_vif = MWL8K_VIF(tx_info->control.vif);
a66098da
LB		 1598
1599 if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
a66098da 1600 wh->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
657232b6
LB		 1601 wh->seq_ctrl |= cpu_to_le16(mwl8k_vif->seqno);
1602 mwl8k_vif->seqno += 0x10;
a66098da
LB		 1603 }
1604
23b33906
LB		 1605 /* Setup firmware control bit fields for each frame type. */
1606 txstatus = 0;
1607 txdatarate = 0;
1608 if (ieee80211_is_mgmt(wh->frame_control) ||
1609 ieee80211_is_ctl(wh->frame_control)) {
1610 txdatarate = 0;
e0493a8d 1611 qos |= MWL8K_QOS_QLEN_UNSPEC | MWL8K_QOS_EOSP;
23b33906
LB		 1612 } else if (ieee80211_is_data(wh->frame_control)) {
1613 txdatarate = 1;
1614 if (is_multicast_ether_addr(wh->addr1))
1615 txstatus |= MWL8K_TXD_STATUS_MULTICAST_TX;
1616
e0493a8d 1617 qos &= ~MWL8K_QOS_ACK_POLICY_MASK;
23b33906 1618 if (tx_info->flags & IEEE80211_TX_CTL_AMPDU)
e0493a8d 1619 qos |= MWL8K_QOS_ACK_POLICY_BLOCKACK;
23b33906 1620 else
e0493a8d 1621 qos |= MWL8K_QOS_ACK_POLICY_NORMAL;
23b33906 1622 }
a66098da
LB		 1623
1624 dma = pci_map_single(priv->pdev, skb->data,
1625 skb->len, PCI_DMA_TODEVICE);
1626
1627 if (pci_dma_mapping_error(priv->pdev, dma)) {
c96c31e4
JP		 1628 wiphy_debug(hw->wiphy,
1629 "failed to dma map skb, dropping TX frame.\n");
23b33906 1630 dev_kfree_skb(skb);
a66098da
LB		 1631 return NETDEV_TX_OK;
1632 }
1633
23b33906 1634 spin_lock_bh(&priv->tx_lock);
a66098da 1635
23b33906 1636 txq = priv->txq + index;
a66098da 1637
45eb400d
LB		 1638 BUG_ON(txq->skb[txq->tail] != NULL);
1639 txq->skb[txq->tail] = skb;
a66098da 1640
45eb400d 1641 tx = txq->txd + txq->tail;
23b33906
LB		 1642 tx->data_rate = txdatarate;
1643 tx->tx_priority = index;
a66098da 1644 tx->qos_control = cpu_to_le16(qos);
a66098da
LB		 1645 tx->pkt_phys_addr = cpu_to_le32(dma);
1646 tx->pkt_len = cpu_to_le16(skb->len);
23b33906 1647 tx->rate_info = 0;
a680400e
LB		 1648 if (!priv->ap_fw && tx_info->control.sta != NULL)
1649 tx->peer_id = MWL8K_STA(tx_info->control.sta)->peer_id;
1650 else
1651 tx->peer_id = 0;
a66098da 1652 wmb();
23b33906
LB		 1653 tx->status = cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED | txstatus);
1654
8ccbc3b8 1655 txq->len++;
a66098da 1656 priv->pending_tx_pkts++;
a66098da 1657
45eb400d
LB		 1658 txq->tail++;
1659 if (txq->tail == MWL8K_TX_DESCS)
1660 txq->tail = 0;
23b33906 1661
45eb400d 1662 if (txq->head == txq->tail)
a66098da
LB		 1663 ieee80211_stop_queue(hw, index);
1664
23b33906 1665 mwl8k_tx_start(priv);
a66098da
LB		 1666
1667 spin_unlock_bh(&priv->tx_lock);
1668
1669 return NETDEV_TX_OK;
1670}
1671
1672
618952a7
LB		 1673/*
1674 * Firmware access.
1675 *
1676 * We have the following requirements for issuing firmware commands:
1677 * - Some commands require that the packet transmit path is idle when
1678 * the command is issued. (For simplicity, we'll just quiesce the
1679 * transmit path for every command.)
1680 * - There are certain sequences of commands that need to be issued to
1681 * the hardware sequentially, with no other intervening commands.
1682 *
1683 * This leads to an implementation of a "firmware lock" as a mutex that
1684 * can be taken recursively, and which is taken by both the low-level
1685 * command submission function (mwl8k_post_cmd) as well as any users of
1686 * that function that require issuing of an atomic sequence of commands,
1687 * and quiesces the transmit path whenever it's taken.
1688 */
1689static int mwl8k_fw_lock(struct ieee80211_hw *hw)
1690{
1691 struct mwl8k_priv *priv = hw->priv;
1692
1693 if (priv->fw_mutex_owner != current) {
1694 int rc;
1695
1696 mutex_lock(&priv->fw_mutex);
1697 ieee80211_stop_queues(hw);
1698
1699 rc = mwl8k_tx_wait_empty(hw);
1700 if (rc) {
1701 ieee80211_wake_queues(hw);
1702 mutex_unlock(&priv->fw_mutex);
1703
1704 return rc;
1705 }
1706
1707 priv->fw_mutex_owner = current;
1708 }
1709
1710 priv->fw_mutex_depth++;
1711
1712 return 0;
1713}
1714
1715static void mwl8k_fw_unlock(struct ieee80211_hw *hw)
1716{
1717 struct mwl8k_priv *priv = hw->priv;
1718
1719 if (!--priv->fw_mutex_depth) {
1720 ieee80211_wake_queues(hw);
1721 priv->fw_mutex_owner = NULL;
1722 mutex_unlock(&priv->fw_mutex);
1723 }
1724}
1725
1726
a66098da
LB		 1727/*
1728 * Command processing.
1729 */
1730
0c9cc640
LB		 1731/* Timeout firmware commands after 10s */
1732#define MWL8K_CMD_TIMEOUT_MS 10000
a66098da
LB		 1733
1734static int mwl8k_post_cmd(struct ieee80211_hw *hw, struct mwl8k_cmd_pkt *cmd)
1735{
1736 DECLARE_COMPLETION_ONSTACK(cmd_wait);
1737 struct mwl8k_priv *priv = hw->priv;
1738 void __iomem *regs = priv->regs;
1739 dma_addr_t dma_addr;
1740 unsigned int dma_size;
1741 int rc;
a66098da
LB		 1742 unsigned long timeout = 0;
1743 u8 buf[32];
1744
b603742f 1745 cmd->result = (__force __le16) 0xffff;
a66098da
LB		 1746 dma_size = le16_to_cpu(cmd->length);
1747 dma_addr = pci_map_single(priv->pdev, cmd, dma_size,
1748 PCI_DMA_BIDIRECTIONAL);
1749 if (pci_dma_mapping_error(priv->pdev, dma_addr))
1750 return -ENOMEM;
1751
618952a7 1752 rc = mwl8k_fw_lock(hw);
39a1e42e
LB		 1753 if (rc) {
1754 pci_unmap_single(priv->pdev, dma_addr, dma_size,
1755 PCI_DMA_BIDIRECTIONAL);
618952a7 1756 return rc;
39a1e42e 1757 }
a66098da 1758
a66098da
LB		 1759 priv->hostcmd_wait = &cmd_wait;
1760 iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
1761 iowrite32(MWL8K_H2A_INT_DOORBELL,
1762 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1763 iowrite32(MWL8K_H2A_INT_DUMMY,
1764 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
a66098da
LB		 1765
1766 timeout = wait_for_completion_timeout(&cmd_wait,
1767 msecs_to_jiffies(MWL8K_CMD_TIMEOUT_MS));
1768
618952a7
LB		 1769 priv->hostcmd_wait = NULL;
1770
1771 mwl8k_fw_unlock(hw);
1772
37055bd4
LB		 1773 pci_unmap_single(priv->pdev, dma_addr, dma_size,
1774 PCI_DMA_BIDIRECTIONAL);
1775
a66098da 1776 if (!timeout) {
5db55844 1777 wiphy_err(hw->wiphy, "Command %s timeout after %u ms\n",
c96c31e4
JP		 1778 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
1779 MWL8K_CMD_TIMEOUT_MS);
a66098da
LB		 1780 rc = -ETIMEDOUT;
1781 } else {
0c9cc640
LB		 1782 int ms;
1783
1784 ms = MWL8K_CMD_TIMEOUT_MS - jiffies_to_msecs(timeout);
1785
ce9e2e1b 1786 rc = cmd->result ? -EINVAL : 0;
a66098da 1787 if (rc)
5db55844 1788 wiphy_err(hw->wiphy, "Command %s error 0x%x\n",
c96c31e4
JP		 1789 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
1790 le16_to_cpu(cmd->result));
0c9cc640 1791 else if (ms > 2000)
5db55844 1792 wiphy_notice(hw->wiphy, "Command %s took %d ms\n",
c96c31e4
JP		 1793 mwl8k_cmd_name(cmd->code,
1794 buf, sizeof(buf)),
1795 ms);
a66098da
LB		 1796 }
1797
a66098da
LB		 1798 return rc;
1799}
1800
f57ca9c1
LB		 1801static int mwl8k_post_pervif_cmd(struct ieee80211_hw *hw,
1802 struct ieee80211_vif *vif,
1803 struct mwl8k_cmd_pkt *cmd)
1804{
1805 if (vif != NULL)
1806 cmd->macid = MWL8K_VIF(vif)->macid;
1807 return mwl8k_post_cmd(hw, cmd);
1808}
1809
1349ad2f
LB		 1810/*
1811 * Setup code shared between STA and AP firmware images.
1812 */
1813static void mwl8k_setup_2ghz_band(struct ieee80211_hw *hw)
1814{
1815 struct mwl8k_priv *priv = hw->priv;
1816
1817 BUILD_BUG_ON(sizeof(priv->channels_24) != sizeof(mwl8k_channels_24));
1818 memcpy(priv->channels_24, mwl8k_channels_24, sizeof(mwl8k_channels_24));
1819
1820 BUILD_BUG_ON(sizeof(priv->rates_24) != sizeof(mwl8k_rates_24));
1821 memcpy(priv->rates_24, mwl8k_rates_24, sizeof(mwl8k_rates_24));
1822
1823 priv->band_24.band = IEEE80211_BAND_2GHZ;
1824 priv->band_24.channels = priv->channels_24;
1825 priv->band_24.n_channels = ARRAY_SIZE(mwl8k_channels_24);
1826 priv->band_24.bitrates = priv->rates_24;
1827 priv->band_24.n_bitrates = ARRAY_SIZE(mwl8k_rates_24);
1828
1829 hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band_24;
1830}
1831
4eae9edd
LB		 1832static void mwl8k_setup_5ghz_band(struct ieee80211_hw *hw)
1833{
1834 struct mwl8k_priv *priv = hw->priv;
1835
1836 BUILD_BUG_ON(sizeof(priv->channels_50) != sizeof(mwl8k_channels_50));
1837 memcpy(priv->channels_50, mwl8k_channels_50, sizeof(mwl8k_channels_50));
1838
1839 BUILD_BUG_ON(sizeof(priv->rates_50) != sizeof(mwl8k_rates_50));
1840 memcpy(priv->rates_50, mwl8k_rates_50, sizeof(mwl8k_rates_50));
1841
1842 priv->band_50.band = IEEE80211_BAND_5GHZ;
1843 priv->band_50.channels = priv->channels_50;
1844 priv->band_50.n_channels = ARRAY_SIZE(mwl8k_channels_50);
1845 priv->band_50.bitrates = priv->rates_50;
1846 priv->band_50.n_bitrates = ARRAY_SIZE(mwl8k_rates_50);
1847
1848 hw->wiphy->bands[IEEE80211_BAND_5GHZ] = &priv->band_50;
1849}
1850
a66098da 1851/*
04b147b1 1852 * CMD_GET_HW_SPEC (STA version).
a66098da 1853 */
04b147b1 1854struct mwl8k_cmd_get_hw_spec_sta {
a66098da
LB		 1855 struct mwl8k_cmd_pkt header;
1856 __u8 hw_rev;
1857 __u8 host_interface;
1858 __le16 num_mcaddrs;
d89173f2 1859 __u8 perm_addr[ETH_ALEN];
a66098da
LB		 1860 __le16 region_code;
1861 __le32 fw_rev;
1862 __le32 ps_cookie;
1863 __le32 caps;
1864 __u8 mcs_bitmap[16];
1865 __le32 rx_queue_ptr;
1866 __le32 num_tx_queues;
1867 __le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
1868 __le32 caps2;
1869 __le32 num_tx_desc_per_queue;
45eb400d 1870 __le32 total_rxd;
ba2d3587 1871} __packed;
a66098da 1872
341c9791
LB		 1873#define MWL8K_CAP_MAX_AMSDU 0x20000000
1874#define MWL8K_CAP_GREENFIELD 0x08000000
1875#define MWL8K_CAP_AMPDU 0x04000000
1876#define MWL8K_CAP_RX_STBC 0x01000000
1877#define MWL8K_CAP_TX_STBC 0x00800000
1878#define MWL8K_CAP_SHORTGI_40MHZ 0x00400000
1879#define MWL8K_CAP_SHORTGI_20MHZ 0x00200000
1880#define MWL8K_CAP_RX_ANTENNA_MASK 0x000e0000
1881#define MWL8K_CAP_TX_ANTENNA_MASK 0x0001c000
1882#define MWL8K_CAP_DELAY_BA 0x00003000
1883#define MWL8K_CAP_MIMO 0x00000200
1884#define MWL8K_CAP_40MHZ 0x00000100
06953235
LB		 1885#define MWL8K_CAP_BAND_MASK 0x00000007
1886#define MWL8K_CAP_5GHZ 0x00000004
1887#define MWL8K_CAP_2GHZ4 0x00000001
341c9791 1888
06953235
LB		 1889static void
1890mwl8k_set_ht_caps(struct ieee80211_hw *hw,
1891 struct ieee80211_supported_band *band, u32 cap)
341c9791 1892{
341c9791
LB		 1893 int rx_streams;
1894 int tx_streams;
1895
777ad375 1896 band->ht_cap.ht_supported = 1;
341c9791
LB		 1897
1898 if (cap & MWL8K_CAP_MAX_AMSDU)
777ad375 1899 band->ht_cap.cap |= IEEE80211_HT_CAP_MAX_AMSDU;
341c9791 1900 if (cap & MWL8K_CAP_GREENFIELD)
777ad375 1901 band->ht_cap.cap |= IEEE80211_HT_CAP_GRN_FLD;
341c9791
LB		 1902 if (cap & MWL8K_CAP_AMPDU) {
1903 hw->flags |= IEEE80211_HW_AMPDU_AGGREGATION;
777ad375
LB		 1904 band->ht_cap.ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
1905 band->ht_cap.ampdu_density = IEEE80211_HT_MPDU_DENSITY_NONE;
341c9791
LB		 1906 }
1907 if (cap & MWL8K_CAP_RX_STBC)
777ad375 1908 band->ht_cap.cap |= IEEE80211_HT_CAP_RX_STBC;
341c9791 1909 if (cap & MWL8K_CAP_TX_STBC)
777ad375 1910 band->ht_cap.cap |= IEEE80211_HT_CAP_TX_STBC;
341c9791 1911 if (cap & MWL8K_CAP_SHORTGI_40MHZ)
777ad375 1912 band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_40;
341c9791 1913 if (cap & MWL8K_CAP_SHORTGI_20MHZ)
777ad375 1914 band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_20;
341c9791 1915 if (cap & MWL8K_CAP_DELAY_BA)
777ad375 1916 band->ht_cap.cap |= IEEE80211_HT_CAP_DELAY_BA;
341c9791 1917 if (cap & MWL8K_CAP_40MHZ)
777ad375 1918 band->ht_cap.cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
341c9791
LB		 1919
1920 rx_streams = hweight32(cap & MWL8K_CAP_RX_ANTENNA_MASK);
1921 tx_streams = hweight32(cap & MWL8K_CAP_TX_ANTENNA_MASK);
1922
777ad375 1923 band->ht_cap.mcs.rx_mask[0] = 0xff;
341c9791 1924 if (rx_streams >= 2)
777ad375 1925 band->ht_cap.mcs.rx_mask[1] = 0xff;
341c9791 1926 if (rx_streams >= 3)
777ad375
LB		 1927 band->ht_cap.mcs.rx_mask[2] = 0xff;
1928 band->ht_cap.mcs.rx_mask[4] = 0x01;
1929 band->ht_cap.mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
341c9791
LB		 1930
1931 if (rx_streams != tx_streams) {
777ad375
LB		 1932 band->ht_cap.mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
1933 band->ht_cap.mcs.tx_params |= (tx_streams - 1) <<
341c9791
LB		 1934 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
1935 }
1936}
1937
06953235
LB		 1938static void
1939mwl8k_set_caps(struct ieee80211_hw *hw, u32 caps)
1940{
1941 struct mwl8k_priv *priv = hw->priv;
1942
1943 if ((caps & MWL8K_CAP_2GHZ4) || !(caps & MWL8K_CAP_BAND_MASK)) {
1944 mwl8k_setup_2ghz_band(hw);
1945 if (caps & MWL8K_CAP_MIMO)
1946 mwl8k_set_ht_caps(hw, &priv->band_24, caps);
1947 }
1948
1949 if (caps & MWL8K_CAP_5GHZ) {
1950 mwl8k_setup_5ghz_band(hw);
1951 if (caps & MWL8K_CAP_MIMO)
1952 mwl8k_set_ht_caps(hw, &priv->band_50, caps);
1953 }
1954}
1955
04b147b1 1956static int mwl8k_cmd_get_hw_spec_sta(struct ieee80211_hw *hw)
a66098da
LB		 1957{
1958 struct mwl8k_priv *priv = hw->priv;
04b147b1 1959 struct mwl8k_cmd_get_hw_spec_sta *cmd;
a66098da
LB		 1960 int rc;
1961 int i;
1962
1963 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1964 if (cmd == NULL)
1965 return -ENOMEM;
1966
1967 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
1968 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1969
1970 memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
1971 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
45eb400d 1972 cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
4ff6432e 1973 cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES);
a66098da 1974 for (i = 0; i < MWL8K_TX_QUEUES; i++)
45eb400d 1975 cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma);
4ff6432e 1976 cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
45eb400d 1977 cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
a66098da
LB		 1978
1979 rc = mwl8k_post_cmd(hw, &cmd->header);
1980
1981 if (!rc) {
1982 SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
1983 priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
4ff6432e 1984 priv->fw_rev = le32_to_cpu(cmd->fw_rev);
a66098da 1985 priv->hw_rev = cmd->hw_rev;
06953235 1986 mwl8k_set_caps(hw, le32_to_cpu(cmd->caps));
ee0ddf18
LB		 1987 priv->ap_macids_supported = 0x00000000;
1988 priv->sta_macids_supported = 0x00000001;
a66098da
LB		 1989 }
1990
1991 kfree(cmd);
1992 return rc;
1993}
1994
42fba21d
LB		 1995/*
1996 * CMD_GET_HW_SPEC (AP version).
1997 */
1998struct mwl8k_cmd_get_hw_spec_ap {
1999 struct mwl8k_cmd_pkt header;
2000 __u8 hw_rev;
2001 __u8 host_interface;
2002 __le16 num_wcb;
2003 __le16 num_mcaddrs;
2004 __u8 perm_addr[ETH_ALEN];
2005 __le16 region_code;
2006 __le16 num_antenna;
2007 __le32 fw_rev;
2008 __le32 wcbbase0;
2009 __le32 rxwrptr;
2010 __le32 rxrdptr;
2011 __le32 ps_cookie;
2012 __le32 wcbbase1;
2013 __le32 wcbbase2;
2014 __le32 wcbbase3;
952a0e96 2015 __le32 fw_api_version;
ba2d3587 2016} __packed;
42fba21d
LB		 2017
2018static int mwl8k_cmd_get_hw_spec_ap(struct ieee80211_hw *hw)
2019{
2020 struct mwl8k_priv *priv = hw->priv;
2021 struct mwl8k_cmd_get_hw_spec_ap *cmd;
2022 int rc;
952a0e96 2023 u32 api_version;
42fba21d
LB		 2024
2025 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2026 if (cmd == NULL)
2027 return -ENOMEM;
2028
2029 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
2030 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2031
2032 memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
2033 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
2034
2035 rc = mwl8k_post_cmd(hw, &cmd->header);
2036
2037 if (!rc) {
2038 int off;
2039
952a0e96
BC		 2040 api_version = le32_to_cpu(cmd->fw_api_version);
2041 if (priv->device_info->fw_api_ap != api_version) {
2042 printk(KERN_ERR "%s: Unsupported fw API version for %s."
2043 " Expected %d got %d.\n", MWL8K_NAME,
2044 priv->device_info->part_name,
2045 priv->device_info->fw_api_ap,
2046 api_version);
2047 rc = -EINVAL;
2048 goto done;
2049 }
42fba21d
LB		 2050 SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
2051 priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
2052 priv->fw_rev = le32_to_cpu(cmd->fw_rev);
2053 priv->hw_rev = cmd->hw_rev;
1349ad2f 2054 mwl8k_setup_2ghz_band(hw);
ee0ddf18
LB		 2055 priv->ap_macids_supported = 0x000000ff;
2056 priv->sta_macids_supported = 0x00000000;
42fba21d
LB		 2057
2058 off = le32_to_cpu(cmd->wcbbase0) & 0xffff;
b603742f 2059 iowrite32(priv->txq[0].txd_dma, priv->sram + off);
42fba21d
LB		 2060
2061 off = le32_to_cpu(cmd->rxwrptr) & 0xffff;
b603742f 2062 iowrite32(priv->rxq[0].rxd_dma, priv->sram + off);
42fba21d
LB		 2063
2064 off = le32_to_cpu(cmd->rxrdptr) & 0xffff;
b603742f 2065 iowrite32(priv->rxq[0].rxd_dma, priv->sram + off);
42fba21d
LB		 2066
2067 off = le32_to_cpu(cmd->wcbbase1) & 0xffff;
b603742f 2068 iowrite32(priv->txq[1].txd_dma, priv->sram + off);
42fba21d
LB		 2069
2070 off = le32_to_cpu(cmd->wcbbase2) & 0xffff;
b603742f 2071 iowrite32(priv->txq[2].txd_dma, priv->sram + off);
42fba21d
LB		 2072
2073 off = le32_to_cpu(cmd->wcbbase3) & 0xffff;
b603742f 2074 iowrite32(priv->txq[3].txd_dma, priv->sram + off);
42fba21d
LB		 2075 }
2076
952a0e96 2077done:
42fba21d
LB		 2078 kfree(cmd);
2079 return rc;
2080}
2081
2082/*
2083 * CMD_SET_HW_SPEC.
2084 */
2085struct mwl8k_cmd_set_hw_spec {
2086 struct mwl8k_cmd_pkt header;
2087 __u8 hw_rev;
2088 __u8 host_interface;
2089 __le16 num_mcaddrs;
2090 __u8 perm_addr[ETH_ALEN];
2091 __le16 region_code;
2092 __le32 fw_rev;
2093 __le32 ps_cookie;
2094 __le32 caps;
2095 __le32 rx_queue_ptr;
2096 __le32 num_tx_queues;
2097 __le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
2098 __le32 flags;
2099 __le32 num_tx_desc_per_queue;
2100 __le32 total_rxd;
ba2d3587 2101} __packed;
42fba21d 2102
b64fe619
LB		 2103#define MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT 0x00000080
2104#define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP 0x00000020
2105#define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON 0x00000010
42fba21d
LB		 2106
2107static int mwl8k_cmd_set_hw_spec(struct ieee80211_hw *hw)
2108{
2109 struct mwl8k_priv *priv = hw->priv;
2110 struct mwl8k_cmd_set_hw_spec *cmd;
2111 int rc;
2112 int i;
2113
2114 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2115 if (cmd == NULL)
2116 return -ENOMEM;
2117
2118 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_HW_SPEC);
2119 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2120
2121 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
2122 cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
2123 cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES);
2124 for (i = 0; i < MWL8K_TX_QUEUES; i++)
2125 cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma);
b64fe619
LB		 2126 cmd->flags = cpu_to_le32(MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT |
2127 MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP |
2128 MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON);
42fba21d
LB		 2129 cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
2130 cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
2131
2132 rc = mwl8k_post_cmd(hw, &cmd->header);
2133 kfree(cmd);
2134
2135 return rc;
2136}
2137
a66098da
LB		 2138/*
2139 * CMD_MAC_MULTICAST_ADR.
2140 */
2141struct mwl8k_cmd_mac_multicast_adr {
2142 struct mwl8k_cmd_pkt header;
2143 __le16 action;
2144 __le16 numaddr;
ce9e2e1b 2145 __u8 addr[0][ETH_ALEN];
a66098da
LB		 2146};
2147
d5e30845
LB		 2148#define MWL8K_ENABLE_RX_DIRECTED 0x0001
2149#define MWL8K_ENABLE_RX_MULTICAST 0x0002
2150#define MWL8K_ENABLE_RX_ALL_MULTICAST 0x0004
2151#define MWL8K_ENABLE_RX_BROADCAST 0x0008
ce9e2e1b 2152
e81cd2d6 2153static struct mwl8k_cmd_pkt *
447ced07 2154__mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw *hw, int allmulti,
22bedad3 2155 struct netdev_hw_addr_list *mc_list)
a66098da 2156{
e81cd2d6 2157 struct mwl8k_priv *priv = hw->priv;
a66098da 2158 struct mwl8k_cmd_mac_multicast_adr *cmd;
e81cd2d6 2159 int size;
22bedad3
JP		 2160 int mc_count = 0;
2161
2162 if (mc_list)
2163 mc_count = netdev_hw_addr_list_count(mc_list);
e81cd2d6 2164
447ced07 2165 if (allmulti || mc_count > priv->num_mcaddrs) {
d5e30845
LB		 2166 allmulti = 1;
2167 mc_count = 0;
2168 }
e81cd2d6
LB		 2169
2170 size = sizeof(*cmd) + mc_count * ETH_ALEN;
ce9e2e1b 2171
e81cd2d6 2172 cmd = kzalloc(size, GFP_ATOMIC);
a66098da 2173 if (cmd == NULL)
e81cd2d6 2174 return NULL;
a66098da
LB		 2175
2176 cmd->header.code = cpu_to_le16(MWL8K_CMD_MAC_MULTICAST_ADR);
2177 cmd->header.length = cpu_to_le16(size);
d5e30845
LB		 2178 cmd->action = cpu_to_le16(MWL8K_ENABLE_RX_DIRECTED |
2179 MWL8K_ENABLE_RX_BROADCAST);
2180
2181 if (allmulti) {
2182 cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_ALL_MULTICAST);
2183 } else if (mc_count) {
22bedad3
JP		 2184 struct netdev_hw_addr *ha;
2185 int i = 0;
d5e30845
LB		 2186
2187 cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_MULTICAST);
2188 cmd->numaddr = cpu_to_le16(mc_count);
22bedad3
JP		 2189 netdev_hw_addr_list_for_each(ha, mc_list) {
2190 memcpy(cmd->addr[i], ha->addr, ETH_ALEN);
a66098da 2191 }
a66098da
LB		 2192 }
2193
e81cd2d6 2194 return &cmd->header;
a66098da
LB		 2195}
2196
2197/*
55489b6e 2198 * CMD_GET_STAT.
a66098da 2199 */
55489b6e 2200struct mwl8k_cmd_get_stat {
a66098da 2201 struct mwl8k_cmd_pkt header;
a66098da 2202 __le32 stats[64];
ba2d3587 2203} __packed;
a66098da
LB		 2204
2205#define MWL8K_STAT_ACK_FAILURE 9
2206#define MWL8K_STAT_RTS_FAILURE 12
2207#define MWL8K_STAT_FCS_ERROR 24
2208#define MWL8K_STAT_RTS_SUCCESS 11
2209
55489b6e
LB		 2210static int mwl8k_cmd_get_stat(struct ieee80211_hw *hw,
2211 struct ieee80211_low_level_stats *stats)
a66098da 2212{
55489b6e 2213 struct mwl8k_cmd_get_stat *cmd;
a66098da
LB		 2214 int rc;
2215
2216 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2217 if (cmd == NULL)
2218 return -ENOMEM;
2219
2220 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_STAT);
2221 cmd->header.length = cpu_to_le16(sizeof(*cmd));
a66098da
LB		 2222
2223 rc = mwl8k_post_cmd(hw, &cmd->header);
2224 if (!rc) {
2225 stats->dot11ACKFailureCount =
2226 le32_to_cpu(cmd->stats[MWL8K_STAT_ACK_FAILURE]);
2227 stats->dot11RTSFailureCount =
2228 le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_FAILURE]);
2229 stats->dot11FCSErrorCount =
2230 le32_to_cpu(cmd->stats[MWL8K_STAT_FCS_ERROR]);
2231 stats->dot11RTSSuccessCount =
2232 le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_SUCCESS]);
2233 }
2234 kfree(cmd);
2235
2236 return rc;
2237}
2238
2239/*
55489b6e 2240 * CMD_RADIO_CONTROL.
a66098da 2241 */
55489b6e 2242struct mwl8k_cmd_radio_control {
a66098da
LB		 2243 struct mwl8k_cmd_pkt header;
2244 __le16 action;
2245 __le16 control;
2246 __le16 radio_on;
ba2d3587 2247} __packed;
a66098da 2248
c46563b7 2249static int
55489b6e 2250mwl8k_cmd_radio_control(struct ieee80211_hw *hw, bool enable, bool force)
a66098da
LB		 2251{
2252 struct mwl8k_priv *priv = hw->priv;
55489b6e 2253 struct mwl8k_cmd_radio_control *cmd;
a66098da
LB		 2254 int rc;
2255
c46563b7 2256 if (enable == priv->radio_on && !force)
a66098da
LB		 2257 return 0;
2258
a66098da
LB		 2259 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2260 if (cmd == NULL)
2261 return -ENOMEM;
2262
2263 cmd->header.code = cpu_to_le16(MWL8K_CMD_RADIO_CONTROL);
2264 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2265 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
68ce3884 2266 cmd->control = cpu_to_le16(priv->radio_short_preamble ? 3 : 1);
a66098da
LB		 2267 cmd->radio_on = cpu_to_le16(enable ? 0x0001 : 0x0000);
2268
2269 rc = mwl8k_post_cmd(hw, &cmd->header);
2270 kfree(cmd);
2271
2272 if (!rc)
c46563b7 2273 priv->radio_on = enable;
a66098da
LB		 2274
2275 return rc;
2276}
2277
55489b6e 2278static int mwl8k_cmd_radio_disable(struct ieee80211_hw *hw)
c46563b7 2279{
55489b6e 2280 return mwl8k_cmd_radio_control(hw, 0, 0);
c46563b7
LB		 2281}
2282
55489b6e 2283static int mwl8k_cmd_radio_enable(struct ieee80211_hw *hw)
c46563b7 2284{
55489b6e 2285 return mwl8k_cmd_radio_control(hw, 1, 0);
c46563b7
LB		 2286}
2287
a66098da
LB		 2288static int
2289mwl8k_set_radio_preamble(struct ieee80211_hw *hw, bool short_preamble)
2290{
99200a99 2291 struct mwl8k_priv *priv = hw->priv;
a66098da 2292
68ce3884 2293 priv->radio_short_preamble = short_preamble;
a66098da 2294
55489b6e 2295 return mwl8k_cmd_radio_control(hw, 1, 1);
a66098da
LB		 2296}
2297
2298/*
55489b6e 2299 * CMD_RF_TX_POWER.
a66098da 2300 */
41fdf097 2301#define MWL8K_RF_TX_POWER_LEVEL_TOTAL 8
a66098da 2302
55489b6e 2303struct mwl8k_cmd_rf_tx_power {
a66098da
LB		 2304 struct mwl8k_cmd_pkt header;
2305 __le16 action;
2306 __le16 support_level;
2307 __le16 current_level;
2308 __le16 reserved;
41fdf097 2309 __le16 power_level_list[MWL8K_RF_TX_POWER_LEVEL_TOTAL];
ba2d3587 2310} __packed;
a66098da 2311
55489b6e 2312static int mwl8k_cmd_rf_tx_power(struct ieee80211_hw *hw, int dBm)
a66098da 2313{
55489b6e 2314 struct mwl8k_cmd_rf_tx_power *cmd;
a66098da
LB		 2315 int rc;
2316
2317 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2318 if (cmd == NULL)
2319 return -ENOMEM;
2320
2321 cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_TX_POWER);
2322 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2323 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2324 cmd->support_level = cpu_to_le16(dBm);
2325
2326 rc = mwl8k_post_cmd(hw, &cmd->header);
2327 kfree(cmd);
2328
2329 return rc;
2330}
2331
41fdf097
NS		 2332/*
2333 * CMD_TX_POWER.
2334 */
2335#define MWL8K_TX_POWER_LEVEL_TOTAL 12
2336
2337struct mwl8k_cmd_tx_power {
2338 struct mwl8k_cmd_pkt header;
2339 __le16 action;
2340 __le16 band;
2341 __le16 channel;
2342 __le16 bw;
2343 __le16 sub_ch;
2344 __le16 power_level_list[MWL8K_TX_POWER_LEVEL_TOTAL];
2345} __attribute__((packed));
2346
2347static int mwl8k_cmd_tx_power(struct ieee80211_hw *hw,
2348 struct ieee80211_conf *conf,
2349 unsigned short pwr)
2350{
2351 struct ieee80211_channel *channel = conf->channel;
2352 struct mwl8k_cmd_tx_power *cmd;
2353 int rc;
2354 int i;
2355
2356 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2357 if (cmd == NULL)
2358 return -ENOMEM;
2359
2360 cmd->header.code = cpu_to_le16(MWL8K_CMD_TX_POWER);
2361 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2362 cmd->action = cpu_to_le16(MWL8K_CMD_SET_LIST);
2363
2364 if (channel->band == IEEE80211_BAND_2GHZ)
2365 cmd->band = cpu_to_le16(0x1);
2366 else if (channel->band == IEEE80211_BAND_5GHZ)
2367 cmd->band = cpu_to_le16(0x4);
2368
2369 cmd->channel = channel->hw_value;
2370
2371 if (conf->channel_type == NL80211_CHAN_NO_HT ||
2372 conf->channel_type == NL80211_CHAN_HT20) {
2373 cmd->bw = cpu_to_le16(0x2);
2374 } else {
2375 cmd->bw = cpu_to_le16(0x4);
2376 if (conf->channel_type == NL80211_CHAN_HT40MINUS)
2377 cmd->sub_ch = cpu_to_le16(0x3);
2378 else if (conf->channel_type == NL80211_CHAN_HT40PLUS)
2379 cmd->sub_ch = cpu_to_le16(0x1);
2380 }
2381
2382 for (i = 0; i < MWL8K_TX_POWER_LEVEL_TOTAL; i++)
2383 cmd->power_level_list[i] = cpu_to_le16(pwr);
2384
2385 rc = mwl8k_post_cmd(hw, &cmd->header);
2386 kfree(cmd);
2387
2388 return rc;
2389}
2390
08b06347
LB		 2391/*
2392 * CMD_RF_ANTENNA.
2393 */
2394struct mwl8k_cmd_rf_antenna {
2395 struct mwl8k_cmd_pkt header;
2396 __le16 antenna;
2397 __le16 mode;
ba2d3587 2398} __packed;
08b06347
LB		 2399
2400#define MWL8K_RF_ANTENNA_RX 1
2401#define MWL8K_RF_ANTENNA_TX 2
2402
2403static int
2404mwl8k_cmd_rf_antenna(struct ieee80211_hw *hw, int antenna, int mask)
2405{
2406 struct mwl8k_cmd_rf_antenna *cmd;
2407 int rc;
2408
2409 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2410 if (cmd == NULL)
2411 return -ENOMEM;
2412
2413 cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_ANTENNA);
2414 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2415 cmd->antenna = cpu_to_le16(antenna);
2416 cmd->mode = cpu_to_le16(mask);
2417
2418 rc = mwl8k_post_cmd(hw, &cmd->header);
2419 kfree(cmd);
2420
2421 return rc;
2422}
2423
b64fe619
LB		 2424/*
2425 * CMD_SET_BEACON.
2426 */
2427struct mwl8k_cmd_set_beacon {
2428 struct mwl8k_cmd_pkt header;
2429 __le16 beacon_len;
2430 __u8 beacon[0];
2431};
2432
aa21d0f6
LB		 2433static int mwl8k_cmd_set_beacon(struct ieee80211_hw *hw,
2434 struct ieee80211_vif *vif, u8 *beacon, int len)
b64fe619
LB		 2435{
2436 struct mwl8k_cmd_set_beacon *cmd;
2437 int rc;
2438
2439 cmd = kzalloc(sizeof(*cmd) + len, GFP_KERNEL);
2440 if (cmd == NULL)
2441 return -ENOMEM;
2442
2443 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_BEACON);
2444 cmd->header.length = cpu_to_le16(sizeof(*cmd) + len);
2445 cmd->beacon_len = cpu_to_le16(len);
2446 memcpy(cmd->beacon, beacon, len);
2447
aa21d0f6 2448 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
b64fe619
LB		 2449 kfree(cmd);
2450
2451 return rc;
2452}
2453
a66098da
LB		 2454/*
2455 * CMD_SET_PRE_SCAN.
2456 */
2457struct mwl8k_cmd_set_pre_scan {
2458 struct mwl8k_cmd_pkt header;
ba2d3587 2459} __packed;
a66098da
LB		 2460
2461static int mwl8k_cmd_set_pre_scan(struct ieee80211_hw *hw)
2462{
2463 struct mwl8k_cmd_set_pre_scan *cmd;
2464 int rc;
2465
2466 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2467 if (cmd == NULL)
2468 return -ENOMEM;
2469
2470 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_PRE_SCAN);
2471 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2472
2473 rc = mwl8k_post_cmd(hw, &cmd->header);
2474 kfree(cmd);
2475
2476 return rc;
2477}
2478
2479/*
2480 * CMD_SET_POST_SCAN.
2481 */
2482struct mwl8k_cmd_set_post_scan {
2483 struct mwl8k_cmd_pkt header;
2484 __le32 isibss;
d89173f2 2485 __u8 bssid[ETH_ALEN];
ba2d3587 2486} __packed;
a66098da
LB		 2487
2488static int
0a11dfc3 2489mwl8k_cmd_set_post_scan(struct ieee80211_hw *hw, const __u8 *mac)
a66098da
LB		 2490{
2491 struct mwl8k_cmd_set_post_scan *cmd;
2492 int rc;
2493
2494 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2495 if (cmd == NULL)
2496 return -ENOMEM;
2497
2498 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_POST_SCAN);
2499 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2500 cmd->isibss = 0;
d89173f2 2501 memcpy(cmd->bssid, mac, ETH_ALEN);
a66098da
LB		 2502
2503 rc = mwl8k_post_cmd(hw, &cmd->header);
2504 kfree(cmd);
2505
2506 return rc;
2507}
2508
2509/*
2510 * CMD_SET_RF_CHANNEL.
2511 */
2512struct mwl8k_cmd_set_rf_channel {
2513 struct mwl8k_cmd_pkt header;
2514 __le16 action;
2515 __u8 current_channel;
2516 __le32 channel_flags;
ba2d3587 2517} __packed;
a66098da
LB		 2518
2519static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw *hw,
610677d2 2520 struct ieee80211_conf *conf)
a66098da 2521{
610677d2 2522 struct ieee80211_channel *channel = conf->channel;
a66098da
LB		 2523 struct mwl8k_cmd_set_rf_channel *cmd;
2524 int rc;
2525
2526 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2527 if (cmd == NULL)
2528 return -ENOMEM;
2529
2530 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RF_CHANNEL);
2531 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2532 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2533 cmd->current_channel = channel->hw_value;
610677d2 2534
a66098da 2535 if (channel->band == IEEE80211_BAND_2GHZ)
610677d2 2536 cmd->channel_flags |= cpu_to_le32(0x00000001);
42574ea2
LB		 2537 else if (channel->band == IEEE80211_BAND_5GHZ)
2538 cmd->channel_flags |= cpu_to_le32(0x00000004);
610677d2
LB		 2539
2540 if (conf->channel_type == NL80211_CHAN_NO_HT ||
2541 conf->channel_type == NL80211_CHAN_HT20)
2542 cmd->channel_flags |= cpu_to_le32(0x00000080);
2543 else if (conf->channel_type == NL80211_CHAN_HT40MINUS)
2544 cmd->channel_flags |= cpu_to_le32(0x000001900);
2545 else if (conf->channel_type == NL80211_CHAN_HT40PLUS)
2546 cmd->channel_flags |= cpu_to_le32(0x000000900);
a66098da
LB		 2547
2548 rc = mwl8k_post_cmd(hw, &cmd->header);
2549 kfree(cmd);
2550
2551 return rc;
2552}
2553
2554/*
55489b6e 2555 * CMD_SET_AID.
a66098da 2556 */
55489b6e
LB		 2557#define MWL8K_FRAME_PROT_DISABLED 0x00
2558#define MWL8K_FRAME_PROT_11G 0x07
2559#define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02
2560#define MWL8K_FRAME_PROT_11N_HT_ALL 0x06
a66098da 2561
55489b6e
LB		 2562struct mwl8k_cmd_update_set_aid {
2563 struct mwl8k_cmd_pkt header;
2564 __le16 aid;
a66098da 2565
55489b6e
LB		 2566 /* AP's MAC address (BSSID) */
2567 __u8 bssid[ETH_ALEN];
2568 __le16 protection_mode;
2569 __u8 supp_rates[14];
ba2d3587 2570} __packed;
a66098da 2571
c6e96010
LB		 2572static void legacy_rate_mask_to_array(u8 *rates, u32 mask)
2573{
2574 int i;
2575 int j;
2576
2577 /*
2578 * Clear nonstandard rates 4 and 13.
2579 */
2580 mask &= 0x1fef;
2581
2582 for (i = 0, j = 0; i < 14; i++) {
2583 if (mask & (1 << i))
777ad375 2584 rates[j++] = mwl8k_rates_24[i].hw_value;
c6e96010
LB		 2585 }
2586}
2587
55489b6e 2588static int
c6e96010
LB		 2589mwl8k_cmd_set_aid(struct ieee80211_hw *hw,
2590 struct ieee80211_vif *vif, u32 legacy_rate_mask)
a66098da 2591{
55489b6e
LB		 2592 struct mwl8k_cmd_update_set_aid *cmd;
2593 u16 prot_mode;
a66098da
LB		 2594 int rc;
2595
2596 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2597 if (cmd == NULL)
2598 return -ENOMEM;
2599
55489b6e 2600 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_AID);
a66098da 2601 cmd->header.length = cpu_to_le16(sizeof(*cmd));
7dc6a7a7 2602 cmd->aid = cpu_to_le16(vif->bss_conf.aid);
0a11dfc3 2603 memcpy(cmd->bssid, vif->bss_conf.bssid, ETH_ALEN);
a66098da 2604
7dc6a7a7 2605 if (vif->bss_conf.use_cts_prot) {
55489b6e
LB		 2606 prot_mode = MWL8K_FRAME_PROT_11G;
2607 } else {
7dc6a7a7 2608 switch (vif->bss_conf.ht_operation_mode &
55489b6e
LB		 2609 IEEE80211_HT_OP_MODE_PROTECTION) {
2610 case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ:
2611 prot_mode = MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY;
2612 break;
2613 case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED:
2614 prot_mode = MWL8K_FRAME_PROT_11N_HT_ALL;
2615 break;
2616 default:
2617 prot_mode = MWL8K_FRAME_PROT_DISABLED;
2618 break;
2619 }
2620 }
2621 cmd->protection_mode = cpu_to_le16(prot_mode);
a66098da 2622
c6e96010 2623 legacy_rate_mask_to_array(cmd->supp_rates, legacy_rate_mask);
a66098da
LB		 2624
2625 rc = mwl8k_post_cmd(hw, &cmd->header);
2626 kfree(cmd);
2627
2628 return rc;
2629}
2630
32060e1b 2631/*
55489b6e 2632 * CMD_SET_RATE.
32060e1b 2633 */
55489b6e
LB		 2634struct mwl8k_cmd_set_rate {
2635 struct mwl8k_cmd_pkt header;
2636 __u8 legacy_rates[14];
2637
2638 /* Bitmap for supported MCS codes. */
2639 __u8 mcs_set[16];
2640 __u8 reserved[16];
ba2d3587 2641} __packed;
32060e1b 2642
55489b6e 2643static int
c6e96010 2644mwl8k_cmd_set_rate(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
13935e2c 2645 u32 legacy_rate_mask, u8 *mcs_rates)
32060e1b 2646{
55489b6e 2647 struct mwl8k_cmd_set_rate *cmd;
32060e1b
LB		 2648 int rc;
2649
2650 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2651 if (cmd == NULL)
2652 return -ENOMEM;
2653
55489b6e 2654 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATE);
32060e1b 2655 cmd->header.length = cpu_to_le16(sizeof(*cmd));
c6e96010 2656 legacy_rate_mask_to_array(cmd->legacy_rates, legacy_rate_mask);
13935e2c 2657 memcpy(cmd->mcs_set, mcs_rates, 16);
32060e1b
LB		 2658
2659 rc = mwl8k_post_cmd(hw, &cmd->header);
2660 kfree(cmd);
2661
2662 return rc;
2663}
2664
a66098da 2665/*
55489b6e 2666 * CMD_FINALIZE_JOIN.
a66098da 2667 */
55489b6e
LB		 2668#define MWL8K_FJ_BEACON_MAXLEN 128
2669
2670struct mwl8k_cmd_finalize_join {
a66098da 2671 struct mwl8k_cmd_pkt header;
55489b6e
LB		 2672 __le32 sleep_interval; /* Number of beacon periods to sleep */
2673 __u8 beacon_data[MWL8K_FJ_BEACON_MAXLEN];
ba2d3587 2674} __packed;
a66098da 2675
55489b6e
LB		 2676static int mwl8k_cmd_finalize_join(struct ieee80211_hw *hw, void *frame,
2677 int framelen, int dtim)
a66098da 2678{
55489b6e
LB		 2679 struct mwl8k_cmd_finalize_join *cmd;
2680 struct ieee80211_mgmt *payload = frame;
2681 int payload_len;
a66098da
LB		 2682 int rc;
2683
2684 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2685 if (cmd == NULL)
2686 return -ENOMEM;
2687
55489b6e 2688 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_FINALIZE_JOIN);
a66098da 2689 cmd->header.length = cpu_to_le16(sizeof(*cmd));
55489b6e
LB		 2690 cmd->sleep_interval = cpu_to_le32(dtim ? dtim : 1);
2691
2692 payload_len = framelen - ieee80211_hdrlen(payload->frame_control);
2693 if (payload_len < 0)
2694 payload_len = 0;
2695 else if (payload_len > MWL8K_FJ_BEACON_MAXLEN)
2696 payload_len = MWL8K_FJ_BEACON_MAXLEN;
2697
2698 memcpy(cmd->beacon_data, &payload->u.beacon, payload_len);
a66098da
LB		 2699
2700 rc = mwl8k_post_cmd(hw, &cmd->header);
2701 kfree(cmd);
2702
2703 return rc;
2704}
2705
2706/*
55489b6e 2707 * CMD_SET_RTS_THRESHOLD.
a66098da 2708 */
55489b6e 2709struct mwl8k_cmd_set_rts_threshold {
a66098da
LB		 2710 struct mwl8k_cmd_pkt header;
2711 __le16 action;
55489b6e 2712 __le16 threshold;
ba2d3587 2713} __packed;
a66098da 2714
c2c2b12a
LB		 2715static int
2716mwl8k_cmd_set_rts_threshold(struct ieee80211_hw *hw, int rts_thresh)
a66098da 2717{
55489b6e 2718 struct mwl8k_cmd_set_rts_threshold *cmd;
a66098da
LB		 2719 int rc;
2720
2721 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2722 if (cmd == NULL)
2723 return -ENOMEM;
2724
55489b6e 2725 cmd->header.code = cpu_to_le16(MWL8K_CMD_RTS_THRESHOLD);
a66098da 2726 cmd->header.length = cpu_to_le16(sizeof(*cmd));
c2c2b12a
LB		 2727 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2728 cmd->threshold = cpu_to_le16(rts_thresh);
a66098da
LB		 2729
2730 rc = mwl8k_post_cmd(hw, &cmd->header);
2731 kfree(cmd);
2732
a66098da
LB		 2733 return rc;
2734}
2735
2736/*
55489b6e 2737 * CMD_SET_SLOT.
a66098da 2738 */
55489b6e 2739struct mwl8k_cmd_set_slot {
a66098da
LB		 2740 struct mwl8k_cmd_pkt header;
2741 __le16 action;
55489b6e 2742 __u8 short_slot;
ba2d3587 2743} __packed;
a66098da 2744
55489b6e 2745static int mwl8k_cmd_set_slot(struct ieee80211_hw *hw, bool short_slot_time)
a66098da 2746{
55489b6e 2747 struct mwl8k_cmd_set_slot *cmd;
a66098da
LB		 2748 int rc;
2749
2750 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2751 if (cmd == NULL)
2752 return -ENOMEM;
2753
55489b6e 2754 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_SLOT);
a66098da 2755 cmd->header.length = cpu_to_le16(sizeof(*cmd));
55489b6e
LB		 2756 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2757 cmd->short_slot = short_slot_time;
a66098da
LB		 2758
2759 rc = mwl8k_post_cmd(hw, &cmd->header);
2760 kfree(cmd);
2761
2762 return rc;
2763}
2764
2765/*
2766 * CMD_SET_EDCA_PARAMS.
2767 */
2768struct mwl8k_cmd_set_edca_params {
2769 struct mwl8k_cmd_pkt header;
2770
2771 /* See MWL8K_SET_EDCA_XXX below */
2772 __le16 action;
2773
2774 /* TX opportunity in units of 32 us */
2775 __le16 txop;
2776
2e484c89
LB		 2777 union {
2778 struct {
2779 /* Log exponent of max contention period: 0...15 */
2780 __le32 log_cw_max;
2781
2782 /* Log exponent of min contention period: 0...15 */
2783 __le32 log_cw_min;
2784
2785 /* Adaptive interframe spacing in units of 32us */
2786 __u8 aifs;
2787
2788 /* TX queue to configure */
2789 __u8 txq;
2790 } ap;
2791 struct {
2792 /* Log exponent of max contention period: 0...15 */
2793 __u8 log_cw_max;
a66098da 2794
2e484c89
LB		 2795 /* Log exponent of min contention period: 0...15 */
2796 __u8 log_cw_min;
a66098da 2797
2e484c89
LB		 2798 /* Adaptive interframe spacing in units of 32us */
2799 __u8 aifs;
a66098da 2800
2e484c89
LB		 2801 /* TX queue to configure */
2802 __u8 txq;
2803 } sta;
2804 };
ba2d3587 2805} __packed;
a66098da 2806
a66098da
LB		 2807#define MWL8K_SET_EDCA_CW 0x01
2808#define MWL8K_SET_EDCA_TXOP 0x02
2809#define MWL8K_SET_EDCA_AIFS 0x04
2810
2811#define MWL8K_SET_EDCA_ALL (MWL8K_SET_EDCA_CW | \
2812 MWL8K_SET_EDCA_TXOP | \
2813 MWL8K_SET_EDCA_AIFS)
2814
2815static int
55489b6e
LB		 2816mwl8k_cmd_set_edca_params(struct ieee80211_hw *hw, __u8 qnum,
2817 __u16 cw_min, __u16 cw_max,
2818 __u8 aifs, __u16 txop)
a66098da 2819{
2e484c89 2820 struct mwl8k_priv *priv = hw->priv;
a66098da 2821 struct mwl8k_cmd_set_edca_params *cmd;
a66098da
LB		 2822 int rc;
2823
2824 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2825 if (cmd == NULL)
2826 return -ENOMEM;
2827
a66098da
LB		 2828 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_EDCA_PARAMS);
2829 cmd->header.length = cpu_to_le16(sizeof(*cmd));
a66098da
LB		 2830 cmd->action = cpu_to_le16(MWL8K_SET_EDCA_ALL);
2831 cmd->txop = cpu_to_le16(txop);
2e484c89
LB		 2832 if (priv->ap_fw) {
2833 cmd->ap.log_cw_max = cpu_to_le32(ilog2(cw_max + 1));
2834 cmd->ap.log_cw_min = cpu_to_le32(ilog2(cw_min + 1));
2835 cmd->ap.aifs = aifs;
2836 cmd->ap.txq = qnum;
2837 } else {
2838 cmd->sta.log_cw_max = (u8)ilog2(cw_max + 1);
2839 cmd->sta.log_cw_min = (u8)ilog2(cw_min + 1);
2840 cmd->sta.aifs = aifs;
2841 cmd->sta.txq = qnum;
2842 }
a66098da
LB		 2843
2844 rc = mwl8k_post_cmd(hw, &cmd->header);
2845 kfree(cmd);
2846
2847 return rc;
2848}
2849
2850/*
55489b6e 2851 * CMD_SET_WMM_MODE.
a66098da 2852 */
55489b6e 2853struct mwl8k_cmd_set_wmm_mode {
a66098da 2854 struct mwl8k_cmd_pkt header;
55489b6e 2855 __le16 action;
ba2d3587 2856} __packed;
a66098da 2857
55489b6e 2858static int mwl8k_cmd_set_wmm_mode(struct ieee80211_hw *hw, bool enable)
a66098da 2859{
55489b6e
LB		 2860 struct mwl8k_priv *priv = hw->priv;
2861 struct mwl8k_cmd_set_wmm_mode *cmd;
a66098da
LB		 2862 int rc;
2863
a66098da
LB		 2864 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2865 if (cmd == NULL)
2866 return -ENOMEM;
2867
55489b6e 2868 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_WMM_MODE);
a66098da 2869 cmd->header.length = cpu_to_le16(sizeof(*cmd));
55489b6e 2870 cmd->action = cpu_to_le16(!!enable);
a66098da
LB		 2871
2872 rc = mwl8k_post_cmd(hw, &cmd->header);
2873 kfree(cmd);
16cec43d 2874
55489b6e
LB		 2875 if (!rc)
2876 priv->wmm_enabled = enable;
a66098da
LB		 2877
2878 return rc;
2879}
2880
2881/*
55489b6e 2882 * CMD_MIMO_CONFIG.
a66098da 2883 */
55489b6e
LB		 2884struct mwl8k_cmd_mimo_config {
2885 struct mwl8k_cmd_pkt header;
2886 __le32 action;
2887 __u8 rx_antenna_map;
2888 __u8 tx_antenna_map;
ba2d3587 2889} __packed;
a66098da 2890
55489b6e 2891static int mwl8k_cmd_mimo_config(struct ieee80211_hw *hw, __u8 rx, __u8 tx)
a66098da 2892{
55489b6e 2893 struct mwl8k_cmd_mimo_config *cmd;
a66098da
LB		 2894 int rc;
2895
2896 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2897 if (cmd == NULL)
2898 return -ENOMEM;
2899
55489b6e 2900 cmd->header.code = cpu_to_le16(MWL8K_CMD_MIMO_CONFIG);
a66098da 2901 cmd->header.length = cpu_to_le16(sizeof(*cmd));
55489b6e
LB		 2902 cmd->action = cpu_to_le32((u32)MWL8K_CMD_SET);
2903 cmd->rx_antenna_map = rx;
2904 cmd->tx_antenna_map = tx;
a66098da
LB		 2905
2906 rc = mwl8k_post_cmd(hw, &cmd->header);
2907 kfree(cmd);
2908
2909 return rc;
2910}
2911
2912/*
b71ed2c6 2913 * CMD_USE_FIXED_RATE (STA version).
a66098da 2914 */
b71ed2c6
LB		 2915struct mwl8k_cmd_use_fixed_rate_sta {
2916 struct mwl8k_cmd_pkt header;
2917 __le32 action;
2918 __le32 allow_rate_drop;
2919 __le32 num_rates;
2920 struct {
2921 __le32 is_ht_rate;
2922 __le32 enable_retry;
2923 __le32 rate;
2924 __le32 retry_count;
2925 } rate_entry[8];
2926 __le32 rate_type;
2927 __le32 reserved1;
2928 __le32 reserved2;
ba2d3587 2929} __packed;
a66098da 2930
b71ed2c6
LB		 2931#define MWL8K_USE_AUTO_RATE 0x0002
2932#define MWL8K_UCAST_RATE 0
a66098da 2933
b71ed2c6 2934static int mwl8k_cmd_use_fixed_rate_sta(struct ieee80211_hw *hw)
a66098da 2935{
b71ed2c6 2936 struct mwl8k_cmd_use_fixed_rate_sta *cmd;
a66098da
LB		 2937 int rc;
2938
2939 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2940 if (cmd == NULL)
2941 return -ENOMEM;
2942
2943 cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
2944 cmd->header.length = cpu_to_le16(sizeof(*cmd));
b71ed2c6
LB		 2945 cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE);
2946 cmd->rate_type = cpu_to_le32(MWL8K_UCAST_RATE);
a66098da
LB		 2947
2948 rc = mwl8k_post_cmd(hw, &cmd->header);
2949 kfree(cmd);
2950
2951 return rc;
2952}
2953
088aab8b
LB		 2954/*
2955 * CMD_USE_FIXED_RATE (AP version).
2956 */
2957struct mwl8k_cmd_use_fixed_rate_ap {
2958 struct mwl8k_cmd_pkt header;
2959 __le32 action;
2960 __le32 allow_rate_drop;
2961 __le32 num_rates;
2962 struct mwl8k_rate_entry_ap {
2963 __le32 is_ht_rate;
2964 __le32 enable_retry;
2965 __le32 rate;
2966 __le32 retry_count;
2967 } rate_entry[4];
2968 u8 multicast_rate;
2969 u8 multicast_rate_type;
2970 u8 management_rate;
ba2d3587 2971} __packed;
088aab8b
LB		 2972
2973static int
2974mwl8k_cmd_use_fixed_rate_ap(struct ieee80211_hw *hw, int mcast, int mgmt)
2975{
2976 struct mwl8k_cmd_use_fixed_rate_ap *cmd;
2977 int rc;
2978
2979 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2980 if (cmd == NULL)
2981 return -ENOMEM;
2982
2983 cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
2984 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2985 cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE);
2986 cmd->multicast_rate = mcast;
2987 cmd->management_rate = mgmt;
2988
2989 rc = mwl8k_post_cmd(hw, &cmd->header);
2990 kfree(cmd);
2991
2992 return rc;
2993}
2994
55489b6e
LB		 2995/*
2996 * CMD_ENABLE_SNIFFER.
2997 */
2998struct mwl8k_cmd_enable_sniffer {
2999 struct mwl8k_cmd_pkt header;
3000 __le32 action;
ba2d3587 3001} __packed;
55489b6e
LB		 3002
3003static int mwl8k_cmd_enable_sniffer(struct ieee80211_hw *hw, bool enable)
3004{
3005 struct mwl8k_cmd_enable_sniffer *cmd;
3006 int rc;
3007
3008 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3009 if (cmd == NULL)
3010 return -ENOMEM;
3011
3012 cmd->header.code = cpu_to_le16(MWL8K_CMD_ENABLE_SNIFFER);
3013 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3014 cmd->action = cpu_to_le32(!!enable);
3015
3016 rc = mwl8k_post_cmd(hw, &cmd->header);
3017 kfree(cmd);
3018
3019 return rc;
3020}
3021
3022/*
3023 * CMD_SET_MAC_ADDR.
3024 */
3025struct mwl8k_cmd_set_mac_addr {
3026 struct mwl8k_cmd_pkt header;
3027 union {
3028 struct {
3029 __le16 mac_type;
3030 __u8 mac_addr[ETH_ALEN];
3031 } mbss;
3032 __u8 mac_addr[ETH_ALEN];
3033 };
ba2d3587 3034} __packed;
55489b6e 3035
ee0ddf18
LB		 3036#define MWL8K_MAC_TYPE_PRIMARY_CLIENT 0
3037#define MWL8K_MAC_TYPE_SECONDARY_CLIENT 1
3038#define MWL8K_MAC_TYPE_PRIMARY_AP 2
3039#define MWL8K_MAC_TYPE_SECONDARY_AP 3
a9e00b15 3040
aa21d0f6
LB		 3041static int mwl8k_cmd_set_mac_addr(struct ieee80211_hw *hw,
3042 struct ieee80211_vif *vif, u8 *mac)
55489b6e
LB		 3043{
3044 struct mwl8k_priv *priv = hw->priv;
ee0ddf18 3045 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
55489b6e 3046 struct mwl8k_cmd_set_mac_addr *cmd;
ee0ddf18 3047 int mac_type;
55489b6e
LB		 3048 int rc;
3049
ee0ddf18
LB		 3050 mac_type = MWL8K_MAC_TYPE_PRIMARY_AP;
3051 if (vif != NULL && vif->type == NL80211_IFTYPE_STATION) {
3052 if (mwl8k_vif->macid + 1 == ffs(priv->sta_macids_supported))
3053 mac_type = MWL8K_MAC_TYPE_PRIMARY_CLIENT;
3054 else
3055 mac_type = MWL8K_MAC_TYPE_SECONDARY_CLIENT;
3056 } else if (vif != NULL && vif->type == NL80211_IFTYPE_AP) {
3057 if (mwl8k_vif->macid + 1 == ffs(priv->ap_macids_supported))
3058 mac_type = MWL8K_MAC_TYPE_PRIMARY_AP;
3059 else
3060 mac_type = MWL8K_MAC_TYPE_SECONDARY_AP;
3061 }
3062
55489b6e
LB		 3063 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3064 if (cmd == NULL)
3065 return -ENOMEM;
3066
3067 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_MAC_ADDR);
3068 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3069 if (priv->ap_fw) {
ee0ddf18 3070 cmd->mbss.mac_type = cpu_to_le16(mac_type);
55489b6e
LB		 3071 memcpy(cmd->mbss.mac_addr, mac, ETH_ALEN);
3072 } else {
3073 memcpy(cmd->mac_addr, mac, ETH_ALEN);
3074 }
3075
aa21d0f6 3076 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
55489b6e
LB		 3077 kfree(cmd);
3078
3079 return rc;
3080}
3081
3082/*
3083 * CMD_SET_RATEADAPT_MODE.
3084 */
3085struct mwl8k_cmd_set_rate_adapt_mode {
3086 struct mwl8k_cmd_pkt header;
3087 __le16 action;
3088 __le16 mode;
ba2d3587 3089} __packed;
55489b6e
LB		 3090
3091static int mwl8k_cmd_set_rateadapt_mode(struct ieee80211_hw *hw, __u16 mode)
3092{
3093 struct mwl8k_cmd_set_rate_adapt_mode *cmd;
3094 int rc;
3095
3096 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3097 if (cmd == NULL)
3098 return -ENOMEM;
3099
3100 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATEADAPT_MODE);
3101 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3102 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
3103 cmd->mode = cpu_to_le16(mode);
3104
3105 rc = mwl8k_post_cmd(hw, &cmd->header);
3106 kfree(cmd);
3107
3108 return rc;
3109}
3110
b64fe619
LB		 3111/*
3112 * CMD_BSS_START.
3113 */
3114struct mwl8k_cmd_bss_start {
3115 struct mwl8k_cmd_pkt header;
3116 __le32 enable;
ba2d3587 3117} __packed;
b64fe619 3118
aa21d0f6
LB		 3119static int mwl8k_cmd_bss_start(struct ieee80211_hw *hw,
3120 struct ieee80211_vif *vif, int enable)
b64fe619
LB		 3121{
3122 struct mwl8k_cmd_bss_start *cmd;
3123 int rc;
3124
3125 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3126 if (cmd == NULL)
3127 return -ENOMEM;
3128
3129 cmd->header.code = cpu_to_le16(MWL8K_CMD_BSS_START);
3130 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3131 cmd->enable = cpu_to_le32(enable);
3132
aa21d0f6 3133 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
b64fe619
LB		 3134 kfree(cmd);
3135
3136 return rc;
3137}
3138
3f5610ff
LB		 3139/*
3140 * CMD_SET_NEW_STN.
3141 */
3142struct mwl8k_cmd_set_new_stn {
3143 struct mwl8k_cmd_pkt header;
3144 __le16 aid;
3145 __u8 mac_addr[6];
3146 __le16 stn_id;
3147 __le16 action;
3148 __le16 rsvd;
3149 __le32 legacy_rates;
3150 __u8 ht_rates[4];
3151 __le16 cap_info;
3152 __le16 ht_capabilities_info;
3153 __u8 mac_ht_param_info;
3154 __u8 rev;
3155 __u8 control_channel;
3156 __u8 add_channel;
3157 __le16 op_mode;
3158 __le16 stbc;
3159 __u8 add_qos_info;
3160 __u8 is_qos_sta;
3161 __le32 fw_sta_ptr;
ba2d3587 3162} __packed;
3f5610ff
LB		 3163
3164#define MWL8K_STA_ACTION_ADD 0
3165#define MWL8K_STA_ACTION_REMOVE 2
3166
3167static int mwl8k_cmd_set_new_stn_add(struct ieee80211_hw *hw,
3168 struct ieee80211_vif *vif,
3169 struct ieee80211_sta *sta)
3170{
3171 struct mwl8k_cmd_set_new_stn *cmd;
8707d026 3172 u32 rates;
3f5610ff
LB		 3173 int rc;
3174
3175 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3176 if (cmd == NULL)
3177 return -ENOMEM;
3178
3179 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
3180 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3181 cmd->aid = cpu_to_le16(sta->aid);
3182 memcpy(cmd->mac_addr, sta->addr, ETH_ALEN);
3183 cmd->stn_id = cpu_to_le16(sta->aid);
3184 cmd->action = cpu_to_le16(MWL8K_STA_ACTION_ADD);
8707d026
LB		 3185 if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
3186 rates = sta->supp_rates[IEEE80211_BAND_2GHZ];
3187 else
3188 rates = sta->supp_rates[IEEE80211_BAND_5GHZ] << 5;
3189 cmd->legacy_rates = cpu_to_le32(rates);
3f5610ff
LB		 3190 if (sta->ht_cap.ht_supported) {
3191 cmd->ht_rates[0] = sta->ht_cap.mcs.rx_mask[0];
3192 cmd->ht_rates[1] = sta->ht_cap.mcs.rx_mask[1];
3193 cmd->ht_rates[2] = sta->ht_cap.mcs.rx_mask[2];
3194 cmd->ht_rates[3] = sta->ht_cap.mcs.rx_mask[3];
3195 cmd->ht_capabilities_info = cpu_to_le16(sta->ht_cap.cap);
3196 cmd->mac_ht_param_info = (sta->ht_cap.ampdu_factor & 3) |
3197 ((sta->ht_cap.ampdu_density & 7) << 2);
3198 cmd->is_qos_sta = 1;
3199 }
3200
aa21d0f6 3201 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
3f5610ff
LB		 3202 kfree(cmd);
3203
3204 return rc;
3205}
3206
b64fe619
LB		 3207static int mwl8k_cmd_set_new_stn_add_self(struct ieee80211_hw *hw,
3208 struct ieee80211_vif *vif)
3209{
3210 struct mwl8k_cmd_set_new_stn *cmd;
3211 int rc;
3212
3213 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3214 if (cmd == NULL)
3215 return -ENOMEM;
3216
3217 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
3218 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3219 memcpy(cmd->mac_addr, vif->addr, ETH_ALEN);
3220
aa21d0f6 3221 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
b64fe619
LB		 3222 kfree(cmd);
3223
3224 return rc;
3225}
3226
3f5610ff
LB		 3227static int mwl8k_cmd_set_new_stn_del(struct ieee80211_hw *hw,
3228 struct ieee80211_vif *vif, u8 *addr)
3229{
3230 struct mwl8k_cmd_set_new_stn *cmd;
3231 int rc;
3232
3233 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3234 if (cmd == NULL)
3235 return -ENOMEM;
3236
3237 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
3238 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3239 memcpy(cmd->mac_addr, addr, ETH_ALEN);
3240 cmd->action = cpu_to_le16(MWL8K_STA_ACTION_REMOVE);
3241
aa21d0f6 3242 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
3f5610ff
LB		 3243 kfree(cmd);
3244
3245 return rc;
3246}
3247
fcdc403c
NS		 3248/*
3249 * CMD_UPDATE_ENCRYPTION.
3250 */
3251
3252#define MAX_ENCR_KEY_LENGTH 16
3253#define MIC_KEY_LENGTH 8
3254
3255struct mwl8k_cmd_update_encryption {
3256 struct mwl8k_cmd_pkt header;
3257
3258 __le32 action;
3259 __le32 reserved;
3260 __u8 mac_addr[6];
3261 __u8 encr_type;
3262
3263} __attribute__((packed));
3264
3265struct mwl8k_cmd_set_key {
3266 struct mwl8k_cmd_pkt header;
3267
3268 __le32 action;
3269 __le32 reserved;
3270 __le16 length;
3271 __le16 key_type_id;
3272 __le32 key_info;
3273 __le32 key_id;
3274 __le16 key_len;
3275 __u8 key_material[MAX_ENCR_KEY_LENGTH];
3276 __u8 tkip_tx_mic_key[MIC_KEY_LENGTH];
3277 __u8 tkip_rx_mic_key[MIC_KEY_LENGTH];
3278 __le16 tkip_rsc_low;
3279 __le32 tkip_rsc_high;
3280 __le16 tkip_tsc_low;
3281 __le32 tkip_tsc_high;
3282 __u8 mac_addr[6];
3283} __attribute__((packed));
3284
3285enum {
3286 MWL8K_ENCR_ENABLE,
3287 MWL8K_ENCR_SET_KEY,
3288 MWL8K_ENCR_REMOVE_KEY,
3289 MWL8K_ENCR_SET_GROUP_KEY,
3290};
3291
3292#define MWL8K_UPDATE_ENCRYPTION_TYPE_WEP 0
3293#define MWL8K_UPDATE_ENCRYPTION_TYPE_DISABLE 1
3294#define MWL8K_UPDATE_ENCRYPTION_TYPE_TKIP 4
3295#define MWL8K_UPDATE_ENCRYPTION_TYPE_MIXED 7
3296#define MWL8K_UPDATE_ENCRYPTION_TYPE_AES 8
3297
3298enum {
3299 MWL8K_ALG_WEP,
3300 MWL8K_ALG_TKIP,
3301 MWL8K_ALG_CCMP,
3302};
3303
3304#define MWL8K_KEY_FLAG_TXGROUPKEY 0x00000004
3305#define MWL8K_KEY_FLAG_PAIRWISE 0x00000008
3306#define MWL8K_KEY_FLAG_TSC_VALID 0x00000040
3307#define MWL8K_KEY_FLAG_WEP_TXKEY 0x01000000
3308#define MWL8K_KEY_FLAG_MICKEY_VALID 0x02000000
3309
3310static int mwl8k_cmd_update_encryption_enable(struct ieee80211_hw *hw,
3311 struct ieee80211_vif *vif,
3312 u8 *addr,
3313 u8 encr_type)
3314{
3315 struct mwl8k_cmd_update_encryption *cmd;
3316 int rc;
3317
3318 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3319 if (cmd == NULL)
3320 return -ENOMEM;
3321
3322 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_ENCRYPTION);
3323 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3324 cmd->action = cpu_to_le32(MWL8K_ENCR_ENABLE);
3325 memcpy(cmd->mac_addr, addr, ETH_ALEN);
3326 cmd->encr_type = encr_type;
3327
3328 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
3329 kfree(cmd);
3330
3331 return rc;
3332}
3333
3334static int mwl8k_encryption_set_cmd_info(struct mwl8k_cmd_set_key *cmd,
3335 u8 *addr,
3336 struct ieee80211_key_conf *key)
3337{
3338 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_ENCRYPTION);
3339 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3340 cmd->length = cpu_to_le16(sizeof(*cmd) -
3341 offsetof(struct mwl8k_cmd_set_key, length));
3342 cmd->key_id = cpu_to_le32(key->keyidx);
3343 cmd->key_len = cpu_to_le16(key->keylen);
3344 memcpy(cmd->mac_addr, addr, ETH_ALEN);
3345
3346 switch (key->cipher) {
3347 case WLAN_CIPHER_SUITE_WEP40:
3348 case WLAN_CIPHER_SUITE_WEP104:
3349 cmd->key_type_id = cpu_to_le16(MWL8K_ALG_WEP);
3350 if (key->keyidx == 0)
3351 cmd->key_info = cpu_to_le32(MWL8K_KEY_FLAG_WEP_TXKEY);
3352
3353 break;
3354 case WLAN_CIPHER_SUITE_TKIP:
3355 cmd->key_type_id = cpu_to_le16(MWL8K_ALG_TKIP);
3356 cmd->key_info = (key->flags & IEEE80211_KEY_FLAG_PAIRWISE)
3357 ? cpu_to_le32(MWL8K_KEY_FLAG_PAIRWISE)
3358 : cpu_to_le32(MWL8K_KEY_FLAG_TXGROUPKEY);
3359 cmd->key_info |= cpu_to_le32(MWL8K_KEY_FLAG_MICKEY_VALID
3360 | MWL8K_KEY_FLAG_TSC_VALID);
3361 break;
3362 case WLAN_CIPHER_SUITE_CCMP:
3363 cmd->key_type_id = cpu_to_le16(MWL8K_ALG_CCMP);
3364 cmd->key_info = (key->flags & IEEE80211_KEY_FLAG_PAIRWISE)
3365 ? cpu_to_le32(MWL8K_KEY_FLAG_PAIRWISE)
3366 : cpu_to_le32(MWL8K_KEY_FLAG_TXGROUPKEY);
3367 break;
3368 default:
3369 return -ENOTSUPP;
3370 }
3371
3372 return 0;
3373}
3374
3375static int mwl8k_cmd_encryption_set_key(struct ieee80211_hw *hw,
3376 struct ieee80211_vif *vif,
3377 u8 *addr,
3378 struct ieee80211_key_conf *key)
3379{
3380 struct mwl8k_cmd_set_key *cmd;
3381 int rc;
3382 int keymlen;
3383 u32 action;
3384 u8 idx;
3385 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
3386
3387 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3388 if (cmd == NULL)
3389 return -ENOMEM;
3390
3391 rc = mwl8k_encryption_set_cmd_info(cmd, addr, key);
3392 if (rc < 0)
3393 goto done;
3394
3395 idx = key->keyidx;
3396
3397 if (key->flags & IEEE80211_KEY_FLAG_PAIRWISE)
3398 action = MWL8K_ENCR_SET_KEY;
3399 else
3400 action = MWL8K_ENCR_SET_GROUP_KEY;
3401
3402 switch (key->cipher) {
3403 case WLAN_CIPHER_SUITE_WEP40:
3404 case WLAN_CIPHER_SUITE_WEP104:
3405 if (!mwl8k_vif->wep_key_conf[idx].enabled) {
3406 memcpy(mwl8k_vif->wep_key_conf[idx].key, key,
3407 sizeof(*key) + key->keylen);
3408 mwl8k_vif->wep_key_conf[idx].enabled = 1;
3409 }
3410
3411 keymlen = 0;
3412 action = MWL8K_ENCR_SET_KEY;
3413 break;
3414 case WLAN_CIPHER_SUITE_TKIP:
3415 keymlen = MAX_ENCR_KEY_LENGTH + 2 * MIC_KEY_LENGTH;
3416 break;
3417 case WLAN_CIPHER_SUITE_CCMP:
3418 keymlen = key->keylen;
3419 break;
3420 default:
3421 rc = -ENOTSUPP;
3422 goto done;
3423 }
3424
3425 memcpy(cmd->key_material, key->key, keymlen);
3426 cmd->action = cpu_to_le32(action);
3427
3428 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
3429done:
3430 kfree(cmd);
3431
3432 return rc;
3433}
3434
3435static int mwl8k_cmd_encryption_remove_key(struct ieee80211_hw *hw,
3436 struct ieee80211_vif *vif,
3437 u8 *addr,
3438 struct ieee80211_key_conf *key)
3439{
3440 struct mwl8k_cmd_set_key *cmd;
3441 int rc;
3442 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
3443
3444 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3445 if (cmd == NULL)
3446 return -ENOMEM;
3447
3448 rc = mwl8k_encryption_set_cmd_info(cmd, addr, key);
3449 if (rc < 0)
3450 goto done;
3451
3452 if (key->cipher == WLAN_CIPHER_SUITE_WEP40 ||
3453 WLAN_CIPHER_SUITE_WEP104)
3454 mwl8k_vif->wep_key_conf[key->keyidx].enabled = 0;
3455
3456 cmd->action = cpu_to_le32(MWL8K_ENCR_REMOVE_KEY);
3457
3458 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
3459done:
3460 kfree(cmd);
3461
3462 return rc;
3463}
3464
3465static int mwl8k_set_key(struct ieee80211_hw *hw,
3466 enum set_key_cmd cmd_param,
3467 struct ieee80211_vif *vif,
3468 struct ieee80211_sta *sta,
3469 struct ieee80211_key_conf *key)
3470{
3471 int rc = 0;
3472 u8 encr_type;
3473 u8 *addr;
3474 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
3475
3476 if (vif->type == NL80211_IFTYPE_STATION)
3477 return -EOPNOTSUPP;
3478
3479 if (sta == NULL)
3480 addr = hw->wiphy->perm_addr;
3481 else
3482 addr = sta->addr;
3483
3484 if (cmd_param == SET_KEY) {
3485 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
3486 rc = mwl8k_cmd_encryption_set_key(hw, vif, addr, key);
3487 if (rc)
3488 goto out;
3489
3490 if ((key->cipher == WLAN_CIPHER_SUITE_WEP40)
3491 || (key->cipher == WLAN_CIPHER_SUITE_WEP104))
3492 encr_type = MWL8K_UPDATE_ENCRYPTION_TYPE_WEP;
3493 else
3494 encr_type = MWL8K_UPDATE_ENCRYPTION_TYPE_MIXED;
3495
3496 rc = mwl8k_cmd_update_encryption_enable(hw, vif, addr,
3497 encr_type);
3498 if (rc)
3499 goto out;
3500
3501 mwl8k_vif->is_hw_crypto_enabled = true;
3502
3503 } else {
3504 rc = mwl8k_cmd_encryption_remove_key(hw, vif, addr, key);
3505
3506 if (rc)
3507 goto out;
3508
3509 mwl8k_vif->is_hw_crypto_enabled = false;
3510
3511 }
3512out:
3513 return rc;
3514}
3515
55489b6e
LB		 3516/*
3517 * CMD_UPDATE_STADB.
3518 */
25d81b1e
LB		 3519struct ewc_ht_info {
3520 __le16 control1;
3521 __le16 control2;
3522 __le16 control3;
ba2d3587 3523} __packed;
25d81b1e
LB		 3524
3525struct peer_capability_info {
3526 /* Peer type - AP vs. STA. */
3527 __u8 peer_type;
3528
3529 /* Basic 802.11 capabilities from assoc resp. */
3530 __le16 basic_caps;
3531
3532 /* Set if peer supports 802.11n high throughput (HT). */
3533 __u8 ht_support;
3534
3535 /* Valid if HT is supported. */
3536 __le16 ht_caps;
3537 __u8 extended_ht_caps;
3538 struct ewc_ht_info ewc_info;
3539
3540 /* Legacy rate table. Intersection of our rates and peer rates. */
3541 __u8 legacy_rates[12];
3542
3543 /* HT rate table. Intersection of our rates and peer rates. */
3544 __u8 ht_rates[16];
3545 __u8 pad[16];
3546
3547 /* If set, interoperability mode, no proprietary extensions. */
3548 __u8 interop;
3549 __u8 pad2;
3550 __u8 station_id;
3551 __le16 amsdu_enabled;
ba2d3587 3552} __packed;
25d81b1e 3553
55489b6e
LB		 3554struct mwl8k_cmd_update_stadb {
3555 struct mwl8k_cmd_pkt header;
3556
3557 /* See STADB_ACTION_TYPE */
3558 __le32 action;
3559
3560 /* Peer MAC address */
3561 __u8 peer_addr[ETH_ALEN];
3562
3563 __le32 reserved;
3564
3565 /* Peer info - valid during add/update. */
3566 struct peer_capability_info peer_info;
ba2d3587 3567} __packed;
55489b6e 3568
a680400e
LB		 3569#define MWL8K_STA_DB_MODIFY_ENTRY 1
3570#define MWL8K_STA_DB_DEL_ENTRY 2
3571
3572/* Peer Entry flags - used to define the type of the peer node */
3573#define MWL8K_PEER_TYPE_ACCESSPOINT 2
3574
3575static int mwl8k_cmd_update_stadb_add(struct ieee80211_hw *hw,
c6e96010 3576 struct ieee80211_vif *vif,
13935e2c 3577 struct ieee80211_sta *sta)
55489b6e 3578{
55489b6e 3579 struct mwl8k_cmd_update_stadb *cmd;
a680400e 3580 struct peer_capability_info *p;
8707d026 3581 u32 rates;
55489b6e
LB		 3582 int rc;
3583
3584 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3585 if (cmd == NULL)
3586 return -ENOMEM;
3587
3588 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
3589 cmd->header.length = cpu_to_le16(sizeof(*cmd));
a680400e 3590 cmd->action = cpu_to_le32(MWL8K_STA_DB_MODIFY_ENTRY);
13935e2c 3591 memcpy(cmd->peer_addr, sta->addr, ETH_ALEN);
55489b6e 3592
a680400e
LB		 3593 p = &cmd->peer_info;
3594 p->peer_type = MWL8K_PEER_TYPE_ACCESSPOINT;
3595 p->basic_caps = cpu_to_le16(vif->bss_conf.assoc_capability);
13935e2c 3596 p->ht_support = sta->ht_cap.ht_supported;
b603742f 3597 p->ht_caps = cpu_to_le16(sta->ht_cap.cap);
13935e2c
LB		 3598 p->extended_ht_caps = (sta->ht_cap.ampdu_factor & 3) |
3599 ((sta->ht_cap.ampdu_density & 7) << 2);
8707d026
LB		 3600 if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
3601 rates = sta->supp_rates[IEEE80211_BAND_2GHZ];
3602 else
3603 rates = sta->supp_rates[IEEE80211_BAND_5GHZ] << 5;
3604 legacy_rate_mask_to_array(p->legacy_rates, rates);
13935e2c 3605 memcpy(p->ht_rates, sta->ht_cap.mcs.rx_mask, 16);
a680400e
LB		 3606 p->interop = 1;
3607 p->amsdu_enabled = 0;
3608
3609 rc = mwl8k_post_cmd(hw, &cmd->header);
3610 kfree(cmd);
3611
3612 return rc ? rc : p->station_id;
3613}
3614
3615static int mwl8k_cmd_update_stadb_del(struct ieee80211_hw *hw,
3616 struct ieee80211_vif *vif, u8 *addr)
3617{
3618 struct mwl8k_cmd_update_stadb *cmd;
3619 int rc;
3620
3621 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3622 if (cmd == NULL)
3623 return -ENOMEM;
3624
3625 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
3626 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3627 cmd->action = cpu_to_le32(MWL8K_STA_DB_DEL_ENTRY);
bbfd9128 3628 memcpy(cmd->peer_addr, addr, ETH_ALEN);
55489b6e 3629
a680400e 3630 rc = mwl8k_post_cmd(hw, &cmd->header);
55489b6e
LB		 3631 kfree(cmd);
3632
3633 return rc;
3634}
3635
a66098da
LB		 3636
3637/*
3638 * Interrupt handling.
3639 */
3640static irqreturn_t mwl8k_interrupt(int irq, void *dev_id)
3641{
3642 struct ieee80211_hw *hw = dev_id;
3643 struct mwl8k_priv *priv = hw->priv;
3644 u32 status;
3645
3646 status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
a66098da
LB		 3647 if (!status)
3648 return IRQ_NONE;
3649
1e9f9de3
LB		 3650 if (status & MWL8K_A2H_INT_TX_DONE) {
3651 status &= ~MWL8K_A2H_INT_TX_DONE;
3652 tasklet_schedule(&priv->poll_tx_task);
3653 }
3654
a66098da 3655 if (status & MWL8K_A2H_INT_RX_READY) {
67e2eb27
LB		 3656 status &= ~MWL8K_A2H_INT_RX_READY;
3657 tasklet_schedule(&priv->poll_rx_task);
a66098da
LB		 3658 }
3659
67e2eb27
LB		 3660 if (status)
3661 iowrite32(~status, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
3662
a66098da 3663 if (status & MWL8K_A2H_INT_OPC_DONE) {
618952a7 3664 if (priv->hostcmd_wait != NULL)
a66098da 3665 complete(priv->hostcmd_wait);
a66098da
LB		 3666 }
3667
3668 if (status & MWL8K_A2H_INT_QUEUE_EMPTY) {
618952a7 3669 if (!mutex_is_locked(&priv->fw_mutex) &&
88de754a 3670 priv->radio_on && priv->pending_tx_pkts)
618952a7 3671 mwl8k_tx_start(priv);
a66098da
LB		 3672 }
3673
3674 return IRQ_HANDLED;
3675}
3676
1e9f9de3
LB		 3677static void mwl8k_tx_poll(unsigned long data)
3678{
3679 struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
3680 struct mwl8k_priv *priv = hw->priv;
3681 int limit;
3682 int i;
3683
3684 limit = 32;
3685
3686 spin_lock_bh(&priv->tx_lock);
3687
3688 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3689 limit -= mwl8k_txq_reclaim(hw, i, limit, 0);
3690
3691 if (!priv->pending_tx_pkts && priv->tx_wait != NULL) {
3692 complete(priv->tx_wait);
3693 priv->tx_wait = NULL;
3694 }
3695
3696 spin_unlock_bh(&priv->tx_lock);
3697
3698 if (limit) {
3699 writel(~MWL8K_A2H_INT_TX_DONE,
3700 priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
3701 } else {
3702 tasklet_schedule(&priv->poll_tx_task);
3703 }
3704}
3705
67e2eb27
LB		 3706static void mwl8k_rx_poll(unsigned long data)
3707{
3708 struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
3709 struct mwl8k_priv *priv = hw->priv;
3710 int limit;
3711
3712 limit = 32;
3713 limit -= rxq_process(hw, 0, limit);
3714 limit -= rxq_refill(hw, 0, limit);
3715
3716 if (limit) {
3717 writel(~MWL8K_A2H_INT_RX_READY,
3718 priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
3719 } else {
3720 tasklet_schedule(&priv->poll_rx_task);
3721 }
3722}
3723
a66098da
LB		 3724
3725/*
3726 * Core driver operations.
3727 */
3728static int mwl8k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
3729{
3730 struct mwl8k_priv *priv = hw->priv;
3731 int index = skb_get_queue_mapping(skb);
3732 int rc;
3733
9189c100 3734 if (!priv->radio_on) {
c96c31e4
JP		 3735 wiphy_debug(hw->wiphy,
3736 "dropped TX frame since radio disabled\n");
a66098da
LB		 3737 dev_kfree_skb(skb);
3738 return NETDEV_TX_OK;
3739 }
3740
3741 rc = mwl8k_txq_xmit(hw, index, skb);
3742
3743 return rc;
3744}
3745
a66098da
LB		 3746static int mwl8k_start(struct ieee80211_hw *hw)
3747{
a66098da
LB		 3748 struct mwl8k_priv *priv = hw->priv;
3749 int rc;
3750
a0607fd3 3751 rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
a66098da
LB		 3752 IRQF_SHARED, MWL8K_NAME, hw);
3753 if (rc) {
5db55844 3754 wiphy_err(hw->wiphy, "failed to register IRQ handler\n");
2ec610cb 3755 return -EIO;
a66098da
LB		 3756 }
3757
67e2eb27 3758 /* Enable TX reclaim and RX tasklets. */
1e9f9de3 3759 tasklet_enable(&priv->poll_tx_task);
67e2eb27 3760 tasklet_enable(&priv->poll_rx_task);
2ec610cb 3761
a66098da 3762 /* Enable interrupts */
c23b5a69 3763 iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
a66098da 3764
2ec610cb
LB		 3765 rc = mwl8k_fw_lock(hw);
3766 if (!rc) {
55489b6e 3767 rc = mwl8k_cmd_radio_enable(hw);
a66098da 3768
5e4cf166
LB		 3769 if (!priv->ap_fw) {
3770 if (!rc)
55489b6e 3771 rc = mwl8k_cmd_enable_sniffer(hw, 0);
a66098da 3772
5e4cf166
LB		 3773 if (!rc)
3774 rc = mwl8k_cmd_set_pre_scan(hw);
3775
3776 if (!rc)
3777 rc = mwl8k_cmd_set_post_scan(hw,
3778 "\x00\x00\x00\x00\x00\x00");
3779 }
2ec610cb
LB		 3780
3781 if (!rc)
55489b6e 3782 rc = mwl8k_cmd_set_rateadapt_mode(hw, 0);
a66098da 3783
2ec610cb 3784 if (!rc)
55489b6e 3785 rc = mwl8k_cmd_set_wmm_mode(hw, 0);
a66098da 3786
2ec610cb
LB		 3787 mwl8k_fw_unlock(hw);
3788 }
3789
3790 if (rc) {
3791 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3792 free_irq(priv->pdev->irq, hw);
1e9f9de3 3793 tasklet_disable(&priv->poll_tx_task);
67e2eb27 3794 tasklet_disable(&priv->poll_rx_task);
2ec610cb 3795 }
a66098da
LB		 3796
3797 return rc;
3798}
3799
a66098da
LB		 3800static void mwl8k_stop(struct ieee80211_hw *hw)
3801{
a66098da
LB		 3802 struct mwl8k_priv *priv = hw->priv;
3803 int i;
3804
55489b6e 3805 mwl8k_cmd_radio_disable(hw);
a66098da
LB		 3806
3807 ieee80211_stop_queues(hw);
3808
a66098da 3809 /* Disable interrupts */
a66098da 3810 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
a66098da
LB		 3811 free_irq(priv->pdev->irq, hw);
3812
3813 /* Stop finalize join worker */
3814 cancel_work_sync(&priv->finalize_join_worker);
3815 if (priv->beacon_skb != NULL)
3816 dev_kfree_skb(priv->beacon_skb);
3817
67e2eb27 3818 /* Stop TX reclaim and RX tasklets. */
1e9f9de3 3819 tasklet_disable(&priv->poll_tx_task);
67e2eb27 3820 tasklet_disable(&priv->poll_rx_task);
a66098da 3821
a66098da
LB		 3822 /* Return all skbs to mac80211 */
3823 for (i = 0; i < MWL8K_TX_QUEUES; i++)
efb7c49a 3824 mwl8k_txq_reclaim(hw, i, INT_MAX, 1);
a66098da
LB		 3825}
3826
0863ade8
BC		 3827static int mwl8k_reload_firmware(struct ieee80211_hw *hw, char *fw_image);
3828
a66098da 3829static int mwl8k_add_interface(struct ieee80211_hw *hw,
f5bb87cf 3830 struct ieee80211_vif *vif)
a66098da
LB		 3831{
3832 struct mwl8k_priv *priv = hw->priv;
3833 struct mwl8k_vif *mwl8k_vif;
ee0ddf18 3834 u32 macids_supported;
0863ade8
BC		 3835 int macid, rc;
3836 struct mwl8k_device_info *di;
a66098da 3837
a43c49a8
LB		 3838 /*
3839 * Reject interface creation if sniffer mode is active, as
3840 * STA operation is mutually exclusive with hardware sniffer
b64fe619 3841 * mode. (Sniffer mode is only used on STA firmware.)
a43c49a8
LB		 3842 */
3843 if (priv->sniffer_enabled) {
c96c31e4
JP		 3844 wiphy_info(hw->wiphy,
3845 "unable to create STA interface because sniffer mode is enabled\n");
a43c49a8
LB		 3846 return -EINVAL;
3847 }
3848
0863ade8 3849 di = priv->device_info;
ee0ddf18
LB		 3850 switch (vif->type) {
3851 case NL80211_IFTYPE_AP:
0863ade8
BC		 3852 if (!priv->ap_fw && di->fw_image_ap) {
3853 /* we must load the ap fw to meet this request */
3854 if (!list_empty(&priv->vif_list))
3855 return -EBUSY;
3856 rc = mwl8k_reload_firmware(hw, di->fw_image_ap);
3857 if (rc)
3858 return rc;
3859 }
ee0ddf18
LB		 3860 macids_supported = priv->ap_macids_supported;
3861 break;
3862 case NL80211_IFTYPE_STATION:
0863ade8
BC		 3863 if (priv->ap_fw && di->fw_image_sta) {
3864 /* we must load the sta fw to meet this request */
3865 if (!list_empty(&priv->vif_list))
3866 return -EBUSY;
3867 rc = mwl8k_reload_firmware(hw, di->fw_image_sta);
3868 if (rc)
3869 return rc;
3870 }
ee0ddf18
LB		 3871 macids_supported = priv->sta_macids_supported;
3872 break;
3873 default:
3874 return -EINVAL;
3875 }
3876
3877 macid = ffs(macids_supported & ~priv->macids_used);
3878 if (!macid--)
3879 return -EBUSY;
3880
f5bb87cf 3881 /* Setup driver private area. */
1ed32e4f 3882 mwl8k_vif = MWL8K_VIF(vif);
a66098da 3883 memset(mwl8k_vif, 0, sizeof(*mwl8k_vif));
f5bb87cf 3884 mwl8k_vif->vif = vif;
ee0ddf18 3885 mwl8k_vif->macid = macid;
a66098da 3886 mwl8k_vif->seqno = 0;
d9a07d49
NS		 3887 memcpy(mwl8k_vif->bssid, vif->addr, ETH_ALEN);
3888 mwl8k_vif->is_hw_crypto_enabled = false;
a66098da 3889
aa21d0f6
LB		 3890 /* Set the mac address. */
3891 mwl8k_cmd_set_mac_addr(hw, vif, vif->addr);
3892
3893 if (priv->ap_fw)
3894 mwl8k_cmd_set_new_stn_add_self(hw, vif);
3895
ee0ddf18 3896 priv->macids_used |= 1 << mwl8k_vif->macid;
f5bb87cf 3897 list_add_tail(&mwl8k_vif->list, &priv->vif_list);
a66098da
LB		 3898
3899 return 0;
3900}
3901
3902static void mwl8k_remove_interface(struct ieee80211_hw *hw,
1ed32e4f 3903 struct ieee80211_vif *vif)
a66098da
LB		 3904{
3905 struct mwl8k_priv *priv = hw->priv;
f5bb87cf 3906 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
a66098da 3907
b64fe619
LB		 3908 if (priv->ap_fw)
3909 mwl8k_cmd_set_new_stn_del(hw, vif, vif->addr);
3910
aa21d0f6 3911 mwl8k_cmd_set_mac_addr(hw, vif, "\x00\x00\x00\x00\x00\x00");
32060e1b 3912
ee0ddf18 3913 priv->macids_used &= ~(1 << mwl8k_vif->macid);
f5bb87cf 3914 list_del(&mwl8k_vif->list);
a66098da
LB		 3915}
3916
ee03a932 3917static int mwl8k_config(struct ieee80211_hw *hw, u32 changed)
a66098da 3918{
a66098da
LB		 3919 struct ieee80211_conf *conf = &hw->conf;
3920 struct mwl8k_priv *priv = hw->priv;
ee03a932 3921 int rc;
a66098da 3922
7595d67a 3923 if (conf->flags & IEEE80211_CONF_IDLE) {
55489b6e 3924 mwl8k_cmd_radio_disable(hw);
ee03a932 3925 return 0;
7595d67a
LB		 3926 }
3927
ee03a932
LB		 3928 rc = mwl8k_fw_lock(hw);
3929 if (rc)
3930 return rc;
a66098da 3931
55489b6e 3932 rc = mwl8k_cmd_radio_enable(hw);
ee03a932
LB		 3933 if (rc)
3934 goto out;
a66098da 3935
610677d2 3936 rc = mwl8k_cmd_set_rf_channel(hw, conf);
ee03a932
LB		 3937 if (rc)
3938 goto out;
3939
a66098da
LB		 3940 if (conf->power_level > 18)
3941 conf->power_level = 18;
a66098da 3942
08b06347 3943 if (priv->ap_fw) {
41fdf097
NS		 3944 rc = mwl8k_cmd_tx_power(hw, conf, conf->power_level);
3945 if (rc)
3946 goto out;
3947
da62b761
NS		 3948 rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_RX, 0x3);
3949 if (rc)
3950 wiphy_warn(hw->wiphy, "failed to set # of RX antennas");
3951 rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_TX, 0x7);
3952 if (rc)
3953 wiphy_warn(hw->wiphy, "failed to set # of TX antennas");
3954
08b06347 3955 } else {
41fdf097
NS		 3956 rc = mwl8k_cmd_rf_tx_power(hw, conf->power_level);
3957 if (rc)
3958 goto out;
08b06347
LB		 3959 rc = mwl8k_cmd_mimo_config(hw, 0x7, 0x7);
3960 }
a66098da 3961
ee03a932
LB		 3962out:
3963 mwl8k_fw_unlock(hw);
a66098da 3964
ee03a932 3965 return rc;
a66098da
LB		 3966}
3967
b64fe619
LB		 3968static void
3969mwl8k_bss_info_changed_sta(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
3970 struct ieee80211_bss_conf *info, u32 changed)
a66098da 3971{
a66098da 3972 struct mwl8k_priv *priv = hw->priv;
c3cbbe8a 3973 u32 ap_legacy_rates;
13935e2c 3974 u8 ap_mcs_rates[16];
3a980d0a
LB		 3975 int rc;
3976
c3cbbe8a 3977 if (mwl8k_fw_lock(hw))
3a980d0a 3978 return;
a66098da 3979
c3cbbe8a
LB		 3980 /*
3981 * No need to capture a beacon if we're no longer associated.
3982 */
3983 if ((changed & BSS_CHANGED_ASSOC) && !vif->bss_conf.assoc)
3984 priv->capture_beacon = false;
3a980d0a 3985
c3cbbe8a 3986 /*
13935e2c 3987 * Get the AP's legacy and MCS rates.
c3cbbe8a 3988 */
7dc6a7a7 3989 if (vif->bss_conf.assoc) {
c6e96010 3990 struct ieee80211_sta *ap;
c97470dd 3991
c6e96010 3992 rcu_read_lock();
c6e96010 3993
c3cbbe8a
LB		 3994 ap = ieee80211_find_sta(vif, vif->bss_conf.bssid);
3995 if (ap == NULL) {
3996 rcu_read_unlock();
c6e96010 3997 goto out;
c3cbbe8a
LB		 3998 }
3999
8707d026
LB		 4000 if (hw->conf.channel->band == IEEE80211_BAND_2GHZ) {
4001 ap_legacy_rates = ap->supp_rates[IEEE80211_BAND_2GHZ];
4002 } else {
4003 ap_legacy_rates =
4004 ap->supp_rates[IEEE80211_BAND_5GHZ] << 5;
4005 }
13935e2c 4006 memcpy(ap_mcs_rates, ap->ht_cap.mcs.rx_mask, 16);
c3cbbe8a
LB		 4007
4008 rcu_read_unlock();
4009 }
c6e96010 4010
c3cbbe8a 4011 if ((changed & BSS_CHANGED_ASSOC) && vif->bss_conf.assoc) {
13935e2c 4012 rc = mwl8k_cmd_set_rate(hw, vif, ap_legacy_rates, ap_mcs_rates);
3a980d0a
LB		 4013 if (rc)
4014 goto out;
a66098da 4015
b71ed2c6 4016 rc = mwl8k_cmd_use_fixed_rate_sta(hw);
3a980d0a
LB		 4017 if (rc)
4018 goto out;
c3cbbe8a 4019 }
a66098da 4020
c3cbbe8a 4021 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
7dc6a7a7
LB		 4022 rc = mwl8k_set_radio_preamble(hw,
4023 vif->bss_conf.use_short_preamble);
3a980d0a
LB		 4024 if (rc)
4025 goto out;
c3cbbe8a 4026 }
a66098da 4027
c3cbbe8a 4028 if (changed & BSS_CHANGED_ERP_SLOT) {
7dc6a7a7 4029 rc = mwl8k_cmd_set_slot(hw, vif->bss_conf.use_short_slot);
3a980d0a
LB		 4030 if (rc)
4031 goto out;
c3cbbe8a 4032 }
a66098da 4033
c97470dd
LB		 4034 if (vif->bss_conf.assoc &&
4035 (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_ERP_CTS_PROT |
4036 BSS_CHANGED_HT))) {
c3cbbe8a 4037 rc = mwl8k_cmd_set_aid(hw, vif, ap_legacy_rates);
3a980d0a
LB		 4038 if (rc)
4039 goto out;
c3cbbe8a 4040 }
a66098da 4041
c3cbbe8a
LB		 4042 if (vif->bss_conf.assoc &&
4043 (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_BEACON_INT))) {
a66098da
LB		 4044 /*
4045 * Finalize the join. Tell rx handler to process
4046 * next beacon from our BSSID.
4047 */
0a11dfc3 4048 memcpy(priv->capture_bssid, vif->bss_conf.bssid, ETH_ALEN);
a66098da 4049 priv->capture_beacon = true;
a66098da
LB		 4050 }
4051
3a980d0a
LB		 4052out:
4053 mwl8k_fw_unlock(hw);
a66098da
LB		 4054}
4055
b64fe619
LB		 4056static void
4057mwl8k_bss_info_changed_ap(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
4058 struct ieee80211_bss_conf *info, u32 changed)
4059{
4060 int rc;
4061
4062 if (mwl8k_fw_lock(hw))
4063 return;
4064
4065 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
4066 rc = mwl8k_set_radio_preamble(hw,
4067 vif->bss_conf.use_short_preamble);
4068 if (rc)
4069 goto out;
4070 }
4071
4072 if (changed & BSS_CHANGED_BASIC_RATES) {
4073 int idx;
4074 int rate;
4075
4076 /*
4077 * Use lowest supported basic rate for multicasts
4078 * and management frames (such as probe responses --
4079 * beacons will always go out at 1 Mb/s).
4080 */
4081 idx = ffs(vif->bss_conf.basic_rates);
8707d026
LB		 4082 if (idx)
4083 idx--;
4084
4085 if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
4086 rate = mwl8k_rates_24[idx].hw_value;
4087 else
4088 rate = mwl8k_rates_50[idx].hw_value;
b64fe619
LB		 4089
4090 mwl8k_cmd_use_fixed_rate_ap(hw, rate, rate);
4091 }
4092
4093 if (changed & (BSS_CHANGED_BEACON_INT | BSS_CHANGED_BEACON)) {
4094 struct sk_buff *skb;
4095
4096 skb = ieee80211_beacon_get(hw, vif);
4097 if (skb != NULL) {
aa21d0f6 4098 mwl8k_cmd_set_beacon(hw, vif, skb->data, skb->len);
b64fe619
LB		 4099 kfree_skb(skb);
4100 }
4101 }
4102
4103 if (changed & BSS_CHANGED_BEACON_ENABLED)
aa21d0f6 4104 mwl8k_cmd_bss_start(hw, vif, info->enable_beacon);
b64fe619
LB		 4105
4106out:
4107 mwl8k_fw_unlock(hw);
4108}
4109
4110static void
4111mwl8k_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
4112 struct ieee80211_bss_conf *info, u32 changed)
4113{
4114 struct mwl8k_priv *priv = hw->priv;
4115
4116 if (!priv->ap_fw)
4117 mwl8k_bss_info_changed_sta(hw, vif, info, changed);
4118 else
4119 mwl8k_bss_info_changed_ap(hw, vif, info, changed);
4120}
4121
e81cd2d6 4122static u64 mwl8k_prepare_multicast(struct ieee80211_hw *hw,
22bedad3 4123 struct netdev_hw_addr_list *mc_list)
e81cd2d6
LB		 4124{
4125 struct mwl8k_cmd_pkt *cmd;
4126
447ced07
LB		 4127 /*
4128 * Synthesize and return a command packet that programs the
4129 * hardware multicast address filter. At this point we don't
4130 * know whether FIF_ALLMULTI is being requested, but if it is,
4131 * we'll end up throwing this packet away and creating a new
4132 * one in mwl8k_configure_filter().
4133 */
22bedad3 4134 cmd = __mwl8k_cmd_mac_multicast_adr(hw, 0, mc_list);
e81cd2d6
LB		 4135
4136 return (unsigned long)cmd;
4137}
4138
a43c49a8
LB		 4139static int
4140mwl8k_configure_filter_sniffer(struct ieee80211_hw *hw,
4141 unsigned int changed_flags,
4142 unsigned int *total_flags)
4143{
4144 struct mwl8k_priv *priv = hw->priv;
4145
4146 /*
4147 * Hardware sniffer mode is mutually exclusive with STA
4148 * operation, so refuse to enable sniffer mode if a STA
4149 * interface is active.
4150 */
f5bb87cf 4151 if (!list_empty(&priv->vif_list)) {
a43c49a8 4152 if (net_ratelimit())
c96c31e4
JP		 4153 wiphy_info(hw->wiphy,
4154 "not enabling sniffer mode because STA interface is active\n");
a43c49a8
LB		 4155 return 0;
4156 }
4157
4158 if (!priv->sniffer_enabled) {
55489b6e 4159 if (mwl8k_cmd_enable_sniffer(hw, 1))
a43c49a8
LB		 4160 return 0;
4161 priv->sniffer_enabled = true;
4162 }
4163
4164 *total_flags &= FIF_PROMISC_IN_BSS | FIF_ALLMULTI |
4165 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL |
4166 FIF_OTHER_BSS;
4167
4168 return 1;
4169}
4170
f5bb87cf
LB		 4171static struct mwl8k_vif *mwl8k_first_vif(struct mwl8k_priv *priv)
4172{
4173 if (!list_empty(&priv->vif_list))
4174 return list_entry(priv->vif_list.next, struct mwl8k_vif, list);
4175
4176 return NULL;
4177}
4178
e6935ea1
LB		 4179static void mwl8k_configure_filter(struct ieee80211_hw *hw,
4180 unsigned int changed_flags,
4181 unsigned int *total_flags,
4182 u64 multicast)
4183{
4184 struct mwl8k_priv *priv = hw->priv;
a43c49a8
LB		 4185 struct mwl8k_cmd_pkt *cmd = (void *)(unsigned long)multicast;
4186
c0adae2c
LB		 4187 /*
4188 * AP firmware doesn't allow fine-grained control over
4189 * the receive filter.
4190 */
4191 if (priv->ap_fw) {
4192 *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
4193 kfree(cmd);
4194 return;
4195 }
4196
a43c49a8
LB		 4197 /*
4198 * Enable hardware sniffer mode if FIF_CONTROL or
4199 * FIF_OTHER_BSS is requested.
4200 */
4201 if (*total_flags & (FIF_CONTROL | FIF_OTHER_BSS) &&
4202 mwl8k_configure_filter_sniffer(hw, changed_flags, total_flags)) {
4203 kfree(cmd);
4204 return;
4205 }
a66098da 4206
e6935ea1 4207 /* Clear unsupported feature flags */
447ced07 4208 *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
a66098da 4209
90852f7a
LB		 4210 if (mwl8k_fw_lock(hw)) {
4211 kfree(cmd);
e6935ea1 4212 return;
90852f7a 4213 }
a66098da 4214
a43c49a8 4215 if (priv->sniffer_enabled) {
55489b6e 4216 mwl8k_cmd_enable_sniffer(hw, 0);
a43c49a8
LB		 4217 priv->sniffer_enabled = false;
4218 }
4219
e6935ea1 4220 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
77165d88
LB		 4221 if (*total_flags & FIF_BCN_PRBRESP_PROMISC) {
4222 /*
4223 * Disable the BSS filter.
4224 */
e6935ea1 4225 mwl8k_cmd_set_pre_scan(hw);
77165d88 4226 } else {
f5bb87cf 4227 struct mwl8k_vif *mwl8k_vif;
0a11dfc3 4228 const u8 *bssid;
a94cc97e 4229
77165d88
LB		 4230 /*
4231 * Enable the BSS filter.
4232 *
4233 * If there is an active STA interface, use that
4234 * interface's BSSID, otherwise use a dummy one
4235 * (where the OUI part needs to be nonzero for
4236 * the BSSID to be accepted by POST_SCAN).
4237 */
f5bb87cf
LB		 4238 mwl8k_vif = mwl8k_first_vif(priv);
4239 if (mwl8k_vif != NULL)
4240 bssid = mwl8k_vif->vif->bss_conf.bssid;
4241 else
4242 bssid = "\x01\x00\x00\x00\x00\x00";
a94cc97e 4243
e6935ea1 4244 mwl8k_cmd_set_post_scan(hw, bssid);
a66098da
LB		 4245 }
4246 }
4247
447ced07
LB		 4248 /*
4249 * If FIF_ALLMULTI is being requested, throw away the command
4250 * packet that ->prepare_multicast() built and replace it with
4251 * a command packet that enables reception of all multicast
4252 * packets.
4253 */
4254 if (*total_flags & FIF_ALLMULTI) {
4255 kfree(cmd);
22bedad3 4256 cmd = __mwl8k_cmd_mac_multicast_adr(hw, 1, NULL);
447ced07
LB		 4257 }
4258
4259 if (cmd != NULL) {
4260 mwl8k_post_cmd(hw, cmd);
4261 kfree(cmd);
e6935ea1 4262 }
a66098da 4263
e6935ea1 4264 mwl8k_fw_unlock(hw);
a66098da
LB		 4265}
4266
a66098da
LB		 4267static int mwl8k_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
4268{
c2c2b12a 4269 return mwl8k_cmd_set_rts_threshold(hw, value);
a66098da
LB		 4270}
4271
4a6967b8
JB		 4272static int mwl8k_sta_remove(struct ieee80211_hw *hw,
4273 struct ieee80211_vif *vif,
4274 struct ieee80211_sta *sta)
3f5610ff
LB		 4275{
4276 struct mwl8k_priv *priv = hw->priv;
4277
4a6967b8
JB		 4278 if (priv->ap_fw)
4279 return mwl8k_cmd_set_new_stn_del(hw, vif, sta->addr);
4280 else
4281 return mwl8k_cmd_update_stadb_del(hw, vif, sta->addr);
bbfd9128
LB		 4282}
4283
4a6967b8
JB		 4284static int mwl8k_sta_add(struct ieee80211_hw *hw,
4285 struct ieee80211_vif *vif,
4286 struct ieee80211_sta *sta)
bbfd9128
LB		 4287{
4288 struct mwl8k_priv *priv = hw->priv;
4a6967b8 4289 int ret;
fcdc403c
NS		 4290 int i;
4291 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
4292 struct ieee80211_key_conf *key;
bbfd9128 4293
4a6967b8
JB		 4294 if (!priv->ap_fw) {
4295 ret = mwl8k_cmd_update_stadb_add(hw, vif, sta);
4296 if (ret >= 0) {
4297 MWL8K_STA(sta)->peer_id = ret;
fcdc403c 4298 ret = 0;
4a6967b8 4299 }
bbfd9128 4300
d9a07d49
NS		 4301 } else {
4302 ret = mwl8k_cmd_set_new_stn_add(hw, vif, sta);
bbfd9128 4303 }
4a6967b8 4304
d9a07d49
NS		 4305 for (i = 0; i < NUM_WEP_KEYS; i++) {
4306 key = IEEE80211_KEY_CONF(mwl8k_vif->wep_key_conf[i].key);
4307 if (mwl8k_vif->wep_key_conf[i].enabled)
4308 mwl8k_set_key(hw, SET_KEY, vif, sta, key);
4309 }
fcdc403c 4310 return ret;
bbfd9128
LB		 4311}
4312
a66098da
LB		 4313static int mwl8k_conf_tx(struct ieee80211_hw *hw, u16 queue,
4314 const struct ieee80211_tx_queue_params *params)
4315{
3e4f542c 4316 struct mwl8k_priv *priv = hw->priv;
a66098da 4317 int rc;
a66098da 4318
3e4f542c
LB		 4319 rc = mwl8k_fw_lock(hw);
4320 if (!rc) {
0863ade8
BC		 4321 BUG_ON(queue > MWL8K_TX_QUEUES - 1);
4322 memcpy(&priv->wmm_params[queue], params, sizeof(*params));
4323
3e4f542c 4324 if (!priv->wmm_enabled)
55489b6e 4325 rc = mwl8k_cmd_set_wmm_mode(hw, 1);
a66098da 4326
3e4f542c 4327 if (!rc)
55489b6e
LB		 4328 rc = mwl8k_cmd_set_edca_params(hw, queue,
4329 params->cw_min,
4330 params->cw_max,
4331 params->aifs,
4332 params->txop);
3e4f542c
LB		 4333
4334 mwl8k_fw_unlock(hw);
a66098da 4335 }
3e4f542c 4336
a66098da
LB		 4337 return rc;
4338}
4339
a66098da
LB		 4340static int mwl8k_get_stats(struct ieee80211_hw *hw,
4341 struct ieee80211_low_level_stats *stats)
4342{
55489b6e 4343 return mwl8k_cmd_get_stat(hw, stats);
a66098da
LB		 4344}
4345
0d462bbb
JL		 4346static int mwl8k_get_survey(struct ieee80211_hw *hw, int idx,
4347 struct survey_info *survey)
4348{
4349 struct mwl8k_priv *priv = hw->priv;
4350 struct ieee80211_conf *conf = &hw->conf;
4351
4352 if (idx != 0)
4353 return -ENOENT;
4354
4355 survey->channel = conf->channel;
4356 survey->filled = SURVEY_INFO_NOISE_DBM;
4357 survey->noise = priv->noise;
4358
4359 return 0;
4360}
4361
a2292d83
LB		 4362static int
4363mwl8k_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
4364 enum ieee80211_ampdu_mlme_action action,
0b01f030
JB		 4365 struct ieee80211_sta *sta, u16 tid, u16 *ssn,
4366 u8 buf_size)
a2292d83
LB		 4367{
4368 switch (action) {
4369 case IEEE80211_AMPDU_RX_START:
4370 case IEEE80211_AMPDU_RX_STOP:
4371 if (!(hw->flags & IEEE80211_HW_AMPDU_AGGREGATION))
4372 return -ENOTSUPP;
4373 return 0;
4374 default:
4375 return -ENOTSUPP;
4376 }
4377}
4378
a66098da
LB		 4379static const struct ieee80211_ops mwl8k_ops = {
4380 .tx = mwl8k_tx,
4381 .start = mwl8k_start,
4382 .stop = mwl8k_stop,
4383 .add_interface = mwl8k_add_interface,
4384 .remove_interface = mwl8k_remove_interface,
4385 .config = mwl8k_config,
a66098da 4386 .bss_info_changed = mwl8k_bss_info_changed,
3ac64bee 4387 .prepare_multicast = mwl8k_prepare_multicast,
a66098da 4388 .configure_filter = mwl8k_configure_filter,
fcdc403c 4389 .set_key = mwl8k_set_key,
a66098da 4390 .set_rts_threshold = mwl8k_set_rts_threshold,
4a6967b8
JB		 4391 .sta_add = mwl8k_sta_add,
4392 .sta_remove = mwl8k_sta_remove,
a66098da 4393 .conf_tx = mwl8k_conf_tx,
a66098da 4394 .get_stats = mwl8k_get_stats,
0d462bbb 4395 .get_survey = mwl8k_get_survey,
a2292d83 4396 .ampdu_action = mwl8k_ampdu_action,
a66098da
LB		 4397};
4398
a66098da
LB		 4399static void mwl8k_finalize_join_worker(struct work_struct *work)
4400{
4401 struct mwl8k_priv *priv =
4402 container_of(work, struct mwl8k_priv, finalize_join_worker);
4403 struct sk_buff *skb = priv->beacon_skb;
56007a02
JB		 4404 struct ieee80211_mgmt *mgmt = (void *)skb->data;
4405 int len = skb->len - offsetof(struct ieee80211_mgmt, u.beacon.variable);
4406 const u8 *tim = cfg80211_find_ie(WLAN_EID_TIM,
4407 mgmt->u.beacon.variable, len);
4408 int dtim_period = 1;
4409
4410 if (tim && tim[1] >= 2)
4411 dtim_period = tim[3];
a66098da 4412
56007a02 4413 mwl8k_cmd_finalize_join(priv->hw, skb->data, skb->len, dtim_period);
a66098da 4414
f5bb87cf 4415 dev_kfree_skb(skb);
a66098da
LB		 4416 priv->beacon_skb = NULL;
4417}
4418
bcb628d5 4419enum {
9e1b17ea
LB		 4420 MWL8363 = 0,
4421 MWL8687,
bcb628d5 4422 MWL8366,
6f6d1e9a
LB		 4423};
4424
952a0e96
BC		 4425#define MWL8K_8366_AP_FW_API 1
4426#define _MWL8K_8366_AP_FW(api) "mwl8k/fmimage_8366_ap-" #api ".fw"
4427#define MWL8K_8366_AP_FW(api) _MWL8K_8366_AP_FW(api)
4428
bcb628d5 4429static struct mwl8k_device_info mwl8k_info_tbl[] __devinitdata = {
9e1b17ea
LB		 4430 [MWL8363] = {
4431 .part_name = "88w8363",
4432 .helper_image = "mwl8k/helper_8363.fw",
0863ade8 4433 .fw_image_sta = "mwl8k/fmimage_8363.fw",
9e1b17ea 4434 },
49eb691c 4435 [MWL8687] = {
bcb628d5
JL		 4436 .part_name = "88w8687",
4437 .helper_image = "mwl8k/helper_8687.fw",
0863ade8 4438 .fw_image_sta = "mwl8k/fmimage_8687.fw",
bcb628d5 4439 },
49eb691c 4440 [MWL8366] = {
bcb628d5
JL		 4441 .part_name = "88w8366",
4442 .helper_image = "mwl8k/helper_8366.fw",
0863ade8 4443 .fw_image_sta = "mwl8k/fmimage_8366.fw",
952a0e96
BC		 4444 .fw_image_ap = MWL8K_8366_AP_FW(MWL8K_8366_AP_FW_API),
4445 .fw_api_ap = MWL8K_8366_AP_FW_API,
89a91f4f 4446 .ap_rxd_ops = &rxd_8366_ap_ops,
bcb628d5 4447 },
45a390dd
LB		 4448};
4449
c92d4ede
LB		 4450MODULE_FIRMWARE("mwl8k/helper_8363.fw");
4451MODULE_FIRMWARE("mwl8k/fmimage_8363.fw");
4452MODULE_FIRMWARE("mwl8k/helper_8687.fw");
4453MODULE_FIRMWARE("mwl8k/fmimage_8687.fw");
4454MODULE_FIRMWARE("mwl8k/helper_8366.fw");
4455MODULE_FIRMWARE("mwl8k/fmimage_8366.fw");
952a0e96 4456MODULE_FIRMWARE(MWL8K_8366_AP_FW(MWL8K_8366_AP_FW_API));
c92d4ede 4457
45a390dd 4458static DEFINE_PCI_DEVICE_TABLE(mwl8k_pci_id_table) = {
e5868ba1 4459 { PCI_VDEVICE(MARVELL, 0x2a0a), .driver_data = MWL8363, },
9e1b17ea
LB		 4460 { PCI_VDEVICE(MARVELL, 0x2a0c), .driver_data = MWL8363, },
4461 { PCI_VDEVICE(MARVELL, 0x2a24), .driver_data = MWL8363, },
bcb628d5
JL		 4462 { PCI_VDEVICE(MARVELL, 0x2a2b), .driver_data = MWL8687, },
4463 { PCI_VDEVICE(MARVELL, 0x2a30), .driver_data = MWL8687, },
4464 { PCI_VDEVICE(MARVELL, 0x2a40), .driver_data = MWL8366, },
ca66527c 4465 { PCI_VDEVICE(MARVELL, 0x2a43), .driver_data = MWL8366, },
bcb628d5 4466 { },
45a390dd
LB		 4467};
4468MODULE_DEVICE_TABLE(pci, mwl8k_pci_id_table);
4469
99020471
BC		 4470static int mwl8k_request_alt_fw(struct mwl8k_priv *priv)
4471{
4472 int rc;
4473 printk(KERN_ERR "%s: Error requesting preferred fw %s.\n"
4474 "Trying alternative firmware %s\n", pci_name(priv->pdev),
4475 priv->fw_pref, priv->fw_alt);
4476 rc = mwl8k_request_fw(priv, priv->fw_alt, &priv->fw_ucode, true);
4477 if (rc) {
4478 printk(KERN_ERR "%s: Error requesting alt fw %s\n",
4479 pci_name(priv->pdev), priv->fw_alt);
4480 return rc;
4481 }
4482 return 0;
4483}
4484
4485static int mwl8k_firmware_load_success(struct mwl8k_priv *priv);
4486static void mwl8k_fw_state_machine(const struct firmware *fw, void *context)
4487{
4488 struct mwl8k_priv *priv = context;
4489 struct mwl8k_device_info *di = priv->device_info;
4490 int rc;
4491
4492 switch (priv->fw_state) {
4493 case FW_STATE_INIT:
4494 if (!fw) {
4495 printk(KERN_ERR "%s: Error requesting helper fw %s\n",
4496 pci_name(priv->pdev), di->helper_image);
4497 goto fail;
4498 }
4499 priv->fw_helper = fw;
4500 rc = mwl8k_request_fw(priv, priv->fw_pref, &priv->fw_ucode,
4501 true);
4502 if (rc && priv->fw_alt) {
4503 rc = mwl8k_request_alt_fw(priv);
4504 if (rc)
4505 goto fail;
4506 priv->fw_state = FW_STATE_LOADING_ALT;
4507 } else if (rc)
4508 goto fail;
4509 else
4510 priv->fw_state = FW_STATE_LOADING_PREF;
4511 break;
4512
4513 case FW_STATE_LOADING_PREF:
4514 if (!fw) {
4515 if (priv->fw_alt) {
4516 rc = mwl8k_request_alt_fw(priv);
4517 if (rc)
4518 goto fail;
4519 priv->fw_state = FW_STATE_LOADING_ALT;
4520 } else
4521 goto fail;
4522 } else {
4523 priv->fw_ucode = fw;
4524 rc = mwl8k_firmware_load_success(priv);
4525 if (rc)
4526 goto fail;
4527 else
4528 complete(&priv->firmware_loading_complete);
4529 }
4530 break;
4531
4532 case FW_STATE_LOADING_ALT:
4533 if (!fw) {
4534 printk(KERN_ERR "%s: Error requesting alt fw %s\n",
4535 pci_name(priv->pdev), di->helper_image);
4536 goto fail;
4537 }
4538 priv->fw_ucode = fw;
4539 rc = mwl8k_firmware_load_success(priv);
4540 if (rc)
4541 goto fail;
4542 else
4543 complete(&priv->firmware_loading_complete);
4544 break;
4545
4546 default:
4547 printk(KERN_ERR "%s: Unexpected firmware loading state: %d\n",
4548 MWL8K_NAME, priv->fw_state);
4549 BUG_ON(1);
4550 }
4551
4552 return;
4553
4554fail:
4555 priv->fw_state = FW_STATE_ERROR;
4556 complete(&priv->firmware_loading_complete);
4557 device_release_driver(&priv->pdev->dev);
4558 mwl8k_release_firmware(priv);
4559}
4560
4561static int mwl8k_init_firmware(struct ieee80211_hw *hw, char *fw_image,
4562 bool nowait)
a66098da 4563{
3cc7772c 4564 struct mwl8k_priv *priv = hw->priv;
a66098da 4565 int rc;
be695fc4
LB		 4566
4567 /* Reset firmware and hardware */
4568 mwl8k_hw_reset(priv);
4569
4570 /* Ask userland hotplug daemon for the device firmware */
99020471 4571 rc = mwl8k_request_firmware(priv, fw_image, nowait);
be695fc4 4572 if (rc) {
5db55844 4573 wiphy_err(hw->wiphy, "Firmware files not found\n");
3cc7772c 4574 return rc;
be695fc4
LB		 4575 }
4576
99020471
BC		 4577 if (nowait)
4578 return rc;
4579
be695fc4
LB		 4580 /* Load firmware into hardware */
4581 rc = mwl8k_load_firmware(hw);
3cc7772c 4582 if (rc)
5db55844 4583 wiphy_err(hw->wiphy, "Cannot start firmware\n");
be695fc4
LB		 4584
4585 /* Reclaim memory once firmware is successfully loaded */
4586 mwl8k_release_firmware(priv);
4587
3cc7772c
BC		 4588 return rc;
4589}
4590
4591/* initialize hw after successfully loading a firmware image */
4592static int mwl8k_probe_hw(struct ieee80211_hw *hw)
4593{
4594 struct mwl8k_priv *priv = hw->priv;
4595 int rc = 0;
4596 int i;
be695fc4 4597
91942230 4598 if (priv->ap_fw) {
89a91f4f 4599 priv->rxd_ops = priv->device_info->ap_rxd_ops;
91942230 4600 if (priv->rxd_ops == NULL) {
c96c31e4
JP		 4601 wiphy_err(hw->wiphy,
4602 "Driver does not have AP firmware image support for this hardware\n");
91942230
LB		 4603 goto err_stop_firmware;
4604 }
4605 } else {
89a91f4f 4606 priv->rxd_ops = &rxd_sta_ops;
91942230 4607 }
be695fc4
LB		 4608
4609 priv->sniffer_enabled = false;
4610 priv->wmm_enabled = false;
4611 priv->pending_tx_pkts = 0;
4612
a66098da
LB		 4613 rc = mwl8k_rxq_init(hw, 0);
4614 if (rc)
3cc7772c 4615 goto err_stop_firmware;
a66098da
LB		 4616 rxq_refill(hw, 0, INT_MAX);
4617
a66098da
LB		 4618 for (i = 0; i < MWL8K_TX_QUEUES; i++) {
4619 rc = mwl8k_txq_init(hw, i);
4620 if (rc)
4621 goto err_free_queues;
4622 }
4623
4624 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
c23b5a69 4625 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
67e2eb27 4626 iowrite32(MWL8K_A2H_INT_TX_DONE | MWL8K_A2H_INT_RX_READY,
1e9f9de3 4627 priv->regs + MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL);
a66098da
LB		 4628 iowrite32(0xffffffff, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
4629
a0607fd3 4630 rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
a66098da
LB		 4631 IRQF_SHARED, MWL8K_NAME, hw);
4632 if (rc) {
5db55844 4633 wiphy_err(hw->wiphy, "failed to register IRQ handler\n");
a66098da
LB		 4634 goto err_free_queues;
4635 }
4636
a66098da
LB		 4637 /*
4638 * Temporarily enable interrupts. Initial firmware host
c2c2b12a 4639 * commands use interrupts and avoid polling. Disable
a66098da
LB		 4640 * interrupts when done.
4641 */
c23b5a69 4642 iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
a66098da
LB		 4643
4644 /* Get config data, mac addrs etc */
42fba21d
LB		 4645 if (priv->ap_fw) {
4646 rc = mwl8k_cmd_get_hw_spec_ap(hw);
4647 if (!rc)
4648 rc = mwl8k_cmd_set_hw_spec(hw);
4649 } else {
4650 rc = mwl8k_cmd_get_hw_spec_sta(hw);
4651 }
a66098da 4652 if (rc) {
5db55844 4653 wiphy_err(hw->wiphy, "Cannot initialise firmware\n");
be695fc4 4654 goto err_free_irq;
a66098da
LB		 4655 }
4656
4657 /* Turn radio off */
55489b6e 4658 rc = mwl8k_cmd_radio_disable(hw);
a66098da 4659 if (rc) {
5db55844 4660 wiphy_err(hw->wiphy, "Cannot disable\n");
be695fc4 4661 goto err_free_irq;
a66098da
LB		 4662 }
4663
32060e1b 4664 /* Clear MAC address */
aa21d0f6 4665 rc = mwl8k_cmd_set_mac_addr(hw, NULL, "\x00\x00\x00\x00\x00\x00");
32060e1b 4666 if (rc) {
5db55844 4667 wiphy_err(hw->wiphy, "Cannot clear MAC address\n");
be695fc4 4668 goto err_free_irq;
32060e1b
LB		 4669 }
4670
a66098da 4671 /* Disable interrupts */
a66098da 4672 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
a66098da
LB		 4673 free_irq(priv->pdev->irq, hw);
4674
c96c31e4
JP		 4675 wiphy_info(hw->wiphy, "%s v%d, %pm, %s firmware %u.%u.%u.%u\n",
4676 priv->device_info->part_name,
4677 priv->hw_rev, hw->wiphy->perm_addr,
4678 priv->ap_fw ? "AP" : "STA",
4679 (priv->fw_rev >> 24) & 0xff, (priv->fw_rev >> 16) & 0xff,
4680 (priv->fw_rev >> 8) & 0xff, priv->fw_rev & 0xff);
a66098da
LB		 4681
4682 return 0;
4683
a66098da 4684err_free_irq:
a66098da 4685 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
a66098da
LB		 4686 free_irq(priv->pdev->irq, hw);
4687
4688err_free_queues:
4689 for (i = 0; i < MWL8K_TX_QUEUES; i++)
4690 mwl8k_txq_deinit(hw, i);
4691 mwl8k_rxq_deinit(hw, 0);
4692
3cc7772c
BC		 4693err_stop_firmware:
4694 mwl8k_hw_reset(priv);
4695
4696 return rc;
4697}
4698
4699/*
4700 * invoke mwl8k_reload_firmware to change the firmware image after the device
4701 * has already been registered
4702 */
4703static int mwl8k_reload_firmware(struct ieee80211_hw *hw, char *fw_image)
4704{
4705 int i, rc = 0;
4706 struct mwl8k_priv *priv = hw->priv;
4707
4708 mwl8k_stop(hw);
4709 mwl8k_rxq_deinit(hw, 0);
4710
4711 for (i = 0; i < MWL8K_TX_QUEUES; i++)
4712 mwl8k_txq_deinit(hw, i);
4713
99020471 4714 rc = mwl8k_init_firmware(hw, fw_image, false);
3cc7772c
BC		 4715 if (rc)
4716 goto fail;
4717
4718 rc = mwl8k_probe_hw(hw);
4719 if (rc)
4720 goto fail;
4721
4722 rc = mwl8k_start(hw);
4723 if (rc)
4724 goto fail;
4725
4726 rc = mwl8k_config(hw, ~0);
4727 if (rc)
4728 goto fail;
4729
4730 for (i = 0; i < MWL8K_TX_QUEUES; i++) {
4731 rc = mwl8k_conf_tx(hw, i, &priv->wmm_params[i]);
4732 if (rc)
4733 goto fail;
4734 }
4735
4736 return rc;
4737
4738fail:
4739 printk(KERN_WARNING "mwl8k: Failed to reload firmware image.\n");
4740 return rc;
4741}
4742
4743static int mwl8k_firmware_load_success(struct mwl8k_priv *priv)
4744{
4745 struct ieee80211_hw *hw = priv->hw;
4746 int i, rc;
4747
99020471
BC		 4748 rc = mwl8k_load_firmware(hw);
4749 mwl8k_release_firmware(priv);
4750 if (rc) {
4751 wiphy_err(hw->wiphy, "Cannot start firmware\n");
4752 return rc;
4753 }
4754
3cc7772c
BC		 4755 /*
4756 * Extra headroom is the size of the required DMA header
4757 * minus the size of the smallest 802.11 frame (CTS frame).
4758 */
4759 hw->extra_tx_headroom =
4760 sizeof(struct mwl8k_dma_data) - sizeof(struct ieee80211_cts);
4761
4762 hw->channel_change_time = 10;
4763
4764 hw->queues = MWL8K_TX_QUEUES;
4765
4766 /* Set rssi values to dBm */
4767 hw->flags |= IEEE80211_HW_SIGNAL_DBM;
4768 hw->vif_data_size = sizeof(struct mwl8k_vif);
4769 hw->sta_data_size = sizeof(struct mwl8k_sta);
4770
4771 priv->macids_used = 0;
4772 INIT_LIST_HEAD(&priv->vif_list);
4773
4774 /* Set default radio state and preamble */
4775 priv->radio_on = 0;
4776 priv->radio_short_preamble = 0;
4777
4778 /* Finalize join worker */
4779 INIT_WORK(&priv->finalize_join_worker, mwl8k_finalize_join_worker);
4780
4781 /* TX reclaim and RX tasklets. */
4782 tasklet_init(&priv->poll_tx_task, mwl8k_tx_poll, (unsigned long)hw);
4783 tasklet_disable(&priv->poll_tx_task);
4784 tasklet_init(&priv->poll_rx_task, mwl8k_rx_poll, (unsigned long)hw);
4785 tasklet_disable(&priv->poll_rx_task);
4786
4787 /* Power management cookie */
4788 priv->cookie = pci_alloc_consistent(priv->pdev, 4, &priv->cookie_dma);
4789 if (priv->cookie == NULL)
4790 return -ENOMEM;
4791
4792 mutex_init(&priv->fw_mutex);
4793 priv->fw_mutex_owner = NULL;
4794 priv->fw_mutex_depth = 0;
4795 priv->hostcmd_wait = NULL;
4796
4797 spin_lock_init(&priv->tx_lock);
4798
4799 priv->tx_wait = NULL;
4800
4801 rc = mwl8k_probe_hw(hw);
4802 if (rc)
4803 goto err_free_cookie;
4804
4805 hw->wiphy->interface_modes = 0;
4806 if (priv->ap_macids_supported || priv->device_info->fw_image_ap)
4807 hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_AP);
4808 if (priv->sta_macids_supported || priv->device_info->fw_image_sta)
4809 hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_STATION);
4810
4811 rc = ieee80211_register_hw(hw);
4812 if (rc) {
4813 wiphy_err(hw->wiphy, "Cannot register device\n");
4814 goto err_unprobe_hw;
4815 }
4816
4817 return 0;
4818
4819err_unprobe_hw:
4820 for (i = 0; i < MWL8K_TX_QUEUES; i++)
4821 mwl8k_txq_deinit(hw, i);
4822 mwl8k_rxq_deinit(hw, 0);
4823
be695fc4 4824err_free_cookie:
a66098da
LB		 4825 if (priv->cookie != NULL)
4826 pci_free_consistent(priv->pdev, 4,
4827 priv->cookie, priv->cookie_dma);
4828
3cc7772c
BC		 4829 return rc;
4830}
4831static int __devinit mwl8k_probe(struct pci_dev *pdev,
4832 const struct pci_device_id *id)
4833{
4834 static int printed_version;
4835 struct ieee80211_hw *hw;
4836 struct mwl8k_priv *priv;
0863ade8 4837 struct mwl8k_device_info *di;
3cc7772c
BC		 4838 int rc;
4839
4840 if (!printed_version) {
4841 printk(KERN_INFO "%s version %s\n", MWL8K_DESC, MWL8K_VERSION);
4842 printed_version = 1;
4843 }
4844
4845
4846 rc = pci_enable_device(pdev);
4847 if (rc) {
4848 printk(KERN_ERR "%s: Cannot enable new PCI device\n",
4849 MWL8K_NAME);
4850 return rc;
4851 }
4852
4853 rc = pci_request_regions(pdev, MWL8K_NAME);
4854 if (rc) {
4855 printk(KERN_ERR "%s: Cannot obtain PCI resources\n",
4856 MWL8K_NAME);
4857 goto err_disable_device;
4858 }
4859
4860 pci_set_master(pdev);
4861
4862
4863 hw = ieee80211_alloc_hw(sizeof(*priv), &mwl8k_ops);
4864 if (hw == NULL) {
4865 printk(KERN_ERR "%s: ieee80211 alloc failed\n", MWL8K_NAME);
4866 rc = -ENOMEM;
4867 goto err_free_reg;
4868 }
4869
4870 SET_IEEE80211_DEV(hw, &pdev->dev);
4871 pci_set_drvdata(pdev, hw);
4872
4873 priv = hw->priv;
4874 priv->hw = hw;
4875 priv->pdev = pdev;
4876 priv->device_info = &mwl8k_info_tbl[id->driver_data];
4877
4878
4879 priv->sram = pci_iomap(pdev, 0, 0x10000);
4880 if (priv->sram == NULL) {
4881 wiphy_err(hw->wiphy, "Cannot map device SRAM\n");
4882 goto err_iounmap;
4883 }
4884
4885 /*
4886 * If BAR0 is a 32 bit BAR, the register BAR will be BAR1.
4887 * If BAR0 is a 64 bit BAR, the register BAR will be BAR2.
4888 */
4889 priv->regs = pci_iomap(pdev, 1, 0x10000);
4890 if (priv->regs == NULL) {
4891 priv->regs = pci_iomap(pdev, 2, 0x10000);
4892 if (priv->regs == NULL) {
4893 wiphy_err(hw->wiphy, "Cannot map device registers\n");
4894 goto err_iounmap;
4895 }
4896 }
4897
0863ade8 4898 /*
99020471
BC		 4899 * Choose the initial fw image depending on user input. If a second
4900 * image is available, make it the alternative image that will be
4901 * loaded if the first one fails.
0863ade8 4902 */
99020471 4903 init_completion(&priv->firmware_loading_complete);
0863ade8 4904 di = priv->device_info;
99020471
BC		 4905 if (ap_mode_default && di->fw_image_ap) {
4906 priv->fw_pref = di->fw_image_ap;
4907 priv->fw_alt = di->fw_image_sta;
4908 } else if (!ap_mode_default && di->fw_image_sta) {
4909 priv->fw_pref = di->fw_image_sta;
4910 priv->fw_alt = di->fw_image_ap;
4911 } else if (ap_mode_default && !di->fw_image_ap && di->fw_image_sta) {
0863ade8 4912 printk(KERN_WARNING "AP fw is unavailable. Using STA fw.");
99020471 4913 priv->fw_pref = di->fw_image_sta;
0863ade8
BC		 4914 } else if (!ap_mode_default && !di->fw_image_sta && di->fw_image_ap) {
4915 printk(KERN_WARNING "STA fw is unavailable. Using AP fw.");
99020471
BC		 4916 priv->fw_pref = di->fw_image_ap;
4917 }
4918 rc = mwl8k_init_firmware(hw, priv->fw_pref, true);
3cc7772c
BC		 4919 if (rc)
4920 goto err_stop_firmware;
99020471 4921 return rc;
3cc7772c 4922
be695fc4
LB		 4923err_stop_firmware:
4924 mwl8k_hw_reset(priv);
be695fc4
LB		 4925
4926err_iounmap:
a66098da
LB		 4927 if (priv->regs != NULL)
4928 pci_iounmap(pdev, priv->regs);
4929
5b9482dd
LB		 4930 if (priv->sram != NULL)
4931 pci_iounmap(pdev, priv->sram);
4932
a66098da
LB		 4933 pci_set_drvdata(pdev, NULL);
4934 ieee80211_free_hw(hw);
4935
4936err_free_reg:
4937 pci_release_regions(pdev);
3db95e50
LB		 4938
4939err_disable_device:
a66098da
LB		 4940 pci_disable_device(pdev);
4941
4942 return rc;
4943}
4944
230f7af0 4945static void __devexit mwl8k_shutdown(struct pci_dev *pdev)
a66098da
LB		 4946{
4947 printk(KERN_ERR "===>%s(%u)\n", __func__, __LINE__);
4948}
4949
230f7af0 4950static void __devexit mwl8k_remove(struct pci_dev *pdev)
a66098da
LB		 4951{
4952 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
4953 struct mwl8k_priv *priv;
4954 int i;
4955
4956 if (hw == NULL)
4957 return;
4958 priv = hw->priv;
4959
99020471
BC		 4960 wait_for_completion(&priv->firmware_loading_complete);
4961
4962 if (priv->fw_state == FW_STATE_ERROR) {
4963 mwl8k_hw_reset(priv);
4964 goto unmap;
4965 }
4966
a66098da
LB		 4967 ieee80211_stop_queues(hw);
4968
60aa569f
LB		 4969 ieee80211_unregister_hw(hw);
4970
67e2eb27 4971 /* Remove TX reclaim and RX tasklets. */
1e9f9de3 4972 tasklet_kill(&priv->poll_tx_task);
67e2eb27 4973 tasklet_kill(&priv->poll_rx_task);
a66098da 4974
a66098da
LB		 4975 /* Stop hardware */
4976 mwl8k_hw_reset(priv);
4977
4978 /* Return all skbs to mac80211 */
4979 for (i = 0; i < MWL8K_TX_QUEUES; i++)
efb7c49a 4980 mwl8k_txq_reclaim(hw, i, INT_MAX, 1);
a66098da 4981
a66098da
LB		 4982 for (i = 0; i < MWL8K_TX_QUEUES; i++)
4983 mwl8k_txq_deinit(hw, i);
4984
4985 mwl8k_rxq_deinit(hw, 0);
4986
c2c357ce 4987 pci_free_consistent(priv->pdev, 4, priv->cookie, priv->cookie_dma);
a66098da 4988
99020471 4989unmap:
a66098da 4990 pci_iounmap(pdev, priv->regs);
5b9482dd 4991 pci_iounmap(pdev, priv->sram);
a66098da
LB		 4992 pci_set_drvdata(pdev, NULL);
4993 ieee80211_free_hw(hw);
4994 pci_release_regions(pdev);
4995 pci_disable_device(pdev);
4996}
4997
4998static struct pci_driver mwl8k_driver = {
4999 .name = MWL8K_NAME,
45a390dd 5000 .id_table = mwl8k_pci_id_table,
a66098da
LB		 5001 .probe = mwl8k_probe,
5002 .remove = __devexit_p(mwl8k_remove),
5003 .shutdown = __devexit_p(mwl8k_shutdown),
5004};
5005
5006static int __init mwl8k_init(void)
5007{
5008 return pci_register_driver(&mwl8k_driver);
5009}
5010
5011static void __exit mwl8k_exit(void)
5012{
5013 pci_unregister_driver(&mwl8k_driver);
5014}
5015
5016module_init(mwl8k_init);
5017module_exit(mwl8k_exit);
c2c357ce
LB		 5018
5019MODULE_DESCRIPTION(MWL8K_DESC);
5020MODULE_VERSION(MWL8K_VERSION);
5021MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>");
5022MODULE_LICENSE("GPL");
Linux kernel - Deliverables
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