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rtlwifi: Add missing newlines to RT_TRACE calls
[deliverable/linux.git] / drivers / net / wireless / realtek / rtlwifi / btcoexist / halbtc8821a2ant.c
CommitLineData
c96fd200
LF		 1/******************************************************************************
2 *
3 * Copyright(c) 2012 Realtek Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * The full GNU General Public License is included in this distribution in the
15 * file called LICENSE.
16 *
17 * Contact Information:
18 * wlanfae <wlanfae@realtek.com>
19 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
20 * Hsinchu 300, Taiwan.
21 *
22 * Larry Finger <Larry.Finger@lwfinger.net>
23 *
24 *****************************************************************************/
25
26/*============================================================
27 * Description:
28 *
29 * This file is for RTL8821A Co-exist mechanism
30 *
31 * History
32 * 2012/08/22 Cosa first check in.
33 * 2012/11/14 Cosa Revise for 8821A 2Ant out sourcing.
34 *
35 *============================================================
36 */
37
38/*============================================================
39 * include files
40 *============================================================
41*/
42#include "halbt_precomp.h"
43/*============================================================
44 * Global variables, these are static variables
45 *============================================================
46 */
47static struct coex_dm_8821a_2ant glcoex_dm_8821a_2ant;
48static struct coex_dm_8821a_2ant *coex_dm = &glcoex_dm_8821a_2ant;
49static struct coex_sta_8821a_2ant glcoex_sta_8821a_2ant;
50static struct coex_sta_8821a_2ant *coex_sta = &glcoex_sta_8821a_2ant;
51
52static const char *const glbt_info_src_8821a_2ant[] = {
53 "BT Info[wifi fw]",
54 "BT Info[bt rsp]",
55 "BT Info[bt auto report]",
56};
57
58static u32 glcoex_ver_date_8821a_2ant = 20130618;
59static u32 glcoex_ver_8821a_2ant = 0x5050;
60
61/*============================================================
62 * local function proto type if needed
63 *============================================================
64 *============================================================
65 * local function start with halbtc8821a2ant_
66 *============================================================
67 */
68static u8 halbtc8821a2ant_bt_rssi_state(u8 level_num, u8 rssi_thresh,
69 u8 rssi_thresh1)
70{
71 long bt_rssi = 0;
72 u8 bt_rssi_state = coex_sta->pre_bt_rssi_state;
73
74 bt_rssi = coex_sta->bt_rssi;
75
76 if (level_num == 2) {
77 if ((coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_LOW) ||
78 (coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
79 long tmp = rssi_thresh +
80 BTC_RSSI_COEX_THRESH_TOL_8821A_2ANT;
81 if (bt_rssi >= tmp) {
82 bt_rssi_state = BTC_RSSI_STATE_HIGH;
466414a0
JP		 83 btc_alg_dbg(ALGO_BT_RSSI_STATE,
84 "[BTCoex], BT Rssi state switch to High\n");
c96fd200
LF		 85 } else {
86 bt_rssi_state = BTC_RSSI_STATE_STAY_LOW;
466414a0
JP		 87 btc_alg_dbg(ALGO_BT_RSSI_STATE,
88 "[BTCoex], BT Rssi state stay at Low\n");
c96fd200
LF		 89 }
90 } else {
91 if (bt_rssi < rssi_thresh) {
92 bt_rssi_state = BTC_RSSI_STATE_LOW;
466414a0
JP		 93 btc_alg_dbg(ALGO_BT_RSSI_STATE,
94 "[BTCoex], BT Rssi state switch to Low\n");
c96fd200
LF		 95 } else {
96 bt_rssi_state = BTC_RSSI_STATE_STAY_HIGH;
466414a0
JP		 97 btc_alg_dbg(ALGO_BT_RSSI_STATE,
98 "[BTCoex], BT Rssi state stay at High\n");
c96fd200
LF		 99 }
100 }
101 } else if (level_num == 3) {
102 if (rssi_thresh > rssi_thresh1) {
466414a0
JP		 103 btc_alg_dbg(ALGO_BT_RSSI_STATE,
104 "[BTCoex], BT Rssi thresh error!!\n");
c96fd200
LF		 105 return coex_sta->pre_bt_rssi_state;
106 }
107
108 if ((coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_LOW) ||
109 (coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
110 if (bt_rssi >=
111 (rssi_thresh+BTC_RSSI_COEX_THRESH_TOL_8821A_2ANT)) {
112 bt_rssi_state = BTC_RSSI_STATE_MEDIUM;
466414a0
JP		 113 btc_alg_dbg(ALGO_BT_RSSI_STATE,
114 "[BTCoex], BT Rssi state switch to Medium\n");
c96fd200
LF		 115 } else {
116 bt_rssi_state = BTC_RSSI_STATE_STAY_LOW;
466414a0
JP		 117 btc_alg_dbg(ALGO_BT_RSSI_STATE,
118 "[BTCoex], BT Rssi state stay at Low\n");
c96fd200
LF		 119 }
120 } else if ((coex_sta->pre_bt_rssi_state ==
121 BTC_RSSI_STATE_MEDIUM) ||
122 (coex_sta->pre_bt_rssi_state ==
123 BTC_RSSI_STATE_STAY_MEDIUM)) {
124 if (bt_rssi >=
125 (rssi_thresh1 +
126 BTC_RSSI_COEX_THRESH_TOL_8821A_2ANT)) {
127 bt_rssi_state = BTC_RSSI_STATE_HIGH;
466414a0
JP		 128 btc_alg_dbg(ALGO_BT_RSSI_STATE,
129 "[BTCoex], BT Rssi state switch to High\n");
c96fd200
LF		 130 } else if (bt_rssi < rssi_thresh) {
131 bt_rssi_state = BTC_RSSI_STATE_LOW;
466414a0
JP		 132 btc_alg_dbg(ALGO_BT_RSSI_STATE,
133 "[BTCoex], BT Rssi state switch to Low\n");
c96fd200
LF		 134 } else {
135 bt_rssi_state = BTC_RSSI_STATE_STAY_MEDIUM;
466414a0
JP		 136 btc_alg_dbg(ALGO_BT_RSSI_STATE,
137 "[BTCoex], BT Rssi state stay at Medium\n");
c96fd200
LF		 138 }
139 } else {
140 if (bt_rssi < rssi_thresh1) {
141 bt_rssi_state = BTC_RSSI_STATE_MEDIUM;
466414a0
JP		 142 btc_alg_dbg(ALGO_BT_RSSI_STATE,
143 "[BTCoex], BT Rssi state switch to Medium\n");
c96fd200
LF		 144 } else {
145 bt_rssi_state = BTC_RSSI_STATE_STAY_HIGH;
466414a0
JP		 146 btc_alg_dbg(ALGO_BT_RSSI_STATE,
147 "[BTCoex], BT Rssi state stay at High\n");
c96fd200
LF		 148 }
149 }
150 }
151
152 coex_sta->pre_bt_rssi_state = bt_rssi_state;
153
154 return bt_rssi_state;
155}
156
157static u8 halbtc8821a2ant_wifi_rssi_state(struct btc_coexist *btcoexist,
158 u8 index, u8 level_num,
159 u8 rssi_thresh, u8 rssi_thresh1)
160{
161 long wifi_rssi = 0;
162 u8 wifi_rssi_state = coex_sta->pre_wifi_rssi_state[index];
163
164 btcoexist->btc_get(btcoexist, BTC_GET_S4_WIFI_RSSI, &wifi_rssi);
165
166 if (level_num == 2) {
167 if ((coex_sta->pre_wifi_rssi_state[index] ==
168 BTC_RSSI_STATE_LOW) ||
169 (coex_sta->pre_wifi_rssi_state[index] ==
170 BTC_RSSI_STATE_STAY_LOW)) {
171 if (wifi_rssi >=
172 (rssi_thresh+BTC_RSSI_COEX_THRESH_TOL_8821A_2ANT)) {
173 wifi_rssi_state = BTC_RSSI_STATE_HIGH;
466414a0
JP		 174 btc_alg_dbg(ALGO_WIFI_RSSI_STATE,
175 "[BTCoex], wifi RSSI state switch to High\n");
c96fd200
LF		 176 } else {
177 wifi_rssi_state = BTC_RSSI_STATE_STAY_LOW;
466414a0
JP		 178 btc_alg_dbg(ALGO_WIFI_RSSI_STATE,
179 "[BTCoex], wifi RSSI state stay at Low\n");
c96fd200
LF		 180 }
181 } else {
182 if (wifi_rssi < rssi_thresh) {
183 wifi_rssi_state = BTC_RSSI_STATE_LOW;
466414a0
JP		 184 btc_alg_dbg(ALGO_WIFI_RSSI_STATE,
185 "[BTCoex], wifi RSSI state switch to Low\n");
c96fd200
LF		 186 } else {
187 wifi_rssi_state = BTC_RSSI_STATE_STAY_HIGH;
466414a0
JP		 188 btc_alg_dbg(ALGO_WIFI_RSSI_STATE,
189 "[BTCoex], wifi RSSI state stay at High\n");
c96fd200
LF		 190 }
191 }
192 } else if (level_num == 3) {
193 if (rssi_thresh > rssi_thresh1) {
466414a0
JP		 194 btc_alg_dbg(ALGO_WIFI_RSSI_STATE,
195 "[BTCoex], wifi RSSI thresh error!!\n");
c96fd200
LF		 196 return coex_sta->pre_wifi_rssi_state[index];
197 }
198
199 if ((coex_sta->pre_wifi_rssi_state[index] ==
200 BTC_RSSI_STATE_LOW) ||
201 (coex_sta->pre_wifi_rssi_state[index] ==
202 BTC_RSSI_STATE_STAY_LOW)) {
203 if (wifi_rssi >=
204 (rssi_thresh+BTC_RSSI_COEX_THRESH_TOL_8821A_2ANT)) {
205 wifi_rssi_state = BTC_RSSI_STATE_MEDIUM;
466414a0
JP		 206 btc_alg_dbg(ALGO_WIFI_RSSI_STATE,
207 "[BTCoex], wifi RSSI state switch to Medium\n");
c96fd200
LF		 208 } else {
209 wifi_rssi_state = BTC_RSSI_STATE_STAY_LOW;
466414a0
JP		 210 btc_alg_dbg(ALGO_WIFI_RSSI_STATE,
211 "[BTCoex], wifi RSSI state stay at Low\n");
c96fd200
LF		 212 }
213 } else if ((coex_sta->pre_wifi_rssi_state[index] ==
214 BTC_RSSI_STATE_MEDIUM) ||
215 (coex_sta->pre_wifi_rssi_state[index] ==
216 BTC_RSSI_STATE_STAY_MEDIUM)) {
217 if (wifi_rssi >= (rssi_thresh1 +
218 BTC_RSSI_COEX_THRESH_TOL_8821A_2ANT)) {
219 wifi_rssi_state = BTC_RSSI_STATE_HIGH;
466414a0
JP		 220 btc_alg_dbg(ALGO_WIFI_RSSI_STATE,
221 "[BTCoex], wifi RSSI state switch to High\n");
c96fd200
LF		 222 } else if (wifi_rssi < rssi_thresh) {
223 wifi_rssi_state = BTC_RSSI_STATE_LOW;
466414a0
JP		 224 btc_alg_dbg(ALGO_WIFI_RSSI_STATE,
225 "[BTCoex], wifi RSSI state switch to Low\n");
c96fd200
LF		 226 } else {
227 wifi_rssi_state = BTC_RSSI_STATE_STAY_MEDIUM;
466414a0
JP		 228 btc_alg_dbg(ALGO_WIFI_RSSI_STATE,
229 "[BTCoex], wifi RSSI state stay at Medium\n");
c96fd200
LF		 230 }
231 } else {
232 if (wifi_rssi < rssi_thresh1) {
233 wifi_rssi_state = BTC_RSSI_STATE_MEDIUM;
466414a0
JP		 234 btc_alg_dbg(ALGO_WIFI_RSSI_STATE,
235 "[BTCoex], wifi RSSI state switch to Medium\n");
c96fd200
LF		 236 } else {
237 wifi_rssi_state = BTC_RSSI_STATE_STAY_HIGH;
466414a0
JP		 238 btc_alg_dbg(ALGO_WIFI_RSSI_STATE,
239 "[BTCoex], wifi RSSI state stay at High\n");
c96fd200
LF		 240 }
241 }
242 }
243 coex_sta->pre_wifi_rssi_state[index] = wifi_rssi_state;
244
245 return wifi_rssi_state;
246}
247
248static void btc8821a2ant_mon_bt_en_dis(struct btc_coexist *btcoexist)
249{
250 static bool pre_bt_disabled;
251 static u32 bt_disable_cnt;
252 bool bt_active = true, bt_disabled = false;
253
254 /* This function check if bt is disabled*/
255
256 if (coex_sta->high_priority_tx == 0 &&
257 coex_sta->high_priority_rx == 0 &&
258 coex_sta->low_priority_tx == 0 &&
259 coex_sta->low_priority_rx == 0)
260 bt_active = false;
261 if (coex_sta->high_priority_tx == 0xffff &&
262 coex_sta->high_priority_rx == 0xffff &&
263 coex_sta->low_priority_tx == 0xffff &&
264 coex_sta->low_priority_rx == 0xffff)
265 bt_active = false;
266 if (bt_active) {
267 bt_disable_cnt = 0;
268 bt_disabled = false;
269 btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_DISABLE,
270 &bt_disabled);
466414a0
JP		 271 btc_alg_dbg(ALGO_BT_MONITOR,
272 "[BTCoex], BT is enabled !!\n");
c96fd200
LF		 273 } else {
274 bt_disable_cnt++;
466414a0
JP		 275 btc_alg_dbg(ALGO_BT_MONITOR,
276 "[BTCoex], bt all counters = 0, %d times!!\n",
277 bt_disable_cnt);
c96fd200
LF		 278 if (bt_disable_cnt >= 2) {
279 bt_disabled = true;
280 btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_DISABLE,
281 &bt_disabled);
466414a0
JP		 282 btc_alg_dbg(ALGO_BT_MONITOR,
283 "[BTCoex], BT is disabled !!\n");
c96fd200
LF		 284 }
285 }
286 if (pre_bt_disabled != bt_disabled) {
466414a0
JP		 287 btc_alg_dbg(ALGO_BT_MONITOR,
288 "[BTCoex], BT is from %s to %s!!\n",
289 (pre_bt_disabled ? "disabled" : "enabled"),
290 (bt_disabled ? "disabled" : "enabled"));
c96fd200
LF		 291 pre_bt_disabled = bt_disabled;
292 }
293}
294
295static void halbtc8821a2ant_monitor_bt_ctr(struct btc_coexist *btcoexist)
296{
297 u32 reg_hp_txrx, reg_lp_txrx, u4tmp;
298 u32 reg_hp_tx = 0, reg_hp_rx = 0, reg_lp_tx = 0, reg_lp_rx = 0;
299
300 reg_hp_txrx = 0x770;
301 reg_lp_txrx = 0x774;
302
303 u4tmp = btcoexist->btc_read_4byte(btcoexist, reg_hp_txrx);
304 reg_hp_tx = u4tmp & MASKLWORD;
305 reg_hp_rx = (u4tmp & MASKHWORD)>>16;
306
307 u4tmp = btcoexist->btc_read_4byte(btcoexist, reg_lp_txrx);
308 reg_lp_tx = u4tmp & MASKLWORD;
309 reg_lp_rx = (u4tmp & MASKHWORD)>>16;
310
311 coex_sta->high_priority_tx = reg_hp_tx;
312 coex_sta->high_priority_rx = reg_hp_rx;
313 coex_sta->low_priority_tx = reg_lp_tx;
314 coex_sta->low_priority_rx = reg_lp_rx;
315
466414a0
JP		 316 btc_alg_dbg(ALGO_BT_MONITOR,
317 "[BTCoex], High Priority Tx/Rx (reg 0x%x) = 0x%x(%d)/0x%x(%d)\n",
318 reg_hp_txrx, reg_hp_tx, reg_hp_tx, reg_hp_rx, reg_hp_rx);
319 btc_alg_dbg(ALGO_BT_MONITOR,
320 "[BTCoex], Low Priority Tx/Rx (reg 0x%x) = 0x%x(%d)/0x%x(%d)\n",
321 reg_lp_txrx, reg_lp_tx, reg_lp_tx, reg_lp_rx, reg_lp_rx);
c96fd200
LF		 322
323 /* reset counter */
324 btcoexist->btc_write_1byte(btcoexist, 0x76e, 0xc);
325}
326
327static void halbtc8821a2ant_query_bt_info(struct btc_coexist *btcoexist)
328{
329 u8 h2c_parameter[1] = {0};
330
331 coex_sta->c2h_bt_info_req_sent = true;
332
333 h2c_parameter[0] |= BIT0; /* trigger */
334
466414a0
JP		 335 btc_alg_dbg(ALGO_TRACE_FW_EXEC,
336 "[BTCoex], Query Bt Info, FW write 0x61 = 0x%x\n",
337 h2c_parameter[0]);
c96fd200
LF		 338
339 btcoexist->btc_fill_h2c(btcoexist, 0x61, 1, h2c_parameter);
340}
341
342static u8 halbtc8821a2ant_action_algorithm(struct btc_coexist *btcoexist)
343{
344 struct btc_stack_info *stack_info = &btcoexist->stack_info;
345 bool bt_hs_on = false;
346 u8 algorithm = BT_8821A_2ANT_COEX_ALGO_UNDEFINED;
347 u8 num_of_diff_profile = 0;
348
349 btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
350
351 /*for win-8 stack HID report error*/
352 /* sync BTInfo with BT firmware and stack */
353 if (!stack_info->hid_exist)
354 stack_info->hid_exist = coex_sta->hid_exist;
355 /* when stack HID report error, here we use the info from bt fw. */
356 if (!stack_info->bt_link_exist)
357 stack_info->bt_link_exist = coex_sta->bt_link_exist;
358
359 if (!coex_sta->bt_link_exist) {
466414a0
JP		 360 btc_alg_dbg(ALGO_TRACE,
361 "[BTCoex], No profile exists!!!\n");
c96fd200
LF		 362 return algorithm;
363 }
364
365 if (coex_sta->sco_exist)
366 num_of_diff_profile++;
367 if (coex_sta->hid_exist)
368 num_of_diff_profile++;
369 if (coex_sta->pan_exist)
370 num_of_diff_profile++;
371 if (coex_sta->a2dp_exist)
372 num_of_diff_profile++;
373
374 if (num_of_diff_profile == 1) {
375 if (coex_sta->sco_exist) {
466414a0
JP		 376 btc_alg_dbg(ALGO_TRACE,
377 "[BTCoex], SCO only\n");
c96fd200
LF		 378 algorithm = BT_8821A_2ANT_COEX_ALGO_SCO;
379 } else {
380 if (coex_sta->hid_exist) {
466414a0
JP		 381 btc_alg_dbg(ALGO_TRACE,
382 "[BTCoex], HID only\n");
c96fd200
LF		 383 algorithm = BT_8821A_2ANT_COEX_ALGO_HID;
384 } else if (coex_sta->a2dp_exist) {
466414a0
JP		 385 btc_alg_dbg(ALGO_TRACE,
386 "[BTCoex], A2DP only\n");
c96fd200
LF		 387 algorithm = BT_8821A_2ANT_COEX_ALGO_A2DP;
388 } else if (coex_sta->pan_exist) {
389 if (bt_hs_on) {
466414a0
JP		 390 btc_alg_dbg(ALGO_TRACE,
391 "[BTCoex], PAN(HS) only\n");
c96fd200
LF		 392 algorithm = BT_8821A_2ANT_COEX_ALGO_PANHS;
393 } else {
466414a0
JP		 394 btc_alg_dbg(ALGO_TRACE,
395 "[BTCoex], PAN(EDR) only\n");
c96fd200
LF		 396 algorithm = BT_8821A_2ANT_COEX_ALGO_PANEDR;
397 }
398 }
399 }
400 } else if (num_of_diff_profile == 2) {
401 if (coex_sta->sco_exist) {
402 if (coex_sta->hid_exist) {
466414a0
JP		 403 btc_alg_dbg(ALGO_TRACE,
404 "[BTCoex], SCO + HID\n");
c96fd200
LF		 405 algorithm = BT_8821A_2ANT_COEX_ALGO_PANEDR_HID;
406 } else if (coex_sta->a2dp_exist) {
466414a0
JP		 407 btc_alg_dbg(ALGO_TRACE,
408 "[BTCoex], SCO + A2DP ==> SCO\n");
c96fd200
LF		 409 algorithm = BT_8821A_2ANT_COEX_ALGO_PANEDR_HID;
410 } else if (coex_sta->pan_exist) {
411 if (bt_hs_on) {
466414a0
JP		 412 btc_alg_dbg(ALGO_TRACE,
413 "[BTCoex], SCO + PAN(HS)\n");
c96fd200
LF		 414 algorithm = BT_8821A_2ANT_COEX_ALGO_SCO;
415 } else {
466414a0
JP		 416 btc_alg_dbg(ALGO_TRACE,
417 "[BTCoex], SCO + PAN(EDR)\n");
c96fd200
LF		 418 algorithm = BT_8821A_2ANT_COEX_ALGO_PANEDR_HID;
419 }
420 }
421 } else {
422 if (coex_sta->hid_exist &&
423 coex_sta->a2dp_exist) {
466414a0
JP		 424 btc_alg_dbg(ALGO_TRACE,
425 "[BTCoex], HID + A2DP\n");
c96fd200
LF		 426 algorithm = BT_8821A_2ANT_COEX_ALGO_HID_A2DP;
427 } else if (coex_sta->hid_exist &&
428 coex_sta->pan_exist) {
429 if (bt_hs_on) {
466414a0
JP		 430 btc_alg_dbg(ALGO_TRACE,
431 "[BTCoex], HID + PAN(HS)\n");
c96fd200
LF		 432 algorithm = BT_8821A_2ANT_COEX_ALGO_HID;
433 } else {
466414a0
JP		 434 btc_alg_dbg(ALGO_TRACE,
435 "[BTCoex], HID + PAN(EDR)\n");
c96fd200
LF		 436 algorithm = BT_8821A_2ANT_COEX_ALGO_PANEDR_HID;
437 }
438 } else if (coex_sta->pan_exist &&
439 coex_sta->a2dp_exist) {
440 if (bt_hs_on) {
466414a0
JP		 441 btc_alg_dbg(ALGO_TRACE,
442 "[BTCoex], A2DP + PAN(HS)\n");
c96fd200
LF		 443 algorithm = BT_8821A_2ANT_COEX_ALGO_A2DP_PANHS;
444 } else {
466414a0
JP		 445 btc_alg_dbg(ALGO_TRACE,
446 "[BTCoex], A2DP + PAN(EDR)\n");
c96fd200
LF		 447 algorithm = BT_8821A_2ANT_COEX_ALGO_PANEDR_A2DP;
448 }
449 }
450 }
451 } else if (num_of_diff_profile == 3) {
452 if (coex_sta->sco_exist) {
453 if (coex_sta->hid_exist &&
454 coex_sta->a2dp_exist) {
466414a0
JP		 455 btc_alg_dbg(ALGO_TRACE,
456 "[BTCoex], SCO + HID + A2DP ==> HID\n");
c96fd200
LF		 457 algorithm = BT_8821A_2ANT_COEX_ALGO_PANEDR_HID;
458 } else if (coex_sta->hid_exist &&
459 coex_sta->pan_exist) {
460 if (bt_hs_on) {
466414a0
JP		 461 btc_alg_dbg(ALGO_TRACE,
462 "[BTCoex], SCO + HID + PAN(HS)\n");
c96fd200
LF		 463 algorithm = BT_8821A_2ANT_COEX_ALGO_PANEDR_HID;
464 } else {
466414a0
JP		 465 btc_alg_dbg(ALGO_TRACE,
466 "[BTCoex], SCO + HID + PAN(EDR)\n");
c96fd200
LF		 467 algorithm = BT_8821A_2ANT_COEX_ALGO_PANEDR_HID;
468 }
469 } else if (coex_sta->pan_exist &&
470 coex_sta->a2dp_exist) {
471 if (bt_hs_on) {
466414a0
JP		 472 btc_alg_dbg(ALGO_TRACE,
473 "[BTCoex], SCO + A2DP + PAN(HS)\n");
c96fd200
LF		 474 algorithm = BT_8821A_2ANT_COEX_ALGO_PANEDR_HID;
475 } else {
466414a0
JP		 476 btc_alg_dbg(ALGO_TRACE,
477 "[BTCoex], SCO + A2DP + PAN(EDR) ==> HID\n");
c96fd200
LF		 478 algorithm = BT_8821A_2ANT_COEX_ALGO_PANEDR_HID;
479 }
480 }
481 } else {
482 if (coex_sta->hid_exist &&
483 coex_sta->pan_exist &&
484 coex_sta->a2dp_exist) {
485 if (bt_hs_on) {
466414a0
JP		 486 btc_alg_dbg(ALGO_TRACE,
487 "[BTCoex], HID + A2DP + PAN(HS)\n");
c96fd200
LF		 488 algorithm = BT_8821A_2ANT_COEX_ALGO_HID_A2DP;
489 } else {
466414a0
JP		 490 btc_alg_dbg(ALGO_TRACE,
491 "[BTCoex], HID + A2DP + PAN(EDR)\n");
c96fd200
LF		 492 algorithm = BT_8821A_2ANT_COEX_ALGO_HID_A2DP_PANEDR;
493 }
494 }
495 }
496 } else if (num_of_diff_profile >= 3) {
497 if (coex_sta->sco_exist) {
498 if (coex_sta->hid_exist &&
499 coex_sta->pan_exist &&
500 coex_sta->a2dp_exist) {
501 if (bt_hs_on) {
466414a0
JP		 502 btc_alg_dbg(ALGO_TRACE,
503 "[BTCoex], Error!!! SCO + HID + A2DP + PAN(HS)\n");
c96fd200
LF		 504
505 } else {
466414a0
JP		 506 btc_alg_dbg(ALGO_TRACE,
507 "[BTCoex], SCO + HID + A2DP + PAN(EDR)==>PAN(EDR)+HID\n");
c96fd200
LF		 508 algorithm = BT_8821A_2ANT_COEX_ALGO_PANEDR_HID;
509 }
510 }
511 }
512 }
513 return algorithm;
514}
515
516static bool halbtc8821a2ant_need_to_dec_bt_pwr(struct btc_coexist *btcoexist)
517{
518 bool ret = false;
519 bool bt_hs_on = false, wifi_connected = false;
520 long bt_hs_rssi = 0;
521 u8 bt_rssi_state;
522
523 if (!btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on))
524 return false;
525 if (!btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
526 &wifi_connected))
527 return false;
528 if (!btcoexist->btc_get(btcoexist, BTC_GET_S4_HS_RSSI, &bt_hs_rssi))
529 return false;
530
531 bt_rssi_state = halbtc8821a2ant_bt_rssi_state(2, 35, 0);
532
533 if (wifi_connected) {
534 if (bt_hs_on) {
535 if (bt_hs_rssi > 37) {
466414a0
JP		 536 btc_alg_dbg(ALGO_TRACE_FW,
537 "[BTCoex], Need to decrease bt power for HS mode!!\n");
c96fd200
LF		 538 ret = true;
539 }
540 } else {
541 if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
542 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
466414a0
JP		 543 btc_alg_dbg(ALGO_TRACE_FW,
544 "[BTCoex], Need to decrease bt power for Wifi is connected!!\n");
c96fd200
LF		 545 ret = true;
546 }
547 }
548 }
549 return ret;
550}
551
552static void btc8821a2ant_set_fw_dac_swing_lev(struct btc_coexist *btcoexist,
553 u8 dac_swing_lvl)
554{
555 u8 h2c_parameter[1] = {0};
556
557 /* There are several type of dacswing
558 * 0x18/ 0x10/ 0xc/ 0x8/ 0x4/ 0x6
559 */
560 h2c_parameter[0] = dac_swing_lvl;
561
466414a0
JP		 562 btc_alg_dbg(ALGO_TRACE_FW_EXEC,
563 "[BTCoex], Set Dac Swing Level = 0x%x\n", dac_swing_lvl);
564 btc_alg_dbg(ALGO_TRACE_FW_EXEC,
565 "[BTCoex], FW write 0x64 = 0x%x\n", h2c_parameter[0]);
c96fd200
LF		 566
567 btcoexist->btc_fill_h2c(btcoexist, 0x64, 1, h2c_parameter);
568}
569
570static void halbtc8821a2ant_set_fw_dec_bt_pwr(struct btc_coexist *btcoexist,
571 bool dec_bt_pwr)
572{
573 u8 h2c_parameter[1] = {0};
574
575 h2c_parameter[0] = 0;
576
577 if (dec_bt_pwr)
578 h2c_parameter[0] |= BIT1;
579
466414a0
JP		 580 btc_alg_dbg(ALGO_TRACE_FW_EXEC,
581 "[BTCoex], decrease Bt Power : %s, FW write 0x62 = 0x%x\n",
582 (dec_bt_pwr ? "Yes!!" : "No!!"), h2c_parameter[0]);
c96fd200
LF		 583
584 btcoexist->btc_fill_h2c(btcoexist, 0x62, 1, h2c_parameter);
585}
586
587static void halbtc8821a2ant_dec_bt_pwr(struct btc_coexist *btcoexist,
588 bool force_exec, bool dec_bt_pwr)
589{
466414a0
JP		 590 btc_alg_dbg(ALGO_TRACE_FW,
591 "[BTCoex], %s Dec BT power = %s\n",
592 (force_exec ? "force to" : ""),
593 ((dec_bt_pwr) ? "ON" : "OFF"));
c96fd200
LF		 594 coex_dm->cur_dec_bt_pwr = dec_bt_pwr;
595
596 if (!force_exec) {
466414a0
JP		 597 btc_alg_dbg(ALGO_TRACE_FW_DETAIL,
598 "[BTCoex], pre_dec_bt_pwr = %d, cur_dec_bt_pwr = %d\n",
599 coex_dm->pre_dec_bt_pwr, coex_dm->cur_dec_bt_pwr);
c96fd200
LF		 600
601 if (coex_dm->pre_dec_bt_pwr == coex_dm->cur_dec_bt_pwr)
602 return;
603 }
604 halbtc8821a2ant_set_fw_dec_bt_pwr(btcoexist, coex_dm->cur_dec_bt_pwr);
605
606 coex_dm->pre_dec_bt_pwr = coex_dm->cur_dec_bt_pwr;
607}
608
609static void btc8821a2ant_set_fw_bt_lna_constr(struct btc_coexist *btcoexist,
610 bool bt_lna_cons_on)
611{
612 u8 h2c_parameter[2] = {0};
613
614 h2c_parameter[0] = 0x3; /* opCode, 0x3 = BT_SET_LNA_CONSTRAIN */
615
616 if (bt_lna_cons_on)
617 h2c_parameter[1] |= BIT0;
618
466414a0
JP		 619 btc_alg_dbg(ALGO_TRACE_FW_EXEC,
620 "[BTCoex], set BT LNA Constrain: %s, FW write 0x69 = 0x%x\n",
621 bt_lna_cons_on ? "ON!!" : "OFF!!",
622 h2c_parameter[0] << 8 | h2c_parameter[1]);
c96fd200
LF		 623
624 btcoexist->btc_fill_h2c(btcoexist, 0x69, 2, h2c_parameter);
625}
626
627static void btc8821a2_set_bt_lna_const(struct btc_coexist *btcoexist,
628 bool force_exec, bool bt_lna_cons_on)
629{
466414a0
JP		 630 btc_alg_dbg(ALGO_TRACE_FW,
631 "[BTCoex], %s BT Constrain = %s\n",
632 (force_exec ? "force" : ""),
633 ((bt_lna_cons_on) ? "ON" : "OFF"));
c96fd200
LF		 634 coex_dm->cur_bt_lna_constrain = bt_lna_cons_on;
635
636 if (!force_exec) {
466414a0
JP		 637 btc_alg_dbg(ALGO_TRACE_FW_DETAIL,
638 "[BTCoex], pre_bt_lna_constrain = %d,cur_bt_lna_constrain = %d\n",
639 coex_dm->pre_bt_lna_constrain,
640 coex_dm->cur_bt_lna_constrain);
c96fd200
LF		 641
642 if (coex_dm->pre_bt_lna_constrain ==
643 coex_dm->cur_bt_lna_constrain)
644 return;
645 }
646 btc8821a2ant_set_fw_bt_lna_constr(btcoexist,
647 coex_dm->cur_bt_lna_constrain);
648
649 coex_dm->pre_bt_lna_constrain = coex_dm->cur_bt_lna_constrain;
650}
651
652static void halbtc8821a2ant_set_fw_bt_psd_mode(struct btc_coexist *btcoexist,
653 u8 bt_psd_mode)
654{
655 u8 h2c_parameter[2] = {0};
656
657 h2c_parameter[0] = 0x2; /* opCode, 0x2 = BT_SET_PSD_MODE */
658
659 h2c_parameter[1] = bt_psd_mode;
660
466414a0
JP		 661 btc_alg_dbg(ALGO_TRACE_FW_EXEC,
662 "[BTCoex], set BT PSD mode = 0x%x, FW write 0x69 = 0x%x\n",
663 h2c_parameter[1],
664 h2c_parameter[0] << 8 | h2c_parameter[1]);
c96fd200
LF		 665
666 btcoexist->btc_fill_h2c(btcoexist, 0x69, 2, h2c_parameter);
667}
668
669static void halbtc8821a2ant_set_bt_psd_mode(struct btc_coexist *btcoexist,
670 bool force_exec, u8 bt_psd_mode)
671{
466414a0
JP		 672 btc_alg_dbg(ALGO_TRACE_FW,
673 "[BTCoex], %s BT PSD mode = 0x%x\n",
674 (force_exec ? "force" : ""), bt_psd_mode);
c96fd200
LF		 675 coex_dm->cur_bt_psd_mode = bt_psd_mode;
676
677 if (!force_exec) {
466414a0
JP		 678 btc_alg_dbg(ALGO_TRACE_FW_DETAIL,
679 "[BTCoex], pre_bt_psd_mode = 0x%x, cur_bt_psd_mode = 0x%x\n",
680 coex_dm->pre_bt_psd_mode, coex_dm->cur_bt_psd_mode);
c96fd200
LF		 681
682 if (coex_dm->pre_bt_psd_mode == coex_dm->cur_bt_psd_mode)
683 return;
684 }
685 halbtc8821a2ant_set_fw_bt_psd_mode(btcoexist,
686 coex_dm->cur_bt_psd_mode);
687
688 coex_dm->pre_bt_psd_mode = coex_dm->cur_bt_psd_mode;
689}
690
691static void halbtc8821a2ant_set_bt_auto_report(struct btc_coexist *btcoexist,
692 bool enable_auto_report)
693{
694 u8 h2c_parameter[1] = {0};
695
696 h2c_parameter[0] = 0;
697
698 if (enable_auto_report)
699 h2c_parameter[0] |= BIT0;
700
466414a0
JP		 701 btc_alg_dbg(ALGO_TRACE_FW_EXEC,
702 "[BTCoex], BT FW auto report : %s, FW write 0x68 = 0x%x\n",
703 (enable_auto_report ? "Enabled!!" : "Disabled!!"),
704 h2c_parameter[0]);
c96fd200
LF		 705
706 btcoexist->btc_fill_h2c(btcoexist, 0x68, 1, h2c_parameter);
707}
708
709static void halbtc8821a2ant_bt_auto_report(struct btc_coexist *btcoexist,
710 bool force_exec,
711 bool enable_auto_report)
712{
466414a0
JP		 713 btc_alg_dbg(ALGO_TRACE_FW,
714 "[BTCoex], %s BT Auto report = %s\n",
715 (force_exec ? "force to" : ""),
716 ((enable_auto_report) ? "Enabled" : "Disabled"));
c96fd200
LF		 717 coex_dm->cur_bt_auto_report = enable_auto_report;
718
719 if (!force_exec) {
466414a0
JP		 720 btc_alg_dbg(ALGO_TRACE_FW_DETAIL,
721 "[BTCoex], pre_bt_auto_report = %d, cur_bt_auto_report = %d\n",
722 coex_dm->pre_bt_auto_report,
723 coex_dm->cur_bt_auto_report);
c96fd200
LF		 724
725 if (coex_dm->pre_bt_auto_report == coex_dm->cur_bt_auto_report)
726 return;
727 }
728 halbtc8821a2ant_set_bt_auto_report(btcoexist,
729 coex_dm->cur_bt_auto_report);
730
731 coex_dm->pre_bt_auto_report = coex_dm->cur_bt_auto_report;
732}
733
734static void halbtc8821a2ant_fw_dac_swing_lvl(struct btc_coexist *btcoexist,
735 bool force_exec,
736 u8 fw_dac_swing_lvl)
737{
466414a0
JP		 738 btc_alg_dbg(ALGO_TRACE_FW,
739 "[BTCoex], %s set FW Dac Swing level = %d\n",
740 (force_exec ? "force to" : ""), fw_dac_swing_lvl);
c96fd200
LF		 741 coex_dm->cur_fw_dac_swing_lvl = fw_dac_swing_lvl;
742
743 if (!force_exec) {
466414a0
JP		 744 btc_alg_dbg(ALGO_TRACE_FW_DETAIL,
745 "[BTCoex], pre_fw_dac_swing_lvl = %d, cur_fw_dac_swing_lvl = %d\n",
746 coex_dm->pre_fw_dac_swing_lvl,
747 coex_dm->cur_fw_dac_swing_lvl);
c96fd200
LF		 748
749 if (coex_dm->pre_fw_dac_swing_lvl ==
750 coex_dm->cur_fw_dac_swing_lvl)
751 return;
752 }
753
754 btc8821a2ant_set_fw_dac_swing_lev(btcoexist,
755 coex_dm->cur_fw_dac_swing_lvl);
756
757 coex_dm->pre_fw_dac_swing_lvl = coex_dm->cur_fw_dac_swing_lvl;
758}
759
760static void btc8821a2ant_set_sw_rf_rx_lpf_corner(struct btc_coexist *btcoexist,
761 bool rx_rf_shrink_on)
762{
763 if (rx_rf_shrink_on) {
764 /* Shrink RF Rx LPF corner */
466414a0
JP		 765 btc_alg_dbg(ALGO_TRACE_SW_EXEC,
766 "[BTCoex], Shrink RF Rx LPF corner!!\n");
c96fd200
LF		 767 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1e,
768 0xfffff, 0xffffc);
769 } else {
770 /* Resume RF Rx LPF corner
771 * After initialized, we can use coex_dm->bt_rf0x1e_backup
772 */
773 if (btcoexist->initilized) {
466414a0
JP		 774 btc_alg_dbg(ALGO_TRACE_SW_EXEC,
775 "[BTCoex], Resume RF Rx LPF corner!!\n");
c96fd200
LF		 776 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A,
777 0x1e, 0xfffff,
778 coex_dm->bt_rf0x1e_backup);
779 }
780 }
781}
782
783static void halbtc8821a2ant_RfShrink(struct btc_coexist *btcoexist,
784 bool force_exec, bool rx_rf_shrink_on)
785{
466414a0
JP		 786 btc_alg_dbg(ALGO_TRACE_SW,
787 "[BTCoex], %s turn Rx RF Shrink = %s\n",
788 (force_exec ? "force to" : ""),
789 ((rx_rf_shrink_on) ? "ON" : "OFF"));
c96fd200
LF		 790 coex_dm->cur_rf_rx_lpf_shrink = rx_rf_shrink_on;
791
792 if (!force_exec) {
466414a0
JP		 793 btc_alg_dbg(ALGO_TRACE_SW_DETAIL,
794 "[BTCoex], pre_rf_rx_lpf_shrink = %d, cur_rf_rx_lpf_shrink = %d\n",
795 coex_dm->pre_rf_rx_lpf_shrink,
796 coex_dm->cur_rf_rx_lpf_shrink);
c96fd200
LF		 797
798 if (coex_dm->pre_rf_rx_lpf_shrink ==
799 coex_dm->cur_rf_rx_lpf_shrink)
800 return;
801 }
802 btc8821a2ant_set_sw_rf_rx_lpf_corner(btcoexist,
803 coex_dm->cur_rf_rx_lpf_shrink);
804
805 coex_dm->pre_rf_rx_lpf_shrink = coex_dm->cur_rf_rx_lpf_shrink;
806}
807
808static void btc8821a2ant_SetSwPenTxRateAdapt(struct btc_coexist *btcoexist,
809 bool low_penalty_ra)
810{
811 u8 h2c_parameter[6] = {0};
812
813 h2c_parameter[0] = 0x6; /* opCode, 0x6 = Retry_Penalty */
814
815 if (low_penalty_ra) {
816 h2c_parameter[1] |= BIT0;
817 /*normal rate except MCS7/6/5, OFDM54/48/36 */
818 h2c_parameter[2] = 0x00;
819 /*MCS7 or OFDM54 */
820 h2c_parameter[3] = 0xf7;
821 /*MCS6 or OFDM48 */
822 h2c_parameter[4] = 0xf8;
823 /*MCS5 or OFDM36 */
824 h2c_parameter[5] = 0xf9;
825 }
826
466414a0
JP		 827 btc_alg_dbg(ALGO_TRACE_FW_EXEC,
828 "[BTCoex], set WiFi Low-Penalty Retry: %s",
829 (low_penalty_ra ? "ON!!" : "OFF!!"));
c96fd200
LF		 830
831 btcoexist->btc_fill_h2c(btcoexist, 0x69, 6, h2c_parameter);
832}
833
834static void halbtc8821a2ant_low_penalty_ra(struct btc_coexist *btcoexist,
835 bool force_exec, bool low_penalty_ra)
836{
837 /*return;*/
466414a0
JP		 838 btc_alg_dbg(ALGO_TRACE_SW,
839 "[BTCoex], %s turn LowPenaltyRA = %s\n",
840 (force_exec ? "force to" : ""),
841 ((low_penalty_ra) ? "ON" : "OFF"));
c96fd200
LF		 842 coex_dm->cur_low_penalty_ra = low_penalty_ra;
843
844 if (!force_exec) {
466414a0
JP		 845 btc_alg_dbg(ALGO_TRACE_SW_DETAIL,
846 "[BTCoex], pre_low_penalty_ra = %d, cur_low_penalty_ra = %d\n",
847 coex_dm->pre_low_penalty_ra,
848 coex_dm->cur_low_penalty_ra);
c96fd200
LF		 849
850 if (coex_dm->pre_low_penalty_ra == coex_dm->cur_low_penalty_ra)
851 return;
852 }
853 btc8821a2ant_SetSwPenTxRateAdapt(btcoexist,
854 coex_dm->cur_low_penalty_ra);
855
856 coex_dm->pre_low_penalty_ra = coex_dm->cur_low_penalty_ra;
857}
858
859static void halbtc8821a2ant_set_dac_swing_reg(struct btc_coexist *btcoexist,
860 u32 level)
861{
862 u8 val = (u8)level;
863
466414a0
JP		 864 btc_alg_dbg(ALGO_TRACE_SW_EXEC,
865 "[BTCoex], Write SwDacSwing = 0x%x\n", level);
c96fd200
LF		 866 btcoexist->btc_write_1byte_bitmask(btcoexist, 0xc5b, 0x3e, val);
867}
868
869static void btc8821a2ant_set_sw_full_dac_swing(struct btc_coexist *btcoexist,
870 bool sw_dac_swing_on,
871 u32 sw_dac_swing_lvl)
872{
873 if (sw_dac_swing_on)
874 halbtc8821a2ant_set_dac_swing_reg(btcoexist, sw_dac_swing_lvl);
875 else
876 halbtc8821a2ant_set_dac_swing_reg(btcoexist, 0x18);
877}
878
879static void halbtc8821a2ant_dac_swing(struct btc_coexist *btcoexist,
880 bool force_exec, bool dac_swing_on,
881 u32 dac_swing_lvl)
882{
466414a0
JP		 883 btc_alg_dbg(ALGO_TRACE_SW,
884 "[BTCoex], %s turn DacSwing = %s, dac_swing_lvl = 0x%x\n",
885 (force_exec ? "force to" : ""),
886 ((dac_swing_on) ? "ON" : "OFF"),
887 dac_swing_lvl);
c96fd200
LF		 888 coex_dm->cur_dac_swing_on = dac_swing_on;
889 coex_dm->cur_dac_swing_lvl = dac_swing_lvl;
890
891 if (!force_exec) {
466414a0
JP		 892 btc_alg_dbg(ALGO_TRACE_SW_DETAIL,
893 "[BTCoex], pre_dac_swing_on = %d, pre_dac_swing_lvl = 0x%x, cur_dac_swing_on = %d, cur_dac_swing_lvl = 0x%x\n",
894 coex_dm->pre_dac_swing_on,
895 coex_dm->pre_dac_swing_lvl,
896 coex_dm->cur_dac_swing_on,
897 coex_dm->cur_dac_swing_lvl);
c96fd200
LF		 898
899 if ((coex_dm->pre_dac_swing_on == coex_dm->cur_dac_swing_on) &&
900 (coex_dm->pre_dac_swing_lvl ==
901 coex_dm->cur_dac_swing_lvl))
902 return;
903 }
904 mdelay(30);
905 btc8821a2ant_set_sw_full_dac_swing(btcoexist, dac_swing_on,
906 dac_swing_lvl);
907
908 coex_dm->pre_dac_swing_on = coex_dm->cur_dac_swing_on;
909 coex_dm->pre_dac_swing_lvl = coex_dm->cur_dac_swing_lvl;
910}
911
912static void halbtc8821a2ant_set_adc_back_off(struct btc_coexist *btcoexist,
913 bool adc_back_off)
914{
915 if (adc_back_off) {
466414a0
JP		 916 btc_alg_dbg(ALGO_TRACE_SW_EXEC,
917 "[BTCoex], BB BackOff Level On!\n");
c96fd200
LF		 918 btcoexist->btc_write_1byte_bitmask(btcoexist, 0x8db, 0x60, 0x3);
919 } else {
466414a0
JP		 920 btc_alg_dbg(ALGO_TRACE_SW_EXEC,
921 "[BTCoex], BB BackOff Level Off!\n");
c96fd200
LF		 922 btcoexist->btc_write_1byte_bitmask(btcoexist, 0x8db, 0x60, 0x1);
923 }
924}
925
926static void halbtc8821a2ant_adc_back_off(struct btc_coexist *btcoexist,
927 bool force_exec, bool adc_back_off)
928{
466414a0
JP		 929 btc_alg_dbg(ALGO_TRACE_SW,
930 "[BTCoex], %s turn AdcBackOff = %s\n",
931 (force_exec ? "force to" : ""),
932 ((adc_back_off) ? "ON" : "OFF"));
c96fd200
LF		 933 coex_dm->cur_adc_back_off = adc_back_off;
934
935 if (!force_exec) {
466414a0
JP		 936 btc_alg_dbg(ALGO_TRACE_SW_DETAIL,
937 "[BTCoex], pre_adc_back_off = %d, cur_adc_back_off = %d\n",
938 coex_dm->pre_adc_back_off,
939 coex_dm->cur_adc_back_off);
c96fd200
LF		 940
941 if (coex_dm->pre_adc_back_off == coex_dm->cur_adc_back_off)
942 return;
943 }
944 halbtc8821a2ant_set_adc_back_off(btcoexist, coex_dm->cur_adc_back_off);
945
946 coex_dm->pre_adc_back_off = coex_dm->cur_adc_back_off;
947}
948
949static void halbtc8821a2ant_set_coex_table(struct btc_coexist *btcoexist,
950 u32 val0x6c0, u32 val0x6c4,
951 u32 val0x6c8, u8 val0x6cc)
952{
466414a0
JP		 953 btc_alg_dbg(ALGO_TRACE_SW_EXEC,
954 "[BTCoex], set coex table, set 0x6c0 = 0x%x\n", val0x6c0);
c96fd200
LF		 955 btcoexist->btc_write_4byte(btcoexist, 0x6c0, val0x6c0);
956
466414a0
JP		 957 btc_alg_dbg(ALGO_TRACE_SW_EXEC,
958 "[BTCoex], set coex table, set 0x6c4 = 0x%x\n", val0x6c4);
c96fd200
LF		 959 btcoexist->btc_write_4byte(btcoexist, 0x6c4, val0x6c4);
960
466414a0
JP		 961 btc_alg_dbg(ALGO_TRACE_SW_EXEC,
962 "[BTCoex], set coex table, set 0x6c8 = 0x%x\n", val0x6c8);
c96fd200
LF		 963 btcoexist->btc_write_4byte(btcoexist, 0x6c8, val0x6c8);
964
466414a0
JP		 965 btc_alg_dbg(ALGO_TRACE_SW_EXEC,
966 "[BTCoex], set coex table, set 0x6cc = 0x%x\n", val0x6cc);
c96fd200
LF		 967 btcoexist->btc_write_1byte(btcoexist, 0x6cc, val0x6cc);
968}
969
970static void halbtc8821a2ant_coex_table(struct btc_coexist *btcoexist,
971 bool force_exec, u32 val0x6c0,
972 u32 val0x6c4, u32 val0x6c8, u8 val0x6cc)
973{
466414a0
JP		 974 btc_alg_dbg(ALGO_TRACE_SW,
975 "[BTCoex], %s write Coex Table 0x6c0 = 0x%x, 0x6c4 = 0x%x, 0x6c8 = 0x%x, 0x6cc = 0x%x\n",
976 (force_exec ? "force to" : ""),
977 val0x6c0, val0x6c4, val0x6c8, val0x6cc);
c96fd200
LF		 978 coex_dm->cur_val0x6c0 = val0x6c0;
979 coex_dm->cur_val0x6c4 = val0x6c4;
980 coex_dm->cur_val0x6c8 = val0x6c8;
981 coex_dm->cur_val0x6cc = val0x6cc;
982
983 if (!force_exec) {
466414a0
JP		 984 btc_alg_dbg(ALGO_TRACE_SW_DETAIL,
985 "[BTCoex], pre_val0x6c0 = 0x%x, pre_val0x6c4 = 0x%x, pre_val0x6c8 = 0x%x, pre_val0x6cc = 0x%x !!\n",
986 coex_dm->pre_val0x6c0,
987 coex_dm->pre_val0x6c4,
988 coex_dm->pre_val0x6c8,
989 coex_dm->pre_val0x6cc);
990 btc_alg_dbg(ALGO_TRACE_SW_DETAIL,
991 "[BTCoex], cur_val0x6c0 = 0x%x, cur_val0x6c4 = 0x%x, cur_val0x6c8 = 0x%x, cur_val0x6cc = 0x%x !!\n",
992 coex_dm->cur_val0x6c0,
993 coex_dm->cur_val0x6c4,
994 coex_dm->cur_val0x6c8,
995 coex_dm->cur_val0x6cc);
c96fd200
LF		 996
997 if ((coex_dm->pre_val0x6c0 == coex_dm->cur_val0x6c0) &&
998 (coex_dm->pre_val0x6c4 == coex_dm->cur_val0x6c4) &&
999 (coex_dm->pre_val0x6c8 == coex_dm->cur_val0x6c8) &&
1000 (coex_dm->pre_val0x6cc == coex_dm->cur_val0x6cc))
1001 return;
1002 }
1003 halbtc8821a2ant_set_coex_table(btcoexist, val0x6c0, val0x6c4, val0x6c8,
1004 val0x6cc);
1005
1006 coex_dm->pre_val0x6c0 = coex_dm->cur_val0x6c0;
1007 coex_dm->pre_val0x6c4 = coex_dm->cur_val0x6c4;
1008 coex_dm->pre_val0x6c8 = coex_dm->cur_val0x6c8;
1009 coex_dm->pre_val0x6cc = coex_dm->cur_val0x6cc;
1010}
1011
1012static void halbtc8821a2ant_set_fw_ignore_wlan_act(struct btc_coexist *btcoex,
1013 bool enable)
1014{
1015 u8 h2c_parameter[1] = {0};
1016
1017 if (enable)
1018 h2c_parameter[0] |= BIT0;/* function enable */
1019
466414a0
JP		 1020 btc_alg_dbg(ALGO_TRACE_FW_EXEC,
1021 "[BTCoex], set FW for BT Ignore Wlan_Act, FW write 0x63 = 0x%x\n",
1022 h2c_parameter[0]);
c96fd200
LF		 1023
1024 btcoex->btc_fill_h2c(btcoex, 0x63, 1, h2c_parameter);
1025}
1026
1027static void halbtc8821a2ant_ignore_wlan_act(struct btc_coexist *btcoexist,
1028 bool force_exec, bool enable)
1029{
466414a0
JP		 1030 btc_alg_dbg(ALGO_TRACE_FW,
1031 "[BTCoex], %s turn Ignore WlanAct %s\n",
1032 (force_exec ? "force to" : ""), (enable ? "ON" : "OFF"));
c96fd200
LF		 1033 coex_dm->cur_ignore_wlan_act = enable;
1034
1035 if (!force_exec) {
466414a0
JP		 1036 btc_alg_dbg(ALGO_TRACE_FW_DETAIL,
1037 "[BTCoex], pre_ignore_wlan_act = %d, cur_ignore_wlan_act = %d!!\n",
1038 coex_dm->pre_ignore_wlan_act,
1039 coex_dm->cur_ignore_wlan_act);
c96fd200
LF		 1040
1041 if (coex_dm->pre_ignore_wlan_act ==
1042 coex_dm->cur_ignore_wlan_act)
1043 return;
1044 }
1045 halbtc8821a2ant_set_fw_ignore_wlan_act(btcoexist, enable);
1046
1047 coex_dm->pre_ignore_wlan_act = coex_dm->cur_ignore_wlan_act;
1048}
1049
1050static void halbtc8821a2ant_set_fw_pstdma(struct btc_coexist *btcoexist,
1051 u8 byte1, u8 byte2, u8 byte3,
1052 u8 byte4, u8 byte5)
1053{
1054 u8 h2c_parameter[5];
1055
1056 h2c_parameter[0] = byte1;
1057 h2c_parameter[1] = byte2;
1058 h2c_parameter[2] = byte3;
1059 h2c_parameter[3] = byte4;
1060 h2c_parameter[4] = byte5;
1061
1062 coex_dm->ps_tdma_para[0] = byte1;
1063 coex_dm->ps_tdma_para[1] = byte2;
1064 coex_dm->ps_tdma_para[2] = byte3;
1065 coex_dm->ps_tdma_para[3] = byte4;
1066 coex_dm->ps_tdma_para[4] = byte5;
1067
466414a0
JP		 1068 btc_alg_dbg(ALGO_TRACE_FW_EXEC,
1069 "[BTCoex], FW write 0x60(5bytes) = 0x%x%08x\n",
1070 h2c_parameter[0],
1071 h2c_parameter[1] << 24 |
1072 h2c_parameter[2] << 16 |
1073 h2c_parameter[3] << 8 |
1074 h2c_parameter[4]);
c96fd200
LF		 1075
1076 btcoexist->btc_fill_h2c(btcoexist, 0x60, 5, h2c_parameter);
1077}
1078
1079static void btc8821a2ant_sw_mech1(struct btc_coexist *btcoexist,
1080 bool shrink_rx_lpf,
1081 bool low_penalty_ra, bool limited_dig,
1082 bool bt_lna_constrain)
1083{
1084 u32 wifi_bw;
1085
1086 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
1087
1088 if (BTC_WIFI_BW_HT40 != wifi_bw) {
1089 /*only shrink RF Rx LPF for HT40*/
1090 if (shrink_rx_lpf)
1091 shrink_rx_lpf = false;
1092 }
1093
1094 halbtc8821a2ant_RfShrink(btcoexist, NORMAL_EXEC, shrink_rx_lpf);
1095 halbtc8821a2ant_low_penalty_ra(btcoexist,
1096 NORMAL_EXEC, low_penalty_ra);
1097
1098 /* no limited DIG
1099 * btc8821a2_set_bt_lna_const(btcoexist,
1100 NORMAL_EXEC, bBTLNAConstrain);
1101 */
1102}
1103
1104static void btc8821a2ant_sw_mech2(struct btc_coexist *btcoexist,
1105 bool agc_table_shift,
1106 bool adc_back_off, bool sw_dac_swing,
1107 u32 dac_swing_lvl)
1108{
1109 /* halbtc8821a2ant_AgcTable(btcoexist, NORMAL_EXEC, bAGCTableShift); */
1110 halbtc8821a2ant_adc_back_off(btcoexist, NORMAL_EXEC, adc_back_off);
1111 halbtc8821a2ant_dac_swing(btcoexist, NORMAL_EXEC, sw_dac_swing,
1112 sw_dac_swing);
1113}
1114
1115static void halbtc8821a2ant_set_ant_path(struct btc_coexist *btcoexist,
1116 u8 ant_pos_type, bool init_hw_cfg,
1117 bool wifi_off)
1118{
1119 struct btc_board_info *board_info = &btcoexist->board_info;
1120 u32 u4tmp = 0;
1121 u8 h2c_parameter[2] = {0};
1122
1123 if (init_hw_cfg) {
1124 /* 0x4c[23] = 0, 0x4c[24] = 1 Antenna control by WL/BT */
1125 u4tmp = btcoexist->btc_read_4byte(btcoexist, 0x4c);
1126 u4tmp &= ~BIT23;
1127 u4tmp |= BIT24;
1128 btcoexist->btc_write_4byte(btcoexist, 0x4c, u4tmp);
1129
1130 btcoexist->btc_write_4byte(btcoexist, 0x974, 0x3ff);
1131 btcoexist->btc_write_1byte(btcoexist, 0xcb4, 0x77);
1132
1133 if (board_info->btdm_ant_pos == BTC_ANTENNA_AT_MAIN_PORT) {
1134 /* tell firmware "antenna inverse" ==>
1135 * WRONG firmware antenna control code.
1136 * ==>need fw to fix
1137 */
1138 h2c_parameter[0] = 1;
1139 h2c_parameter[1] = 1;
1140 btcoexist->btc_fill_h2c(btcoexist, 0x65, 2,
1141 h2c_parameter);
1142 } else {
1143 /* tell firmware "no antenna inverse"
1144 * ==> WRONG firmware antenna control code.
1145 * ==>need fw to fix
1146 */
1147 h2c_parameter[0] = 0;
1148 h2c_parameter[1] = 1;
1149 btcoexist->btc_fill_h2c(btcoexist, 0x65, 2,
1150 h2c_parameter);
1151 }
1152 }
1153
1154 /* ext switch setting */
1155 switch (ant_pos_type) {
1156 case BTC_ANT_WIFI_AT_MAIN:
1157 btcoexist->btc_write_1byte_bitmask(btcoexist, 0xcb7, 0x30, 0x1);
1158 break;
1159 case BTC_ANT_WIFI_AT_AUX:
1160 btcoexist->btc_write_1byte_bitmask(btcoexist, 0xcb7, 0x30, 0x2);
1161 break;
1162 }
1163}
1164
1165static void halbtc8821a2ant_ps_tdma(struct btc_coexist *btcoexist,
1166 bool force_exec, bool turn_on, u8 type)
1167{
466414a0
JP		 1168 btc_alg_dbg(ALGO_TRACE_FW,
1169 "[BTCoex], %s turn %s PS TDMA, type = %d\n",
1170 (force_exec ? "force to" : ""), (turn_on ? "ON" : "OFF"),
1171 type);
c96fd200
LF		 1172 coex_dm->cur_ps_tdma_on = turn_on;
1173 coex_dm->cur_ps_tdma = type;
1174
1175 if (!force_exec) {
466414a0
JP		 1176 btc_alg_dbg(ALGO_TRACE_FW_DETAIL,
1177 "[BTCoex], pre_ps_tdma_on = %d, cur_ps_tdma_on = %d!!\n",
1178 coex_dm->pre_ps_tdma_on, coex_dm->cur_ps_tdma_on);
1179 btc_alg_dbg(ALGO_TRACE_FW_DETAIL,
1180 "[BTCoex], pre_ps_tdma = %d, cur_ps_tdma = %d!!\n",
1181 coex_dm->pre_ps_tdma, coex_dm->cur_ps_tdma);
c96fd200
LF		 1182
1183 if ((coex_dm->pre_ps_tdma_on == coex_dm->cur_ps_tdma_on) &&
1184 (coex_dm->pre_ps_tdma == coex_dm->cur_ps_tdma))
1185 return;
1186 }
1187 if (turn_on) {
1188 switch (type) {
1189 case 1:
1190 default:
1191 halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, 0x1a,
1192 0x1a, 0xe1, 0x90);
1193 break;
1194 case 2:
1195 halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, 0x12,
1196 0x12, 0xe1, 0x90);
1197 break;
1198 case 3:
1199 halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, 0x1c,
1200 0x3, 0xf1, 0x90);
1201 break;
1202 case 4:
1203 halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, 0x10,
1204 0x03, 0xf1, 0x90);
1205 break;
1206 case 5:
1207 halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, 0x1a,
1208 0x1a, 0x60, 0x90);
1209 break;
1210 case 6:
1211 halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, 0x12,
1212 0x12, 0x60, 0x90);
1213 break;
1214 case 7:
1215 halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, 0x1c,
1216 0x3, 0x70, 0x90);
1217 break;
1218 case 8:
1219 halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xa3, 0x10,
1220 0x3, 0x70, 0x90);
1221 break;
1222 case 9:
1223 halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, 0x1a,
1224 0x1a, 0xe1, 0x90);
1225 break;
1226 case 10:
1227 halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, 0x12,
1228 0x12, 0xe1, 0x90);
1229 break;
1230 case 11:
1231 halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, 0xa,
1232 0xa, 0xe1, 0x90);
1233 break;
1234 case 12:
1235 halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, 0x5,
1236 0x5, 0xe1, 0x90);
1237 break;
1238 case 13:
1239 halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, 0x1a,
1240 0x1a, 0x60, 0x90);
1241 break;
1242 case 14:
1243 halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3,
1244 0x12, 0x12, 0x60, 0x90);
1245 break;
1246 case 15:
1247 halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, 0xa,
1248 0xa, 0x60, 0x90);
1249 break;
1250 case 16:
1251 halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, 0x5,
1252 0x5, 0x60, 0x90);
1253 break;
1254 case 17:
1255 halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xa3, 0x2f,
1256 0x2f, 0x60, 0x90);
1257 break;
1258 case 18:
1259 halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, 0x5,
1260 0x5, 0xe1, 0x90);
1261 break;
1262 case 19:
1263 halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, 0x25,
1264 0x25, 0xe1, 0x90);
1265 break;
1266 case 20:
1267 halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, 0x25,
1268 0x25, 0x60, 0x90);
1269 break;
1270 case 21:
1271 halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, 0x15,
1272 0x03, 0x70, 0x90);
1273 break;
1274 case 71:
1275 halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, 0x1a,
1276 0x1a, 0xe1, 0x90);
1277 break;
1278 }
1279 } else {
1280 /* disable PS tdma */
1281 switch (type) {
1282 case 0:
1283 halbtc8821a2ant_set_fw_pstdma(btcoexist, 0x0, 0x0, 0x0,
1284 0x40, 0x0);
1285 break;
1286 case 1:
1287 halbtc8821a2ant_set_fw_pstdma(btcoexist, 0x0, 0x0, 0x0,
1288 0x48, 0x0);
1289 break;
1290 default:
1291 halbtc8821a2ant_set_fw_pstdma(btcoexist, 0x0, 0x0, 0x0,
1292 0x40, 0x0);
1293 break;
1294 }
1295 }
1296
1297 /* update pre state */
1298 coex_dm->pre_ps_tdma_on = coex_dm->cur_ps_tdma_on;
1299 coex_dm->pre_ps_tdma = coex_dm->cur_ps_tdma;
1300}
1301
1302static void halbtc8821a2ant_coex_all_off(struct btc_coexist *btcoexist)
1303{
1304 /* fw all off */
1305 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
1306 halbtc8821a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
1307 halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false);
1308
1309 /* sw all off */
1310 btc8821a2ant_sw_mech1(btcoexist, false, false, false, false);
1311 btc8821a2ant_sw_mech2(btcoexist, false, false, false, 0x18);
1312
1313 /* hw all off */
1314 halbtc8821a2ant_coex_table(btcoexist, NORMAL_EXEC,
1315 0x55555555, 0x55555555, 0xffff, 0x3);
1316}
1317
1318static void halbtc8821a2ant_coex_under_5g(struct btc_coexist *btcoexist)
1319{
1320 halbtc8821a2ant_coex_all_off(btcoexist);
1321}
1322
1323static void halbtc8821a2ant_init_coex_dm(struct btc_coexist *btcoexist)
1324{
1325 /* force to reset coex mechanism */
1326 halbtc8821a2ant_coex_table(btcoexist, FORCE_EXEC, 0x55555555,
1327 0x55555555, 0xffff, 0x3);
1328
1329 halbtc8821a2ant_ps_tdma(btcoexist, FORCE_EXEC, false, 1);
1330 halbtc8821a2ant_fw_dac_swing_lvl(btcoexist, FORCE_EXEC, 6);
1331 halbtc8821a2ant_dec_bt_pwr(btcoexist, FORCE_EXEC, false);
1332
1333 btc8821a2ant_sw_mech1(btcoexist, false, false, false, false);
1334 btc8821a2ant_sw_mech2(btcoexist, false, false, false, 0x18);
1335}
1336
1337static void halbtc8821a2ant_bt_inquiry_page(struct btc_coexist *btcoexist)
1338{
1339 bool low_pwr_disable = true;
1340
1341 btcoexist->btc_set(btcoexist, BTC_SET_ACT_DISABLE_LOW_POWER,
1342 &low_pwr_disable);
1343
1344 halbtc8821a2ant_coex_table(btcoexist, NORMAL_EXEC, 0x55ff55ff,
1345 0x5afa5afa, 0xffff, 0x3);
1346 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 3);
1347}
1348
1349static bool halbtc8821a2ant_is_common_action(struct btc_coexist *btcoexist)
1350{
1351 bool common = false, wifi_connected = false, wifi_busy = false;
1352 bool low_pwr_disable = false;
1353
1354 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
1355 &wifi_connected);
1356 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
1357
1358 halbtc8821a2ant_coex_table(btcoexist, NORMAL_EXEC, 0x55ff55ff,
1359 0x5afa5afa, 0xffff, 0x3);
1360
1361 if (!wifi_connected &&
1362 BT_8821A_2ANT_BT_STATUS_IDLE == coex_dm->bt_status) {
1363 low_pwr_disable = false;
1364 btcoexist->btc_set(btcoexist, BTC_SET_ACT_DISABLE_LOW_POWER,
1365 &low_pwr_disable);
1366
466414a0
JP		 1367 btc_alg_dbg(ALGO_TRACE,
1368 "[BTCoex], Wifi IPS + BT IPS!!\n");
c96fd200
LF		 1369
1370 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
1371 halbtc8821a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
1372 halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false);
1373
1374 btc8821a2ant_sw_mech1(btcoexist, false, false, false, false);
1375 btc8821a2ant_sw_mech2(btcoexist, false, false, false, 0x18);
1376
1377 common = true;
1378 } else if (wifi_connected &&
1379 (BT_8821A_2ANT_BT_STATUS_IDLE == coex_dm->bt_status)) {
1380 low_pwr_disable = false;
1381 btcoexist->btc_set(btcoexist, BTC_SET_ACT_DISABLE_LOW_POWER,
1382 &low_pwr_disable);
1383
1384 if (wifi_busy) {
466414a0
JP		 1385 btc_alg_dbg(ALGO_TRACE,
1386 "[BTCoex], Wifi Busy + BT IPS!!\n");
c96fd200
LF		 1387 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1388 false, 1);
1389 } else {
466414a0
JP		 1390 btc_alg_dbg(ALGO_TRACE,
1391 "[BTCoex], Wifi LPS + BT IPS!!\n");
c96fd200
LF		 1392 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1393 false, 1);
1394 }
1395
1396 halbtc8821a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
1397 halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false);
1398
1399 btc8821a2ant_sw_mech1(btcoexist, false, false, false, false);
1400 btc8821a2ant_sw_mech2(btcoexist, false, false, false, 0x18);
1401
1402 common = true;
1403 } else if (!wifi_connected &&
1404 (BT_8821A_2ANT_BT_STATUS_CON_IDLE == coex_dm->bt_status)) {
1405 low_pwr_disable = true;
1406 btcoexist->btc_set(btcoexist, BTC_SET_ACT_DISABLE_LOW_POWER,
1407 &low_pwr_disable);
1408
466414a0
JP		 1409 btc_alg_dbg(ALGO_TRACE,
1410 "[BTCoex], Wifi IPS + BT LPS!!\n");
c96fd200
LF		 1411
1412 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
1413 halbtc8821a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
1414 halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false);
1415
1416 btc8821a2ant_sw_mech1(btcoexist, false, false, false, false);
1417 btc8821a2ant_sw_mech2(btcoexist, false, false, false, 0x18);
1418 common = true;
1419 } else if (wifi_connected &&
1420 (BT_8821A_2ANT_BT_STATUS_CON_IDLE == coex_dm->bt_status)) {
1421 low_pwr_disable = true;
1422 btcoexist->btc_set(btcoexist,
1423 BTC_SET_ACT_DISABLE_LOW_POWER, &low_pwr_disable);
1424
1425 if (wifi_busy) {
466414a0
JP		 1426 btc_alg_dbg(ALGO_TRACE,
1427 "[BTCoex], Wifi Busy + BT LPS!!\n");
c96fd200
LF		 1428 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1429 false, 1);
1430 } else {
466414a0
JP		 1431 btc_alg_dbg(ALGO_TRACE,
1432 "[BTCoex], Wifi LPS + BT LPS!!\n");
c96fd200
LF		 1433 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1434 false, 1);
1435 }
1436
1437 halbtc8821a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
1438 halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false);
1439
1440 btc8821a2ant_sw_mech1(btcoexist, true, true, true, true);
1441 btc8821a2ant_sw_mech2(btcoexist, false, false, false, 0x18);
1442
1443 common = true;
1444 } else if (!wifi_connected &&
1445 (BT_8821A_2ANT_BT_STATUS_NON_IDLE ==
1446 coex_dm->bt_status)) {
1447 low_pwr_disable = false;
1448 btcoexist->btc_set(btcoexist,
1449 BTC_SET_ACT_DISABLE_LOW_POWER, &low_pwr_disable);
1450
466414a0
JP		 1451 btc_alg_dbg(ALGO_TRACE,
1452 "[BTCoex], Wifi IPS + BT Busy!!\n");
c96fd200
LF		 1453
1454 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
1455 halbtc8821a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
1456 halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false);
1457
1458 btc8821a2ant_sw_mech1(btcoexist, false, false,
1459 false, false);
1460 btc8821a2ant_sw_mech2(btcoexist, false, false,
1461 false, 0x18);
1462
1463 common = true;
1464 } else {
1465 low_pwr_disable = true;
1466 btcoexist->btc_set(btcoexist,
1467 BTC_SET_ACT_DISABLE_LOW_POWER,
1468 &low_pwr_disable);
1469
1470 if (wifi_busy) {
466414a0
JP		 1471 btc_alg_dbg(ALGO_TRACE,
1472 "[BTCoex], Wifi Busy + BT Busy!!\n");
c96fd200
LF		 1473 common = false;
1474 } else {
466414a0
JP		 1475 btc_alg_dbg(ALGO_TRACE,
1476 "[BTCoex], Wifi LPS + BT Busy!!\n");
c96fd200
LF		 1477 halbtc8821a2ant_ps_tdma(btcoexist,
1478 NORMAL_EXEC, true, 21);
1479
1480 if (halbtc8821a2ant_need_to_dec_bt_pwr(btcoexist))
1481 halbtc8821a2ant_dec_bt_pwr(btcoexist,
1482 NORMAL_EXEC, true);
1483 else
1484 halbtc8821a2ant_dec_bt_pwr(btcoexist,
1485 NORMAL_EXEC, false);
1486
1487 common = true;
1488 }
1489 btc8821a2ant_sw_mech1(btcoexist, true, true, true, true);
1490 }
1491 return common;
1492}
1493
1494static void btc8821a2_int1(struct btc_coexist *btcoexist, bool tx_pause,
1495 int result)
1496{
1497 if (tx_pause) {
466414a0
JP		 1498 btc_alg_dbg(ALGO_TRACE_FW_DETAIL,
1499 "[BTCoex], TxPause = 1\n");
c96fd200
LF		 1500
1501 if (coex_dm->cur_ps_tdma == 71) {
1502 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1503 true, 5);
1504 coex_dm->tdma_adj_type = 5;
1505 } else if (coex_dm->cur_ps_tdma == 1) {
1506 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1507 true, 5);
1508 coex_dm->tdma_adj_type = 5;
1509 } else if (coex_dm->cur_ps_tdma == 2) {
1510 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1511 true, 6);
1512 coex_dm->tdma_adj_type = 6;
1513 } else if (coex_dm->cur_ps_tdma == 3) {
1514 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1515 true, 7);
1516 coex_dm->tdma_adj_type = 7;
1517 } else if (coex_dm->cur_ps_tdma == 4) {
1518 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1519 true, 8);
1520 coex_dm->tdma_adj_type = 8;
1521 }
1522 if (coex_dm->cur_ps_tdma == 9) {
1523 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1524 true, 13);
1525 coex_dm->tdma_adj_type = 13;
1526 } else if (coex_dm->cur_ps_tdma == 10) {
1527 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1528 true, 14);
1529 coex_dm->tdma_adj_type = 14;
1530 } else if (coex_dm->cur_ps_tdma == 11) {
1531 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1532 true, 15);
1533 coex_dm->tdma_adj_type = 15;
1534 } else if (coex_dm->cur_ps_tdma == 12) {
1535 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1536 true, 16);
1537 coex_dm->tdma_adj_type = 16;
1538 }
1539
1540 if (result == -1) {
1541 if (coex_dm->cur_ps_tdma == 5) {
1542 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1543 true, 6);
1544 coex_dm->tdma_adj_type = 6;
1545 } else if (coex_dm->cur_ps_tdma == 6) {
1546 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1547 true, 7);
1548 coex_dm->tdma_adj_type = 7;
1549 } else if (coex_dm->cur_ps_tdma == 7) {
1550 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1551 true, 8);
1552 coex_dm->tdma_adj_type = 8;
1553 } else if (coex_dm->cur_ps_tdma == 13) {
1554 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1555 true, 14);
1556 coex_dm->tdma_adj_type = 14;
1557 } else if (coex_dm->cur_ps_tdma == 14) {
1558 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1559 true, 15);
1560 coex_dm->tdma_adj_type = 15;
1561 } else if (coex_dm->cur_ps_tdma == 15) {
1562 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1563 true, 16);
1564 coex_dm->tdma_adj_type = 16;
1565 }
1566 } else if (result == 1) {
1567 if (coex_dm->cur_ps_tdma == 8) {
1568 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1569 true, 7);
1570 coex_dm->tdma_adj_type = 7;
1571 } else if (coex_dm->cur_ps_tdma == 7) {
1572 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1573 true, 6);
1574 coex_dm->tdma_adj_type = 6;
1575 } else if (coex_dm->cur_ps_tdma == 6) {
1576 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1577 true, 5);
1578 coex_dm->tdma_adj_type = 5;
1579 } else if (coex_dm->cur_ps_tdma == 16) {
1580 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1581 true, 15);
1582 coex_dm->tdma_adj_type = 15;
1583 } else if (coex_dm->cur_ps_tdma == 15) {
1584 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1585 true, 14);
1586 coex_dm->tdma_adj_type = 14;
1587 } else if (coex_dm->cur_ps_tdma == 14) {
1588 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1589 true, 13);
1590 coex_dm->tdma_adj_type = 13;
1591 }
1592 }
1593 } else {
466414a0
JP		 1594 btc_alg_dbg(ALGO_TRACE_FW_DETAIL,
1595 "[BTCoex], TxPause = 0\n");
c96fd200
LF		 1596 if (coex_dm->cur_ps_tdma == 5) {
1597 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1598 true, 71);
1599 coex_dm->tdma_adj_type = 71;
1600 } else if (coex_dm->cur_ps_tdma == 6) {
1601 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1602 true, 2);
1603 coex_dm->tdma_adj_type = 2;
1604 } else if (coex_dm->cur_ps_tdma == 7) {
1605 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1606 true, 3);
1607 coex_dm->tdma_adj_type = 3;
1608 } else if (coex_dm->cur_ps_tdma == 8) {
1609 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1610 true, 4);
1611 coex_dm->tdma_adj_type = 4;
1612 }
1613 if (coex_dm->cur_ps_tdma == 13) {
1614 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1615 true, 9);
1616 coex_dm->tdma_adj_type = 9;
1617 } else if (coex_dm->cur_ps_tdma == 14) {
1618 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1619 true, 10);
1620 coex_dm->tdma_adj_type = 10;
1621 } else if (coex_dm->cur_ps_tdma == 15) {
1622 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1623 true, 11);
1624 coex_dm->tdma_adj_type = 11;
1625 } else if (coex_dm->cur_ps_tdma == 16) {
1626 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1627 true, 12);
1628 coex_dm->tdma_adj_type = 12;
1629 }
1630
1631 if (result == -1) {
1632 if (coex_dm->cur_ps_tdma == 71) {
1633 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1634 true, 1);
1635 coex_dm->tdma_adj_type = 1;
1636 } else if (coex_dm->cur_ps_tdma == 1) {
1637 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1638 true, 2);
1639 coex_dm->tdma_adj_type = 2;
1640 } else if (coex_dm->cur_ps_tdma == 2) {
1641 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1642 true, 3);
1643 coex_dm->tdma_adj_type = 3;
1644 } else if (coex_dm->cur_ps_tdma == 3) {
1645 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1646 true, 4);
1647 coex_dm->tdma_adj_type = 4;
1648 } else if (coex_dm->cur_ps_tdma == 9) {
1649 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1650 true, 10);
1651 coex_dm->tdma_adj_type = 10;
1652 } else if (coex_dm->cur_ps_tdma == 10) {
1653 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1654 true, 11);
1655 coex_dm->tdma_adj_type = 11;
1656 } else if (coex_dm->cur_ps_tdma == 11) {
1657 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1658 true, 12);
1659 coex_dm->tdma_adj_type = 12;
1660 }
1661 } else if (result == 1) {
1662 if (coex_dm->cur_ps_tdma == 4) {
1663 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1664 true, 3);
1665 coex_dm->tdma_adj_type = 3;
1666 } else if (coex_dm->cur_ps_tdma == 3) {
1667 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1668 true, 2);
1669 coex_dm->tdma_adj_type = 2;
1670 } else if (coex_dm->cur_ps_tdma == 2) {
1671 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1672 true, 1);
1673 coex_dm->tdma_adj_type = 1;
1674 } else if (coex_dm->cur_ps_tdma == 1) {
1675 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1676 true, 71);
1677 coex_dm->tdma_adj_type = 71;
1678 } else if (coex_dm->cur_ps_tdma == 12) {
1679 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1680 true, 11);
1681 coex_dm->tdma_adj_type = 11;
1682 } else if (coex_dm->cur_ps_tdma == 11) {
1683 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1684 true, 10);
1685 coex_dm->tdma_adj_type = 10;
1686 } else if (coex_dm->cur_ps_tdma == 10) {
1687 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1688 true, 9);
1689 coex_dm->tdma_adj_type = 9;
1690 }
1691 }
1692 }
1693}
1694
1695static void btc8821a2_int2(struct btc_coexist *btcoexist, bool tx_pause,
1696 int result)
1697{
1698 if (tx_pause) {
466414a0
JP		 1699 btc_alg_dbg(ALGO_TRACE_FW_DETAIL,
1700 "[BTCoex], TxPause = 1\n");
c96fd200
LF		 1701 if (coex_dm->cur_ps_tdma == 1) {
1702 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1703 true, 6);
1704 coex_dm->tdma_adj_type = 6;
1705 } else if (coex_dm->cur_ps_tdma == 2) {
1706 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1707 true, 6);
1708 coex_dm->tdma_adj_type = 6;
1709 } else if (coex_dm->cur_ps_tdma == 3) {
1710 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1711 true, 7);
1712 coex_dm->tdma_adj_type = 7;
1713 } else if (coex_dm->cur_ps_tdma == 4) {
1714 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1715 true, 8);
1716 coex_dm->tdma_adj_type = 8;
1717 }
1718 if (coex_dm->cur_ps_tdma == 9) {
1719 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1720 true, 14);
1721 coex_dm->tdma_adj_type = 14;
1722 } else if (coex_dm->cur_ps_tdma == 10) {
1723 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1724 true, 14);
1725 coex_dm->tdma_adj_type = 14;
1726 } else if (coex_dm->cur_ps_tdma == 11) {
1727 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1728 true, 15);
1729 coex_dm->tdma_adj_type = 15;
1730 } else if (coex_dm->cur_ps_tdma == 12) {
1731 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1732 true, 16);
1733 coex_dm->tdma_adj_type = 16;
1734 }
1735 if (result == -1) {
1736 if (coex_dm->cur_ps_tdma == 5) {
1737 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1738 true, 6);
1739 coex_dm->tdma_adj_type = 6;
1740 } else if (coex_dm->cur_ps_tdma == 6) {
1741 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1742 true, 7);
1743 coex_dm->tdma_adj_type = 7;
1744 } else if (coex_dm->cur_ps_tdma == 7) {
1745 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1746 true, 8);
1747 coex_dm->tdma_adj_type = 8;
1748 } else if (coex_dm->cur_ps_tdma == 13) {
1749 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1750 true, 14);
1751 coex_dm->tdma_adj_type = 14;
1752 } else if (coex_dm->cur_ps_tdma == 14) {
1753 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1754 true, 15);
1755 coex_dm->tdma_adj_type = 15;
1756 } else if (coex_dm->cur_ps_tdma == 15) {
1757 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1758 true, 16);
1759 coex_dm->tdma_adj_type = 16;
1760 }
1761 } else if (result == 1) {
1762 if (coex_dm->cur_ps_tdma == 8) {
1763 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1764 true, 7);
1765 coex_dm->tdma_adj_type = 7;
1766 } else if (coex_dm->cur_ps_tdma == 7) {
1767 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1768 true, 6);
1769 coex_dm->tdma_adj_type = 6;
1770 } else if (coex_dm->cur_ps_tdma == 6) {
1771 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1772 true, 6);
1773 coex_dm->tdma_adj_type = 6;
1774 } else if (coex_dm->cur_ps_tdma == 16) {
1775 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1776 true, 15);
1777 coex_dm->tdma_adj_type = 15;
1778 } else if (coex_dm->cur_ps_tdma == 15) {
1779 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1780 true, 14);
1781 coex_dm->tdma_adj_type = 14;
1782 } else if (coex_dm->cur_ps_tdma == 14) {
1783 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1784 true, 14);
1785 coex_dm->tdma_adj_type = 14;
1786 }
1787 }
1788 } else {
466414a0
JP		 1789 btc_alg_dbg(ALGO_TRACE_FW_DETAIL,
1790 "[BTCoex], TxPause = 0\n");
c96fd200
LF		 1791 if (coex_dm->cur_ps_tdma == 5) {
1792 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1793 true, 2);
1794 coex_dm->tdma_adj_type = 2;
1795 } else if (coex_dm->cur_ps_tdma == 6) {
1796 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1797 true, 2);
1798 coex_dm->tdma_adj_type = 2;
1799 } else if (coex_dm->cur_ps_tdma == 7) {
1800 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1801 true, 3);
1802 coex_dm->tdma_adj_type = 3;
1803 } else if (coex_dm->cur_ps_tdma == 8) {
1804 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1805 true, 4);
1806 coex_dm->tdma_adj_type = 4;
1807 }
1808 if (coex_dm->cur_ps_tdma == 13) {
1809 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1810 true, 10);
1811 coex_dm->tdma_adj_type = 10;
1812 } else if (coex_dm->cur_ps_tdma == 14) {
1813 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1814 true, 10);
1815 coex_dm->tdma_adj_type = 10;
1816 } else if (coex_dm->cur_ps_tdma == 15) {
1817 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1818 true, 11);
1819 coex_dm->tdma_adj_type = 11;
1820 } else if (coex_dm->cur_ps_tdma == 16) {
1821 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1822 true, 12);
1823 coex_dm->tdma_adj_type = 12;
1824 }
1825 if (result == -1) {
1826 if (coex_dm->cur_ps_tdma == 1) {
1827 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1828 true, 2);
1829 coex_dm->tdma_adj_type = 2;
1830 } else if (coex_dm->cur_ps_tdma == 2) {
1831 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1832 true, 3);
1833 coex_dm->tdma_adj_type = 3;
1834 } else if (coex_dm->cur_ps_tdma == 3) {
1835 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1836 true, 4);
1837 coex_dm->tdma_adj_type = 4;
1838 } else if (coex_dm->cur_ps_tdma == 9) {
1839 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1840 true, 10);
1841 coex_dm->tdma_adj_type = 10;
1842 } else if (coex_dm->cur_ps_tdma == 10) {
1843 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1844 true, 11);
1845 coex_dm->tdma_adj_type = 11;
1846 } else if (coex_dm->cur_ps_tdma == 11) {
1847 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1848 true, 12);
1849 coex_dm->tdma_adj_type = 12;
1850 }
1851 } else if (result == 1) {
1852 if (coex_dm->cur_ps_tdma == 4) {
1853 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1854 true, 3);
1855 coex_dm->tdma_adj_type = 3;
1856 } else if (coex_dm->cur_ps_tdma == 3) {
1857 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1858 true, 2);
1859 coex_dm->tdma_adj_type = 2;
1860 } else if (coex_dm->cur_ps_tdma == 2) {
1861 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1862 true, 2);
1863 coex_dm->tdma_adj_type = 2;
1864 } else if (coex_dm->cur_ps_tdma == 12) {
1865 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1866 true, 11);
1867 coex_dm->tdma_adj_type = 11;
1868 } else if (coex_dm->cur_ps_tdma == 11) {
1869 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1870 true, 10);
1871 coex_dm->tdma_adj_type = 10;
1872 } else if (coex_dm->cur_ps_tdma == 10) {
1873 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1874 true, 10);
1875 coex_dm->tdma_adj_type = 10;
1876 }
1877 }
1878 }
1879}
1880
1881static void btc8821a2_int3(struct btc_coexist *btcoexist, bool tx_pause,
1882 int result)
1883{
1884 if (tx_pause) {
466414a0
JP		 1885 btc_alg_dbg(ALGO_TRACE_FW_DETAIL,
1886 "[BTCoex], TxPause = 1\n");
c96fd200
LF		 1887 if (coex_dm->cur_ps_tdma == 1) {
1888 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1889 true, 7);
1890 coex_dm->tdma_adj_type = 7;
1891 } else if (coex_dm->cur_ps_tdma == 2) {
1892 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1893 true, 7);
1894 coex_dm->tdma_adj_type = 7;
1895 } else if (coex_dm->cur_ps_tdma == 3) {
1896 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1897 true, 7);
1898 coex_dm->tdma_adj_type = 7;
1899 } else if (coex_dm->cur_ps_tdma == 4) {
1900 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1901 true, 8);
1902 coex_dm->tdma_adj_type = 8;
1903 }
1904 if (coex_dm->cur_ps_tdma == 9) {
1905 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1906 true, 15);
1907 coex_dm->tdma_adj_type = 15;
1908 } else if (coex_dm->cur_ps_tdma == 10) {
1909 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1910 true, 15);
1911 coex_dm->tdma_adj_type = 15;
1912 } else if (coex_dm->cur_ps_tdma == 11) {
1913 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1914 true, 15);
1915 coex_dm->tdma_adj_type = 15;
1916 } else if (coex_dm->cur_ps_tdma == 12) {
1917 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1918 true, 16);
1919 coex_dm->tdma_adj_type = 16;
1920 }
1921 if (result == -1) {
1922 if (coex_dm->cur_ps_tdma == 5) {
1923 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1924 true, 7);
1925 coex_dm->tdma_adj_type = 7;
1926 } else if (coex_dm->cur_ps_tdma == 6) {
1927 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1928 true, 7);
1929 coex_dm->tdma_adj_type = 7;
1930 } else if (coex_dm->cur_ps_tdma == 7) {
1931 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1932 true, 8);
1933 coex_dm->tdma_adj_type = 8;
1934 } else if (coex_dm->cur_ps_tdma == 13) {
1935 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1936 true, 15);
1937 coex_dm->tdma_adj_type = 15;
1938 } else if (coex_dm->cur_ps_tdma == 14) {
1939 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1940 true, 15);
1941 coex_dm->tdma_adj_type = 15;
1942 } else if (coex_dm->cur_ps_tdma == 15) {
1943 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1944 true, 16);
1945 coex_dm->tdma_adj_type = 16;
1946 }
1947 } else if (result == 1) {
1948 if (coex_dm->cur_ps_tdma == 8) {
1949 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1950 true, 7);
1951 coex_dm->tdma_adj_type = 7;
1952 } else if (coex_dm->cur_ps_tdma == 7) {
1953 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1954 true, 7);
1955 coex_dm->tdma_adj_type = 7;
1956 } else if (coex_dm->cur_ps_tdma == 6) {
1957 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1958 true, 7);
1959 coex_dm->tdma_adj_type = 7;
1960 } else if (coex_dm->cur_ps_tdma == 16) {
1961 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1962 true, 15);
1963 coex_dm->tdma_adj_type = 15;
1964 } else if (coex_dm->cur_ps_tdma == 15) {
1965 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1966 true, 15);
1967 coex_dm->tdma_adj_type = 15;
1968 } else if (coex_dm->cur_ps_tdma == 14) {
1969 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1970 true, 15);
1971 coex_dm->tdma_adj_type = 15;
1972 }
1973 }
1974 } else {
466414a0
JP		 1975 btc_alg_dbg(ALGO_TRACE_FW_DETAIL,
1976 "[BTCoex], TxPause = 0\n");
c96fd200
LF		 1977 if (coex_dm->cur_ps_tdma == 5) {
1978 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1979 true, 3);
1980 coex_dm->tdma_adj_type = 3;
1981 } else if (coex_dm->cur_ps_tdma == 6) {
1982 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1983 true, 3);
1984 coex_dm->tdma_adj_type = 3;
1985 } else if (coex_dm->cur_ps_tdma == 7) {
1986 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1987 true, 3);
1988 coex_dm->tdma_adj_type = 3;
1989 } else if (coex_dm->cur_ps_tdma == 8) {
1990 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1991 true, 4);
1992 coex_dm->tdma_adj_type = 4;
1993 }
1994 if (coex_dm->cur_ps_tdma == 13) {
1995 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1996 true, 11);
1997 coex_dm->tdma_adj_type = 11;
1998 } else if (coex_dm->cur_ps_tdma == 14) {
1999 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2000 true, 11);
2001 coex_dm->tdma_adj_type = 11;
2002 } else if (coex_dm->cur_ps_tdma == 15) {
2003 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2004 true, 11);
2005 coex_dm->tdma_adj_type = 11;
2006 } else if (coex_dm->cur_ps_tdma == 16) {
2007 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2008 true, 12);
2009 coex_dm->tdma_adj_type = 12;
2010 }
2011 if (result == -1) {
2012 if (coex_dm->cur_ps_tdma == 1) {
2013 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2014 true, 3);
2015 coex_dm->tdma_adj_type = 3;
2016 } else if (coex_dm->cur_ps_tdma == 2) {
2017 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2018 true, 3);
2019 coex_dm->tdma_adj_type = 3;
2020 } else if (coex_dm->cur_ps_tdma == 3) {
2021 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2022 true, 4);
2023 coex_dm->tdma_adj_type = 4;
2024 } else if (coex_dm->cur_ps_tdma == 9) {
2025 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2026 true, 11);
2027 coex_dm->tdma_adj_type = 11;
2028 } else if (coex_dm->cur_ps_tdma == 10) {
2029 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2030 true, 11);
2031 coex_dm->tdma_adj_type = 11;
2032 } else if (coex_dm->cur_ps_tdma == 11) {
2033 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2034 true, 12);
2035 coex_dm->tdma_adj_type = 12;
2036 }
2037 } else if (result == 1) {
2038 if (coex_dm->cur_ps_tdma == 4) {
2039 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2040 true, 3);
2041 coex_dm->tdma_adj_type = 3;
2042 } else if (coex_dm->cur_ps_tdma == 3) {
2043 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2044 true, 3);
2045 coex_dm->tdma_adj_type = 3;
2046 } else if (coex_dm->cur_ps_tdma == 2) {
2047 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2048 true, 3);
2049 coex_dm->tdma_adj_type = 3;
2050 } else if (coex_dm->cur_ps_tdma == 12) {
2051 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2052 true, 11);
2053 coex_dm->tdma_adj_type = 11;
2054 } else if (coex_dm->cur_ps_tdma == 11) {
2055 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2056 true, 11);
2057 coex_dm->tdma_adj_type = 11;
2058 } else if (coex_dm->cur_ps_tdma == 10) {
2059 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2060 true, 11);
2061 coex_dm->tdma_adj_type = 11;
2062 }
2063 }
2064 }
2065}
2066
2067static void btc8821a2ant_tdma_dur_adj(struct btc_coexist *btcoexist,
2068 bool sco_hid, bool tx_pause,
2069 u8 max_interval)
2070{
2071 static long up, dn, m, n, wait_count;
2072 /* 0: no change, +1: increase WiFi duration,
2073 * -1: decrease WiFi duration
2074 */
2075 int result;
2076 u8 retry_count = 0;
2077
466414a0
JP		 2078 btc_alg_dbg(ALGO_TRACE_FW,
2079 "[BTCoex], TdmaDurationAdjust()\n");
c96fd200
LF		 2080
2081 if (coex_dm->reset_tdma_adjust) {
2082 coex_dm->reset_tdma_adjust = false;
466414a0
JP		 2083 btc_alg_dbg(ALGO_TRACE_FW_DETAIL,
2084 "[BTCoex], first run TdmaDurationAdjust()!!\n");
c96fd200
LF		 2085 if (sco_hid) {
2086 if (tx_pause) {
2087 if (max_interval == 1) {
2088 halbtc8821a2ant_ps_tdma(btcoexist,
2089 NORMAL_EXEC,
2090 true, 13);
2091 coex_dm->tdma_adj_type = 13;
2092 } else if (max_interval == 2) {
2093 halbtc8821a2ant_ps_tdma(btcoexist,
2094 NORMAL_EXEC,
2095 true, 14);
2096 coex_dm->tdma_adj_type = 14;
2097 } else if (max_interval == 3) {
2098 halbtc8821a2ant_ps_tdma(btcoexist,
2099 NORMAL_EXEC,
2100 true, 15);
2101 coex_dm->tdma_adj_type = 15;
2102 } else {
2103 halbtc8821a2ant_ps_tdma(btcoexist,
2104 NORMAL_EXEC,
2105 true, 15);
2106 coex_dm->tdma_adj_type = 15;
2107 }
2108 } else {
2109 if (max_interval == 1) {
2110 halbtc8821a2ant_ps_tdma(btcoexist,
2111 NORMAL_EXEC,
2112 true, 9);
2113 coex_dm->tdma_adj_type = 9;
2114 } else if (max_interval == 2) {
2115 halbtc8821a2ant_ps_tdma(btcoexist,
2116 NORMAL_EXEC,
2117 true, 10);
2118 coex_dm->tdma_adj_type = 10;
2119 } else if (max_interval == 3) {
2120 halbtc8821a2ant_ps_tdma(btcoexist,
2121 NORMAL_EXEC,
2122 true, 11);
2123 coex_dm->tdma_adj_type = 11;
2124 } else {
2125 halbtc8821a2ant_ps_tdma(btcoexist,
2126 NORMAL_EXEC,
2127 true, 11);
2128 coex_dm->tdma_adj_type = 11;
2129 }
2130 }
2131 } else {
2132 if (tx_pause) {
2133 if (max_interval == 1) {
2134 halbtc8821a2ant_ps_tdma(btcoexist,
2135 NORMAL_EXEC,
2136 true, 5);
2137 coex_dm->tdma_adj_type = 5;
2138 } else if (max_interval == 2) {
2139 halbtc8821a2ant_ps_tdma(btcoexist,
2140 NORMAL_EXEC,
2141 true, 6);
2142 coex_dm->tdma_adj_type = 6;
2143 } else if (max_interval == 3) {
2144 halbtc8821a2ant_ps_tdma(btcoexist,
2145 NORMAL_EXEC,
2146 true, 7);
2147 coex_dm->tdma_adj_type = 7;
2148 } else {
2149 halbtc8821a2ant_ps_tdma(btcoexist,
2150 NORMAL_EXEC,
2151 true, 7);
2152 coex_dm->tdma_adj_type = 7;
2153 }
2154 } else {
2155 if (max_interval == 1) {
2156 halbtc8821a2ant_ps_tdma(btcoexist,
2157 NORMAL_EXEC,
2158 true, 1);
2159 coex_dm->tdma_adj_type = 1;
2160 } else if (max_interval == 2) {
2161 halbtc8821a2ant_ps_tdma(btcoexist,
2162 NORMAL_EXEC,
2163 true, 2);
2164 coex_dm->tdma_adj_type = 2;
2165 } else if (max_interval == 3) {
2166 halbtc8821a2ant_ps_tdma(btcoexist,
2167 NORMAL_EXEC,
2168 true, 3);
2169 coex_dm->tdma_adj_type = 3;
2170 } else {
2171 halbtc8821a2ant_ps_tdma(btcoexist,
2172 NORMAL_EXEC,
2173 true, 3);
2174 coex_dm->tdma_adj_type = 3;
2175 }
2176 }
2177 }
2178
2179 up = 0;
2180 dn = 0;
2181 m = 1;
2182 n = 3;
2183 result = 0;
2184 wait_count = 0;
2185 } else {
2186 /* accquire the BT TRx retry count from BT_Info byte2 */
2187 retry_count = coex_sta->bt_retry_cnt;
466414a0
JP		 2188 btc_alg_dbg(ALGO_TRACE_FW_DETAIL,
2189 "[BTCoex], retry_count = %d\n", retry_count);
2190 btc_alg_dbg(ALGO_TRACE_FW_DETAIL,
2191 "[BTCoex], up = %d, dn = %d, m = %d, n = %d, wait_count = %d\n",
2192 (int)up, (int)dn, (int)m, (int)n, (int)wait_count);
c96fd200
LF		 2193 result = 0;
2194 wait_count++;
2195
2196 if (retry_count == 0) {
2197 /* no retry in the last 2-second duration */
2198 up++;
2199 dn--;
2200
2201 if (dn <= 0)
2202 dn = 0;
2203
2204 if (up >= n) {
2205 /* if (retry count == 0) for 2*n seconds,
2206 * make WiFi duration wider
2207 */
2208 wait_count = 0;
2209 n = 3;
2210 up = 0;
2211 dn = 0;
2212 result = 1;
466414a0
JP		 2213 btc_alg_dbg(ALGO_TRACE_FW_DETAIL,
2214 "[BTCoex], Increase wifi duration!!\n");
c96fd200
LF		 2215 }
2216 } else if (retry_count <= 3) {
2217 /* <=3 retry in the last 2-second duration */
2218 up--;
2219 dn++;
2220
2221 if (up <= 0)
2222 up = 0;
2223
2224 if (dn == 2) {
2225 /* if retry count< 3 for 2*2 seconds,
2226 * shrink wifi duration
2227 */
2228 if (wait_count <= 2)
2229 m++; /* avoid bounce in two levels */
2230 else
2231 m = 1;
2232 /* m max value is 20, max time is 120 second,
2233 * recheck if adjust WiFi duration.
2234 */
2235 if (m >= 20)
2236 m = 20;
2237
2238 n = 3*m;
2239 up = 0;
2240 dn = 0;
2241 wait_count = 0;
2242 result = -1;
466414a0
JP		 2243 btc_alg_dbg(ALGO_TRACE_FW_DETAIL,
2244 "[BTCoex], Decrease wifi duration for retryCounter<3!!\n");
c96fd200
LF		 2245 }
2246 } else {
2247 /* retry count > 3, if retry count > 3 happens once,
2248 * shrink WiFi duration
2249 */
2250 if (wait_count == 1)
2251 m++; /* avoid bounce in two levels */
2252 else
2253 m = 1;
2254 /* m max value is 20, max time is 120 second,
2255 * recheck if adjust WiFi duration.
2256 */
2257 if (m >= 20)
2258 m = 20;
2259
2260 n = 3*m;
2261 up = 0;
2262 dn = 0;
2263 wait_count = 0;
2264 result = -1;
466414a0
JP		 2265 btc_alg_dbg(ALGO_TRACE_FW_DETAIL,
2266 "[BTCoex], Decrease wifi duration for retryCounter>3!!\n");
c96fd200
LF		 2267 }
2268
466414a0
JP		 2269 btc_alg_dbg(ALGO_TRACE_FW_DETAIL,
2270 "[BTCoex], max Interval = %d\n", max_interval);
c96fd200
LF		 2271 if (max_interval == 1)
2272 btc8821a2_int1(btcoexist, tx_pause, result);
2273 else if (max_interval == 2)
2274 btc8821a2_int2(btcoexist, tx_pause, result);
2275 else if (max_interval == 3)
2276 btc8821a2_int3(btcoexist, tx_pause, result);
2277 }
2278
2279 /* if current PsTdma not match with the recorded one
2280 * (when scan, dhcp...), then we have to adjust it back to
2281 * the previous recorded one.
2282 */
2283 if (coex_dm->cur_ps_tdma != coex_dm->tdma_adj_type) {
2284 bool scan = false, link = false, roam = false;
2285
466414a0
JP		 2286 btc_alg_dbg(ALGO_TRACE_FW_DETAIL,
2287 "[BTCoex], PsTdma type dismatch!!!, cur_ps_tdma = %d, recordPsTdma = %d\n",
2288 coex_dm->cur_ps_tdma, coex_dm->tdma_adj_type);
c96fd200
LF		 2289
2290 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan);
2291 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link);
2292 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam);
2293
2294 if (!scan && !link && !roam) {
2295 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
2296 coex_dm->tdma_adj_type);
2297 } else {
466414a0
JP		 2298 btc_alg_dbg(ALGO_TRACE_FW_DETAIL,
2299 "[BTCoex], roaming/link/scan is under progress, will adjust next time!!!\n");
c96fd200
LF		 2300 }
2301 }
2302
2303 halbtc8821a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0x6);
2304}
2305
2306/* SCO only or SCO+PAN(HS)*/
2307static void halbtc8821a2ant_action_sco(struct btc_coexist *btcoexist)
2308{
2309 u8 wifi_rssi_state, bt_rssi_state;
2310 u32 wifi_bw;
2311
2312 wifi_rssi_state = halbtc8821a2ant_wifi_rssi_state(btcoexist, 0, 2,
2313 15, 0);
2314 bt_rssi_state = halbtc8821a2ant_bt_rssi_state(2, 35, 0);
2315
2316 halbtc8821a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 4);
2317
2318 if (halbtc8821a2ant_need_to_dec_bt_pwr(btcoexist))
2319 halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, true);
2320 else
2321 halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false);
2322
2323 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
2324
2325 if (BTC_WIFI_BW_LEGACY == wifi_bw) {
2326 /* for SCO quality at 11b/g mode */
2327 halbtc8821a2ant_coex_table(btcoexist, NORMAL_EXEC,
2328 0x5a5a5a5a, 0x5a5a5a5a, 0xffff, 0x3);
2329 } else {
2330 /* for SCO quality & wifi performance balance at 11n mode */
2331 halbtc8821a2ant_coex_table(btcoexist, NORMAL_EXEC,
2332 0x5aea5aea, 0x5aea5aea, 0xffff, 0x3);
2333 }
2334
2335 if (BTC_WIFI_BW_HT40 == wifi_bw) {
2336 /* fw mechanism
2337 * halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 5);
2338 */
2339
2340 if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
2341 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2342 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2343 false, 0); /*for voice quality*/
2344 } else {
2345 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2346 false, 0); /*for voice quality*/
2347 }
2348
2349 /* sw mechanism */
2350 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2351 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2352 btc8821a2ant_sw_mech1(btcoexist, true, true,
2353 false, false);
2354 btc8821a2ant_sw_mech2(btcoexist, true, false,
2355 false, 0x18);
2356 } else {
2357 btc8821a2ant_sw_mech1(btcoexist, true, true,
2358 false, false);
2359 btc8821a2ant_sw_mech2(btcoexist, false, false,
2360 false, 0x18);
2361 }
2362 } else {
2363 /* fw mechanism
2364 * halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 5);
2365 */
2366 if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
2367 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2368 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2369 false, 0); /*for voice quality*/
2370 } else {
2371 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2372 false, 0); /*for voice quality*/
2373 }
2374
2375 /* sw mechanism */
2376 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2377 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2378 btc8821a2ant_sw_mech1(btcoexist, false, true,
2379 false, false);
2380 btc8821a2ant_sw_mech2(btcoexist, true, false,
2381 false, 0x18);
2382 } else {
2383 btc8821a2ant_sw_mech1(btcoexist, false, true,
2384 false, false);
2385 btc8821a2ant_sw_mech2(btcoexist, false, false,
2386 false, 0x18);
2387 }
2388 }
2389}
2390
2391static void halbtc8821a2ant_action_hid(struct btc_coexist *btcoexist)
2392{
2393 u8 wifi_rssi_state, bt_rssi_state;
2394 u32 wifi_bw;
2395
2396 wifi_rssi_state = halbtc8821a2ant_wifi_rssi_state(btcoexist,
2397 0, 2, 15, 0);
2398 bt_rssi_state = halbtc8821a2ant_bt_rssi_state(2, 35, 0);
2399
2400 halbtc8821a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
2401
2402 if (halbtc8821a2ant_need_to_dec_bt_pwr(btcoexist))
2403 halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, true);
2404 else
2405 halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false);
2406
2407 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
2408
2409 if (BTC_WIFI_BW_LEGACY == wifi_bw) {
2410 /* for HID at 11b/g mode */
2411 halbtc8821a2ant_coex_table(btcoexist, NORMAL_EXEC, 0x55ff55ff,
2412 0x5a5a5a5a, 0xffff, 0x3);
2413 } else {
2414 /* for HID quality & wifi performance balance at 11n mode */
2415 halbtc8821a2ant_coex_table(btcoexist, NORMAL_EXEC, 0x55ff55ff,
2416 0x5aea5aea, 0xffff, 0x3);
2417 }
2418
2419 if (BTC_WIFI_BW_HT40 == wifi_bw) {
2420 /* fw mechanism */
2421 if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
2422 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2423 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2424 true, 9);
2425 } else {
2426 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2427 true, 13);
2428 }
2429
2430 /* sw mechanism */
2431 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2432 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2433 btc8821a2ant_sw_mech1(btcoexist, true, true,
2434 false, false);
2435 btc8821a2ant_sw_mech2(btcoexist, true, false,
2436 false, 0x18);
2437 } else {
2438 btc8821a2ant_sw_mech1(btcoexist, true, true,
2439 false, false);
2440 btc8821a2ant_sw_mech2(btcoexist, false, false,
2441 false, 0x18);
2442 }
2443 } else {
2444 /* fw mechanism */
2445 if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
2446 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2447 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2448 true, 9);
2449 } else {
2450 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2451 true, 13);
2452 }
2453
2454 /* sw mechanism */
2455 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2456 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2457 btc8821a2ant_sw_mech1(btcoexist, false, true,
2458 false, false);
2459 btc8821a2ant_sw_mech2(btcoexist, true, false,
2460 false, 0x18);
2461 } else {
2462 btc8821a2ant_sw_mech1(btcoexist, false, true,
2463 false, false);
2464 btc8821a2ant_sw_mech2(btcoexist, false, false,
2465 false, 0x18);
2466 }
2467 }
2468}
2469
2470/* A2DP only / PAN(EDR) only/ A2DP+PAN(HS) */
2471static void halbtc8821a2ant_action_a2dp(struct btc_coexist *btcoexist)
2472{
2473 u8 wifi_rssi_state, bt_rssi_state;
2474 u32 wifi_bw;
2475
2476 wifi_rssi_state = halbtc8821a2ant_wifi_rssi_state(btcoexist, 0, 2,
2477 15, 0);
2478 bt_rssi_state = halbtc8821a2ant_bt_rssi_state(2, 35, 0);
2479
2480 /* fw dac swing is called in btc8821a2ant_tdma_dur_adj()
2481 * halbtc8821a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
2482 */
2483
2484 if (halbtc8821a2ant_need_to_dec_bt_pwr(btcoexist))
2485 halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, true);
2486 else
2487 halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false);
2488
2489 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
2490
2491 if (BTC_WIFI_BW_HT40 == wifi_bw) {
2492 /* fw mechanism */
2493 if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
2494 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2495 btc8821a2ant_tdma_dur_adj(btcoexist, false, false, 1);
2496 } else {
2497 btc8821a2ant_tdma_dur_adj(btcoexist, false, true, 1);
2498 }
2499
2500 /* sw mechanism */
2501 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2502 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2503 btc8821a2ant_sw_mech1(btcoexist, true, false,
2504 false, false);
2505 btc8821a2ant_sw_mech2(btcoexist, true, false,
2506 false, 0x18);
2507 } else {
2508 btc8821a2ant_sw_mech1(btcoexist, true, false,
2509 false, false);
2510 btc8821a2ant_sw_mech2(btcoexist, false, false,
2511 false, 0x18);
2512 }
2513 } else {
2514 /* fw mechanism */
2515 if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
2516 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2517 btc8821a2ant_tdma_dur_adj(btcoexist, false, false, 1);
2518 } else {
2519 btc8821a2ant_tdma_dur_adj(btcoexist, false, true, 1);
2520 }
2521
2522 /* sw mechanism */
2523 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2524 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2525 btc8821a2ant_sw_mech1(btcoexist, false, false,
2526 false, false);
2527 btc8821a2ant_sw_mech2(btcoexist, true, false,
2528 false, 0x18);
2529 } else {
2530 btc8821a2ant_sw_mech1(btcoexist, false, false,
2531 false, false);
2532 btc8821a2ant_sw_mech2(btcoexist, false, false,
2533 false, 0x18);
2534 }
2535 }
2536}
2537
2538static void halbtc8821a2ant_action_a2dp_pan_hs(struct btc_coexist *btcoexist)
2539{
2540 u8 wifi_rssi_state, bt_rssi_state, bt_info_ext;
2541 u32 wifi_bw;
2542
2543 bt_info_ext = coex_sta->bt_info_ext;
2544 wifi_rssi_state = halbtc8821a2ant_wifi_rssi_state(btcoexist, 0, 2,
2545 15, 0);
2546 bt_rssi_state = halbtc8821a2ant_bt_rssi_state(2, 35, 0);
2547
2548 /*fw dac swing is called in btc8821a2ant_tdma_dur_adj()
2549 *halbtc8821a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
2550 */
2551
2552 if (halbtc8821a2ant_need_to_dec_bt_pwr(btcoexist))
2553 halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, true);
2554 else
2555 halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false);
2556
2557 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
2558
2559 if (BTC_WIFI_BW_HT40 == wifi_bw) {
2560 /* fw mechanism */
2561 if (bt_info_ext&BIT0) {
2562 /*a2dp basic rate*/
2563 btc8821a2ant_tdma_dur_adj(btcoexist, false, true, 2);
2564 } else {
2565 /*a2dp edr rate*/
2566 btc8821a2ant_tdma_dur_adj(btcoexist, false, true, 1);
2567 }
2568
2569 /* sw mechanism */
2570 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2571 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2572 btc8821a2ant_sw_mech1(btcoexist, true, false,
2573 false, false);
2574 btc8821a2ant_sw_mech2(btcoexist, true, false,
2575 false, 0x18);
2576 } else {
2577 btc8821a2ant_sw_mech1(btcoexist, true, false,
2578 false, false);
2579 btc8821a2ant_sw_mech2(btcoexist, false, false,
2580 false, 0x18);
2581 }
2582 } else {
2583 /* fw mechanism */
2584 if (bt_info_ext&BIT0) {
2585 /* a2dp basic rate */
2586 btc8821a2ant_tdma_dur_adj(btcoexist, false, true, 2);
2587 } else {
2588 /* a2dp edr rate */
2589 btc8821a2ant_tdma_dur_adj(btcoexist, false, true, 1);
2590 }
2591
2592 /* sw mechanism */
2593 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2594 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2595 btc8821a2ant_sw_mech1(btcoexist, false, false,
2596 false, false);
2597 btc8821a2ant_sw_mech2(btcoexist, true, false,
2598 false, 0x18);
2599 } else {
2600 btc8821a2ant_sw_mech1(btcoexist, false, false,
2601 false, false);
2602 btc8821a2ant_sw_mech2(btcoexist, false, false,
2603 false, 0x18);
2604 }
2605 }
2606}
2607
2608static void halbtc8821a2ant_action_pan_edr(struct btc_coexist *btcoexist)
2609{
2610 u8 wifi_rssi_state, bt_rssi_state;
2611 u32 wifi_bw;
2612
2613 wifi_rssi_state = halbtc8821a2ant_wifi_rssi_state(btcoexist, 0, 2,
2614 15, 0);
2615 bt_rssi_state = halbtc8821a2ant_bt_rssi_state(2, 35, 0);
2616
2617 halbtc8821a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
2618
2619 if (halbtc8821a2ant_need_to_dec_bt_pwr(btcoexist))
2620 halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, true);
2621 else
2622 halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false);
2623
2624 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
2625
2626 if (BTC_WIFI_BW_LEGACY == wifi_bw) {
2627 /* for HID at 11b/g mode */
2628 halbtc8821a2ant_coex_table(btcoexist, NORMAL_EXEC, 0x55ff55ff,
2629 0x5aff5aff, 0xffff, 0x3);
2630 } else {
2631 /* for HID quality & wifi performance balance at 11n mode */
2632 halbtc8821a2ant_coex_table(btcoexist, NORMAL_EXEC, 0x55ff55ff,
2633 0x5aff5aff, 0xffff, 0x3);
2634 }
2635
2636 if (BTC_WIFI_BW_HT40 == wifi_bw) {
2637 /* fw mechanism */
2638 if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
2639 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2640 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2641 true, 1);
2642 } else {
2643 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2644 true, 5);
2645 }
2646
2647 /* sw mechanism */
2648 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2649 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2650 btc8821a2ant_sw_mech1(btcoexist, true, false,
2651 false, false);
2652 btc8821a2ant_sw_mech2(btcoexist, true, false,
2653 false, 0x18);
2654 } else {
2655 btc8821a2ant_sw_mech1(btcoexist, true, false,
2656 false, false);
2657 btc8821a2ant_sw_mech2(btcoexist, false, false,
2658 false, 0x18);
2659 }
2660 } else {
2661 /* fw mechanism */
2662 if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
2663 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2664 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2665 true, 1);
2666 } else {
2667 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2668 true, 5);
2669 }
2670
2671 /* sw mechanism */
2672 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2673 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2674 btc8821a2ant_sw_mech1(btcoexist, false, false,
2675 false, false);
2676 btc8821a2ant_sw_mech2(btcoexist, true, false,
2677 false, 0x18);
2678 } else {
2679 btc8821a2ant_sw_mech1(btcoexist, false, false,
2680 false, false);
2681 btc8821a2ant_sw_mech2(btcoexist, false, false,
2682 false, 0x18);
2683 }
2684 }
2685}
2686
2687/* PAN(HS) only */
2688static void halbtc8821a2ant_action_pan_hs(struct btc_coexist *btcoexist)
2689{
2690 u8 wifi_rssi_state, bt_rssi_state;
2691 u32 wifi_bw;
2692
2693 wifi_rssi_state = halbtc8821a2ant_wifi_rssi_state(btcoexist,
2694 0, 2, 15, 0);
2695 bt_rssi_state = halbtc8821a2ant_bt_rssi_state(2, 35, 0);
2696
2697 halbtc8821a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
2698
2699 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
2700
2701 if (BTC_WIFI_BW_HT40 == wifi_bw) {
2702 /* fw mechanism */
2703 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2704 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2705 halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC,
2706 true);
2707 } else {
2708 halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC,
2709 false);
2710 }
2711 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
2712
2713 /* sw mechanism */
2714 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2715 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2716 btc8821a2ant_sw_mech1(btcoexist, true, false,
2717 false, false);
2718 btc8821a2ant_sw_mech2(btcoexist, true, false,
2719 false, 0x18);
2720 } else {
2721 btc8821a2ant_sw_mech1(btcoexist, true, false,
2722 false, false);
2723 btc8821a2ant_sw_mech2(btcoexist, false, false,
2724 false, 0x18);
2725 }
2726 } else {
2727 /* fw mechanism */
2728 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2729 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2730 halbtc8821a2ant_dec_bt_pwr(btcoexist,
2731 NORMAL_EXEC, true);
2732 } else {
2733 halbtc8821a2ant_dec_bt_pwr(btcoexist,
2734 NORMAL_EXEC, false);
2735 }
2736
2737 if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
2738 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2739 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2740 false, 1);
2741 } else {
2742 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2743 false, 1);
2744 }
2745
2746 /* sw mechanism */
2747 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2748 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2749 btc8821a2ant_sw_mech1(btcoexist, false, false,
2750 false, false);
2751 btc8821a2ant_sw_mech2(btcoexist, true, false,
2752 false, 0x18);
2753 } else {
2754 btc8821a2ant_sw_mech1(btcoexist, false, false,
2755 false, false);
2756 btc8821a2ant_sw_mech2(btcoexist, false, false,
2757 false, 0x18);
2758 }
2759 }
2760}
2761
2762/* PAN(EDR)+A2DP */
2763static void halbtc8821a2ant_action_pan_edr_a2dp(struct btc_coexist *btcoexist)
2764{
2765 u8 wifi_rssi_state, bt_rssi_state, bt_info_ext;
2766 u32 wifi_bw;
2767
2768 bt_info_ext = coex_sta->bt_info_ext;
2769 wifi_rssi_state = halbtc8821a2ant_wifi_rssi_state(btcoexist, 0, 2,
2770 15, 0);
2771 bt_rssi_state = halbtc8821a2ant_bt_rssi_state(2, 35, 0);
2772
2773 halbtc8821a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
2774
2775 if (halbtc8821a2ant_need_to_dec_bt_pwr(btcoexist))
2776 halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, true);
2777 else
2778 halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false);
2779
2780 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
2781
2782 if (BTC_WIFI_BW_LEGACY == wifi_bw) {
2783 /* for HID at 11b/g mode */
2784 halbtc8821a2ant_coex_table(btcoexist, NORMAL_EXEC, 0x55ff55ff,
2785 0x5afa5afa, 0xffff, 0x3);
2786 } else {
2787 /* for HID quality & wifi performance balance at 11n mode */
2788 halbtc8821a2ant_coex_table(btcoexist, NORMAL_EXEC, 0x55ff55ff,
2789 0x5afa5afa, 0xffff, 0x3);
2790 }
2791
2792 if (BTC_WIFI_BW_HT40 == wifi_bw) {
2793 /* fw mechanism */
2794 if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
2795 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2796 if (bt_info_ext&BIT0) {
2797 /* a2dp basic rate */
2798 btc8821a2ant_tdma_dur_adj(btcoexist, false,
2799 false, 3);
2800 } else {
2801 /* a2dp edr rate */
2802 btc8821a2ant_tdma_dur_adj(btcoexist, false,
2803 false, 3);
2804 }
2805 } else {
2806 if (bt_info_ext&BIT0) {
2807 /* a2dp basic rate */
2808 btc8821a2ant_tdma_dur_adj(btcoexist, false,
2809 true, 3);
2810 } else {
2811 /* a2dp edr rate */
2812 btc8821a2ant_tdma_dur_adj(btcoexist, false,
2813 true, 3);
2814 }
2815 }
2816
2817 /* sw mechanism */
2818 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2819 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2820 btc8821a2ant_sw_mech1(btcoexist, true, false,
2821 false, false);
2822 btc8821a2ant_sw_mech2(btcoexist, true, false,
2823 false, 0x18);
2824 } else {
2825 btc8821a2ant_sw_mech1(btcoexist, true, false,
2826 false, false);
2827 btc8821a2ant_sw_mech2(btcoexist, false, false,
2828 false, 0x18);
2829 };
2830 } else {
2831 /* fw mechanism */
2832 if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
2833 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2834 if (bt_info_ext&BIT0) {
2835 /* a2dp basic rate */
2836 btc8821a2ant_tdma_dur_adj(btcoexist, false,
2837 false, 3);
2838 } else {
2839 /* a2dp edr rate */
2840 btc8821a2ant_tdma_dur_adj(btcoexist, false,
2841 false, 3);
2842 }
2843 } else {
2844 if (bt_info_ext&BIT0) {
2845 /* a2dp basic rate */
2846 btc8821a2ant_tdma_dur_adj(btcoexist, false,
2847 true, 3);
2848 } else {
2849 /* a2dp edr rate */
2850 btc8821a2ant_tdma_dur_adj(btcoexist, false,
2851 true, 3);
2852 }
2853 }
2854
2855 /* sw mechanism */
2856 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2857 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2858 btc8821a2ant_sw_mech1(btcoexist, false, false,
2859 false, false);
2860 btc8821a2ant_sw_mech2(btcoexist, true, false,
2861 false, 0x18);
2862 } else {
2863 btc8821a2ant_sw_mech1(btcoexist, false, false,
2864 false, false);
2865 btc8821a2ant_sw_mech2(btcoexist, false, false,
2866 false, 0x18);
2867 }
2868 }
2869}
2870
2871static void halbtc8821a2ant_action_pan_edr_hid(struct btc_coexist *btcoexist)
2872{
2873 u8 wifi_rssi_state, bt_rssi_state;
2874 u32 wifi_bw;
2875
2876 wifi_rssi_state = halbtc8821a2ant_wifi_rssi_state(btcoexist, 0, 2,
2877 15, 0);
2878 bt_rssi_state = halbtc8821a2ant_bt_rssi_state(2, 35, 0);
2879
2880 halbtc8821a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
2881
2882 if (halbtc8821a2ant_need_to_dec_bt_pwr(btcoexist))
2883 halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, true);
2884 else
2885 halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false);
2886
2887 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
2888
2889 if (BTC_WIFI_BW_LEGACY == wifi_bw) {
2890 /* for HID at 11b/g mode */
2891 halbtc8821a2ant_coex_table(btcoexist, NORMAL_EXEC, 0x55ff55ff,
2892 0x5a5f5a5f, 0xffff, 0x3);
2893 } else {
2894 /* for HID quality & wifi performance balance at 11n mode */
2895 halbtc8821a2ant_coex_table(btcoexist, NORMAL_EXEC, 0x55ff55ff,
2896 0x5a5f5a5f, 0xffff, 0x3);
2897 }
2898
2899 if (BTC_WIFI_BW_HT40 == wifi_bw) {
2900 halbtc8821a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 3);
2901 /* fw mechanism */
2902 if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
2903 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2904 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2905 true, 10);
2906 } else {
2907 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2908 true, 14);
2909 }
2910
2911 /* sw mechanism */
2912 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2913 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2914 btc8821a2ant_sw_mech1(btcoexist, true, true,
2915 false, false);
2916 btc8821a2ant_sw_mech2(btcoexist, true, false,
2917 false, 0x18);
2918 } else {
2919 btc8821a2ant_sw_mech1(btcoexist, true, true,
2920 false, false);
2921 btc8821a2ant_sw_mech2(btcoexist, false, false,
2922 false, 0x18);
2923 }
2924 } else {
2925 halbtc8821a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
2926 /* fw mechanism */
2927 if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
2928 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2929 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2930 true, 10);
2931 } else {
2932 halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2933 true, 14);
2934 }
2935
2936 /* sw mechanism */
2937 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2938 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2939 btc8821a2ant_sw_mech1(btcoexist, false, true,
2940 false, false);
2941 btc8821a2ant_sw_mech2(btcoexist, true, false,
2942 false, 0x18);
2943 } else {
2944 btc8821a2ant_sw_mech1(btcoexist, false, true,
2945 false, false);
2946 btc8821a2ant_sw_mech2(btcoexist, false, false,
2947 false, 0x18);
2948 }
2949 }
2950}
2951
2952/* HID+A2DP+PAN(EDR) */
2953static void btc8821a2ant_act_hid_a2dp_pan_edr(struct btc_coexist *btcoexist)
2954{
2955 u8 wifi_rssi_state, bt_rssi_state, bt_info_ext;
2956 u32 wifi_bw;
2957
2958 bt_info_ext = coex_sta->bt_info_ext;
2959 wifi_rssi_state = halbtc8821a2ant_wifi_rssi_state(btcoexist,
2960 0, 2, 15, 0);
2961 bt_rssi_state = halbtc8821a2ant_bt_rssi_state(2, 35, 0);
2962
2963 halbtc8821a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
2964
2965 if (halbtc8821a2ant_need_to_dec_bt_pwr(btcoexist))
2966 halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, true);
2967 else
2968 halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false);
2969
2970 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
2971
2972 if (BTC_WIFI_BW_LEGACY == wifi_bw) {
2973 /* for HID at 11b/g mode */
2974 halbtc8821a2ant_coex_table(btcoexist, NORMAL_EXEC, 0x55ff55ff,
2975 0x5a5a5a5a, 0xffff, 0x3);
2976 } else {
2977 /* for HID quality & wifi performance balance at 11n mode */
2978 halbtc8821a2ant_coex_table(btcoexist, NORMAL_EXEC, 0x55ff55ff,
2979 0x5a5a5a5a, 0xffff, 0x3);
2980 }
2981
2982 if (BTC_WIFI_BW_HT40 == wifi_bw) {
2983 /* fw mechanism */
2984 if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
2985 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2986 if (bt_info_ext&BIT0) {
2987 /* a2dp basic rate */
2988 btc8821a2ant_tdma_dur_adj(btcoexist, true,
2989 true, 3);
2990 } else {
2991 /* a2dp edr rate */
2992 btc8821a2ant_tdma_dur_adj(btcoexist, true,
2993 true, 3);
2994 }
2995 } else {
2996 if (bt_info_ext&BIT0) {
2997 /* a2dp basic rate */
2998 btc8821a2ant_tdma_dur_adj(btcoexist, true,
2999 true, 3);
3000 } else {
3001 /* a2dp edr rate */
3002 btc8821a2ant_tdma_dur_adj(btcoexist, true,
3003 true, 3);
3004 }
3005 }
3006
3007 /* sw mechanism */
3008 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
3009 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3010 btc8821a2ant_sw_mech1(btcoexist, true, true,
3011 false, false);
3012 btc8821a2ant_sw_mech2(btcoexist, true, false,
3013 false, 0x18);
3014 } else {
3015 btc8821a2ant_sw_mech1(btcoexist, true, true,
3016 false, false);
3017 btc8821a2ant_sw_mech2(btcoexist, false, false,
3018 false, 0x18);
3019 }
3020 } else {
3021 /* fw mechanism */
3022 if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
3023 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3024 if (bt_info_ext&BIT0) {
3025 /* a2dp basic rate */
3026 btc8821a2ant_tdma_dur_adj(btcoexist, true,
3027 false, 3);
3028 } else {
3029 /* a2dp edr rate */
3030 btc8821a2ant_tdma_dur_adj(btcoexist, true,
3031 false, 3);
3032 }
3033 } else {
3034 if (bt_info_ext&BIT0) {
3035 /* a2dp basic rate */
3036 btc8821a2ant_tdma_dur_adj(btcoexist, true,
3037 true, 3);
3038 } else {
3039 /* a2dp edr rate */
3040 btc8821a2ant_tdma_dur_adj(btcoexist, true,
3041 true, 3);
3042 }
3043 }
3044
3045 /* sw mechanism */
3046 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
3047 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3048 btc8821a2ant_sw_mech1(btcoexist, false, true,
3049 false, false);
3050 btc8821a2ant_sw_mech2(btcoexist, true, false,
3051 false, 0x18);
3052 } else {
3053 btc8821a2ant_sw_mech1(btcoexist, false, true,
3054 false, false);
3055 btc8821a2ant_sw_mech2(btcoexist, false, false,
3056 false, 0x18);
3057 }
3058 }
3059}
3060
3061static void halbtc8821a2ant_action_hid_a2dp(struct btc_coexist *btcoexist)
3062{
3063 u8 wifi_rssi_state, bt_rssi_state, bt_info_ext;
3064 u32 wifi_bw;
3065
3066 bt_info_ext = coex_sta->bt_info_ext;
3067 wifi_rssi_state = halbtc8821a2ant_wifi_rssi_state(btcoexist, 0, 2,
3068 15, 0);
3069 bt_rssi_state = halbtc8821a2ant_bt_rssi_state(2, 35, 0);
3070
3071 if (halbtc8821a2ant_need_to_dec_bt_pwr(btcoexist))
3072 halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, true);
3073 else
3074 halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false);
3075
3076 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
3077
3078 if (BTC_WIFI_BW_LEGACY == wifi_bw) {
3079 /* for HID at 11b/g mode */
3080 halbtc8821a2ant_coex_table(btcoexist, NORMAL_EXEC, 0x55ff55ff,
3081 0x5f5b5f5b, 0xffffff, 0x3);
3082 } else {
3083 /*for HID quality & wifi performance balance at 11n mode*/
3084 halbtc8821a2ant_coex_table(btcoexist, NORMAL_EXEC, 0x55ff55ff,
3085 0x5f5b5f5b, 0xffffff, 0x3);
3086 }
3087
3088 if (BTC_WIFI_BW_HT40 == wifi_bw) {
3089 /* fw mechanism */
3090 if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
3091 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3092 if (bt_info_ext&BIT0) {
3093 /* a2dp basic rate */
3094 btc8821a2ant_tdma_dur_adj(btcoexist,
3095 true, true, 2);
3096 } else {
3097 /* a2dp edr rate */
3098 btc8821a2ant_tdma_dur_adj(btcoexist,
3099 true, true, 2);
3100 }
3101 } else {
3102 if (bt_info_ext&BIT0) {
3103 /* a2dp basic rate */
3104 btc8821a2ant_tdma_dur_adj(btcoexist,
3105 true, true, 2);
3106 } else {
3107 /* a2dp edr rate */
3108 btc8821a2ant_tdma_dur_adj(btcoexist,
3109 true, true, 2);
3110 }
3111 }
3112
3113 /* sw mechanism */
3114 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
3115 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3116 btc8821a2ant_sw_mech1(btcoexist, true, true,
3117 false, false);
3118 btc8821a2ant_sw_mech2(btcoexist, true, false,
3119 false, 0x18);
3120 } else {
3121 btc8821a2ant_sw_mech1(btcoexist, true, true,
3122 false, false);
3123 btc8821a2ant_sw_mech2(btcoexist, false, false,
3124 false, 0x18);
3125 }
3126 } else {
3127 /* fw mechanism */
3128 if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
3129 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3130 if (bt_info_ext&BIT0) {
3131 /* a2dp basic rate */
3132 btc8821a2ant_tdma_dur_adj(btcoexist,
3133 true, true, 2);
3134
3135 } else {
3136 /* a2dp edr rate */
3137 btc8821a2ant_tdma_dur_adj(btcoexist,
3138 true, true, 2);
3139 }
3140 } else {
3141 if (bt_info_ext&BIT0) {
3142 /*a2dp basic rate*/
3143 btc8821a2ant_tdma_dur_adj(btcoexist,
3144 true, true, 2);
3145 } else {
3146 /*a2dp edr rate*/
3147 btc8821a2ant_tdma_dur_adj(btcoexist,
3148 true, true, 2);
3149 }
3150 }
3151
3152 /* sw mechanism */
3153 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
3154 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3155 btc8821a2ant_sw_mech1(btcoexist, false, true,
3156 false, false);
3157 btc8821a2ant_sw_mech2(btcoexist, true, false,
3158 false, 0x18);
3159 } else {
3160 btc8821a2ant_sw_mech1(btcoexist, false, true,
3161 false, false);
3162 btc8821a2ant_sw_mech2(btcoexist, false, false,
3163 false, 0x18);
3164 }
3165 }
3166}
3167
3168static void halbtc8821a2ant_run_coexist_mechanism(struct btc_coexist *btcoexist)
3169{
3170 bool wifi_under_5g = false;
3171 u8 algorithm = 0;
3172
3173 if (btcoexist->manual_control) {
466414a0
JP		 3174 btc_alg_dbg(ALGO_TRACE,
3175 "[BTCoex], Manual control!!!\n");
c96fd200
LF		 3176 return;
3177 }
3178
3179 btcoexist->btc_get(btcoexist,
3180 BTC_GET_BL_WIFI_UNDER_5G, &wifi_under_5g);
3181
3182 if (wifi_under_5g) {
466414a0
JP		 3183 btc_alg_dbg(ALGO_TRACE,
3184 "[BTCoex], RunCoexistMechanism(), run 5G coex setting!!<===\n");
c96fd200
LF		 3185 halbtc8821a2ant_coex_under_5g(btcoexist);
3186 return;
3187 }
3188
3189 algorithm = halbtc8821a2ant_action_algorithm(btcoexist);
3190 if (coex_sta->c2h_bt_inquiry_page &&
3191 (BT_8821A_2ANT_COEX_ALGO_PANHS != algorithm)) {
466414a0
JP		 3192 btc_alg_dbg(ALGO_TRACE,
3193 "[BTCoex], BT is under inquiry/page scan !!\n");
c96fd200
LF		 3194 halbtc8821a2ant_bt_inquiry_page(btcoexist);
3195 return;
3196 }
3197
3198 coex_dm->cur_algorithm = algorithm;
466414a0
JP		 3199 btc_alg_dbg(ALGO_TRACE,
3200 "[BTCoex], Algorithm = %d\n", coex_dm->cur_algorithm);
c96fd200
LF		 3201
3202 if (halbtc8821a2ant_is_common_action(btcoexist)) {
466414a0
JP		 3203 btc_alg_dbg(ALGO_TRACE,
3204 "[BTCoex], Action 2-Ant common\n");
c96fd200
LF		 3205 coex_dm->reset_tdma_adjust = true;
3206 } else {
3207 if (coex_dm->cur_algorithm != coex_dm->pre_algorithm) {
466414a0
JP		 3208 btc_alg_dbg(ALGO_TRACE,
3209 "[BTCoex], pre_algorithm = %d, cur_algorithm = %d\n",
3210 coex_dm->pre_algorithm,
3211 coex_dm->cur_algorithm);
c96fd200
LF		 3212 coex_dm->reset_tdma_adjust = true;
3213 }
3214 switch (coex_dm->cur_algorithm) {
3215 case BT_8821A_2ANT_COEX_ALGO_SCO:
466414a0
JP		 3216 btc_alg_dbg(ALGO_TRACE,
3217 "[BTCoex], Action 2-Ant, algorithm = SCO\n");
c96fd200
LF		 3218 halbtc8821a2ant_action_sco(btcoexist);
3219 break;
3220 case BT_8821A_2ANT_COEX_ALGO_HID:
466414a0
JP		 3221 btc_alg_dbg(ALGO_TRACE,
3222 "[BTCoex], Action 2-Ant, algorithm = HID\n");
c96fd200
LF		 3223 halbtc8821a2ant_action_hid(btcoexist);
3224 break;
3225 case BT_8821A_2ANT_COEX_ALGO_A2DP:
466414a0
JP		 3226 btc_alg_dbg(ALGO_TRACE,
3227 "[BTCoex], Action 2-Ant, algorithm = A2DP\n");
c96fd200
LF		 3228 halbtc8821a2ant_action_a2dp(btcoexist);
3229 break;
3230 case BT_8821A_2ANT_COEX_ALGO_A2DP_PANHS:
466414a0
JP		 3231 btc_alg_dbg(ALGO_TRACE,
3232 "[BTCoex], Action 2-Ant, algorithm = A2DP+PAN(HS)\n");
c96fd200
LF		 3233 halbtc8821a2ant_action_a2dp_pan_hs(btcoexist);
3234 break;
3235 case BT_8821A_2ANT_COEX_ALGO_PANEDR:
466414a0
JP		 3236 btc_alg_dbg(ALGO_TRACE,
3237 "[BTCoex], Action 2-Ant, algorithm = PAN(EDR)\n");
c96fd200
LF		 3238 halbtc8821a2ant_action_pan_edr(btcoexist);
3239 break;
3240 case BT_8821A_2ANT_COEX_ALGO_PANHS:
466414a0
JP		 3241 btc_alg_dbg(ALGO_TRACE,
3242 "[BTCoex], Action 2-Ant, algorithm = HS mode\n");
c96fd200
LF		 3243 halbtc8821a2ant_action_pan_hs(btcoexist);
3244 break;
3245 case BT_8821A_2ANT_COEX_ALGO_PANEDR_A2DP:
466414a0
JP		 3246 btc_alg_dbg(ALGO_TRACE,
3247 "[BTCoex], Action 2-Ant, algorithm = PAN+A2DP\n");
c96fd200
LF		 3248 halbtc8821a2ant_action_pan_edr_a2dp(btcoexist);
3249 break;
3250 case BT_8821A_2ANT_COEX_ALGO_PANEDR_HID:
466414a0
JP		 3251 btc_alg_dbg(ALGO_TRACE,
3252 "[BTCoex], Action 2-Ant, algorithm = PAN(EDR)+HID\n");
c96fd200
LF		 3253 halbtc8821a2ant_action_pan_edr_hid(btcoexist);
3254 break;
3255 case BT_8821A_2ANT_COEX_ALGO_HID_A2DP_PANEDR:
466414a0
JP		 3256 btc_alg_dbg(ALGO_TRACE,
3257 "[BTCoex], Action 2-Ant, algorithm = HID+A2DP+PAN\n");
c96fd200
LF		 3258 btc8821a2ant_act_hid_a2dp_pan_edr(btcoexist);
3259 break;
3260 case BT_8821A_2ANT_COEX_ALGO_HID_A2DP:
466414a0
JP		 3261 btc_alg_dbg(ALGO_TRACE,
3262 "[BTCoex], Action 2-Ant, algorithm = HID+A2DP\n");
c96fd200
LF		 3263 halbtc8821a2ant_action_hid_a2dp(btcoexist);
3264 break;
3265 default:
466414a0
JP		 3266 btc_alg_dbg(ALGO_TRACE,
3267 "[BTCoex], Action 2-Ant, algorithm = coexist All Off!!\n");
c96fd200
LF		 3268 halbtc8821a2ant_coex_all_off(btcoexist);
3269 break;
3270 }
3271 coex_dm->pre_algorithm = coex_dm->cur_algorithm;
3272 }
3273}
3274
3275/*============================================================
3276 *work around function start with wa_halbtc8821a2ant_
3277 *============================================================
3278 *============================================================
3279 * extern function start with EXhalbtc8821a2ant_
3280 *============================================================
3281 */
3282void ex_halbtc8821a2ant_init_hwconfig(struct btc_coexist *btcoexist)
3283{
3284 u8 u1tmp = 0;
3285
466414a0
JP		 3286 btc_iface_dbg(INTF_INIT,
3287 "[BTCoex], 2Ant Init HW Config!!\n");
c96fd200
LF		 3288
3289 /* backup rf 0x1e value */
3290 coex_dm->bt_rf0x1e_backup =
3291 btcoexist->btc_get_rf_reg(btcoexist, BTC_RF_A, 0x1e, 0xfffff);
3292
3293 /* 0x790[5:0] = 0x5 */
3294 u1tmp = btcoexist->btc_read_1byte(btcoexist, 0x790);
3295 u1tmp &= 0xc0;
3296 u1tmp |= 0x5;
3297 btcoexist->btc_write_1byte(btcoexist, 0x790, u1tmp);
3298
3299 /*Antenna config */
3300 halbtc8821a2ant_set_ant_path(btcoexist,
3301 BTC_ANT_WIFI_AT_MAIN, true, false);
3302
3303 /* PTA parameter */
3304 halbtc8821a2ant_coex_table(btcoexist,
3305 FORCE_EXEC, 0x55555555, 0x55555555,
3306 0xffff, 0x3);
3307
3308 /* Enable counter statistics */
3309 /*0x76e[3] = 1, WLAN_Act control by PTA*/
3310 btcoexist->btc_write_1byte(btcoexist, 0x76e, 0xc);
3311 btcoexist->btc_write_1byte(btcoexist, 0x778, 0x3);
3312 btcoexist->btc_write_1byte_bitmask(btcoexist, 0x40, 0x20, 0x1);
3313}
3314
3315void
3316ex_halbtc8821a2ant_init_coex_dm(
3317 struct btc_coexist *btcoexist
3318 )
3319{
466414a0
JP		 3320 btc_iface_dbg(INTF_INIT,
3321 "[BTCoex], Coex Mechanism Init!!\n");
c96fd200
LF		 3322
3323 halbtc8821a2ant_init_coex_dm(btcoexist);
3324}
3325
3326void
3327ex_halbtc8821a2ant_display_coex_info(
3328 struct btc_coexist *btcoexist
3329 )
3330{
3331 struct btc_board_info *board_info = &btcoexist->board_info;
3332 struct btc_stack_info *stack_info = &btcoexist->stack_info;
5eef40e5 3333 struct rtl_priv *rtlpriv = btcoexist->adapter;
c96fd200
LF		 3334 u8 u1tmp[4], i, bt_info_ext, ps_tdma_case = 0;
3335 u32 u4tmp[4];
3336 bool roam = false, scan = false, link = false, wifi_under_5g = false;
3337 bool bt_hs_on = false, wifi_busy = false;
3338 long wifi_rssi = 0, bt_hs_rssi = 0;
3339 u32 wifi_bw, wifi_traffic_dir;
3340 u8 wifi_dot_11_chnl, wifi_hs_chnl;
3341 u32 fw_ver = 0, bt_patch_ver = 0;
3342
5eef40e5 3343 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
c96fd200 3344 "\r\n ============[BT Coexist info]============");
c96fd200
LF		 3345
3346 if (!board_info->bt_exist) {
5eef40e5 3347 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n BT not exists !!!");
c96fd200
LF		 3348 return;
3349 }
3350
5eef40e5 3351 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
c96fd200
LF		 3352 "\r\n %-35s = %d/ %d ", "Ant PG number/ Ant mechanism:",
3353 board_info->pg_ant_num, board_info->btdm_ant_num);
c96fd200
LF		 3354
3355 if (btcoexist->manual_control) {
5eef40e5 3356 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
c96fd200 3357 "\r\n %-35s", "[Action Manual control]!!");
c96fd200
LF		 3358 }
3359
5eef40e5 3360 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
c96fd200
LF		 3361 "\r\n %-35s = %s / %d", "BT stack/ hci ext ver",
3362 ((stack_info->profile_notified) ? "Yes" : "No"),
3363 stack_info->hci_version);
c96fd200
LF		 3364
3365 btcoexist->btc_get(btcoexist, BTC_GET_U4_BT_PATCH_VER, &bt_patch_ver);
3366 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_FW_VER, &fw_ver);
5eef40e5 3367 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
c96fd200
LF		 3368 "\r\n %-35s = %d_%d/ 0x%x/ 0x%x(%d)",
3369 "CoexVer/ FwVer/ PatchVer",
3370 glcoex_ver_date_8821a_2ant, glcoex_ver_8821a_2ant,
3371 fw_ver, bt_patch_ver, bt_patch_ver);
c96fd200
LF		 3372
3373 btcoexist->btc_get(btcoexist,
3374 BTC_GET_BL_HS_OPERATION, &bt_hs_on);
3375 btcoexist->btc_get(btcoexist,
3376 BTC_GET_U1_WIFI_DOT11_CHNL, &wifi_dot_11_chnl);
3377 btcoexist->btc_get(btcoexist,
3378 BTC_GET_U1_WIFI_HS_CHNL, &wifi_hs_chnl);
5eef40e5 3379 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
c96fd200
LF		 3380 "\r\n %-35s = %d / %d(%d)",
3381 "Dot11 channel / HsMode(HsChnl)",
3382 wifi_dot_11_chnl, bt_hs_on, wifi_hs_chnl);
c96fd200 3383
5eef40e5 3384 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
68ec5810 3385 "\r\n %-35s = %3ph ",
c96fd200 3386 "H2C Wifi inform bt chnl Info",
68ec5810 3387 coex_dm->wifi_chnl_info);
c96fd200
LF		 3388
3389 btcoexist->btc_get(btcoexist, BTC_GET_S4_WIFI_RSSI, &wifi_rssi);
3390 btcoexist->btc_get(btcoexist, BTC_GET_S4_HS_RSSI, &bt_hs_rssi);
5eef40e5 3391 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
c96fd200
LF		 3392 "\r\n %-35s = %ld/ %ld", "Wifi rssi/ HS rssi",
3393 wifi_rssi, bt_hs_rssi);
c96fd200
LF		 3394
3395 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan);
3396 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link);
3397 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam);
5eef40e5 3398 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
c96fd200
LF		 3399 "\r\n %-35s = %d/ %d/ %d ", "Wifi link/ roam/ scan",
3400 link, roam, scan);
c96fd200
LF		 3401
3402 btcoexist->btc_get(btcoexist,
3403 BTC_GET_BL_WIFI_UNDER_5G, &wifi_under_5g);
3404 btcoexist->btc_get(btcoexist,
3405 BTC_GET_U4_WIFI_BW, &wifi_bw);
3406 btcoexist->btc_get(btcoexist,
3407 BTC_GET_BL_WIFI_BUSY, &wifi_busy);
3408 btcoexist->btc_get(btcoexist,
3409 BTC_GET_U4_WIFI_TRAFFIC_DIRECTION, &wifi_traffic_dir);
5eef40e5 3410 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
c96fd200
LF		 3411 "\r\n %-35s = %s / %s/ %s ", "Wifi status",
3412 (wifi_under_5g ? "5G" : "2.4G"),
3413 ((BTC_WIFI_BW_LEGACY == wifi_bw) ? "Legacy" :
3414 (((BTC_WIFI_BW_HT40 == wifi_bw) ? "HT40" : "HT20"))),
3415 ((!wifi_busy) ? "idle" :
3416 ((BTC_WIFI_TRAFFIC_TX == wifi_traffic_dir) ?
3417 "uplink" : "downlink")));
c96fd200 3418
5eef40e5 3419 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
c96fd200
LF		 3420 "\r\n %-35s = [%s/ %d/ %d] ", "BT [status/ rssi/ retryCnt]",
3421 ((coex_sta->c2h_bt_inquiry_page) ? ("inquiry/page scan") :
3422 ((BT_8821A_2ANT_BT_STATUS_IDLE == coex_dm->bt_status)
3423 ? "idle" : ((BT_8821A_2ANT_BT_STATUS_CON_IDLE ==
3424 coex_dm->bt_status) ? "connected-idle" : "busy"))),
3425 coex_sta->bt_rssi, coex_sta->bt_retry_cnt);
c96fd200
LF		 3426
3427 if (stack_info->profile_notified) {
5eef40e5 3428 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
c96fd200
LF		 3429 "\r\n %-35s = %d / %d / %d / %d", "SCO/HID/PAN/A2DP",
3430 stack_info->sco_exist, stack_info->hid_exist,
3431 stack_info->pan_exist, stack_info->a2dp_exist);
c96fd200
LF		 3432
3433 btcoexist->btc_disp_dbg_msg(btcoexist,
3434 BTC_DBG_DISP_BT_LINK_INFO);
3435 }
3436
3437 bt_info_ext = coex_sta->bt_info_ext;
5eef40e5 3438 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = %s",
c96fd200
LF		 3439 "BT Info A2DP rate",
3440 (bt_info_ext&BIT0) ? "Basic rate" : "EDR rate");
c96fd200
LF		 3441
3442 for (i = 0; i < BT_INFO_SRC_8821A_2ANT_MAX; i++) {
3443 if (coex_sta->bt_info_c2h_cnt[i]) {
5eef40e5 3444 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
68ec5810 3445 "\r\n %-35s = %7ph(%d)",
c96fd200 3446 glbt_info_src_8821a_2ant[i],
68ec5810 3447 coex_sta->bt_info_c2h[i],
c96fd200 3448 coex_sta->bt_info_c2h_cnt[i]);
c96fd200
LF		 3449 }
3450 }
3451
5eef40e5 3452 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = %s/%s",
c96fd200
LF		 3453 "PS state, IPS/LPS",
3454 ((coex_sta->under_ips ? "IPS ON" : "IPS OFF")),
3455 ((coex_sta->under_lps ? "LPS ON" : "LPS OFF")));
c96fd200
LF		 3456 btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_FW_PWR_MODE_CMD);
3457
3458 /* Sw mechanism*/
5eef40e5 3459 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s",
c96fd200 3460 "============[Sw mechanism]============");
5eef40e5 3461 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
c96fd200
LF		 3462 "\r\n %-35s = %d/ %d/ %d/ %d ",
3463 "SM1[ShRf/ LpRA/ LimDig/ btLna]",
3464 coex_dm->cur_rf_rx_lpf_shrink, coex_dm->cur_low_penalty_ra,
3465 coex_dm->limited_dig, coex_dm->cur_bt_lna_constrain);
5eef40e5 3466 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
c96fd200
LF		 3467 "\r\n %-35s = %d/ %d/ %d(0x%x) ",
3468 "SM2[AgcT/ AdcB/ SwDacSwing(lvl)]",
3469 coex_dm->cur_agc_table_en, coex_dm->cur_adc_back_off,
3470 coex_dm->cur_dac_swing_on, coex_dm->cur_dac_swing_lvl);
c96fd200
LF		 3471
3472 /* Fw mechanism*/
5eef40e5 3473 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s",
c96fd200 3474 "============[Fw mechanism]============");
c96fd200
LF		 3475
3476 if (!btcoexist->manual_control) {
3477 ps_tdma_case = coex_dm->cur_ps_tdma;
5eef40e5 3478 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
68ec5810 3479 "\r\n %-35s = %5ph case-%d",
c96fd200 3480 "PS TDMA",
68ec5810 3481 coex_dm->ps_tdma_para, ps_tdma_case);
c96fd200 3482
5eef40e5 3483 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
c96fd200
LF		 3484 "\r\n %-35s = %d/ %d ", "DecBtPwr/ IgnWlanAct",
3485 coex_dm->cur_dec_bt_pwr,
3486 coex_dm->cur_ignore_wlan_act);
c96fd200
LF		 3487 }
3488
3489 /* Hw setting*/
5eef40e5 3490 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
c96fd200 3491 "\r\n %-35s", "============[Hw setting]============");
c96fd200 3492
5eef40e5 3493 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
c96fd200
LF		 3494 "\r\n %-35s = 0x%x", "RF-A, 0x1e initVal",
3495 coex_dm->bt_rf0x1e_backup);
c96fd200
LF		 3496
3497 u1tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x778);
3498 u1tmp[1] = btcoexist->btc_read_1byte(btcoexist, 0x6cc);
5eef40e5 3499 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = 0x%x/ 0x%x ",
c96fd200
LF		 3500 "0x778 (W_Act)/ 0x6cc (CoTab Sel)",
3501 u1tmp[0], u1tmp[1]);
c96fd200
LF		 3502
3503 u1tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x8db);
3504 u1tmp[1] = btcoexist->btc_read_1byte(btcoexist, 0xc5b);
5eef40e5 3505 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = 0x%x/ 0x%x",
c96fd200
LF		 3506 "0x8db(ADC)/0xc5b[29:25](DAC)",
3507 ((u1tmp[0]&0x60)>>5), ((u1tmp[1]&0x3e)>>1));
c96fd200
LF		 3508
3509 u4tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0xcb4);
5eef40e5 3510 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = 0x%x/ 0x%x",
c96fd200
LF		 3511 "0xcb4[7:0](ctrl)/ 0xcb4[29:28](val)",
3512 u4tmp[0]&0xff, ((u4tmp[0]&0x30000000)>>28));
c96fd200
LF		 3513
3514 u1tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x40);
3515 u4tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x4c);
3516 u4tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0x974);
5eef40e5 3517 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x",
c96fd200
LF		 3518 "0x40/ 0x4c[24:23]/ 0x974",
3519 u1tmp[0], ((u4tmp[0]&0x01800000)>>23), u4tmp[1]);
c96fd200
LF		 3520
3521 u4tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x550);
3522 u1tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x522);
5eef40e5 3523 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = 0x%x/ 0x%x",
c96fd200
LF		 3524 "0x550(bcn ctrl)/0x522",
3525 u4tmp[0], u1tmp[0]);
c96fd200
LF		 3526
3527 u4tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0xc50);
3528 u1tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0xa0a);
5eef40e5 3529 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = 0x%x/ 0x%x",
c96fd200
LF		 3530 "0xc50(DIG)/0xa0a(CCK-TH)",
3531 u4tmp[0], u1tmp[0]);
c96fd200
LF		 3532
3533 u4tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0xf48);
3534 u1tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0xa5b);
3535 u1tmp[1] = btcoexist->btc_read_1byte(btcoexist, 0xa5c);
5eef40e5 3536 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = 0x%x/ 0x%x",
c96fd200
LF		 3537 "OFDM-FA/ CCK-FA",
3538 u4tmp[0], (u1tmp[0]<<8) + u1tmp[1]);
c96fd200
LF		 3539
3540 u4tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x6c0);
3541 u4tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0x6c4);
3542 u4tmp[2] = btcoexist->btc_read_4byte(btcoexist, 0x6c8);
5eef40e5 3543 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x",
c96fd200
LF		 3544 "0x6c0/0x6c4/0x6c8",
3545 u4tmp[0], u4tmp[1], u4tmp[2]);
c96fd200 3546
5eef40e5 3547 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = %d/ %d",
c96fd200
LF		 3548 "0x770 (hi-pri Rx/Tx)",
3549 coex_sta->high_priority_rx, coex_sta->high_priority_tx);
5eef40e5 3550 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = %d/ %d",
c96fd200
LF		 3551 "0x774(low-pri Rx/Tx)",
3552 coex_sta->low_priority_rx, coex_sta->low_priority_tx);
c96fd200
LF		 3553
3554 /* Tx mgnt queue hang or not, 0x41b should = 0xf, ex: 0xd ==>hang*/
3555 u1tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x41b);
5eef40e5 3556 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = 0x%x",
c96fd200
LF		 3557 "0x41b (mgntQ hang chk == 0xf)",
3558 u1tmp[0]);
c96fd200
LF		 3559
3560 btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_COEX_STATISTICS);
3561}
3562
3563void ex_halbtc8821a2ant_ips_notify(struct btc_coexist *btcoexist, u8 type)
3564{
3565 if (BTC_IPS_ENTER == type) {
466414a0
JP		 3566 btc_iface_dbg(INTF_NOTIFY,
3567 "[BTCoex], IPS ENTER notify\n");
c96fd200
LF		 3568 coex_sta->under_ips = true;
3569 halbtc8821a2ant_coex_all_off(btcoexist);
3570 } else if (BTC_IPS_LEAVE == type) {
466414a0
JP		 3571 btc_iface_dbg(INTF_NOTIFY,
3572 "[BTCoex], IPS LEAVE notify\n");
c96fd200
LF		 3573 coex_sta->under_ips = false;
3574 /*halbtc8821a2ant_init_coex_dm(btcoexist);*/
3575 }
3576}
3577
3578void ex_halbtc8821a2ant_lps_notify(struct btc_coexist *btcoexist, u8 type)
3579{
3580 if (BTC_LPS_ENABLE == type) {
466414a0
JP		 3581 btc_iface_dbg(INTF_NOTIFY,
3582 "[BTCoex], LPS ENABLE notify\n");
c96fd200
LF		 3583 coex_sta->under_lps = true;
3584 } else if (BTC_LPS_DISABLE == type) {
466414a0
JP		 3585 btc_iface_dbg(INTF_NOTIFY,
3586 "[BTCoex], LPS DISABLE notify\n");
c96fd200
LF		 3587 coex_sta->under_lps = false;
3588 }
3589}
3590
3591void ex_halbtc8821a2ant_scan_notify(struct btc_coexist *btcoexist, u8 type)
3592{
3593 if (BTC_SCAN_START == type) {
466414a0
JP		 3594 btc_iface_dbg(INTF_NOTIFY,
3595 "[BTCoex], SCAN START notify\n");
c96fd200 3596 } else if (BTC_SCAN_FINISH == type) {
466414a0
JP		 3597 btc_iface_dbg(INTF_NOTIFY,
3598 "[BTCoex], SCAN FINISH notify\n");
c96fd200
LF		 3599 }
3600}
3601
3602void ex_halbtc8821a2ant_connect_notify(struct btc_coexist *btcoexist, u8 type)
3603{
3604 if (BTC_ASSOCIATE_START == type) {
466414a0
JP		 3605 btc_iface_dbg(INTF_NOTIFY,
3606 "[BTCoex], CONNECT START notify\n");
c96fd200 3607 } else if (BTC_ASSOCIATE_FINISH == type) {
466414a0
JP		 3608 btc_iface_dbg(INTF_NOTIFY,
3609 "[BTCoex], CONNECT FINISH notify\n");
c96fd200
LF		 3610 }
3611}
3612
3613void ex_halbtc8821a2ant_media_status_notify(struct btc_coexist *btcoexist,
3614 u8 type)
3615{
3616 u8 h2c_parameter[3] = {0};
3617 u32 wifi_bw;
3618 u8 wifi_central_chnl;
3619
3620 if (BTC_MEDIA_CONNECT == type) {
466414a0
JP		 3621 btc_iface_dbg(INTF_NOTIFY,
3622 "[BTCoex], MEDIA connect notify\n");
c96fd200 3623 } else {
466414a0
JP		 3624 btc_iface_dbg(INTF_NOTIFY,
3625 "[BTCoex], MEDIA disconnect notify\n");
c96fd200
LF		 3626 }
3627
3628 /* only 2.4G we need to inform bt the chnl mask*/
3629 btcoexist->btc_get(btcoexist, BTC_GET_U1_WIFI_CENTRAL_CHNL,
3630 &wifi_central_chnl);
3631 if ((BTC_MEDIA_CONNECT == type) &&
3632 (wifi_central_chnl <= 14)) {
3633 h2c_parameter[0] = 0x1;
3634 h2c_parameter[1] = wifi_central_chnl;
3635 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
3636 if (BTC_WIFI_BW_HT40 == wifi_bw)
3637 h2c_parameter[2] = 0x30;
3638 else
3639 h2c_parameter[2] = 0x20;
3640 }
3641
3642 coex_dm->wifi_chnl_info[0] = h2c_parameter[0];
3643 coex_dm->wifi_chnl_info[1] = h2c_parameter[1];
3644 coex_dm->wifi_chnl_info[2] = h2c_parameter[2];
3645
466414a0
JP		 3646 btc_alg_dbg(ALGO_TRACE_FW_EXEC,
3647 "[BTCoex], FW write 0x66 = 0x%x\n",
3648 h2c_parameter[0] << 16 |
3649 h2c_parameter[1] << 8 |
3650 h2c_parameter[2]);
c96fd200
LF		 3651
3652 btcoexist->btc_fill_h2c(btcoexist, 0x66, 3, h2c_parameter);
3653}
3654
3655void ex_halbtc8821a2ant_special_packet_notify(struct btc_coexist *btcoexist,
3656 u8 type) {
3657 if (type == BTC_PACKET_DHCP) {
466414a0
JP		 3658 btc_iface_dbg(INTF_NOTIFY,
3659 "[BTCoex], DHCP Packet notify\n");
c96fd200
LF		 3660 }
3661}
3662
3663void ex_halbtc8821a2ant_bt_info_notify(struct btc_coexist *btcoexist,
3664 u8 *tmp_buf, u8 length)
3665{
3666 u8 bt_info = 0;
3667 u8 i, rsp_source = 0;
3668 static u32 set_bt_lna_cnt, set_bt_psd_mode;
3669 bool bt_busy = false, limited_dig = false;
3670 bool wifi_connected = false, bt_hs_on = false;
3671
3672 coex_sta->c2h_bt_info_req_sent = false;
3673
3674 rsp_source = tmp_buf[0]&0xf;
3675 if (rsp_source >= BT_INFO_SRC_8821A_2ANT_MAX)
3676 rsp_source = BT_INFO_SRC_8821A_2ANT_WIFI_FW;
3677 coex_sta->bt_info_c2h_cnt[rsp_source]++;
3678
466414a0
JP		 3679 btc_iface_dbg(INTF_NOTIFY,
3680 "[BTCoex], Bt info[%d], length = %d, hex data = [",
3681 rsp_source, length);
c96fd200
LF		 3682 for (i = 0; i < length; i++) {
3683 coex_sta->bt_info_c2h[rsp_source][i] = tmp_buf[i];
3684 if (i == 1)
3685 bt_info = tmp_buf[i];
3686 if (i == length-1) {
466414a0
JP		 3687 btc_iface_dbg(INTF_NOTIFY,
3688 "0x%02x]\n", tmp_buf[i]);
c96fd200 3689 } else {
466414a0
JP		 3690 btc_iface_dbg(INTF_NOTIFY,
3691 "0x%02x, ", tmp_buf[i]);
c96fd200
LF		 3692 }
3693 }
3694
3695 if (BT_INFO_SRC_8821A_2ANT_WIFI_FW != rsp_source) {
3696 coex_sta->bt_retry_cnt = /* [3:0]*/
3697 coex_sta->bt_info_c2h[rsp_source][2]&0xf;
3698
3699 coex_sta->bt_rssi =
3700 coex_sta->bt_info_c2h[rsp_source][3]*2+10;
3701
3702 coex_sta->bt_info_ext =
3703 coex_sta->bt_info_c2h[rsp_source][4];
3704
3705 /* Here we need to resend some wifi info to BT*/
3706 /* because bt is reset and loss of the info.*/
3707 if ((coex_sta->bt_info_ext & BIT1)) {
3708 btcoexist->btc_get(btcoexist,
3709 BTC_GET_BL_WIFI_CONNECTED, &wifi_connected);
3710 if (wifi_connected) {
3711 ex_halbtc8821a2ant_media_status_notify(btcoexist,
3712 BTC_MEDIA_CONNECT);
3713 } else {
3714 ex_halbtc8821a2ant_media_status_notify(btcoexist,
3715 BTC_MEDIA_DISCONNECT);
3716 }
3717
3718 set_bt_psd_mode = 0;
3719 }
3720 if (set_bt_psd_mode <= 3) {
3721 halbtc8821a2ant_set_bt_psd_mode(btcoexist, FORCE_EXEC,
3722 0x0); /*fix CH-BW mode*/
3723 set_bt_psd_mode++;
3724 }
3725
3726 if (coex_dm->cur_bt_lna_constrain) {
3727 if (!(coex_sta->bt_info_ext & BIT2)) {
3728 if (set_bt_lna_cnt <= 3) {
3729 btc8821a2_set_bt_lna_const(btcoexist,
3730 FORCE_EXEC,
3731 true);
3732 set_bt_lna_cnt++;
3733 }
3734 }
3735 } else {
3736 set_bt_lna_cnt = 0;
3737 }
3738
3739 if ((coex_sta->bt_info_ext & BIT3)) {
3740 halbtc8821a2ant_ignore_wlan_act(btcoexist,
3741 FORCE_EXEC, false);
3742 } else {
3743 /* BT already NOT ignore Wlan active, do nothing here.*/
3744 }
3745
3746 if ((coex_sta->bt_info_ext & BIT4)) {
3747 /* BT auto report already enabled, do nothing*/
3748 } else {
3749 halbtc8821a2ant_bt_auto_report(btcoexist,
3750 FORCE_EXEC, true);
3751 }
3752 }
3753
3754 btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
3755 /* check BIT2 first ==> check if bt is under inquiry or page scan*/
3756 if (bt_info & BT_INFO_8821A_2ANT_B_INQ_PAGE) {
3757 coex_sta->c2h_bt_inquiry_page = true;
3758 coex_dm->bt_status = BT_8821A_2ANT_BT_STATUS_NON_IDLE;
3759 } else {
3760 coex_sta->c2h_bt_inquiry_page = false;
3761 if (bt_info == 0x1) {
3762 /* connection exists but not busy*/
3763 coex_sta->bt_link_exist = true;
3764 coex_dm->bt_status = BT_8821A_2ANT_BT_STATUS_CON_IDLE;
3765 } else if (bt_info & BT_INFO_8821A_2ANT_B_CONNECTION) {
3766 /* connection exists and some link is busy*/
3767 coex_sta->bt_link_exist = true;
3768 if (bt_info & BT_INFO_8821A_2ANT_B_FTP)
3769 coex_sta->pan_exist = true;
3770 else
3771 coex_sta->pan_exist = false;
3772 if (bt_info & BT_INFO_8821A_2ANT_B_A2DP)
3773 coex_sta->a2dp_exist = true;
3774 else
3775 coex_sta->a2dp_exist = false;
3776 if (bt_info & BT_INFO_8821A_2ANT_B_HID)
3777 coex_sta->hid_exist = true;
3778 else
3779 coex_sta->hid_exist = false;
3780 if (bt_info & BT_INFO_8821A_2ANT_B_SCO_ESCO)
3781 coex_sta->sco_exist = true;
3782 else
3783 coex_sta->sco_exist = false;
3784 coex_dm->bt_status = BT_8821A_2ANT_BT_STATUS_NON_IDLE;
3785 } else {
3786 coex_sta->bt_link_exist = false;
3787 coex_sta->pan_exist = false;
3788 coex_sta->a2dp_exist = false;
3789 coex_sta->hid_exist = false;
3790 coex_sta->sco_exist = false;
3791 coex_dm->bt_status = BT_8821A_2ANT_BT_STATUS_IDLE;
3792 }
3793
3794 if (bt_hs_on)
3795 coex_dm->bt_status = BT_8821A_2ANT_BT_STATUS_NON_IDLE;
3796 }
3797
3798 if (BT_8821A_2ANT_BT_STATUS_NON_IDLE == coex_dm->bt_status)
3799 bt_busy = true;
3800 else
3801 bt_busy = false;
3802 btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bt_busy);
3803
3804 if (BT_8821A_2ANT_BT_STATUS_IDLE != coex_dm->bt_status)
3805 limited_dig = true;
3806 else
3807 limited_dig = false;
3808 coex_dm->limited_dig = limited_dig;
3809 btcoexist->btc_set(btcoexist,
3810 BTC_SET_BL_BT_LIMITED_DIG, &limited_dig);
3811
3812 halbtc8821a2ant_run_coexist_mechanism(btcoexist);
3813}
3814
3815void ex_halbtc8821a2ant_halt_notify(struct btc_coexist *btcoexist)
3816{
466414a0
JP		 3817 btc_iface_dbg(INTF_NOTIFY,
3818 "[BTCoex], Halt notify\n");
c96fd200
LF		 3819
3820 halbtc8821a2ant_ignore_wlan_act(btcoexist, FORCE_EXEC, true);
3821 ex_halbtc8821a2ant_media_status_notify(btcoexist, BTC_MEDIA_DISCONNECT);
3822}
3823
3824void ex_halbtc8821a2ant_periodical(struct btc_coexist *btcoexist)
3825{
3826 static u8 dis_ver_info_cnt;
3827 u32 fw_ver = 0, bt_patch_ver = 0;
3828 struct btc_board_info *board_info = &btcoexist->board_info;
3829 struct btc_stack_info *stack_info = &btcoexist->stack_info;
3830
466414a0
JP		 3831 btc_alg_dbg(ALGO_TRACE,
3832 "[BTCoex], ==========================Periodical===========================\n");
c96fd200
LF		 3833
3834 if (dis_ver_info_cnt <= 5) {
3835 dis_ver_info_cnt += 1;
466414a0
JP		 3836 btc_iface_dbg(INTF_INIT,
3837 "[BTCoex], ****************************************************************\n");
3838 btc_iface_dbg(INTF_INIT,
3839 "[BTCoex], Ant PG Num/ Ant Mech/ Ant Pos = %d/ %d/ %d\n",
3840 board_info->pg_ant_num,
3841 board_info->btdm_ant_num,
3842 board_info->btdm_ant_pos);
3843 btc_iface_dbg(INTF_INIT,
3844 "[BTCoex], BT stack/ hci ext ver = %s / %d\n",
3845 stack_info->profile_notified ? "Yes" : "No",
3846 stack_info->hci_version);
c96fd200
LF		 3847 btcoexist->btc_get(btcoexist, BTC_GET_U4_BT_PATCH_VER,
3848 &bt_patch_ver);
3849 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_FW_VER, &fw_ver);
466414a0
JP		 3850 btc_iface_dbg(INTF_INIT,
3851 "[BTCoex], CoexVer/ FwVer/ PatchVer = %d_%x/ 0x%x/ 0x%x(%d)\n",
3852 glcoex_ver_date_8821a_2ant, glcoex_ver_8821a_2ant,
3853 fw_ver, bt_patch_ver, bt_patch_ver);
3854 btc_iface_dbg(INTF_INIT,
3855 "[BTCoex], ****************************************************************\n");
c96fd200
LF		 3856 }
3857
3858 halbtc8821a2ant_query_bt_info(btcoexist);
3859 halbtc8821a2ant_monitor_bt_ctr(btcoexist);
3860 btc8821a2ant_mon_bt_en_dis(btcoexist);
3861}
Linux kernel - Deliverables
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