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rt2x00: Disable auto wakeup before waking up device.
[deliverable/linux.git] / drivers / net / wireless / rt2x00 / rt2500usb.c
CommitLineData
95ea3627 1/*
9c9a0d14 2 Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
95ea3627
ID		 3 <http://rt2x00.serialmonkey.com>
4
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
9
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
14
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the
17 Free Software Foundation, Inc.,
18 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19 */
20
21/*
22 Module: rt2500usb
23 Abstract: rt2500usb device specific routines.
24 Supported chipsets: RT2570.
25 */
26
95ea3627
ID		 27#include <linux/delay.h>
28#include <linux/etherdevice.h>
29#include <linux/init.h>
30#include <linux/kernel.h>
31#include <linux/module.h>
32#include <linux/usb.h>
33
34#include "rt2x00.h"
35#include "rt2x00usb.h"
36#include "rt2500usb.h"
37
dddfb478
ID		 38/*
39 * Allow hardware encryption to be disabled.
40 */
f1dd2b23 41static int modparam_nohwcrypt = 0;
dddfb478
ID		 42module_param_named(nohwcrypt, modparam_nohwcrypt, bool, S_IRUGO);
43MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption.");
44
95ea3627
ID		 45/*
46 * Register access.
47 * All access to the CSR registers will go through the methods
48 * rt2500usb_register_read and rt2500usb_register_write.
49 * BBP and RF register require indirect register access,
50 * and use the CSR registers BBPCSR and RFCSR to achieve this.
51 * These indirect registers work with busy bits,
52 * and we will try maximal REGISTER_BUSY_COUNT times to access
53 * the register while taking a REGISTER_BUSY_DELAY us delay
54 * between each attampt. When the busy bit is still set at that time,
55 * the access attempt is considered to have failed,
56 * and we will print an error.
8ff48a8b 57 * If the csr_mutex is already held then the _lock variants must
3d82346c 58 * be used instead.
95ea3627 59 */
0e14f6d3 60static inline void rt2500usb_register_read(struct rt2x00_dev *rt2x00dev,
95ea3627
ID		 61 const unsigned int offset,
62 u16 *value)
63{
64 __le16 reg;
65 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
66 USB_VENDOR_REQUEST_IN, offset,
c9c3b1a5 67 &reg, sizeof(reg), REGISTER_TIMEOUT);
95ea3627
ID		 68 *value = le16_to_cpu(reg);
69}
70
3d82346c
AB		 71static inline void rt2500usb_register_read_lock(struct rt2x00_dev *rt2x00dev,
72 const unsigned int offset,
73 u16 *value)
74{
75 __le16 reg;
76 rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_READ,
77 USB_VENDOR_REQUEST_IN, offset,
c9c3b1a5 78 &reg, sizeof(reg), REGISTER_TIMEOUT);
3d82346c
AB		 79 *value = le16_to_cpu(reg);
80}
81
0e14f6d3 82static inline void rt2500usb_register_multiread(struct rt2x00_dev *rt2x00dev,
95ea3627
ID		 83 const unsigned int offset,
84 void *value, const u16 length)
85{
95ea3627
ID		 86 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
87 USB_VENDOR_REQUEST_IN, offset,
bd394a74
ID		 88 value, length,
89 REGISTER_TIMEOUT16(length));
95ea3627
ID		 90}
91
0e14f6d3 92static inline void rt2500usb_register_write(struct rt2x00_dev *rt2x00dev,
95ea3627
ID		 93 const unsigned int offset,
94 u16 value)
95{
96 __le16 reg = cpu_to_le16(value);
97 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
98 USB_VENDOR_REQUEST_OUT, offset,
c9c3b1a5 99 &reg, sizeof(reg), REGISTER_TIMEOUT);
95ea3627
ID		 100}
101
3d82346c
AB		 102static inline void rt2500usb_register_write_lock(struct rt2x00_dev *rt2x00dev,
103 const unsigned int offset,
104 u16 value)
105{
106 __le16 reg = cpu_to_le16(value);
107 rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_WRITE,
108 USB_VENDOR_REQUEST_OUT, offset,
c9c3b1a5 109 &reg, sizeof(reg), REGISTER_TIMEOUT);
3d82346c
AB		 110}
111
0e14f6d3 112static inline void rt2500usb_register_multiwrite(struct rt2x00_dev *rt2x00dev,
95ea3627
ID		 113 const unsigned int offset,
114 void *value, const u16 length)
115{
95ea3627
ID		 116 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
117 USB_VENDOR_REQUEST_OUT, offset,
bd394a74
ID		 118 value, length,
119 REGISTER_TIMEOUT16(length));
95ea3627
ID		 120}
121
c9c3b1a5
ID		 122static int rt2500usb_regbusy_read(struct rt2x00_dev *rt2x00dev,
123 const unsigned int offset,
124 struct rt2x00_field16 field,
125 u16 *reg)
95ea3627 126{
95ea3627
ID		 127 unsigned int i;
128
129 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
c9c3b1a5
ID		 130 rt2500usb_register_read_lock(rt2x00dev, offset, reg);
131 if (!rt2x00_get_field16(*reg, field))
132 return 1;
95ea3627
ID		 133 udelay(REGISTER_BUSY_DELAY);
134 }
135
c9c3b1a5
ID		 136 ERROR(rt2x00dev, "Indirect register access failed: "
137 "offset=0x%.08x, value=0x%.08x\n", offset, *reg);
138 *reg = ~0;
139
140 return 0;
95ea3627
ID		 141}
142
c9c3b1a5
ID		 143#define WAIT_FOR_BBP(__dev, __reg) \
144 rt2500usb_regbusy_read((__dev), PHY_CSR8, PHY_CSR8_BUSY, (__reg))
145#define WAIT_FOR_RF(__dev, __reg) \
146 rt2500usb_regbusy_read((__dev), PHY_CSR10, PHY_CSR10_RF_BUSY, (__reg))
147
0e14f6d3 148static void rt2500usb_bbp_write(struct rt2x00_dev *rt2x00dev,
95ea3627
ID		 149 const unsigned int word, const u8 value)
150{
151 u16 reg;
152
8ff48a8b 153 mutex_lock(&rt2x00dev->csr_mutex);
3d82346c 154
95ea3627 155 /*
c9c3b1a5
ID		 156 * Wait until the BBP becomes available, afterwards we
157 * can safely write the new data into the register.
95ea3627 158 */
c9c3b1a5
ID		 159 if (WAIT_FOR_BBP(rt2x00dev, &reg)) {
160 reg = 0;
161 rt2x00_set_field16(&reg, PHY_CSR7_DATA, value);
162 rt2x00_set_field16(&reg, PHY_CSR7_REG_ID, word);
163 rt2x00_set_field16(&reg, PHY_CSR7_READ_CONTROL, 0);
3d82346c 164
c9c3b1a5
ID		 165 rt2500usb_register_write_lock(rt2x00dev, PHY_CSR7, reg);
166 }
99ade259 167
8ff48a8b 168 mutex_unlock(&rt2x00dev->csr_mutex);
95ea3627
ID		 169}
170
0e14f6d3 171static void rt2500usb_bbp_read(struct rt2x00_dev *rt2x00dev,
95ea3627
ID		 172 const unsigned int word, u8 *value)
173{
174 u16 reg;
175
8ff48a8b 176 mutex_lock(&rt2x00dev->csr_mutex);
3d82346c 177
95ea3627 178 /*
c9c3b1a5
ID		 179 * Wait until the BBP becomes available, afterwards we
180 * can safely write the read request into the register.
181 * After the data has been written, we wait until hardware
182 * returns the correct value, if at any time the register
183 * doesn't become available in time, reg will be 0xffffffff
184 * which means we return 0xff to the caller.
95ea3627 185 */
c9c3b1a5
ID		 186 if (WAIT_FOR_BBP(rt2x00dev, &reg)) {
187 reg = 0;
188 rt2x00_set_field16(&reg, PHY_CSR7_REG_ID, word);
189 rt2x00_set_field16(&reg, PHY_CSR7_READ_CONTROL, 1);
95ea3627 190
c9c3b1a5 191 rt2500usb_register_write_lock(rt2x00dev, PHY_CSR7, reg);
95ea3627 192
c9c3b1a5
ID		 193 if (WAIT_FOR_BBP(rt2x00dev, &reg))
194 rt2500usb_register_read_lock(rt2x00dev, PHY_CSR7, &reg);
195 }
95ea3627 196
95ea3627 197 *value = rt2x00_get_field16(reg, PHY_CSR7_DATA);
3d82346c 198
8ff48a8b 199 mutex_unlock(&rt2x00dev->csr_mutex);
95ea3627
ID		 200}
201
0e14f6d3 202static void rt2500usb_rf_write(struct rt2x00_dev *rt2x00dev,
95ea3627
ID		 203 const unsigned int word, const u32 value)
204{
205 u16 reg;
95ea3627 206
8ff48a8b 207 mutex_lock(&rt2x00dev->csr_mutex);
3d82346c 208
c9c3b1a5
ID		 209 /*
210 * Wait until the RF becomes available, afterwards we
211 * can safely write the new data into the register.
212 */
213 if (WAIT_FOR_RF(rt2x00dev, &reg)) {
214 reg = 0;
215 rt2x00_set_field16(&reg, PHY_CSR9_RF_VALUE, value);
216 rt2500usb_register_write_lock(rt2x00dev, PHY_CSR9, reg);
217
218 reg = 0;
219 rt2x00_set_field16(&reg, PHY_CSR10_RF_VALUE, value >> 16);
220 rt2x00_set_field16(&reg, PHY_CSR10_RF_NUMBER_OF_BITS, 20);
221 rt2x00_set_field16(&reg, PHY_CSR10_RF_IF_SELECT, 0);
222 rt2x00_set_field16(&reg, PHY_CSR10_RF_BUSY, 1);
223
224 rt2500usb_register_write_lock(rt2x00dev, PHY_CSR10, reg);
225 rt2x00_rf_write(rt2x00dev, word, value);
95ea3627
ID		 226 }
227
8ff48a8b 228 mutex_unlock(&rt2x00dev->csr_mutex);
95ea3627
ID		 229}
230
231#ifdef CONFIG_RT2X00_LIB_DEBUGFS
743b97ca
ID		 232static void _rt2500usb_register_read(struct rt2x00_dev *rt2x00dev,
233 const unsigned int offset,
234 u32 *value)
95ea3627 235{
743b97ca 236 rt2500usb_register_read(rt2x00dev, offset, (u16 *)value);
95ea3627
ID		 237}
238
743b97ca
ID		 239static void _rt2500usb_register_write(struct rt2x00_dev *rt2x00dev,
240 const unsigned int offset,
241 u32 value)
95ea3627 242{
743b97ca 243 rt2500usb_register_write(rt2x00dev, offset, value);
95ea3627
ID		 244}
245
246static const struct rt2x00debug rt2500usb_rt2x00debug = {
247 .owner = THIS_MODULE,
248 .csr = {
743b97ca
ID		 249 .read = _rt2500usb_register_read,
250 .write = _rt2500usb_register_write,
251 .flags = RT2X00DEBUGFS_OFFSET,
252 .word_base = CSR_REG_BASE,
95ea3627
ID		 253 .word_size = sizeof(u16),
254 .word_count = CSR_REG_SIZE / sizeof(u16),
255 },
256 .eeprom = {
257 .read = rt2x00_eeprom_read,
258 .write = rt2x00_eeprom_write,
743b97ca 259 .word_base = EEPROM_BASE,
95ea3627
ID		 260 .word_size = sizeof(u16),
261 .word_count = EEPROM_SIZE / sizeof(u16),
262 },
263 .bbp = {
264 .read = rt2500usb_bbp_read,
265 .write = rt2500usb_bbp_write,
743b97ca 266 .word_base = BBP_BASE,
95ea3627
ID		 267 .word_size = sizeof(u8),
268 .word_count = BBP_SIZE / sizeof(u8),
269 },
270 .rf = {
271 .read = rt2x00_rf_read,
272 .write = rt2500usb_rf_write,
743b97ca 273 .word_base = RF_BASE,
95ea3627
ID		 274 .word_size = sizeof(u32),
275 .word_count = RF_SIZE / sizeof(u32),
276 },
277};
278#endif /* CONFIG_RT2X00_LIB_DEBUGFS */
279
7396faf4
ID		 280static int rt2500usb_rfkill_poll(struct rt2x00_dev *rt2x00dev)
281{
282 u16 reg;
283
284 rt2500usb_register_read(rt2x00dev, MAC_CSR19, &reg);
285 return rt2x00_get_field32(reg, MAC_CSR19_BIT7);
286}
7396faf4 287
771fd565 288#ifdef CONFIG_RT2X00_LIB_LEDS
a2e1d52a 289static void rt2500usb_brightness_set(struct led_classdev *led_cdev,
a9450b70
ID		 290 enum led_brightness brightness)
291{
292 struct rt2x00_led *led =
293 container_of(led_cdev, struct rt2x00_led, led_dev);
294 unsigned int enabled = brightness != LED_OFF;
a2e1d52a 295 u16 reg;
a9450b70 296
a2e1d52a 297 rt2500usb_register_read(led->rt2x00dev, MAC_CSR20, &reg);
47b10cd1 298
a2e1d52a
ID		 299 if (led->type == LED_TYPE_RADIO || led->type == LED_TYPE_ASSOC)
300 rt2x00_set_field16(&reg, MAC_CSR20_LINK, enabled);
301 else if (led->type == LED_TYPE_ACTIVITY)
302 rt2x00_set_field16(&reg, MAC_CSR20_ACTIVITY, enabled);
303
304 rt2500usb_register_write(led->rt2x00dev, MAC_CSR20, reg);
305}
306
307static int rt2500usb_blink_set(struct led_classdev *led_cdev,
308 unsigned long *delay_on,
309 unsigned long *delay_off)
310{
311 struct rt2x00_led *led =
312 container_of(led_cdev, struct rt2x00_led, led_dev);
313 u16 reg;
314
315 rt2500usb_register_read(led->rt2x00dev, MAC_CSR21, &reg);
316 rt2x00_set_field16(&reg, MAC_CSR21_ON_PERIOD, *delay_on);
317 rt2x00_set_field16(&reg, MAC_CSR21_OFF_PERIOD, *delay_off);
318 rt2500usb_register_write(led->rt2x00dev, MAC_CSR21, reg);
a9450b70 319
a2e1d52a 320 return 0;
a9450b70 321}
475433be
ID		 322
323static void rt2500usb_init_led(struct rt2x00_dev *rt2x00dev,
324 struct rt2x00_led *led,
325 enum led_type type)
326{
327 led->rt2x00dev = rt2x00dev;
328 led->type = type;
329 led->led_dev.brightness_set = rt2500usb_brightness_set;
330 led->led_dev.blink_set = rt2500usb_blink_set;
331 led->flags = LED_INITIALIZED;
332}
771fd565 333#endif /* CONFIG_RT2X00_LIB_LEDS */
a9450b70 334
95ea3627
ID		 335/*
336 * Configuration handlers.
337 */
dddfb478
ID		 338
339/*
340 * rt2500usb does not differentiate between shared and pairwise
341 * keys, so we should use the same function for both key types.
342 */
343static int rt2500usb_config_key(struct rt2x00_dev *rt2x00dev,
344 struct rt2x00lib_crypto *crypto,
345 struct ieee80211_key_conf *key)
346{
347 int timeout;
348 u32 mask;
349 u16 reg;
350
351 if (crypto->cmd == SET_KEY) {
352 /*
353 * Pairwise key will always be entry 0, but this
354 * could collide with a shared key on the same
355 * position...
356 */
357 mask = TXRX_CSR0_KEY_ID.bit_mask;
358
359 rt2500usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
360 reg &= mask;
361
362 if (reg && reg == mask)
363 return -ENOSPC;
364
365 reg = rt2x00_get_field16(reg, TXRX_CSR0_KEY_ID);
366
367 key->hw_key_idx += reg ? ffz(reg) : 0;
368
369 /*
370 * The encryption key doesn't fit within the CSR cache,
371 * this means we should allocate it seperately and use
372 * rt2x00usb_vendor_request() to send the key to the hardware.
373 */
374 reg = KEY_ENTRY(key->hw_key_idx);
375 timeout = REGISTER_TIMEOUT32(sizeof(crypto->key));
376 rt2x00usb_vendor_request_large_buff(rt2x00dev, USB_MULTI_WRITE,
377 USB_VENDOR_REQUEST_OUT, reg,
378 crypto->key,
379 sizeof(crypto->key),
380 timeout);
381
382 /*
383 * The driver does not support the IV/EIV generation
f3d340c1
ID		 384 * in hardware. However it demands the data to be provided
385 * both seperately as well as inside the frame.
386 * We already provided the CONFIG_CRYPTO_COPY_IV to rt2x00lib
387 * to ensure rt2x00lib will not strip the data from the
388 * frame after the copy, now we must tell mac80211
dddfb478
ID		 389 * to generate the IV/EIV data.
390 */
391 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
392 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
393 }
394
395 /*
396 * TXRX_CSR0_KEY_ID contains only single-bit fields to indicate
397 * a particular key is valid.
398 */
399 rt2500usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
400 rt2x00_set_field16(&reg, TXRX_CSR0_ALGORITHM, crypto->cipher);
401 rt2x00_set_field16(&reg, TXRX_CSR0_IV_OFFSET, IEEE80211_HEADER);
402
403 mask = rt2x00_get_field16(reg, TXRX_CSR0_KEY_ID);
404 if (crypto->cmd == SET_KEY)
405 mask |= 1 << key->hw_key_idx;
406 else if (crypto->cmd == DISABLE_KEY)
407 mask &= ~(1 << key->hw_key_idx);
408 rt2x00_set_field16(&reg, TXRX_CSR0_KEY_ID, mask);
409 rt2500usb_register_write(rt2x00dev, TXRX_CSR0, reg);
410
411 return 0;
412}
413
3a643d24
ID		 414static void rt2500usb_config_filter(struct rt2x00_dev *rt2x00dev,
415 const unsigned int filter_flags)
416{
417 u16 reg;
418
419 /*
420 * Start configuration steps.
421 * Note that the version error will always be dropped
422 * and broadcast frames will always be accepted since
423 * there is no filter for it at this time.
424 */
425 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
426 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_CRC,
427 !(filter_flags & FIF_FCSFAIL));
428 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_PHYSICAL,
429 !(filter_flags & FIF_PLCPFAIL));
430 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_CONTROL,
431 !(filter_flags & FIF_CONTROL));
432 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_NOT_TO_ME,
433 !(filter_flags & FIF_PROMISC_IN_BSS));
434 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_TODS,
e0b005fa
ID		 435 !(filter_flags & FIF_PROMISC_IN_BSS) &&
436 !rt2x00dev->intf_ap_count);
3a643d24
ID		 437 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_VERSION_ERROR, 1);
438 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_MULTICAST,
439 !(filter_flags & FIF_ALLMULTI));
440 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_BROADCAST, 0);
441 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
442}
443
6bb40dd1
ID		 444static void rt2500usb_config_intf(struct rt2x00_dev *rt2x00dev,
445 struct rt2x00_intf *intf,
446 struct rt2x00intf_conf *conf,
447 const unsigned int flags)
95ea3627 448{
6bb40dd1 449 unsigned int bcn_preload;
95ea3627
ID		 450 u16 reg;
451
6bb40dd1 452 if (flags & CONFIG_UPDATE_TYPE) {
6bb40dd1
ID		 453 /*
454 * Enable beacon config
455 */
bad13639 456 bcn_preload = PREAMBLE + GET_DURATION(IEEE80211_HEADER, 20);
6bb40dd1
ID		 457 rt2500usb_register_read(rt2x00dev, TXRX_CSR20, &reg);
458 rt2x00_set_field16(&reg, TXRX_CSR20_OFFSET, bcn_preload >> 6);
459 rt2x00_set_field16(&reg, TXRX_CSR20_BCN_EXPECT_WINDOW,
05c914fe 460 2 * (conf->type != NL80211_IFTYPE_STATION));
6bb40dd1 461 rt2500usb_register_write(rt2x00dev, TXRX_CSR20, reg);
95ea3627 462
6bb40dd1
ID		 463 /*
464 * Enable synchronisation.
465 */
466 rt2500usb_register_read(rt2x00dev, TXRX_CSR18, &reg);
467 rt2x00_set_field16(&reg, TXRX_CSR18_OFFSET, 0);
468 rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg);
469
470 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
fd3c91c5 471 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 1);
6bb40dd1 472 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_SYNC, conf->sync);
fd3c91c5 473 rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 1);
6bb40dd1
ID		 474 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
475 }
95ea3627 476
6bb40dd1
ID		 477 if (flags & CONFIG_UPDATE_MAC)
478 rt2500usb_register_multiwrite(rt2x00dev, MAC_CSR2, conf->mac,
479 (3 * sizeof(__le16)));
480
481 if (flags & CONFIG_UPDATE_BSSID)
482 rt2500usb_register_multiwrite(rt2x00dev, MAC_CSR5, conf->bssid,
483 (3 * sizeof(__le16)));
95ea3627
ID		 484}
485
3a643d24
ID		 486static void rt2500usb_config_erp(struct rt2x00_dev *rt2x00dev,
487 struct rt2x00lib_erp *erp)
95ea3627 488{
95ea3627 489 u16 reg;
95ea3627 490
95ea3627 491 rt2500usb_register_read(rt2x00dev, TXRX_CSR10, &reg);
4f5af6eb 492 rt2x00_set_field16(&reg, TXRX_CSR10_AUTORESPOND_PREAMBLE,
72810379 493 !!erp->short_preamble);
95ea3627 494 rt2500usb_register_write(rt2x00dev, TXRX_CSR10, reg);
95ea3627 495
e4ea1c40 496 rt2500usb_register_write(rt2x00dev, TXRX_CSR11, erp->basic_rates);
95ea3627 497
8a566afe
ID		 498 rt2500usb_register_read(rt2x00dev, TXRX_CSR18, &reg);
499 rt2x00_set_field16(&reg, TXRX_CSR18_INTERVAL, erp->beacon_int * 4);
500 rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg);
501
e4ea1c40
ID		 502 rt2500usb_register_write(rt2x00dev, MAC_CSR10, erp->slot_time);
503 rt2500usb_register_write(rt2x00dev, MAC_CSR11, erp->sifs);
504 rt2500usb_register_write(rt2x00dev, MAC_CSR12, erp->eifs);
95ea3627
ID		 505}
506
e4ea1c40
ID		 507static void rt2500usb_config_ant(struct rt2x00_dev *rt2x00dev,
508 struct antenna_setup *ant)
95ea3627
ID		 509{
510 u8 r2;
511 u8 r14;
512 u16 csr5;
513 u16 csr6;
514
a4fe07d9
ID		 515 /*
516 * We should never come here because rt2x00lib is supposed
517 * to catch this and send us the correct antenna explicitely.
518 */
519 BUG_ON(ant->rx == ANTENNA_SW_DIVERSITY ||
520 ant->tx == ANTENNA_SW_DIVERSITY);
521
95ea3627
ID		 522 rt2500usb_bbp_read(rt2x00dev, 2, &r2);
523 rt2500usb_bbp_read(rt2x00dev, 14, &r14);
524 rt2500usb_register_read(rt2x00dev, PHY_CSR5, &csr5);
525 rt2500usb_register_read(rt2x00dev, PHY_CSR6, &csr6);
526
527 /*
528 * Configure the TX antenna.
529 */
addc81bd 530 switch (ant->tx) {
95ea3627
ID		 531 case ANTENNA_HW_DIVERSITY:
532 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 1);
533 rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 1);
534 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 1);
535 break;
536 case ANTENNA_A:
537 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 0);
538 rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 0);
539 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 0);
540 break;
541 case ANTENNA_B:
a4fe07d9 542 default:
95ea3627
ID		 543 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 2);
544 rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 2);
545 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 2);
546 break;
547 }
548
549 /*
550 * Configure the RX antenna.
551 */
addc81bd 552 switch (ant->rx) {
95ea3627
ID		 553 case ANTENNA_HW_DIVERSITY:
554 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 1);
555 break;
556 case ANTENNA_A:
557 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 0);
558 break;
559 case ANTENNA_B:
a4fe07d9 560 default:
95ea3627
ID		 561 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 2);
562 break;
563 }
564
565 /*
566 * RT2525E and RT5222 need to flip TX I/Q
567 */
5122d898 568 if (rt2x00_rf(rt2x00dev, RF2525E) || rt2x00_rf(rt2x00dev, RF5222)) {
95ea3627
ID		 569 rt2x00_set_field8(&r2, BBP_R2_TX_IQ_FLIP, 1);
570 rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 1);
571 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 1);
572
573 /*
574 * RT2525E does not need RX I/Q Flip.
575 */
5122d898 576 if (rt2x00_rf(rt2x00dev, RF2525E))
95ea3627
ID		 577 rt2x00_set_field8(&r14, BBP_R14_RX_IQ_FLIP, 0);
578 } else {
579 rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 0);
580 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 0);
581 }
582
583 rt2500usb_bbp_write(rt2x00dev, 2, r2);
584 rt2500usb_bbp_write(rt2x00dev, 14, r14);
585 rt2500usb_register_write(rt2x00dev, PHY_CSR5, csr5);
586 rt2500usb_register_write(rt2x00dev, PHY_CSR6, csr6);
587}
588
e4ea1c40
ID		 589static void rt2500usb_config_channel(struct rt2x00_dev *rt2x00dev,
590 struct rf_channel *rf, const int txpower)
591{
592 /*
593 * Set TXpower.
594 */
595 rt2x00_set_field32(&rf->rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
596
597 /*
598 * For RT2525E we should first set the channel to half band higher.
599 */
5122d898 600 if (rt2x00_rf(rt2x00dev, RF2525E)) {
e4ea1c40
ID		 601 static const u32 vals[] = {
602 0x000008aa, 0x000008ae, 0x000008ae, 0x000008b2,
603 0x000008b2, 0x000008b6, 0x000008b6, 0x000008ba,
604 0x000008ba, 0x000008be, 0x000008b7, 0x00000902,
605 0x00000902, 0x00000906
606 };
607
608 rt2500usb_rf_write(rt2x00dev, 2, vals[rf->channel - 1]);
609 if (rf->rf4)
610 rt2500usb_rf_write(rt2x00dev, 4, rf->rf4);
611 }
612
613 rt2500usb_rf_write(rt2x00dev, 1, rf->rf1);
614 rt2500usb_rf_write(rt2x00dev, 2, rf->rf2);
615 rt2500usb_rf_write(rt2x00dev, 3, rf->rf3);
616 if (rf->rf4)
617 rt2500usb_rf_write(rt2x00dev, 4, rf->rf4);
618}
619
620static void rt2500usb_config_txpower(struct rt2x00_dev *rt2x00dev,
621 const int txpower)
622{
623 u32 rf3;
624
625 rt2x00_rf_read(rt2x00dev, 3, &rf3);
626 rt2x00_set_field32(&rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
627 rt2500usb_rf_write(rt2x00dev, 3, rf3);
628}
629
7d7f19cc
ID		 630static void rt2500usb_config_ps(struct rt2x00_dev *rt2x00dev,
631 struct rt2x00lib_conf *libconf)
632{
633 enum dev_state state =
634 (libconf->conf->flags & IEEE80211_CONF_PS) ?
635 STATE_SLEEP : STATE_AWAKE;
636 u16 reg;
637
638 if (state == STATE_SLEEP) {
639 rt2500usb_register_read(rt2x00dev, MAC_CSR18, &reg);
640 rt2x00_set_field16(&reg, MAC_CSR18_DELAY_AFTER_BEACON,
6b347bff 641 rt2x00dev->beacon_int - 20);
7d7f19cc
ID		 642 rt2x00_set_field16(&reg, MAC_CSR18_BEACONS_BEFORE_WAKEUP,
643 libconf->conf->listen_interval - 1);
644
645 /* We must first disable autowake before it can be enabled */
646 rt2x00_set_field16(&reg, MAC_CSR18_AUTO_WAKE, 0);
647 rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
648
649 rt2x00_set_field16(&reg, MAC_CSR18_AUTO_WAKE, 1);
650 rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
5731858d
GW		 651 } else {
652 rt2500usb_register_read(rt2x00dev, MAC_CSR18, &reg);
653 rt2x00_set_field16(&reg, MAC_CSR18_AUTO_WAKE, 0);
654 rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
7d7f19cc
ID		 655 }
656
657 rt2x00dev->ops->lib->set_device_state(rt2x00dev, state);
658}
659
95ea3627 660static void rt2500usb_config(struct rt2x00_dev *rt2x00dev,
6bb40dd1
ID		 661 struct rt2x00lib_conf *libconf,
662 const unsigned int flags)
95ea3627 663{
e4ea1c40 664 if (flags & IEEE80211_CONF_CHANGE_CHANNEL)
5c58ee51
ID		 665 rt2500usb_config_channel(rt2x00dev, &libconf->rf,
666 libconf->conf->power_level);
e4ea1c40
ID		 667 if ((flags & IEEE80211_CONF_CHANGE_POWER) &&
668 !(flags & IEEE80211_CONF_CHANGE_CHANNEL))
5c58ee51
ID		 669 rt2500usb_config_txpower(rt2x00dev,
670 libconf->conf->power_level);
7d7f19cc
ID		 671 if (flags & IEEE80211_CONF_CHANGE_PS)
672 rt2500usb_config_ps(rt2x00dev, libconf);
95ea3627
ID		 673}
674
95ea3627
ID		 675/*
676 * Link tuning
677 */
ebcf26da
ID		 678static void rt2500usb_link_stats(struct rt2x00_dev *rt2x00dev,
679 struct link_qual *qual)
95ea3627
ID		 680{
681 u16 reg;
682
683 /*
684 * Update FCS error count from register.
685 */
686 rt2500usb_register_read(rt2x00dev, STA_CSR0, &reg);
ebcf26da 687 qual->rx_failed = rt2x00_get_field16(reg, STA_CSR0_FCS_ERROR);
95ea3627
ID		 688
689 /*
690 * Update False CCA count from register.
691 */
692 rt2500usb_register_read(rt2x00dev, STA_CSR3, &reg);
ebcf26da 693 qual->false_cca = rt2x00_get_field16(reg, STA_CSR3_FALSE_CCA_ERROR);
95ea3627
ID		 694}
695
5352ff65
ID		 696static void rt2500usb_reset_tuner(struct rt2x00_dev *rt2x00dev,
697 struct link_qual *qual)
95ea3627
ID		 698{
699 u16 eeprom;
700 u16 value;
701
702 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &eeprom);
703 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R24_LOW);
704 rt2500usb_bbp_write(rt2x00dev, 24, value);
705
706 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &eeprom);
707 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R25_LOW);
708 rt2500usb_bbp_write(rt2x00dev, 25, value);
709
710 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &eeprom);
711 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R61_LOW);
712 rt2500usb_bbp_write(rt2x00dev, 61, value);
713
714 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &eeprom);
715 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_VGCUPPER);
716 rt2500usb_bbp_write(rt2x00dev, 17, value);
717
5352ff65 718 qual->vgc_level = value;
95ea3627
ID		 719}
720
95ea3627
ID		 721/*
722 * Initialization functions.
723 */
724static int rt2500usb_init_registers(struct rt2x00_dev *rt2x00dev)
725{
726 u16 reg;
727
728 rt2x00usb_vendor_request_sw(rt2x00dev, USB_DEVICE_MODE, 0x0001,
729 USB_MODE_TEST, REGISTER_TIMEOUT);
730 rt2x00usb_vendor_request_sw(rt2x00dev, USB_SINGLE_WRITE, 0x0308,
731 0x00f0, REGISTER_TIMEOUT);
732
733 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
734 rt2x00_set_field16(&reg, TXRX_CSR2_DISABLE_RX, 1);
735 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
736
737 rt2500usb_register_write(rt2x00dev, MAC_CSR13, 0x1111);
738 rt2500usb_register_write(rt2x00dev, MAC_CSR14, 0x1e11);
739
740 rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
741 rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 1);
742 rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 1);
743 rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 0);
744 rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
745
746 rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
747 rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 0);
748 rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 0);
749 rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 0);
750 rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
751
752 rt2500usb_register_read(rt2x00dev, TXRX_CSR5, &reg);
753 rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID0, 13);
754 rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID0_VALID, 1);
755 rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID1, 12);
756 rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID1_VALID, 1);
757 rt2500usb_register_write(rt2x00dev, TXRX_CSR5, reg);
758
759 rt2500usb_register_read(rt2x00dev, TXRX_CSR6, &reg);
760 rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID0, 10);
761 rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID0_VALID, 1);
762 rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID1, 11);
763 rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID1_VALID, 1);
764 rt2500usb_register_write(rt2x00dev, TXRX_CSR6, reg);
765
766 rt2500usb_register_read(rt2x00dev, TXRX_CSR7, &reg);
767 rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID0, 7);
768 rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID0_VALID, 1);
769 rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID1, 6);
770 rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID1_VALID, 1);
771 rt2500usb_register_write(rt2x00dev, TXRX_CSR7, reg);
772
773 rt2500usb_register_read(rt2x00dev, TXRX_CSR8, &reg);
774 rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID0, 5);
775 rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID0_VALID, 1);
776 rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID1, 0);
777 rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID1_VALID, 0);
778 rt2500usb_register_write(rt2x00dev, TXRX_CSR8, reg);
779
1f909162
ID		 780 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
781 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 0);
782 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_SYNC, 0);
783 rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 0);
784 rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 0);
785 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
786
95ea3627
ID		 787 rt2500usb_register_write(rt2x00dev, TXRX_CSR21, 0xe78f);
788 rt2500usb_register_write(rt2x00dev, MAC_CSR9, 0xff1d);
789
790 if (rt2x00dev->ops->lib->set_device_state(rt2x00dev, STATE_AWAKE))
791 return -EBUSY;
792
793 rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
794 rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 0);
795 rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 0);
796 rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 1);
797 rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
798
5122d898 799 if (rt2x00_rev(rt2x00dev) >= RT2570_VERSION_C) {
95ea3627 800 rt2500usb_register_read(rt2x00dev, PHY_CSR2, &reg);
ddc827f9 801 rt2x00_set_field16(&reg, PHY_CSR2_LNA, 0);
95ea3627 802 } else {
ddc827f9
ID		 803 reg = 0;
804 rt2x00_set_field16(&reg, PHY_CSR2_LNA, 1);
805 rt2x00_set_field16(&reg, PHY_CSR2_LNA_MODE, 3);
95ea3627
ID		 806 }
807 rt2500usb_register_write(rt2x00dev, PHY_CSR2, reg);
808
809 rt2500usb_register_write(rt2x00dev, MAC_CSR11, 0x0002);
810 rt2500usb_register_write(rt2x00dev, MAC_CSR22, 0x0053);
811 rt2500usb_register_write(rt2x00dev, MAC_CSR15, 0x01ee);
812 rt2500usb_register_write(rt2x00dev, MAC_CSR16, 0x0000);
813
814 rt2500usb_register_read(rt2x00dev, MAC_CSR8, &reg);
815 rt2x00_set_field16(&reg, MAC_CSR8_MAX_FRAME_UNIT,
816 rt2x00dev->rx->data_size);
817 rt2500usb_register_write(rt2x00dev, MAC_CSR8, reg);
818
819 rt2500usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
820 rt2x00_set_field16(&reg, TXRX_CSR0_IV_OFFSET, IEEE80211_HEADER);
dddfb478 821 rt2x00_set_field16(&reg, TXRX_CSR0_KEY_ID, 0);
95ea3627
ID		 822 rt2500usb_register_write(rt2x00dev, TXRX_CSR0, reg);
823
824 rt2500usb_register_read(rt2x00dev, MAC_CSR18, &reg);
825 rt2x00_set_field16(&reg, MAC_CSR18_DELAY_AFTER_BEACON, 90);
826 rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
827
828 rt2500usb_register_read(rt2x00dev, PHY_CSR4, &reg);
829 rt2x00_set_field16(&reg, PHY_CSR4_LOW_RF_LE, 1);
830 rt2500usb_register_write(rt2x00dev, PHY_CSR4, reg);
831
832 rt2500usb_register_read(rt2x00dev, TXRX_CSR1, &reg);
833 rt2x00_set_field16(&reg, TXRX_CSR1_AUTO_SEQUENCE, 1);
834 rt2500usb_register_write(rt2x00dev, TXRX_CSR1, reg);
835
836 return 0;
837}
838
2b08da3f 839static int rt2500usb_wait_bbp_ready(struct rt2x00_dev *rt2x00dev)
95ea3627
ID		 840{
841 unsigned int i;
95ea3627 842 u8 value;
95ea3627
ID		 843
844 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
845 rt2500usb_bbp_read(rt2x00dev, 0, &value);
846 if ((value != 0xff) && (value != 0x00))
2b08da3f 847 return 0;
95ea3627
ID		 848 udelay(REGISTER_BUSY_DELAY);
849 }
850
851 ERROR(rt2x00dev, "BBP register access failed, aborting.\n");
852 return -EACCES;
2b08da3f
ID		 853}
854
855static int rt2500usb_init_bbp(struct rt2x00_dev *rt2x00dev)
856{
857 unsigned int i;
858 u16 eeprom;
859 u8 value;
860 u8 reg_id;
861
862 if (unlikely(rt2500usb_wait_bbp_ready(rt2x00dev)))
863 return -EACCES;
95ea3627 864
95ea3627
ID		 865 rt2500usb_bbp_write(rt2x00dev, 3, 0x02);
866 rt2500usb_bbp_write(rt2x00dev, 4, 0x19);
867 rt2500usb_bbp_write(rt2x00dev, 14, 0x1c);
868 rt2500usb_bbp_write(rt2x00dev, 15, 0x30);
869 rt2500usb_bbp_write(rt2x00dev, 16, 0xac);
870 rt2500usb_bbp_write(rt2x00dev, 18, 0x18);
871 rt2500usb_bbp_write(rt2x00dev, 19, 0xff);
872 rt2500usb_bbp_write(rt2x00dev, 20, 0x1e);
873 rt2500usb_bbp_write(rt2x00dev, 21, 0x08);
874 rt2500usb_bbp_write(rt2x00dev, 22, 0x08);
875 rt2500usb_bbp_write(rt2x00dev, 23, 0x08);
876 rt2500usb_bbp_write(rt2x00dev, 24, 0x80);
877 rt2500usb_bbp_write(rt2x00dev, 25, 0x50);
878 rt2500usb_bbp_write(rt2x00dev, 26, 0x08);
879 rt2500usb_bbp_write(rt2x00dev, 27, 0x23);
880 rt2500usb_bbp_write(rt2x00dev, 30, 0x10);
881 rt2500usb_bbp_write(rt2x00dev, 31, 0x2b);
882 rt2500usb_bbp_write(rt2x00dev, 32, 0xb9);
883 rt2500usb_bbp_write(rt2x00dev, 34, 0x12);
884 rt2500usb_bbp_write(rt2x00dev, 35, 0x50);
885 rt2500usb_bbp_write(rt2x00dev, 39, 0xc4);
886 rt2500usb_bbp_write(rt2x00dev, 40, 0x02);
887 rt2500usb_bbp_write(rt2x00dev, 41, 0x60);
888 rt2500usb_bbp_write(rt2x00dev, 53, 0x10);
889 rt2500usb_bbp_write(rt2x00dev, 54, 0x18);
890 rt2500usb_bbp_write(rt2x00dev, 56, 0x08);
891 rt2500usb_bbp_write(rt2x00dev, 57, 0x10);
892 rt2500usb_bbp_write(rt2x00dev, 58, 0x08);
893 rt2500usb_bbp_write(rt2x00dev, 61, 0x60);
894 rt2500usb_bbp_write(rt2x00dev, 62, 0x10);
895 rt2500usb_bbp_write(rt2x00dev, 75, 0xff);
896
95ea3627
ID		 897 for (i = 0; i < EEPROM_BBP_SIZE; i++) {
898 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBP_START + i, &eeprom);
899
900 if (eeprom != 0xffff && eeprom != 0x0000) {
901 reg_id = rt2x00_get_field16(eeprom, EEPROM_BBP_REG_ID);
902 value = rt2x00_get_field16(eeprom, EEPROM_BBP_VALUE);
95ea3627
ID		 903 rt2500usb_bbp_write(rt2x00dev, reg_id, value);
904 }
905 }
95ea3627
ID		 906
907 return 0;
908}
909
910/*
911 * Device state switch handlers.
912 */
913static void rt2500usb_toggle_rx(struct rt2x00_dev *rt2x00dev,
914 enum dev_state state)
915{
916 u16 reg;
917
918 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
919 rt2x00_set_field16(&reg, TXRX_CSR2_DISABLE_RX,
2b08da3f
ID		 920 (state == STATE_RADIO_RX_OFF) ||
921 (state == STATE_RADIO_RX_OFF_LINK));
95ea3627
ID		 922 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
923}
924
925static int rt2500usb_enable_radio(struct rt2x00_dev *rt2x00dev)
926{
927 /*
928 * Initialize all registers.
929 */
2b08da3f
ID		 930 if (unlikely(rt2500usb_init_registers(rt2x00dev) ||
931 rt2500usb_init_bbp(rt2x00dev)))
95ea3627 932 return -EIO;
95ea3627 933
95ea3627
ID		 934 return 0;
935}
936
937static void rt2500usb_disable_radio(struct rt2x00_dev *rt2x00dev)
938{
95ea3627
ID		 939 rt2500usb_register_write(rt2x00dev, MAC_CSR13, 0x2121);
940 rt2500usb_register_write(rt2x00dev, MAC_CSR14, 0x2121);
941
942 /*
943 * Disable synchronisation.
944 */
945 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
946
947 rt2x00usb_disable_radio(rt2x00dev);
948}
949
950static int rt2500usb_set_state(struct rt2x00_dev *rt2x00dev,
951 enum dev_state state)
952{
953 u16 reg;
954 u16 reg2;
955 unsigned int i;
956 char put_to_sleep;
957 char bbp_state;
958 char rf_state;
959
960 put_to_sleep = (state != STATE_AWAKE);
961
962 reg = 0;
963 rt2x00_set_field16(&reg, MAC_CSR17_BBP_DESIRE_STATE, state);
964 rt2x00_set_field16(&reg, MAC_CSR17_RF_DESIRE_STATE, state);
965 rt2x00_set_field16(&reg, MAC_CSR17_PUT_TO_SLEEP, put_to_sleep);
966 rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
967 rt2x00_set_field16(&reg, MAC_CSR17_SET_STATE, 1);
968 rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
969
970 /*
971 * Device is not guaranteed to be in the requested state yet.
972 * We must wait until the register indicates that the
973 * device has entered the correct state.
974 */
975 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
976 rt2500usb_register_read(rt2x00dev, MAC_CSR17, &reg2);
977 bbp_state = rt2x00_get_field16(reg2, MAC_CSR17_BBP_CURR_STATE);
978 rf_state = rt2x00_get_field16(reg2, MAC_CSR17_RF_CURR_STATE);
979 if (bbp_state == state && rf_state == state)
980 return 0;
981 rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
982 msleep(30);
983 }
984
95ea3627
ID		 985 return -EBUSY;
986}
987
988static int rt2500usb_set_device_state(struct rt2x00_dev *rt2x00dev,
989 enum dev_state state)
990{
991 int retval = 0;
992
993 switch (state) {
994 case STATE_RADIO_ON:
995 retval = rt2500usb_enable_radio(rt2x00dev);
996 break;
997 case STATE_RADIO_OFF:
998 rt2500usb_disable_radio(rt2x00dev);
999 break;
1000 case STATE_RADIO_RX_ON:
61667d8d 1001 case STATE_RADIO_RX_ON_LINK:
95ea3627 1002 case STATE_RADIO_RX_OFF:
61667d8d 1003 case STATE_RADIO_RX_OFF_LINK:
2b08da3f
ID		 1004 rt2500usb_toggle_rx(rt2x00dev, state);
1005 break;
1006 case STATE_RADIO_IRQ_ON:
1007 case STATE_RADIO_IRQ_OFF:
1008 /* No support, but no error either */
95ea3627
ID		 1009 break;
1010 case STATE_DEEP_SLEEP:
1011 case STATE_SLEEP:
1012 case STATE_STANDBY:
1013 case STATE_AWAKE:
1014 retval = rt2500usb_set_state(rt2x00dev, state);
1015 break;
1016 default:
1017 retval = -ENOTSUPP;
1018 break;
1019 }
1020
2b08da3f
ID		 1021 if (unlikely(retval))
1022 ERROR(rt2x00dev, "Device failed to enter state %d (%d).\n",
1023 state, retval);
1024
95ea3627
ID		 1025 return retval;
1026}
1027
1028/*
1029 * TX descriptor initialization
1030 */
1031static void rt2500usb_write_tx_desc(struct rt2x00_dev *rt2x00dev,
dd3193e1 1032 struct sk_buff *skb,
61486e0f 1033 struct txentry_desc *txdesc)
95ea3627 1034{
181d6902 1035 struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb);
dd3193e1 1036 __le32 *txd = skbdesc->desc;
95ea3627
ID		 1037 u32 word;
1038
1039 /*
1040 * Start writing the descriptor words.
1041 */
1042 rt2x00_desc_read(txd, 1, &word);
dddfb478 1043 rt2x00_set_field32(&word, TXD_W1_IV_OFFSET, txdesc->iv_offset);
181d6902
ID		 1044 rt2x00_set_field32(&word, TXD_W1_AIFS, txdesc->aifs);
1045 rt2x00_set_field32(&word, TXD_W1_CWMIN, txdesc->cw_min);
1046 rt2x00_set_field32(&word, TXD_W1_CWMAX, txdesc->cw_max);
95ea3627
ID		 1047 rt2x00_desc_write(txd, 1, word);
1048
1049 rt2x00_desc_read(txd, 2, &word);
181d6902
ID		 1050 rt2x00_set_field32(&word, TXD_W2_PLCP_SIGNAL, txdesc->signal);
1051 rt2x00_set_field32(&word, TXD_W2_PLCP_SERVICE, txdesc->service);
1052 rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_LOW, txdesc->length_low);
1053 rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_HIGH, txdesc->length_high);
95ea3627
ID		 1054 rt2x00_desc_write(txd, 2, word);
1055
dddfb478
ID		 1056 if (test_bit(ENTRY_TXD_ENCRYPT, &txdesc->flags)) {
1057 _rt2x00_desc_write(txd, 3, skbdesc->iv[0]);
1058 _rt2x00_desc_write(txd, 4, skbdesc->iv[1]);
1059 }
1060
95ea3627 1061 rt2x00_desc_read(txd, 0, &word);
61486e0f 1062 rt2x00_set_field32(&word, TXD_W0_RETRY_LIMIT, txdesc->retry_limit);
95ea3627 1063 rt2x00_set_field32(&word, TXD_W0_MORE_FRAG,
181d6902 1064 test_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags));
95ea3627 1065 rt2x00_set_field32(&word, TXD_W0_ACK,
181d6902 1066 test_bit(ENTRY_TXD_ACK, &txdesc->flags));
95ea3627 1067 rt2x00_set_field32(&word, TXD_W0_TIMESTAMP,
181d6902 1068 test_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags));
95ea3627 1069 rt2x00_set_field32(&word, TXD_W0_OFDM,
076f9582 1070 (txdesc->rate_mode == RATE_MODE_OFDM));
95ea3627 1071 rt2x00_set_field32(&word, TXD_W0_NEW_SEQ,
61486e0f 1072 test_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags));
181d6902 1073 rt2x00_set_field32(&word, TXD_W0_IFS, txdesc->ifs);
1abc3656 1074 rt2x00_set_field32(&word, TXD_W0_DATABYTE_COUNT, skb->len);
f1dd2b23 1075 rt2x00_set_field32(&word, TXD_W0_CIPHER, !!txdesc->cipher);
dddfb478 1076 rt2x00_set_field32(&word, TXD_W0_KEY_ID, txdesc->key_idx);
95ea3627
ID		 1077 rt2x00_desc_write(txd, 0, word);
1078}
1079
bd88a781
ID		 1080/*
1081 * TX data initialization
1082 */
1083static void rt2500usb_beacondone(struct urb *urb);
1084
1085static void rt2500usb_write_beacon(struct queue_entry *entry)
1086{
1087 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
1088 struct usb_device *usb_dev = to_usb_device_intf(rt2x00dev->dev);
1089 struct queue_entry_priv_usb_bcn *bcn_priv = entry->priv_data;
1090 struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
f1ca2167 1091 int pipe = usb_sndbulkpipe(usb_dev, entry->queue->usb_endpoint);
bd88a781
ID		 1092 int length;
1093 u16 reg;
1094
1095 /*
1096 * Add the descriptor in front of the skb.
1097 */
1098 skb_push(entry->skb, entry->queue->desc_size);
1099 memcpy(entry->skb->data, skbdesc->desc, skbdesc->desc_len);
1100 skbdesc->desc = entry->skb->data;
1101
1102 /*
1103 * Disable beaconing while we are reloading the beacon data,
1104 * otherwise we might be sending out invalid data.
1105 */
1106 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
bd88a781
ID		 1107 rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 0);
1108 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1109
1110 /*
1111 * USB devices cannot blindly pass the skb->len as the
1112 * length of the data to usb_fill_bulk_urb. Pass the skb
1113 * to the driver to determine what the length should be.
1114 */
f1ca2167 1115 length = rt2x00dev->ops->lib->get_tx_data_len(entry);
bd88a781
ID		 1116
1117 usb_fill_bulk_urb(bcn_priv->urb, usb_dev, pipe,
1118 entry->skb->data, length, rt2500usb_beacondone,
1119 entry);
1120
1121 /*
1122 * Second we need to create the guardian byte.
1123 * We only need a single byte, so lets recycle
1124 * the 'flags' field we are not using for beacons.
1125 */
1126 bcn_priv->guardian_data = 0;
1127 usb_fill_bulk_urb(bcn_priv->guardian_urb, usb_dev, pipe,
1128 &bcn_priv->guardian_data, 1, rt2500usb_beacondone,
1129 entry);
1130
1131 /*
1132 * Send out the guardian byte.
1133 */
1134 usb_submit_urb(bcn_priv->guardian_urb, GFP_ATOMIC);
1135}
1136
f1ca2167 1137static int rt2500usb_get_tx_data_len(struct queue_entry *entry)
dd9fa2d2
ID		 1138{
1139 int length;
1140
1141 /*
1142 * The length _must_ be a multiple of 2,
1143 * but it must _not_ be a multiple of the USB packet size.
1144 */
f1ca2167
ID		 1145 length = roundup(entry->skb->len, 2);
1146 length += (2 * !(length % entry->queue->usb_maxpacket));
dd9fa2d2
ID		 1147
1148 return length;
1149}
1150
95ea3627 1151static void rt2500usb_kick_tx_queue(struct rt2x00_dev *rt2x00dev,
e58c6aca 1152 const enum data_queue_qid queue)
95ea3627 1153{
d6756d0d 1154 u16 reg, reg0;
95ea3627 1155
f019d514
ID		 1156 if (queue != QID_BEACON) {
1157 rt2x00usb_kick_tx_queue(rt2x00dev, queue);
95ea3627 1158 return;
f019d514 1159 }
95ea3627
ID		 1160
1161 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
1162 if (!rt2x00_get_field16(reg, TXRX_CSR19_BEACON_GEN)) {
8af244cc
ID		 1163 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 1);
1164 rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 1);
d6756d0d 1165 reg0 = reg;
95ea3627
ID		 1166 rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 1);
1167 /*
1168 * Beacon generation will fail initially.
d6756d0d
IP		 1169 * To prevent this we need to change the TXRX_CSR19
1170 * register several times (reg0 is the same as reg
1171 * except for TXRX_CSR19_BEACON_GEN, which is 0 in reg0
1172 * and 1 in reg).
95ea3627
ID		 1173 */
1174 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
d6756d0d 1175 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg0);
95ea3627 1176 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
d6756d0d 1177 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg0);
95ea3627
ID		 1178 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1179 }
1180}
1181
1182/*
1183 * RX control handlers
1184 */
181d6902
ID		 1185static void rt2500usb_fill_rxdone(struct queue_entry *entry,
1186 struct rxdone_entry_desc *rxdesc)
95ea3627 1187{
dddfb478 1188 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
b8be63ff 1189 struct queue_entry_priv_usb *entry_priv = entry->priv_data;
181d6902
ID		 1190 struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
1191 __le32 *rxd =
1192 (__le32 *)(entry->skb->data +
b8be63ff
ID		 1193 (entry_priv->urb->actual_length -
1194 entry->queue->desc_size));
95ea3627
ID		 1195 u32 word0;
1196 u32 word1;
1197
f855c10b 1198 /*
a26cbc65
GW		 1199 * Copy descriptor to the skbdesc->desc buffer, making it safe from moving of
1200 * frame data in rt2x00usb.
f855c10b 1201 */
a26cbc65 1202 memcpy(skbdesc->desc, rxd, skbdesc->desc_len);
70a96109 1203 rxd = (__le32 *)skbdesc->desc;
f855c10b
ID		 1204
1205 /*
70a96109 1206 * It is now safe to read the descriptor on all architectures.
f855c10b 1207 */
95ea3627
ID		 1208 rt2x00_desc_read(rxd, 0, &word0);
1209 rt2x00_desc_read(rxd, 1, &word1);
1210
4150c572 1211 if (rt2x00_get_field32(word0, RXD_W0_CRC_ERROR))
181d6902 1212 rxdesc->flags |= RX_FLAG_FAILED_FCS_CRC;
4150c572 1213 if (rt2x00_get_field32(word0, RXD_W0_PHYSICAL_ERROR))
181d6902 1214 rxdesc->flags |= RX_FLAG_FAILED_PLCP_CRC;
95ea3627 1215
dddfb478
ID		 1216 if (test_bit(CONFIG_SUPPORT_HW_CRYPTO, &rt2x00dev->flags)) {
1217 rxdesc->cipher = rt2x00_get_field32(word0, RXD_W0_CIPHER);
1218 if (rt2x00_get_field32(word0, RXD_W0_CIPHER_ERROR))
1219 rxdesc->cipher_status = RX_CRYPTO_FAIL_KEY;
1220 }
1221
1222 if (rxdesc->cipher != CIPHER_NONE) {
1223 _rt2x00_desc_read(rxd, 2, &rxdesc->iv[0]);
1224 _rt2x00_desc_read(rxd, 3, &rxdesc->iv[1]);
74415edb
ID		 1225 rxdesc->dev_flags |= RXDONE_CRYPTO_IV;
1226
dddfb478
ID		 1227 /* ICV is located at the end of frame */
1228
f3d340c1 1229 rxdesc->flags |= RX_FLAG_MMIC_STRIPPED;
dddfb478
ID		 1230 if (rxdesc->cipher_status == RX_CRYPTO_SUCCESS)
1231 rxdesc->flags |= RX_FLAG_DECRYPTED;
1232 else if (rxdesc->cipher_status == RX_CRYPTO_FAIL_MIC)
1233 rxdesc->flags |= RX_FLAG_MMIC_ERROR;
1234 }
1235
95ea3627
ID		 1236 /*
1237 * Obtain the status about this packet.
89993890
ID		 1238 * When frame was received with an OFDM bitrate,
1239 * the signal is the PLCP value. If it was received with
1240 * a CCK bitrate the signal is the rate in 100kbit/s.
95ea3627 1241 */
181d6902 1242 rxdesc->signal = rt2x00_get_field32(word1, RXD_W1_SIGNAL);
dddfb478
ID		 1243 rxdesc->rssi =
1244 rt2x00_get_field32(word1, RXD_W1_RSSI) - rt2x00dev->rssi_offset;
181d6902 1245 rxdesc->size = rt2x00_get_field32(word0, RXD_W0_DATABYTE_COUNT);
19d30e02 1246
19d30e02
ID		 1247 if (rt2x00_get_field32(word0, RXD_W0_OFDM))
1248 rxdesc->dev_flags |= RXDONE_SIGNAL_PLCP;
6c6aa3c0
ID		 1249 else
1250 rxdesc->dev_flags |= RXDONE_SIGNAL_BITRATE;
19d30e02
ID		 1251 if (rt2x00_get_field32(word0, RXD_W0_MY_BSS))
1252 rxdesc->dev_flags |= RXDONE_MY_BSS;
7d1de806 1253
2ae23854
MN		 1254 /*
1255 * Adjust the skb memory window to the frame boundaries.
1256 */
2ae23854 1257 skb_trim(entry->skb, rxdesc->size);
95ea3627
ID		 1258}
1259
1260/*
1261 * Interrupt functions.
1262 */
1263static void rt2500usb_beacondone(struct urb *urb)
1264{
181d6902 1265 struct queue_entry *entry = (struct queue_entry *)urb->context;
b8be63ff 1266 struct queue_entry_priv_usb_bcn *bcn_priv = entry->priv_data;
95ea3627 1267
0262ab0d 1268 if (!test_bit(DEVICE_STATE_ENABLED_RADIO, &entry->queue->rt2x00dev->flags))
95ea3627
ID		 1269 return;
1270
1271 /*
1272 * Check if this was the guardian beacon,
1273 * if that was the case we need to send the real beacon now.
1274 * Otherwise we should free the sk_buffer, the device
1275 * should be doing the rest of the work now.
1276 */
b8be63ff
ID		 1277 if (bcn_priv->guardian_urb == urb) {
1278 usb_submit_urb(bcn_priv->urb, GFP_ATOMIC);
1279 } else if (bcn_priv->urb == urb) {
181d6902
ID		 1280 dev_kfree_skb(entry->skb);
1281 entry->skb = NULL;
95ea3627
ID		 1282 }
1283}
1284
1285/*
1286 * Device probe functions.
1287 */
1288static int rt2500usb_validate_eeprom(struct rt2x00_dev *rt2x00dev)
1289{
1290 u16 word;
1291 u8 *mac;
6bb40dd1 1292 u8 bbp;
95ea3627
ID		 1293
1294 rt2x00usb_eeprom_read(rt2x00dev, rt2x00dev->eeprom, EEPROM_SIZE);
1295
1296 /*
1297 * Start validation of the data that has been read.
1298 */
1299 mac = rt2x00_eeprom_addr(rt2x00dev, EEPROM_MAC_ADDR_0);
1300 if (!is_valid_ether_addr(mac)) {
1301 random_ether_addr(mac);
e174961c 1302 EEPROM(rt2x00dev, "MAC: %pM\n", mac);
95ea3627
ID		 1303 }
1304
1305 rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &word);
1306 if (word == 0xffff) {
1307 rt2x00_set_field16(&word, EEPROM_ANTENNA_NUM, 2);
362f3b6b
ID		 1308 rt2x00_set_field16(&word, EEPROM_ANTENNA_TX_DEFAULT,
1309 ANTENNA_SW_DIVERSITY);
1310 rt2x00_set_field16(&word, EEPROM_ANTENNA_RX_DEFAULT,
1311 ANTENNA_SW_DIVERSITY);
1312 rt2x00_set_field16(&word, EEPROM_ANTENNA_LED_MODE,
1313 LED_MODE_DEFAULT);
95ea3627
ID		 1314 rt2x00_set_field16(&word, EEPROM_ANTENNA_DYN_TXAGC, 0);
1315 rt2x00_set_field16(&word, EEPROM_ANTENNA_HARDWARE_RADIO, 0);
1316 rt2x00_set_field16(&word, EEPROM_ANTENNA_RF_TYPE, RF2522);
1317 rt2x00_eeprom_write(rt2x00dev, EEPROM_ANTENNA, word);
1318 EEPROM(rt2x00dev, "Antenna: 0x%04x\n", word);
1319 }
1320
1321 rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &word);
1322 if (word == 0xffff) {
1323 rt2x00_set_field16(&word, EEPROM_NIC_CARDBUS_ACCEL, 0);
1324 rt2x00_set_field16(&word, EEPROM_NIC_DYN_BBP_TUNE, 0);
1325 rt2x00_set_field16(&word, EEPROM_NIC_CCK_TX_POWER, 0);
1326 rt2x00_eeprom_write(rt2x00dev, EEPROM_NIC, word);
1327 EEPROM(rt2x00dev, "NIC: 0x%04x\n", word);
1328 }
1329
1330 rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET, &word);
1331 if (word == 0xffff) {
1332 rt2x00_set_field16(&word, EEPROM_CALIBRATE_OFFSET_RSSI,
1333 DEFAULT_RSSI_OFFSET);
1334 rt2x00_eeprom_write(rt2x00dev, EEPROM_CALIBRATE_OFFSET, word);
1335 EEPROM(rt2x00dev, "Calibrate offset: 0x%04x\n", word);
1336 }
1337
1338 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE, &word);
1339 if (word == 0xffff) {
1340 rt2x00_set_field16(&word, EEPROM_BBPTUNE_THRESHOLD, 45);
1341 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE, word);
1342 EEPROM(rt2x00dev, "BBPtune: 0x%04x\n", word);
1343 }
1344
6bb40dd1
ID		 1345 /*
1346 * Switch lower vgc bound to current BBP R17 value,
1347 * lower the value a bit for better quality.
1348 */
1349 rt2500usb_bbp_read(rt2x00dev, 17, &bbp);
1350 bbp -= 6;
1351
95ea3627
ID		 1352 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &word);
1353 if (word == 0xffff) {
1354 rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCUPPER, 0x40);
6bb40dd1 1355 rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCLOWER, bbp);
95ea3627
ID		 1356 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_VGC, word);
1357 EEPROM(rt2x00dev, "BBPtune vgc: 0x%04x\n", word);
8d8acd46
ID		 1358 } else {
1359 rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCLOWER, bbp);
1360 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_VGC, word);
95ea3627
ID		 1361 }
1362
1363 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R17, &word);
1364 if (word == 0xffff) {
1365 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_LOW, 0x48);
1366 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_HIGH, 0x41);
1367 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R17, word);
1368 EEPROM(rt2x00dev, "BBPtune r17: 0x%04x\n", word);
1369 }
1370
1371 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &word);
1372 if (word == 0xffff) {
1373 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R24_LOW, 0x40);
1374 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R24_HIGH, 0x80);
1375 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R24, word);
1376 EEPROM(rt2x00dev, "BBPtune r24: 0x%04x\n", word);
1377 }
1378
1379 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &word);
1380 if (word == 0xffff) {
1381 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R25_LOW, 0x40);
1382 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R25_HIGH, 0x50);
1383 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R25, word);
1384 EEPROM(rt2x00dev, "BBPtune r25: 0x%04x\n", word);
1385 }
1386
1387 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &word);
1388 if (word == 0xffff) {
1389 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R61_LOW, 0x60);
1390 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R61_HIGH, 0x6d);
1391 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R61, word);
1392 EEPROM(rt2x00dev, "BBPtune r61: 0x%04x\n", word);
1393 }
1394
1395 return 0;
1396}
1397
1398static int rt2500usb_init_eeprom(struct rt2x00_dev *rt2x00dev)
1399{
1400 u16 reg;
1401 u16 value;
1402 u16 eeprom;
1403
1404 /*
1405 * Read EEPROM word for configuration.
1406 */
1407 rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &eeprom);
1408
1409 /*
1410 * Identify RF chipset.
1411 */
1412 value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE);
1413 rt2500usb_register_read(rt2x00dev, MAC_CSR0, &reg);
1414 rt2x00_set_chip(rt2x00dev, RT2570, value, reg);
1415
49e721ec 1416 if (((reg & 0xfff0) != 0) || ((reg & 0x0000000f) == 0)) {
95ea3627
ID		 1417 ERROR(rt2x00dev, "Invalid RT chipset detected.\n");
1418 return -ENODEV;
1419 }
1420
5122d898
GW		 1421 if (!rt2x00_rf(rt2x00dev, RF2522) &&
1422 !rt2x00_rf(rt2x00dev, RF2523) &&
1423 !rt2x00_rf(rt2x00dev, RF2524) &&
1424 !rt2x00_rf(rt2x00dev, RF2525) &&
1425 !rt2x00_rf(rt2x00dev, RF2525E) &&
1426 !rt2x00_rf(rt2x00dev, RF5222)) {
95ea3627
ID		 1427 ERROR(rt2x00dev, "Invalid RF chipset detected.\n");
1428 return -ENODEV;
1429 }
1430
1431 /*
1432 * Identify default antenna configuration.
1433 */
addc81bd 1434 rt2x00dev->default_ant.tx =
95ea3627 1435 rt2x00_get_field16(eeprom, EEPROM_ANTENNA_TX_DEFAULT);
addc81bd 1436 rt2x00dev->default_ant.rx =
95ea3627
ID		 1437 rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RX_DEFAULT);
1438
addc81bd
ID		 1439 /*
1440 * When the eeprom indicates SW_DIVERSITY use HW_DIVERSITY instead.
1441 * I am not 100% sure about this, but the legacy drivers do not
1442 * indicate antenna swapping in software is required when
1443 * diversity is enabled.
1444 */
1445 if (rt2x00dev->default_ant.tx == ANTENNA_SW_DIVERSITY)
1446 rt2x00dev->default_ant.tx = ANTENNA_HW_DIVERSITY;
1447 if (rt2x00dev->default_ant.rx == ANTENNA_SW_DIVERSITY)
1448 rt2x00dev->default_ant.rx = ANTENNA_HW_DIVERSITY;
1449
95ea3627
ID		 1450 /*
1451 * Store led mode, for correct led behaviour.
1452 */
771fd565 1453#ifdef CONFIG_RT2X00_LIB_LEDS
a9450b70
ID		 1454 value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_LED_MODE);
1455
475433be 1456 rt2500usb_init_led(rt2x00dev, &rt2x00dev->led_radio, LED_TYPE_RADIO);
3d3e451f
ID		 1457 if (value == LED_MODE_TXRX_ACTIVITY ||
1458 value == LED_MODE_DEFAULT ||
1459 value == LED_MODE_ASUS)
475433be
ID		 1460 rt2500usb_init_led(rt2x00dev, &rt2x00dev->led_qual,
1461 LED_TYPE_ACTIVITY);
771fd565 1462#endif /* CONFIG_RT2X00_LIB_LEDS */
95ea3627 1463
7396faf4
ID		 1464 /*
1465 * Detect if this device has an hardware controlled radio.
1466 */
7396faf4
ID		 1467 if (rt2x00_get_field16(eeprom, EEPROM_ANTENNA_HARDWARE_RADIO))
1468 __set_bit(CONFIG_SUPPORT_HW_BUTTON, &rt2x00dev->flags);
7396faf4 1469
95ea3627
ID		 1470 /*
1471 * Check if the BBP tuning should be disabled.
1472 */
1473 rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &eeprom);
1474 if (rt2x00_get_field16(eeprom, EEPROM_NIC_DYN_BBP_TUNE))
1475 __set_bit(CONFIG_DISABLE_LINK_TUNING, &rt2x00dev->flags);
1476
1477 /*
1478 * Read the RSSI <-> dBm offset information.
1479 */
1480 rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET, &eeprom);
1481 rt2x00dev->rssi_offset =
1482 rt2x00_get_field16(eeprom, EEPROM_CALIBRATE_OFFSET_RSSI);
1483
1484 return 0;
1485}
1486
1487/*
1488 * RF value list for RF2522
1489 * Supports: 2.4 GHz
1490 */
1491static const struct rf_channel rf_vals_bg_2522[] = {
1492 { 1, 0x00002050, 0x000c1fda, 0x00000101, 0 },
1493 { 2, 0x00002050, 0x000c1fee, 0x00000101, 0 },
1494 { 3, 0x00002050, 0x000c2002, 0x00000101, 0 },
1495 { 4, 0x00002050, 0x000c2016, 0x00000101, 0 },
1496 { 5, 0x00002050, 0x000c202a, 0x00000101, 0 },
1497 { 6, 0x00002050, 0x000c203e, 0x00000101, 0 },
1498 { 7, 0x00002050, 0x000c2052, 0x00000101, 0 },
1499 { 8, 0x00002050, 0x000c2066, 0x00000101, 0 },
1500 { 9, 0x00002050, 0x000c207a, 0x00000101, 0 },
1501 { 10, 0x00002050, 0x000c208e, 0x00000101, 0 },
1502 { 11, 0x00002050, 0x000c20a2, 0x00000101, 0 },
1503 { 12, 0x00002050, 0x000c20b6, 0x00000101, 0 },
1504 { 13, 0x00002050, 0x000c20ca, 0x00000101, 0 },
1505 { 14, 0x00002050, 0x000c20fa, 0x00000101, 0 },
1506};
1507
1508/*
1509 * RF value list for RF2523
1510 * Supports: 2.4 GHz
1511 */
1512static const struct rf_channel rf_vals_bg_2523[] = {
1513 { 1, 0x00022010, 0x00000c9e, 0x000e0111, 0x00000a1b },
1514 { 2, 0x00022010, 0x00000ca2, 0x000e0111, 0x00000a1b },
1515 { 3, 0x00022010, 0x00000ca6, 0x000e0111, 0x00000a1b },
1516 { 4, 0x00022010, 0x00000caa, 0x000e0111, 0x00000a1b },
1517 { 5, 0x00022010, 0x00000cae, 0x000e0111, 0x00000a1b },
1518 { 6, 0x00022010, 0x00000cb2, 0x000e0111, 0x00000a1b },
1519 { 7, 0x00022010, 0x00000cb6, 0x000e0111, 0x00000a1b },
1520 { 8, 0x00022010, 0x00000cba, 0x000e0111, 0x00000a1b },
1521 { 9, 0x00022010, 0x00000cbe, 0x000e0111, 0x00000a1b },
1522 { 10, 0x00022010, 0x00000d02, 0x000e0111, 0x00000a1b },
1523 { 11, 0x00022010, 0x00000d06, 0x000e0111, 0x00000a1b },
1524 { 12, 0x00022010, 0x00000d0a, 0x000e0111, 0x00000a1b },
1525 { 13, 0x00022010, 0x00000d0e, 0x000e0111, 0x00000a1b },
1526 { 14, 0x00022010, 0x00000d1a, 0x000e0111, 0x00000a03 },
1527};
1528
1529/*
1530 * RF value list for RF2524
1531 * Supports: 2.4 GHz
1532 */
1533static const struct rf_channel rf_vals_bg_2524[] = {
1534 { 1, 0x00032020, 0x00000c9e, 0x00000101, 0x00000a1b },
1535 { 2, 0x00032020, 0x00000ca2, 0x00000101, 0x00000a1b },
1536 { 3, 0x00032020, 0x00000ca6, 0x00000101, 0x00000a1b },
1537 { 4, 0x00032020, 0x00000caa, 0x00000101, 0x00000a1b },
1538 { 5, 0x00032020, 0x00000cae, 0x00000101, 0x00000a1b },
1539 { 6, 0x00032020, 0x00000cb2, 0x00000101, 0x00000a1b },
1540 { 7, 0x00032020, 0x00000cb6, 0x00000101, 0x00000a1b },
1541 { 8, 0x00032020, 0x00000cba, 0x00000101, 0x00000a1b },
1542 { 9, 0x00032020, 0x00000cbe, 0x00000101, 0x00000a1b },
1543 { 10, 0x00032020, 0x00000d02, 0x00000101, 0x00000a1b },
1544 { 11, 0x00032020, 0x00000d06, 0x00000101, 0x00000a1b },
1545 { 12, 0x00032020, 0x00000d0a, 0x00000101, 0x00000a1b },
1546 { 13, 0x00032020, 0x00000d0e, 0x00000101, 0x00000a1b },
1547 { 14, 0x00032020, 0x00000d1a, 0x00000101, 0x00000a03 },
1548};
1549
1550/*
1551 * RF value list for RF2525
1552 * Supports: 2.4 GHz
1553 */
1554static const struct rf_channel rf_vals_bg_2525[] = {
1555 { 1, 0x00022020, 0x00080c9e, 0x00060111, 0x00000a1b },
1556 { 2, 0x00022020, 0x00080ca2, 0x00060111, 0x00000a1b },
1557 { 3, 0x00022020, 0x00080ca6, 0x00060111, 0x00000a1b },
1558 { 4, 0x00022020, 0x00080caa, 0x00060111, 0x00000a1b },
1559 { 5, 0x00022020, 0x00080cae, 0x00060111, 0x00000a1b },
1560 { 6, 0x00022020, 0x00080cb2, 0x00060111, 0x00000a1b },
1561 { 7, 0x00022020, 0x00080cb6, 0x00060111, 0x00000a1b },
1562 { 8, 0x00022020, 0x00080cba, 0x00060111, 0x00000a1b },
1563 { 9, 0x00022020, 0x00080cbe, 0x00060111, 0x00000a1b },
1564 { 10, 0x00022020, 0x00080d02, 0x00060111, 0x00000a1b },
1565 { 11, 0x00022020, 0x00080d06, 0x00060111, 0x00000a1b },
1566 { 12, 0x00022020, 0x00080d0a, 0x00060111, 0x00000a1b },
1567 { 13, 0x00022020, 0x00080d0e, 0x00060111, 0x00000a1b },
1568 { 14, 0x00022020, 0x00080d1a, 0x00060111, 0x00000a03 },
1569};
1570
1571/*
1572 * RF value list for RF2525e
1573 * Supports: 2.4 GHz
1574 */
1575static const struct rf_channel rf_vals_bg_2525e[] = {
1576 { 1, 0x00022010, 0x0000089a, 0x00060111, 0x00000e1b },
1577 { 2, 0x00022010, 0x0000089e, 0x00060111, 0x00000e07 },
1578 { 3, 0x00022010, 0x0000089e, 0x00060111, 0x00000e1b },
1579 { 4, 0x00022010, 0x000008a2, 0x00060111, 0x00000e07 },
1580 { 5, 0x00022010, 0x000008a2, 0x00060111, 0x00000e1b },
1581 { 6, 0x00022010, 0x000008a6, 0x00060111, 0x00000e07 },
1582 { 7, 0x00022010, 0x000008a6, 0x00060111, 0x00000e1b },
1583 { 8, 0x00022010, 0x000008aa, 0x00060111, 0x00000e07 },
1584 { 9, 0x00022010, 0x000008aa, 0x00060111, 0x00000e1b },
1585 { 10, 0x00022010, 0x000008ae, 0x00060111, 0x00000e07 },
1586 { 11, 0x00022010, 0x000008ae, 0x00060111, 0x00000e1b },
1587 { 12, 0x00022010, 0x000008b2, 0x00060111, 0x00000e07 },
1588 { 13, 0x00022010, 0x000008b2, 0x00060111, 0x00000e1b },
1589 { 14, 0x00022010, 0x000008b6, 0x00060111, 0x00000e23 },
1590};
1591
1592/*
1593 * RF value list for RF5222
1594 * Supports: 2.4 GHz & 5.2 GHz
1595 */
1596static const struct rf_channel rf_vals_5222[] = {
1597 { 1, 0x00022020, 0x00001136, 0x00000101, 0x00000a0b },
1598 { 2, 0x00022020, 0x0000113a, 0x00000101, 0x00000a0b },
1599 { 3, 0x00022020, 0x0000113e, 0x00000101, 0x00000a0b },
1600 { 4, 0x00022020, 0x00001182, 0x00000101, 0x00000a0b },
1601 { 5, 0x00022020, 0x00001186, 0x00000101, 0x00000a0b },
1602 { 6, 0x00022020, 0x0000118a, 0x00000101, 0x00000a0b },
1603 { 7, 0x00022020, 0x0000118e, 0x00000101, 0x00000a0b },
1604 { 8, 0x00022020, 0x00001192, 0x00000101, 0x00000a0b },
1605 { 9, 0x00022020, 0x00001196, 0x00000101, 0x00000a0b },
1606 { 10, 0x00022020, 0x0000119a, 0x00000101, 0x00000a0b },
1607 { 11, 0x00022020, 0x0000119e, 0x00000101, 0x00000a0b },
1608 { 12, 0x00022020, 0x000011a2, 0x00000101, 0x00000a0b },
1609 { 13, 0x00022020, 0x000011a6, 0x00000101, 0x00000a0b },
1610 { 14, 0x00022020, 0x000011ae, 0x00000101, 0x00000a1b },
1611
1612 /* 802.11 UNI / HyperLan 2 */
1613 { 36, 0x00022010, 0x00018896, 0x00000101, 0x00000a1f },
1614 { 40, 0x00022010, 0x0001889a, 0x00000101, 0x00000a1f },
1615 { 44, 0x00022010, 0x0001889e, 0x00000101, 0x00000a1f },
1616 { 48, 0x00022010, 0x000188a2, 0x00000101, 0x00000a1f },
1617 { 52, 0x00022010, 0x000188a6, 0x00000101, 0x00000a1f },
1618 { 66, 0x00022010, 0x000188aa, 0x00000101, 0x00000a1f },
1619 { 60, 0x00022010, 0x000188ae, 0x00000101, 0x00000a1f },
1620 { 64, 0x00022010, 0x000188b2, 0x00000101, 0x00000a1f },
1621
1622 /* 802.11 HyperLan 2 */
1623 { 100, 0x00022010, 0x00008802, 0x00000101, 0x00000a0f },
1624 { 104, 0x00022010, 0x00008806, 0x00000101, 0x00000a0f },
1625 { 108, 0x00022010, 0x0000880a, 0x00000101, 0x00000a0f },
1626 { 112, 0x00022010, 0x0000880e, 0x00000101, 0x00000a0f },
1627 { 116, 0x00022010, 0x00008812, 0x00000101, 0x00000a0f },
1628 { 120, 0x00022010, 0x00008816, 0x00000101, 0x00000a0f },
1629 { 124, 0x00022010, 0x0000881a, 0x00000101, 0x00000a0f },
1630 { 128, 0x00022010, 0x0000881e, 0x00000101, 0x00000a0f },
1631 { 132, 0x00022010, 0x00008822, 0x00000101, 0x00000a0f },
1632 { 136, 0x00022010, 0x00008826, 0x00000101, 0x00000a0f },
1633
1634 /* 802.11 UNII */
1635 { 140, 0x00022010, 0x0000882a, 0x00000101, 0x00000a0f },
1636 { 149, 0x00022020, 0x000090a6, 0x00000101, 0x00000a07 },
1637 { 153, 0x00022020, 0x000090ae, 0x00000101, 0x00000a07 },
1638 { 157, 0x00022020, 0x000090b6, 0x00000101, 0x00000a07 },
1639 { 161, 0x00022020, 0x000090be, 0x00000101, 0x00000a07 },
1640};
1641
8c5e7a5f 1642static int rt2500usb_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
95ea3627
ID		 1643{
1644 struct hw_mode_spec *spec = &rt2x00dev->spec;
8c5e7a5f
ID		 1645 struct channel_info *info;
1646 char *tx_power;
95ea3627
ID		 1647 unsigned int i;
1648
1649 /*
1650 * Initialize all hw fields.
1651 */
1652 rt2x00dev->hw->flags =
95ea3627 1653 IEEE80211_HW_RX_INCLUDES_FCS |
566bfe5a 1654 IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
4be8c387
JB		 1655 IEEE80211_HW_SIGNAL_DBM |
1656 IEEE80211_HW_SUPPORTS_PS |
1657 IEEE80211_HW_PS_NULLFUNC_STACK;
566bfe5a 1658
14a3bf89 1659 SET_IEEE80211_DEV(rt2x00dev->hw, rt2x00dev->dev);
95ea3627
ID		 1660 SET_IEEE80211_PERM_ADDR(rt2x00dev->hw,
1661 rt2x00_eeprom_addr(rt2x00dev,
1662 EEPROM_MAC_ADDR_0));
1663
95ea3627
ID		 1664 /*
1665 * Initialize hw_mode information.
1666 */
31562e80
ID		 1667 spec->supported_bands = SUPPORT_BAND_2GHZ;
1668 spec->supported_rates = SUPPORT_RATE_CCK | SUPPORT_RATE_OFDM;
95ea3627 1669
5122d898 1670 if (rt2x00_rf(rt2x00dev, RF2522)) {
95ea3627
ID		 1671 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2522);
1672 spec->channels = rf_vals_bg_2522;
5122d898 1673 } else if (rt2x00_rf(rt2x00dev, RF2523)) {
95ea3627
ID		 1674 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2523);
1675 spec->channels = rf_vals_bg_2523;
5122d898 1676 } else if (rt2x00_rf(rt2x00dev, RF2524)) {
95ea3627
ID		 1677 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2524);
1678 spec->channels = rf_vals_bg_2524;
5122d898 1679 } else if (rt2x00_rf(rt2x00dev, RF2525)) {
95ea3627
ID		 1680 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525);
1681 spec->channels = rf_vals_bg_2525;
5122d898 1682 } else if (rt2x00_rf(rt2x00dev, RF2525E)) {
95ea3627
ID		 1683 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525e);
1684 spec->channels = rf_vals_bg_2525e;
5122d898 1685 } else if (rt2x00_rf(rt2x00dev, RF5222)) {
31562e80 1686 spec->supported_bands |= SUPPORT_BAND_5GHZ;
95ea3627
ID		 1687 spec->num_channels = ARRAY_SIZE(rf_vals_5222);
1688 spec->channels = rf_vals_5222;
95ea3627 1689 }
8c5e7a5f
ID		 1690
1691 /*
1692 * Create channel information array
1693 */
1694 info = kzalloc(spec->num_channels * sizeof(*info), GFP_KERNEL);
1695 if (!info)
1696 return -ENOMEM;
1697
1698 spec->channels_info = info;
1699
1700 tx_power = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_START);
1701 for (i = 0; i < 14; i++)
1702 info[i].tx_power1 = TXPOWER_FROM_DEV(tx_power[i]);
1703
1704 if (spec->num_channels > 14) {
1705 for (i = 14; i < spec->num_channels; i++)
1706 info[i].tx_power1 = DEFAULT_TXPOWER;
1707 }
1708
1709 return 0;
95ea3627
ID		 1710}
1711
1712static int rt2500usb_probe_hw(struct rt2x00_dev *rt2x00dev)
1713{
1714 int retval;
1715
1716 /*
1717 * Allocate eeprom data.
1718 */
1719 retval = rt2500usb_validate_eeprom(rt2x00dev);
1720 if (retval)
1721 return retval;
1722
1723 retval = rt2500usb_init_eeprom(rt2x00dev);
1724 if (retval)
1725 return retval;
1726
1727 /*
1728 * Initialize hw specifications.
1729 */
8c5e7a5f
ID		 1730 retval = rt2500usb_probe_hw_mode(rt2x00dev);
1731 if (retval)
1732 return retval;
95ea3627
ID		 1733
1734 /*
181d6902 1735 * This device requires the atim queue
95ea3627 1736 */
181d6902
ID		 1737 __set_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags);
1738 __set_bit(DRIVER_REQUIRE_BEACON_GUARD, &rt2x00dev->flags);
dddfb478
ID		 1739 if (!modparam_nohwcrypt) {
1740 __set_bit(CONFIG_SUPPORT_HW_CRYPTO, &rt2x00dev->flags);
3f787bd6 1741 __set_bit(DRIVER_REQUIRE_COPY_IV, &rt2x00dev->flags);
dddfb478 1742 }
d06193f3 1743 __set_bit(CONFIG_DISABLE_LINK_TUNING, &rt2x00dev->flags);
95ea3627
ID		 1744
1745 /*
1746 * Set the rssi offset.
1747 */
1748 rt2x00dev->rssi_offset = DEFAULT_RSSI_OFFSET;
1749
1750 return 0;
1751}
1752
95ea3627
ID		 1753static const struct ieee80211_ops rt2500usb_mac80211_ops = {
1754 .tx = rt2x00mac_tx,
4150c572
JB		 1755 .start = rt2x00mac_start,
1756 .stop = rt2x00mac_stop,
95ea3627
ID		 1757 .add_interface = rt2x00mac_add_interface,
1758 .remove_interface = rt2x00mac_remove_interface,
1759 .config = rt2x00mac_config,
3a643d24 1760 .configure_filter = rt2x00mac_configure_filter,
930c06f2 1761 .set_tim = rt2x00mac_set_tim,
dddfb478 1762 .set_key = rt2x00mac_set_key,
95ea3627 1763 .get_stats = rt2x00mac_get_stats,
471b3efd 1764 .bss_info_changed = rt2x00mac_bss_info_changed,
95ea3627 1765 .conf_tx = rt2x00mac_conf_tx,
e47a5cdd 1766 .rfkill_poll = rt2x00mac_rfkill_poll,
95ea3627
ID		 1767};
1768
1769static const struct rt2x00lib_ops rt2500usb_rt2x00_ops = {
1770 .probe_hw = rt2500usb_probe_hw,
1771 .initialize = rt2x00usb_initialize,
1772 .uninitialize = rt2x00usb_uninitialize,
798b7adb 1773 .clear_entry = rt2x00usb_clear_entry,
95ea3627 1774 .set_device_state = rt2500usb_set_device_state,
7396faf4 1775 .rfkill_poll = rt2500usb_rfkill_poll,
95ea3627
ID		 1776 .link_stats = rt2500usb_link_stats,
1777 .reset_tuner = rt2500usb_reset_tuner,
95ea3627
ID		 1778 .write_tx_desc = rt2500usb_write_tx_desc,
1779 .write_tx_data = rt2x00usb_write_tx_data,
bd88a781 1780 .write_beacon = rt2500usb_write_beacon,
dd9fa2d2 1781 .get_tx_data_len = rt2500usb_get_tx_data_len,
95ea3627 1782 .kick_tx_queue = rt2500usb_kick_tx_queue,
a2c9b652 1783 .kill_tx_queue = rt2x00usb_kill_tx_queue,
95ea3627 1784 .fill_rxdone = rt2500usb_fill_rxdone,
dddfb478
ID		 1785 .config_shared_key = rt2500usb_config_key,
1786 .config_pairwise_key = rt2500usb_config_key,
3a643d24 1787 .config_filter = rt2500usb_config_filter,
6bb40dd1 1788 .config_intf = rt2500usb_config_intf,
72810379 1789 .config_erp = rt2500usb_config_erp,
e4ea1c40 1790 .config_ant = rt2500usb_config_ant,
95ea3627
ID		 1791 .config = rt2500usb_config,
1792};
1793
181d6902
ID		 1794static const struct data_queue_desc rt2500usb_queue_rx = {
1795 .entry_num = RX_ENTRIES,
1796 .data_size = DATA_FRAME_SIZE,
1797 .desc_size = RXD_DESC_SIZE,
b8be63ff 1798 .priv_size = sizeof(struct queue_entry_priv_usb),
181d6902
ID		 1799};
1800
1801static const struct data_queue_desc rt2500usb_queue_tx = {
1802 .entry_num = TX_ENTRIES,
1803 .data_size = DATA_FRAME_SIZE,
1804 .desc_size = TXD_DESC_SIZE,
b8be63ff 1805 .priv_size = sizeof(struct queue_entry_priv_usb),
181d6902
ID		 1806};
1807
1808static const struct data_queue_desc rt2500usb_queue_bcn = {
1809 .entry_num = BEACON_ENTRIES,
1810 .data_size = MGMT_FRAME_SIZE,
1811 .desc_size = TXD_DESC_SIZE,
1812 .priv_size = sizeof(struct queue_entry_priv_usb_bcn),
1813};
1814
1815static const struct data_queue_desc rt2500usb_queue_atim = {
1816 .entry_num = ATIM_ENTRIES,
1817 .data_size = DATA_FRAME_SIZE,
1818 .desc_size = TXD_DESC_SIZE,
b8be63ff 1819 .priv_size = sizeof(struct queue_entry_priv_usb),
181d6902
ID		 1820};
1821
95ea3627 1822static const struct rt2x00_ops rt2500usb_ops = {
04d0362e
GW		 1823 .name = KBUILD_MODNAME,
1824 .max_sta_intf = 1,
1825 .max_ap_intf = 1,
1826 .eeprom_size = EEPROM_SIZE,
1827 .rf_size = RF_SIZE,
1828 .tx_queues = NUM_TX_QUEUES,
e6218cc4 1829 .extra_tx_headroom = TXD_DESC_SIZE,
04d0362e
GW		 1830 .rx = &rt2500usb_queue_rx,
1831 .tx = &rt2500usb_queue_tx,
1832 .bcn = &rt2500usb_queue_bcn,
1833 .atim = &rt2500usb_queue_atim,
1834 .lib = &rt2500usb_rt2x00_ops,
1835 .hw = &rt2500usb_mac80211_ops,
95ea3627 1836#ifdef CONFIG_RT2X00_LIB_DEBUGFS
04d0362e 1837 .debugfs = &rt2500usb_rt2x00debug,
95ea3627
ID		 1838#endif /* CONFIG_RT2X00_LIB_DEBUGFS */
1839};
1840
1841/*
1842 * rt2500usb module information.
1843 */
1844static struct usb_device_id rt2500usb_device_table[] = {
1845 /* ASUS */
1846 { USB_DEVICE(0x0b05, 0x1706), USB_DEVICE_DATA(&rt2500usb_ops) },
1847 { USB_DEVICE(0x0b05, 0x1707), USB_DEVICE_DATA(&rt2500usb_ops) },
1848 /* Belkin */
1849 { USB_DEVICE(0x050d, 0x7050), USB_DEVICE_DATA(&rt2500usb_ops) },
1850 { USB_DEVICE(0x050d, 0x7051), USB_DEVICE_DATA(&rt2500usb_ops) },
1851 { USB_DEVICE(0x050d, 0x705a), USB_DEVICE_DATA(&rt2500usb_ops) },
1852 /* Cisco Systems */
1853 { USB_DEVICE(0x13b1, 0x000d), USB_DEVICE_DATA(&rt2500usb_ops) },
1854 { USB_DEVICE(0x13b1, 0x0011), USB_DEVICE_DATA(&rt2500usb_ops) },
1855 { USB_DEVICE(0x13b1, 0x001a), USB_DEVICE_DATA(&rt2500usb_ops) },
9eb77ab0
XVP		 1856 /* CNet */
1857 { USB_DEVICE(0x1371, 0x9022), USB_DEVICE_DATA(&rt2500usb_ops) },
95ea3627
ID		 1858 /* Conceptronic */
1859 { USB_DEVICE(0x14b2, 0x3c02), USB_DEVICE_DATA(&rt2500usb_ops) },
1860 /* D-LINK */
1861 { USB_DEVICE(0x2001, 0x3c00), USB_DEVICE_DATA(&rt2500usb_ops) },
1862 /* Gigabyte */
1863 { USB_DEVICE(0x1044, 0x8001), USB_DEVICE_DATA(&rt2500usb_ops) },
1864 { USB_DEVICE(0x1044, 0x8007), USB_DEVICE_DATA(&rt2500usb_ops) },
1865 /* Hercules */
1866 { USB_DEVICE(0x06f8, 0xe000), USB_DEVICE_DATA(&rt2500usb_ops) },
1867 /* Melco */
db433feb 1868 { USB_DEVICE(0x0411, 0x005e), USB_DEVICE_DATA(&rt2500usb_ops) },
95ea3627
ID		 1869 { USB_DEVICE(0x0411, 0x0066), USB_DEVICE_DATA(&rt2500usb_ops) },
1870 { USB_DEVICE(0x0411, 0x0067), USB_DEVICE_DATA(&rt2500usb_ops) },
1871 { USB_DEVICE(0x0411, 0x008b), USB_DEVICE_DATA(&rt2500usb_ops) },
1872 { USB_DEVICE(0x0411, 0x0097), USB_DEVICE_DATA(&rt2500usb_ops) },
95ea3627
ID		 1873 /* MSI */
1874 { USB_DEVICE(0x0db0, 0x6861), USB_DEVICE_DATA(&rt2500usb_ops) },
1875 { USB_DEVICE(0x0db0, 0x6865), USB_DEVICE_DATA(&rt2500usb_ops) },
1876 { USB_DEVICE(0x0db0, 0x6869), USB_DEVICE_DATA(&rt2500usb_ops) },
1877 /* Ralink */
1878 { USB_DEVICE(0x148f, 0x1706), USB_DEVICE_DATA(&rt2500usb_ops) },
1879 { USB_DEVICE(0x148f, 0x2570), USB_DEVICE_DATA(&rt2500usb_ops) },
1880 { USB_DEVICE(0x148f, 0x2573), USB_DEVICE_DATA(&rt2500usb_ops) },
1881 { USB_DEVICE(0x148f, 0x9020), USB_DEVICE_DATA(&rt2500usb_ops) },
9eb77ab0
XVP		 1882 /* Sagem */
1883 { USB_DEVICE(0x079b, 0x004b), USB_DEVICE_DATA(&rt2500usb_ops) },
95ea3627
ID		 1884 /* Siemens */
1885 { USB_DEVICE(0x0681, 0x3c06), USB_DEVICE_DATA(&rt2500usb_ops) },
1886 /* SMC */
1887 { USB_DEVICE(0x0707, 0xee13), USB_DEVICE_DATA(&rt2500usb_ops) },
1888 /* Spairon */
1889 { USB_DEVICE(0x114b, 0x0110), USB_DEVICE_DATA(&rt2500usb_ops) },
9eb77ab0
XVP		 1890 /* SURECOM */
1891 { USB_DEVICE(0x0769, 0x11f3), USB_DEVICE_DATA(&rt2500usb_ops) },
95ea3627
ID		 1892 /* Trust */
1893 { USB_DEVICE(0x0eb0, 0x9020), USB_DEVICE_DATA(&rt2500usb_ops) },
9eb77ab0
XVP		 1894 /* VTech */
1895 { USB_DEVICE(0x0f88, 0x3012), USB_DEVICE_DATA(&rt2500usb_ops) },
95ea3627
ID		 1896 /* Zinwell */
1897 { USB_DEVICE(0x5a57, 0x0260), USB_DEVICE_DATA(&rt2500usb_ops) },
1898 { 0, }
1899};
1900
1901MODULE_AUTHOR(DRV_PROJECT);
1902MODULE_VERSION(DRV_VERSION);
1903MODULE_DESCRIPTION("Ralink RT2500 USB Wireless LAN driver.");
1904MODULE_SUPPORTED_DEVICE("Ralink RT2570 USB chipset based cards");
1905MODULE_DEVICE_TABLE(usb, rt2500usb_device_table);
1906MODULE_LICENSE("GPL");
1907
1908static struct usb_driver rt2500usb_driver = {
2360157c 1909 .name = KBUILD_MODNAME,
95ea3627
ID		 1910 .id_table = rt2500usb_device_table,
1911 .probe = rt2x00usb_probe,
1912 .disconnect = rt2x00usb_disconnect,
1913 .suspend = rt2x00usb_suspend,
1914 .resume = rt2x00usb_resume,
1915};
1916
1917static int __init rt2500usb_init(void)
1918{
1919 return usb_register(&rt2500usb_driver);
1920}
1921
1922static void __exit rt2500usb_exit(void)
1923{
1924 usb_deregister(&rt2500usb_driver);
1925}
1926
1927module_init(rt2500usb_init);
1928module_exit(rt2500usb_exit);
Linux kernel - Deliverables
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