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Merge branch 'hwmon-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jdelv...
[deliverable/linux.git] / drivers / net / wireless / rt2x00 / rt2500usb.c
CommitLineData
95ea3627 1/*
4e54c711 2 Copyright (C) 2004 - 2009 rt2x00 SourceForge Project
95ea3627
ID		 3 <http://rt2x00.serialmonkey.com>
4
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
9
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
14
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the
17 Free Software Foundation, Inc.,
18 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19 */
20
21/*
22 Module: rt2500usb
23 Abstract: rt2500usb device specific routines.
24 Supported chipsets: RT2570.
25 */
26
95ea3627
ID		 27#include <linux/delay.h>
28#include <linux/etherdevice.h>
29#include <linux/init.h>
30#include <linux/kernel.h>
31#include <linux/module.h>
32#include <linux/usb.h>
33
34#include "rt2x00.h"
35#include "rt2x00usb.h"
36#include "rt2500usb.h"
37
dddfb478
ID		 38/*
39 * Allow hardware encryption to be disabled.
40 */
f1dd2b23 41static int modparam_nohwcrypt = 0;
dddfb478
ID		 42module_param_named(nohwcrypt, modparam_nohwcrypt, bool, S_IRUGO);
43MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption.");
44
95ea3627
ID		 45/*
46 * Register access.
47 * All access to the CSR registers will go through the methods
48 * rt2500usb_register_read and rt2500usb_register_write.
49 * BBP and RF register require indirect register access,
50 * and use the CSR registers BBPCSR and RFCSR to achieve this.
51 * These indirect registers work with busy bits,
52 * and we will try maximal REGISTER_BUSY_COUNT times to access
53 * the register while taking a REGISTER_BUSY_DELAY us delay
54 * between each attampt. When the busy bit is still set at that time,
55 * the access attempt is considered to have failed,
56 * and we will print an error.
8ff48a8b 57 * If the csr_mutex is already held then the _lock variants must
3d82346c 58 * be used instead.
95ea3627 59 */
0e14f6d3 60static inline void rt2500usb_register_read(struct rt2x00_dev *rt2x00dev,
95ea3627
ID		 61 const unsigned int offset,
62 u16 *value)
63{
64 __le16 reg;
65 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
66 USB_VENDOR_REQUEST_IN, offset,
c9c3b1a5 67 &reg, sizeof(reg), REGISTER_TIMEOUT);
95ea3627
ID		 68 *value = le16_to_cpu(reg);
69}
70
3d82346c
AB		 71static inline void rt2500usb_register_read_lock(struct rt2x00_dev *rt2x00dev,
72 const unsigned int offset,
73 u16 *value)
74{
75 __le16 reg;
76 rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_READ,
77 USB_VENDOR_REQUEST_IN, offset,
c9c3b1a5 78 &reg, sizeof(reg), REGISTER_TIMEOUT);
3d82346c
AB		 79 *value = le16_to_cpu(reg);
80}
81
0e14f6d3 82static inline void rt2500usb_register_multiread(struct rt2x00_dev *rt2x00dev,
95ea3627
ID		 83 const unsigned int offset,
84 void *value, const u16 length)
85{
95ea3627
ID		 86 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
87 USB_VENDOR_REQUEST_IN, offset,
bd394a74
ID		 88 value, length,
89 REGISTER_TIMEOUT16(length));
95ea3627
ID		 90}
91
0e14f6d3 92static inline void rt2500usb_register_write(struct rt2x00_dev *rt2x00dev,
95ea3627
ID		 93 const unsigned int offset,
94 u16 value)
95{
96 __le16 reg = cpu_to_le16(value);
97 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
98 USB_VENDOR_REQUEST_OUT, offset,
c9c3b1a5 99 &reg, sizeof(reg), REGISTER_TIMEOUT);
95ea3627
ID		 100}
101
3d82346c
AB		 102static inline void rt2500usb_register_write_lock(struct rt2x00_dev *rt2x00dev,
103 const unsigned int offset,
104 u16 value)
105{
106 __le16 reg = cpu_to_le16(value);
107 rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_WRITE,
108 USB_VENDOR_REQUEST_OUT, offset,
c9c3b1a5 109 &reg, sizeof(reg), REGISTER_TIMEOUT);
3d82346c
AB		 110}
111
0e14f6d3 112static inline void rt2500usb_register_multiwrite(struct rt2x00_dev *rt2x00dev,
95ea3627
ID		 113 const unsigned int offset,
114 void *value, const u16 length)
115{
95ea3627
ID		 116 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
117 USB_VENDOR_REQUEST_OUT, offset,
bd394a74
ID		 118 value, length,
119 REGISTER_TIMEOUT16(length));
95ea3627
ID		 120}
121
c9c3b1a5
ID		 122static int rt2500usb_regbusy_read(struct rt2x00_dev *rt2x00dev,
123 const unsigned int offset,
124 struct rt2x00_field16 field,
125 u16 *reg)
95ea3627 126{
95ea3627
ID		 127 unsigned int i;
128
129 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
c9c3b1a5
ID		 130 rt2500usb_register_read_lock(rt2x00dev, offset, reg);
131 if (!rt2x00_get_field16(*reg, field))
132 return 1;
95ea3627
ID		 133 udelay(REGISTER_BUSY_DELAY);
134 }
135
c9c3b1a5
ID		 136 ERROR(rt2x00dev, "Indirect register access failed: "
137 "offset=0x%.08x, value=0x%.08x\n", offset, *reg);
138 *reg = ~0;
139
140 return 0;
95ea3627
ID		 141}
142
c9c3b1a5
ID		 143#define WAIT_FOR_BBP(__dev, __reg) \
144 rt2500usb_regbusy_read((__dev), PHY_CSR8, PHY_CSR8_BUSY, (__reg))
145#define WAIT_FOR_RF(__dev, __reg) \
146 rt2500usb_regbusy_read((__dev), PHY_CSR10, PHY_CSR10_RF_BUSY, (__reg))
147
0e14f6d3 148static void rt2500usb_bbp_write(struct rt2x00_dev *rt2x00dev,
95ea3627
ID		 149 const unsigned int word, const u8 value)
150{
151 u16 reg;
152
8ff48a8b 153 mutex_lock(&rt2x00dev->csr_mutex);
3d82346c 154
95ea3627 155 /*
c9c3b1a5
ID		 156 * Wait until the BBP becomes available, afterwards we
157 * can safely write the new data into the register.
95ea3627 158 */
c9c3b1a5
ID		 159 if (WAIT_FOR_BBP(rt2x00dev, &reg)) {
160 reg = 0;
161 rt2x00_set_field16(&reg, PHY_CSR7_DATA, value);
162 rt2x00_set_field16(&reg, PHY_CSR7_REG_ID, word);
163 rt2x00_set_field16(&reg, PHY_CSR7_READ_CONTROL, 0);
3d82346c 164
c9c3b1a5
ID		 165 rt2500usb_register_write_lock(rt2x00dev, PHY_CSR7, reg);
166 }
99ade259 167
8ff48a8b 168 mutex_unlock(&rt2x00dev->csr_mutex);
95ea3627
ID		 169}
170
0e14f6d3 171static void rt2500usb_bbp_read(struct rt2x00_dev *rt2x00dev,
95ea3627
ID		 172 const unsigned int word, u8 *value)
173{
174 u16 reg;
175
8ff48a8b 176 mutex_lock(&rt2x00dev->csr_mutex);
3d82346c 177
95ea3627 178 /*
c9c3b1a5
ID		 179 * Wait until the BBP becomes available, afterwards we
180 * can safely write the read request into the register.
181 * After the data has been written, we wait until hardware
182 * returns the correct value, if at any time the register
183 * doesn't become available in time, reg will be 0xffffffff
184 * which means we return 0xff to the caller.
95ea3627 185 */
c9c3b1a5
ID		 186 if (WAIT_FOR_BBP(rt2x00dev, &reg)) {
187 reg = 0;
188 rt2x00_set_field16(&reg, PHY_CSR7_REG_ID, word);
189 rt2x00_set_field16(&reg, PHY_CSR7_READ_CONTROL, 1);
95ea3627 190
c9c3b1a5 191 rt2500usb_register_write_lock(rt2x00dev, PHY_CSR7, reg);
95ea3627 192
c9c3b1a5
ID		 193 if (WAIT_FOR_BBP(rt2x00dev, &reg))
194 rt2500usb_register_read_lock(rt2x00dev, PHY_CSR7, &reg);
195 }
95ea3627 196
95ea3627 197 *value = rt2x00_get_field16(reg, PHY_CSR7_DATA);
3d82346c 198
8ff48a8b 199 mutex_unlock(&rt2x00dev->csr_mutex);
95ea3627
ID		 200}
201
0e14f6d3 202static void rt2500usb_rf_write(struct rt2x00_dev *rt2x00dev,
95ea3627
ID		 203 const unsigned int word, const u32 value)
204{
205 u16 reg;
95ea3627 206
8ff48a8b 207 mutex_lock(&rt2x00dev->csr_mutex);
3d82346c 208
c9c3b1a5
ID		 209 /*
210 * Wait until the RF becomes available, afterwards we
211 * can safely write the new data into the register.
212 */
213 if (WAIT_FOR_RF(rt2x00dev, &reg)) {
214 reg = 0;
215 rt2x00_set_field16(&reg, PHY_CSR9_RF_VALUE, value);
216 rt2500usb_register_write_lock(rt2x00dev, PHY_CSR9, reg);
217
218 reg = 0;
219 rt2x00_set_field16(&reg, PHY_CSR10_RF_VALUE, value >> 16);
220 rt2x00_set_field16(&reg, PHY_CSR10_RF_NUMBER_OF_BITS, 20);
221 rt2x00_set_field16(&reg, PHY_CSR10_RF_IF_SELECT, 0);
222 rt2x00_set_field16(&reg, PHY_CSR10_RF_BUSY, 1);
223
224 rt2500usb_register_write_lock(rt2x00dev, PHY_CSR10, reg);
225 rt2x00_rf_write(rt2x00dev, word, value);
95ea3627
ID		 226 }
227
8ff48a8b 228 mutex_unlock(&rt2x00dev->csr_mutex);
95ea3627
ID		 229}
230
231#ifdef CONFIG_RT2X00_LIB_DEBUGFS
743b97ca
ID		 232static void _rt2500usb_register_read(struct rt2x00_dev *rt2x00dev,
233 const unsigned int offset,
234 u32 *value)
95ea3627 235{
743b97ca 236 rt2500usb_register_read(rt2x00dev, offset, (u16 *)value);
95ea3627
ID		 237}
238
743b97ca
ID		 239static void _rt2500usb_register_write(struct rt2x00_dev *rt2x00dev,
240 const unsigned int offset,
241 u32 value)
95ea3627 242{
743b97ca 243 rt2500usb_register_write(rt2x00dev, offset, value);
95ea3627
ID		 244}
245
246static const struct rt2x00debug rt2500usb_rt2x00debug = {
247 .owner = THIS_MODULE,
248 .csr = {
743b97ca
ID		 249 .read = _rt2500usb_register_read,
250 .write = _rt2500usb_register_write,
251 .flags = RT2X00DEBUGFS_OFFSET,
252 .word_base = CSR_REG_BASE,
95ea3627
ID		 253 .word_size = sizeof(u16),
254 .word_count = CSR_REG_SIZE / sizeof(u16),
255 },
256 .eeprom = {
257 .read = rt2x00_eeprom_read,
258 .write = rt2x00_eeprom_write,
743b97ca 259 .word_base = EEPROM_BASE,
95ea3627
ID		 260 .word_size = sizeof(u16),
261 .word_count = EEPROM_SIZE / sizeof(u16),
262 },
263 .bbp = {
264 .read = rt2500usb_bbp_read,
265 .write = rt2500usb_bbp_write,
743b97ca 266 .word_base = BBP_BASE,
95ea3627
ID		 267 .word_size = sizeof(u8),
268 .word_count = BBP_SIZE / sizeof(u8),
269 },
270 .rf = {
271 .read = rt2x00_rf_read,
272 .write = rt2500usb_rf_write,
743b97ca 273 .word_base = RF_BASE,
95ea3627
ID		 274 .word_size = sizeof(u32),
275 .word_count = RF_SIZE / sizeof(u32),
276 },
277};
278#endif /* CONFIG_RT2X00_LIB_DEBUGFS */
279
7396faf4
ID		 280#ifdef CONFIG_RT2X00_LIB_RFKILL
281static int rt2500usb_rfkill_poll(struct rt2x00_dev *rt2x00dev)
282{
283 u16 reg;
284
285 rt2500usb_register_read(rt2x00dev, MAC_CSR19, &reg);
286 return rt2x00_get_field32(reg, MAC_CSR19_BIT7);
287}
288#else
289#define rt2500usb_rfkill_poll NULL
290#endif /* CONFIG_RT2X00_LIB_RFKILL */
291
771fd565 292#ifdef CONFIG_RT2X00_LIB_LEDS
a2e1d52a 293static void rt2500usb_brightness_set(struct led_classdev *led_cdev,
a9450b70
ID		 294 enum led_brightness brightness)
295{
296 struct rt2x00_led *led =
297 container_of(led_cdev, struct rt2x00_led, led_dev);
298 unsigned int enabled = brightness != LED_OFF;
a2e1d52a 299 u16 reg;
a9450b70 300
a2e1d52a 301 rt2500usb_register_read(led->rt2x00dev, MAC_CSR20, &reg);
47b10cd1 302
a2e1d52a
ID		 303 if (led->type == LED_TYPE_RADIO || led->type == LED_TYPE_ASSOC)
304 rt2x00_set_field16(&reg, MAC_CSR20_LINK, enabled);
305 else if (led->type == LED_TYPE_ACTIVITY)
306 rt2x00_set_field16(&reg, MAC_CSR20_ACTIVITY, enabled);
307
308 rt2500usb_register_write(led->rt2x00dev, MAC_CSR20, reg);
309}
310
311static int rt2500usb_blink_set(struct led_classdev *led_cdev,
312 unsigned long *delay_on,
313 unsigned long *delay_off)
314{
315 struct rt2x00_led *led =
316 container_of(led_cdev, struct rt2x00_led, led_dev);
317 u16 reg;
318
319 rt2500usb_register_read(led->rt2x00dev, MAC_CSR21, &reg);
320 rt2x00_set_field16(&reg, MAC_CSR21_ON_PERIOD, *delay_on);
321 rt2x00_set_field16(&reg, MAC_CSR21_OFF_PERIOD, *delay_off);
322 rt2500usb_register_write(led->rt2x00dev, MAC_CSR21, reg);
a9450b70 323
a2e1d52a 324 return 0;
a9450b70 325}
475433be
ID		 326
327static void rt2500usb_init_led(struct rt2x00_dev *rt2x00dev,
328 struct rt2x00_led *led,
329 enum led_type type)
330{
331 led->rt2x00dev = rt2x00dev;
332 led->type = type;
333 led->led_dev.brightness_set = rt2500usb_brightness_set;
334 led->led_dev.blink_set = rt2500usb_blink_set;
335 led->flags = LED_INITIALIZED;
336}
771fd565 337#endif /* CONFIG_RT2X00_LIB_LEDS */
a9450b70 338
95ea3627
ID		 339/*
340 * Configuration handlers.
341 */
dddfb478
ID		 342
343/*
344 * rt2500usb does not differentiate between shared and pairwise
345 * keys, so we should use the same function for both key types.
346 */
347static int rt2500usb_config_key(struct rt2x00_dev *rt2x00dev,
348 struct rt2x00lib_crypto *crypto,
349 struct ieee80211_key_conf *key)
350{
351 int timeout;
352 u32 mask;
353 u16 reg;
354
355 if (crypto->cmd == SET_KEY) {
356 /*
357 * Pairwise key will always be entry 0, but this
358 * could collide with a shared key on the same
359 * position...
360 */
361 mask = TXRX_CSR0_KEY_ID.bit_mask;
362
363 rt2500usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
364 reg &= mask;
365
366 if (reg && reg == mask)
367 return -ENOSPC;
368
369 reg = rt2x00_get_field16(reg, TXRX_CSR0_KEY_ID);
370
371 key->hw_key_idx += reg ? ffz(reg) : 0;
372
373 /*
374 * The encryption key doesn't fit within the CSR cache,
375 * this means we should allocate it seperately and use
376 * rt2x00usb_vendor_request() to send the key to the hardware.
377 */
378 reg = KEY_ENTRY(key->hw_key_idx);
379 timeout = REGISTER_TIMEOUT32(sizeof(crypto->key));
380 rt2x00usb_vendor_request_large_buff(rt2x00dev, USB_MULTI_WRITE,
381 USB_VENDOR_REQUEST_OUT, reg,
382 crypto->key,
383 sizeof(crypto->key),
384 timeout);
385
386 /*
387 * The driver does not support the IV/EIV generation
f3d340c1
ID		 388 * in hardware. However it demands the data to be provided
389 * both seperately as well as inside the frame.
390 * We already provided the CONFIG_CRYPTO_COPY_IV to rt2x00lib
391 * to ensure rt2x00lib will not strip the data from the
392 * frame after the copy, now we must tell mac80211
dddfb478
ID		 393 * to generate the IV/EIV data.
394 */
395 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
396 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
397 }
398
399 /*
400 * TXRX_CSR0_KEY_ID contains only single-bit fields to indicate
401 * a particular key is valid.
402 */
403 rt2500usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
404 rt2x00_set_field16(&reg, TXRX_CSR0_ALGORITHM, crypto->cipher);
405 rt2x00_set_field16(&reg, TXRX_CSR0_IV_OFFSET, IEEE80211_HEADER);
406
407 mask = rt2x00_get_field16(reg, TXRX_CSR0_KEY_ID);
408 if (crypto->cmd == SET_KEY)
409 mask |= 1 << key->hw_key_idx;
410 else if (crypto->cmd == DISABLE_KEY)
411 mask &= ~(1 << key->hw_key_idx);
412 rt2x00_set_field16(&reg, TXRX_CSR0_KEY_ID, mask);
413 rt2500usb_register_write(rt2x00dev, TXRX_CSR0, reg);
414
415 return 0;
416}
417
3a643d24
ID		 418static void rt2500usb_config_filter(struct rt2x00_dev *rt2x00dev,
419 const unsigned int filter_flags)
420{
421 u16 reg;
422
423 /*
424 * Start configuration steps.
425 * Note that the version error will always be dropped
426 * and broadcast frames will always be accepted since
427 * there is no filter for it at this time.
428 */
429 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
430 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_CRC,
431 !(filter_flags & FIF_FCSFAIL));
432 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_PHYSICAL,
433 !(filter_flags & FIF_PLCPFAIL));
434 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_CONTROL,
435 !(filter_flags & FIF_CONTROL));
436 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_NOT_TO_ME,
437 !(filter_flags & FIF_PROMISC_IN_BSS));
438 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_TODS,
e0b005fa
ID		 439 !(filter_flags & FIF_PROMISC_IN_BSS) &&
440 !rt2x00dev->intf_ap_count);
3a643d24
ID		 441 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_VERSION_ERROR, 1);
442 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_MULTICAST,
443 !(filter_flags & FIF_ALLMULTI));
444 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_BROADCAST, 0);
445 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
446}
447
6bb40dd1
ID		 448static void rt2500usb_config_intf(struct rt2x00_dev *rt2x00dev,
449 struct rt2x00_intf *intf,
450 struct rt2x00intf_conf *conf,
451 const unsigned int flags)
95ea3627 452{
6bb40dd1 453 unsigned int bcn_preload;
95ea3627
ID		 454 u16 reg;
455
6bb40dd1 456 if (flags & CONFIG_UPDATE_TYPE) {
6bb40dd1
ID		 457 /*
458 * Enable beacon config
459 */
bad13639 460 bcn_preload = PREAMBLE + GET_DURATION(IEEE80211_HEADER, 20);
6bb40dd1
ID		 461 rt2500usb_register_read(rt2x00dev, TXRX_CSR20, &reg);
462 rt2x00_set_field16(&reg, TXRX_CSR20_OFFSET, bcn_preload >> 6);
463 rt2x00_set_field16(&reg, TXRX_CSR20_BCN_EXPECT_WINDOW,
05c914fe 464 2 * (conf->type != NL80211_IFTYPE_STATION));
6bb40dd1 465 rt2500usb_register_write(rt2x00dev, TXRX_CSR20, reg);
95ea3627 466
6bb40dd1
ID		 467 /*
468 * Enable synchronisation.
469 */
470 rt2500usb_register_read(rt2x00dev, TXRX_CSR18, &reg);
471 rt2x00_set_field16(&reg, TXRX_CSR18_OFFSET, 0);
472 rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg);
473
474 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
fd3c91c5 475 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 1);
6bb40dd1 476 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_SYNC, conf->sync);
fd3c91c5 477 rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 1);
6bb40dd1
ID		 478 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
479 }
95ea3627 480
6bb40dd1
ID		 481 if (flags & CONFIG_UPDATE_MAC)
482 rt2500usb_register_multiwrite(rt2x00dev, MAC_CSR2, conf->mac,
483 (3 * sizeof(__le16)));
484
485 if (flags & CONFIG_UPDATE_BSSID)
486 rt2500usb_register_multiwrite(rt2x00dev, MAC_CSR5, conf->bssid,
487 (3 * sizeof(__le16)));
95ea3627
ID		 488}
489
3a643d24
ID		 490static void rt2500usb_config_erp(struct rt2x00_dev *rt2x00dev,
491 struct rt2x00lib_erp *erp)
95ea3627 492{
95ea3627 493 u16 reg;
95ea3627 494
95ea3627 495 rt2500usb_register_read(rt2x00dev, TXRX_CSR1, &reg);
72810379 496 rt2x00_set_field16(&reg, TXRX_CSR1_ACK_TIMEOUT, erp->ack_timeout);
95ea3627
ID		 497 rt2500usb_register_write(rt2x00dev, TXRX_CSR1, reg);
498
499 rt2500usb_register_read(rt2x00dev, TXRX_CSR10, &reg);
4f5af6eb 500 rt2x00_set_field16(&reg, TXRX_CSR10_AUTORESPOND_PREAMBLE,
72810379 501 !!erp->short_preamble);
95ea3627 502 rt2500usb_register_write(rt2x00dev, TXRX_CSR10, reg);
95ea3627 503
e4ea1c40 504 rt2500usb_register_write(rt2x00dev, TXRX_CSR11, erp->basic_rates);
95ea3627 505
8a566afe
ID		 506 rt2500usb_register_read(rt2x00dev, TXRX_CSR18, &reg);
507 rt2x00_set_field16(&reg, TXRX_CSR18_INTERVAL, erp->beacon_int * 4);
508 rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg);
509
e4ea1c40
ID		 510 rt2500usb_register_write(rt2x00dev, MAC_CSR10, erp->slot_time);
511 rt2500usb_register_write(rt2x00dev, MAC_CSR11, erp->sifs);
512 rt2500usb_register_write(rt2x00dev, MAC_CSR12, erp->eifs);
95ea3627
ID		 513}
514
e4ea1c40
ID		 515static void rt2500usb_config_ant(struct rt2x00_dev *rt2x00dev,
516 struct antenna_setup *ant)
95ea3627
ID		 517{
518 u8 r2;
519 u8 r14;
520 u16 csr5;
521 u16 csr6;
522
a4fe07d9
ID		 523 /*
524 * We should never come here because rt2x00lib is supposed
525 * to catch this and send us the correct antenna explicitely.
526 */
527 BUG_ON(ant->rx == ANTENNA_SW_DIVERSITY ||
528 ant->tx == ANTENNA_SW_DIVERSITY);
529
95ea3627
ID		 530 rt2500usb_bbp_read(rt2x00dev, 2, &r2);
531 rt2500usb_bbp_read(rt2x00dev, 14, &r14);
532 rt2500usb_register_read(rt2x00dev, PHY_CSR5, &csr5);
533 rt2500usb_register_read(rt2x00dev, PHY_CSR6, &csr6);
534
535 /*
536 * Configure the TX antenna.
537 */
addc81bd 538 switch (ant->tx) {
95ea3627
ID		 539 case ANTENNA_HW_DIVERSITY:
540 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 1);
541 rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 1);
542 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 1);
543 break;
544 case ANTENNA_A:
545 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 0);
546 rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 0);
547 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 0);
548 break;
549 case ANTENNA_B:
a4fe07d9 550 default:
95ea3627
ID		 551 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 2);
552 rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 2);
553 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 2);
554 break;
555 }
556
557 /*
558 * Configure the RX antenna.
559 */
addc81bd 560 switch (ant->rx) {
95ea3627
ID		 561 case ANTENNA_HW_DIVERSITY:
562 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 1);
563 break;
564 case ANTENNA_A:
565 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 0);
566 break;
567 case ANTENNA_B:
a4fe07d9 568 default:
95ea3627
ID		 569 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 2);
570 break;
571 }
572
573 /*
574 * RT2525E and RT5222 need to flip TX I/Q
575 */
576 if (rt2x00_rf(&rt2x00dev->chip, RF2525E) ||
577 rt2x00_rf(&rt2x00dev->chip, RF5222)) {
578 rt2x00_set_field8(&r2, BBP_R2_TX_IQ_FLIP, 1);
579 rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 1);
580 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 1);
581
582 /*
583 * RT2525E does not need RX I/Q Flip.
584 */
585 if (rt2x00_rf(&rt2x00dev->chip, RF2525E))
586 rt2x00_set_field8(&r14, BBP_R14_RX_IQ_FLIP, 0);
587 } else {
588 rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 0);
589 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 0);
590 }
591
592 rt2500usb_bbp_write(rt2x00dev, 2, r2);
593 rt2500usb_bbp_write(rt2x00dev, 14, r14);
594 rt2500usb_register_write(rt2x00dev, PHY_CSR5, csr5);
595 rt2500usb_register_write(rt2x00dev, PHY_CSR6, csr6);
596}
597
e4ea1c40
ID		 598static void rt2500usb_config_channel(struct rt2x00_dev *rt2x00dev,
599 struct rf_channel *rf, const int txpower)
600{
601 /*
602 * Set TXpower.
603 */
604 rt2x00_set_field32(&rf->rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
605
606 /*
607 * For RT2525E we should first set the channel to half band higher.
608 */
609 if (rt2x00_rf(&rt2x00dev->chip, RF2525E)) {
610 static const u32 vals[] = {
611 0x000008aa, 0x000008ae, 0x000008ae, 0x000008b2,
612 0x000008b2, 0x000008b6, 0x000008b6, 0x000008ba,
613 0x000008ba, 0x000008be, 0x000008b7, 0x00000902,
614 0x00000902, 0x00000906
615 };
616
617 rt2500usb_rf_write(rt2x00dev, 2, vals[rf->channel - 1]);
618 if (rf->rf4)
619 rt2500usb_rf_write(rt2x00dev, 4, rf->rf4);
620 }
621
622 rt2500usb_rf_write(rt2x00dev, 1, rf->rf1);
623 rt2500usb_rf_write(rt2x00dev, 2, rf->rf2);
624 rt2500usb_rf_write(rt2x00dev, 3, rf->rf3);
625 if (rf->rf4)
626 rt2500usb_rf_write(rt2x00dev, 4, rf->rf4);
627}
628
629static void rt2500usb_config_txpower(struct rt2x00_dev *rt2x00dev,
630 const int txpower)
631{
632 u32 rf3;
633
634 rt2x00_rf_read(rt2x00dev, 3, &rf3);
635 rt2x00_set_field32(&rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
636 rt2500usb_rf_write(rt2x00dev, 3, rf3);
637}
638
7d7f19cc
ID		 639static void rt2500usb_config_ps(struct rt2x00_dev *rt2x00dev,
640 struct rt2x00lib_conf *libconf)
641{
642 enum dev_state state =
643 (libconf->conf->flags & IEEE80211_CONF_PS) ?
644 STATE_SLEEP : STATE_AWAKE;
645 u16 reg;
646
647 if (state == STATE_SLEEP) {
648 rt2500usb_register_read(rt2x00dev, MAC_CSR18, &reg);
649 rt2x00_set_field16(&reg, MAC_CSR18_DELAY_AFTER_BEACON,
6b347bff 650 rt2x00dev->beacon_int - 20);
7d7f19cc
ID		 651 rt2x00_set_field16(&reg, MAC_CSR18_BEACONS_BEFORE_WAKEUP,
652 libconf->conf->listen_interval - 1);
653
654 /* We must first disable autowake before it can be enabled */
655 rt2x00_set_field16(&reg, MAC_CSR18_AUTO_WAKE, 0);
656 rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
657
658 rt2x00_set_field16(&reg, MAC_CSR18_AUTO_WAKE, 1);
659 rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
660 }
661
662 rt2x00dev->ops->lib->set_device_state(rt2x00dev, state);
663}
664
95ea3627 665static void rt2500usb_config(struct rt2x00_dev *rt2x00dev,
6bb40dd1
ID		 666 struct rt2x00lib_conf *libconf,
667 const unsigned int flags)
95ea3627 668{
e4ea1c40 669 if (flags & IEEE80211_CONF_CHANGE_CHANNEL)
5c58ee51
ID		 670 rt2500usb_config_channel(rt2x00dev, &libconf->rf,
671 libconf->conf->power_level);
e4ea1c40
ID		 672 if ((flags & IEEE80211_CONF_CHANGE_POWER) &&
673 !(flags & IEEE80211_CONF_CHANGE_CHANNEL))
5c58ee51
ID		 674 rt2500usb_config_txpower(rt2x00dev,
675 libconf->conf->power_level);
7d7f19cc
ID		 676 if (flags & IEEE80211_CONF_CHANGE_PS)
677 rt2500usb_config_ps(rt2x00dev, libconf);
95ea3627
ID		 678}
679
95ea3627
ID		 680/*
681 * Link tuning
682 */
ebcf26da
ID		 683static void rt2500usb_link_stats(struct rt2x00_dev *rt2x00dev,
684 struct link_qual *qual)
95ea3627
ID		 685{
686 u16 reg;
687
688 /*
689 * Update FCS error count from register.
690 */
691 rt2500usb_register_read(rt2x00dev, STA_CSR0, &reg);
ebcf26da 692 qual->rx_failed = rt2x00_get_field16(reg, STA_CSR0_FCS_ERROR);
95ea3627
ID		 693
694 /*
695 * Update False CCA count from register.
696 */
697 rt2500usb_register_read(rt2x00dev, STA_CSR3, &reg);
ebcf26da 698 qual->false_cca = rt2x00_get_field16(reg, STA_CSR3_FALSE_CCA_ERROR);
95ea3627
ID		 699}
700
5352ff65
ID		 701static void rt2500usb_reset_tuner(struct rt2x00_dev *rt2x00dev,
702 struct link_qual *qual)
95ea3627
ID		 703{
704 u16 eeprom;
705 u16 value;
706
707 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &eeprom);
708 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R24_LOW);
709 rt2500usb_bbp_write(rt2x00dev, 24, value);
710
711 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &eeprom);
712 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R25_LOW);
713 rt2500usb_bbp_write(rt2x00dev, 25, value);
714
715 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &eeprom);
716 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R61_LOW);
717 rt2500usb_bbp_write(rt2x00dev, 61, value);
718
719 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &eeprom);
720 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_VGCUPPER);
721 rt2500usb_bbp_write(rt2x00dev, 17, value);
722
5352ff65 723 qual->vgc_level = value;
95ea3627
ID		 724}
725
d06193f3
ID		 726/*
727 * NOTE: This function is directly ported from legacy driver, but
728 * despite it being declared it was never called. Although link tuning
729 * sounds like a good idea, and usually works well for the other drivers,
730 * it does _not_ work with rt2500usb. Enabling this function will result
731 * in TX capabilities only until association kicks in. Immediately
732 * after the successful association all TX frames will be kept in the
733 * hardware queue and never transmitted.
734 */
735#if 0
95ea3627
ID		 736static void rt2500usb_link_tuner(struct rt2x00_dev *rt2x00dev)
737{
738 int rssi = rt2x00_get_link_rssi(&rt2x00dev->link);
739 u16 bbp_thresh;
740 u16 vgc_bound;
741 u16 sens;
742 u16 r24;
743 u16 r25;
744 u16 r61;
745 u16 r17_sens;
746 u8 r17;
747 u8 up_bound;
748 u8 low_bound;
749
6bb40dd1
ID		 750 /*
751 * Read current r17 value, as well as the sensitivity values
752 * for the r17 register.
753 */
754 rt2500usb_bbp_read(rt2x00dev, 17, &r17);
755 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R17, &r17_sens);
756
757 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &vgc_bound);
758 up_bound = rt2x00_get_field16(vgc_bound, EEPROM_BBPTUNE_VGCUPPER);
759 low_bound = rt2x00_get_field16(vgc_bound, EEPROM_BBPTUNE_VGCLOWER);
760
761 /*
762 * If we are not associated, we should go straight to the
763 * dynamic CCA tuning.
764 */
765 if (!rt2x00dev->intf_associated)
766 goto dynamic_cca_tune;
767
95ea3627
ID		 768 /*
769 * Determine the BBP tuning threshold and correctly
770 * set BBP 24, 25 and 61.
771 */
772 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE, &bbp_thresh);
773 bbp_thresh = rt2x00_get_field16(bbp_thresh, EEPROM_BBPTUNE_THRESHOLD);
774
775 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &r24);
776 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &r25);
777 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &r61);
778
779 if ((rssi + bbp_thresh) > 0) {
780 r24 = rt2x00_get_field16(r24, EEPROM_BBPTUNE_R24_HIGH);
781 r25 = rt2x00_get_field16(r25, EEPROM_BBPTUNE_R25_HIGH);
782 r61 = rt2x00_get_field16(r61, EEPROM_BBPTUNE_R61_HIGH);
783 } else {
784 r24 = rt2x00_get_field16(r24, EEPROM_BBPTUNE_R24_LOW);
785 r25 = rt2x00_get_field16(r25, EEPROM_BBPTUNE_R25_LOW);
786 r61 = rt2x00_get_field16(r61, EEPROM_BBPTUNE_R61_LOW);
787 }
788
789 rt2500usb_bbp_write(rt2x00dev, 24, r24);
790 rt2500usb_bbp_write(rt2x00dev, 25, r25);
791 rt2500usb_bbp_write(rt2x00dev, 61, r61);
792
95ea3627
ID		 793 /*
794 * A too low RSSI will cause too much false CCA which will
795 * then corrupt the R17 tuning. To remidy this the tuning should
796 * be stopped (While making sure the R17 value will not exceed limits)
797 */
798 if (rssi >= -40) {
799 if (r17 != 0x60)
800 rt2500usb_bbp_write(rt2x00dev, 17, 0x60);
801 return;
802 }
803
804 /*
805 * Special big-R17 for short distance
806 */
807 if (rssi >= -58) {
808 sens = rt2x00_get_field16(r17_sens, EEPROM_BBPTUNE_R17_LOW);
809 if (r17 != sens)
810 rt2500usb_bbp_write(rt2x00dev, 17, sens);
811 return;
812 }
813
814 /*
815 * Special mid-R17 for middle distance
816 */
817 if (rssi >= -74) {
818 sens = rt2x00_get_field16(r17_sens, EEPROM_BBPTUNE_R17_HIGH);
819 if (r17 != sens)
820 rt2500usb_bbp_write(rt2x00dev, 17, sens);
821 return;
822 }
823
824 /*
825 * Leave short or middle distance condition, restore r17
826 * to the dynamic tuning range.
827 */
95ea3627 828 low_bound = 0x32;
6bb40dd1
ID		 829 if (rssi < -77)
830 up_bound -= (-77 - rssi);
95ea3627
ID		 831
832 if (up_bound < low_bound)
833 up_bound = low_bound;
834
835 if (r17 > up_bound) {
836 rt2500usb_bbp_write(rt2x00dev, 17, up_bound);
837 rt2x00dev->link.vgc_level = up_bound;
6bb40dd1
ID		 838 return;
839 }
840
841dynamic_cca_tune:
842
843 /*
844 * R17 is inside the dynamic tuning range,
845 * start tuning the link based on the false cca counter.
846 */
847 if (rt2x00dev->link.qual.false_cca > 512 && r17 < up_bound) {
95ea3627
ID		 848 rt2500usb_bbp_write(rt2x00dev, 17, ++r17);
849 rt2x00dev->link.vgc_level = r17;
ebcf26da 850 } else if (rt2x00dev->link.qual.false_cca < 100 && r17 > low_bound) {
95ea3627
ID		 851 rt2500usb_bbp_write(rt2x00dev, 17, --r17);
852 rt2x00dev->link.vgc_level = r17;
853 }
854}
d06193f3
ID		 855#else
856#define rt2500usb_link_tuner NULL
857#endif
95ea3627
ID		 858
859/*
860 * Initialization functions.
861 */
862static int rt2500usb_init_registers(struct rt2x00_dev *rt2x00dev)
863{
864 u16 reg;
865
866 rt2x00usb_vendor_request_sw(rt2x00dev, USB_DEVICE_MODE, 0x0001,
867 USB_MODE_TEST, REGISTER_TIMEOUT);
868 rt2x00usb_vendor_request_sw(rt2x00dev, USB_SINGLE_WRITE, 0x0308,
869 0x00f0, REGISTER_TIMEOUT);
870
871 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
872 rt2x00_set_field16(&reg, TXRX_CSR2_DISABLE_RX, 1);
873 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
874
875 rt2500usb_register_write(rt2x00dev, MAC_CSR13, 0x1111);
876 rt2500usb_register_write(rt2x00dev, MAC_CSR14, 0x1e11);
877
878 rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
879 rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 1);
880 rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 1);
881 rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 0);
882 rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
883
884 rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
885 rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 0);
886 rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 0);
887 rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 0);
888 rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
889
890 rt2500usb_register_read(rt2x00dev, TXRX_CSR5, &reg);
891 rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID0, 13);
892 rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID0_VALID, 1);
893 rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID1, 12);
894 rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID1_VALID, 1);
895 rt2500usb_register_write(rt2x00dev, TXRX_CSR5, reg);
896
897 rt2500usb_register_read(rt2x00dev, TXRX_CSR6, &reg);
898 rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID0, 10);
899 rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID0_VALID, 1);
900 rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID1, 11);
901 rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID1_VALID, 1);
902 rt2500usb_register_write(rt2x00dev, TXRX_CSR6, reg);
903
904 rt2500usb_register_read(rt2x00dev, TXRX_CSR7, &reg);
905 rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID0, 7);
906 rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID0_VALID, 1);
907 rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID1, 6);
908 rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID1_VALID, 1);
909 rt2500usb_register_write(rt2x00dev, TXRX_CSR7, reg);
910
911 rt2500usb_register_read(rt2x00dev, TXRX_CSR8, &reg);
912 rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID0, 5);
913 rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID0_VALID, 1);
914 rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID1, 0);
915 rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID1_VALID, 0);
916 rt2500usb_register_write(rt2x00dev, TXRX_CSR8, reg);
917
1f909162
ID		 918 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
919 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 0);
920 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_SYNC, 0);
921 rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 0);
922 rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 0);
923 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
924
95ea3627
ID		 925 rt2500usb_register_write(rt2x00dev, TXRX_CSR21, 0xe78f);
926 rt2500usb_register_write(rt2x00dev, MAC_CSR9, 0xff1d);
927
928 if (rt2x00dev->ops->lib->set_device_state(rt2x00dev, STATE_AWAKE))
929 return -EBUSY;
930
931 rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
932 rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 0);
933 rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 0);
934 rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 1);
935 rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
936
755a957d 937 if (rt2x00_rev(&rt2x00dev->chip) >= RT2570_VERSION_C) {
95ea3627 938 rt2500usb_register_read(rt2x00dev, PHY_CSR2, &reg);
ddc827f9 939 rt2x00_set_field16(&reg, PHY_CSR2_LNA, 0);
95ea3627 940 } else {
ddc827f9
ID		 941 reg = 0;
942 rt2x00_set_field16(&reg, PHY_CSR2_LNA, 1);
943 rt2x00_set_field16(&reg, PHY_CSR2_LNA_MODE, 3);
95ea3627
ID		 944 }
945 rt2500usb_register_write(rt2x00dev, PHY_CSR2, reg);
946
947 rt2500usb_register_write(rt2x00dev, MAC_CSR11, 0x0002);
948 rt2500usb_register_write(rt2x00dev, MAC_CSR22, 0x0053);
949 rt2500usb_register_write(rt2x00dev, MAC_CSR15, 0x01ee);
950 rt2500usb_register_write(rt2x00dev, MAC_CSR16, 0x0000);
951
952 rt2500usb_register_read(rt2x00dev, MAC_CSR8, &reg);
953 rt2x00_set_field16(&reg, MAC_CSR8_MAX_FRAME_UNIT,
954 rt2x00dev->rx->data_size);
955 rt2500usb_register_write(rt2x00dev, MAC_CSR8, reg);
956
957 rt2500usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
958 rt2x00_set_field16(&reg, TXRX_CSR0_IV_OFFSET, IEEE80211_HEADER);
dddfb478 959 rt2x00_set_field16(&reg, TXRX_CSR0_KEY_ID, 0);
95ea3627
ID		 960 rt2500usb_register_write(rt2x00dev, TXRX_CSR0, reg);
961
962 rt2500usb_register_read(rt2x00dev, MAC_CSR18, &reg);
963 rt2x00_set_field16(&reg, MAC_CSR18_DELAY_AFTER_BEACON, 90);
964 rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
965
966 rt2500usb_register_read(rt2x00dev, PHY_CSR4, &reg);
967 rt2x00_set_field16(&reg, PHY_CSR4_LOW_RF_LE, 1);
968 rt2500usb_register_write(rt2x00dev, PHY_CSR4, reg);
969
970 rt2500usb_register_read(rt2x00dev, TXRX_CSR1, &reg);
971 rt2x00_set_field16(&reg, TXRX_CSR1_AUTO_SEQUENCE, 1);
972 rt2500usb_register_write(rt2x00dev, TXRX_CSR1, reg);
973
974 return 0;
975}
976
2b08da3f 977static int rt2500usb_wait_bbp_ready(struct rt2x00_dev *rt2x00dev)
95ea3627
ID		 978{
979 unsigned int i;
95ea3627 980 u8 value;
95ea3627
ID		 981
982 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
983 rt2500usb_bbp_read(rt2x00dev, 0, &value);
984 if ((value != 0xff) && (value != 0x00))
2b08da3f 985 return 0;
95ea3627
ID		 986 udelay(REGISTER_BUSY_DELAY);
987 }
988
989 ERROR(rt2x00dev, "BBP register access failed, aborting.\n");
990 return -EACCES;
2b08da3f
ID		 991}
992
993static int rt2500usb_init_bbp(struct rt2x00_dev *rt2x00dev)
994{
995 unsigned int i;
996 u16 eeprom;
997 u8 value;
998 u8 reg_id;
999
1000 if (unlikely(rt2500usb_wait_bbp_ready(rt2x00dev)))
1001 return -EACCES;
95ea3627 1002
95ea3627
ID		 1003 rt2500usb_bbp_write(rt2x00dev, 3, 0x02);
1004 rt2500usb_bbp_write(rt2x00dev, 4, 0x19);
1005 rt2500usb_bbp_write(rt2x00dev, 14, 0x1c);
1006 rt2500usb_bbp_write(rt2x00dev, 15, 0x30);
1007 rt2500usb_bbp_write(rt2x00dev, 16, 0xac);
1008 rt2500usb_bbp_write(rt2x00dev, 18, 0x18);
1009 rt2500usb_bbp_write(rt2x00dev, 19, 0xff);
1010 rt2500usb_bbp_write(rt2x00dev, 20, 0x1e);
1011 rt2500usb_bbp_write(rt2x00dev, 21, 0x08);
1012 rt2500usb_bbp_write(rt2x00dev, 22, 0x08);
1013 rt2500usb_bbp_write(rt2x00dev, 23, 0x08);
1014 rt2500usb_bbp_write(rt2x00dev, 24, 0x80);
1015 rt2500usb_bbp_write(rt2x00dev, 25, 0x50);
1016 rt2500usb_bbp_write(rt2x00dev, 26, 0x08);
1017 rt2500usb_bbp_write(rt2x00dev, 27, 0x23);
1018 rt2500usb_bbp_write(rt2x00dev, 30, 0x10);
1019 rt2500usb_bbp_write(rt2x00dev, 31, 0x2b);
1020 rt2500usb_bbp_write(rt2x00dev, 32, 0xb9);
1021 rt2500usb_bbp_write(rt2x00dev, 34, 0x12);
1022 rt2500usb_bbp_write(rt2x00dev, 35, 0x50);
1023 rt2500usb_bbp_write(rt2x00dev, 39, 0xc4);
1024 rt2500usb_bbp_write(rt2x00dev, 40, 0x02);
1025 rt2500usb_bbp_write(rt2x00dev, 41, 0x60);
1026 rt2500usb_bbp_write(rt2x00dev, 53, 0x10);
1027 rt2500usb_bbp_write(rt2x00dev, 54, 0x18);
1028 rt2500usb_bbp_write(rt2x00dev, 56, 0x08);
1029 rt2500usb_bbp_write(rt2x00dev, 57, 0x10);
1030 rt2500usb_bbp_write(rt2x00dev, 58, 0x08);
1031 rt2500usb_bbp_write(rt2x00dev, 61, 0x60);
1032 rt2500usb_bbp_write(rt2x00dev, 62, 0x10);
1033 rt2500usb_bbp_write(rt2x00dev, 75, 0xff);
1034
95ea3627
ID		 1035 for (i = 0; i < EEPROM_BBP_SIZE; i++) {
1036 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBP_START + i, &eeprom);
1037
1038 if (eeprom != 0xffff && eeprom != 0x0000) {
1039 reg_id = rt2x00_get_field16(eeprom, EEPROM_BBP_REG_ID);
1040 value = rt2x00_get_field16(eeprom, EEPROM_BBP_VALUE);
95ea3627
ID		 1041 rt2500usb_bbp_write(rt2x00dev, reg_id, value);
1042 }
1043 }
95ea3627
ID		 1044
1045 return 0;
1046}
1047
1048/*
1049 * Device state switch handlers.
1050 */
1051static void rt2500usb_toggle_rx(struct rt2x00_dev *rt2x00dev,
1052 enum dev_state state)
1053{
1054 u16 reg;
1055
1056 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
1057 rt2x00_set_field16(&reg, TXRX_CSR2_DISABLE_RX,
2b08da3f
ID		 1058 (state == STATE_RADIO_RX_OFF) ||
1059 (state == STATE_RADIO_RX_OFF_LINK));
95ea3627
ID		 1060 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
1061}
1062
1063static int rt2500usb_enable_radio(struct rt2x00_dev *rt2x00dev)
1064{
1065 /*
1066 * Initialize all registers.
1067 */
2b08da3f
ID		 1068 if (unlikely(rt2500usb_init_registers(rt2x00dev) ||
1069 rt2500usb_init_bbp(rt2x00dev)))
95ea3627 1070 return -EIO;
95ea3627 1071
95ea3627
ID		 1072 return 0;
1073}
1074
1075static void rt2500usb_disable_radio(struct rt2x00_dev *rt2x00dev)
1076{
95ea3627
ID		 1077 rt2500usb_register_write(rt2x00dev, MAC_CSR13, 0x2121);
1078 rt2500usb_register_write(rt2x00dev, MAC_CSR14, 0x2121);
1079
1080 /*
1081 * Disable synchronisation.
1082 */
1083 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
1084
1085 rt2x00usb_disable_radio(rt2x00dev);
1086}
1087
1088static int rt2500usb_set_state(struct rt2x00_dev *rt2x00dev,
1089 enum dev_state state)
1090{
1091 u16 reg;
1092 u16 reg2;
1093 unsigned int i;
1094 char put_to_sleep;
1095 char bbp_state;
1096 char rf_state;
1097
1098 put_to_sleep = (state != STATE_AWAKE);
1099
1100 reg = 0;
1101 rt2x00_set_field16(&reg, MAC_CSR17_BBP_DESIRE_STATE, state);
1102 rt2x00_set_field16(&reg, MAC_CSR17_RF_DESIRE_STATE, state);
1103 rt2x00_set_field16(&reg, MAC_CSR17_PUT_TO_SLEEP, put_to_sleep);
1104 rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
1105 rt2x00_set_field16(&reg, MAC_CSR17_SET_STATE, 1);
1106 rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
1107
1108 /*
1109 * Device is not guaranteed to be in the requested state yet.
1110 * We must wait until the register indicates that the
1111 * device has entered the correct state.
1112 */
1113 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
1114 rt2500usb_register_read(rt2x00dev, MAC_CSR17, &reg2);
1115 bbp_state = rt2x00_get_field16(reg2, MAC_CSR17_BBP_CURR_STATE);
1116 rf_state = rt2x00_get_field16(reg2, MAC_CSR17_RF_CURR_STATE);
1117 if (bbp_state == state && rf_state == state)
1118 return 0;
1119 rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
1120 msleep(30);
1121 }
1122
95ea3627
ID		 1123 return -EBUSY;
1124}
1125
1126static int rt2500usb_set_device_state(struct rt2x00_dev *rt2x00dev,
1127 enum dev_state state)
1128{
1129 int retval = 0;
1130
1131 switch (state) {
1132 case STATE_RADIO_ON:
1133 retval = rt2500usb_enable_radio(rt2x00dev);
1134 break;
1135 case STATE_RADIO_OFF:
1136 rt2500usb_disable_radio(rt2x00dev);
1137 break;
1138 case STATE_RADIO_RX_ON:
61667d8d 1139 case STATE_RADIO_RX_ON_LINK:
95ea3627 1140 case STATE_RADIO_RX_OFF:
61667d8d 1141 case STATE_RADIO_RX_OFF_LINK:
2b08da3f
ID		 1142 rt2500usb_toggle_rx(rt2x00dev, state);
1143 break;
1144 case STATE_RADIO_IRQ_ON:
1145 case STATE_RADIO_IRQ_OFF:
1146 /* No support, but no error either */
95ea3627
ID		 1147 break;
1148 case STATE_DEEP_SLEEP:
1149 case STATE_SLEEP:
1150 case STATE_STANDBY:
1151 case STATE_AWAKE:
1152 retval = rt2500usb_set_state(rt2x00dev, state);
1153 break;
1154 default:
1155 retval = -ENOTSUPP;
1156 break;
1157 }
1158
2b08da3f
ID		 1159 if (unlikely(retval))
1160 ERROR(rt2x00dev, "Device failed to enter state %d (%d).\n",
1161 state, retval);
1162
95ea3627
ID		 1163 return retval;
1164}
1165
1166/*
1167 * TX descriptor initialization
1168 */
1169static void rt2500usb_write_tx_desc(struct rt2x00_dev *rt2x00dev,
dd3193e1 1170 struct sk_buff *skb,
61486e0f 1171 struct txentry_desc *txdesc)
95ea3627 1172{
181d6902 1173 struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb);
dd3193e1 1174 __le32 *txd = skbdesc->desc;
95ea3627
ID		 1175 u32 word;
1176
1177 /*
1178 * Start writing the descriptor words.
1179 */
1180 rt2x00_desc_read(txd, 1, &word);
dddfb478 1181 rt2x00_set_field32(&word, TXD_W1_IV_OFFSET, txdesc->iv_offset);
181d6902
ID		 1182 rt2x00_set_field32(&word, TXD_W1_AIFS, txdesc->aifs);
1183 rt2x00_set_field32(&word, TXD_W1_CWMIN, txdesc->cw_min);
1184 rt2x00_set_field32(&word, TXD_W1_CWMAX, txdesc->cw_max);
95ea3627
ID		 1185 rt2x00_desc_write(txd, 1, word);
1186
1187 rt2x00_desc_read(txd, 2, &word);
181d6902
ID		 1188 rt2x00_set_field32(&word, TXD_W2_PLCP_SIGNAL, txdesc->signal);
1189 rt2x00_set_field32(&word, TXD_W2_PLCP_SERVICE, txdesc->service);
1190 rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_LOW, txdesc->length_low);
1191 rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_HIGH, txdesc->length_high);
95ea3627
ID		 1192 rt2x00_desc_write(txd, 2, word);
1193
dddfb478
ID		 1194 if (test_bit(ENTRY_TXD_ENCRYPT, &txdesc->flags)) {
1195 _rt2x00_desc_write(txd, 3, skbdesc->iv[0]);
1196 _rt2x00_desc_write(txd, 4, skbdesc->iv[1]);
1197 }
1198
95ea3627 1199 rt2x00_desc_read(txd, 0, &word);
61486e0f 1200 rt2x00_set_field32(&word, TXD_W0_RETRY_LIMIT, txdesc->retry_limit);
95ea3627 1201 rt2x00_set_field32(&word, TXD_W0_MORE_FRAG,
181d6902 1202 test_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags));
95ea3627 1203 rt2x00_set_field32(&word, TXD_W0_ACK,
181d6902 1204 test_bit(ENTRY_TXD_ACK, &txdesc->flags));
95ea3627 1205 rt2x00_set_field32(&word, TXD_W0_TIMESTAMP,
181d6902 1206 test_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags));
95ea3627 1207 rt2x00_set_field32(&word, TXD_W0_OFDM,
076f9582 1208 (txdesc->rate_mode == RATE_MODE_OFDM));
95ea3627 1209 rt2x00_set_field32(&word, TXD_W0_NEW_SEQ,
61486e0f 1210 test_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags));
181d6902 1211 rt2x00_set_field32(&word, TXD_W0_IFS, txdesc->ifs);
1abc3656 1212 rt2x00_set_field32(&word, TXD_W0_DATABYTE_COUNT, skb->len);
f1dd2b23 1213 rt2x00_set_field32(&word, TXD_W0_CIPHER, !!txdesc->cipher);
dddfb478 1214 rt2x00_set_field32(&word, TXD_W0_KEY_ID, txdesc->key_idx);
95ea3627
ID		 1215 rt2x00_desc_write(txd, 0, word);
1216}
1217
bd88a781
ID		 1218/*
1219 * TX data initialization
1220 */
1221static void rt2500usb_beacondone(struct urb *urb);
1222
1223static void rt2500usb_write_beacon(struct queue_entry *entry)
1224{
1225 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
1226 struct usb_device *usb_dev = to_usb_device_intf(rt2x00dev->dev);
1227 struct queue_entry_priv_usb_bcn *bcn_priv = entry->priv_data;
1228 struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
f1ca2167 1229 int pipe = usb_sndbulkpipe(usb_dev, entry->queue->usb_endpoint);
bd88a781
ID		 1230 int length;
1231 u16 reg;
1232
1233 /*
1234 * Add the descriptor in front of the skb.
1235 */
1236 skb_push(entry->skb, entry->queue->desc_size);
1237 memcpy(entry->skb->data, skbdesc->desc, skbdesc->desc_len);
1238 skbdesc->desc = entry->skb->data;
1239
1240 /*
1241 * Disable beaconing while we are reloading the beacon data,
1242 * otherwise we might be sending out invalid data.
1243 */
1244 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
1245 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 0);
1246 rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 0);
1247 rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 0);
1248 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1249
1250 /*
1251 * USB devices cannot blindly pass the skb->len as the
1252 * length of the data to usb_fill_bulk_urb. Pass the skb
1253 * to the driver to determine what the length should be.
1254 */
f1ca2167 1255 length = rt2x00dev->ops->lib->get_tx_data_len(entry);
bd88a781
ID		 1256
1257 usb_fill_bulk_urb(bcn_priv->urb, usb_dev, pipe,
1258 entry->skb->data, length, rt2500usb_beacondone,
1259 entry);
1260
1261 /*
1262 * Second we need to create the guardian byte.
1263 * We only need a single byte, so lets recycle
1264 * the 'flags' field we are not using for beacons.
1265 */
1266 bcn_priv->guardian_data = 0;
1267 usb_fill_bulk_urb(bcn_priv->guardian_urb, usb_dev, pipe,
1268 &bcn_priv->guardian_data, 1, rt2500usb_beacondone,
1269 entry);
1270
1271 /*
1272 * Send out the guardian byte.
1273 */
1274 usb_submit_urb(bcn_priv->guardian_urb, GFP_ATOMIC);
1275}
1276
f1ca2167 1277static int rt2500usb_get_tx_data_len(struct queue_entry *entry)
dd9fa2d2
ID		 1278{
1279 int length;
1280
1281 /*
1282 * The length _must_ be a multiple of 2,
1283 * but it must _not_ be a multiple of the USB packet size.
1284 */
f1ca2167
ID		 1285 length = roundup(entry->skb->len, 2);
1286 length += (2 * !(length % entry->queue->usb_maxpacket));
dd9fa2d2
ID		 1287
1288 return length;
1289}
1290
95ea3627 1291static void rt2500usb_kick_tx_queue(struct rt2x00_dev *rt2x00dev,
e58c6aca 1292 const enum data_queue_qid queue)
95ea3627
ID		 1293{
1294 u16 reg;
1295
f019d514
ID		 1296 if (queue != QID_BEACON) {
1297 rt2x00usb_kick_tx_queue(rt2x00dev, queue);
95ea3627 1298 return;
f019d514 1299 }
95ea3627
ID		 1300
1301 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
1302 if (!rt2x00_get_field16(reg, TXRX_CSR19_BEACON_GEN)) {
8af244cc
ID		 1303 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 1);
1304 rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 1);
95ea3627
ID		 1305 rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 1);
1306 /*
1307 * Beacon generation will fail initially.
1308 * To prevent this we need to register the TXRX_CSR19
1309 * register several times.
1310 */
1311 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1312 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
1313 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1314 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
1315 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1316 }
1317}
1318
1319/*
1320 * RX control handlers
1321 */
181d6902
ID		 1322static void rt2500usb_fill_rxdone(struct queue_entry *entry,
1323 struct rxdone_entry_desc *rxdesc)
95ea3627 1324{
dddfb478 1325 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
b8be63ff 1326 struct queue_entry_priv_usb *entry_priv = entry->priv_data;
181d6902
ID		 1327 struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
1328 __le32 *rxd =
1329 (__le32 *)(entry->skb->data +
b8be63ff
ID		 1330 (entry_priv->urb->actual_length -
1331 entry->queue->desc_size));
95ea3627
ID		 1332 u32 word0;
1333 u32 word1;
1334
f855c10b 1335 /*
a26cbc65
GW		 1336 * Copy descriptor to the skbdesc->desc buffer, making it safe from moving of
1337 * frame data in rt2x00usb.
f855c10b 1338 */
a26cbc65 1339 memcpy(skbdesc->desc, rxd, skbdesc->desc_len);
70a96109 1340 rxd = (__le32 *)skbdesc->desc;
f855c10b
ID		 1341
1342 /*
70a96109 1343 * It is now safe to read the descriptor on all architectures.
f855c10b 1344 */
95ea3627
ID		 1345 rt2x00_desc_read(rxd, 0, &word0);
1346 rt2x00_desc_read(rxd, 1, &word1);
1347
4150c572 1348 if (rt2x00_get_field32(word0, RXD_W0_CRC_ERROR))
181d6902 1349 rxdesc->flags |= RX_FLAG_FAILED_FCS_CRC;
4150c572 1350 if (rt2x00_get_field32(word0, RXD_W0_PHYSICAL_ERROR))
181d6902 1351 rxdesc->flags |= RX_FLAG_FAILED_PLCP_CRC;
95ea3627 1352
dddfb478
ID		 1353 if (test_bit(CONFIG_SUPPORT_HW_CRYPTO, &rt2x00dev->flags)) {
1354 rxdesc->cipher = rt2x00_get_field32(word0, RXD_W0_CIPHER);
1355 if (rt2x00_get_field32(word0, RXD_W0_CIPHER_ERROR))
1356 rxdesc->cipher_status = RX_CRYPTO_FAIL_KEY;
1357 }
1358
1359 if (rxdesc->cipher != CIPHER_NONE) {
1360 _rt2x00_desc_read(rxd, 2, &rxdesc->iv[0]);
1361 _rt2x00_desc_read(rxd, 3, &rxdesc->iv[1]);
74415edb
ID		 1362 rxdesc->dev_flags |= RXDONE_CRYPTO_IV;
1363
dddfb478
ID		 1364 /* ICV is located at the end of frame */
1365
f3d340c1 1366 rxdesc->flags |= RX_FLAG_MMIC_STRIPPED;
dddfb478
ID		 1367 if (rxdesc->cipher_status == RX_CRYPTO_SUCCESS)
1368 rxdesc->flags |= RX_FLAG_DECRYPTED;
1369 else if (rxdesc->cipher_status == RX_CRYPTO_FAIL_MIC)
1370 rxdesc->flags |= RX_FLAG_MMIC_ERROR;
1371 }
1372
95ea3627
ID		 1373 /*
1374 * Obtain the status about this packet.
89993890
ID		 1375 * When frame was received with an OFDM bitrate,
1376 * the signal is the PLCP value. If it was received with
1377 * a CCK bitrate the signal is the rate in 100kbit/s.
95ea3627 1378 */
181d6902 1379 rxdesc->signal = rt2x00_get_field32(word1, RXD_W1_SIGNAL);
dddfb478
ID		 1380 rxdesc->rssi =
1381 rt2x00_get_field32(word1, RXD_W1_RSSI) - rt2x00dev->rssi_offset;
181d6902 1382 rxdesc->size = rt2x00_get_field32(word0, RXD_W0_DATABYTE_COUNT);
19d30e02 1383
19d30e02
ID		 1384 if (rt2x00_get_field32(word0, RXD_W0_OFDM))
1385 rxdesc->dev_flags |= RXDONE_SIGNAL_PLCP;
6c6aa3c0
ID		 1386 else
1387 rxdesc->dev_flags |= RXDONE_SIGNAL_BITRATE;
19d30e02
ID		 1388 if (rt2x00_get_field32(word0, RXD_W0_MY_BSS))
1389 rxdesc->dev_flags |= RXDONE_MY_BSS;
7d1de806 1390
2ae23854
MN		 1391 /*
1392 * Adjust the skb memory window to the frame boundaries.
1393 */
2ae23854 1394 skb_trim(entry->skb, rxdesc->size);
95ea3627
ID		 1395}
1396
1397/*
1398 * Interrupt functions.
1399 */
1400static void rt2500usb_beacondone(struct urb *urb)
1401{
181d6902 1402 struct queue_entry *entry = (struct queue_entry *)urb->context;
b8be63ff 1403 struct queue_entry_priv_usb_bcn *bcn_priv = entry->priv_data;
95ea3627 1404
0262ab0d 1405 if (!test_bit(DEVICE_STATE_ENABLED_RADIO, &entry->queue->rt2x00dev->flags))
95ea3627
ID		 1406 return;
1407
1408 /*
1409 * Check if this was the guardian beacon,
1410 * if that was the case we need to send the real beacon now.
1411 * Otherwise we should free the sk_buffer, the device
1412 * should be doing the rest of the work now.
1413 */
b8be63ff
ID		 1414 if (bcn_priv->guardian_urb == urb) {
1415 usb_submit_urb(bcn_priv->urb, GFP_ATOMIC);
1416 } else if (bcn_priv->urb == urb) {
181d6902
ID		 1417 dev_kfree_skb(entry->skb);
1418 entry->skb = NULL;
95ea3627
ID		 1419 }
1420}
1421
1422/*
1423 * Device probe functions.
1424 */
1425static int rt2500usb_validate_eeprom(struct rt2x00_dev *rt2x00dev)
1426{
1427 u16 word;
1428 u8 *mac;
6bb40dd1 1429 u8 bbp;
95ea3627
ID		 1430
1431 rt2x00usb_eeprom_read(rt2x00dev, rt2x00dev->eeprom, EEPROM_SIZE);
1432
1433 /*
1434 * Start validation of the data that has been read.
1435 */
1436 mac = rt2x00_eeprom_addr(rt2x00dev, EEPROM_MAC_ADDR_0);
1437 if (!is_valid_ether_addr(mac)) {
1438 random_ether_addr(mac);
e174961c 1439 EEPROM(rt2x00dev, "MAC: %pM\n", mac);
95ea3627
ID		 1440 }
1441
1442 rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &word);
1443 if (word == 0xffff) {
1444 rt2x00_set_field16(&word, EEPROM_ANTENNA_NUM, 2);
362f3b6b
ID		 1445 rt2x00_set_field16(&word, EEPROM_ANTENNA_TX_DEFAULT,
1446 ANTENNA_SW_DIVERSITY);
1447 rt2x00_set_field16(&word, EEPROM_ANTENNA_RX_DEFAULT,
1448 ANTENNA_SW_DIVERSITY);
1449 rt2x00_set_field16(&word, EEPROM_ANTENNA_LED_MODE,
1450 LED_MODE_DEFAULT);
95ea3627
ID		 1451 rt2x00_set_field16(&word, EEPROM_ANTENNA_DYN_TXAGC, 0);
1452 rt2x00_set_field16(&word, EEPROM_ANTENNA_HARDWARE_RADIO, 0);
1453 rt2x00_set_field16(&word, EEPROM_ANTENNA_RF_TYPE, RF2522);
1454 rt2x00_eeprom_write(rt2x00dev, EEPROM_ANTENNA, word);
1455 EEPROM(rt2x00dev, "Antenna: 0x%04x\n", word);
1456 }
1457
1458 rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &word);
1459 if (word == 0xffff) {
1460 rt2x00_set_field16(&word, EEPROM_NIC_CARDBUS_ACCEL, 0);
1461 rt2x00_set_field16(&word, EEPROM_NIC_DYN_BBP_TUNE, 0);
1462 rt2x00_set_field16(&word, EEPROM_NIC_CCK_TX_POWER, 0);
1463 rt2x00_eeprom_write(rt2x00dev, EEPROM_NIC, word);
1464 EEPROM(rt2x00dev, "NIC: 0x%04x\n", word);
1465 }
1466
1467 rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET, &word);
1468 if (word == 0xffff) {
1469 rt2x00_set_field16(&word, EEPROM_CALIBRATE_OFFSET_RSSI,
1470 DEFAULT_RSSI_OFFSET);
1471 rt2x00_eeprom_write(rt2x00dev, EEPROM_CALIBRATE_OFFSET, word);
1472 EEPROM(rt2x00dev, "Calibrate offset: 0x%04x\n", word);
1473 }
1474
1475 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE, &word);
1476 if (word == 0xffff) {
1477 rt2x00_set_field16(&word, EEPROM_BBPTUNE_THRESHOLD, 45);
1478 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE, word);
1479 EEPROM(rt2x00dev, "BBPtune: 0x%04x\n", word);
1480 }
1481
6bb40dd1
ID		 1482 /*
1483 * Switch lower vgc bound to current BBP R17 value,
1484 * lower the value a bit for better quality.
1485 */
1486 rt2500usb_bbp_read(rt2x00dev, 17, &bbp);
1487 bbp -= 6;
1488
95ea3627
ID		 1489 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &word);
1490 if (word == 0xffff) {
1491 rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCUPPER, 0x40);
6bb40dd1 1492 rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCLOWER, bbp);
95ea3627
ID		 1493 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_VGC, word);
1494 EEPROM(rt2x00dev, "BBPtune vgc: 0x%04x\n", word);
8d8acd46
ID		 1495 } else {
1496 rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCLOWER, bbp);
1497 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_VGC, word);
95ea3627
ID		 1498 }
1499
1500 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R17, &word);
1501 if (word == 0xffff) {
1502 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_LOW, 0x48);
1503 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_HIGH, 0x41);
1504 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R17, word);
1505 EEPROM(rt2x00dev, "BBPtune r17: 0x%04x\n", word);
1506 }
1507
1508 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &word);
1509 if (word == 0xffff) {
1510 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R24_LOW, 0x40);
1511 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R24_HIGH, 0x80);
1512 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R24, word);
1513 EEPROM(rt2x00dev, "BBPtune r24: 0x%04x\n", word);
1514 }
1515
1516 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &word);
1517 if (word == 0xffff) {
1518 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R25_LOW, 0x40);
1519 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R25_HIGH, 0x50);
1520 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R25, word);
1521 EEPROM(rt2x00dev, "BBPtune r25: 0x%04x\n", word);
1522 }
1523
1524 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &word);
1525 if (word == 0xffff) {
1526 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R61_LOW, 0x60);
1527 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R61_HIGH, 0x6d);
1528 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R61, word);
1529 EEPROM(rt2x00dev, "BBPtune r61: 0x%04x\n", word);
1530 }
1531
1532 return 0;
1533}
1534
1535static int rt2500usb_init_eeprom(struct rt2x00_dev *rt2x00dev)
1536{
1537 u16 reg;
1538 u16 value;
1539 u16 eeprom;
1540
1541 /*
1542 * Read EEPROM word for configuration.
1543 */
1544 rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &eeprom);
1545
1546 /*
1547 * Identify RF chipset.
1548 */
1549 value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE);
1550 rt2500usb_register_read(rt2x00dev, MAC_CSR0, &reg);
1551 rt2x00_set_chip(rt2x00dev, RT2570, value, reg);
1552
358623c2 1553 if (!rt2x00_check_rev(&rt2x00dev->chip, 0x000ffff0, 0)) {
95ea3627
ID		 1554 ERROR(rt2x00dev, "Invalid RT chipset detected.\n");
1555 return -ENODEV;
1556 }
1557
1558 if (!rt2x00_rf(&rt2x00dev->chip, RF2522) &&
1559 !rt2x00_rf(&rt2x00dev->chip, RF2523) &&
1560 !rt2x00_rf(&rt2x00dev->chip, RF2524) &&
1561 !rt2x00_rf(&rt2x00dev->chip, RF2525) &&
1562 !rt2x00_rf(&rt2x00dev->chip, RF2525E) &&
1563 !rt2x00_rf(&rt2x00dev->chip, RF5222)) {
1564 ERROR(rt2x00dev, "Invalid RF chipset detected.\n");
1565 return -ENODEV;
1566 }
1567
1568 /*
1569 * Identify default antenna configuration.
1570 */
addc81bd 1571 rt2x00dev->default_ant.tx =
95ea3627 1572 rt2x00_get_field16(eeprom, EEPROM_ANTENNA_TX_DEFAULT);
addc81bd 1573 rt2x00dev->default_ant.rx =
95ea3627
ID		 1574 rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RX_DEFAULT);
1575
addc81bd
ID		 1576 /*
1577 * When the eeprom indicates SW_DIVERSITY use HW_DIVERSITY instead.
1578 * I am not 100% sure about this, but the legacy drivers do not
1579 * indicate antenna swapping in software is required when
1580 * diversity is enabled.
1581 */
1582 if (rt2x00dev->default_ant.tx == ANTENNA_SW_DIVERSITY)
1583 rt2x00dev->default_ant.tx = ANTENNA_HW_DIVERSITY;
1584 if (rt2x00dev->default_ant.rx == ANTENNA_SW_DIVERSITY)
1585 rt2x00dev->default_ant.rx = ANTENNA_HW_DIVERSITY;
1586
95ea3627
ID		 1587 /*
1588 * Store led mode, for correct led behaviour.
1589 */
771fd565 1590#ifdef CONFIG_RT2X00_LIB_LEDS
a9450b70
ID		 1591 value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_LED_MODE);
1592
475433be 1593 rt2500usb_init_led(rt2x00dev, &rt2x00dev->led_radio, LED_TYPE_RADIO);
3d3e451f
ID		 1594 if (value == LED_MODE_TXRX_ACTIVITY ||
1595 value == LED_MODE_DEFAULT ||
1596 value == LED_MODE_ASUS)
475433be
ID		 1597 rt2500usb_init_led(rt2x00dev, &rt2x00dev->led_qual,
1598 LED_TYPE_ACTIVITY);
771fd565 1599#endif /* CONFIG_RT2X00_LIB_LEDS */
95ea3627 1600
7396faf4
ID		 1601 /*
1602 * Detect if this device has an hardware controlled radio.
1603 */
1604#ifdef CONFIG_RT2X00_LIB_RFKILL
1605 if (rt2x00_get_field16(eeprom, EEPROM_ANTENNA_HARDWARE_RADIO))
1606 __set_bit(CONFIG_SUPPORT_HW_BUTTON, &rt2x00dev->flags);
1607#endif /* CONFIG_RT2X00_LIB_RFKILL */
1608
95ea3627
ID		 1609 /*
1610 * Check if the BBP tuning should be disabled.
1611 */
1612 rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &eeprom);
1613 if (rt2x00_get_field16(eeprom, EEPROM_NIC_DYN_BBP_TUNE))
1614 __set_bit(CONFIG_DISABLE_LINK_TUNING, &rt2x00dev->flags);
1615
1616 /*
1617 * Read the RSSI <-> dBm offset information.
1618 */
1619 rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET, &eeprom);
1620 rt2x00dev->rssi_offset =
1621 rt2x00_get_field16(eeprom, EEPROM_CALIBRATE_OFFSET_RSSI);
1622
1623 return 0;
1624}
1625
1626/*
1627 * RF value list for RF2522
1628 * Supports: 2.4 GHz
1629 */
1630static const struct rf_channel rf_vals_bg_2522[] = {
1631 { 1, 0x00002050, 0x000c1fda, 0x00000101, 0 },
1632 { 2, 0x00002050, 0x000c1fee, 0x00000101, 0 },
1633 { 3, 0x00002050, 0x000c2002, 0x00000101, 0 },
1634 { 4, 0x00002050, 0x000c2016, 0x00000101, 0 },
1635 { 5, 0x00002050, 0x000c202a, 0x00000101, 0 },
1636 { 6, 0x00002050, 0x000c203e, 0x00000101, 0 },
1637 { 7, 0x00002050, 0x000c2052, 0x00000101, 0 },
1638 { 8, 0x00002050, 0x000c2066, 0x00000101, 0 },
1639 { 9, 0x00002050, 0x000c207a, 0x00000101, 0 },
1640 { 10, 0x00002050, 0x000c208e, 0x00000101, 0 },
1641 { 11, 0x00002050, 0x000c20a2, 0x00000101, 0 },
1642 { 12, 0x00002050, 0x000c20b6, 0x00000101, 0 },
1643 { 13, 0x00002050, 0x000c20ca, 0x00000101, 0 },
1644 { 14, 0x00002050, 0x000c20fa, 0x00000101, 0 },
1645};
1646
1647/*
1648 * RF value list for RF2523
1649 * Supports: 2.4 GHz
1650 */
1651static const struct rf_channel rf_vals_bg_2523[] = {
1652 { 1, 0x00022010, 0x00000c9e, 0x000e0111, 0x00000a1b },
1653 { 2, 0x00022010, 0x00000ca2, 0x000e0111, 0x00000a1b },
1654 { 3, 0x00022010, 0x00000ca6, 0x000e0111, 0x00000a1b },
1655 { 4, 0x00022010, 0x00000caa, 0x000e0111, 0x00000a1b },
1656 { 5, 0x00022010, 0x00000cae, 0x000e0111, 0x00000a1b },
1657 { 6, 0x00022010, 0x00000cb2, 0x000e0111, 0x00000a1b },
1658 { 7, 0x00022010, 0x00000cb6, 0x000e0111, 0x00000a1b },
1659 { 8, 0x00022010, 0x00000cba, 0x000e0111, 0x00000a1b },
1660 { 9, 0x00022010, 0x00000cbe, 0x000e0111, 0x00000a1b },
1661 { 10, 0x00022010, 0x00000d02, 0x000e0111, 0x00000a1b },
1662 { 11, 0x00022010, 0x00000d06, 0x000e0111, 0x00000a1b },
1663 { 12, 0x00022010, 0x00000d0a, 0x000e0111, 0x00000a1b },
1664 { 13, 0x00022010, 0x00000d0e, 0x000e0111, 0x00000a1b },
1665 { 14, 0x00022010, 0x00000d1a, 0x000e0111, 0x00000a03 },
1666};
1667
1668/*
1669 * RF value list for RF2524
1670 * Supports: 2.4 GHz
1671 */
1672static const struct rf_channel rf_vals_bg_2524[] = {
1673 { 1, 0x00032020, 0x00000c9e, 0x00000101, 0x00000a1b },
1674 { 2, 0x00032020, 0x00000ca2, 0x00000101, 0x00000a1b },
1675 { 3, 0x00032020, 0x00000ca6, 0x00000101, 0x00000a1b },
1676 { 4, 0x00032020, 0x00000caa, 0x00000101, 0x00000a1b },
1677 { 5, 0x00032020, 0x00000cae, 0x00000101, 0x00000a1b },
1678 { 6, 0x00032020, 0x00000cb2, 0x00000101, 0x00000a1b },
1679 { 7, 0x00032020, 0x00000cb6, 0x00000101, 0x00000a1b },
1680 { 8, 0x00032020, 0x00000cba, 0x00000101, 0x00000a1b },
1681 { 9, 0x00032020, 0x00000cbe, 0x00000101, 0x00000a1b },
1682 { 10, 0x00032020, 0x00000d02, 0x00000101, 0x00000a1b },
1683 { 11, 0x00032020, 0x00000d06, 0x00000101, 0x00000a1b },
1684 { 12, 0x00032020, 0x00000d0a, 0x00000101, 0x00000a1b },
1685 { 13, 0x00032020, 0x00000d0e, 0x00000101, 0x00000a1b },
1686 { 14, 0x00032020, 0x00000d1a, 0x00000101, 0x00000a03 },
1687};
1688
1689/*
1690 * RF value list for RF2525
1691 * Supports: 2.4 GHz
1692 */
1693static const struct rf_channel rf_vals_bg_2525[] = {
1694 { 1, 0x00022020, 0x00080c9e, 0x00060111, 0x00000a1b },
1695 { 2, 0x00022020, 0x00080ca2, 0x00060111, 0x00000a1b },
1696 { 3, 0x00022020, 0x00080ca6, 0x00060111, 0x00000a1b },
1697 { 4, 0x00022020, 0x00080caa, 0x00060111, 0x00000a1b },
1698 { 5, 0x00022020, 0x00080cae, 0x00060111, 0x00000a1b },
1699 { 6, 0x00022020, 0x00080cb2, 0x00060111, 0x00000a1b },
1700 { 7, 0x00022020, 0x00080cb6, 0x00060111, 0x00000a1b },
1701 { 8, 0x00022020, 0x00080cba, 0x00060111, 0x00000a1b },
1702 { 9, 0x00022020, 0x00080cbe, 0x00060111, 0x00000a1b },
1703 { 10, 0x00022020, 0x00080d02, 0x00060111, 0x00000a1b },
1704 { 11, 0x00022020, 0x00080d06, 0x00060111, 0x00000a1b },
1705 { 12, 0x00022020, 0x00080d0a, 0x00060111, 0x00000a1b },
1706 { 13, 0x00022020, 0x00080d0e, 0x00060111, 0x00000a1b },
1707 { 14, 0x00022020, 0x00080d1a, 0x00060111, 0x00000a03 },
1708};
1709
1710/*
1711 * RF value list for RF2525e
1712 * Supports: 2.4 GHz
1713 */
1714static const struct rf_channel rf_vals_bg_2525e[] = {
1715 { 1, 0x00022010, 0x0000089a, 0x00060111, 0x00000e1b },
1716 { 2, 0x00022010, 0x0000089e, 0x00060111, 0x00000e07 },
1717 { 3, 0x00022010, 0x0000089e, 0x00060111, 0x00000e1b },
1718 { 4, 0x00022010, 0x000008a2, 0x00060111, 0x00000e07 },
1719 { 5, 0x00022010, 0x000008a2, 0x00060111, 0x00000e1b },
1720 { 6, 0x00022010, 0x000008a6, 0x00060111, 0x00000e07 },
1721 { 7, 0x00022010, 0x000008a6, 0x00060111, 0x00000e1b },
1722 { 8, 0x00022010, 0x000008aa, 0x00060111, 0x00000e07 },
1723 { 9, 0x00022010, 0x000008aa, 0x00060111, 0x00000e1b },
1724 { 10, 0x00022010, 0x000008ae, 0x00060111, 0x00000e07 },
1725 { 11, 0x00022010, 0x000008ae, 0x00060111, 0x00000e1b },
1726 { 12, 0x00022010, 0x000008b2, 0x00060111, 0x00000e07 },
1727 { 13, 0x00022010, 0x000008b2, 0x00060111, 0x00000e1b },
1728 { 14, 0x00022010, 0x000008b6, 0x00060111, 0x00000e23 },
1729};
1730
1731/*
1732 * RF value list for RF5222
1733 * Supports: 2.4 GHz & 5.2 GHz
1734 */
1735static const struct rf_channel rf_vals_5222[] = {
1736 { 1, 0x00022020, 0x00001136, 0x00000101, 0x00000a0b },
1737 { 2, 0x00022020, 0x0000113a, 0x00000101, 0x00000a0b },
1738 { 3, 0x00022020, 0x0000113e, 0x00000101, 0x00000a0b },
1739 { 4, 0x00022020, 0x00001182, 0x00000101, 0x00000a0b },
1740 { 5, 0x00022020, 0x00001186, 0x00000101, 0x00000a0b },
1741 { 6, 0x00022020, 0x0000118a, 0x00000101, 0x00000a0b },
1742 { 7, 0x00022020, 0x0000118e, 0x00000101, 0x00000a0b },
1743 { 8, 0x00022020, 0x00001192, 0x00000101, 0x00000a0b },
1744 { 9, 0x00022020, 0x00001196, 0x00000101, 0x00000a0b },
1745 { 10, 0x00022020, 0x0000119a, 0x00000101, 0x00000a0b },
1746 { 11, 0x00022020, 0x0000119e, 0x00000101, 0x00000a0b },
1747 { 12, 0x00022020, 0x000011a2, 0x00000101, 0x00000a0b },
1748 { 13, 0x00022020, 0x000011a6, 0x00000101, 0x00000a0b },
1749 { 14, 0x00022020, 0x000011ae, 0x00000101, 0x00000a1b },
1750
1751 /* 802.11 UNI / HyperLan 2 */
1752 { 36, 0x00022010, 0x00018896, 0x00000101, 0x00000a1f },
1753 { 40, 0x00022010, 0x0001889a, 0x00000101, 0x00000a1f },
1754 { 44, 0x00022010, 0x0001889e, 0x00000101, 0x00000a1f },
1755 { 48, 0x00022010, 0x000188a2, 0x00000101, 0x00000a1f },
1756 { 52, 0x00022010, 0x000188a6, 0x00000101, 0x00000a1f },
1757 { 66, 0x00022010, 0x000188aa, 0x00000101, 0x00000a1f },
1758 { 60, 0x00022010, 0x000188ae, 0x00000101, 0x00000a1f },
1759 { 64, 0x00022010, 0x000188b2, 0x00000101, 0x00000a1f },
1760
1761 /* 802.11 HyperLan 2 */
1762 { 100, 0x00022010, 0x00008802, 0x00000101, 0x00000a0f },
1763 { 104, 0x00022010, 0x00008806, 0x00000101, 0x00000a0f },
1764 { 108, 0x00022010, 0x0000880a, 0x00000101, 0x00000a0f },
1765 { 112, 0x00022010, 0x0000880e, 0x00000101, 0x00000a0f },
1766 { 116, 0x00022010, 0x00008812, 0x00000101, 0x00000a0f },
1767 { 120, 0x00022010, 0x00008816, 0x00000101, 0x00000a0f },
1768 { 124, 0x00022010, 0x0000881a, 0x00000101, 0x00000a0f },
1769 { 128, 0x00022010, 0x0000881e, 0x00000101, 0x00000a0f },
1770 { 132, 0x00022010, 0x00008822, 0x00000101, 0x00000a0f },
1771 { 136, 0x00022010, 0x00008826, 0x00000101, 0x00000a0f },
1772
1773 /* 802.11 UNII */
1774 { 140, 0x00022010, 0x0000882a, 0x00000101, 0x00000a0f },
1775 { 149, 0x00022020, 0x000090a6, 0x00000101, 0x00000a07 },
1776 { 153, 0x00022020, 0x000090ae, 0x00000101, 0x00000a07 },
1777 { 157, 0x00022020, 0x000090b6, 0x00000101, 0x00000a07 },
1778 { 161, 0x00022020, 0x000090be, 0x00000101, 0x00000a07 },
1779};
1780
8c5e7a5f 1781static int rt2500usb_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
95ea3627
ID		 1782{
1783 struct hw_mode_spec *spec = &rt2x00dev->spec;
8c5e7a5f
ID		 1784 struct channel_info *info;
1785 char *tx_power;
95ea3627
ID		 1786 unsigned int i;
1787
1788 /*
1789 * Initialize all hw fields.
1790 */
1791 rt2x00dev->hw->flags =
95ea3627 1792 IEEE80211_HW_RX_INCLUDES_FCS |
566bfe5a 1793 IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
4be8c387
JB		 1794 IEEE80211_HW_SIGNAL_DBM |
1795 IEEE80211_HW_SUPPORTS_PS |
1796 IEEE80211_HW_PS_NULLFUNC_STACK;
566bfe5a 1797
95ea3627 1798 rt2x00dev->hw->extra_tx_headroom = TXD_DESC_SIZE;
95ea3627 1799
14a3bf89 1800 SET_IEEE80211_DEV(rt2x00dev->hw, rt2x00dev->dev);
95ea3627
ID		 1801 SET_IEEE80211_PERM_ADDR(rt2x00dev->hw,
1802 rt2x00_eeprom_addr(rt2x00dev,
1803 EEPROM_MAC_ADDR_0));
1804
95ea3627
ID		 1805 /*
1806 * Initialize hw_mode information.
1807 */
31562e80
ID		 1808 spec->supported_bands = SUPPORT_BAND_2GHZ;
1809 spec->supported_rates = SUPPORT_RATE_CCK | SUPPORT_RATE_OFDM;
95ea3627
ID		 1810
1811 if (rt2x00_rf(&rt2x00dev->chip, RF2522)) {
1812 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2522);
1813 spec->channels = rf_vals_bg_2522;
1814 } else if (rt2x00_rf(&rt2x00dev->chip, RF2523)) {
1815 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2523);
1816 spec->channels = rf_vals_bg_2523;
1817 } else if (rt2x00_rf(&rt2x00dev->chip, RF2524)) {
1818 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2524);
1819 spec->channels = rf_vals_bg_2524;
1820 } else if (rt2x00_rf(&rt2x00dev->chip, RF2525)) {
1821 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525);
1822 spec->channels = rf_vals_bg_2525;
1823 } else if (rt2x00_rf(&rt2x00dev->chip, RF2525E)) {
1824 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525e);
1825 spec->channels = rf_vals_bg_2525e;
1826 } else if (rt2x00_rf(&rt2x00dev->chip, RF5222)) {
31562e80 1827 spec->supported_bands |= SUPPORT_BAND_5GHZ;
95ea3627
ID		 1828 spec->num_channels = ARRAY_SIZE(rf_vals_5222);
1829 spec->channels = rf_vals_5222;
95ea3627 1830 }
8c5e7a5f
ID		 1831
1832 /*
1833 * Create channel information array
1834 */
1835 info = kzalloc(spec->num_channels * sizeof(*info), GFP_KERNEL);
1836 if (!info)
1837 return -ENOMEM;
1838
1839 spec->channels_info = info;
1840
1841 tx_power = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_START);
1842 for (i = 0; i < 14; i++)
1843 info[i].tx_power1 = TXPOWER_FROM_DEV(tx_power[i]);
1844
1845 if (spec->num_channels > 14) {
1846 for (i = 14; i < spec->num_channels; i++)
1847 info[i].tx_power1 = DEFAULT_TXPOWER;
1848 }
1849
1850 return 0;
95ea3627
ID		 1851}
1852
1853static int rt2500usb_probe_hw(struct rt2x00_dev *rt2x00dev)
1854{
1855 int retval;
1856
1857 /*
1858 * Allocate eeprom data.
1859 */
1860 retval = rt2500usb_validate_eeprom(rt2x00dev);
1861 if (retval)
1862 return retval;
1863
1864 retval = rt2500usb_init_eeprom(rt2x00dev);
1865 if (retval)
1866 return retval;
1867
1868 /*
1869 * Initialize hw specifications.
1870 */
8c5e7a5f
ID		 1871 retval = rt2500usb_probe_hw_mode(rt2x00dev);
1872 if (retval)
1873 return retval;
95ea3627
ID		 1874
1875 /*
181d6902 1876 * This device requires the atim queue
95ea3627 1877 */
181d6902
ID		 1878 __set_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags);
1879 __set_bit(DRIVER_REQUIRE_BEACON_GUARD, &rt2x00dev->flags);
3a643d24 1880 __set_bit(DRIVER_REQUIRE_SCHEDULED, &rt2x00dev->flags);
dddfb478
ID		 1881 if (!modparam_nohwcrypt) {
1882 __set_bit(CONFIG_SUPPORT_HW_CRYPTO, &rt2x00dev->flags);
3f787bd6 1883 __set_bit(DRIVER_REQUIRE_COPY_IV, &rt2x00dev->flags);
dddfb478 1884 }
d06193f3 1885 __set_bit(CONFIG_DISABLE_LINK_TUNING, &rt2x00dev->flags);
95ea3627
ID		 1886
1887 /*
1888 * Set the rssi offset.
1889 */
1890 rt2x00dev->rssi_offset = DEFAULT_RSSI_OFFSET;
1891
1892 return 0;
1893}
1894
95ea3627
ID		 1895static const struct ieee80211_ops rt2500usb_mac80211_ops = {
1896 .tx = rt2x00mac_tx,
4150c572
JB		 1897 .start = rt2x00mac_start,
1898 .stop = rt2x00mac_stop,
95ea3627
ID		 1899 .add_interface = rt2x00mac_add_interface,
1900 .remove_interface = rt2x00mac_remove_interface,
1901 .config = rt2x00mac_config,
3a643d24 1902 .configure_filter = rt2x00mac_configure_filter,
dddfb478 1903 .set_key = rt2x00mac_set_key,
95ea3627 1904 .get_stats = rt2x00mac_get_stats,
471b3efd 1905 .bss_info_changed = rt2x00mac_bss_info_changed,
95ea3627
ID		 1906 .conf_tx = rt2x00mac_conf_tx,
1907 .get_tx_stats = rt2x00mac_get_tx_stats,
95ea3627
ID		 1908};
1909
1910static const struct rt2x00lib_ops rt2500usb_rt2x00_ops = {
1911 .probe_hw = rt2500usb_probe_hw,
1912 .initialize = rt2x00usb_initialize,
1913 .uninitialize = rt2x00usb_uninitialize,
798b7adb 1914 .clear_entry = rt2x00usb_clear_entry,
95ea3627 1915 .set_device_state = rt2500usb_set_device_state,
7396faf4 1916 .rfkill_poll = rt2500usb_rfkill_poll,
95ea3627
ID		 1917 .link_stats = rt2500usb_link_stats,
1918 .reset_tuner = rt2500usb_reset_tuner,
1919 .link_tuner = rt2500usb_link_tuner,
1920 .write_tx_desc = rt2500usb_write_tx_desc,
1921 .write_tx_data = rt2x00usb_write_tx_data,
bd88a781 1922 .write_beacon = rt2500usb_write_beacon,
dd9fa2d2 1923 .get_tx_data_len = rt2500usb_get_tx_data_len,
95ea3627 1924 .kick_tx_queue = rt2500usb_kick_tx_queue,
a2c9b652 1925 .kill_tx_queue = rt2x00usb_kill_tx_queue,
95ea3627 1926 .fill_rxdone = rt2500usb_fill_rxdone,
dddfb478
ID		 1927 .config_shared_key = rt2500usb_config_key,
1928 .config_pairwise_key = rt2500usb_config_key,
3a643d24 1929 .config_filter = rt2500usb_config_filter,
6bb40dd1 1930 .config_intf = rt2500usb_config_intf,
72810379 1931 .config_erp = rt2500usb_config_erp,
e4ea1c40 1932 .config_ant = rt2500usb_config_ant,
95ea3627
ID		 1933 .config = rt2500usb_config,
1934};
1935
181d6902
ID		 1936static const struct data_queue_desc rt2500usb_queue_rx = {
1937 .entry_num = RX_ENTRIES,
1938 .data_size = DATA_FRAME_SIZE,
1939 .desc_size = RXD_DESC_SIZE,
b8be63ff 1940 .priv_size = sizeof(struct queue_entry_priv_usb),
181d6902
ID		 1941};
1942
1943static const struct data_queue_desc rt2500usb_queue_tx = {
1944 .entry_num = TX_ENTRIES,
1945 .data_size = DATA_FRAME_SIZE,
1946 .desc_size = TXD_DESC_SIZE,
b8be63ff 1947 .priv_size = sizeof(struct queue_entry_priv_usb),
181d6902
ID		 1948};
1949
1950static const struct data_queue_desc rt2500usb_queue_bcn = {
1951 .entry_num = BEACON_ENTRIES,
1952 .data_size = MGMT_FRAME_SIZE,
1953 .desc_size = TXD_DESC_SIZE,
1954 .priv_size = sizeof(struct queue_entry_priv_usb_bcn),
1955};
1956
1957static const struct data_queue_desc rt2500usb_queue_atim = {
1958 .entry_num = ATIM_ENTRIES,
1959 .data_size = DATA_FRAME_SIZE,
1960 .desc_size = TXD_DESC_SIZE,
b8be63ff 1961 .priv_size = sizeof(struct queue_entry_priv_usb),
181d6902
ID		 1962};
1963
95ea3627 1964static const struct rt2x00_ops rt2500usb_ops = {
2360157c 1965 .name = KBUILD_MODNAME,
6bb40dd1
ID		 1966 .max_sta_intf = 1,
1967 .max_ap_intf = 1,
95ea3627
ID		 1968 .eeprom_size = EEPROM_SIZE,
1969 .rf_size = RF_SIZE,
61448f88 1970 .tx_queues = NUM_TX_QUEUES,
181d6902
ID		 1971 .rx = &rt2500usb_queue_rx,
1972 .tx = &rt2500usb_queue_tx,
1973 .bcn = &rt2500usb_queue_bcn,
1974 .atim = &rt2500usb_queue_atim,
95ea3627
ID		 1975 .lib = &rt2500usb_rt2x00_ops,
1976 .hw = &rt2500usb_mac80211_ops,
1977#ifdef CONFIG_RT2X00_LIB_DEBUGFS
1978 .debugfs = &rt2500usb_rt2x00debug,
1979#endif /* CONFIG_RT2X00_LIB_DEBUGFS */
1980};
1981
1982/*
1983 * rt2500usb module information.
1984 */
1985static struct usb_device_id rt2500usb_device_table[] = {
1986 /* ASUS */
1987 { USB_DEVICE(0x0b05, 0x1706), USB_DEVICE_DATA(&rt2500usb_ops) },
1988 { USB_DEVICE(0x0b05, 0x1707), USB_DEVICE_DATA(&rt2500usb_ops) },
1989 /* Belkin */
1990 { USB_DEVICE(0x050d, 0x7050), USB_DEVICE_DATA(&rt2500usb_ops) },
1991 { USB_DEVICE(0x050d, 0x7051), USB_DEVICE_DATA(&rt2500usb_ops) },
1992 { USB_DEVICE(0x050d, 0x705a), USB_DEVICE_DATA(&rt2500usb_ops) },
1993 /* Cisco Systems */
1994 { USB_DEVICE(0x13b1, 0x000d), USB_DEVICE_DATA(&rt2500usb_ops) },
1995 { USB_DEVICE(0x13b1, 0x0011), USB_DEVICE_DATA(&rt2500usb_ops) },
1996 { USB_DEVICE(0x13b1, 0x001a), USB_DEVICE_DATA(&rt2500usb_ops) },
9eb77ab0
XVP		 1997 /* CNet */
1998 { USB_DEVICE(0x1371, 0x9022), USB_DEVICE_DATA(&rt2500usb_ops) },
95ea3627
ID		 1999 /* Conceptronic */
2000 { USB_DEVICE(0x14b2, 0x3c02), USB_DEVICE_DATA(&rt2500usb_ops) },
2001 /* D-LINK */
2002 { USB_DEVICE(0x2001, 0x3c00), USB_DEVICE_DATA(&rt2500usb_ops) },
2003 /* Gigabyte */
2004 { USB_DEVICE(0x1044, 0x8001), USB_DEVICE_DATA(&rt2500usb_ops) },
2005 { USB_DEVICE(0x1044, 0x8007), USB_DEVICE_DATA(&rt2500usb_ops) },
2006 /* Hercules */
2007 { USB_DEVICE(0x06f8, 0xe000), USB_DEVICE_DATA(&rt2500usb_ops) },
2008 /* Melco */
db433feb 2009 { USB_DEVICE(0x0411, 0x005e), USB_DEVICE_DATA(&rt2500usb_ops) },
95ea3627
ID		 2010 { USB_DEVICE(0x0411, 0x0066), USB_DEVICE_DATA(&rt2500usb_ops) },
2011 { USB_DEVICE(0x0411, 0x0067), USB_DEVICE_DATA(&rt2500usb_ops) },
2012 { USB_DEVICE(0x0411, 0x008b), USB_DEVICE_DATA(&rt2500usb_ops) },
2013 { USB_DEVICE(0x0411, 0x0097), USB_DEVICE_DATA(&rt2500usb_ops) },
95ea3627
ID		 2014 /* MSI */
2015 { USB_DEVICE(0x0db0, 0x6861), USB_DEVICE_DATA(&rt2500usb_ops) },
2016 { USB_DEVICE(0x0db0, 0x6865), USB_DEVICE_DATA(&rt2500usb_ops) },
2017 { USB_DEVICE(0x0db0, 0x6869), USB_DEVICE_DATA(&rt2500usb_ops) },
2018 /* Ralink */
2019 { USB_DEVICE(0x148f, 0x1706), USB_DEVICE_DATA(&rt2500usb_ops) },
2020 { USB_DEVICE(0x148f, 0x2570), USB_DEVICE_DATA(&rt2500usb_ops) },
2021 { USB_DEVICE(0x148f, 0x2573), USB_DEVICE_DATA(&rt2500usb_ops) },
2022 { USB_DEVICE(0x148f, 0x9020), USB_DEVICE_DATA(&rt2500usb_ops) },
9eb77ab0
XVP		 2023 /* Sagem */
2024 { USB_DEVICE(0x079b, 0x004b), USB_DEVICE_DATA(&rt2500usb_ops) },
95ea3627
ID		 2025 /* Siemens */
2026 { USB_DEVICE(0x0681, 0x3c06), USB_DEVICE_DATA(&rt2500usb_ops) },
2027 /* SMC */
2028 { USB_DEVICE(0x0707, 0xee13), USB_DEVICE_DATA(&rt2500usb_ops) },
2029 /* Spairon */
2030 { USB_DEVICE(0x114b, 0x0110), USB_DEVICE_DATA(&rt2500usb_ops) },
9eb77ab0
XVP		 2031 /* SURECOM */
2032 { USB_DEVICE(0x0769, 0x11f3), USB_DEVICE_DATA(&rt2500usb_ops) },
95ea3627
ID		 2033 /* Trust */
2034 { USB_DEVICE(0x0eb0, 0x9020), USB_DEVICE_DATA(&rt2500usb_ops) },
9eb77ab0
XVP		 2035 /* VTech */
2036 { USB_DEVICE(0x0f88, 0x3012), USB_DEVICE_DATA(&rt2500usb_ops) },
95ea3627
ID		 2037 /* Zinwell */
2038 { USB_DEVICE(0x5a57, 0x0260), USB_DEVICE_DATA(&rt2500usb_ops) },
2039 { 0, }
2040};
2041
2042MODULE_AUTHOR(DRV_PROJECT);
2043MODULE_VERSION(DRV_VERSION);
2044MODULE_DESCRIPTION("Ralink RT2500 USB Wireless LAN driver.");
2045MODULE_SUPPORTED_DEVICE("Ralink RT2570 USB chipset based cards");
2046MODULE_DEVICE_TABLE(usb, rt2500usb_device_table);
2047MODULE_LICENSE("GPL");
2048
2049static struct usb_driver rt2500usb_driver = {
2360157c 2050 .name = KBUILD_MODNAME,
95ea3627
ID		 2051 .id_table = rt2500usb_device_table,
2052 .probe = rt2x00usb_probe,
2053 .disconnect = rt2x00usb_disconnect,
2054 .suspend = rt2x00usb_suspend,
2055 .resume = rt2x00usb_resume,
2056};
2057
2058static int __init rt2500usb_init(void)
2059{
2060 return usb_register(&rt2500usb_driver);
2061}
2062
2063static void __exit rt2500usb_exit(void)
2064{
2065 usb_deregister(&rt2500usb_driver);
2066}
2067
2068module_init(rt2500usb_init);
2069module_exit(rt2500usb_exit);
Linux kernel - Deliverables
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