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Merge commit 'origin/master' into next
[deliverable/linux.git] / drivers / net / wireless / rt2x00 / rt2500usb.c
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95ea3627 1/*
811aa9ca 2 Copyright (C) 2004 - 2008 rt2x00 SourceForge Project
95ea3627
ID		 3 <http://rt2x00.serialmonkey.com>
4
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
9
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
14
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the
17 Free Software Foundation, Inc.,
18 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19 */
20
21/*
22 Module: rt2500usb
23 Abstract: rt2500usb device specific routines.
24 Supported chipsets: RT2570.
25 */
26
95ea3627
ID		 27#include <linux/delay.h>
28#include <linux/etherdevice.h>
29#include <linux/init.h>
30#include <linux/kernel.h>
31#include <linux/module.h>
32#include <linux/usb.h>
33
34#include "rt2x00.h"
35#include "rt2x00usb.h"
36#include "rt2500usb.h"
37
dddfb478
ID		 38/*
39 * Allow hardware encryption to be disabled.
40 */
f1dd2b23 41static int modparam_nohwcrypt = 0;
dddfb478
ID		 42module_param_named(nohwcrypt, modparam_nohwcrypt, bool, S_IRUGO);
43MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption.");
44
95ea3627
ID		 45/*
46 * Register access.
47 * All access to the CSR registers will go through the methods
48 * rt2500usb_register_read and rt2500usb_register_write.
49 * BBP and RF register require indirect register access,
50 * and use the CSR registers BBPCSR and RFCSR to achieve this.
51 * These indirect registers work with busy bits,
52 * and we will try maximal REGISTER_BUSY_COUNT times to access
53 * the register while taking a REGISTER_BUSY_DELAY us delay
54 * between each attampt. When the busy bit is still set at that time,
55 * the access attempt is considered to have failed,
56 * and we will print an error.
8ff48a8b 57 * If the csr_mutex is already held then the _lock variants must
3d82346c 58 * be used instead.
95ea3627 59 */
0e14f6d3 60static inline void rt2500usb_register_read(struct rt2x00_dev *rt2x00dev,
95ea3627
ID		 61 const unsigned int offset,
62 u16 *value)
63{
64 __le16 reg;
65 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
66 USB_VENDOR_REQUEST_IN, offset,
c9c3b1a5 67 &reg, sizeof(reg), REGISTER_TIMEOUT);
95ea3627
ID		 68 *value = le16_to_cpu(reg);
69}
70
3d82346c
AB		 71static inline void rt2500usb_register_read_lock(struct rt2x00_dev *rt2x00dev,
72 const unsigned int offset,
73 u16 *value)
74{
75 __le16 reg;
76 rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_READ,
77 USB_VENDOR_REQUEST_IN, offset,
c9c3b1a5 78 &reg, sizeof(reg), REGISTER_TIMEOUT);
3d82346c
AB		 79 *value = le16_to_cpu(reg);
80}
81
0e14f6d3 82static inline void rt2500usb_register_multiread(struct rt2x00_dev *rt2x00dev,
95ea3627
ID		 83 const unsigned int offset,
84 void *value, const u16 length)
85{
95ea3627
ID		 86 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
87 USB_VENDOR_REQUEST_IN, offset,
bd394a74
ID		 88 value, length,
89 REGISTER_TIMEOUT16(length));
95ea3627
ID		 90}
91
0e14f6d3 92static inline void rt2500usb_register_write(struct rt2x00_dev *rt2x00dev,
95ea3627
ID		 93 const unsigned int offset,
94 u16 value)
95{
96 __le16 reg = cpu_to_le16(value);
97 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
98 USB_VENDOR_REQUEST_OUT, offset,
c9c3b1a5 99 &reg, sizeof(reg), REGISTER_TIMEOUT);
95ea3627
ID		 100}
101
3d82346c
AB		 102static inline void rt2500usb_register_write_lock(struct rt2x00_dev *rt2x00dev,
103 const unsigned int offset,
104 u16 value)
105{
106 __le16 reg = cpu_to_le16(value);
107 rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_WRITE,
108 USB_VENDOR_REQUEST_OUT, offset,
c9c3b1a5 109 &reg, sizeof(reg), REGISTER_TIMEOUT);
3d82346c
AB		 110}
111
0e14f6d3 112static inline void rt2500usb_register_multiwrite(struct rt2x00_dev *rt2x00dev,
95ea3627
ID		 113 const unsigned int offset,
114 void *value, const u16 length)
115{
95ea3627
ID		 116 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
117 USB_VENDOR_REQUEST_OUT, offset,
bd394a74
ID		 118 value, length,
119 REGISTER_TIMEOUT16(length));
95ea3627
ID		 120}
121
c9c3b1a5
ID		 122static int rt2500usb_regbusy_read(struct rt2x00_dev *rt2x00dev,
123 const unsigned int offset,
124 struct rt2x00_field16 field,
125 u16 *reg)
95ea3627 126{
95ea3627
ID		 127 unsigned int i;
128
129 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
c9c3b1a5
ID		 130 rt2500usb_register_read_lock(rt2x00dev, offset, reg);
131 if (!rt2x00_get_field16(*reg, field))
132 return 1;
95ea3627
ID		 133 udelay(REGISTER_BUSY_DELAY);
134 }
135
c9c3b1a5
ID		 136 ERROR(rt2x00dev, "Indirect register access failed: "
137 "offset=0x%.08x, value=0x%.08x\n", offset, *reg);
138 *reg = ~0;
139
140 return 0;
95ea3627
ID		 141}
142
c9c3b1a5
ID		 143#define WAIT_FOR_BBP(__dev, __reg) \
144 rt2500usb_regbusy_read((__dev), PHY_CSR8, PHY_CSR8_BUSY, (__reg))
145#define WAIT_FOR_RF(__dev, __reg) \
146 rt2500usb_regbusy_read((__dev), PHY_CSR10, PHY_CSR10_RF_BUSY, (__reg))
147
0e14f6d3 148static void rt2500usb_bbp_write(struct rt2x00_dev *rt2x00dev,
95ea3627
ID		 149 const unsigned int word, const u8 value)
150{
151 u16 reg;
152
8ff48a8b 153 mutex_lock(&rt2x00dev->csr_mutex);
3d82346c 154
95ea3627 155 /*
c9c3b1a5
ID		 156 * Wait until the BBP becomes available, afterwards we
157 * can safely write the new data into the register.
95ea3627 158 */
c9c3b1a5
ID		 159 if (WAIT_FOR_BBP(rt2x00dev, &reg)) {
160 reg = 0;
161 rt2x00_set_field16(&reg, PHY_CSR7_DATA, value);
162 rt2x00_set_field16(&reg, PHY_CSR7_REG_ID, word);
163 rt2x00_set_field16(&reg, PHY_CSR7_READ_CONTROL, 0);
3d82346c 164
c9c3b1a5
ID		 165 rt2500usb_register_write_lock(rt2x00dev, PHY_CSR7, reg);
166 }
99ade259 167
8ff48a8b 168 mutex_unlock(&rt2x00dev->csr_mutex);
95ea3627
ID		 169}
170
0e14f6d3 171static void rt2500usb_bbp_read(struct rt2x00_dev *rt2x00dev,
95ea3627
ID		 172 const unsigned int word, u8 *value)
173{
174 u16 reg;
175
8ff48a8b 176 mutex_lock(&rt2x00dev->csr_mutex);
3d82346c 177
95ea3627 178 /*
c9c3b1a5
ID		 179 * Wait until the BBP becomes available, afterwards we
180 * can safely write the read request into the register.
181 * After the data has been written, we wait until hardware
182 * returns the correct value, if at any time the register
183 * doesn't become available in time, reg will be 0xffffffff
184 * which means we return 0xff to the caller.
95ea3627 185 */
c9c3b1a5
ID		 186 if (WAIT_FOR_BBP(rt2x00dev, &reg)) {
187 reg = 0;
188 rt2x00_set_field16(&reg, PHY_CSR7_REG_ID, word);
189 rt2x00_set_field16(&reg, PHY_CSR7_READ_CONTROL, 1);
95ea3627 190
c9c3b1a5 191 rt2500usb_register_write_lock(rt2x00dev, PHY_CSR7, reg);
95ea3627 192
c9c3b1a5
ID		 193 if (WAIT_FOR_BBP(rt2x00dev, &reg))
194 rt2500usb_register_read_lock(rt2x00dev, PHY_CSR7, &reg);
195 }
95ea3627 196
95ea3627 197 *value = rt2x00_get_field16(reg, PHY_CSR7_DATA);
3d82346c 198
8ff48a8b 199 mutex_unlock(&rt2x00dev->csr_mutex);
95ea3627
ID		 200}
201
0e14f6d3 202static void rt2500usb_rf_write(struct rt2x00_dev *rt2x00dev,
95ea3627
ID		 203 const unsigned int word, const u32 value)
204{
205 u16 reg;
95ea3627
ID		 206
207 if (!word)
208 return;
209
8ff48a8b 210 mutex_lock(&rt2x00dev->csr_mutex);
3d82346c 211
c9c3b1a5
ID		 212 /*
213 * Wait until the RF becomes available, afterwards we
214 * can safely write the new data into the register.
215 */
216 if (WAIT_FOR_RF(rt2x00dev, &reg)) {
217 reg = 0;
218 rt2x00_set_field16(&reg, PHY_CSR9_RF_VALUE, value);
219 rt2500usb_register_write_lock(rt2x00dev, PHY_CSR9, reg);
220
221 reg = 0;
222 rt2x00_set_field16(&reg, PHY_CSR10_RF_VALUE, value >> 16);
223 rt2x00_set_field16(&reg, PHY_CSR10_RF_NUMBER_OF_BITS, 20);
224 rt2x00_set_field16(&reg, PHY_CSR10_RF_IF_SELECT, 0);
225 rt2x00_set_field16(&reg, PHY_CSR10_RF_BUSY, 1);
226
227 rt2500usb_register_write_lock(rt2x00dev, PHY_CSR10, reg);
228 rt2x00_rf_write(rt2x00dev, word, value);
95ea3627
ID		 229 }
230
8ff48a8b 231 mutex_unlock(&rt2x00dev->csr_mutex);
95ea3627
ID		 232}
233
234#ifdef CONFIG_RT2X00_LIB_DEBUGFS
743b97ca
ID		 235static void _rt2500usb_register_read(struct rt2x00_dev *rt2x00dev,
236 const unsigned int offset,
237 u32 *value)
95ea3627 238{
743b97ca 239 rt2500usb_register_read(rt2x00dev, offset, (u16 *)value);
95ea3627
ID		 240}
241
743b97ca
ID		 242static void _rt2500usb_register_write(struct rt2x00_dev *rt2x00dev,
243 const unsigned int offset,
244 u32 value)
95ea3627 245{
743b97ca 246 rt2500usb_register_write(rt2x00dev, offset, value);
95ea3627
ID		 247}
248
249static const struct rt2x00debug rt2500usb_rt2x00debug = {
250 .owner = THIS_MODULE,
251 .csr = {
743b97ca
ID		 252 .read = _rt2500usb_register_read,
253 .write = _rt2500usb_register_write,
254 .flags = RT2X00DEBUGFS_OFFSET,
255 .word_base = CSR_REG_BASE,
95ea3627
ID		 256 .word_size = sizeof(u16),
257 .word_count = CSR_REG_SIZE / sizeof(u16),
258 },
259 .eeprom = {
260 .read = rt2x00_eeprom_read,
261 .write = rt2x00_eeprom_write,
743b97ca 262 .word_base = EEPROM_BASE,
95ea3627
ID		 263 .word_size = sizeof(u16),
264 .word_count = EEPROM_SIZE / sizeof(u16),
265 },
266 .bbp = {
267 .read = rt2500usb_bbp_read,
268 .write = rt2500usb_bbp_write,
743b97ca 269 .word_base = BBP_BASE,
95ea3627
ID		 270 .word_size = sizeof(u8),
271 .word_count = BBP_SIZE / sizeof(u8),
272 },
273 .rf = {
274 .read = rt2x00_rf_read,
275 .write = rt2500usb_rf_write,
743b97ca 276 .word_base = RF_BASE,
95ea3627
ID		 277 .word_size = sizeof(u32),
278 .word_count = RF_SIZE / sizeof(u32),
279 },
280};
281#endif /* CONFIG_RT2X00_LIB_DEBUGFS */
282
771fd565 283#ifdef CONFIG_RT2X00_LIB_LEDS
a2e1d52a 284static void rt2500usb_brightness_set(struct led_classdev *led_cdev,
a9450b70
ID		 285 enum led_brightness brightness)
286{
287 struct rt2x00_led *led =
288 container_of(led_cdev, struct rt2x00_led, led_dev);
289 unsigned int enabled = brightness != LED_OFF;
a2e1d52a 290 u16 reg;
a9450b70 291
a2e1d52a 292 rt2500usb_register_read(led->rt2x00dev, MAC_CSR20, &reg);
47b10cd1 293
a2e1d52a
ID		 294 if (led->type == LED_TYPE_RADIO || led->type == LED_TYPE_ASSOC)
295 rt2x00_set_field16(&reg, MAC_CSR20_LINK, enabled);
296 else if (led->type == LED_TYPE_ACTIVITY)
297 rt2x00_set_field16(&reg, MAC_CSR20_ACTIVITY, enabled);
298
299 rt2500usb_register_write(led->rt2x00dev, MAC_CSR20, reg);
300}
301
302static int rt2500usb_blink_set(struct led_classdev *led_cdev,
303 unsigned long *delay_on,
304 unsigned long *delay_off)
305{
306 struct rt2x00_led *led =
307 container_of(led_cdev, struct rt2x00_led, led_dev);
308 u16 reg;
309
310 rt2500usb_register_read(led->rt2x00dev, MAC_CSR21, &reg);
311 rt2x00_set_field16(&reg, MAC_CSR21_ON_PERIOD, *delay_on);
312 rt2x00_set_field16(&reg, MAC_CSR21_OFF_PERIOD, *delay_off);
313 rt2500usb_register_write(led->rt2x00dev, MAC_CSR21, reg);
a9450b70 314
a2e1d52a 315 return 0;
a9450b70 316}
475433be
ID		 317
318static void rt2500usb_init_led(struct rt2x00_dev *rt2x00dev,
319 struct rt2x00_led *led,
320 enum led_type type)
321{
322 led->rt2x00dev = rt2x00dev;
323 led->type = type;
324 led->led_dev.brightness_set = rt2500usb_brightness_set;
325 led->led_dev.blink_set = rt2500usb_blink_set;
326 led->flags = LED_INITIALIZED;
327}
771fd565 328#endif /* CONFIG_RT2X00_LIB_LEDS */
a9450b70 329
95ea3627
ID		 330/*
331 * Configuration handlers.
332 */
dddfb478
ID		 333
334/*
335 * rt2500usb does not differentiate between shared and pairwise
336 * keys, so we should use the same function for both key types.
337 */
338static int rt2500usb_config_key(struct rt2x00_dev *rt2x00dev,
339 struct rt2x00lib_crypto *crypto,
340 struct ieee80211_key_conf *key)
341{
342 int timeout;
343 u32 mask;
344 u16 reg;
345
346 if (crypto->cmd == SET_KEY) {
347 /*
348 * Pairwise key will always be entry 0, but this
349 * could collide with a shared key on the same
350 * position...
351 */
352 mask = TXRX_CSR0_KEY_ID.bit_mask;
353
354 rt2500usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
355 reg &= mask;
356
357 if (reg && reg == mask)
358 return -ENOSPC;
359
360 reg = rt2x00_get_field16(reg, TXRX_CSR0_KEY_ID);
361
362 key->hw_key_idx += reg ? ffz(reg) : 0;
363
364 /*
365 * The encryption key doesn't fit within the CSR cache,
366 * this means we should allocate it seperately and use
367 * rt2x00usb_vendor_request() to send the key to the hardware.
368 */
369 reg = KEY_ENTRY(key->hw_key_idx);
370 timeout = REGISTER_TIMEOUT32(sizeof(crypto->key));
371 rt2x00usb_vendor_request_large_buff(rt2x00dev, USB_MULTI_WRITE,
372 USB_VENDOR_REQUEST_OUT, reg,
373 crypto->key,
374 sizeof(crypto->key),
375 timeout);
376
377 /*
378 * The driver does not support the IV/EIV generation
f3d340c1
ID		 379 * in hardware. However it demands the data to be provided
380 * both seperately as well as inside the frame.
381 * We already provided the CONFIG_CRYPTO_COPY_IV to rt2x00lib
382 * to ensure rt2x00lib will not strip the data from the
383 * frame after the copy, now we must tell mac80211
dddfb478
ID		 384 * to generate the IV/EIV data.
385 */
386 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
387 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
388 }
389
390 /*
391 * TXRX_CSR0_KEY_ID contains only single-bit fields to indicate
392 * a particular key is valid.
393 */
394 rt2500usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
395 rt2x00_set_field16(&reg, TXRX_CSR0_ALGORITHM, crypto->cipher);
396 rt2x00_set_field16(&reg, TXRX_CSR0_IV_OFFSET, IEEE80211_HEADER);
397
398 mask = rt2x00_get_field16(reg, TXRX_CSR0_KEY_ID);
399 if (crypto->cmd == SET_KEY)
400 mask |= 1 << key->hw_key_idx;
401 else if (crypto->cmd == DISABLE_KEY)
402 mask &= ~(1 << key->hw_key_idx);
403 rt2x00_set_field16(&reg, TXRX_CSR0_KEY_ID, mask);
404 rt2500usb_register_write(rt2x00dev, TXRX_CSR0, reg);
405
406 return 0;
407}
408
3a643d24
ID		 409static void rt2500usb_config_filter(struct rt2x00_dev *rt2x00dev,
410 const unsigned int filter_flags)
411{
412 u16 reg;
413
414 /*
415 * Start configuration steps.
416 * Note that the version error will always be dropped
417 * and broadcast frames will always be accepted since
418 * there is no filter for it at this time.
419 */
420 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
421 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_CRC,
422 !(filter_flags & FIF_FCSFAIL));
423 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_PHYSICAL,
424 !(filter_flags & FIF_PLCPFAIL));
425 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_CONTROL,
426 !(filter_flags & FIF_CONTROL));
427 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_NOT_TO_ME,
428 !(filter_flags & FIF_PROMISC_IN_BSS));
429 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_TODS,
e0b005fa
ID		 430 !(filter_flags & FIF_PROMISC_IN_BSS) &&
431 !rt2x00dev->intf_ap_count);
3a643d24
ID		 432 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_VERSION_ERROR, 1);
433 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_MULTICAST,
434 !(filter_flags & FIF_ALLMULTI));
435 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_BROADCAST, 0);
436 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
437}
438
6bb40dd1
ID		 439static void rt2500usb_config_intf(struct rt2x00_dev *rt2x00dev,
440 struct rt2x00_intf *intf,
441 struct rt2x00intf_conf *conf,
442 const unsigned int flags)
95ea3627 443{
6bb40dd1 444 unsigned int bcn_preload;
95ea3627
ID		 445 u16 reg;
446
6bb40dd1 447 if (flags & CONFIG_UPDATE_TYPE) {
6bb40dd1
ID		 448 /*
449 * Enable beacon config
450 */
bad13639 451 bcn_preload = PREAMBLE + GET_DURATION(IEEE80211_HEADER, 20);
6bb40dd1
ID		 452 rt2500usb_register_read(rt2x00dev, TXRX_CSR20, &reg);
453 rt2x00_set_field16(&reg, TXRX_CSR20_OFFSET, bcn_preload >> 6);
454 rt2x00_set_field16(&reg, TXRX_CSR20_BCN_EXPECT_WINDOW,
05c914fe 455 2 * (conf->type != NL80211_IFTYPE_STATION));
6bb40dd1 456 rt2500usb_register_write(rt2x00dev, TXRX_CSR20, reg);
95ea3627 457
6bb40dd1
ID		 458 /*
459 * Enable synchronisation.
460 */
461 rt2500usb_register_read(rt2x00dev, TXRX_CSR18, &reg);
462 rt2x00_set_field16(&reg, TXRX_CSR18_OFFSET, 0);
463 rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg);
464
465 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
fd3c91c5 466 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 1);
6bb40dd1 467 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_SYNC, conf->sync);
fd3c91c5 468 rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 1);
6bb40dd1
ID		 469 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
470 }
95ea3627 471
6bb40dd1
ID		 472 if (flags & CONFIG_UPDATE_MAC)
473 rt2500usb_register_multiwrite(rt2x00dev, MAC_CSR2, conf->mac,
474 (3 * sizeof(__le16)));
475
476 if (flags & CONFIG_UPDATE_BSSID)
477 rt2500usb_register_multiwrite(rt2x00dev, MAC_CSR5, conf->bssid,
478 (3 * sizeof(__le16)));
95ea3627
ID		 479}
480
3a643d24
ID		 481static void rt2500usb_config_erp(struct rt2x00_dev *rt2x00dev,
482 struct rt2x00lib_erp *erp)
95ea3627 483{
95ea3627 484 u16 reg;
95ea3627 485
95ea3627 486 rt2500usb_register_read(rt2x00dev, TXRX_CSR1, &reg);
72810379 487 rt2x00_set_field16(&reg, TXRX_CSR1_ACK_TIMEOUT, erp->ack_timeout);
95ea3627
ID		 488 rt2500usb_register_write(rt2x00dev, TXRX_CSR1, reg);
489
490 rt2500usb_register_read(rt2x00dev, TXRX_CSR10, &reg);
4f5af6eb 491 rt2x00_set_field16(&reg, TXRX_CSR10_AUTORESPOND_PREAMBLE,
72810379 492 !!erp->short_preamble);
95ea3627 493 rt2500usb_register_write(rt2x00dev, TXRX_CSR10, reg);
95ea3627 494
e4ea1c40 495 rt2500usb_register_write(rt2x00dev, TXRX_CSR11, erp->basic_rates);
95ea3627 496
e4ea1c40
ID		 497 rt2500usb_register_write(rt2x00dev, MAC_CSR10, erp->slot_time);
498 rt2500usb_register_write(rt2x00dev, MAC_CSR11, erp->sifs);
499 rt2500usb_register_write(rt2x00dev, MAC_CSR12, erp->eifs);
95ea3627
ID		 500}
501
e4ea1c40
ID		 502static void rt2500usb_config_ant(struct rt2x00_dev *rt2x00dev,
503 struct antenna_setup *ant)
95ea3627
ID		 504{
505 u8 r2;
506 u8 r14;
507 u16 csr5;
508 u16 csr6;
509
a4fe07d9
ID		 510 /*
511 * We should never come here because rt2x00lib is supposed
512 * to catch this and send us the correct antenna explicitely.
513 */
514 BUG_ON(ant->rx == ANTENNA_SW_DIVERSITY ||
515 ant->tx == ANTENNA_SW_DIVERSITY);
516
95ea3627
ID		 517 rt2500usb_bbp_read(rt2x00dev, 2, &r2);
518 rt2500usb_bbp_read(rt2x00dev, 14, &r14);
519 rt2500usb_register_read(rt2x00dev, PHY_CSR5, &csr5);
520 rt2500usb_register_read(rt2x00dev, PHY_CSR6, &csr6);
521
522 /*
523 * Configure the TX antenna.
524 */
addc81bd 525 switch (ant->tx) {
95ea3627
ID		 526 case ANTENNA_HW_DIVERSITY:
527 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 1);
528 rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 1);
529 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 1);
530 break;
531 case ANTENNA_A:
532 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 0);
533 rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 0);
534 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 0);
535 break;
536 case ANTENNA_B:
a4fe07d9 537 default:
95ea3627
ID		 538 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 2);
539 rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 2);
540 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 2);
541 break;
542 }
543
544 /*
545 * Configure the RX antenna.
546 */
addc81bd 547 switch (ant->rx) {
95ea3627
ID		 548 case ANTENNA_HW_DIVERSITY:
549 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 1);
550 break;
551 case ANTENNA_A:
552 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 0);
553 break;
554 case ANTENNA_B:
a4fe07d9 555 default:
95ea3627
ID		 556 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 2);
557 break;
558 }
559
560 /*
561 * RT2525E and RT5222 need to flip TX I/Q
562 */
563 if (rt2x00_rf(&rt2x00dev->chip, RF2525E) ||
564 rt2x00_rf(&rt2x00dev->chip, RF5222)) {
565 rt2x00_set_field8(&r2, BBP_R2_TX_IQ_FLIP, 1);
566 rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 1);
567 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 1);
568
569 /*
570 * RT2525E does not need RX I/Q Flip.
571 */
572 if (rt2x00_rf(&rt2x00dev->chip, RF2525E))
573 rt2x00_set_field8(&r14, BBP_R14_RX_IQ_FLIP, 0);
574 } else {
575 rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 0);
576 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 0);
577 }
578
579 rt2500usb_bbp_write(rt2x00dev, 2, r2);
580 rt2500usb_bbp_write(rt2x00dev, 14, r14);
581 rt2500usb_register_write(rt2x00dev, PHY_CSR5, csr5);
582 rt2500usb_register_write(rt2x00dev, PHY_CSR6, csr6);
583}
584
e4ea1c40
ID		 585static void rt2500usb_config_channel(struct rt2x00_dev *rt2x00dev,
586 struct rf_channel *rf, const int txpower)
587{
588 /*
589 * Set TXpower.
590 */
591 rt2x00_set_field32(&rf->rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
592
593 /*
594 * For RT2525E we should first set the channel to half band higher.
595 */
596 if (rt2x00_rf(&rt2x00dev->chip, RF2525E)) {
597 static const u32 vals[] = {
598 0x000008aa, 0x000008ae, 0x000008ae, 0x000008b2,
599 0x000008b2, 0x000008b6, 0x000008b6, 0x000008ba,
600 0x000008ba, 0x000008be, 0x000008b7, 0x00000902,
601 0x00000902, 0x00000906
602 };
603
604 rt2500usb_rf_write(rt2x00dev, 2, vals[rf->channel - 1]);
605 if (rf->rf4)
606 rt2500usb_rf_write(rt2x00dev, 4, rf->rf4);
607 }
608
609 rt2500usb_rf_write(rt2x00dev, 1, rf->rf1);
610 rt2500usb_rf_write(rt2x00dev, 2, rf->rf2);
611 rt2500usb_rf_write(rt2x00dev, 3, rf->rf3);
612 if (rf->rf4)
613 rt2500usb_rf_write(rt2x00dev, 4, rf->rf4);
614}
615
616static void rt2500usb_config_txpower(struct rt2x00_dev *rt2x00dev,
617 const int txpower)
618{
619 u32 rf3;
620
621 rt2x00_rf_read(rt2x00dev, 3, &rf3);
622 rt2x00_set_field32(&rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
623 rt2500usb_rf_write(rt2x00dev, 3, rf3);
624}
625
95ea3627 626static void rt2500usb_config_duration(struct rt2x00_dev *rt2x00dev,
5c58ee51 627 struct rt2x00lib_conf *libconf)
95ea3627
ID		 628{
629 u16 reg;
630
95ea3627 631 rt2500usb_register_read(rt2x00dev, TXRX_CSR18, &reg);
5c58ee51
ID		 632 rt2x00_set_field16(&reg, TXRX_CSR18_INTERVAL,
633 libconf->conf->beacon_int * 4);
95ea3627
ID		 634 rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg);
635}
636
637static void rt2500usb_config(struct rt2x00_dev *rt2x00dev,
6bb40dd1
ID		 638 struct rt2x00lib_conf *libconf,
639 const unsigned int flags)
95ea3627 640{
e4ea1c40 641 if (flags & IEEE80211_CONF_CHANGE_CHANNEL)
5c58ee51
ID		 642 rt2500usb_config_channel(rt2x00dev, &libconf->rf,
643 libconf->conf->power_level);
e4ea1c40
ID		 644 if ((flags & IEEE80211_CONF_CHANGE_POWER) &&
645 !(flags & IEEE80211_CONF_CHANGE_CHANNEL))
5c58ee51
ID		 646 rt2500usb_config_txpower(rt2x00dev,
647 libconf->conf->power_level);
e4ea1c40 648 if (flags & IEEE80211_CONF_CHANGE_BEACON_INTERVAL)
5c58ee51 649 rt2500usb_config_duration(rt2x00dev, libconf);
95ea3627
ID		 650}
651
95ea3627
ID		 652/*
653 * Link tuning
654 */
ebcf26da
ID		 655static void rt2500usb_link_stats(struct rt2x00_dev *rt2x00dev,
656 struct link_qual *qual)
95ea3627
ID		 657{
658 u16 reg;
659
660 /*
661 * Update FCS error count from register.
662 */
663 rt2500usb_register_read(rt2x00dev, STA_CSR0, &reg);
ebcf26da 664 qual->rx_failed = rt2x00_get_field16(reg, STA_CSR0_FCS_ERROR);
95ea3627
ID		 665
666 /*
667 * Update False CCA count from register.
668 */
669 rt2500usb_register_read(rt2x00dev, STA_CSR3, &reg);
ebcf26da 670 qual->false_cca = rt2x00_get_field16(reg, STA_CSR3_FALSE_CCA_ERROR);
95ea3627
ID		 671}
672
673static void rt2500usb_reset_tuner(struct rt2x00_dev *rt2x00dev)
674{
675 u16 eeprom;
676 u16 value;
677
678 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &eeprom);
679 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R24_LOW);
680 rt2500usb_bbp_write(rt2x00dev, 24, value);
681
682 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &eeprom);
683 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R25_LOW);
684 rt2500usb_bbp_write(rt2x00dev, 25, value);
685
686 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &eeprom);
687 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R61_LOW);
688 rt2500usb_bbp_write(rt2x00dev, 61, value);
689
690 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &eeprom);
691 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_VGCUPPER);
692 rt2500usb_bbp_write(rt2x00dev, 17, value);
693
694 rt2x00dev->link.vgc_level = value;
695}
696
d06193f3
ID		 697/*
698 * NOTE: This function is directly ported from legacy driver, but
699 * despite it being declared it was never called. Although link tuning
700 * sounds like a good idea, and usually works well for the other drivers,
701 * it does _not_ work with rt2500usb. Enabling this function will result
702 * in TX capabilities only until association kicks in. Immediately
703 * after the successful association all TX frames will be kept in the
704 * hardware queue and never transmitted.
705 */
706#if 0
95ea3627
ID		 707static void rt2500usb_link_tuner(struct rt2x00_dev *rt2x00dev)
708{
709 int rssi = rt2x00_get_link_rssi(&rt2x00dev->link);
710 u16 bbp_thresh;
711 u16 vgc_bound;
712 u16 sens;
713 u16 r24;
714 u16 r25;
715 u16 r61;
716 u16 r17_sens;
717 u8 r17;
718 u8 up_bound;
719 u8 low_bound;
720
6bb40dd1
ID		 721 /*
722 * Read current r17 value, as well as the sensitivity values
723 * for the r17 register.
724 */
725 rt2500usb_bbp_read(rt2x00dev, 17, &r17);
726 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R17, &r17_sens);
727
728 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &vgc_bound);
729 up_bound = rt2x00_get_field16(vgc_bound, EEPROM_BBPTUNE_VGCUPPER);
730 low_bound = rt2x00_get_field16(vgc_bound, EEPROM_BBPTUNE_VGCLOWER);
731
732 /*
733 * If we are not associated, we should go straight to the
734 * dynamic CCA tuning.
735 */
736 if (!rt2x00dev->intf_associated)
737 goto dynamic_cca_tune;
738
95ea3627
ID		 739 /*
740 * Determine the BBP tuning threshold and correctly
741 * set BBP 24, 25 and 61.
742 */
743 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE, &bbp_thresh);
744 bbp_thresh = rt2x00_get_field16(bbp_thresh, EEPROM_BBPTUNE_THRESHOLD);
745
746 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &r24);
747 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &r25);
748 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &r61);
749
750 if ((rssi + bbp_thresh) > 0) {
751 r24 = rt2x00_get_field16(r24, EEPROM_BBPTUNE_R24_HIGH);
752 r25 = rt2x00_get_field16(r25, EEPROM_BBPTUNE_R25_HIGH);
753 r61 = rt2x00_get_field16(r61, EEPROM_BBPTUNE_R61_HIGH);
754 } else {
755 r24 = rt2x00_get_field16(r24, EEPROM_BBPTUNE_R24_LOW);
756 r25 = rt2x00_get_field16(r25, EEPROM_BBPTUNE_R25_LOW);
757 r61 = rt2x00_get_field16(r61, EEPROM_BBPTUNE_R61_LOW);
758 }
759
760 rt2500usb_bbp_write(rt2x00dev, 24, r24);
761 rt2500usb_bbp_write(rt2x00dev, 25, r25);
762 rt2500usb_bbp_write(rt2x00dev, 61, r61);
763
95ea3627
ID		 764 /*
765 * A too low RSSI will cause too much false CCA which will
766 * then corrupt the R17 tuning. To remidy this the tuning should
767 * be stopped (While making sure the R17 value will not exceed limits)
768 */
769 if (rssi >= -40) {
770 if (r17 != 0x60)
771 rt2500usb_bbp_write(rt2x00dev, 17, 0x60);
772 return;
773 }
774
775 /*
776 * Special big-R17 for short distance
777 */
778 if (rssi >= -58) {
779 sens = rt2x00_get_field16(r17_sens, EEPROM_BBPTUNE_R17_LOW);
780 if (r17 != sens)
781 rt2500usb_bbp_write(rt2x00dev, 17, sens);
782 return;
783 }
784
785 /*
786 * Special mid-R17 for middle distance
787 */
788 if (rssi >= -74) {
789 sens = rt2x00_get_field16(r17_sens, EEPROM_BBPTUNE_R17_HIGH);
790 if (r17 != sens)
791 rt2500usb_bbp_write(rt2x00dev, 17, sens);
792 return;
793 }
794
795 /*
796 * Leave short or middle distance condition, restore r17
797 * to the dynamic tuning range.
798 */
95ea3627 799 low_bound = 0x32;
6bb40dd1
ID		 800 if (rssi < -77)
801 up_bound -= (-77 - rssi);
95ea3627
ID		 802
803 if (up_bound < low_bound)
804 up_bound = low_bound;
805
806 if (r17 > up_bound) {
807 rt2500usb_bbp_write(rt2x00dev, 17, up_bound);
808 rt2x00dev->link.vgc_level = up_bound;
6bb40dd1
ID		 809 return;
810 }
811
812dynamic_cca_tune:
813
814 /*
815 * R17 is inside the dynamic tuning range,
816 * start tuning the link based on the false cca counter.
817 */
818 if (rt2x00dev->link.qual.false_cca > 512 && r17 < up_bound) {
95ea3627
ID		 819 rt2500usb_bbp_write(rt2x00dev, 17, ++r17);
820 rt2x00dev->link.vgc_level = r17;
ebcf26da 821 } else if (rt2x00dev->link.qual.false_cca < 100 && r17 > low_bound) {
95ea3627
ID		 822 rt2500usb_bbp_write(rt2x00dev, 17, --r17);
823 rt2x00dev->link.vgc_level = r17;
824 }
825}
d06193f3
ID		 826#else
827#define rt2500usb_link_tuner NULL
828#endif
95ea3627
ID		 829
830/*
831 * Initialization functions.
832 */
833static int rt2500usb_init_registers(struct rt2x00_dev *rt2x00dev)
834{
835 u16 reg;
836
837 rt2x00usb_vendor_request_sw(rt2x00dev, USB_DEVICE_MODE, 0x0001,
838 USB_MODE_TEST, REGISTER_TIMEOUT);
839 rt2x00usb_vendor_request_sw(rt2x00dev, USB_SINGLE_WRITE, 0x0308,
840 0x00f0, REGISTER_TIMEOUT);
841
842 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
843 rt2x00_set_field16(&reg, TXRX_CSR2_DISABLE_RX, 1);
844 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
845
846 rt2500usb_register_write(rt2x00dev, MAC_CSR13, 0x1111);
847 rt2500usb_register_write(rt2x00dev, MAC_CSR14, 0x1e11);
848
849 rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
850 rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 1);
851 rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 1);
852 rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 0);
853 rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
854
855 rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
856 rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 0);
857 rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 0);
858 rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 0);
859 rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
860
861 rt2500usb_register_read(rt2x00dev, TXRX_CSR5, &reg);
862 rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID0, 13);
863 rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID0_VALID, 1);
864 rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID1, 12);
865 rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID1_VALID, 1);
866 rt2500usb_register_write(rt2x00dev, TXRX_CSR5, reg);
867
868 rt2500usb_register_read(rt2x00dev, TXRX_CSR6, &reg);
869 rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID0, 10);
870 rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID0_VALID, 1);
871 rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID1, 11);
872 rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID1_VALID, 1);
873 rt2500usb_register_write(rt2x00dev, TXRX_CSR6, reg);
874
875 rt2500usb_register_read(rt2x00dev, TXRX_CSR7, &reg);
876 rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID0, 7);
877 rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID0_VALID, 1);
878 rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID1, 6);
879 rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID1_VALID, 1);
880 rt2500usb_register_write(rt2x00dev, TXRX_CSR7, reg);
881
882 rt2500usb_register_read(rt2x00dev, TXRX_CSR8, &reg);
883 rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID0, 5);
884 rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID0_VALID, 1);
885 rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID1, 0);
886 rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID1_VALID, 0);
887 rt2500usb_register_write(rt2x00dev, TXRX_CSR8, reg);
888
1f909162
ID		 889 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
890 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 0);
891 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_SYNC, 0);
892 rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 0);
893 rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 0);
894 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
895
95ea3627
ID		 896 rt2500usb_register_write(rt2x00dev, TXRX_CSR21, 0xe78f);
897 rt2500usb_register_write(rt2x00dev, MAC_CSR9, 0xff1d);
898
899 if (rt2x00dev->ops->lib->set_device_state(rt2x00dev, STATE_AWAKE))
900 return -EBUSY;
901
902 rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
903 rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 0);
904 rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 0);
905 rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 1);
906 rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
907
755a957d 908 if (rt2x00_rev(&rt2x00dev->chip) >= RT2570_VERSION_C) {
95ea3627 909 rt2500usb_register_read(rt2x00dev, PHY_CSR2, &reg);
ddc827f9 910 rt2x00_set_field16(&reg, PHY_CSR2_LNA, 0);
95ea3627 911 } else {
ddc827f9
ID		 912 reg = 0;
913 rt2x00_set_field16(&reg, PHY_CSR2_LNA, 1);
914 rt2x00_set_field16(&reg, PHY_CSR2_LNA_MODE, 3);
95ea3627
ID		 915 }
916 rt2500usb_register_write(rt2x00dev, PHY_CSR2, reg);
917
918 rt2500usb_register_write(rt2x00dev, MAC_CSR11, 0x0002);
919 rt2500usb_register_write(rt2x00dev, MAC_CSR22, 0x0053);
920 rt2500usb_register_write(rt2x00dev, MAC_CSR15, 0x01ee);
921 rt2500usb_register_write(rt2x00dev, MAC_CSR16, 0x0000);
922
923 rt2500usb_register_read(rt2x00dev, MAC_CSR8, &reg);
924 rt2x00_set_field16(&reg, MAC_CSR8_MAX_FRAME_UNIT,
925 rt2x00dev->rx->data_size);
926 rt2500usb_register_write(rt2x00dev, MAC_CSR8, reg);
927
928 rt2500usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
929 rt2x00_set_field16(&reg, TXRX_CSR0_IV_OFFSET, IEEE80211_HEADER);
dddfb478 930 rt2x00_set_field16(&reg, TXRX_CSR0_KEY_ID, 0);
95ea3627
ID		 931 rt2500usb_register_write(rt2x00dev, TXRX_CSR0, reg);
932
933 rt2500usb_register_read(rt2x00dev, MAC_CSR18, &reg);
934 rt2x00_set_field16(&reg, MAC_CSR18_DELAY_AFTER_BEACON, 90);
935 rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
936
937 rt2500usb_register_read(rt2x00dev, PHY_CSR4, &reg);
938 rt2x00_set_field16(&reg, PHY_CSR4_LOW_RF_LE, 1);
939 rt2500usb_register_write(rt2x00dev, PHY_CSR4, reg);
940
941 rt2500usb_register_read(rt2x00dev, TXRX_CSR1, &reg);
942 rt2x00_set_field16(&reg, TXRX_CSR1_AUTO_SEQUENCE, 1);
943 rt2500usb_register_write(rt2x00dev, TXRX_CSR1, reg);
944
945 return 0;
946}
947
2b08da3f 948static int rt2500usb_wait_bbp_ready(struct rt2x00_dev *rt2x00dev)
95ea3627
ID		 949{
950 unsigned int i;
95ea3627 951 u8 value;
95ea3627
ID		 952
953 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
954 rt2500usb_bbp_read(rt2x00dev, 0, &value);
955 if ((value != 0xff) && (value != 0x00))
2b08da3f 956 return 0;
95ea3627
ID		 957 udelay(REGISTER_BUSY_DELAY);
958 }
959
960 ERROR(rt2x00dev, "BBP register access failed, aborting.\n");
961 return -EACCES;
2b08da3f
ID		 962}
963
964static int rt2500usb_init_bbp(struct rt2x00_dev *rt2x00dev)
965{
966 unsigned int i;
967 u16 eeprom;
968 u8 value;
969 u8 reg_id;
970
971 if (unlikely(rt2500usb_wait_bbp_ready(rt2x00dev)))
972 return -EACCES;
95ea3627 973
95ea3627
ID		 974 rt2500usb_bbp_write(rt2x00dev, 3, 0x02);
975 rt2500usb_bbp_write(rt2x00dev, 4, 0x19);
976 rt2500usb_bbp_write(rt2x00dev, 14, 0x1c);
977 rt2500usb_bbp_write(rt2x00dev, 15, 0x30);
978 rt2500usb_bbp_write(rt2x00dev, 16, 0xac);
979 rt2500usb_bbp_write(rt2x00dev, 18, 0x18);
980 rt2500usb_bbp_write(rt2x00dev, 19, 0xff);
981 rt2500usb_bbp_write(rt2x00dev, 20, 0x1e);
982 rt2500usb_bbp_write(rt2x00dev, 21, 0x08);
983 rt2500usb_bbp_write(rt2x00dev, 22, 0x08);
984 rt2500usb_bbp_write(rt2x00dev, 23, 0x08);
985 rt2500usb_bbp_write(rt2x00dev, 24, 0x80);
986 rt2500usb_bbp_write(rt2x00dev, 25, 0x50);
987 rt2500usb_bbp_write(rt2x00dev, 26, 0x08);
988 rt2500usb_bbp_write(rt2x00dev, 27, 0x23);
989 rt2500usb_bbp_write(rt2x00dev, 30, 0x10);
990 rt2500usb_bbp_write(rt2x00dev, 31, 0x2b);
991 rt2500usb_bbp_write(rt2x00dev, 32, 0xb9);
992 rt2500usb_bbp_write(rt2x00dev, 34, 0x12);
993 rt2500usb_bbp_write(rt2x00dev, 35, 0x50);
994 rt2500usb_bbp_write(rt2x00dev, 39, 0xc4);
995 rt2500usb_bbp_write(rt2x00dev, 40, 0x02);
996 rt2500usb_bbp_write(rt2x00dev, 41, 0x60);
997 rt2500usb_bbp_write(rt2x00dev, 53, 0x10);
998 rt2500usb_bbp_write(rt2x00dev, 54, 0x18);
999 rt2500usb_bbp_write(rt2x00dev, 56, 0x08);
1000 rt2500usb_bbp_write(rt2x00dev, 57, 0x10);
1001 rt2500usb_bbp_write(rt2x00dev, 58, 0x08);
1002 rt2500usb_bbp_write(rt2x00dev, 61, 0x60);
1003 rt2500usb_bbp_write(rt2x00dev, 62, 0x10);
1004 rt2500usb_bbp_write(rt2x00dev, 75, 0xff);
1005
95ea3627
ID		 1006 for (i = 0; i < EEPROM_BBP_SIZE; i++) {
1007 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBP_START + i, &eeprom);
1008
1009 if (eeprom != 0xffff && eeprom != 0x0000) {
1010 reg_id = rt2x00_get_field16(eeprom, EEPROM_BBP_REG_ID);
1011 value = rt2x00_get_field16(eeprom, EEPROM_BBP_VALUE);
95ea3627
ID		 1012 rt2500usb_bbp_write(rt2x00dev, reg_id, value);
1013 }
1014 }
95ea3627
ID		 1015
1016 return 0;
1017}
1018
1019/*
1020 * Device state switch handlers.
1021 */
1022static void rt2500usb_toggle_rx(struct rt2x00_dev *rt2x00dev,
1023 enum dev_state state)
1024{
1025 u16 reg;
1026
1027 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
1028 rt2x00_set_field16(&reg, TXRX_CSR2_DISABLE_RX,
2b08da3f
ID		 1029 (state == STATE_RADIO_RX_OFF) ||
1030 (state == STATE_RADIO_RX_OFF_LINK));
95ea3627
ID		 1031 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
1032}
1033
1034static int rt2500usb_enable_radio(struct rt2x00_dev *rt2x00dev)
1035{
1036 /*
1037 * Initialize all registers.
1038 */
2b08da3f
ID		 1039 if (unlikely(rt2500usb_init_registers(rt2x00dev) ||
1040 rt2500usb_init_bbp(rt2x00dev)))
95ea3627 1041 return -EIO;
95ea3627 1042
95ea3627
ID		 1043 return 0;
1044}
1045
1046static void rt2500usb_disable_radio(struct rt2x00_dev *rt2x00dev)
1047{
95ea3627
ID		 1048 rt2500usb_register_write(rt2x00dev, MAC_CSR13, 0x2121);
1049 rt2500usb_register_write(rt2x00dev, MAC_CSR14, 0x2121);
1050
1051 /*
1052 * Disable synchronisation.
1053 */
1054 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
1055
1056 rt2x00usb_disable_radio(rt2x00dev);
1057}
1058
1059static int rt2500usb_set_state(struct rt2x00_dev *rt2x00dev,
1060 enum dev_state state)
1061{
1062 u16 reg;
1063 u16 reg2;
1064 unsigned int i;
1065 char put_to_sleep;
1066 char bbp_state;
1067 char rf_state;
1068
1069 put_to_sleep = (state != STATE_AWAKE);
1070
1071 reg = 0;
1072 rt2x00_set_field16(&reg, MAC_CSR17_BBP_DESIRE_STATE, state);
1073 rt2x00_set_field16(&reg, MAC_CSR17_RF_DESIRE_STATE, state);
1074 rt2x00_set_field16(&reg, MAC_CSR17_PUT_TO_SLEEP, put_to_sleep);
1075 rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
1076 rt2x00_set_field16(&reg, MAC_CSR17_SET_STATE, 1);
1077 rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
1078
1079 /*
1080 * Device is not guaranteed to be in the requested state yet.
1081 * We must wait until the register indicates that the
1082 * device has entered the correct state.
1083 */
1084 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
1085 rt2500usb_register_read(rt2x00dev, MAC_CSR17, &reg2);
1086 bbp_state = rt2x00_get_field16(reg2, MAC_CSR17_BBP_CURR_STATE);
1087 rf_state = rt2x00_get_field16(reg2, MAC_CSR17_RF_CURR_STATE);
1088 if (bbp_state == state && rf_state == state)
1089 return 0;
1090 rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
1091 msleep(30);
1092 }
1093
95ea3627
ID		 1094 return -EBUSY;
1095}
1096
1097static int rt2500usb_set_device_state(struct rt2x00_dev *rt2x00dev,
1098 enum dev_state state)
1099{
1100 int retval = 0;
1101
1102 switch (state) {
1103 case STATE_RADIO_ON:
1104 retval = rt2500usb_enable_radio(rt2x00dev);
1105 break;
1106 case STATE_RADIO_OFF:
1107 rt2500usb_disable_radio(rt2x00dev);
1108 break;
1109 case STATE_RADIO_RX_ON:
61667d8d 1110 case STATE_RADIO_RX_ON_LINK:
95ea3627 1111 case STATE_RADIO_RX_OFF:
61667d8d 1112 case STATE_RADIO_RX_OFF_LINK:
2b08da3f
ID		 1113 rt2500usb_toggle_rx(rt2x00dev, state);
1114 break;
1115 case STATE_RADIO_IRQ_ON:
1116 case STATE_RADIO_IRQ_OFF:
1117 /* No support, but no error either */
95ea3627
ID		 1118 break;
1119 case STATE_DEEP_SLEEP:
1120 case STATE_SLEEP:
1121 case STATE_STANDBY:
1122 case STATE_AWAKE:
1123 retval = rt2500usb_set_state(rt2x00dev, state);
1124 break;
1125 default:
1126 retval = -ENOTSUPP;
1127 break;
1128 }
1129
2b08da3f
ID		 1130 if (unlikely(retval))
1131 ERROR(rt2x00dev, "Device failed to enter state %d (%d).\n",
1132 state, retval);
1133
95ea3627
ID		 1134 return retval;
1135}
1136
1137/*
1138 * TX descriptor initialization
1139 */
1140static void rt2500usb_write_tx_desc(struct rt2x00_dev *rt2x00dev,
dd3193e1 1141 struct sk_buff *skb,
61486e0f 1142 struct txentry_desc *txdesc)
95ea3627 1143{
181d6902 1144 struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb);
dd3193e1 1145 __le32 *txd = skbdesc->desc;
95ea3627
ID		 1146 u32 word;
1147
1148 /*
1149 * Start writing the descriptor words.
1150 */
1151 rt2x00_desc_read(txd, 1, &word);
dddfb478 1152 rt2x00_set_field32(&word, TXD_W1_IV_OFFSET, txdesc->iv_offset);
181d6902
ID		 1153 rt2x00_set_field32(&word, TXD_W1_AIFS, txdesc->aifs);
1154 rt2x00_set_field32(&word, TXD_W1_CWMIN, txdesc->cw_min);
1155 rt2x00_set_field32(&word, TXD_W1_CWMAX, txdesc->cw_max);
95ea3627
ID		 1156 rt2x00_desc_write(txd, 1, word);
1157
1158 rt2x00_desc_read(txd, 2, &word);
181d6902
ID		 1159 rt2x00_set_field32(&word, TXD_W2_PLCP_SIGNAL, txdesc->signal);
1160 rt2x00_set_field32(&word, TXD_W2_PLCP_SERVICE, txdesc->service);
1161 rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_LOW, txdesc->length_low);
1162 rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_HIGH, txdesc->length_high);
95ea3627
ID		 1163 rt2x00_desc_write(txd, 2, word);
1164
dddfb478
ID		 1165 if (test_bit(ENTRY_TXD_ENCRYPT, &txdesc->flags)) {
1166 _rt2x00_desc_write(txd, 3, skbdesc->iv[0]);
1167 _rt2x00_desc_write(txd, 4, skbdesc->iv[1]);
1168 }
1169
95ea3627 1170 rt2x00_desc_read(txd, 0, &word);
61486e0f 1171 rt2x00_set_field32(&word, TXD_W0_RETRY_LIMIT, txdesc->retry_limit);
95ea3627 1172 rt2x00_set_field32(&word, TXD_W0_MORE_FRAG,
181d6902 1173 test_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags));
95ea3627 1174 rt2x00_set_field32(&word, TXD_W0_ACK,
181d6902 1175 test_bit(ENTRY_TXD_ACK, &txdesc->flags));
95ea3627 1176 rt2x00_set_field32(&word, TXD_W0_TIMESTAMP,
181d6902 1177 test_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags));
95ea3627 1178 rt2x00_set_field32(&word, TXD_W0_OFDM,
181d6902 1179 test_bit(ENTRY_TXD_OFDM_RATE, &txdesc->flags));
95ea3627 1180 rt2x00_set_field32(&word, TXD_W0_NEW_SEQ,
61486e0f 1181 test_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags));
181d6902 1182 rt2x00_set_field32(&word, TXD_W0_IFS, txdesc->ifs);
1abc3656 1183 rt2x00_set_field32(&word, TXD_W0_DATABYTE_COUNT, skb->len);
f1dd2b23 1184 rt2x00_set_field32(&word, TXD_W0_CIPHER, !!txdesc->cipher);
dddfb478 1185 rt2x00_set_field32(&word, TXD_W0_KEY_ID, txdesc->key_idx);
95ea3627
ID		 1186 rt2x00_desc_write(txd, 0, word);
1187}
1188
bd88a781
ID		 1189/*
1190 * TX data initialization
1191 */
1192static void rt2500usb_beacondone(struct urb *urb);
1193
1194static void rt2500usb_write_beacon(struct queue_entry *entry)
1195{
1196 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
1197 struct usb_device *usb_dev = to_usb_device_intf(rt2x00dev->dev);
1198 struct queue_entry_priv_usb_bcn *bcn_priv = entry->priv_data;
1199 struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
f1ca2167 1200 int pipe = usb_sndbulkpipe(usb_dev, entry->queue->usb_endpoint);
bd88a781
ID		 1201 int length;
1202 u16 reg;
1203
1204 /*
1205 * Add the descriptor in front of the skb.
1206 */
1207 skb_push(entry->skb, entry->queue->desc_size);
1208 memcpy(entry->skb->data, skbdesc->desc, skbdesc->desc_len);
1209 skbdesc->desc = entry->skb->data;
1210
1211 /*
1212 * Disable beaconing while we are reloading the beacon data,
1213 * otherwise we might be sending out invalid data.
1214 */
1215 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
1216 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 0);
1217 rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 0);
1218 rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 0);
1219 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1220
1221 /*
1222 * USB devices cannot blindly pass the skb->len as the
1223 * length of the data to usb_fill_bulk_urb. Pass the skb
1224 * to the driver to determine what the length should be.
1225 */
f1ca2167 1226 length = rt2x00dev->ops->lib->get_tx_data_len(entry);
bd88a781
ID		 1227
1228 usb_fill_bulk_urb(bcn_priv->urb, usb_dev, pipe,
1229 entry->skb->data, length, rt2500usb_beacondone,
1230 entry);
1231
1232 /*
1233 * Second we need to create the guardian byte.
1234 * We only need a single byte, so lets recycle
1235 * the 'flags' field we are not using for beacons.
1236 */
1237 bcn_priv->guardian_data = 0;
1238 usb_fill_bulk_urb(bcn_priv->guardian_urb, usb_dev, pipe,
1239 &bcn_priv->guardian_data, 1, rt2500usb_beacondone,
1240 entry);
1241
1242 /*
1243 * Send out the guardian byte.
1244 */
1245 usb_submit_urb(bcn_priv->guardian_urb, GFP_ATOMIC);
1246}
1247
f1ca2167 1248static int rt2500usb_get_tx_data_len(struct queue_entry *entry)
dd9fa2d2
ID		 1249{
1250 int length;
1251
1252 /*
1253 * The length _must_ be a multiple of 2,
1254 * but it must _not_ be a multiple of the USB packet size.
1255 */
f1ca2167
ID		 1256 length = roundup(entry->skb->len, 2);
1257 length += (2 * !(length % entry->queue->usb_maxpacket));
dd9fa2d2
ID		 1258
1259 return length;
1260}
1261
95ea3627 1262static void rt2500usb_kick_tx_queue(struct rt2x00_dev *rt2x00dev,
e58c6aca 1263 const enum data_queue_qid queue)
95ea3627
ID		 1264{
1265 u16 reg;
1266
f019d514
ID		 1267 if (queue != QID_BEACON) {
1268 rt2x00usb_kick_tx_queue(rt2x00dev, queue);
95ea3627 1269 return;
f019d514 1270 }
95ea3627
ID		 1271
1272 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
1273 if (!rt2x00_get_field16(reg, TXRX_CSR19_BEACON_GEN)) {
8af244cc
ID		 1274 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 1);
1275 rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 1);
95ea3627
ID		 1276 rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 1);
1277 /*
1278 * Beacon generation will fail initially.
1279 * To prevent this we need to register the TXRX_CSR19
1280 * register several times.
1281 */
1282 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1283 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
1284 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1285 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
1286 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1287 }
1288}
1289
1290/*
1291 * RX control handlers
1292 */
181d6902
ID		 1293static void rt2500usb_fill_rxdone(struct queue_entry *entry,
1294 struct rxdone_entry_desc *rxdesc)
95ea3627 1295{
dddfb478 1296 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
b8be63ff 1297 struct queue_entry_priv_usb *entry_priv = entry->priv_data;
181d6902
ID		 1298 struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
1299 __le32 *rxd =
1300 (__le32 *)(entry->skb->data +
b8be63ff
ID		 1301 (entry_priv->urb->actual_length -
1302 entry->queue->desc_size));
95ea3627
ID		 1303 u32 word0;
1304 u32 word1;
1305
f855c10b 1306 /*
a26cbc65
GW		 1307 * Copy descriptor to the skbdesc->desc buffer, making it safe from moving of
1308 * frame data in rt2x00usb.
f855c10b 1309 */
a26cbc65 1310 memcpy(skbdesc->desc, rxd, skbdesc->desc_len);
70a96109 1311 rxd = (__le32 *)skbdesc->desc;
f855c10b
ID		 1312
1313 /*
70a96109 1314 * It is now safe to read the descriptor on all architectures.
f855c10b 1315 */
95ea3627
ID		 1316 rt2x00_desc_read(rxd, 0, &word0);
1317 rt2x00_desc_read(rxd, 1, &word1);
1318
4150c572 1319 if (rt2x00_get_field32(word0, RXD_W0_CRC_ERROR))
181d6902 1320 rxdesc->flags |= RX_FLAG_FAILED_FCS_CRC;
4150c572 1321 if (rt2x00_get_field32(word0, RXD_W0_PHYSICAL_ERROR))
181d6902 1322 rxdesc->flags |= RX_FLAG_FAILED_PLCP_CRC;
95ea3627 1323
dddfb478
ID		 1324 if (test_bit(CONFIG_SUPPORT_HW_CRYPTO, &rt2x00dev->flags)) {
1325 rxdesc->cipher = rt2x00_get_field32(word0, RXD_W0_CIPHER);
1326 if (rt2x00_get_field32(word0, RXD_W0_CIPHER_ERROR))
1327 rxdesc->cipher_status = RX_CRYPTO_FAIL_KEY;
1328 }
1329
1330 if (rxdesc->cipher != CIPHER_NONE) {
1331 _rt2x00_desc_read(rxd, 2, &rxdesc->iv[0]);
1332 _rt2x00_desc_read(rxd, 3, &rxdesc->iv[1]);
74415edb
ID		 1333 rxdesc->dev_flags |= RXDONE_CRYPTO_IV;
1334
dddfb478
ID		 1335 /* ICV is located at the end of frame */
1336
f3d340c1 1337 rxdesc->flags |= RX_FLAG_MMIC_STRIPPED;
dddfb478
ID		 1338 if (rxdesc->cipher_status == RX_CRYPTO_SUCCESS)
1339 rxdesc->flags |= RX_FLAG_DECRYPTED;
1340 else if (rxdesc->cipher_status == RX_CRYPTO_FAIL_MIC)
1341 rxdesc->flags |= RX_FLAG_MMIC_ERROR;
1342 }
1343
95ea3627
ID		 1344 /*
1345 * Obtain the status about this packet.
89993890
ID		 1346 * When frame was received with an OFDM bitrate,
1347 * the signal is the PLCP value. If it was received with
1348 * a CCK bitrate the signal is the rate in 100kbit/s.
95ea3627 1349 */
181d6902 1350 rxdesc->signal = rt2x00_get_field32(word1, RXD_W1_SIGNAL);
dddfb478
ID		 1351 rxdesc->rssi =
1352 rt2x00_get_field32(word1, RXD_W1_RSSI) - rt2x00dev->rssi_offset;
181d6902 1353 rxdesc->size = rt2x00_get_field32(word0, RXD_W0_DATABYTE_COUNT);
19d30e02 1354
19d30e02
ID		 1355 if (rt2x00_get_field32(word0, RXD_W0_OFDM))
1356 rxdesc->dev_flags |= RXDONE_SIGNAL_PLCP;
6c6aa3c0
ID		 1357 else
1358 rxdesc->dev_flags |= RXDONE_SIGNAL_BITRATE;
19d30e02
ID		 1359 if (rt2x00_get_field32(word0, RXD_W0_MY_BSS))
1360 rxdesc->dev_flags |= RXDONE_MY_BSS;
7d1de806 1361
2ae23854
MN		 1362 /*
1363 * Adjust the skb memory window to the frame boundaries.
1364 */
2ae23854 1365 skb_trim(entry->skb, rxdesc->size);
95ea3627
ID		 1366}
1367
1368/*
1369 * Interrupt functions.
1370 */
1371static void rt2500usb_beacondone(struct urb *urb)
1372{
181d6902 1373 struct queue_entry *entry = (struct queue_entry *)urb->context;
b8be63ff 1374 struct queue_entry_priv_usb_bcn *bcn_priv = entry->priv_data;
95ea3627 1375
0262ab0d 1376 if (!test_bit(DEVICE_STATE_ENABLED_RADIO, &entry->queue->rt2x00dev->flags))
95ea3627
ID		 1377 return;
1378
1379 /*
1380 * Check if this was the guardian beacon,
1381 * if that was the case we need to send the real beacon now.
1382 * Otherwise we should free the sk_buffer, the device
1383 * should be doing the rest of the work now.
1384 */
b8be63ff
ID		 1385 if (bcn_priv->guardian_urb == urb) {
1386 usb_submit_urb(bcn_priv->urb, GFP_ATOMIC);
1387 } else if (bcn_priv->urb == urb) {
181d6902
ID		 1388 dev_kfree_skb(entry->skb);
1389 entry->skb = NULL;
95ea3627
ID		 1390 }
1391}
1392
1393/*
1394 * Device probe functions.
1395 */
1396static int rt2500usb_validate_eeprom(struct rt2x00_dev *rt2x00dev)
1397{
1398 u16 word;
1399 u8 *mac;
6bb40dd1 1400 u8 bbp;
95ea3627
ID		 1401
1402 rt2x00usb_eeprom_read(rt2x00dev, rt2x00dev->eeprom, EEPROM_SIZE);
1403
1404 /*
1405 * Start validation of the data that has been read.
1406 */
1407 mac = rt2x00_eeprom_addr(rt2x00dev, EEPROM_MAC_ADDR_0);
1408 if (!is_valid_ether_addr(mac)) {
1409 random_ether_addr(mac);
e174961c 1410 EEPROM(rt2x00dev, "MAC: %pM\n", mac);
95ea3627
ID		 1411 }
1412
1413 rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &word);
1414 if (word == 0xffff) {
1415 rt2x00_set_field16(&word, EEPROM_ANTENNA_NUM, 2);
362f3b6b
ID		 1416 rt2x00_set_field16(&word, EEPROM_ANTENNA_TX_DEFAULT,
1417 ANTENNA_SW_DIVERSITY);
1418 rt2x00_set_field16(&word, EEPROM_ANTENNA_RX_DEFAULT,
1419 ANTENNA_SW_DIVERSITY);
1420 rt2x00_set_field16(&word, EEPROM_ANTENNA_LED_MODE,
1421 LED_MODE_DEFAULT);
95ea3627
ID		 1422 rt2x00_set_field16(&word, EEPROM_ANTENNA_DYN_TXAGC, 0);
1423 rt2x00_set_field16(&word, EEPROM_ANTENNA_HARDWARE_RADIO, 0);
1424 rt2x00_set_field16(&word, EEPROM_ANTENNA_RF_TYPE, RF2522);
1425 rt2x00_eeprom_write(rt2x00dev, EEPROM_ANTENNA, word);
1426 EEPROM(rt2x00dev, "Antenna: 0x%04x\n", word);
1427 }
1428
1429 rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &word);
1430 if (word == 0xffff) {
1431 rt2x00_set_field16(&word, EEPROM_NIC_CARDBUS_ACCEL, 0);
1432 rt2x00_set_field16(&word, EEPROM_NIC_DYN_BBP_TUNE, 0);
1433 rt2x00_set_field16(&word, EEPROM_NIC_CCK_TX_POWER, 0);
1434 rt2x00_eeprom_write(rt2x00dev, EEPROM_NIC, word);
1435 EEPROM(rt2x00dev, "NIC: 0x%04x\n", word);
1436 }
1437
1438 rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET, &word);
1439 if (word == 0xffff) {
1440 rt2x00_set_field16(&word, EEPROM_CALIBRATE_OFFSET_RSSI,
1441 DEFAULT_RSSI_OFFSET);
1442 rt2x00_eeprom_write(rt2x00dev, EEPROM_CALIBRATE_OFFSET, word);
1443 EEPROM(rt2x00dev, "Calibrate offset: 0x%04x\n", word);
1444 }
1445
1446 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE, &word);
1447 if (word == 0xffff) {
1448 rt2x00_set_field16(&word, EEPROM_BBPTUNE_THRESHOLD, 45);
1449 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE, word);
1450 EEPROM(rt2x00dev, "BBPtune: 0x%04x\n", word);
1451 }
1452
6bb40dd1
ID		 1453 /*
1454 * Switch lower vgc bound to current BBP R17 value,
1455 * lower the value a bit for better quality.
1456 */
1457 rt2500usb_bbp_read(rt2x00dev, 17, &bbp);
1458 bbp -= 6;
1459
95ea3627
ID		 1460 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &word);
1461 if (word == 0xffff) {
1462 rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCUPPER, 0x40);
6bb40dd1 1463 rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCLOWER, bbp);
95ea3627
ID		 1464 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_VGC, word);
1465 EEPROM(rt2x00dev, "BBPtune vgc: 0x%04x\n", word);
8d8acd46
ID		 1466 } else {
1467 rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCLOWER, bbp);
1468 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_VGC, word);
95ea3627
ID		 1469 }
1470
1471 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R17, &word);
1472 if (word == 0xffff) {
1473 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_LOW, 0x48);
1474 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_HIGH, 0x41);
1475 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R17, word);
1476 EEPROM(rt2x00dev, "BBPtune r17: 0x%04x\n", word);
1477 }
1478
1479 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &word);
1480 if (word == 0xffff) {
1481 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R24_LOW, 0x40);
1482 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R24_HIGH, 0x80);
1483 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R24, word);
1484 EEPROM(rt2x00dev, "BBPtune r24: 0x%04x\n", word);
1485 }
1486
1487 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &word);
1488 if (word == 0xffff) {
1489 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R25_LOW, 0x40);
1490 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R25_HIGH, 0x50);
1491 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R25, word);
1492 EEPROM(rt2x00dev, "BBPtune r25: 0x%04x\n", word);
1493 }
1494
1495 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &word);
1496 if (word == 0xffff) {
1497 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R61_LOW, 0x60);
1498 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R61_HIGH, 0x6d);
1499 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R61, word);
1500 EEPROM(rt2x00dev, "BBPtune r61: 0x%04x\n", word);
1501 }
1502
1503 return 0;
1504}
1505
1506static int rt2500usb_init_eeprom(struct rt2x00_dev *rt2x00dev)
1507{
1508 u16 reg;
1509 u16 value;
1510 u16 eeprom;
1511
1512 /*
1513 * Read EEPROM word for configuration.
1514 */
1515 rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &eeprom);
1516
1517 /*
1518 * Identify RF chipset.
1519 */
1520 value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE);
1521 rt2500usb_register_read(rt2x00dev, MAC_CSR0, &reg);
1522 rt2x00_set_chip(rt2x00dev, RT2570, value, reg);
1523
755a957d 1524 if (!rt2x00_check_rev(&rt2x00dev->chip, 0)) {
95ea3627
ID		 1525 ERROR(rt2x00dev, "Invalid RT chipset detected.\n");
1526 return -ENODEV;
1527 }
1528
1529 if (!rt2x00_rf(&rt2x00dev->chip, RF2522) &&
1530 !rt2x00_rf(&rt2x00dev->chip, RF2523) &&
1531 !rt2x00_rf(&rt2x00dev->chip, RF2524) &&
1532 !rt2x00_rf(&rt2x00dev->chip, RF2525) &&
1533 !rt2x00_rf(&rt2x00dev->chip, RF2525E) &&
1534 !rt2x00_rf(&rt2x00dev->chip, RF5222)) {
1535 ERROR(rt2x00dev, "Invalid RF chipset detected.\n");
1536 return -ENODEV;
1537 }
1538
1539 /*
1540 * Identify default antenna configuration.
1541 */
addc81bd 1542 rt2x00dev->default_ant.tx =
95ea3627 1543 rt2x00_get_field16(eeprom, EEPROM_ANTENNA_TX_DEFAULT);
addc81bd 1544 rt2x00dev->default_ant.rx =
95ea3627
ID		 1545 rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RX_DEFAULT);
1546
addc81bd
ID		 1547 /*
1548 * When the eeprom indicates SW_DIVERSITY use HW_DIVERSITY instead.
1549 * I am not 100% sure about this, but the legacy drivers do not
1550 * indicate antenna swapping in software is required when
1551 * diversity is enabled.
1552 */
1553 if (rt2x00dev->default_ant.tx == ANTENNA_SW_DIVERSITY)
1554 rt2x00dev->default_ant.tx = ANTENNA_HW_DIVERSITY;
1555 if (rt2x00dev->default_ant.rx == ANTENNA_SW_DIVERSITY)
1556 rt2x00dev->default_ant.rx = ANTENNA_HW_DIVERSITY;
1557
95ea3627
ID		 1558 /*
1559 * Store led mode, for correct led behaviour.
1560 */
771fd565 1561#ifdef CONFIG_RT2X00_LIB_LEDS
a9450b70
ID		 1562 value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_LED_MODE);
1563
475433be
ID		 1564 rt2500usb_init_led(rt2x00dev, &rt2x00dev->led_radio, LED_TYPE_RADIO);
1565 if (value == LED_MODE_TXRX_ACTIVITY)
1566 rt2500usb_init_led(rt2x00dev, &rt2x00dev->led_qual,
1567 LED_TYPE_ACTIVITY);
771fd565 1568#endif /* CONFIG_RT2X00_LIB_LEDS */
95ea3627
ID		 1569
1570 /*
1571 * Check if the BBP tuning should be disabled.
1572 */
1573 rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &eeprom);
1574 if (rt2x00_get_field16(eeprom, EEPROM_NIC_DYN_BBP_TUNE))
1575 __set_bit(CONFIG_DISABLE_LINK_TUNING, &rt2x00dev->flags);
1576
1577 /*
1578 * Read the RSSI <-> dBm offset information.
1579 */
1580 rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET, &eeprom);
1581 rt2x00dev->rssi_offset =
1582 rt2x00_get_field16(eeprom, EEPROM_CALIBRATE_OFFSET_RSSI);
1583
1584 return 0;
1585}
1586
1587/*
1588 * RF value list for RF2522
1589 * Supports: 2.4 GHz
1590 */
1591static const struct rf_channel rf_vals_bg_2522[] = {
1592 { 1, 0x00002050, 0x000c1fda, 0x00000101, 0 },
1593 { 2, 0x00002050, 0x000c1fee, 0x00000101, 0 },
1594 { 3, 0x00002050, 0x000c2002, 0x00000101, 0 },
1595 { 4, 0x00002050, 0x000c2016, 0x00000101, 0 },
1596 { 5, 0x00002050, 0x000c202a, 0x00000101, 0 },
1597 { 6, 0x00002050, 0x000c203e, 0x00000101, 0 },
1598 { 7, 0x00002050, 0x000c2052, 0x00000101, 0 },
1599 { 8, 0x00002050, 0x000c2066, 0x00000101, 0 },
1600 { 9, 0x00002050, 0x000c207a, 0x00000101, 0 },
1601 { 10, 0x00002050, 0x000c208e, 0x00000101, 0 },
1602 { 11, 0x00002050, 0x000c20a2, 0x00000101, 0 },
1603 { 12, 0x00002050, 0x000c20b6, 0x00000101, 0 },
1604 { 13, 0x00002050, 0x000c20ca, 0x00000101, 0 },
1605 { 14, 0x00002050, 0x000c20fa, 0x00000101, 0 },
1606};
1607
1608/*
1609 * RF value list for RF2523
1610 * Supports: 2.4 GHz
1611 */
1612static const struct rf_channel rf_vals_bg_2523[] = {
1613 { 1, 0x00022010, 0x00000c9e, 0x000e0111, 0x00000a1b },
1614 { 2, 0x00022010, 0x00000ca2, 0x000e0111, 0x00000a1b },
1615 { 3, 0x00022010, 0x00000ca6, 0x000e0111, 0x00000a1b },
1616 { 4, 0x00022010, 0x00000caa, 0x000e0111, 0x00000a1b },
1617 { 5, 0x00022010, 0x00000cae, 0x000e0111, 0x00000a1b },
1618 { 6, 0x00022010, 0x00000cb2, 0x000e0111, 0x00000a1b },
1619 { 7, 0x00022010, 0x00000cb6, 0x000e0111, 0x00000a1b },
1620 { 8, 0x00022010, 0x00000cba, 0x000e0111, 0x00000a1b },
1621 { 9, 0x00022010, 0x00000cbe, 0x000e0111, 0x00000a1b },
1622 { 10, 0x00022010, 0x00000d02, 0x000e0111, 0x00000a1b },
1623 { 11, 0x00022010, 0x00000d06, 0x000e0111, 0x00000a1b },
1624 { 12, 0x00022010, 0x00000d0a, 0x000e0111, 0x00000a1b },
1625 { 13, 0x00022010, 0x00000d0e, 0x000e0111, 0x00000a1b },
1626 { 14, 0x00022010, 0x00000d1a, 0x000e0111, 0x00000a03 },
1627};
1628
1629/*
1630 * RF value list for RF2524
1631 * Supports: 2.4 GHz
1632 */
1633static const struct rf_channel rf_vals_bg_2524[] = {
1634 { 1, 0x00032020, 0x00000c9e, 0x00000101, 0x00000a1b },
1635 { 2, 0x00032020, 0x00000ca2, 0x00000101, 0x00000a1b },
1636 { 3, 0x00032020, 0x00000ca6, 0x00000101, 0x00000a1b },
1637 { 4, 0x00032020, 0x00000caa, 0x00000101, 0x00000a1b },
1638 { 5, 0x00032020, 0x00000cae, 0x00000101, 0x00000a1b },
1639 { 6, 0x00032020, 0x00000cb2, 0x00000101, 0x00000a1b },
1640 { 7, 0x00032020, 0x00000cb6, 0x00000101, 0x00000a1b },
1641 { 8, 0x00032020, 0x00000cba, 0x00000101, 0x00000a1b },
1642 { 9, 0x00032020, 0x00000cbe, 0x00000101, 0x00000a1b },
1643 { 10, 0x00032020, 0x00000d02, 0x00000101, 0x00000a1b },
1644 { 11, 0x00032020, 0x00000d06, 0x00000101, 0x00000a1b },
1645 { 12, 0x00032020, 0x00000d0a, 0x00000101, 0x00000a1b },
1646 { 13, 0x00032020, 0x00000d0e, 0x00000101, 0x00000a1b },
1647 { 14, 0x00032020, 0x00000d1a, 0x00000101, 0x00000a03 },
1648};
1649
1650/*
1651 * RF value list for RF2525
1652 * Supports: 2.4 GHz
1653 */
1654static const struct rf_channel rf_vals_bg_2525[] = {
1655 { 1, 0x00022020, 0x00080c9e, 0x00060111, 0x00000a1b },
1656 { 2, 0x00022020, 0x00080ca2, 0x00060111, 0x00000a1b },
1657 { 3, 0x00022020, 0x00080ca6, 0x00060111, 0x00000a1b },
1658 { 4, 0x00022020, 0x00080caa, 0x00060111, 0x00000a1b },
1659 { 5, 0x00022020, 0x00080cae, 0x00060111, 0x00000a1b },
1660 { 6, 0x00022020, 0x00080cb2, 0x00060111, 0x00000a1b },
1661 { 7, 0x00022020, 0x00080cb6, 0x00060111, 0x00000a1b },
1662 { 8, 0x00022020, 0x00080cba, 0x00060111, 0x00000a1b },
1663 { 9, 0x00022020, 0x00080cbe, 0x00060111, 0x00000a1b },
1664 { 10, 0x00022020, 0x00080d02, 0x00060111, 0x00000a1b },
1665 { 11, 0x00022020, 0x00080d06, 0x00060111, 0x00000a1b },
1666 { 12, 0x00022020, 0x00080d0a, 0x00060111, 0x00000a1b },
1667 { 13, 0x00022020, 0x00080d0e, 0x00060111, 0x00000a1b },
1668 { 14, 0x00022020, 0x00080d1a, 0x00060111, 0x00000a03 },
1669};
1670
1671/*
1672 * RF value list for RF2525e
1673 * Supports: 2.4 GHz
1674 */
1675static const struct rf_channel rf_vals_bg_2525e[] = {
1676 { 1, 0x00022010, 0x0000089a, 0x00060111, 0x00000e1b },
1677 { 2, 0x00022010, 0x0000089e, 0x00060111, 0x00000e07 },
1678 { 3, 0x00022010, 0x0000089e, 0x00060111, 0x00000e1b },
1679 { 4, 0x00022010, 0x000008a2, 0x00060111, 0x00000e07 },
1680 { 5, 0x00022010, 0x000008a2, 0x00060111, 0x00000e1b },
1681 { 6, 0x00022010, 0x000008a6, 0x00060111, 0x00000e07 },
1682 { 7, 0x00022010, 0x000008a6, 0x00060111, 0x00000e1b },
1683 { 8, 0x00022010, 0x000008aa, 0x00060111, 0x00000e07 },
1684 { 9, 0x00022010, 0x000008aa, 0x00060111, 0x00000e1b },
1685 { 10, 0x00022010, 0x000008ae, 0x00060111, 0x00000e07 },
1686 { 11, 0x00022010, 0x000008ae, 0x00060111, 0x00000e1b },
1687 { 12, 0x00022010, 0x000008b2, 0x00060111, 0x00000e07 },
1688 { 13, 0x00022010, 0x000008b2, 0x00060111, 0x00000e1b },
1689 { 14, 0x00022010, 0x000008b6, 0x00060111, 0x00000e23 },
1690};
1691
1692/*
1693 * RF value list for RF5222
1694 * Supports: 2.4 GHz & 5.2 GHz
1695 */
1696static const struct rf_channel rf_vals_5222[] = {
1697 { 1, 0x00022020, 0x00001136, 0x00000101, 0x00000a0b },
1698 { 2, 0x00022020, 0x0000113a, 0x00000101, 0x00000a0b },
1699 { 3, 0x00022020, 0x0000113e, 0x00000101, 0x00000a0b },
1700 { 4, 0x00022020, 0x00001182, 0x00000101, 0x00000a0b },
1701 { 5, 0x00022020, 0x00001186, 0x00000101, 0x00000a0b },
1702 { 6, 0x00022020, 0x0000118a, 0x00000101, 0x00000a0b },
1703 { 7, 0x00022020, 0x0000118e, 0x00000101, 0x00000a0b },
1704 { 8, 0x00022020, 0x00001192, 0x00000101, 0x00000a0b },
1705 { 9, 0x00022020, 0x00001196, 0x00000101, 0x00000a0b },
1706 { 10, 0x00022020, 0x0000119a, 0x00000101, 0x00000a0b },
1707 { 11, 0x00022020, 0x0000119e, 0x00000101, 0x00000a0b },
1708 { 12, 0x00022020, 0x000011a2, 0x00000101, 0x00000a0b },
1709 { 13, 0x00022020, 0x000011a6, 0x00000101, 0x00000a0b },
1710 { 14, 0x00022020, 0x000011ae, 0x00000101, 0x00000a1b },
1711
1712 /* 802.11 UNI / HyperLan 2 */
1713 { 36, 0x00022010, 0x00018896, 0x00000101, 0x00000a1f },
1714 { 40, 0x00022010, 0x0001889a, 0x00000101, 0x00000a1f },
1715 { 44, 0x00022010, 0x0001889e, 0x00000101, 0x00000a1f },
1716 { 48, 0x00022010, 0x000188a2, 0x00000101, 0x00000a1f },
1717 { 52, 0x00022010, 0x000188a6, 0x00000101, 0x00000a1f },
1718 { 66, 0x00022010, 0x000188aa, 0x00000101, 0x00000a1f },
1719 { 60, 0x00022010, 0x000188ae, 0x00000101, 0x00000a1f },
1720 { 64, 0x00022010, 0x000188b2, 0x00000101, 0x00000a1f },
1721
1722 /* 802.11 HyperLan 2 */
1723 { 100, 0x00022010, 0x00008802, 0x00000101, 0x00000a0f },
1724 { 104, 0x00022010, 0x00008806, 0x00000101, 0x00000a0f },
1725 { 108, 0x00022010, 0x0000880a, 0x00000101, 0x00000a0f },
1726 { 112, 0x00022010, 0x0000880e, 0x00000101, 0x00000a0f },
1727 { 116, 0x00022010, 0x00008812, 0x00000101, 0x00000a0f },
1728 { 120, 0x00022010, 0x00008816, 0x00000101, 0x00000a0f },
1729 { 124, 0x00022010, 0x0000881a, 0x00000101, 0x00000a0f },
1730 { 128, 0x00022010, 0x0000881e, 0x00000101, 0x00000a0f },
1731 { 132, 0x00022010, 0x00008822, 0x00000101, 0x00000a0f },
1732 { 136, 0x00022010, 0x00008826, 0x00000101, 0x00000a0f },
1733
1734 /* 802.11 UNII */
1735 { 140, 0x00022010, 0x0000882a, 0x00000101, 0x00000a0f },
1736 { 149, 0x00022020, 0x000090a6, 0x00000101, 0x00000a07 },
1737 { 153, 0x00022020, 0x000090ae, 0x00000101, 0x00000a07 },
1738 { 157, 0x00022020, 0x000090b6, 0x00000101, 0x00000a07 },
1739 { 161, 0x00022020, 0x000090be, 0x00000101, 0x00000a07 },
1740};
1741
8c5e7a5f 1742static int rt2500usb_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
95ea3627
ID		 1743{
1744 struct hw_mode_spec *spec = &rt2x00dev->spec;
8c5e7a5f
ID		 1745 struct channel_info *info;
1746 char *tx_power;
95ea3627
ID		 1747 unsigned int i;
1748
1749 /*
1750 * Initialize all hw fields.
1751 */
1752 rt2x00dev->hw->flags =
95ea3627 1753 IEEE80211_HW_RX_INCLUDES_FCS |
566bfe5a
BR		 1754 IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
1755 IEEE80211_HW_SIGNAL_DBM;
1756
95ea3627 1757 rt2x00dev->hw->extra_tx_headroom = TXD_DESC_SIZE;
95ea3627 1758
14a3bf89 1759 SET_IEEE80211_DEV(rt2x00dev->hw, rt2x00dev->dev);
95ea3627
ID		 1760 SET_IEEE80211_PERM_ADDR(rt2x00dev->hw,
1761 rt2x00_eeprom_addr(rt2x00dev,
1762 EEPROM_MAC_ADDR_0));
1763
95ea3627
ID		 1764 /*
1765 * Initialize hw_mode information.
1766 */
31562e80
ID		 1767 spec->supported_bands = SUPPORT_BAND_2GHZ;
1768 spec->supported_rates = SUPPORT_RATE_CCK | SUPPORT_RATE_OFDM;
95ea3627
ID		 1769
1770 if (rt2x00_rf(&rt2x00dev->chip, RF2522)) {
1771 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2522);
1772 spec->channels = rf_vals_bg_2522;
1773 } else if (rt2x00_rf(&rt2x00dev->chip, RF2523)) {
1774 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2523);
1775 spec->channels = rf_vals_bg_2523;
1776 } else if (rt2x00_rf(&rt2x00dev->chip, RF2524)) {
1777 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2524);
1778 spec->channels = rf_vals_bg_2524;
1779 } else if (rt2x00_rf(&rt2x00dev->chip, RF2525)) {
1780 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525);
1781 spec->channels = rf_vals_bg_2525;
1782 } else if (rt2x00_rf(&rt2x00dev->chip, RF2525E)) {
1783 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525e);
1784 spec->channels = rf_vals_bg_2525e;
1785 } else if (rt2x00_rf(&rt2x00dev->chip, RF5222)) {
31562e80 1786 spec->supported_bands |= SUPPORT_BAND_5GHZ;
95ea3627
ID		 1787 spec->num_channels = ARRAY_SIZE(rf_vals_5222);
1788 spec->channels = rf_vals_5222;
95ea3627 1789 }
8c5e7a5f
ID		 1790
1791 /*
1792 * Create channel information array
1793 */
1794 info = kzalloc(spec->num_channels * sizeof(*info), GFP_KERNEL);
1795 if (!info)
1796 return -ENOMEM;
1797
1798 spec->channels_info = info;
1799
1800 tx_power = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_START);
1801 for (i = 0; i < 14; i++)
1802 info[i].tx_power1 = TXPOWER_FROM_DEV(tx_power[i]);
1803
1804 if (spec->num_channels > 14) {
1805 for (i = 14; i < spec->num_channels; i++)
1806 info[i].tx_power1 = DEFAULT_TXPOWER;
1807 }
1808
1809 return 0;
95ea3627
ID		 1810}
1811
1812static int rt2500usb_probe_hw(struct rt2x00_dev *rt2x00dev)
1813{
1814 int retval;
1815
1816 /*
1817 * Allocate eeprom data.
1818 */
1819 retval = rt2500usb_validate_eeprom(rt2x00dev);
1820 if (retval)
1821 return retval;
1822
1823 retval = rt2500usb_init_eeprom(rt2x00dev);
1824 if (retval)
1825 return retval;
1826
1827 /*
1828 * Initialize hw specifications.
1829 */
8c5e7a5f
ID		 1830 retval = rt2500usb_probe_hw_mode(rt2x00dev);
1831 if (retval)
1832 return retval;
95ea3627
ID		 1833
1834 /*
181d6902 1835 * This device requires the atim queue
95ea3627 1836 */
181d6902
ID		 1837 __set_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags);
1838 __set_bit(DRIVER_REQUIRE_BEACON_GUARD, &rt2x00dev->flags);
3a643d24 1839 __set_bit(DRIVER_REQUIRE_SCHEDULED, &rt2x00dev->flags);
dddfb478
ID		 1840 if (!modparam_nohwcrypt) {
1841 __set_bit(CONFIG_SUPPORT_HW_CRYPTO, &rt2x00dev->flags);
1842 __set_bit(CONFIG_CRYPTO_COPY_IV, &rt2x00dev->flags);
1843 }
d06193f3 1844 __set_bit(CONFIG_DISABLE_LINK_TUNING, &rt2x00dev->flags);
95ea3627
ID		 1845
1846 /*
1847 * Set the rssi offset.
1848 */
1849 rt2x00dev->rssi_offset = DEFAULT_RSSI_OFFSET;
1850
1851 return 0;
1852}
1853
95ea3627
ID		 1854static const struct ieee80211_ops rt2500usb_mac80211_ops = {
1855 .tx = rt2x00mac_tx,
4150c572
JB		 1856 .start = rt2x00mac_start,
1857 .stop = rt2x00mac_stop,
95ea3627
ID		 1858 .add_interface = rt2x00mac_add_interface,
1859 .remove_interface = rt2x00mac_remove_interface,
1860 .config = rt2x00mac_config,
1861 .config_interface = rt2x00mac_config_interface,
3a643d24 1862 .configure_filter = rt2x00mac_configure_filter,
dddfb478 1863 .set_key = rt2x00mac_set_key,
95ea3627 1864 .get_stats = rt2x00mac_get_stats,
471b3efd 1865 .bss_info_changed = rt2x00mac_bss_info_changed,
95ea3627
ID		 1866 .conf_tx = rt2x00mac_conf_tx,
1867 .get_tx_stats = rt2x00mac_get_tx_stats,
95ea3627
ID		 1868};
1869
1870static const struct rt2x00lib_ops rt2500usb_rt2x00_ops = {
1871 .probe_hw = rt2500usb_probe_hw,
1872 .initialize = rt2x00usb_initialize,
1873 .uninitialize = rt2x00usb_uninitialize,
798b7adb 1874 .clear_entry = rt2x00usb_clear_entry,
95ea3627
ID		 1875 .set_device_state = rt2500usb_set_device_state,
1876 .link_stats = rt2500usb_link_stats,
1877 .reset_tuner = rt2500usb_reset_tuner,
1878 .link_tuner = rt2500usb_link_tuner,
1879 .write_tx_desc = rt2500usb_write_tx_desc,
1880 .write_tx_data = rt2x00usb_write_tx_data,
bd88a781 1881 .write_beacon = rt2500usb_write_beacon,
dd9fa2d2 1882 .get_tx_data_len = rt2500usb_get_tx_data_len,
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ID		 1883 .kick_tx_queue = rt2500usb_kick_tx_queue,
1884 .fill_rxdone = rt2500usb_fill_rxdone,
dddfb478
ID		 1885 .config_shared_key = rt2500usb_config_key,
1886 .config_pairwise_key = rt2500usb_config_key,
3a643d24 1887 .config_filter = rt2500usb_config_filter,
6bb40dd1 1888 .config_intf = rt2500usb_config_intf,
72810379 1889 .config_erp = rt2500usb_config_erp,
e4ea1c40 1890 .config_ant = rt2500usb_config_ant,
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ID		 1891 .config = rt2500usb_config,
1892};
1893
181d6902
ID		 1894static const struct data_queue_desc rt2500usb_queue_rx = {
1895 .entry_num = RX_ENTRIES,
1896 .data_size = DATA_FRAME_SIZE,
1897 .desc_size = RXD_DESC_SIZE,
b8be63ff 1898 .priv_size = sizeof(struct queue_entry_priv_usb),
181d6902
ID		 1899};
1900
1901static const struct data_queue_desc rt2500usb_queue_tx = {
1902 .entry_num = TX_ENTRIES,
1903 .data_size = DATA_FRAME_SIZE,
1904 .desc_size = TXD_DESC_SIZE,
b8be63ff 1905 .priv_size = sizeof(struct queue_entry_priv_usb),
181d6902
ID		 1906};
1907
1908static const struct data_queue_desc rt2500usb_queue_bcn = {
1909 .entry_num = BEACON_ENTRIES,
1910 .data_size = MGMT_FRAME_SIZE,
1911 .desc_size = TXD_DESC_SIZE,
1912 .priv_size = sizeof(struct queue_entry_priv_usb_bcn),
1913};
1914
1915static const struct data_queue_desc rt2500usb_queue_atim = {
1916 .entry_num = ATIM_ENTRIES,
1917 .data_size = DATA_FRAME_SIZE,
1918 .desc_size = TXD_DESC_SIZE,
b8be63ff 1919 .priv_size = sizeof(struct queue_entry_priv_usb),
181d6902
ID		 1920};
1921
95ea3627 1922static const struct rt2x00_ops rt2500usb_ops = {
2360157c 1923 .name = KBUILD_MODNAME,
6bb40dd1
ID		 1924 .max_sta_intf = 1,
1925 .max_ap_intf = 1,
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ID		 1926 .eeprom_size = EEPROM_SIZE,
1927 .rf_size = RF_SIZE,
61448f88 1928 .tx_queues = NUM_TX_QUEUES,
181d6902
ID		 1929 .rx = &rt2500usb_queue_rx,
1930 .tx = &rt2500usb_queue_tx,
1931 .bcn = &rt2500usb_queue_bcn,
1932 .atim = &rt2500usb_queue_atim,
95ea3627
ID		 1933 .lib = &rt2500usb_rt2x00_ops,
1934 .hw = &rt2500usb_mac80211_ops,
1935#ifdef CONFIG_RT2X00_LIB_DEBUGFS
1936 .debugfs = &rt2500usb_rt2x00debug,
1937#endif /* CONFIG_RT2X00_LIB_DEBUGFS */
1938};
1939
1940/*
1941 * rt2500usb module information.
1942 */
1943static struct usb_device_id rt2500usb_device_table[] = {
1944 /* ASUS */
1945 { USB_DEVICE(0x0b05, 0x1706), USB_DEVICE_DATA(&rt2500usb_ops) },
1946 { USB_DEVICE(0x0b05, 0x1707), USB_DEVICE_DATA(&rt2500usb_ops) },
1947 /* Belkin */
1948 { USB_DEVICE(0x050d, 0x7050), USB_DEVICE_DATA(&rt2500usb_ops) },
1949 { USB_DEVICE(0x050d, 0x7051), USB_DEVICE_DATA(&rt2500usb_ops) },
1950 { USB_DEVICE(0x050d, 0x705a), USB_DEVICE_DATA(&rt2500usb_ops) },
1951 /* Cisco Systems */
1952 { USB_DEVICE(0x13b1, 0x000d), USB_DEVICE_DATA(&rt2500usb_ops) },
1953 { USB_DEVICE(0x13b1, 0x0011), USB_DEVICE_DATA(&rt2500usb_ops) },
1954 { USB_DEVICE(0x13b1, 0x001a), USB_DEVICE_DATA(&rt2500usb_ops) },
9eb77ab0
XVP		 1955 /* CNet */
1956 { USB_DEVICE(0x1371, 0x9022), USB_DEVICE_DATA(&rt2500usb_ops) },
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ID		 1957 /* Conceptronic */
1958 { USB_DEVICE(0x14b2, 0x3c02), USB_DEVICE_DATA(&rt2500usb_ops) },
1959 /* D-LINK */
1960 { USB_DEVICE(0x2001, 0x3c00), USB_DEVICE_DATA(&rt2500usb_ops) },
1961 /* Gigabyte */
1962 { USB_DEVICE(0x1044, 0x8001), USB_DEVICE_DATA(&rt2500usb_ops) },
1963 { USB_DEVICE(0x1044, 0x8007), USB_DEVICE_DATA(&rt2500usb_ops) },
1964 /* Hercules */
1965 { USB_DEVICE(0x06f8, 0xe000), USB_DEVICE_DATA(&rt2500usb_ops) },
1966 /* Melco */
db433feb 1967 { USB_DEVICE(0x0411, 0x005e), USB_DEVICE_DATA(&rt2500usb_ops) },
95ea3627
ID		 1968 { USB_DEVICE(0x0411, 0x0066), USB_DEVICE_DATA(&rt2500usb_ops) },
1969 { USB_DEVICE(0x0411, 0x0067), USB_DEVICE_DATA(&rt2500usb_ops) },
1970 { USB_DEVICE(0x0411, 0x008b), USB_DEVICE_DATA(&rt2500usb_ops) },
1971 { USB_DEVICE(0x0411, 0x0097), USB_DEVICE_DATA(&rt2500usb_ops) },
95ea3627
ID		 1972 /* MSI */
1973 { USB_DEVICE(0x0db0, 0x6861), USB_DEVICE_DATA(&rt2500usb_ops) },
1974 { USB_DEVICE(0x0db0, 0x6865), USB_DEVICE_DATA(&rt2500usb_ops) },
1975 { USB_DEVICE(0x0db0, 0x6869), USB_DEVICE_DATA(&rt2500usb_ops) },
1976 /* Ralink */
1977 { USB_DEVICE(0x148f, 0x1706), USB_DEVICE_DATA(&rt2500usb_ops) },
1978 { USB_DEVICE(0x148f, 0x2570), USB_DEVICE_DATA(&rt2500usb_ops) },
1979 { USB_DEVICE(0x148f, 0x2573), USB_DEVICE_DATA(&rt2500usb_ops) },
1980 { USB_DEVICE(0x148f, 0x9020), USB_DEVICE_DATA(&rt2500usb_ops) },
9eb77ab0
XVP		 1981 /* Sagem */
1982 { USB_DEVICE(0x079b, 0x004b), USB_DEVICE_DATA(&rt2500usb_ops) },
95ea3627
ID		 1983 /* Siemens */
1984 { USB_DEVICE(0x0681, 0x3c06), USB_DEVICE_DATA(&rt2500usb_ops) },
1985 /* SMC */
1986 { USB_DEVICE(0x0707, 0xee13), USB_DEVICE_DATA(&rt2500usb_ops) },
1987 /* Spairon */
1988 { USB_DEVICE(0x114b, 0x0110), USB_DEVICE_DATA(&rt2500usb_ops) },
9eb77ab0
XVP		 1989 /* SURECOM */
1990 { USB_DEVICE(0x0769, 0x11f3), USB_DEVICE_DATA(&rt2500usb_ops) },
95ea3627
ID		 1991 /* Trust */
1992 { USB_DEVICE(0x0eb0, 0x9020), USB_DEVICE_DATA(&rt2500usb_ops) },
9eb77ab0
XVP		 1993 /* VTech */
1994 { USB_DEVICE(0x0f88, 0x3012), USB_DEVICE_DATA(&rt2500usb_ops) },
95ea3627
ID		 1995 /* Zinwell */
1996 { USB_DEVICE(0x5a57, 0x0260), USB_DEVICE_DATA(&rt2500usb_ops) },
1997 { 0, }
1998};
1999
2000MODULE_AUTHOR(DRV_PROJECT);
2001MODULE_VERSION(DRV_VERSION);
2002MODULE_DESCRIPTION("Ralink RT2500 USB Wireless LAN driver.");
2003MODULE_SUPPORTED_DEVICE("Ralink RT2570 USB chipset based cards");
2004MODULE_DEVICE_TABLE(usb, rt2500usb_device_table);
2005MODULE_LICENSE("GPL");
2006
2007static struct usb_driver rt2500usb_driver = {
2360157c 2008 .name = KBUILD_MODNAME,
95ea3627
ID		 2009 .id_table = rt2500usb_device_table,
2010 .probe = rt2x00usb_probe,
2011 .disconnect = rt2x00usb_disconnect,
2012 .suspend = rt2x00usb_suspend,
2013 .resume = rt2x00usb_resume,
2014};
2015
2016static int __init rt2500usb_init(void)
2017{
2018 return usb_register(&rt2500usb_driver);
2019}
2020
2021static void __exit rt2500usb_exit(void)
2022{
2023 usb_deregister(&rt2500usb_driver);
2024}
2025
2026module_init(rt2500usb_init);
2027module_exit(rt2500usb_exit);
Linux kernel - Deliverables
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