projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| e5553f08 GJ |
1 | /* Copyright (C) 2009 - 2010 Ivo van Doorn <IvDoorn@gmail.com> |
| 2 | * Copyright (C) 2009 Alban Browaeys <prahal@yahoo.com> | |
| 3 | * Copyright (C) 2009 Felix Fietkau <nbd@openwrt.org> | |
| 4 | * Copyright (C) 2009 Luis Correia <luis.f.correia@gmail.com> | |
| 5 | * Copyright (C) 2009 Mattias Nissler <mattias.nissler@gmx.de> | |
| 6 | * Copyright (C) 2009 Mark Asselstine <asselsm@gmail.com> | |
| 7 | * Copyright (C) 2009 Xose Vazquez Perez <xose.vazquez@gmail.com> | |
| 8 | * Copyright (C) 2009 Bart Zolnierkiewicz <bzolnier@gmail.com> | |
| 9 | * <http://rt2x00.serialmonkey.com> | |
| 10 | * | |
| 11 | * This program is free software; you can redistribute it and/or modify | |
| 12 | * it under the terms of the GNU General Public License as published by | |
| 13 | * the Free Software Foundation; either version 2 of the License, or | |
| 14 | * (at your option) any later version. | |
| 15 | * | |
| 16 | * This program is distributed in the hope that it will be useful, | |
| 17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 19 | * GNU General Public License for more details. | |
| 20 | * | |
| 21 | * You should have received a copy of the GNU General Public License | |
| 22 | * along with this program; if not, write to the | |
| 23 | * Free Software Foundation, Inc., | |
| 24 | * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. | |
| 25 | */ | |
| 26 | ||
| 27 | /* Module: rt2800mmio | |
| 28 | * Abstract: forward declarations for the rt2800mmio module. | |
| 29 | */ | |
| 30 | ||
| 31 | #ifndef RT2800MMIO_H | |
| 32 | #define RT2800MMIO_H | |
| 33 | ||
| d5580ade GJ |
34 | /* |
| 35 | * Queue register offset macros | |
| 36 | */ | |
| 37 | #define TX_QUEUE_REG_OFFSET 0x10 | |
| 38 | #define TX_BASE_PTR(__x) (TX_BASE_PTR0 + ((__x) * TX_QUEUE_REG_OFFSET)) | |
| 39 | #define TX_MAX_CNT(__x) (TX_MAX_CNT0 + ((__x) * TX_QUEUE_REG_OFFSET)) | |
| 40 | #define TX_CTX_IDX(__x) (TX_CTX_IDX0 + ((__x) * TX_QUEUE_REG_OFFSET)) | |
| 41 | #define TX_DTX_IDX(__x) (TX_DTX_IDX0 + ((__x) * TX_QUEUE_REG_OFFSET)) | |
| 42 | ||
| 0bc202b3 GJ |
43 | /* |
| 44 | * DMA descriptor defines. | |
| 45 | */ | |
| 46 | #define TXD_DESC_SIZE (4 * sizeof(__le32)) | |
| 9732497d | 47 | #define RXD_DESC_SIZE (4 * sizeof(__le32)) |
| 0bc202b3 GJ |
48 | |
| 49 | /* | |
| 50 | * TX descriptor format for TX, PRIO and Beacon Ring. | |
| 51 | */ | |
| 52 | ||
| 53 | /* | |
| 54 | * Word0 | |
| 55 | */ | |
| 56 | #define TXD_W0_SD_PTR0 FIELD32(0xffffffff) | |
| 57 | ||
| 58 | /* | |
| 59 | * Word1 | |
| 60 | */ | |
| 61 | #define TXD_W1_SD_LEN1 FIELD32(0x00003fff) | |
| 62 | #define TXD_W1_LAST_SEC1 FIELD32(0x00004000) | |
| 63 | #define TXD_W1_BURST FIELD32(0x00008000) | |
| 64 | #define TXD_W1_SD_LEN0 FIELD32(0x3fff0000) | |
| 65 | #define TXD_W1_LAST_SEC0 FIELD32(0x40000000) | |
| 66 | #define TXD_W1_DMA_DONE FIELD32(0x80000000) | |
| 67 | ||
| 68 | /* | |
| 69 | * Word2 | |
| 70 | */ | |
| 71 | #define TXD_W2_SD_PTR1 FIELD32(0xffffffff) | |
| 72 | ||
| 73 | /* | |
| 74 | * Word3 | |
| 75 | * WIV: Wireless Info Valid. 1: Driver filled WI, 0: DMA needs to copy WI | |
| 76 | * QSEL: Select on-chip FIFO ID for 2nd-stage output scheduler. | |
| 77 | * 0:MGMT, 1:HCCA 2:EDCA | |
| 78 | */ | |
| 79 | #define TXD_W3_WIV FIELD32(0x01000000) | |
| 80 | #define TXD_W3_QSEL FIELD32(0x06000000) | |
| 81 | #define TXD_W3_TCO FIELD32(0x20000000) | |
| 82 | #define TXD_W3_UCO FIELD32(0x40000000) | |
| 83 | #define TXD_W3_ICO FIELD32(0x80000000) | |
| 84 | ||
| 9732497d GJ |
85 | /* |
| 86 | * RX descriptor format for RX Ring. | |
| 87 | */ | |
| 88 | ||
| 89 | /* | |
| 90 | * Word0 | |
| 91 | */ | |
| 92 | #define RXD_W0_SDP0 FIELD32(0xffffffff) | |
| 93 | ||
| 94 | /* | |
| 95 | * Word1 | |
| 96 | */ | |
| 97 | #define RXD_W1_SDL1 FIELD32(0x00003fff) | |
| 98 | #define RXD_W1_SDL0 FIELD32(0x3fff0000) | |
| 99 | #define RXD_W1_LS0 FIELD32(0x40000000) | |
| 100 | #define RXD_W1_DMA_DONE FIELD32(0x80000000) | |
| 101 | ||
| 102 | /* | |
| 103 | * Word2 | |
| 104 | */ | |
| 105 | #define RXD_W2_SDP1 FIELD32(0xffffffff) | |
| 106 | ||
| 107 | /* | |
| 108 | * Word3 | |
| 109 | * AMSDU: RX with 802.3 header, not 802.11 header. | |
| 110 | * DECRYPTED: This frame is being decrypted. | |
| 111 | */ | |
| 112 | #define RXD_W3_BA FIELD32(0x00000001) | |
| 113 | #define RXD_W3_DATA FIELD32(0x00000002) | |
| 114 | #define RXD_W3_NULLDATA FIELD32(0x00000004) | |
| 115 | #define RXD_W3_FRAG FIELD32(0x00000008) | |
| 116 | #define RXD_W3_UNICAST_TO_ME FIELD32(0x00000010) | |
| 117 | #define RXD_W3_MULTICAST FIELD32(0x00000020) | |
| 118 | #define RXD_W3_BROADCAST FIELD32(0x00000040) | |
| 119 | #define RXD_W3_MY_BSS FIELD32(0x00000080) | |
| 120 | #define RXD_W3_CRC_ERROR FIELD32(0x00000100) | |
| 121 | #define RXD_W3_CIPHER_ERROR FIELD32(0x00000600) | |
| 122 | #define RXD_W3_AMSDU FIELD32(0x00000800) | |
| 123 | #define RXD_W3_HTC FIELD32(0x00001000) | |
| 124 | #define RXD_W3_RSSI FIELD32(0x00002000) | |
| 125 | #define RXD_W3_L2PAD FIELD32(0x00004000) | |
| 126 | #define RXD_W3_AMPDU FIELD32(0x00008000) | |
| 127 | #define RXD_W3_DECRYPTED FIELD32(0x00010000) | |
| 128 | #define RXD_W3_PLCP_SIGNAL FIELD32(0x00020000) | |
| 129 | #define RXD_W3_PLCP_RSSI FIELD32(0x00040000) | |
| 0bc202b3 GJ |
130 | |
| 131 | /* TX descriptor initialization */ | |
| 132 | __le32 *rt2800mmio_get_txwi(struct queue_entry *entry); | |
| 133 | void rt2800mmio_write_tx_desc(struct queue_entry *entry, | |
| 134 | struct txentry_desc *txdesc); | |
| 135 | ||
| 9732497d GJ |
136 | /* RX control handlers */ |
| 137 | void rt2800mmio_fill_rxdone(struct queue_entry *entry, | |
| 138 | struct rxdone_entry_desc *rxdesc); | |
| 139 | ||
| 8d03e772 GJ |
140 | /* Interrupt functions */ |
| 141 | void rt2800mmio_txstatus_tasklet(unsigned long data); | |
| 142 | void rt2800mmio_pretbtt_tasklet(unsigned long data); | |
| 143 | void rt2800mmio_tbtt_tasklet(unsigned long data); | |
| 144 | void rt2800mmio_rxdone_tasklet(unsigned long data); | |
| 145 | void rt2800mmio_autowake_tasklet(unsigned long data); | |
| 146 | irqreturn_t rt2800mmio_interrupt(int irq, void *dev_instance); | |
| 147 | void rt2800mmio_toggle_irq(struct rt2x00_dev *rt2x00dev, | |
| 148 | enum dev_state state); | |
| 9732497d | 149 | |
| d5580ade GJ |
150 | /* Queue handlers */ |
| 151 | void rt2800mmio_start_queue(struct data_queue *queue); | |
| 152 | void rt2800mmio_kick_queue(struct data_queue *queue); | |
| 153 | void rt2800mmio_stop_queue(struct data_queue *queue); | |
| 154 | void rt2800mmio_queue_init(struct data_queue *queue); | |
| 155 | ||
| 1052e3a6 GJ |
156 | /* Initialization functions */ |
| 157 | bool rt2800mmio_get_entry_state(struct queue_entry *entry); | |
| 158 | void rt2800mmio_clear_entry(struct queue_entry *entry); | |
| 159 | int rt2800mmio_init_queues(struct rt2x00_dev *rt2x00dev); | |
| 160 | int rt2800mmio_init_registers(struct rt2x00_dev *rt2x00dev); | |
| 161 | ||
| 3ccdcd51 GJ |
162 | /* Device state switch handlers. */ |
| 163 | int rt2800mmio_enable_radio(struct rt2x00_dev *rt2x00dev); | |
| 164 | ||
| e5553f08 | 165 | #endif /* RT2800MMIO_H */ |