Merge branch 'drm-next' of git://people.freedesktop.org/~airlied/linux
[deliverable/linux.git] / drivers / net / wireless / rt2x00 / rt2x00.h
CommitLineData
95ea3627 1/*
7e613e16
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2 Copyright (C) 2010 Willow Garage <http://www.willowgarage.com>
3 Copyright (C) 2004 - 2010 Ivo van Doorn <IvDoorn@gmail.com>
9c9a0d14 4 Copyright (C) 2004 - 2009 Gertjan van Wingerde <gwingerde@gmail.com>
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5 <http://rt2x00.serialmonkey.com>
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the
19 Free Software Foundation, Inc.,
20 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
21 */
22
23/*
24 Module: rt2x00
25 Abstract: rt2x00 global information.
26 */
27
28#ifndef RT2X00_H
29#define RT2X00_H
30
31#include <linux/bitops.h>
a6b7a407 32#include <linux/interrupt.h>
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33#include <linux/skbuff.h>
34#include <linux/workqueue.h>
35#include <linux/firmware.h>
a9450b70 36#include <linux/leds.h>
3d82346c 37#include <linux/mutex.h>
61af43c5 38#include <linux/etherdevice.h>
cca3e998 39#include <linux/input-polldev.h>
96c3da7d 40#include <linux/kfifo.h>
f421111b 41#include <linux/hrtimer.h>
1dc254ac 42#include <linux/average.h>
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43
44#include <net/mac80211.h>
45
46#include "rt2x00debug.h"
b4df4708 47#include "rt2x00dump.h"
a9450b70 48#include "rt2x00leds.h"
95ea3627 49#include "rt2x00reg.h"
181d6902 50#include "rt2x00queue.h"
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51
52/*
53 * Module information.
95ea3627 54 */
754be309 55#define DRV_VERSION "2.3.0"
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56#define DRV_PROJECT "http://rt2x00.serialmonkey.com"
57
ec9c4989 58/* Debug definitions.
95ea3627
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59 * Debug output has to be enabled during compile time.
60 */
95ea3627 61#ifdef CONFIG_RT2X00_DEBUG
ec9c4989 62#define DEBUG
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63#endif /* CONFIG_RT2X00_DEBUG */
64
ec9c4989
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65/* Utility printing macros
66 * rt2x00_probe_err is for messages when rt2x00_dev is uninitialized
95ea3627 67 */
ec9c4989
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68#define rt2x00_probe_err(fmt, ...) \
69 printk(KERN_ERR KBUILD_MODNAME ": %s: Error - " fmt, \
70 __func__, ##__VA_ARGS__)
71#define rt2x00_err(dev, fmt, ...) \
72 wiphy_err((dev)->hw->wiphy, "%s: Error - " fmt, \
73 __func__, ##__VA_ARGS__)
74#define rt2x00_warn(dev, fmt, ...) \
75 wiphy_warn((dev)->hw->wiphy, "%s: Warning - " fmt, \
76 __func__, ##__VA_ARGS__)
77#define rt2x00_info(dev, fmt, ...) \
78 wiphy_info((dev)->hw->wiphy, "%s: Info - " fmt, \
79 __func__, ##__VA_ARGS__)
80
81/* Various debug levels */
82#define rt2x00_dbg(dev, fmt, ...) \
83 wiphy_dbg((dev)->hw->wiphy, "%s: Debug - " fmt, \
84 __func__, ##__VA_ARGS__)
85#define rt2x00_eeprom_dbg(dev, fmt, ...) \
86 wiphy_dbg((dev)->hw->wiphy, "%s: EEPROM recovery - " fmt, \
87 __func__, ##__VA_ARGS__)
95ea3627 88
bad13639
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89/*
90 * Duration calculations
91 * The rate variable passed is: 100kbs.
92 * To convert from bytes to bits we multiply size with 8,
93 * then the size is multiplied with 10 to make the
94 * real rate -> rate argument correction.
95 */
96#define GET_DURATION(__size, __rate) (((__size) * 8 * 10) / (__rate))
97#define GET_DURATION_RES(__size, __rate)(((__size) * 8 * 10) % (__rate))
98
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99/*
100 * Determine the number of L2 padding bytes required between the header and
101 * the payload.
102 */
103#define L2PAD_SIZE(__hdrlen) (-(__hdrlen) & 3)
104
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105/*
106 * Determine the alignment requirement,
107 * to make sure the 802.11 payload is padded to a 4-byte boundrary
108 * we must determine the address of the payload and calculate the
109 * amount of bytes needed to move the data.
110 */
111#define ALIGN_SIZE(__skb, __header) \
112 ( ((unsigned long)((__skb)->data + (__header))) & 3 )
113
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114/*
115 * Constants for extra TX headroom for alignment purposes.
116 */
117#define RT2X00_ALIGN_SIZE 4 /* Only whole frame needs alignment */
118#define RT2X00_L2PAD_SIZE 8 /* Both header & payload need alignment */
119
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120/*
121 * Standard timing and size defines.
122 * These values should follow the ieee80211 specifications.
123 */
124#define ACK_SIZE 14
125#define IEEE80211_HEADER 24
126#define PLCP 48
127#define BEACON 100
128#define PREAMBLE 144
129#define SHORT_PREAMBLE 72
130#define SLOT_TIME 20
131#define SHORT_SLOT_TIME 9
132#define SIFS 10
133#define PIFS ( SIFS + SLOT_TIME )
134#define SHORT_PIFS ( SIFS + SHORT_SLOT_TIME )
135#define DIFS ( PIFS + SLOT_TIME )
136#define SHORT_DIFS ( SHORT_PIFS + SHORT_SLOT_TIME )
f2fdbc48 137#define EIFS ( SIFS + DIFS + \
bad13639 138 GET_DURATION(IEEE80211_HEADER + ACK_SIZE, 10) )
f2fdbc48 139#define SHORT_EIFS ( SIFS + SHORT_DIFS + \
bad13639 140 GET_DURATION(IEEE80211_HEADER + ACK_SIZE, 10) )
95ea3627 141
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142enum rt2x00_chip_intf {
143 RT2X00_CHIP_INTF_PCI,
6e1fdd11 144 RT2X00_CHIP_INTF_PCIE,
5822e070 145 RT2X00_CHIP_INTF_USB,
cea90e55 146 RT2X00_CHIP_INTF_SOC,
5822e070
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147};
148
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149/*
150 * Chipset identification
151 * The chipset on the device is composed of a RT and RF chip.
152 * The chipset combination is important for determining device capabilities.
153 */
154struct rt2x00_chip {
155 u16 rt;
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156#define RT2460 0x2460
157#define RT2560 0x2560
158#define RT2570 0x2570
159#define RT2661 0x2661
160#define RT2573 0x2573
5ed8f458 161#define RT2860 0x2860 /* 2.4GHz */
e148b4c8 162#define RT2872 0x2872 /* WSOC */
49e721ec 163#define RT2883 0x2883 /* WSOC */
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164#define RT3070 0x3070
165#define RT3071 0x3071
a9b3a9f7 166#define RT3090 0x3090 /* 2.4GHz PCIe */
a89534ed 167#define RT3290 0x3290
03839951 168#define RT3352 0x3352 /* WSOC */
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169#define RT3390 0x3390
170#define RT3572 0x3572
5a87e7a7 171#define RT3593 0x3593
e148b4c8 172#define RT3883 0x3883 /* WSOC */
70127cb6 173#define RT5390 0x5390 /* 2.4GHz */
2ed71884 174#define RT5392 0x5392 /* 2.4GHz */
b8863f8b 175#define RT5592 0x5592
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176
177 u16 rf;
49e721ec 178 u16 rev;
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179
180 enum rt2x00_chip_intf intf;
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181};
182
183/*
184 * RF register values that belong to a particular channel.
185 */
186struct rf_channel {
187 int channel;
188 u32 rf1;
189 u32 rf2;
190 u32 rf3;
191 u32 rf4;
192};
193
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194/*
195 * Channel information structure
196 */
197struct channel_info {
198 unsigned int flags;
199#define GEOGRAPHY_ALLOWED 0x00000001
200
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201 short max_power;
202 short default_power1;
203 short default_power2;
c0a14369 204 short default_power3;
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205};
206
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207/*
208 * Antenna setup values.
209 */
210struct antenna_setup {
211 enum antenna rx;
212 enum antenna tx;
d96aa640
RJH
213 u8 rx_chain_num;
214 u8 tx_chain_num;
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215};
216
95ea3627 217/*
ebcf26da 218 * Quality statistics about the currently active link.
95ea3627 219 */
ebcf26da 220struct link_qual {
95ea3627 221 /*
5352ff65
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222 * Statistics required for Link tuning by driver
223 * The rssi value is provided by rt2x00lib during the
224 * link_tuner() callback function.
225 * The false_cca field is filled during the link_stats()
226 * callback function and could be used during the
227 * link_tuner() callback function.
95ea3627 228 */
5352ff65 229 int rssi;
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230 int false_cca;
231
232 /*
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233 * VGC levels
234 * Hardware driver will tune the VGC level during each call
235 * to the link_tuner() callback function. This vgc_level is
236 * is determined based on the link quality statistics like
237 * average RSSI and the false CCA count.
95ea3627 238 *
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239 * In some cases the drivers need to differentiate between
240 * the currently "desired" VGC level and the level configured
241 * in the hardware. The latter is important to reduce the
242 * number of BBP register reads to reduce register access
243 * overhead. For this reason we store both values here.
244 */
245 u8 vgc_level;
246 u8 vgc_level_reg;
247
248 /*
249 * Statistics required for Signal quality calculation.
250 * These fields might be changed during the link_stats()
251 * callback function.
95ea3627 252 */
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253 int rx_success;
254 int rx_failed;
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255 int tx_success;
256 int tx_failed;
ebcf26da
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257};
258
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259/*
260 * Antenna settings about the currently active link.
261 */
262struct link_ant {
263 /*
264 * Antenna flags
265 */
266 unsigned int flags;
267#define ANTENNA_RX_DIVERSITY 0x00000001
268#define ANTENNA_TX_DIVERSITY 0x00000002
269#define ANTENNA_MODE_SAMPLE 0x00000004
270
271 /*
272 * Currently active TX/RX antenna setup.
273 * When software diversity is used, this will indicate
274 * which antenna is actually used at this time.
275 */
276 struct antenna_setup active;
277
278 /*
193df183
LE
279 * RSSI history information for the antenna.
280 * Used to determine when to switch antenna
281 * when using software diversity.
69f81a2c 282 */
193df183 283 int rssi_history;
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284
285 /*
286 * Current RSSI average of the currently active antenna.
287 * Similar to the avg_rssi in the link_qual structure
288 * this value is updated by using the walking average.
289 */
1dc254ac 290 struct ewma rssi_ant;
69f81a2c
ID
291};
292
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293/*
294 * To optimize the quality of the link we need to store
295 * the quality of received frames and periodically
296 * optimize the link.
297 */
298struct link {
299 /*
300 * Link tuner counter
301 * The number of times the link has been tuned
302 * since the radio has been switched on.
303 */
304 u32 count;
305
306 /*
307 * Quality measurement values.
308 */
309 struct link_qual qual;
310
addc81bd 311 /*
69f81a2c 312 * TX/RX antenna setup.
addc81bd 313 */
69f81a2c 314 struct link_ant ant;
addc81bd 315
ebcf26da 316 /*
5352ff65 317 * Currently active average RSSI value
ebcf26da 318 */
1dc254ac 319 struct ewma avg_rssi;
eb20b4e8 320
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321 /*
322 * Work structure for scheduling periodic link tuning.
323 */
324 struct delayed_work work;
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325
326 /*
327 * Work structure for scheduling periodic watchdog monitoring.
cdfd2c5c
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328 * This work must be scheduled on the kernel workqueue, while
329 * all other work structures must be queued on the mac80211
330 * workqueue. This guarantees that the watchdog can schedule
331 * other work structures and wait for their completion in order
332 * to bring the device/driver back into the desired state.
c965c74b
ID
333 */
334 struct delayed_work watchdog_work;
9e33a355
HS
335
336 /*
337 * Work structure for scheduling periodic AGC adjustments.
338 */
339 struct delayed_work agc_work;
2e9c43dd
JL
340
341 /*
342 * Work structure for scheduling periodic VCO calibration.
343 */
344 struct delayed_work vco_work;
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345};
346
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347enum rt2x00_delayed_flags {
348 DELAYED_UPDATE_BEACON,
349};
350
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351/*
352 * Interface structure
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353 * Per interface configuration details, this structure
354 * is allocated as the private data for ieee80211_vif.
95ea3627 355 */
6bb40dd1 356struct rt2x00_intf {
17512dc3
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357 /*
358 * beacon->skb must be protected with the mutex.
359 */
360 struct mutex beacon_skb_mutex;
361
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362 /*
363 * Entry in the beacon queue which belongs to
364 * this interface. Each interface has its own
365 * dedicated beacon entry.
366 */
367 struct queue_entry *beacon;
69cf36a4 368 bool enable_beacon;
95ea3627 369
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370 /*
371 * Actions that needed rescheduling.
372 */
bfe6a15d 373 unsigned long delayed_flags;
f591fa5d 374
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375 /*
376 * Software sequence counter, this is only required
377 * for hardware which doesn't support hardware
378 * sequence counting.
379 */
e5851dac 380 atomic_t seqno;
6bb40dd1
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381};
382
383static inline struct rt2x00_intf* vif_to_intf(struct ieee80211_vif *vif)
95ea3627 384{
6bb40dd1 385 return (struct rt2x00_intf *)vif->drv_priv;
95ea3627
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386}
387
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388/**
389 * struct hw_mode_spec: Hardware specifications structure
390 *
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391 * Details about the supported modes, rates and channels
392 * of a particular chipset. This is used by rt2x00lib
393 * to build the ieee80211_hw_mode array for mac80211.
31562e80
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394 *
395 * @supported_bands: Bitmask contained the supported bands (2.4GHz, 5.2GHz).
396 * @supported_rates: Rate types which are supported (CCK, OFDM).
397 * @num_channels: Number of supported channels. This is used as array size
398 * for @tx_power_a, @tx_power_bg and @channels.
9a46d44e 399 * @channels: Device/chipset specific channel values (See &struct rf_channel).
8c5e7a5f 400 * @channels_info: Additional information for channels (See &struct channel_info).
35f00cfc 401 * @ht: Driver HT Capabilities (See &ieee80211_sta_ht_cap).
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402 */
403struct hw_mode_spec {
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404 unsigned int supported_bands;
405#define SUPPORT_BAND_2GHZ 0x00000001
406#define SUPPORT_BAND_5GHZ 0x00000002
407
408 unsigned int supported_rates;
409#define SUPPORT_RATE_CCK 0x00000001
410#define SUPPORT_RATE_OFDM 0x00000002
411
412 unsigned int num_channels;
413 const struct rf_channel *channels;
8c5e7a5f 414 const struct channel_info *channels_info;
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415
416 struct ieee80211_sta_ht_cap ht;
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417};
418
5c58ee51
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419/*
420 * Configuration structure wrapper around the
421 * mac80211 configuration structure.
422 * When mac80211 configures the driver, rt2x00lib
423 * can precalculate values which are equal for all
424 * rt2x00 drivers. Those values can be stored in here.
425 */
426struct rt2x00lib_conf {
427 struct ieee80211_conf *conf;
8c5e7a5f 428
5c58ee51 429 struct rf_channel rf;
8c5e7a5f 430 struct channel_info channel;
5c58ee51
ID
431};
432
72810379
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433/*
434 * Configuration structure for erp settings.
435 */
436struct rt2x00lib_erp {
437 int short_preamble;
e360c4cb 438 int cts_protection;
72810379 439
881d948c 440 u32 basic_rates;
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441
442 int slot_time;
443
444 short sifs;
445 short pifs;
446 short difs;
447 short eifs;
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448
449 u16 beacon_int;
87c1915d 450 u16 ht_opmode;
72810379
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451};
452
2bb057d0
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453/*
454 * Configuration structure for hardware encryption.
455 */
456struct rt2x00lib_crypto {
457 enum cipher cipher;
458
459 enum set_key_cmd cmd;
460 const u8 *address;
461
462 u32 bssidx;
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ID
463
464 u8 key[16];
465 u8 tx_mic[8];
466 u8 rx_mic[8];
f03fcfc1
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467
468 int wcid;
2bb057d0
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469};
470
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471/*
472 * Configuration structure wrapper around the
473 * rt2x00 interface configuration handler.
474 */
475struct rt2x00intf_conf {
476 /*
477 * Interface type
478 */
05c914fe 479 enum nl80211_iftype type;
6bb40dd1
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480
481 /*
25985edc 482 * TSF sync value, this is dependent on the operation type.
6bb40dd1
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483 */
484 enum tsf_sync sync;
485
486 /*
25985edc
LDM
487 * The MAC and BSSID addresses are simple array of bytes,
488 * these arrays are little endian, so when sending the addresses
6bb40dd1
ID
489 * to the drivers, copy the it into a endian-signed variable.
490 *
491 * Note that all devices (except rt2500usb) have 32 bits
492 * register word sizes. This means that whatever variable we
493 * pass _must_ be a multiple of 32 bits. Otherwise the device
494 * might not accept what we are sending to it.
495 * This will also make it easier for the driver to write
496 * the data to the device.
497 */
498 __le32 mac[2];
499 __le32 bssid[2];
500};
501
b4943d81
HS
502/*
503 * Private structure for storing STA details
504 * wcid: Wireless Client ID
505 */
506struct rt2x00_sta {
507 int wcid;
508};
509
510static inline struct rt2x00_sta* sta_to_rt2x00_sta(struct ieee80211_sta *sta)
511{
512 return (struct rt2x00_sta *)sta->drv_priv;
513}
514
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515/*
516 * rt2x00lib callback functions.
517 */
518struct rt2x00lib_ops {
519 /*
520 * Interrupt handlers.
521 */
522 irq_handler_t irq_handler;
523
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HS
524 /*
525 * TX status tasklet handler.
526 */
527 void (*txstatus_tasklet) (unsigned long data);
c5c65761
HS
528 void (*pretbtt_tasklet) (unsigned long data);
529 void (*tbtt_tasklet) (unsigned long data);
530 void (*rxdone_tasklet) (unsigned long data);
531 void (*autowake_tasklet) (unsigned long data);
96c3da7d 532
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533 /*
534 * Device init handlers.
535 */
536 int (*probe_hw) (struct rt2x00_dev *rt2x00dev);
537 char *(*get_firmware_name) (struct rt2x00_dev *rt2x00dev);
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ID
538 int (*check_firmware) (struct rt2x00_dev *rt2x00dev,
539 const u8 *data, const size_t len);
540 int (*load_firmware) (struct rt2x00_dev *rt2x00dev,
541 const u8 *data, const size_t len);
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542
543 /*
544 * Device initialization/deinitialization handlers.
545 */
546 int (*initialize) (struct rt2x00_dev *rt2x00dev);
547 void (*uninitialize) (struct rt2x00_dev *rt2x00dev);
548
837e7f24 549 /*
181d6902 550 * queue initialization handlers
837e7f24 551 */
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ID
552 bool (*get_entry_state) (struct queue_entry *entry);
553 void (*clear_entry) (struct queue_entry *entry);
837e7f24 554
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555 /*
556 * Radio control handlers.
557 */
558 int (*set_device_state) (struct rt2x00_dev *rt2x00dev,
559 enum dev_state state);
560 int (*rfkill_poll) (struct rt2x00_dev *rt2x00dev);
ebcf26da
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561 void (*link_stats) (struct rt2x00_dev *rt2x00dev,
562 struct link_qual *qual);
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ID
563 void (*reset_tuner) (struct rt2x00_dev *rt2x00dev,
564 struct link_qual *qual);
565 void (*link_tuner) (struct rt2x00_dev *rt2x00dev,
566 struct link_qual *qual, const u32 count);
9e33a355 567 void (*gain_calibration) (struct rt2x00_dev *rt2x00dev);
2e9c43dd 568 void (*vco_calibration) (struct rt2x00_dev *rt2x00dev);
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569
570 /*
571 * Data queue handlers.
572 */
c965c74b 573 void (*watchdog) (struct rt2x00_dev *rt2x00dev);
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574 void (*start_queue) (struct data_queue *queue);
575 void (*kick_queue) (struct data_queue *queue);
576 void (*stop_queue) (struct data_queue *queue);
152a5992 577 void (*flush_queue) (struct data_queue *queue, bool drop);
0e0d39e5 578 void (*tx_dma_done) (struct queue_entry *entry);
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579
580 /*
581 * TX control handlers
582 */
93331458 583 void (*write_tx_desc) (struct queue_entry *entry,
61486e0f 584 struct txentry_desc *txdesc);
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GW
585 void (*write_tx_data) (struct queue_entry *entry,
586 struct txentry_desc *txdesc);
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587 void (*write_beacon) (struct queue_entry *entry,
588 struct txentry_desc *txdesc);
69cf36a4 589 void (*clear_beacon) (struct queue_entry *entry);
f1ca2167 590 int (*get_tx_data_len) (struct queue_entry *entry);
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591
592 /*
593 * RX control handlers
594 */
181d6902
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595 void (*fill_rxdone) (struct queue_entry *entry,
596 struct rxdone_entry_desc *rxdesc);
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597
598 /*
599 * Configuration handlers.
600 */
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601 int (*config_shared_key) (struct rt2x00_dev *rt2x00dev,
602 struct rt2x00lib_crypto *crypto,
603 struct ieee80211_key_conf *key);
604 int (*config_pairwise_key) (struct rt2x00_dev *rt2x00dev,
605 struct rt2x00lib_crypto *crypto,
606 struct ieee80211_key_conf *key);
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ID
607 void (*config_filter) (struct rt2x00_dev *rt2x00dev,
608 const unsigned int filter_flags);
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609 void (*config_intf) (struct rt2x00_dev *rt2x00dev,
610 struct rt2x00_intf *intf,
611 struct rt2x00intf_conf *conf,
612 const unsigned int flags);
613#define CONFIG_UPDATE_TYPE ( 1 << 1 )
614#define CONFIG_UPDATE_MAC ( 1 << 2 )
615#define CONFIG_UPDATE_BSSID ( 1 << 3 )
616
3a643d24 617 void (*config_erp) (struct rt2x00_dev *rt2x00dev,
02044643
HS
618 struct rt2x00lib_erp *erp,
619 u32 changed);
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620 void (*config_ant) (struct rt2x00_dev *rt2x00dev,
621 struct antenna_setup *ant);
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622 void (*config) (struct rt2x00_dev *rt2x00dev,
623 struct rt2x00lib_conf *libconf,
e4ea1c40 624 const unsigned int changed_flags);
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HS
625 int (*sta_add) (struct rt2x00_dev *rt2x00dev,
626 struct ieee80211_vif *vif,
627 struct ieee80211_sta *sta);
628 int (*sta_remove) (struct rt2x00_dev *rt2x00dev,
629 int wcid);
95ea3627
ID
630};
631
632/*
633 * rt2x00 driver callback operation structure.
634 */
635struct rt2x00_ops {
636 const char *name;
1ebbc485 637 const unsigned int drv_data_size;
6bb40dd1 638 const unsigned int max_ap_intf;
95ea3627
ID
639 const unsigned int eeprom_size;
640 const unsigned int rf_size;
61448f88 641 const unsigned int tx_queues;
25bf6ce4 642 void (*queue_init)(struct data_queue *queue);
95ea3627 643 const struct rt2x00lib_ops *lib;
e796643e 644 const void *drv;
95ea3627
ID
645 const struct ieee80211_ops *hw;
646#ifdef CONFIG_RT2X00_LIB_DEBUGFS
647 const struct rt2x00debug *debugfs;
648#endif /* CONFIG_RT2X00_LIB_DEBUGFS */
649};
650
483272f5 651/*
7dab73b3 652 * rt2x00 state flags
483272f5 653 */
7dab73b3 654enum rt2x00_state_flags {
483272f5 655 /*
7dab73b3 656 * Device flags
483272f5 657 */
0262ab0d
ID
658 DEVICE_STATE_PRESENT,
659 DEVICE_STATE_REGISTERED_HW,
660 DEVICE_STATE_INITIALIZED,
661 DEVICE_STATE_STARTED,
0262ab0d 662 DEVICE_STATE_ENABLED_RADIO,
d8147f9d 663 DEVICE_STATE_SCANNING,
483272f5 664
2bb057d0
ID
665 /*
666 * Driver configuration
667 */
35f00cfc 668 CONFIG_CHANNEL_HT40,
1c0bcf89 669 CONFIG_POWERSAVING,
da40f407 670 CONFIG_HT_DISABLED,
e66a8ddf 671 CONFIG_QOS_DISABLED,
f421111b
SG
672
673 /*
674 * Mark we currently are sequentially reading TX_STA_FIFO register
675 * FIXME: this is for only rt2800usb, should go to private data
676 */
677 TX_STATUS_READING,
483272f5
ID
678};
679
7dab73b3
ID
680/*
681 * rt2x00 capability flags
682 */
683enum rt2x00_capability_flags {
684 /*
685 * Requirements
686 */
687 REQUIRE_FIRMWARE,
688 REQUIRE_BEACON_GUARD,
689 REQUIRE_ATIM_QUEUE,
690 REQUIRE_DMA,
691 REQUIRE_COPY_IV,
692 REQUIRE_L2PAD,
693 REQUIRE_TXSTATUS_FIFO,
694 REQUIRE_TASKLET_CONTEXT,
695 REQUIRE_SW_SEQNO,
696 REQUIRE_HT_TX_DESC,
1c0bcf89 697 REQUIRE_PS_AUTOWAKE,
7dab73b3
ID
698
699 /*
700 * Capabilities
701 */
702 CAPABILITY_HW_BUTTON,
703 CAPABILITY_HW_CRYPTO,
704 CAPABILITY_POWER_LIMIT,
705 CAPABILITY_CONTROL_FILTERS,
706 CAPABILITY_CONTROL_FILTER_PSPOLL,
707 CAPABILITY_PRE_TBTT_INTERRUPT,
708 CAPABILITY_LINK_TUNING,
709 CAPABILITY_FRAME_TYPE,
710 CAPABILITY_RF_SEQUENCE,
711 CAPABILITY_EXTERNAL_LNA_A,
712 CAPABILITY_EXTERNAL_LNA_BG,
713 CAPABILITY_DOUBLE_ANTENNA,
fdbc7b0a 714 CAPABILITY_BT_COEXIST,
2e9c43dd 715 CAPABILITY_VCO_RECALIBRATION,
7dab73b3
ID
716};
717
55d2e9da
GW
718/*
719 * Interface combinations
720 */
721enum {
722 IF_COMB_AP = 0,
723 NUM_IF_COMB,
724};
725
95ea3627
ID
726/*
727 * rt2x00 device structure.
728 */
729struct rt2x00_dev {
730 /*
731 * Device structure.
732 * The structure stored in here depends on the
733 * system bus (PCI or USB).
734 * When accessing this variable, the rt2x00dev_{pci,usb}
49513481 735 * macros should be used for correct typecasting.
95ea3627 736 */
14a3bf89 737 struct device *dev;
95ea3627
ID
738
739 /*
740 * Callback functions.
741 */
742 const struct rt2x00_ops *ops;
743
1ebbc485
GW
744 /*
745 * Driver data.
746 */
747 void *drv_data;
748
95ea3627
ID
749 /*
750 * IEEE80211 control structure.
751 */
752 struct ieee80211_hw *hw;
8318d78a
JB
753 struct ieee80211_supported_band bands[IEEE80211_NUM_BANDS];
754 enum ieee80211_band curr_band;
e5ef5bad 755 int curr_freq;
95ea3627 756
95ea3627
ID
757 /*
758 * If enabled, the debugfs interface structures
759 * required for deregistration of debugfs.
760 */
761#ifdef CONFIG_RT2X00_LIB_DEBUGFS
4d8dd66c 762 struct rt2x00debug_intf *debugfs_intf;
95ea3627
ID
763#endif /* CONFIG_RT2X00_LIB_DEBUGFS */
764
a9450b70
ID
765 /*
766 * LED structure for changing the LED status
767 * by mac8011 or the kernel.
768 */
769#ifdef CONFIG_RT2X00_LIB_LEDS
a9450b70
ID
770 struct rt2x00_led led_radio;
771 struct rt2x00_led led_assoc;
772 struct rt2x00_led led_qual;
773 u16 led_mcu_reg;
774#endif /* CONFIG_RT2X00_LIB_LEDS */
775
95ea3627 776 /*
7dab73b3
ID
777 * Device state flags.
778 * In these flags the current status is stored.
779 * Access to these flags should occur atomically.
95ea3627
ID
780 */
781 unsigned long flags;
95ea3627 782
7dab73b3
ID
783 /*
784 * Device capabiltiy flags.
785 * In these flags the device/driver capabilities are stored.
786 * Access to these flags should occur non-atomically.
787 */
788 unsigned long cap_flags;
789
440ddada
ID
790 /*
791 * Device information, Bus IRQ and name (PCI, SoC)
792 */
793 int irq;
794 const char *name;
795
95ea3627
ID
796 /*
797 * Chipset identification.
798 */
799 struct rt2x00_chip chip;
800
801 /*
802 * hw capability specifications.
803 */
804 struct hw_mode_spec spec;
805
addc81bd
ID
806 /*
807 * This is the default TX/RX antenna setup as indicated
6d64360a 808 * by the device's EEPROM.
addc81bd
ID
809 */
810 struct antenna_setup default_ant;
811
95ea3627
ID
812 /*
813 * Register pointers
21795094
ID
814 * csr.base: CSR base register address. (PCI)
815 * csr.cache: CSR cache for usb_control_msg. (USB)
95ea3627 816 */
21795094
ID
817 union csr {
818 void __iomem *base;
819 void *cache;
820 } csr;
95ea3627 821
3d82346c 822 /*
8ff48a8b
ID
823 * Mutex to protect register accesses.
824 * For PCI and USB devices it protects against concurrent indirect
825 * register access (BBP, RF, MCU) since accessing those
826 * registers require multiple calls to the CSR registers.
827 * For USB devices it also protects the csr_cache since that
828 * field is used for normal CSR access and it cannot support
829 * multiple callers simultaneously.
830 */
831 struct mutex csr_mutex;
3d82346c 832
3c4f2085
ID
833 /*
834 * Current packet filter configuration for the device.
835 * This contains all currently active FIF_* flags send
836 * to us by mac80211 during configure_filter().
837 */
838 unsigned int packet_filter;
839
95ea3627 840 /*
6bb40dd1
ID
841 * Interface details:
842 * - Open ap interface count.
843 * - Open sta interface count.
844 * - Association count.
69cf36a4 845 * - Beaconing enabled count.
95ea3627 846 */
6bb40dd1
ID
847 unsigned int intf_ap_count;
848 unsigned int intf_sta_count;
849 unsigned int intf_associated;
69cf36a4 850 unsigned int intf_beaconing;
95ea3627 851
55d2e9da
GW
852 /*
853 * Interface combinations
854 */
855 struct ieee80211_iface_limit if_limits_ap;
856 struct ieee80211_iface_combination if_combinations[NUM_IF_COMB];
857
95ea3627
ID
858 /*
859 * Link quality
860 */
861 struct link link;
862
863 /*
864 * EEPROM data.
865 */
866 __le16 *eeprom;
867
868 /*
869 * Active RF register values.
870 * These are stored here so we don't need
871 * to read the rf registers and can directly
872 * use this value instead.
873 * This field should be accessed by using
874 * rt2x00_rf_read() and rt2x00_rf_write().
875 */
876 u32 *rf;
877
ba2ab471
ID
878 /*
879 * LNA gain
880 */
881 short lna_gain;
882
95ea3627
ID
883 /*
884 * Current TX power value.
885 */
886 u16 tx_power;
887
42c82857
ID
888 /*
889 * Current retry values.
890 */
891 u8 short_retry;
892 u8 long_retry;
893
95ea3627
ID
894 /*
895 * Rssi <-> Dbm offset
896 */
897 u8 rssi_offset;
898
899 /*
bef453dc 900 * Frequency offset.
95ea3627
ID
901 */
902 u8 freq_offset;
903
1c0bcf89
ID
904 /*
905 * Association id.
906 */
907 u16 aid;
908
6b347bff
ID
909 /*
910 * Beacon interval.
911 */
912 u16 beacon_int;
913
1c0bcf89
ID
914 /**
915 * Timestamp of last received beacon
916 */
917 unsigned long last_beacon;
918
95ea3627
ID
919 /*
920 * Low level statistics which will have
921 * to be kept up to date while device is running.
922 */
923 struct ieee80211_low_level_stats low_level_stats;
924
0439f536
ID
925 /**
926 * Work queue for all work which should not be placed
927 * on the mac80211 workqueue (because of dependencies
928 * between various work structures).
929 */
930 struct workqueue_struct *workqueue;
931
95ea3627 932 /*
4150c572 933 * Scheduled work.
8e260c22
ID
934 * NOTE: intf_work will use ieee80211_iterate_active_interfaces()
935 * which means it cannot be placed on the hw->workqueue
936 * due to RTNL locking requirements.
95ea3627 937 */
6bb40dd1 938 struct work_struct intf_work;
95ea3627 939
7e613e16
ID
940 /**
941 * Scheduled work for TX/RX done handling (USB devices)
942 */
943 struct work_struct rxdone_work;
944 struct work_struct txdone_work;
945
1c0bcf89
ID
946 /*
947 * Powersaving work
948 */
949 struct delayed_work autowakeup_work;
ed66ba47 950 struct work_struct sleep_work;
1c0bcf89 951
95ea3627 952 /*
e74df4a7 953 * Data queue arrays for RX, TX, Beacon and ATIM.
95ea3627 954 */
b869767b 955 unsigned int data_queues;
181d6902
ID
956 struct data_queue *rx;
957 struct data_queue *tx;
958 struct data_queue *bcn;
e74df4a7 959 struct data_queue *atim;
95ea3627
ID
960
961 /*
962 * Firmware image.
963 */
964 const struct firmware *fw;
ee134fcc 965
96c3da7d
HS
966 /*
967 * FIFO for storing tx status reports between isr and tasklet.
968 */
c4d63244 969 DECLARE_KFIFO_PTR(txstatus_fifo, u32);
96c3da7d 970
f0187a19
JS
971 /*
972 * Timer to ensure tx status reports are read (rt2800usb).
973 */
f421111b 974 struct hrtimer txstatus_timer;
f0187a19 975
96c3da7d
HS
976 /*
977 * Tasklet for processing tx status reports (rt2800pci).
978 */
979 struct tasklet_struct txstatus_tasklet;
c5c65761
HS
980 struct tasklet_struct pretbtt_tasklet;
981 struct tasklet_struct tbtt_tasklet;
982 struct tasklet_struct rxdone_tasklet;
983 struct tasklet_struct autowake_tasklet;
984
2e9c43dd
JL
985 /*
986 * Used for VCO periodic calibration.
987 */
988 int rf_channel;
989
c5c65761
HS
990 /*
991 * Protect the interrupt mask register.
992 */
993 spinlock_t irqmask_lock;
84e9e8eb
HS
994
995 /*
996 * List of BlockAckReq TX entries that need driver BlockAck processing.
997 */
998 struct list_head bar_list;
999 spinlock_t bar_list_lock;
5616a6ef
GJ
1000
1001 /* Extra TX headroom required for alignment purposes. */
1002 unsigned int extra_tx_headroom;
84e9e8eb
HS
1003};
1004
1005struct rt2x00_bar_list_entry {
1006 struct list_head list;
1007 struct rcu_head head;
1008
1009 struct queue_entry *entry;
1010 int block_acked;
1011
1012 /* Relevant parts of the IEEE80211 BAR header */
1013 __u8 ra[6];
1014 __u8 ta[6];
1015 __le16 control;
1016 __le16 start_seq_num;
95ea3627
ID
1017};
1018
1f285f14
BZ
1019/*
1020 * Register defines.
1021 * Some registers require multiple attempts before success,
1022 * in those cases REGISTER_BUSY_COUNT attempts should be
1023 * taken with a REGISTER_BUSY_DELAY interval.
1024 */
ae4ecb9f 1025#define REGISTER_BUSY_COUNT 100
1f285f14
BZ
1026#define REGISTER_BUSY_DELAY 100
1027
95ea3627
ID
1028/*
1029 * Generic RF access.
1030 * The RF is being accessed by word index.
1031 */
0e14f6d3 1032static inline void rt2x00_rf_read(struct rt2x00_dev *rt2x00dev,
95ea3627
ID
1033 const unsigned int word, u32 *data)
1034{
6b26dead
PR
1035 BUG_ON(word < 1 || word > rt2x00dev->ops->rf_size / sizeof(u32));
1036 *data = rt2x00dev->rf[word - 1];
95ea3627
ID
1037}
1038
0e14f6d3 1039static inline void rt2x00_rf_write(struct rt2x00_dev *rt2x00dev,
95ea3627
ID
1040 const unsigned int word, u32 data)
1041{
6b26dead
PR
1042 BUG_ON(word < 1 || word > rt2x00dev->ops->rf_size / sizeof(u32));
1043 rt2x00dev->rf[word - 1] = data;
95ea3627
ID
1044}
1045
1046/*
8756130b 1047 * Generic EEPROM access. The EEPROM is being accessed by word or byte index.
95ea3627 1048 */
0e14f6d3 1049static inline void *rt2x00_eeprom_addr(struct rt2x00_dev *rt2x00dev,
95ea3627
ID
1050 const unsigned int word)
1051{
1052 return (void *)&rt2x00dev->eeprom[word];
1053}
1054
0e14f6d3 1055static inline void rt2x00_eeprom_read(struct rt2x00_dev *rt2x00dev,
95ea3627
ID
1056 const unsigned int word, u16 *data)
1057{
1058 *data = le16_to_cpu(rt2x00dev->eeprom[word]);
1059}
1060
0e14f6d3 1061static inline void rt2x00_eeprom_write(struct rt2x00_dev *rt2x00dev,
95ea3627
ID
1062 const unsigned int word, u16 data)
1063{
1064 rt2x00dev->eeprom[word] = cpu_to_le16(data);
1065}
1066
8756130b
SG
1067static inline u8 rt2x00_eeprom_byte(struct rt2x00_dev *rt2x00dev,
1068 const unsigned int byte)
1069{
1070 return *(((u8 *)rt2x00dev->eeprom) + byte);
1071}
1072
95ea3627
ID
1073/*
1074 * Chipset handlers
1075 */
1076static inline void rt2x00_set_chip(struct rt2x00_dev *rt2x00dev,
49e721ec 1077 const u16 rt, const u16 rf, const u16 rev)
95ea3627 1078{
95ea3627
ID
1079 rt2x00dev->chip.rt = rt;
1080 rt2x00dev->chip.rf = rf;
1081 rt2x00dev->chip.rev = rev;
440ddada 1082
ec9c4989
JP
1083 rt2x00_info(rt2x00dev, "Chipset detected - rt: %04x, rf: %04x, rev: %04x\n",
1084 rt2x00dev->chip.rt, rt2x00dev->chip.rf,
1085 rt2x00dev->chip.rev);
16475b09
GW
1086}
1087
5ce69003
GJ
1088static inline void rt2x00_set_rt(struct rt2x00_dev *rt2x00dev,
1089 const u16 rt, const u16 rev)
1090{
1091 rt2x00dev->chip.rt = rt;
1092 rt2x00dev->chip.rev = rev;
1093
ec9c4989
JP
1094 rt2x00_info(rt2x00dev, "RT chipset %04x, rev %04x detected\n",
1095 rt2x00dev->chip.rt, rt2x00dev->chip.rev);
5ce69003
GJ
1096}
1097
1098static inline void rt2x00_set_rf(struct rt2x00_dev *rt2x00dev, const u16 rf)
1099{
1100 rt2x00dev->chip.rf = rf;
1101
ec9c4989
JP
1102 rt2x00_info(rt2x00dev, "RF chipset %04x detected\n",
1103 rt2x00dev->chip.rf);
5ce69003
GJ
1104}
1105
8d0c9b65 1106static inline bool rt2x00_rt(struct rt2x00_dev *rt2x00dev, const u16 rt)
95ea3627 1107{
5122d898 1108 return (rt2x00dev->chip.rt == rt);
95ea3627
ID
1109}
1110
8d0c9b65 1111static inline bool rt2x00_rf(struct rt2x00_dev *rt2x00dev, const u16 rf)
95ea3627 1112{
5122d898 1113 return (rt2x00dev->chip.rf == rf);
95ea3627
ID
1114}
1115
49e721ec 1116static inline u16 rt2x00_rev(struct rt2x00_dev *rt2x00dev)
95ea3627 1117{
5122d898 1118 return rt2x00dev->chip.rev;
95ea3627
ID
1119}
1120
8d0c9b65
GW
1121static inline bool rt2x00_rt_rev(struct rt2x00_dev *rt2x00dev,
1122 const u16 rt, const u16 rev)
1123{
1124 return (rt2x00_rt(rt2x00dev, rt) && rt2x00_rev(rt2x00dev) == rev);
1125}
1126
1127static inline bool rt2x00_rt_rev_lt(struct rt2x00_dev *rt2x00dev,
1128 const u16 rt, const u16 rev)
1129{
1130 return (rt2x00_rt(rt2x00dev, rt) && rt2x00_rev(rt2x00dev) < rev);
1131}
1132
1133static inline bool rt2x00_rt_rev_gte(struct rt2x00_dev *rt2x00dev,
1134 const u16 rt, const u16 rev)
1135{
1136 return (rt2x00_rt(rt2x00dev, rt) && rt2x00_rev(rt2x00dev) >= rev);
1137}
1138
5822e070
BZ
1139static inline void rt2x00_set_chip_intf(struct rt2x00_dev *rt2x00dev,
1140 enum rt2x00_chip_intf intf)
1141{
1142 rt2x00dev->chip.intf = intf;
1143}
1144
5122d898 1145static inline bool rt2x00_intf(struct rt2x00_dev *rt2x00dev,
5822e070
BZ
1146 enum rt2x00_chip_intf intf)
1147{
5122d898 1148 return (rt2x00dev->chip.intf == intf);
5822e070
BZ
1149}
1150
cea90e55 1151static inline bool rt2x00_is_pci(struct rt2x00_dev *rt2x00dev)
5822e070 1152{
6e1fdd11
GW
1153 return rt2x00_intf(rt2x00dev, RT2X00_CHIP_INTF_PCI) ||
1154 rt2x00_intf(rt2x00dev, RT2X00_CHIP_INTF_PCIE);
1155}
1156
1157static inline bool rt2x00_is_pcie(struct rt2x00_dev *rt2x00dev)
1158{
1159 return rt2x00_intf(rt2x00dev, RT2X00_CHIP_INTF_PCIE);
5822e070
BZ
1160}
1161
cea90e55 1162static inline bool rt2x00_is_usb(struct rt2x00_dev *rt2x00dev)
5822e070 1163{
5122d898 1164 return rt2x00_intf(rt2x00dev, RT2X00_CHIP_INTF_USB);
5822e070
BZ
1165}
1166
cea90e55
GW
1167static inline bool rt2x00_is_soc(struct rt2x00_dev *rt2x00dev)
1168{
1169 return rt2x00_intf(rt2x00dev, RT2X00_CHIP_INTF_SOC);
1170}
1171
a44d0141
GJ
1172/* Helpers for capability flags */
1173
1174static inline bool
1175rt2x00_has_cap_flag(struct rt2x00_dev *rt2x00dev,
1176 enum rt2x00_capability_flags cap_flag)
1177{
1178 return test_bit(cap_flag, &rt2x00dev->cap_flags);
1179}
1180
1181static inline bool
1182rt2x00_has_cap_hw_crypto(struct rt2x00_dev *rt2x00dev)
1183{
1184 return rt2x00_has_cap_flag(rt2x00dev, CAPABILITY_HW_CRYPTO);
1185}
1186
1187static inline bool
1188rt2x00_has_cap_power_limit(struct rt2x00_dev *rt2x00dev)
1189{
1190 return rt2x00_has_cap_flag(rt2x00dev, CAPABILITY_POWER_LIMIT);
1191}
1192
1193static inline bool
1194rt2x00_has_cap_control_filters(struct rt2x00_dev *rt2x00dev)
1195{
1196 return rt2x00_has_cap_flag(rt2x00dev, CAPABILITY_CONTROL_FILTERS);
1197}
1198
1199static inline bool
1200rt2x00_has_cap_control_filter_pspoll(struct rt2x00_dev *rt2x00dev)
1201{
1202 return rt2x00_has_cap_flag(rt2x00dev, CAPABILITY_CONTROL_FILTER_PSPOLL);
1203}
1204
1205static inline bool
1206rt2x00_has_cap_pre_tbtt_interrupt(struct rt2x00_dev *rt2x00dev)
1207{
1208 return rt2x00_has_cap_flag(rt2x00dev, CAPABILITY_PRE_TBTT_INTERRUPT);
1209}
1210
1211static inline bool
1212rt2x00_has_cap_link_tuning(struct rt2x00_dev *rt2x00dev)
1213{
1214 return rt2x00_has_cap_flag(rt2x00dev, CAPABILITY_LINK_TUNING);
1215}
1216
1217static inline bool
1218rt2x00_has_cap_frame_type(struct rt2x00_dev *rt2x00dev)
1219{
1220 return rt2x00_has_cap_flag(rt2x00dev, CAPABILITY_FRAME_TYPE);
1221}
1222
1223static inline bool
1224rt2x00_has_cap_rf_sequence(struct rt2x00_dev *rt2x00dev)
1225{
1226 return rt2x00_has_cap_flag(rt2x00dev, CAPABILITY_RF_SEQUENCE);
1227}
1228
1229static inline bool
1230rt2x00_has_cap_external_lna_a(struct rt2x00_dev *rt2x00dev)
1231{
1232 return rt2x00_has_cap_flag(rt2x00dev, CAPABILITY_EXTERNAL_LNA_A);
1233}
1234
1235static inline bool
1236rt2x00_has_cap_external_lna_bg(struct rt2x00_dev *rt2x00dev)
1237{
1238 return rt2x00_has_cap_flag(rt2x00dev, CAPABILITY_EXTERNAL_LNA_BG);
1239}
1240
1241static inline bool
1242rt2x00_has_cap_double_antenna(struct rt2x00_dev *rt2x00dev)
1243{
1244 return rt2x00_has_cap_flag(rt2x00dev, CAPABILITY_DOUBLE_ANTENNA);
1245}
1246
1247static inline bool
1248rt2x00_has_cap_bt_coexist(struct rt2x00_dev *rt2x00dev)
1249{
1250 return rt2x00_has_cap_flag(rt2x00dev, CAPABILITY_BT_COEXIST);
1251}
1252
1253static inline bool
1254rt2x00_has_cap_vco_recalibration(struct rt2x00_dev *rt2x00dev)
1255{
1256 return rt2x00_has_cap_flag(rt2x00dev, CAPABILITY_VCO_RECALIBRATION);
1257}
1258
239c249d 1259/**
c4da0048 1260 * rt2x00queue_map_txskb - Map a skb into DMA for TX purposes.
fa69560f 1261 * @entry: Pointer to &struct queue_entry
4ea545d4
SG
1262 *
1263 * Returns -ENOMEM if mapping fail, 0 otherwise.
239c249d 1264 */
4ea545d4 1265int rt2x00queue_map_txskb(struct queue_entry *entry);
239c249d 1266
0b8004aa
GW
1267/**
1268 * rt2x00queue_unmap_skb - Unmap a skb from DMA.
fa69560f 1269 * @entry: Pointer to &struct queue_entry
0b8004aa 1270 */
fa69560f 1271void rt2x00queue_unmap_skb(struct queue_entry *entry);
0b8004aa 1272
11f818e0
HS
1273/**
1274 * rt2x00queue_get_tx_queue - Convert tx queue index to queue pointer
1275 * @rt2x00dev: Pointer to &struct rt2x00_dev.
1276 * @queue: rt2x00 queue index (see &enum data_queue_qid).
1277 *
1278 * Returns NULL for non tx queues.
1279 */
1280static inline struct data_queue *
1281rt2x00queue_get_tx_queue(struct rt2x00_dev *rt2x00dev,
1282 const enum data_queue_qid queue)
1283{
1284 if (queue < rt2x00dev->ops->tx_queues && rt2x00dev->tx)
1285 return &rt2x00dev->tx[queue];
1286
61c6e489
GW
1287 if (queue == QID_ATIM)
1288 return rt2x00dev->atim;
1289
11f818e0
HS
1290 return NULL;
1291}
1292
181d6902
ID
1293/**
1294 * rt2x00queue_get_entry - Get queue entry where the given index points to.
9a46d44e 1295 * @queue: Pointer to &struct data_queue from where we obtain the entry.
181d6902
ID
1296 * @index: Index identifier for obtaining the correct index.
1297 */
1298struct queue_entry *rt2x00queue_get_entry(struct data_queue *queue,
1299 enum queue_index index);
1300
0b7fde54
ID
1301/**
1302 * rt2x00queue_pause_queue - Pause a data queue
1303 * @queue: Pointer to &struct data_queue.
1304 *
1305 * This function will pause the data queue locally, preventing
1306 * new frames to be added to the queue (while the hardware is
1307 * still allowed to run).
1308 */
1309void rt2x00queue_pause_queue(struct data_queue *queue);
1310
1311/**
1312 * rt2x00queue_unpause_queue - unpause a data queue
1313 * @queue: Pointer to &struct data_queue.
1314 *
1315 * This function will unpause the data queue locally, allowing
1316 * new frames to be added to the queue again.
1317 */
1318void rt2x00queue_unpause_queue(struct data_queue *queue);
1319
1320/**
1321 * rt2x00queue_start_queue - Start a data queue
1322 * @queue: Pointer to &struct data_queue.
1323 *
1324 * This function will start handling all pending frames in the queue.
1325 */
1326void rt2x00queue_start_queue(struct data_queue *queue);
1327
1328/**
1329 * rt2x00queue_stop_queue - Halt a data queue
1330 * @queue: Pointer to &struct data_queue.
1331 *
1332 * This function will stop all pending frames in the queue.
1333 */
1334void rt2x00queue_stop_queue(struct data_queue *queue);
1335
5be65609
ID
1336/**
1337 * rt2x00queue_flush_queue - Flush a data queue
1338 * @queue: Pointer to &struct data_queue.
1339 * @drop: True to drop all pending frames.
1340 *
1341 * This function will flush the queue. After this call
25985edc 1342 * the queue is guaranteed to be empty.
5be65609
ID
1343 */
1344void rt2x00queue_flush_queue(struct data_queue *queue, bool drop);
1345
0b7fde54
ID
1346/**
1347 * rt2x00queue_start_queues - Start all data queues
1348 * @rt2x00dev: Pointer to &struct rt2x00_dev.
1349 *
1350 * This function will loop through all available queues to start them
1351 */
1352void rt2x00queue_start_queues(struct rt2x00_dev *rt2x00dev);
1353
1354/**
1355 * rt2x00queue_stop_queues - Halt all data queues
1356 * @rt2x00dev: Pointer to &struct rt2x00_dev.
1357 *
1358 * This function will loop through all available queues to stop
1359 * any pending frames.
1360 */
1361void rt2x00queue_stop_queues(struct rt2x00_dev *rt2x00dev);
1362
5be65609
ID
1363/**
1364 * rt2x00queue_flush_queues - Flush all data queues
1365 * @rt2x00dev: Pointer to &struct rt2x00_dev.
1366 * @drop: True to drop all pending frames.
1367 *
1368 * This function will loop through all available queues to flush
1369 * any pending frames.
1370 */
1371void rt2x00queue_flush_queues(struct rt2x00_dev *rt2x00dev, bool drop);
1372
b4df4708
GW
1373/*
1374 * Debugfs handlers.
1375 */
1376/**
1377 * rt2x00debug_dump_frame - Dump a frame to userspace through debugfs.
1378 * @rt2x00dev: Pointer to &struct rt2x00_dev.
1379 * @type: The type of frame that is being dumped.
1380 * @skb: The skb containing the frame to be dumped.
1381 */
1382#ifdef CONFIG_RT2X00_LIB_DEBUGFS
1383void rt2x00debug_dump_frame(struct rt2x00_dev *rt2x00dev,
1384 enum rt2x00_dump_type type, struct sk_buff *skb);
1385#else
1386static inline void rt2x00debug_dump_frame(struct rt2x00_dev *rt2x00dev,
1387 enum rt2x00_dump_type type,
1388 struct sk_buff *skb)
1389{
1390}
1391#endif /* CONFIG_RT2X00_LIB_DEBUGFS */
1392
18325523
HS
1393/*
1394 * Utility functions.
1395 */
1396u32 rt2x00lib_get_bssidx(struct rt2x00_dev *rt2x00dev,
1397 struct ieee80211_vif *vif);
1398
95ea3627
ID
1399/*
1400 * Interrupt context handlers.
1401 */
1402void rt2x00lib_beacondone(struct rt2x00_dev *rt2x00dev);
9f926fb5 1403void rt2x00lib_pretbtt(struct rt2x00_dev *rt2x00dev);
64e7d723 1404void rt2x00lib_dmastart(struct queue_entry *entry);
652a9dd2 1405void rt2x00lib_dmadone(struct queue_entry *entry);
181d6902
ID
1406void rt2x00lib_txdone(struct queue_entry *entry,
1407 struct txdone_entry_desc *txdesc);
3392bece 1408void rt2x00lib_txdone_noinfo(struct queue_entry *entry, u32 status);
88211021 1409void rt2x00lib_rxdone(struct queue_entry *entry, gfp_t gfp);
95ea3627 1410
95ea3627
ID
1411/*
1412 * mac80211 handlers.
1413 */
36323f81
TH
1414void rt2x00mac_tx(struct ieee80211_hw *hw,
1415 struct ieee80211_tx_control *control,
1416 struct sk_buff *skb);
95ea3627
ID
1417int rt2x00mac_start(struct ieee80211_hw *hw);
1418void rt2x00mac_stop(struct ieee80211_hw *hw);
1419int rt2x00mac_add_interface(struct ieee80211_hw *hw,
1ed32e4f 1420 struct ieee80211_vif *vif);
95ea3627 1421void rt2x00mac_remove_interface(struct ieee80211_hw *hw,
1ed32e4f 1422 struct ieee80211_vif *vif);
e8975581 1423int rt2x00mac_config(struct ieee80211_hw *hw, u32 changed);
3a643d24
ID
1424void rt2x00mac_configure_filter(struct ieee80211_hw *hw,
1425 unsigned int changed_flags,
1426 unsigned int *total_flags,
3ac64bee 1427 u64 multicast);
930c06f2
SS
1428int rt2x00mac_set_tim(struct ieee80211_hw *hw, struct ieee80211_sta *sta,
1429 bool set);
2bb057d0
ID
1430#ifdef CONFIG_RT2X00_LIB_CRYPTO
1431int rt2x00mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
dc822b5d 1432 struct ieee80211_vif *vif, struct ieee80211_sta *sta,
2bb057d0
ID
1433 struct ieee80211_key_conf *key);
1434#else
1435#define rt2x00mac_set_key NULL
1436#endif /* CONFIG_RT2X00_LIB_CRYPTO */
b4943d81
HS
1437int rt2x00mac_sta_add(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
1438 struct ieee80211_sta *sta);
1439int rt2x00mac_sta_remove(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
1440 struct ieee80211_sta *sta);
d8147f9d
ID
1441void rt2x00mac_sw_scan_start(struct ieee80211_hw *hw);
1442void rt2x00mac_sw_scan_complete(struct ieee80211_hw *hw);
95ea3627
ID
1443int rt2x00mac_get_stats(struct ieee80211_hw *hw,
1444 struct ieee80211_low_level_stats *stats);
471b3efd
JB
1445void rt2x00mac_bss_info_changed(struct ieee80211_hw *hw,
1446 struct ieee80211_vif *vif,
1447 struct ieee80211_bss_conf *bss_conf,
1448 u32 changes);
8a3a3c85
EP
1449int rt2x00mac_conf_tx(struct ieee80211_hw *hw,
1450 struct ieee80211_vif *vif, u16 queue,
95ea3627 1451 const struct ieee80211_tx_queue_params *params);
e47a5cdd 1452void rt2x00mac_rfkill_poll(struct ieee80211_hw *hw);
39ecc01d 1453void rt2x00mac_flush(struct ieee80211_hw *hw, u32 queues, bool drop);
0ed7b3c0
ID
1454int rt2x00mac_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant);
1455int rt2x00mac_get_antenna(struct ieee80211_hw *hw, u32 *tx_ant, u32 *rx_ant);
e7dee444
ID
1456void rt2x00mac_get_ringparam(struct ieee80211_hw *hw,
1457 u32 *tx, u32 *tx_max, u32 *rx, u32 *rx_max);
5f0dd296 1458bool rt2x00mac_tx_frames_pending(struct ieee80211_hw *hw);
95ea3627
ID
1459
1460/*
1461 * Driver allocation handlers.
1462 */
1463int rt2x00lib_probe_dev(struct rt2x00_dev *rt2x00dev);
1464void rt2x00lib_remove_dev(struct rt2x00_dev *rt2x00dev);
1465#ifdef CONFIG_PM
1466int rt2x00lib_suspend(struct rt2x00_dev *rt2x00dev, pm_message_t state);
1467int rt2x00lib_resume(struct rt2x00_dev *rt2x00dev);
1468#endif /* CONFIG_PM */
1469
1470#endif /* RT2X00_H */
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