Commit | Line | Data |
---|---|---|
95ea3627 | 1 | /* |
7e613e16 ID |
2 | Copyright (C) 2010 Willow Garage <http://www.willowgarage.com> |
3 | Copyright (C) 2004 - 2010 Ivo van Doorn <IvDoorn@gmail.com> | |
9c9a0d14 | 4 | Copyright (C) 2004 - 2009 Gertjan van Wingerde <gwingerde@gmail.com> |
95ea3627 ID |
5 | <http://rt2x00.serialmonkey.com> |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2 of the License, or | |
10 | (at your option) any later version. | |
11 | ||
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with this program; if not, write to the | |
19 | Free Software Foundation, Inc., | |
20 | 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. | |
21 | */ | |
22 | ||
23 | /* | |
24 | Module: rt2x00 | |
25 | Abstract: rt2x00 global information. | |
26 | */ | |
27 | ||
28 | #ifndef RT2X00_H | |
29 | #define RT2X00_H | |
30 | ||
31 | #include <linux/bitops.h> | |
95ea3627 ID |
32 | #include <linux/skbuff.h> |
33 | #include <linux/workqueue.h> | |
34 | #include <linux/firmware.h> | |
a9450b70 | 35 | #include <linux/leds.h> |
3d82346c | 36 | #include <linux/mutex.h> |
61af43c5 | 37 | #include <linux/etherdevice.h> |
cca3e998 | 38 | #include <linux/input-polldev.h> |
95ea3627 ID |
39 | |
40 | #include <net/mac80211.h> | |
41 | ||
42 | #include "rt2x00debug.h" | |
b4df4708 | 43 | #include "rt2x00dump.h" |
a9450b70 | 44 | #include "rt2x00leds.h" |
95ea3627 | 45 | #include "rt2x00reg.h" |
181d6902 | 46 | #include "rt2x00queue.h" |
95ea3627 ID |
47 | |
48 | /* | |
49 | * Module information. | |
95ea3627 | 50 | */ |
754be309 | 51 | #define DRV_VERSION "2.3.0" |
95ea3627 ID |
52 | #define DRV_PROJECT "http://rt2x00.serialmonkey.com" |
53 | ||
54 | /* | |
55 | * Debug definitions. | |
56 | * Debug output has to be enabled during compile time. | |
57 | */ | |
58 | #define DEBUG_PRINTK_MSG(__dev, __kernlvl, __lvl, __msg, __args...) \ | |
59 | printk(__kernlvl "%s -> %s: %s - " __msg, \ | |
c94c93da | 60 | wiphy_name((__dev)->hw->wiphy), __func__, __lvl, ##__args) |
95ea3627 ID |
61 | |
62 | #define DEBUG_PRINTK_PROBE(__kernlvl, __lvl, __msg, __args...) \ | |
63 | printk(__kernlvl "%s -> %s: %s - " __msg, \ | |
c94c93da | 64 | KBUILD_MODNAME, __func__, __lvl, ##__args) |
95ea3627 ID |
65 | |
66 | #ifdef CONFIG_RT2X00_DEBUG | |
67 | #define DEBUG_PRINTK(__dev, __kernlvl, __lvl, __msg, __args...) \ | |
68 | DEBUG_PRINTK_MSG(__dev, __kernlvl, __lvl, __msg, ##__args); | |
69 | #else | |
70 | #define DEBUG_PRINTK(__dev, __kernlvl, __lvl, __msg, __args...) \ | |
71 | do { } while (0) | |
72 | #endif /* CONFIG_RT2X00_DEBUG */ | |
73 | ||
74 | /* | |
75 | * Various debug levels. | |
76 | * The debug levels PANIC and ERROR both indicate serious problems, | |
77 | * for this reason they should never be ignored. | |
78 | * The special ERROR_PROBE message is for messages that are generated | |
79 | * when the rt2x00_dev is not yet initialized. | |
80 | */ | |
81 | #define PANIC(__dev, __msg, __args...) \ | |
82 | DEBUG_PRINTK_MSG(__dev, KERN_CRIT, "Panic", __msg, ##__args) | |
83 | #define ERROR(__dev, __msg, __args...) \ | |
84 | DEBUG_PRINTK_MSG(__dev, KERN_ERR, "Error", __msg, ##__args) | |
85 | #define ERROR_PROBE(__msg, __args...) \ | |
86 | DEBUG_PRINTK_PROBE(KERN_ERR, "Error", __msg, ##__args) | |
87 | #define WARNING(__dev, __msg, __args...) \ | |
88 | DEBUG_PRINTK(__dev, KERN_WARNING, "Warning", __msg, ##__args) | |
89 | #define NOTICE(__dev, __msg, __args...) \ | |
90 | DEBUG_PRINTK(__dev, KERN_NOTICE, "Notice", __msg, ##__args) | |
91 | #define INFO(__dev, __msg, __args...) \ | |
92 | DEBUG_PRINTK(__dev, KERN_INFO, "Info", __msg, ##__args) | |
93 | #define DEBUG(__dev, __msg, __args...) \ | |
94 | DEBUG_PRINTK(__dev, KERN_DEBUG, "Debug", __msg, ##__args) | |
95 | #define EEPROM(__dev, __msg, __args...) \ | |
96 | DEBUG_PRINTK(__dev, KERN_DEBUG, "EEPROM recovery", __msg, ##__args) | |
97 | ||
bad13639 ID |
98 | /* |
99 | * Duration calculations | |
100 | * The rate variable passed is: 100kbs. | |
101 | * To convert from bytes to bits we multiply size with 8, | |
102 | * then the size is multiplied with 10 to make the | |
103 | * real rate -> rate argument correction. | |
104 | */ | |
105 | #define GET_DURATION(__size, __rate) (((__size) * 8 * 10) / (__rate)) | |
106 | #define GET_DURATION_RES(__size, __rate)(((__size) * 8 * 10) % (__rate)) | |
107 | ||
77e73d18 GW |
108 | /* |
109 | * Determine the number of L2 padding bytes required between the header and | |
110 | * the payload. | |
111 | */ | |
112 | #define L2PAD_SIZE(__hdrlen) (-(__hdrlen) & 3) | |
113 | ||
9f166171 ID |
114 | /* |
115 | * Determine the alignment requirement, | |
116 | * to make sure the 802.11 payload is padded to a 4-byte boundrary | |
117 | * we must determine the address of the payload and calculate the | |
118 | * amount of bytes needed to move the data. | |
119 | */ | |
120 | #define ALIGN_SIZE(__skb, __header) \ | |
121 | ( ((unsigned long)((__skb)->data + (__header))) & 3 ) | |
122 | ||
7a4a77b7 GW |
123 | /* |
124 | * Constants for extra TX headroom for alignment purposes. | |
125 | */ | |
126 | #define RT2X00_ALIGN_SIZE 4 /* Only whole frame needs alignment */ | |
127 | #define RT2X00_L2PAD_SIZE 8 /* Both header & payload need alignment */ | |
128 | ||
95ea3627 ID |
129 | /* |
130 | * Standard timing and size defines. | |
131 | * These values should follow the ieee80211 specifications. | |
132 | */ | |
133 | #define ACK_SIZE 14 | |
134 | #define IEEE80211_HEADER 24 | |
135 | #define PLCP 48 | |
136 | #define BEACON 100 | |
137 | #define PREAMBLE 144 | |
138 | #define SHORT_PREAMBLE 72 | |
139 | #define SLOT_TIME 20 | |
140 | #define SHORT_SLOT_TIME 9 | |
141 | #define SIFS 10 | |
142 | #define PIFS ( SIFS + SLOT_TIME ) | |
143 | #define SHORT_PIFS ( SIFS + SHORT_SLOT_TIME ) | |
144 | #define DIFS ( PIFS + SLOT_TIME ) | |
145 | #define SHORT_DIFS ( SHORT_PIFS + SHORT_SLOT_TIME ) | |
f2fdbc48 | 146 | #define EIFS ( SIFS + DIFS + \ |
bad13639 | 147 | GET_DURATION(IEEE80211_HEADER + ACK_SIZE, 10) ) |
f2fdbc48 | 148 | #define SHORT_EIFS ( SIFS + SHORT_DIFS + \ |
bad13639 | 149 | GET_DURATION(IEEE80211_HEADER + ACK_SIZE, 10) ) |
95ea3627 | 150 | |
66679a65 LE |
151 | /* |
152 | * Structure for average calculation | |
153 | * The avg field contains the actual average value, | |
154 | * but avg_weight is internally used during calculations | |
155 | * to prevent rounding errors. | |
156 | */ | |
157 | struct avg_val { | |
158 | int avg; | |
159 | int avg_weight; | |
160 | }; | |
161 | ||
5822e070 BZ |
162 | enum rt2x00_chip_intf { |
163 | RT2X00_CHIP_INTF_PCI, | |
6e1fdd11 | 164 | RT2X00_CHIP_INTF_PCIE, |
5822e070 | 165 | RT2X00_CHIP_INTF_USB, |
cea90e55 | 166 | RT2X00_CHIP_INTF_SOC, |
5822e070 BZ |
167 | }; |
168 | ||
95ea3627 ID |
169 | /* |
170 | * Chipset identification | |
171 | * The chipset on the device is composed of a RT and RF chip. | |
172 | * The chipset combination is important for determining device capabilities. | |
173 | */ | |
174 | struct rt2x00_chip { | |
175 | u16 rt; | |
49e721ec GW |
176 | #define RT2460 0x2460 |
177 | #define RT2560 0x2560 | |
178 | #define RT2570 0x2570 | |
179 | #define RT2661 0x2661 | |
180 | #define RT2573 0x2573 | |
5ed8f458 | 181 | #define RT2860 0x2860 /* 2.4GHz */ |
e148b4c8 | 182 | #define RT2872 0x2872 /* WSOC */ |
49e721ec | 183 | #define RT2883 0x2883 /* WSOC */ |
49e721ec GW |
184 | #define RT3070 0x3070 |
185 | #define RT3071 0x3071 | |
a9b3a9f7 | 186 | #define RT3090 0x3090 /* 2.4GHz PCIe */ |
49e721ec GW |
187 | #define RT3390 0x3390 |
188 | #define RT3572 0x3572 | |
e148b4c8 GW |
189 | #define RT3593 0x3593 /* PCIe */ |
190 | #define RT3883 0x3883 /* WSOC */ | |
95ea3627 ID |
191 | |
192 | u16 rf; | |
49e721ec | 193 | u16 rev; |
5822e070 BZ |
194 | |
195 | enum rt2x00_chip_intf intf; | |
95ea3627 ID |
196 | }; |
197 | ||
198 | /* | |
199 | * RF register values that belong to a particular channel. | |
200 | */ | |
201 | struct rf_channel { | |
202 | int channel; | |
203 | u32 rf1; | |
204 | u32 rf2; | |
205 | u32 rf3; | |
206 | u32 rf4; | |
207 | }; | |
208 | ||
8c5e7a5f ID |
209 | /* |
210 | * Channel information structure | |
211 | */ | |
212 | struct channel_info { | |
213 | unsigned int flags; | |
214 | #define GEOGRAPHY_ALLOWED 0x00000001 | |
215 | ||
216 | short tx_power1; | |
217 | short tx_power2; | |
218 | }; | |
219 | ||
addc81bd ID |
220 | /* |
221 | * Antenna setup values. | |
222 | */ | |
223 | struct antenna_setup { | |
224 | enum antenna rx; | |
225 | enum antenna tx; | |
226 | }; | |
227 | ||
95ea3627 | 228 | /* |
ebcf26da | 229 | * Quality statistics about the currently active link. |
95ea3627 | 230 | */ |
ebcf26da | 231 | struct link_qual { |
95ea3627 | 232 | /* |
5352ff65 ID |
233 | * Statistics required for Link tuning by driver |
234 | * The rssi value is provided by rt2x00lib during the | |
235 | * link_tuner() callback function. | |
236 | * The false_cca field is filled during the link_stats() | |
237 | * callback function and could be used during the | |
238 | * link_tuner() callback function. | |
95ea3627 | 239 | */ |
5352ff65 | 240 | int rssi; |
95ea3627 ID |
241 | int false_cca; |
242 | ||
243 | /* | |
5352ff65 ID |
244 | * VGC levels |
245 | * Hardware driver will tune the VGC level during each call | |
246 | * to the link_tuner() callback function. This vgc_level is | |
247 | * is determined based on the link quality statistics like | |
248 | * average RSSI and the false CCA count. | |
95ea3627 | 249 | * |
5352ff65 ID |
250 | * In some cases the drivers need to differentiate between |
251 | * the currently "desired" VGC level and the level configured | |
252 | * in the hardware. The latter is important to reduce the | |
253 | * number of BBP register reads to reduce register access | |
254 | * overhead. For this reason we store both values here. | |
255 | */ | |
256 | u8 vgc_level; | |
257 | u8 vgc_level_reg; | |
258 | ||
259 | /* | |
260 | * Statistics required for Signal quality calculation. | |
261 | * These fields might be changed during the link_stats() | |
262 | * callback function. | |
95ea3627 | 263 | */ |
95ea3627 ID |
264 | int rx_success; |
265 | int rx_failed; | |
95ea3627 ID |
266 | int tx_success; |
267 | int tx_failed; | |
ebcf26da ID |
268 | }; |
269 | ||
69f81a2c ID |
270 | /* |
271 | * Antenna settings about the currently active link. | |
272 | */ | |
273 | struct link_ant { | |
274 | /* | |
275 | * Antenna flags | |
276 | */ | |
277 | unsigned int flags; | |
278 | #define ANTENNA_RX_DIVERSITY 0x00000001 | |
279 | #define ANTENNA_TX_DIVERSITY 0x00000002 | |
280 | #define ANTENNA_MODE_SAMPLE 0x00000004 | |
281 | ||
282 | /* | |
283 | * Currently active TX/RX antenna setup. | |
284 | * When software diversity is used, this will indicate | |
285 | * which antenna is actually used at this time. | |
286 | */ | |
287 | struct antenna_setup active; | |
288 | ||
289 | /* | |
193df183 LE |
290 | * RSSI history information for the antenna. |
291 | * Used to determine when to switch antenna | |
292 | * when using software diversity. | |
69f81a2c | 293 | */ |
193df183 | 294 | int rssi_history; |
69f81a2c ID |
295 | |
296 | /* | |
297 | * Current RSSI average of the currently active antenna. | |
298 | * Similar to the avg_rssi in the link_qual structure | |
299 | * this value is updated by using the walking average. | |
300 | */ | |
66679a65 | 301 | struct avg_val rssi_ant; |
69f81a2c ID |
302 | }; |
303 | ||
ebcf26da ID |
304 | /* |
305 | * To optimize the quality of the link we need to store | |
306 | * the quality of received frames and periodically | |
307 | * optimize the link. | |
308 | */ | |
309 | struct link { | |
310 | /* | |
311 | * Link tuner counter | |
312 | * The number of times the link has been tuned | |
313 | * since the radio has been switched on. | |
314 | */ | |
315 | u32 count; | |
316 | ||
317 | /* | |
318 | * Quality measurement values. | |
319 | */ | |
320 | struct link_qual qual; | |
321 | ||
addc81bd | 322 | /* |
69f81a2c | 323 | * TX/RX antenna setup. |
addc81bd | 324 | */ |
69f81a2c | 325 | struct link_ant ant; |
addc81bd | 326 | |
ebcf26da | 327 | /* |
5352ff65 | 328 | * Currently active average RSSI value |
ebcf26da | 329 | */ |
66679a65 | 330 | struct avg_val avg_rssi; |
eb20b4e8 | 331 | |
95ea3627 ID |
332 | /* |
333 | * Work structure for scheduling periodic link tuning. | |
334 | */ | |
335 | struct delayed_work work; | |
c965c74b ID |
336 | |
337 | /* | |
338 | * Work structure for scheduling periodic watchdog monitoring. | |
339 | */ | |
340 | struct delayed_work watchdog_work; | |
95ea3627 ID |
341 | }; |
342 | ||
95ea3627 ID |
343 | /* |
344 | * Interface structure | |
6bb40dd1 ID |
345 | * Per interface configuration details, this structure |
346 | * is allocated as the private data for ieee80211_vif. | |
95ea3627 | 347 | */ |
6bb40dd1 | 348 | struct rt2x00_intf { |
95ea3627 | 349 | /* |
6bb40dd1 ID |
350 | * All fields within the rt2x00_intf structure |
351 | * must be protected with a spinlock. | |
95ea3627 | 352 | */ |
6bb40dd1 | 353 | spinlock_t lock; |
95ea3627 | 354 | |
95ea3627 ID |
355 | /* |
356 | * MAC of the device. | |
357 | */ | |
358 | u8 mac[ETH_ALEN]; | |
359 | ||
360 | /* | |
361 | * BBSID of the AP to associate with. | |
362 | */ | |
363 | u8 bssid[ETH_ALEN]; | |
95ea3627 | 364 | |
17512dc3 IP |
365 | /* |
366 | * beacon->skb must be protected with the mutex. | |
367 | */ | |
368 | struct mutex beacon_skb_mutex; | |
369 | ||
6bb40dd1 ID |
370 | /* |
371 | * Entry in the beacon queue which belongs to | |
372 | * this interface. Each interface has its own | |
373 | * dedicated beacon entry. | |
374 | */ | |
375 | struct queue_entry *beacon; | |
95ea3627 | 376 | |
6bb40dd1 ID |
377 | /* |
378 | * Actions that needed rescheduling. | |
379 | */ | |
380 | unsigned int delayed_flags; | |
381 | #define DELAYED_UPDATE_BEACON 0x00000001 | |
f591fa5d | 382 | |
d4764b29 ID |
383 | /* |
384 | * Software sequence counter, this is only required | |
385 | * for hardware which doesn't support hardware | |
386 | * sequence counting. | |
387 | */ | |
388 | spinlock_t seqlock; | |
f591fa5d | 389 | u16 seqno; |
6bb40dd1 ID |
390 | }; |
391 | ||
392 | static inline struct rt2x00_intf* vif_to_intf(struct ieee80211_vif *vif) | |
95ea3627 | 393 | { |
6bb40dd1 | 394 | return (struct rt2x00_intf *)vif->drv_priv; |
95ea3627 ID |
395 | } |
396 | ||
31562e80 ID |
397 | /** |
398 | * struct hw_mode_spec: Hardware specifications structure | |
399 | * | |
95ea3627 ID |
400 | * Details about the supported modes, rates and channels |
401 | * of a particular chipset. This is used by rt2x00lib | |
402 | * to build the ieee80211_hw_mode array for mac80211. | |
31562e80 ID |
403 | * |
404 | * @supported_bands: Bitmask contained the supported bands (2.4GHz, 5.2GHz). | |
405 | * @supported_rates: Rate types which are supported (CCK, OFDM). | |
406 | * @num_channels: Number of supported channels. This is used as array size | |
407 | * for @tx_power_a, @tx_power_bg and @channels. | |
9a46d44e | 408 | * @channels: Device/chipset specific channel values (See &struct rf_channel). |
8c5e7a5f | 409 | * @channels_info: Additional information for channels (See &struct channel_info). |
35f00cfc | 410 | * @ht: Driver HT Capabilities (See &ieee80211_sta_ht_cap). |
95ea3627 ID |
411 | */ |
412 | struct hw_mode_spec { | |
31562e80 ID |
413 | unsigned int supported_bands; |
414 | #define SUPPORT_BAND_2GHZ 0x00000001 | |
415 | #define SUPPORT_BAND_5GHZ 0x00000002 | |
416 | ||
417 | unsigned int supported_rates; | |
418 | #define SUPPORT_RATE_CCK 0x00000001 | |
419 | #define SUPPORT_RATE_OFDM 0x00000002 | |
420 | ||
421 | unsigned int num_channels; | |
422 | const struct rf_channel *channels; | |
8c5e7a5f | 423 | const struct channel_info *channels_info; |
35f00cfc ID |
424 | |
425 | struct ieee80211_sta_ht_cap ht; | |
95ea3627 ID |
426 | }; |
427 | ||
5c58ee51 ID |
428 | /* |
429 | * Configuration structure wrapper around the | |
430 | * mac80211 configuration structure. | |
431 | * When mac80211 configures the driver, rt2x00lib | |
432 | * can precalculate values which are equal for all | |
433 | * rt2x00 drivers. Those values can be stored in here. | |
434 | */ | |
435 | struct rt2x00lib_conf { | |
436 | struct ieee80211_conf *conf; | |
8c5e7a5f | 437 | |
5c58ee51 | 438 | struct rf_channel rf; |
8c5e7a5f | 439 | struct channel_info channel; |
5c58ee51 ID |
440 | }; |
441 | ||
72810379 ID |
442 | /* |
443 | * Configuration structure for erp settings. | |
444 | */ | |
445 | struct rt2x00lib_erp { | |
446 | int short_preamble; | |
e360c4cb | 447 | int cts_protection; |
72810379 | 448 | |
881d948c | 449 | u32 basic_rates; |
e4ea1c40 ID |
450 | |
451 | int slot_time; | |
452 | ||
453 | short sifs; | |
454 | short pifs; | |
455 | short difs; | |
456 | short eifs; | |
8a566afe ID |
457 | |
458 | u16 beacon_int; | |
72810379 ID |
459 | }; |
460 | ||
2bb057d0 ID |
461 | /* |
462 | * Configuration structure for hardware encryption. | |
463 | */ | |
464 | struct rt2x00lib_crypto { | |
465 | enum cipher cipher; | |
466 | ||
467 | enum set_key_cmd cmd; | |
468 | const u8 *address; | |
469 | ||
470 | u32 bssidx; | |
471 | u32 aid; | |
472 | ||
473 | u8 key[16]; | |
474 | u8 tx_mic[8]; | |
475 | u8 rx_mic[8]; | |
476 | }; | |
477 | ||
6bb40dd1 ID |
478 | /* |
479 | * Configuration structure wrapper around the | |
480 | * rt2x00 interface configuration handler. | |
481 | */ | |
482 | struct rt2x00intf_conf { | |
483 | /* | |
484 | * Interface type | |
485 | */ | |
05c914fe | 486 | enum nl80211_iftype type; |
6bb40dd1 ID |
487 | |
488 | /* | |
489 | * TSF sync value, this is dependant on the operation type. | |
490 | */ | |
491 | enum tsf_sync sync; | |
492 | ||
493 | /* | |
494 | * The MAC and BSSID addressess are simple array of bytes, | |
495 | * these arrays are little endian, so when sending the addressess | |
496 | * to the drivers, copy the it into a endian-signed variable. | |
497 | * | |
498 | * Note that all devices (except rt2500usb) have 32 bits | |
499 | * register word sizes. This means that whatever variable we | |
500 | * pass _must_ be a multiple of 32 bits. Otherwise the device | |
501 | * might not accept what we are sending to it. | |
502 | * This will also make it easier for the driver to write | |
503 | * the data to the device. | |
504 | */ | |
505 | __le32 mac[2]; | |
506 | __le32 bssid[2]; | |
507 | }; | |
508 | ||
95ea3627 ID |
509 | /* |
510 | * rt2x00lib callback functions. | |
511 | */ | |
512 | struct rt2x00lib_ops { | |
513 | /* | |
514 | * Interrupt handlers. | |
515 | */ | |
516 | irq_handler_t irq_handler; | |
517 | ||
78e256c9 HS |
518 | /* |
519 | * Threaded Interrupt handlers. | |
520 | */ | |
521 | irq_handler_t irq_handler_thread; | |
522 | ||
95ea3627 ID |
523 | /* |
524 | * Device init handlers. | |
525 | */ | |
526 | int (*probe_hw) (struct rt2x00_dev *rt2x00dev); | |
527 | char *(*get_firmware_name) (struct rt2x00_dev *rt2x00dev); | |
0cbe0064 ID |
528 | int (*check_firmware) (struct rt2x00_dev *rt2x00dev, |
529 | const u8 *data, const size_t len); | |
530 | int (*load_firmware) (struct rt2x00_dev *rt2x00dev, | |
531 | const u8 *data, const size_t len); | |
95ea3627 ID |
532 | |
533 | /* | |
534 | * Device initialization/deinitialization handlers. | |
535 | */ | |
536 | int (*initialize) (struct rt2x00_dev *rt2x00dev); | |
537 | void (*uninitialize) (struct rt2x00_dev *rt2x00dev); | |
538 | ||
837e7f24 | 539 | /* |
181d6902 | 540 | * queue initialization handlers |
837e7f24 | 541 | */ |
798b7adb ID |
542 | bool (*get_entry_state) (struct queue_entry *entry); |
543 | void (*clear_entry) (struct queue_entry *entry); | |
837e7f24 | 544 | |
95ea3627 ID |
545 | /* |
546 | * Radio control handlers. | |
547 | */ | |
548 | int (*set_device_state) (struct rt2x00_dev *rt2x00dev, | |
549 | enum dev_state state); | |
550 | int (*rfkill_poll) (struct rt2x00_dev *rt2x00dev); | |
ebcf26da ID |
551 | void (*link_stats) (struct rt2x00_dev *rt2x00dev, |
552 | struct link_qual *qual); | |
5352ff65 ID |
553 | void (*reset_tuner) (struct rt2x00_dev *rt2x00dev, |
554 | struct link_qual *qual); | |
555 | void (*link_tuner) (struct rt2x00_dev *rt2x00dev, | |
556 | struct link_qual *qual, const u32 count); | |
c965c74b | 557 | void (*watchdog) (struct rt2x00_dev *rt2x00dev); |
95ea3627 ID |
558 | |
559 | /* | |
560 | * TX control handlers | |
561 | */ | |
562 | void (*write_tx_desc) (struct rt2x00_dev *rt2x00dev, | |
dd3193e1 | 563 | struct sk_buff *skb, |
61486e0f | 564 | struct txentry_desc *txdesc); |
76dd5ddf GW |
565 | void (*write_tx_data) (struct queue_entry *entry, |
566 | struct txentry_desc *txdesc); | |
f224f4ef GW |
567 | void (*write_beacon) (struct queue_entry *entry, |
568 | struct txentry_desc *txdesc); | |
f1ca2167 | 569 | int (*get_tx_data_len) (struct queue_entry *entry); |
95ea3627 | 570 | void (*kick_tx_queue) (struct rt2x00_dev *rt2x00dev, |
e58c6aca | 571 | const enum data_queue_qid queue); |
a2c9b652 ID |
572 | void (*kill_tx_queue) (struct rt2x00_dev *rt2x00dev, |
573 | const enum data_queue_qid queue); | |
95ea3627 ID |
574 | |
575 | /* | |
576 | * RX control handlers | |
577 | */ | |
181d6902 ID |
578 | void (*fill_rxdone) (struct queue_entry *entry, |
579 | struct rxdone_entry_desc *rxdesc); | |
95ea3627 ID |
580 | |
581 | /* | |
582 | * Configuration handlers. | |
583 | */ | |
2bb057d0 ID |
584 | int (*config_shared_key) (struct rt2x00_dev *rt2x00dev, |
585 | struct rt2x00lib_crypto *crypto, | |
586 | struct ieee80211_key_conf *key); | |
587 | int (*config_pairwise_key) (struct rt2x00_dev *rt2x00dev, | |
588 | struct rt2x00lib_crypto *crypto, | |
589 | struct ieee80211_key_conf *key); | |
3a643d24 ID |
590 | void (*config_filter) (struct rt2x00_dev *rt2x00dev, |
591 | const unsigned int filter_flags); | |
6bb40dd1 ID |
592 | void (*config_intf) (struct rt2x00_dev *rt2x00dev, |
593 | struct rt2x00_intf *intf, | |
594 | struct rt2x00intf_conf *conf, | |
595 | const unsigned int flags); | |
596 | #define CONFIG_UPDATE_TYPE ( 1 << 1 ) | |
597 | #define CONFIG_UPDATE_MAC ( 1 << 2 ) | |
598 | #define CONFIG_UPDATE_BSSID ( 1 << 3 ) | |
599 | ||
3a643d24 ID |
600 | void (*config_erp) (struct rt2x00_dev *rt2x00dev, |
601 | struct rt2x00lib_erp *erp); | |
e4ea1c40 ID |
602 | void (*config_ant) (struct rt2x00_dev *rt2x00dev, |
603 | struct antenna_setup *ant); | |
6bb40dd1 ID |
604 | void (*config) (struct rt2x00_dev *rt2x00dev, |
605 | struct rt2x00lib_conf *libconf, | |
e4ea1c40 | 606 | const unsigned int changed_flags); |
95ea3627 ID |
607 | }; |
608 | ||
609 | /* | |
610 | * rt2x00 driver callback operation structure. | |
611 | */ | |
612 | struct rt2x00_ops { | |
613 | const char *name; | |
6bb40dd1 ID |
614 | const unsigned int max_sta_intf; |
615 | const unsigned int max_ap_intf; | |
95ea3627 ID |
616 | const unsigned int eeprom_size; |
617 | const unsigned int rf_size; | |
61448f88 | 618 | const unsigned int tx_queues; |
e6218cc4 | 619 | const unsigned int extra_tx_headroom; |
181d6902 ID |
620 | const struct data_queue_desc *rx; |
621 | const struct data_queue_desc *tx; | |
622 | const struct data_queue_desc *bcn; | |
623 | const struct data_queue_desc *atim; | |
95ea3627 | 624 | const struct rt2x00lib_ops *lib; |
e796643e | 625 | const void *drv; |
95ea3627 ID |
626 | const struct ieee80211_ops *hw; |
627 | #ifdef CONFIG_RT2X00_LIB_DEBUGFS | |
628 | const struct rt2x00debug *debugfs; | |
629 | #endif /* CONFIG_RT2X00_LIB_DEBUGFS */ | |
630 | }; | |
631 | ||
483272f5 ID |
632 | /* |
633 | * rt2x00 device flags | |
634 | */ | |
635 | enum rt2x00_flags { | |
636 | /* | |
637 | * Device state flags | |
638 | */ | |
0262ab0d ID |
639 | DEVICE_STATE_PRESENT, |
640 | DEVICE_STATE_REGISTERED_HW, | |
641 | DEVICE_STATE_INITIALIZED, | |
642 | DEVICE_STATE_STARTED, | |
0262ab0d | 643 | DEVICE_STATE_ENABLED_RADIO, |
d8147f9d | 644 | DEVICE_STATE_SCANNING, |
483272f5 ID |
645 | |
646 | /* | |
2bb057d0 | 647 | * Driver requirements |
483272f5 ID |
648 | */ |
649 | DRIVER_REQUIRE_FIRMWARE, | |
181d6902 ID |
650 | DRIVER_REQUIRE_BEACON_GUARD, |
651 | DRIVER_REQUIRE_ATIM_QUEUE, | |
c4da0048 | 652 | DRIVER_REQUIRE_DMA, |
3f787bd6 | 653 | DRIVER_REQUIRE_COPY_IV, |
9f166171 | 654 | DRIVER_REQUIRE_L2PAD, |
483272f5 ID |
655 | |
656 | /* | |
2bb057d0 | 657 | * Driver features |
483272f5 ID |
658 | */ |
659 | CONFIG_SUPPORT_HW_BUTTON, | |
2bb057d0 | 660 | CONFIG_SUPPORT_HW_CRYPTO, |
1afcfd54 IP |
661 | DRIVER_SUPPORT_CONTROL_FILTERS, |
662 | DRIVER_SUPPORT_CONTROL_FILTER_PSPOLL, | |
9f926fb5 | 663 | DRIVER_SUPPORT_PRE_TBTT_INTERRUPT, |
27df2a9c | 664 | DRIVER_SUPPORT_LINK_TUNING, |
c965c74b | 665 | DRIVER_SUPPORT_WATCHDOG, |
2bb057d0 ID |
666 | |
667 | /* | |
668 | * Driver configuration | |
669 | */ | |
483272f5 ID |
670 | CONFIG_FRAME_TYPE, |
671 | CONFIG_RF_SEQUENCE, | |
672 | CONFIG_EXTERNAL_LNA_A, | |
673 | CONFIG_EXTERNAL_LNA_BG, | |
674 | CONFIG_DOUBLE_ANTENNA, | |
35f00cfc | 675 | CONFIG_CHANNEL_HT40, |
483272f5 ID |
676 | }; |
677 | ||
95ea3627 ID |
678 | /* |
679 | * rt2x00 device structure. | |
680 | */ | |
681 | struct rt2x00_dev { | |
682 | /* | |
683 | * Device structure. | |
684 | * The structure stored in here depends on the | |
685 | * system bus (PCI or USB). | |
686 | * When accessing this variable, the rt2x00dev_{pci,usb} | |
49513481 | 687 | * macros should be used for correct typecasting. |
95ea3627 | 688 | */ |
14a3bf89 | 689 | struct device *dev; |
95ea3627 ID |
690 | |
691 | /* | |
692 | * Callback functions. | |
693 | */ | |
694 | const struct rt2x00_ops *ops; | |
695 | ||
696 | /* | |
697 | * IEEE80211 control structure. | |
698 | */ | |
699 | struct ieee80211_hw *hw; | |
8318d78a JB |
700 | struct ieee80211_supported_band bands[IEEE80211_NUM_BANDS]; |
701 | enum ieee80211_band curr_band; | |
e5ef5bad | 702 | int curr_freq; |
95ea3627 | 703 | |
95ea3627 ID |
704 | /* |
705 | * If enabled, the debugfs interface structures | |
706 | * required for deregistration of debugfs. | |
707 | */ | |
708 | #ifdef CONFIG_RT2X00_LIB_DEBUGFS | |
4d8dd66c | 709 | struct rt2x00debug_intf *debugfs_intf; |
95ea3627 ID |
710 | #endif /* CONFIG_RT2X00_LIB_DEBUGFS */ |
711 | ||
a9450b70 ID |
712 | /* |
713 | * LED structure for changing the LED status | |
714 | * by mac8011 or the kernel. | |
715 | */ | |
716 | #ifdef CONFIG_RT2X00_LIB_LEDS | |
a9450b70 ID |
717 | struct rt2x00_led led_radio; |
718 | struct rt2x00_led led_assoc; | |
719 | struct rt2x00_led led_qual; | |
720 | u16 led_mcu_reg; | |
721 | #endif /* CONFIG_RT2X00_LIB_LEDS */ | |
722 | ||
95ea3627 ID |
723 | /* |
724 | * Device flags. | |
725 | * In these flags the current status and some | |
726 | * of the device capabilities are stored. | |
727 | */ | |
728 | unsigned long flags; | |
95ea3627 | 729 | |
440ddada ID |
730 | /* |
731 | * Device information, Bus IRQ and name (PCI, SoC) | |
732 | */ | |
733 | int irq; | |
734 | const char *name; | |
735 | ||
95ea3627 ID |
736 | /* |
737 | * Chipset identification. | |
738 | */ | |
739 | struct rt2x00_chip chip; | |
740 | ||
741 | /* | |
742 | * hw capability specifications. | |
743 | */ | |
744 | struct hw_mode_spec spec; | |
745 | ||
addc81bd ID |
746 | /* |
747 | * This is the default TX/RX antenna setup as indicated | |
6d64360a | 748 | * by the device's EEPROM. |
addc81bd ID |
749 | */ |
750 | struct antenna_setup default_ant; | |
751 | ||
95ea3627 ID |
752 | /* |
753 | * Register pointers | |
21795094 ID |
754 | * csr.base: CSR base register address. (PCI) |
755 | * csr.cache: CSR cache for usb_control_msg. (USB) | |
95ea3627 | 756 | */ |
21795094 ID |
757 | union csr { |
758 | void __iomem *base; | |
759 | void *cache; | |
760 | } csr; | |
95ea3627 | 761 | |
3d82346c | 762 | /* |
8ff48a8b ID |
763 | * Mutex to protect register accesses. |
764 | * For PCI and USB devices it protects against concurrent indirect | |
765 | * register access (BBP, RF, MCU) since accessing those | |
766 | * registers require multiple calls to the CSR registers. | |
767 | * For USB devices it also protects the csr_cache since that | |
768 | * field is used for normal CSR access and it cannot support | |
769 | * multiple callers simultaneously. | |
770 | */ | |
771 | struct mutex csr_mutex; | |
3d82346c | 772 | |
3c4f2085 ID |
773 | /* |
774 | * Current packet filter configuration for the device. | |
775 | * This contains all currently active FIF_* flags send | |
776 | * to us by mac80211 during configure_filter(). | |
777 | */ | |
778 | unsigned int packet_filter; | |
779 | ||
95ea3627 | 780 | /* |
6bb40dd1 ID |
781 | * Interface details: |
782 | * - Open ap interface count. | |
783 | * - Open sta interface count. | |
784 | * - Association count. | |
95ea3627 | 785 | */ |
6bb40dd1 ID |
786 | unsigned int intf_ap_count; |
787 | unsigned int intf_sta_count; | |
788 | unsigned int intf_associated; | |
95ea3627 ID |
789 | |
790 | /* | |
791 | * Link quality | |
792 | */ | |
793 | struct link link; | |
794 | ||
795 | /* | |
796 | * EEPROM data. | |
797 | */ | |
798 | __le16 *eeprom; | |
799 | ||
800 | /* | |
801 | * Active RF register values. | |
802 | * These are stored here so we don't need | |
803 | * to read the rf registers and can directly | |
804 | * use this value instead. | |
805 | * This field should be accessed by using | |
806 | * rt2x00_rf_read() and rt2x00_rf_write(). | |
807 | */ | |
808 | u32 *rf; | |
809 | ||
ba2ab471 ID |
810 | /* |
811 | * LNA gain | |
812 | */ | |
813 | short lna_gain; | |
814 | ||
95ea3627 ID |
815 | /* |
816 | * Current TX power value. | |
817 | */ | |
818 | u16 tx_power; | |
819 | ||
42c82857 ID |
820 | /* |
821 | * Current retry values. | |
822 | */ | |
823 | u8 short_retry; | |
824 | u8 long_retry; | |
825 | ||
95ea3627 ID |
826 | /* |
827 | * Rssi <-> Dbm offset | |
828 | */ | |
829 | u8 rssi_offset; | |
830 | ||
831 | /* | |
832 | * Frequency offset (for rt61pci & rt73usb). | |
833 | */ | |
834 | u8 freq_offset; | |
835 | ||
35f00cfc ID |
836 | /* |
837 | * Calibration information (for rt2800usb & rt2800pci). | |
838 | * [0] -> BW20 | |
839 | * [1] -> BW40 | |
840 | */ | |
841 | u8 calibration[2]; | |
842 | ||
6b347bff ID |
843 | /* |
844 | * Beacon interval. | |
845 | */ | |
846 | u16 beacon_int; | |
847 | ||
95ea3627 ID |
848 | /* |
849 | * Low level statistics which will have | |
850 | * to be kept up to date while device is running. | |
851 | */ | |
852 | struct ieee80211_low_level_stats low_level_stats; | |
853 | ||
95ea3627 | 854 | /* |
4150c572 | 855 | * Scheduled work. |
8e260c22 ID |
856 | * NOTE: intf_work will use ieee80211_iterate_active_interfaces() |
857 | * which means it cannot be placed on the hw->workqueue | |
858 | * due to RTNL locking requirements. | |
95ea3627 | 859 | */ |
6bb40dd1 | 860 | struct work_struct intf_work; |
95ea3627 | 861 | |
7e613e16 ID |
862 | /** |
863 | * Scheduled work for TX/RX done handling (USB devices) | |
864 | */ | |
865 | struct work_struct rxdone_work; | |
866 | struct work_struct txdone_work; | |
867 | ||
95ea3627 | 868 | /* |
181d6902 ID |
869 | * Data queue arrays for RX, TX and Beacon. |
870 | * The Beacon array also contains the Atim queue | |
95ea3627 ID |
871 | * if that is supported by the device. |
872 | */ | |
b869767b | 873 | unsigned int data_queues; |
181d6902 ID |
874 | struct data_queue *rx; |
875 | struct data_queue *tx; | |
876 | struct data_queue *bcn; | |
95ea3627 ID |
877 | |
878 | /* | |
879 | * Firmware image. | |
880 | */ | |
881 | const struct firmware *fw; | |
ee134fcc | 882 | |
78e256c9 HS |
883 | /* |
884 | * Interrupt values, stored between interrupt service routine | |
885 | * and interrupt thread routine. | |
886 | */ | |
887 | u32 irqvalue[2]; | |
95ea3627 ID |
888 | }; |
889 | ||
1f285f14 BZ |
890 | /* |
891 | * Register defines. | |
892 | * Some registers require multiple attempts before success, | |
893 | * in those cases REGISTER_BUSY_COUNT attempts should be | |
894 | * taken with a REGISTER_BUSY_DELAY interval. | |
895 | */ | |
896 | #define REGISTER_BUSY_COUNT 5 | |
897 | #define REGISTER_BUSY_DELAY 100 | |
898 | ||
95ea3627 ID |
899 | /* |
900 | * Generic RF access. | |
901 | * The RF is being accessed by word index. | |
902 | */ | |
0e14f6d3 | 903 | static inline void rt2x00_rf_read(struct rt2x00_dev *rt2x00dev, |
95ea3627 ID |
904 | const unsigned int word, u32 *data) |
905 | { | |
6b26dead PR |
906 | BUG_ON(word < 1 || word > rt2x00dev->ops->rf_size / sizeof(u32)); |
907 | *data = rt2x00dev->rf[word - 1]; | |
95ea3627 ID |
908 | } |
909 | ||
0e14f6d3 | 910 | static inline void rt2x00_rf_write(struct rt2x00_dev *rt2x00dev, |
95ea3627 ID |
911 | const unsigned int word, u32 data) |
912 | { | |
6b26dead PR |
913 | BUG_ON(word < 1 || word > rt2x00dev->ops->rf_size / sizeof(u32)); |
914 | rt2x00dev->rf[word - 1] = data; | |
95ea3627 ID |
915 | } |
916 | ||
917 | /* | |
918 | * Generic EEPROM access. | |
919 | * The EEPROM is being accessed by word index. | |
920 | */ | |
0e14f6d3 | 921 | static inline void *rt2x00_eeprom_addr(struct rt2x00_dev *rt2x00dev, |
95ea3627 ID |
922 | const unsigned int word) |
923 | { | |
924 | return (void *)&rt2x00dev->eeprom[word]; | |
925 | } | |
926 | ||
0e14f6d3 | 927 | static inline void rt2x00_eeprom_read(struct rt2x00_dev *rt2x00dev, |
95ea3627 ID |
928 | const unsigned int word, u16 *data) |
929 | { | |
930 | *data = le16_to_cpu(rt2x00dev->eeprom[word]); | |
931 | } | |
932 | ||
0e14f6d3 | 933 | static inline void rt2x00_eeprom_write(struct rt2x00_dev *rt2x00dev, |
95ea3627 ID |
934 | const unsigned int word, u16 data) |
935 | { | |
936 | rt2x00dev->eeprom[word] = cpu_to_le16(data); | |
937 | } | |
938 | ||
939 | /* | |
940 | * Chipset handlers | |
941 | */ | |
942 | static inline void rt2x00_set_chip(struct rt2x00_dev *rt2x00dev, | |
49e721ec | 943 | const u16 rt, const u16 rf, const u16 rev) |
95ea3627 | 944 | { |
95ea3627 ID |
945 | rt2x00dev->chip.rt = rt; |
946 | rt2x00dev->chip.rf = rf; | |
947 | rt2x00dev->chip.rev = rev; | |
440ddada | 948 | |
16475b09 | 949 | INFO(rt2x00dev, |
49e721ec | 950 | "Chipset detected - rt: %04x, rf: %04x, rev: %04x.\n", |
16475b09 GW |
951 | rt2x00dev->chip.rt, rt2x00dev->chip.rf, rt2x00dev->chip.rev); |
952 | } | |
953 | ||
8d0c9b65 | 954 | static inline bool rt2x00_rt(struct rt2x00_dev *rt2x00dev, const u16 rt) |
95ea3627 | 955 | { |
5122d898 | 956 | return (rt2x00dev->chip.rt == rt); |
95ea3627 ID |
957 | } |
958 | ||
8d0c9b65 | 959 | static inline bool rt2x00_rf(struct rt2x00_dev *rt2x00dev, const u16 rf) |
95ea3627 | 960 | { |
5122d898 | 961 | return (rt2x00dev->chip.rf == rf); |
95ea3627 ID |
962 | } |
963 | ||
49e721ec | 964 | static inline u16 rt2x00_rev(struct rt2x00_dev *rt2x00dev) |
95ea3627 | 965 | { |
5122d898 | 966 | return rt2x00dev->chip.rev; |
95ea3627 ID |
967 | } |
968 | ||
8d0c9b65 GW |
969 | static inline bool rt2x00_rt_rev(struct rt2x00_dev *rt2x00dev, |
970 | const u16 rt, const u16 rev) | |
971 | { | |
972 | return (rt2x00_rt(rt2x00dev, rt) && rt2x00_rev(rt2x00dev) == rev); | |
973 | } | |
974 | ||
975 | static inline bool rt2x00_rt_rev_lt(struct rt2x00_dev *rt2x00dev, | |
976 | const u16 rt, const u16 rev) | |
977 | { | |
978 | return (rt2x00_rt(rt2x00dev, rt) && rt2x00_rev(rt2x00dev) < rev); | |
979 | } | |
980 | ||
981 | static inline bool rt2x00_rt_rev_gte(struct rt2x00_dev *rt2x00dev, | |
982 | const u16 rt, const u16 rev) | |
983 | { | |
984 | return (rt2x00_rt(rt2x00dev, rt) && rt2x00_rev(rt2x00dev) >= rev); | |
985 | } | |
986 | ||
5822e070 BZ |
987 | static inline void rt2x00_set_chip_intf(struct rt2x00_dev *rt2x00dev, |
988 | enum rt2x00_chip_intf intf) | |
989 | { | |
990 | rt2x00dev->chip.intf = intf; | |
991 | } | |
992 | ||
5122d898 | 993 | static inline bool rt2x00_intf(struct rt2x00_dev *rt2x00dev, |
5822e070 BZ |
994 | enum rt2x00_chip_intf intf) |
995 | { | |
5122d898 | 996 | return (rt2x00dev->chip.intf == intf); |
5822e070 BZ |
997 | } |
998 | ||
cea90e55 | 999 | static inline bool rt2x00_is_pci(struct rt2x00_dev *rt2x00dev) |
5822e070 | 1000 | { |
6e1fdd11 GW |
1001 | return rt2x00_intf(rt2x00dev, RT2X00_CHIP_INTF_PCI) || |
1002 | rt2x00_intf(rt2x00dev, RT2X00_CHIP_INTF_PCIE); | |
1003 | } | |
1004 | ||
1005 | static inline bool rt2x00_is_pcie(struct rt2x00_dev *rt2x00dev) | |
1006 | { | |
1007 | return rt2x00_intf(rt2x00dev, RT2X00_CHIP_INTF_PCIE); | |
5822e070 BZ |
1008 | } |
1009 | ||
cea90e55 | 1010 | static inline bool rt2x00_is_usb(struct rt2x00_dev *rt2x00dev) |
5822e070 | 1011 | { |
5122d898 | 1012 | return rt2x00_intf(rt2x00dev, RT2X00_CHIP_INTF_USB); |
5822e070 BZ |
1013 | } |
1014 | ||
cea90e55 GW |
1015 | static inline bool rt2x00_is_soc(struct rt2x00_dev *rt2x00dev) |
1016 | { | |
1017 | return rt2x00_intf(rt2x00dev, RT2X00_CHIP_INTF_SOC); | |
1018 | } | |
1019 | ||
239c249d | 1020 | /** |
c4da0048 GW |
1021 | * rt2x00queue_map_txskb - Map a skb into DMA for TX purposes. |
1022 | * @rt2x00dev: Pointer to &struct rt2x00_dev. | |
1023 | * @skb: The skb to map. | |
239c249d | 1024 | */ |
c4da0048 | 1025 | void rt2x00queue_map_txskb(struct rt2x00_dev *rt2x00dev, struct sk_buff *skb); |
239c249d | 1026 | |
0b8004aa GW |
1027 | /** |
1028 | * rt2x00queue_unmap_skb - Unmap a skb from DMA. | |
1029 | * @rt2x00dev: Pointer to &struct rt2x00_dev. | |
1030 | * @skb: The skb to unmap. | |
1031 | */ | |
1032 | void rt2x00queue_unmap_skb(struct rt2x00_dev *rt2x00dev, struct sk_buff *skb); | |
1033 | ||
181d6902 | 1034 | /** |
e58c6aca | 1035 | * rt2x00queue_get_queue - Convert queue index to queue pointer |
181d6902 | 1036 | * @rt2x00dev: Pointer to &struct rt2x00_dev. |
e58c6aca | 1037 | * @queue: rt2x00 queue index (see &enum data_queue_qid). |
95ea3627 | 1038 | */ |
181d6902 | 1039 | struct data_queue *rt2x00queue_get_queue(struct rt2x00_dev *rt2x00dev, |
e58c6aca | 1040 | const enum data_queue_qid queue); |
181d6902 ID |
1041 | |
1042 | /** | |
1043 | * rt2x00queue_get_entry - Get queue entry where the given index points to. | |
9a46d44e | 1044 | * @queue: Pointer to &struct data_queue from where we obtain the entry. |
181d6902 ID |
1045 | * @index: Index identifier for obtaining the correct index. |
1046 | */ | |
1047 | struct queue_entry *rt2x00queue_get_entry(struct data_queue *queue, | |
1048 | enum queue_index index); | |
1049 | ||
b4df4708 GW |
1050 | /* |
1051 | * Debugfs handlers. | |
1052 | */ | |
1053 | /** | |
1054 | * rt2x00debug_dump_frame - Dump a frame to userspace through debugfs. | |
1055 | * @rt2x00dev: Pointer to &struct rt2x00_dev. | |
1056 | * @type: The type of frame that is being dumped. | |
1057 | * @skb: The skb containing the frame to be dumped. | |
1058 | */ | |
1059 | #ifdef CONFIG_RT2X00_LIB_DEBUGFS | |
1060 | void rt2x00debug_dump_frame(struct rt2x00_dev *rt2x00dev, | |
1061 | enum rt2x00_dump_type type, struct sk_buff *skb); | |
1062 | #else | |
1063 | static inline void rt2x00debug_dump_frame(struct rt2x00_dev *rt2x00dev, | |
1064 | enum rt2x00_dump_type type, | |
1065 | struct sk_buff *skb) | |
1066 | { | |
1067 | } | |
1068 | #endif /* CONFIG_RT2X00_LIB_DEBUGFS */ | |
1069 | ||
95ea3627 ID |
1070 | /* |
1071 | * Interrupt context handlers. | |
1072 | */ | |
1073 | void rt2x00lib_beacondone(struct rt2x00_dev *rt2x00dev); | |
9f926fb5 | 1074 | void rt2x00lib_pretbtt(struct rt2x00_dev *rt2x00dev); |
181d6902 ID |
1075 | void rt2x00lib_txdone(struct queue_entry *entry, |
1076 | struct txdone_entry_desc *txdesc); | |
3392bece | 1077 | void rt2x00lib_txdone_noinfo(struct queue_entry *entry, u32 status); |
c4da0048 GW |
1078 | void rt2x00lib_rxdone(struct rt2x00_dev *rt2x00dev, |
1079 | struct queue_entry *entry); | |
95ea3627 | 1080 | |
95ea3627 ID |
1081 | /* |
1082 | * mac80211 handlers. | |
1083 | */ | |
e039fa4a | 1084 | int rt2x00mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb); |
95ea3627 ID |
1085 | int rt2x00mac_start(struct ieee80211_hw *hw); |
1086 | void rt2x00mac_stop(struct ieee80211_hw *hw); | |
1087 | int rt2x00mac_add_interface(struct ieee80211_hw *hw, | |
1ed32e4f | 1088 | struct ieee80211_vif *vif); |
95ea3627 | 1089 | void rt2x00mac_remove_interface(struct ieee80211_hw *hw, |
1ed32e4f | 1090 | struct ieee80211_vif *vif); |
e8975581 | 1091 | int rt2x00mac_config(struct ieee80211_hw *hw, u32 changed); |
3a643d24 ID |
1092 | void rt2x00mac_configure_filter(struct ieee80211_hw *hw, |
1093 | unsigned int changed_flags, | |
1094 | unsigned int *total_flags, | |
3ac64bee | 1095 | u64 multicast); |
930c06f2 SS |
1096 | int rt2x00mac_set_tim(struct ieee80211_hw *hw, struct ieee80211_sta *sta, |
1097 | bool set); | |
2bb057d0 ID |
1098 | #ifdef CONFIG_RT2X00_LIB_CRYPTO |
1099 | int rt2x00mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd, | |
dc822b5d | 1100 | struct ieee80211_vif *vif, struct ieee80211_sta *sta, |
2bb057d0 ID |
1101 | struct ieee80211_key_conf *key); |
1102 | #else | |
1103 | #define rt2x00mac_set_key NULL | |
1104 | #endif /* CONFIG_RT2X00_LIB_CRYPTO */ | |
d8147f9d ID |
1105 | void rt2x00mac_sw_scan_start(struct ieee80211_hw *hw); |
1106 | void rt2x00mac_sw_scan_complete(struct ieee80211_hw *hw); | |
95ea3627 ID |
1107 | int rt2x00mac_get_stats(struct ieee80211_hw *hw, |
1108 | struct ieee80211_low_level_stats *stats); | |
471b3efd JB |
1109 | void rt2x00mac_bss_info_changed(struct ieee80211_hw *hw, |
1110 | struct ieee80211_vif *vif, | |
1111 | struct ieee80211_bss_conf *bss_conf, | |
1112 | u32 changes); | |
e100bb64 | 1113 | int rt2x00mac_conf_tx(struct ieee80211_hw *hw, u16 queue, |
95ea3627 | 1114 | const struct ieee80211_tx_queue_params *params); |
e47a5cdd | 1115 | void rt2x00mac_rfkill_poll(struct ieee80211_hw *hw); |
95ea3627 ID |
1116 | |
1117 | /* | |
1118 | * Driver allocation handlers. | |
1119 | */ | |
1120 | int rt2x00lib_probe_dev(struct rt2x00_dev *rt2x00dev); | |
1121 | void rt2x00lib_remove_dev(struct rt2x00_dev *rt2x00dev); | |
1122 | #ifdef CONFIG_PM | |
1123 | int rt2x00lib_suspend(struct rt2x00_dev *rt2x00dev, pm_message_t state); | |
1124 | int rt2x00lib_resume(struct rt2x00_dev *rt2x00dev); | |
1125 | #endif /* CONFIG_PM */ | |
1126 | ||
1127 | #endif /* RT2X00_H */ |