Commit | Line | Data |
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95ea3627 | 1 | /* |
7e613e16 ID |
2 | Copyright (C) 2010 Willow Garage <http://www.willowgarage.com> |
3 | Copyright (C) 2004 - 2010 Ivo van Doorn <IvDoorn@gmail.com> | |
9c9a0d14 | 4 | Copyright (C) 2004 - 2009 Gertjan van Wingerde <gwingerde@gmail.com> |
95ea3627 ID |
5 | <http://rt2x00.serialmonkey.com> |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2 of the License, or | |
10 | (at your option) any later version. | |
11 | ||
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with this program; if not, write to the | |
19 | Free Software Foundation, Inc., | |
20 | 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. | |
21 | */ | |
22 | ||
23 | /* | |
24 | Module: rt2x00 | |
25 | Abstract: rt2x00 global information. | |
26 | */ | |
27 | ||
28 | #ifndef RT2X00_H | |
29 | #define RT2X00_H | |
30 | ||
31 | #include <linux/bitops.h> | |
95ea3627 ID |
32 | #include <linux/skbuff.h> |
33 | #include <linux/workqueue.h> | |
34 | #include <linux/firmware.h> | |
a9450b70 | 35 | #include <linux/leds.h> |
3d82346c | 36 | #include <linux/mutex.h> |
61af43c5 | 37 | #include <linux/etherdevice.h> |
cca3e998 | 38 | #include <linux/input-polldev.h> |
96c3da7d | 39 | #include <linux/kfifo.h> |
95ea3627 ID |
40 | |
41 | #include <net/mac80211.h> | |
42 | ||
43 | #include "rt2x00debug.h" | |
b4df4708 | 44 | #include "rt2x00dump.h" |
a9450b70 | 45 | #include "rt2x00leds.h" |
95ea3627 | 46 | #include "rt2x00reg.h" |
181d6902 | 47 | #include "rt2x00queue.h" |
95ea3627 ID |
48 | |
49 | /* | |
50 | * Module information. | |
95ea3627 | 51 | */ |
754be309 | 52 | #define DRV_VERSION "2.3.0" |
95ea3627 ID |
53 | #define DRV_PROJECT "http://rt2x00.serialmonkey.com" |
54 | ||
55 | /* | |
56 | * Debug definitions. | |
57 | * Debug output has to be enabled during compile time. | |
58 | */ | |
59 | #define DEBUG_PRINTK_MSG(__dev, __kernlvl, __lvl, __msg, __args...) \ | |
60 | printk(__kernlvl "%s -> %s: %s - " __msg, \ | |
c94c93da | 61 | wiphy_name((__dev)->hw->wiphy), __func__, __lvl, ##__args) |
95ea3627 ID |
62 | |
63 | #define DEBUG_PRINTK_PROBE(__kernlvl, __lvl, __msg, __args...) \ | |
64 | printk(__kernlvl "%s -> %s: %s - " __msg, \ | |
c94c93da | 65 | KBUILD_MODNAME, __func__, __lvl, ##__args) |
95ea3627 ID |
66 | |
67 | #ifdef CONFIG_RT2X00_DEBUG | |
68 | #define DEBUG_PRINTK(__dev, __kernlvl, __lvl, __msg, __args...) \ | |
e85b4c04 | 69 | DEBUG_PRINTK_MSG(__dev, __kernlvl, __lvl, __msg, ##__args) |
95ea3627 ID |
70 | #else |
71 | #define DEBUG_PRINTK(__dev, __kernlvl, __lvl, __msg, __args...) \ | |
72 | do { } while (0) | |
73 | #endif /* CONFIG_RT2X00_DEBUG */ | |
74 | ||
75 | /* | |
76 | * Various debug levels. | |
77 | * The debug levels PANIC and ERROR both indicate serious problems, | |
78 | * for this reason they should never be ignored. | |
79 | * The special ERROR_PROBE message is for messages that are generated | |
80 | * when the rt2x00_dev is not yet initialized. | |
81 | */ | |
82 | #define PANIC(__dev, __msg, __args...) \ | |
83 | DEBUG_PRINTK_MSG(__dev, KERN_CRIT, "Panic", __msg, ##__args) | |
84 | #define ERROR(__dev, __msg, __args...) \ | |
85 | DEBUG_PRINTK_MSG(__dev, KERN_ERR, "Error", __msg, ##__args) | |
86 | #define ERROR_PROBE(__msg, __args...) \ | |
87 | DEBUG_PRINTK_PROBE(KERN_ERR, "Error", __msg, ##__args) | |
88 | #define WARNING(__dev, __msg, __args...) \ | |
89 | DEBUG_PRINTK(__dev, KERN_WARNING, "Warning", __msg, ##__args) | |
90 | #define NOTICE(__dev, __msg, __args...) \ | |
91 | DEBUG_PRINTK(__dev, KERN_NOTICE, "Notice", __msg, ##__args) | |
92 | #define INFO(__dev, __msg, __args...) \ | |
93 | DEBUG_PRINTK(__dev, KERN_INFO, "Info", __msg, ##__args) | |
94 | #define DEBUG(__dev, __msg, __args...) \ | |
95 | DEBUG_PRINTK(__dev, KERN_DEBUG, "Debug", __msg, ##__args) | |
96 | #define EEPROM(__dev, __msg, __args...) \ | |
97 | DEBUG_PRINTK(__dev, KERN_DEBUG, "EEPROM recovery", __msg, ##__args) | |
98 | ||
bad13639 ID |
99 | /* |
100 | * Duration calculations | |
101 | * The rate variable passed is: 100kbs. | |
102 | * To convert from bytes to bits we multiply size with 8, | |
103 | * then the size is multiplied with 10 to make the | |
104 | * real rate -> rate argument correction. | |
105 | */ | |
106 | #define GET_DURATION(__size, __rate) (((__size) * 8 * 10) / (__rate)) | |
107 | #define GET_DURATION_RES(__size, __rate)(((__size) * 8 * 10) % (__rate)) | |
108 | ||
77e73d18 GW |
109 | /* |
110 | * Determine the number of L2 padding bytes required between the header and | |
111 | * the payload. | |
112 | */ | |
113 | #define L2PAD_SIZE(__hdrlen) (-(__hdrlen) & 3) | |
114 | ||
9f166171 ID |
115 | /* |
116 | * Determine the alignment requirement, | |
117 | * to make sure the 802.11 payload is padded to a 4-byte boundrary | |
118 | * we must determine the address of the payload and calculate the | |
119 | * amount of bytes needed to move the data. | |
120 | */ | |
121 | #define ALIGN_SIZE(__skb, __header) \ | |
122 | ( ((unsigned long)((__skb)->data + (__header))) & 3 ) | |
123 | ||
7a4a77b7 GW |
124 | /* |
125 | * Constants for extra TX headroom for alignment purposes. | |
126 | */ | |
127 | #define RT2X00_ALIGN_SIZE 4 /* Only whole frame needs alignment */ | |
128 | #define RT2X00_L2PAD_SIZE 8 /* Both header & payload need alignment */ | |
129 | ||
95ea3627 ID |
130 | /* |
131 | * Standard timing and size defines. | |
132 | * These values should follow the ieee80211 specifications. | |
133 | */ | |
134 | #define ACK_SIZE 14 | |
135 | #define IEEE80211_HEADER 24 | |
136 | #define PLCP 48 | |
137 | #define BEACON 100 | |
138 | #define PREAMBLE 144 | |
139 | #define SHORT_PREAMBLE 72 | |
140 | #define SLOT_TIME 20 | |
141 | #define SHORT_SLOT_TIME 9 | |
142 | #define SIFS 10 | |
143 | #define PIFS ( SIFS + SLOT_TIME ) | |
144 | #define SHORT_PIFS ( SIFS + SHORT_SLOT_TIME ) | |
145 | #define DIFS ( PIFS + SLOT_TIME ) | |
146 | #define SHORT_DIFS ( SHORT_PIFS + SHORT_SLOT_TIME ) | |
f2fdbc48 | 147 | #define EIFS ( SIFS + DIFS + \ |
bad13639 | 148 | GET_DURATION(IEEE80211_HEADER + ACK_SIZE, 10) ) |
f2fdbc48 | 149 | #define SHORT_EIFS ( SIFS + SHORT_DIFS + \ |
bad13639 | 150 | GET_DURATION(IEEE80211_HEADER + ACK_SIZE, 10) ) |
95ea3627 | 151 | |
66679a65 LE |
152 | /* |
153 | * Structure for average calculation | |
154 | * The avg field contains the actual average value, | |
155 | * but avg_weight is internally used during calculations | |
156 | * to prevent rounding errors. | |
157 | */ | |
158 | struct avg_val { | |
159 | int avg; | |
160 | int avg_weight; | |
161 | }; | |
162 | ||
5822e070 BZ |
163 | enum rt2x00_chip_intf { |
164 | RT2X00_CHIP_INTF_PCI, | |
6e1fdd11 | 165 | RT2X00_CHIP_INTF_PCIE, |
5822e070 | 166 | RT2X00_CHIP_INTF_USB, |
cea90e55 | 167 | RT2X00_CHIP_INTF_SOC, |
5822e070 BZ |
168 | }; |
169 | ||
95ea3627 ID |
170 | /* |
171 | * Chipset identification | |
172 | * The chipset on the device is composed of a RT and RF chip. | |
173 | * The chipset combination is important for determining device capabilities. | |
174 | */ | |
175 | struct rt2x00_chip { | |
176 | u16 rt; | |
49e721ec GW |
177 | #define RT2460 0x2460 |
178 | #define RT2560 0x2560 | |
179 | #define RT2570 0x2570 | |
180 | #define RT2661 0x2661 | |
181 | #define RT2573 0x2573 | |
5ed8f458 | 182 | #define RT2860 0x2860 /* 2.4GHz */ |
e148b4c8 | 183 | #define RT2872 0x2872 /* WSOC */ |
49e721ec | 184 | #define RT2883 0x2883 /* WSOC */ |
49e721ec GW |
185 | #define RT3070 0x3070 |
186 | #define RT3071 0x3071 | |
a9b3a9f7 | 187 | #define RT3090 0x3090 /* 2.4GHz PCIe */ |
49e721ec GW |
188 | #define RT3390 0x3390 |
189 | #define RT3572 0x3572 | |
e148b4c8 GW |
190 | #define RT3593 0x3593 /* PCIe */ |
191 | #define RT3883 0x3883 /* WSOC */ | |
60687ba7 | 192 | #define RT5390 0x5390 /* 2.4GHz */ |
95ea3627 ID |
193 | |
194 | u16 rf; | |
49e721ec | 195 | u16 rev; |
5822e070 BZ |
196 | |
197 | enum rt2x00_chip_intf intf; | |
95ea3627 ID |
198 | }; |
199 | ||
200 | /* | |
201 | * RF register values that belong to a particular channel. | |
202 | */ | |
203 | struct rf_channel { | |
204 | int channel; | |
205 | u32 rf1; | |
206 | u32 rf2; | |
207 | u32 rf3; | |
208 | u32 rf4; | |
209 | }; | |
210 | ||
8c5e7a5f ID |
211 | /* |
212 | * Channel information structure | |
213 | */ | |
214 | struct channel_info { | |
215 | unsigned int flags; | |
216 | #define GEOGRAPHY_ALLOWED 0x00000001 | |
217 | ||
8d1331b3 ID |
218 | short max_power; |
219 | short default_power1; | |
220 | short default_power2; | |
8c5e7a5f ID |
221 | }; |
222 | ||
addc81bd ID |
223 | /* |
224 | * Antenna setup values. | |
225 | */ | |
226 | struct antenna_setup { | |
227 | enum antenna rx; | |
228 | enum antenna tx; | |
d96aa640 RJH |
229 | u8 rx_chain_num; |
230 | u8 tx_chain_num; | |
addc81bd ID |
231 | }; |
232 | ||
95ea3627 | 233 | /* |
ebcf26da | 234 | * Quality statistics about the currently active link. |
95ea3627 | 235 | */ |
ebcf26da | 236 | struct link_qual { |
95ea3627 | 237 | /* |
5352ff65 ID |
238 | * Statistics required for Link tuning by driver |
239 | * The rssi value is provided by rt2x00lib during the | |
240 | * link_tuner() callback function. | |
241 | * The false_cca field is filled during the link_stats() | |
242 | * callback function and could be used during the | |
243 | * link_tuner() callback function. | |
95ea3627 | 244 | */ |
5352ff65 | 245 | int rssi; |
95ea3627 ID |
246 | int false_cca; |
247 | ||
248 | /* | |
5352ff65 ID |
249 | * VGC levels |
250 | * Hardware driver will tune the VGC level during each call | |
251 | * to the link_tuner() callback function. This vgc_level is | |
252 | * is determined based on the link quality statistics like | |
253 | * average RSSI and the false CCA count. | |
95ea3627 | 254 | * |
5352ff65 ID |
255 | * In some cases the drivers need to differentiate between |
256 | * the currently "desired" VGC level and the level configured | |
257 | * in the hardware. The latter is important to reduce the | |
258 | * number of BBP register reads to reduce register access | |
259 | * overhead. For this reason we store both values here. | |
260 | */ | |
261 | u8 vgc_level; | |
262 | u8 vgc_level_reg; | |
263 | ||
264 | /* | |
265 | * Statistics required for Signal quality calculation. | |
266 | * These fields might be changed during the link_stats() | |
267 | * callback function. | |
95ea3627 | 268 | */ |
95ea3627 ID |
269 | int rx_success; |
270 | int rx_failed; | |
95ea3627 ID |
271 | int tx_success; |
272 | int tx_failed; | |
ebcf26da ID |
273 | }; |
274 | ||
69f81a2c ID |
275 | /* |
276 | * Antenna settings about the currently active link. | |
277 | */ | |
278 | struct link_ant { | |
279 | /* | |
280 | * Antenna flags | |
281 | */ | |
282 | unsigned int flags; | |
283 | #define ANTENNA_RX_DIVERSITY 0x00000001 | |
284 | #define ANTENNA_TX_DIVERSITY 0x00000002 | |
285 | #define ANTENNA_MODE_SAMPLE 0x00000004 | |
286 | ||
287 | /* | |
288 | * Currently active TX/RX antenna setup. | |
289 | * When software diversity is used, this will indicate | |
290 | * which antenna is actually used at this time. | |
291 | */ | |
292 | struct antenna_setup active; | |
293 | ||
294 | /* | |
193df183 LE |
295 | * RSSI history information for the antenna. |
296 | * Used to determine when to switch antenna | |
297 | * when using software diversity. | |
69f81a2c | 298 | */ |
193df183 | 299 | int rssi_history; |
69f81a2c ID |
300 | |
301 | /* | |
302 | * Current RSSI average of the currently active antenna. | |
303 | * Similar to the avg_rssi in the link_qual structure | |
304 | * this value is updated by using the walking average. | |
305 | */ | |
66679a65 | 306 | struct avg_val rssi_ant; |
69f81a2c ID |
307 | }; |
308 | ||
ebcf26da ID |
309 | /* |
310 | * To optimize the quality of the link we need to store | |
311 | * the quality of received frames and periodically | |
312 | * optimize the link. | |
313 | */ | |
314 | struct link { | |
315 | /* | |
316 | * Link tuner counter | |
317 | * The number of times the link has been tuned | |
318 | * since the radio has been switched on. | |
319 | */ | |
320 | u32 count; | |
321 | ||
322 | /* | |
323 | * Quality measurement values. | |
324 | */ | |
325 | struct link_qual qual; | |
326 | ||
addc81bd | 327 | /* |
69f81a2c | 328 | * TX/RX antenna setup. |
addc81bd | 329 | */ |
69f81a2c | 330 | struct link_ant ant; |
addc81bd | 331 | |
ebcf26da | 332 | /* |
5352ff65 | 333 | * Currently active average RSSI value |
ebcf26da | 334 | */ |
66679a65 | 335 | struct avg_val avg_rssi; |
eb20b4e8 | 336 | |
95ea3627 ID |
337 | /* |
338 | * Work structure for scheduling periodic link tuning. | |
339 | */ | |
340 | struct delayed_work work; | |
c965c74b ID |
341 | |
342 | /* | |
343 | * Work structure for scheduling periodic watchdog monitoring. | |
cdfd2c5c ID |
344 | * This work must be scheduled on the kernel workqueue, while |
345 | * all other work structures must be queued on the mac80211 | |
346 | * workqueue. This guarantees that the watchdog can schedule | |
347 | * other work structures and wait for their completion in order | |
348 | * to bring the device/driver back into the desired state. | |
c965c74b ID |
349 | */ |
350 | struct delayed_work watchdog_work; | |
95ea3627 ID |
351 | }; |
352 | ||
bfe6a15d HS |
353 | enum rt2x00_delayed_flags { |
354 | DELAYED_UPDATE_BEACON, | |
355 | }; | |
356 | ||
95ea3627 ID |
357 | /* |
358 | * Interface structure | |
6bb40dd1 ID |
359 | * Per interface configuration details, this structure |
360 | * is allocated as the private data for ieee80211_vif. | |
95ea3627 | 361 | */ |
6bb40dd1 | 362 | struct rt2x00_intf { |
17512dc3 IP |
363 | /* |
364 | * beacon->skb must be protected with the mutex. | |
365 | */ | |
366 | struct mutex beacon_skb_mutex; | |
367 | ||
6bb40dd1 ID |
368 | /* |
369 | * Entry in the beacon queue which belongs to | |
370 | * this interface. Each interface has its own | |
371 | * dedicated beacon entry. | |
372 | */ | |
373 | struct queue_entry *beacon; | |
69cf36a4 | 374 | bool enable_beacon; |
95ea3627 | 375 | |
6bb40dd1 ID |
376 | /* |
377 | * Actions that needed rescheduling. | |
378 | */ | |
bfe6a15d | 379 | unsigned long delayed_flags; |
f591fa5d | 380 | |
d4764b29 ID |
381 | /* |
382 | * Software sequence counter, this is only required | |
383 | * for hardware which doesn't support hardware | |
384 | * sequence counting. | |
385 | */ | |
386 | spinlock_t seqlock; | |
f591fa5d | 387 | u16 seqno; |
6bb40dd1 ID |
388 | }; |
389 | ||
390 | static inline struct rt2x00_intf* vif_to_intf(struct ieee80211_vif *vif) | |
95ea3627 | 391 | { |
6bb40dd1 | 392 | return (struct rt2x00_intf *)vif->drv_priv; |
95ea3627 ID |
393 | } |
394 | ||
31562e80 ID |
395 | /** |
396 | * struct hw_mode_spec: Hardware specifications structure | |
397 | * | |
95ea3627 ID |
398 | * Details about the supported modes, rates and channels |
399 | * of a particular chipset. This is used by rt2x00lib | |
400 | * to build the ieee80211_hw_mode array for mac80211. | |
31562e80 ID |
401 | * |
402 | * @supported_bands: Bitmask contained the supported bands (2.4GHz, 5.2GHz). | |
403 | * @supported_rates: Rate types which are supported (CCK, OFDM). | |
404 | * @num_channels: Number of supported channels. This is used as array size | |
405 | * for @tx_power_a, @tx_power_bg and @channels. | |
9a46d44e | 406 | * @channels: Device/chipset specific channel values (See &struct rf_channel). |
8c5e7a5f | 407 | * @channels_info: Additional information for channels (See &struct channel_info). |
35f00cfc | 408 | * @ht: Driver HT Capabilities (See &ieee80211_sta_ht_cap). |
95ea3627 ID |
409 | */ |
410 | struct hw_mode_spec { | |
31562e80 ID |
411 | unsigned int supported_bands; |
412 | #define SUPPORT_BAND_2GHZ 0x00000001 | |
413 | #define SUPPORT_BAND_5GHZ 0x00000002 | |
414 | ||
415 | unsigned int supported_rates; | |
416 | #define SUPPORT_RATE_CCK 0x00000001 | |
417 | #define SUPPORT_RATE_OFDM 0x00000002 | |
418 | ||
419 | unsigned int num_channels; | |
420 | const struct rf_channel *channels; | |
8c5e7a5f | 421 | const struct channel_info *channels_info; |
35f00cfc ID |
422 | |
423 | struct ieee80211_sta_ht_cap ht; | |
95ea3627 ID |
424 | }; |
425 | ||
5c58ee51 ID |
426 | /* |
427 | * Configuration structure wrapper around the | |
428 | * mac80211 configuration structure. | |
429 | * When mac80211 configures the driver, rt2x00lib | |
430 | * can precalculate values which are equal for all | |
431 | * rt2x00 drivers. Those values can be stored in here. | |
432 | */ | |
433 | struct rt2x00lib_conf { | |
434 | struct ieee80211_conf *conf; | |
8c5e7a5f | 435 | |
5c58ee51 | 436 | struct rf_channel rf; |
8c5e7a5f | 437 | struct channel_info channel; |
5c58ee51 ID |
438 | }; |
439 | ||
72810379 ID |
440 | /* |
441 | * Configuration structure for erp settings. | |
442 | */ | |
443 | struct rt2x00lib_erp { | |
444 | int short_preamble; | |
e360c4cb | 445 | int cts_protection; |
72810379 | 446 | |
881d948c | 447 | u32 basic_rates; |
e4ea1c40 ID |
448 | |
449 | int slot_time; | |
450 | ||
451 | short sifs; | |
452 | short pifs; | |
453 | short difs; | |
454 | short eifs; | |
8a566afe ID |
455 | |
456 | u16 beacon_int; | |
87c1915d | 457 | u16 ht_opmode; |
72810379 ID |
458 | }; |
459 | ||
2bb057d0 ID |
460 | /* |
461 | * Configuration structure for hardware encryption. | |
462 | */ | |
463 | struct rt2x00lib_crypto { | |
464 | enum cipher cipher; | |
465 | ||
466 | enum set_key_cmd cmd; | |
467 | const u8 *address; | |
468 | ||
469 | u32 bssidx; | |
470 | u32 aid; | |
471 | ||
472 | u8 key[16]; | |
473 | u8 tx_mic[8]; | |
474 | u8 rx_mic[8]; | |
475 | }; | |
476 | ||
6bb40dd1 ID |
477 | /* |
478 | * Configuration structure wrapper around the | |
479 | * rt2x00 interface configuration handler. | |
480 | */ | |
481 | struct rt2x00intf_conf { | |
482 | /* | |
483 | * Interface type | |
484 | */ | |
05c914fe | 485 | enum nl80211_iftype type; |
6bb40dd1 ID |
486 | |
487 | /* | |
488 | * TSF sync value, this is dependant on the operation type. | |
489 | */ | |
490 | enum tsf_sync sync; | |
491 | ||
492 | /* | |
493 | * The MAC and BSSID addressess are simple array of bytes, | |
494 | * these arrays are little endian, so when sending the addressess | |
495 | * to the drivers, copy the it into a endian-signed variable. | |
496 | * | |
497 | * Note that all devices (except rt2500usb) have 32 bits | |
498 | * register word sizes. This means that whatever variable we | |
499 | * pass _must_ be a multiple of 32 bits. Otherwise the device | |
500 | * might not accept what we are sending to it. | |
501 | * This will also make it easier for the driver to write | |
502 | * the data to the device. | |
503 | */ | |
504 | __le32 mac[2]; | |
505 | __le32 bssid[2]; | |
506 | }; | |
507 | ||
95ea3627 ID |
508 | /* |
509 | * rt2x00lib callback functions. | |
510 | */ | |
511 | struct rt2x00lib_ops { | |
512 | /* | |
513 | * Interrupt handlers. | |
514 | */ | |
515 | irq_handler_t irq_handler; | |
516 | ||
96c3da7d HS |
517 | /* |
518 | * TX status tasklet handler. | |
519 | */ | |
520 | void (*txstatus_tasklet) (unsigned long data); | |
c5c65761 HS |
521 | void (*pretbtt_tasklet) (unsigned long data); |
522 | void (*tbtt_tasklet) (unsigned long data); | |
523 | void (*rxdone_tasklet) (unsigned long data); | |
524 | void (*autowake_tasklet) (unsigned long data); | |
96c3da7d | 525 | |
95ea3627 ID |
526 | /* |
527 | * Device init handlers. | |
528 | */ | |
529 | int (*probe_hw) (struct rt2x00_dev *rt2x00dev); | |
530 | char *(*get_firmware_name) (struct rt2x00_dev *rt2x00dev); | |
0cbe0064 ID |
531 | int (*check_firmware) (struct rt2x00_dev *rt2x00dev, |
532 | const u8 *data, const size_t len); | |
533 | int (*load_firmware) (struct rt2x00_dev *rt2x00dev, | |
534 | const u8 *data, const size_t len); | |
95ea3627 ID |
535 | |
536 | /* | |
537 | * Device initialization/deinitialization handlers. | |
538 | */ | |
539 | int (*initialize) (struct rt2x00_dev *rt2x00dev); | |
540 | void (*uninitialize) (struct rt2x00_dev *rt2x00dev); | |
541 | ||
837e7f24 | 542 | /* |
181d6902 | 543 | * queue initialization handlers |
837e7f24 | 544 | */ |
798b7adb ID |
545 | bool (*get_entry_state) (struct queue_entry *entry); |
546 | void (*clear_entry) (struct queue_entry *entry); | |
837e7f24 | 547 | |
95ea3627 ID |
548 | /* |
549 | * Radio control handlers. | |
550 | */ | |
551 | int (*set_device_state) (struct rt2x00_dev *rt2x00dev, | |
552 | enum dev_state state); | |
553 | int (*rfkill_poll) (struct rt2x00_dev *rt2x00dev); | |
ebcf26da ID |
554 | void (*link_stats) (struct rt2x00_dev *rt2x00dev, |
555 | struct link_qual *qual); | |
5352ff65 ID |
556 | void (*reset_tuner) (struct rt2x00_dev *rt2x00dev, |
557 | struct link_qual *qual); | |
558 | void (*link_tuner) (struct rt2x00_dev *rt2x00dev, | |
559 | struct link_qual *qual, const u32 count); | |
dbba306f ID |
560 | |
561 | /* | |
562 | * Data queue handlers. | |
563 | */ | |
c965c74b | 564 | void (*watchdog) (struct rt2x00_dev *rt2x00dev); |
dbba306f ID |
565 | void (*start_queue) (struct data_queue *queue); |
566 | void (*kick_queue) (struct data_queue *queue); | |
567 | void (*stop_queue) (struct data_queue *queue); | |
5be65609 | 568 | void (*flush_queue) (struct data_queue *queue); |
95ea3627 ID |
569 | |
570 | /* | |
571 | * TX control handlers | |
572 | */ | |
93331458 | 573 | void (*write_tx_desc) (struct queue_entry *entry, |
61486e0f | 574 | struct txentry_desc *txdesc); |
76dd5ddf GW |
575 | void (*write_tx_data) (struct queue_entry *entry, |
576 | struct txentry_desc *txdesc); | |
f224f4ef GW |
577 | void (*write_beacon) (struct queue_entry *entry, |
578 | struct txentry_desc *txdesc); | |
69cf36a4 | 579 | void (*clear_beacon) (struct queue_entry *entry); |
f1ca2167 | 580 | int (*get_tx_data_len) (struct queue_entry *entry); |
95ea3627 ID |
581 | |
582 | /* | |
583 | * RX control handlers | |
584 | */ | |
181d6902 ID |
585 | void (*fill_rxdone) (struct queue_entry *entry, |
586 | struct rxdone_entry_desc *rxdesc); | |
95ea3627 ID |
587 | |
588 | /* | |
589 | * Configuration handlers. | |
590 | */ | |
2bb057d0 ID |
591 | int (*config_shared_key) (struct rt2x00_dev *rt2x00dev, |
592 | struct rt2x00lib_crypto *crypto, | |
593 | struct ieee80211_key_conf *key); | |
594 | int (*config_pairwise_key) (struct rt2x00_dev *rt2x00dev, | |
595 | struct rt2x00lib_crypto *crypto, | |
596 | struct ieee80211_key_conf *key); | |
3a643d24 ID |
597 | void (*config_filter) (struct rt2x00_dev *rt2x00dev, |
598 | const unsigned int filter_flags); | |
6bb40dd1 ID |
599 | void (*config_intf) (struct rt2x00_dev *rt2x00dev, |
600 | struct rt2x00_intf *intf, | |
601 | struct rt2x00intf_conf *conf, | |
602 | const unsigned int flags); | |
603 | #define CONFIG_UPDATE_TYPE ( 1 << 1 ) | |
604 | #define CONFIG_UPDATE_MAC ( 1 << 2 ) | |
605 | #define CONFIG_UPDATE_BSSID ( 1 << 3 ) | |
606 | ||
3a643d24 | 607 | void (*config_erp) (struct rt2x00_dev *rt2x00dev, |
02044643 HS |
608 | struct rt2x00lib_erp *erp, |
609 | u32 changed); | |
e4ea1c40 ID |
610 | void (*config_ant) (struct rt2x00_dev *rt2x00dev, |
611 | struct antenna_setup *ant); | |
6bb40dd1 ID |
612 | void (*config) (struct rt2x00_dev *rt2x00dev, |
613 | struct rt2x00lib_conf *libconf, | |
e4ea1c40 | 614 | const unsigned int changed_flags); |
95ea3627 ID |
615 | }; |
616 | ||
617 | /* | |
618 | * rt2x00 driver callback operation structure. | |
619 | */ | |
620 | struct rt2x00_ops { | |
621 | const char *name; | |
6bb40dd1 ID |
622 | const unsigned int max_sta_intf; |
623 | const unsigned int max_ap_intf; | |
95ea3627 ID |
624 | const unsigned int eeprom_size; |
625 | const unsigned int rf_size; | |
61448f88 | 626 | const unsigned int tx_queues; |
e6218cc4 | 627 | const unsigned int extra_tx_headroom; |
181d6902 ID |
628 | const struct data_queue_desc *rx; |
629 | const struct data_queue_desc *tx; | |
630 | const struct data_queue_desc *bcn; | |
631 | const struct data_queue_desc *atim; | |
95ea3627 | 632 | const struct rt2x00lib_ops *lib; |
e796643e | 633 | const void *drv; |
95ea3627 ID |
634 | const struct ieee80211_ops *hw; |
635 | #ifdef CONFIG_RT2X00_LIB_DEBUGFS | |
636 | const struct rt2x00debug *debugfs; | |
637 | #endif /* CONFIG_RT2X00_LIB_DEBUGFS */ | |
638 | }; | |
639 | ||
483272f5 ID |
640 | /* |
641 | * rt2x00 device flags | |
642 | */ | |
643 | enum rt2x00_flags { | |
644 | /* | |
645 | * Device state flags | |
646 | */ | |
0262ab0d ID |
647 | DEVICE_STATE_PRESENT, |
648 | DEVICE_STATE_REGISTERED_HW, | |
649 | DEVICE_STATE_INITIALIZED, | |
650 | DEVICE_STATE_STARTED, | |
0262ab0d | 651 | DEVICE_STATE_ENABLED_RADIO, |
d8147f9d | 652 | DEVICE_STATE_SCANNING, |
483272f5 ID |
653 | |
654 | /* | |
2bb057d0 | 655 | * Driver requirements |
483272f5 ID |
656 | */ |
657 | DRIVER_REQUIRE_FIRMWARE, | |
181d6902 ID |
658 | DRIVER_REQUIRE_BEACON_GUARD, |
659 | DRIVER_REQUIRE_ATIM_QUEUE, | |
c4da0048 | 660 | DRIVER_REQUIRE_DMA, |
3f787bd6 | 661 | DRIVER_REQUIRE_COPY_IV, |
9f166171 | 662 | DRIVER_REQUIRE_L2PAD, |
96c3da7d | 663 | DRIVER_REQUIRE_TXSTATUS_FIFO, |
20ed3166 | 664 | DRIVER_REQUIRE_TASKLET_CONTEXT, |
483272f5 ID |
665 | |
666 | /* | |
2bb057d0 | 667 | * Driver features |
483272f5 ID |
668 | */ |
669 | CONFIG_SUPPORT_HW_BUTTON, | |
2bb057d0 | 670 | CONFIG_SUPPORT_HW_CRYPTO, |
e90c54b2 | 671 | CONFIG_SUPPORT_POWER_LIMIT, |
1afcfd54 IP |
672 | DRIVER_SUPPORT_CONTROL_FILTERS, |
673 | DRIVER_SUPPORT_CONTROL_FILTER_PSPOLL, | |
9f926fb5 | 674 | DRIVER_SUPPORT_PRE_TBTT_INTERRUPT, |
27df2a9c | 675 | DRIVER_SUPPORT_LINK_TUNING, |
c965c74b | 676 | DRIVER_SUPPORT_WATCHDOG, |
2bb057d0 ID |
677 | |
678 | /* | |
679 | * Driver configuration | |
680 | */ | |
483272f5 ID |
681 | CONFIG_FRAME_TYPE, |
682 | CONFIG_RF_SEQUENCE, | |
683 | CONFIG_EXTERNAL_LNA_A, | |
684 | CONFIG_EXTERNAL_LNA_BG, | |
685 | CONFIG_DOUBLE_ANTENNA, | |
35f00cfc | 686 | CONFIG_CHANNEL_HT40, |
483272f5 ID |
687 | }; |
688 | ||
95ea3627 ID |
689 | /* |
690 | * rt2x00 device structure. | |
691 | */ | |
692 | struct rt2x00_dev { | |
693 | /* | |
694 | * Device structure. | |
695 | * The structure stored in here depends on the | |
696 | * system bus (PCI or USB). | |
697 | * When accessing this variable, the rt2x00dev_{pci,usb} | |
49513481 | 698 | * macros should be used for correct typecasting. |
95ea3627 | 699 | */ |
14a3bf89 | 700 | struct device *dev; |
95ea3627 ID |
701 | |
702 | /* | |
703 | * Callback functions. | |
704 | */ | |
705 | const struct rt2x00_ops *ops; | |
706 | ||
707 | /* | |
708 | * IEEE80211 control structure. | |
709 | */ | |
710 | struct ieee80211_hw *hw; | |
8318d78a JB |
711 | struct ieee80211_supported_band bands[IEEE80211_NUM_BANDS]; |
712 | enum ieee80211_band curr_band; | |
e5ef5bad | 713 | int curr_freq; |
95ea3627 | 714 | |
95ea3627 ID |
715 | /* |
716 | * If enabled, the debugfs interface structures | |
717 | * required for deregistration of debugfs. | |
718 | */ | |
719 | #ifdef CONFIG_RT2X00_LIB_DEBUGFS | |
4d8dd66c | 720 | struct rt2x00debug_intf *debugfs_intf; |
95ea3627 ID |
721 | #endif /* CONFIG_RT2X00_LIB_DEBUGFS */ |
722 | ||
a9450b70 ID |
723 | /* |
724 | * LED structure for changing the LED status | |
725 | * by mac8011 or the kernel. | |
726 | */ | |
727 | #ifdef CONFIG_RT2X00_LIB_LEDS | |
a9450b70 ID |
728 | struct rt2x00_led led_radio; |
729 | struct rt2x00_led led_assoc; | |
730 | struct rt2x00_led led_qual; | |
731 | u16 led_mcu_reg; | |
732 | #endif /* CONFIG_RT2X00_LIB_LEDS */ | |
733 | ||
95ea3627 ID |
734 | /* |
735 | * Device flags. | |
736 | * In these flags the current status and some | |
737 | * of the device capabilities are stored. | |
738 | */ | |
739 | unsigned long flags; | |
95ea3627 | 740 | |
440ddada ID |
741 | /* |
742 | * Device information, Bus IRQ and name (PCI, SoC) | |
743 | */ | |
744 | int irq; | |
745 | const char *name; | |
746 | ||
95ea3627 ID |
747 | /* |
748 | * Chipset identification. | |
749 | */ | |
750 | struct rt2x00_chip chip; | |
751 | ||
752 | /* | |
753 | * hw capability specifications. | |
754 | */ | |
755 | struct hw_mode_spec spec; | |
756 | ||
addc81bd ID |
757 | /* |
758 | * This is the default TX/RX antenna setup as indicated | |
6d64360a | 759 | * by the device's EEPROM. |
addc81bd ID |
760 | */ |
761 | struct antenna_setup default_ant; | |
762 | ||
95ea3627 ID |
763 | /* |
764 | * Register pointers | |
21795094 ID |
765 | * csr.base: CSR base register address. (PCI) |
766 | * csr.cache: CSR cache for usb_control_msg. (USB) | |
95ea3627 | 767 | */ |
21795094 ID |
768 | union csr { |
769 | void __iomem *base; | |
770 | void *cache; | |
771 | } csr; | |
95ea3627 | 772 | |
3d82346c | 773 | /* |
8ff48a8b ID |
774 | * Mutex to protect register accesses. |
775 | * For PCI and USB devices it protects against concurrent indirect | |
776 | * register access (BBP, RF, MCU) since accessing those | |
777 | * registers require multiple calls to the CSR registers. | |
778 | * For USB devices it also protects the csr_cache since that | |
779 | * field is used for normal CSR access and it cannot support | |
780 | * multiple callers simultaneously. | |
781 | */ | |
782 | struct mutex csr_mutex; | |
3d82346c | 783 | |
3c4f2085 ID |
784 | /* |
785 | * Current packet filter configuration for the device. | |
786 | * This contains all currently active FIF_* flags send | |
787 | * to us by mac80211 during configure_filter(). | |
788 | */ | |
789 | unsigned int packet_filter; | |
790 | ||
95ea3627 | 791 | /* |
6bb40dd1 ID |
792 | * Interface details: |
793 | * - Open ap interface count. | |
794 | * - Open sta interface count. | |
795 | * - Association count. | |
69cf36a4 | 796 | * - Beaconing enabled count. |
95ea3627 | 797 | */ |
6bb40dd1 ID |
798 | unsigned int intf_ap_count; |
799 | unsigned int intf_sta_count; | |
800 | unsigned int intf_associated; | |
69cf36a4 | 801 | unsigned int intf_beaconing; |
95ea3627 ID |
802 | |
803 | /* | |
804 | * Link quality | |
805 | */ | |
806 | struct link link; | |
807 | ||
808 | /* | |
809 | * EEPROM data. | |
810 | */ | |
811 | __le16 *eeprom; | |
812 | ||
813 | /* | |
814 | * Active RF register values. | |
815 | * These are stored here so we don't need | |
816 | * to read the rf registers and can directly | |
817 | * use this value instead. | |
818 | * This field should be accessed by using | |
819 | * rt2x00_rf_read() and rt2x00_rf_write(). | |
820 | */ | |
821 | u32 *rf; | |
822 | ||
ba2ab471 ID |
823 | /* |
824 | * LNA gain | |
825 | */ | |
826 | short lna_gain; | |
827 | ||
95ea3627 ID |
828 | /* |
829 | * Current TX power value. | |
830 | */ | |
831 | u16 tx_power; | |
832 | ||
42c82857 ID |
833 | /* |
834 | * Current retry values. | |
835 | */ | |
836 | u8 short_retry; | |
837 | u8 long_retry; | |
838 | ||
95ea3627 ID |
839 | /* |
840 | * Rssi <-> Dbm offset | |
841 | */ | |
842 | u8 rssi_offset; | |
843 | ||
844 | /* | |
845 | * Frequency offset (for rt61pci & rt73usb). | |
846 | */ | |
847 | u8 freq_offset; | |
848 | ||
35f00cfc ID |
849 | /* |
850 | * Calibration information (for rt2800usb & rt2800pci). | |
851 | * [0] -> BW20 | |
852 | * [1] -> BW40 | |
853 | */ | |
854 | u8 calibration[2]; | |
855 | ||
6b347bff ID |
856 | /* |
857 | * Beacon interval. | |
858 | */ | |
859 | u16 beacon_int; | |
860 | ||
95ea3627 ID |
861 | /* |
862 | * Low level statistics which will have | |
863 | * to be kept up to date while device is running. | |
864 | */ | |
865 | struct ieee80211_low_level_stats low_level_stats; | |
866 | ||
0439f536 ID |
867 | /** |
868 | * Work queue for all work which should not be placed | |
869 | * on the mac80211 workqueue (because of dependencies | |
870 | * between various work structures). | |
871 | */ | |
872 | struct workqueue_struct *workqueue; | |
873 | ||
95ea3627 | 874 | /* |
4150c572 | 875 | * Scheduled work. |
8e260c22 ID |
876 | * NOTE: intf_work will use ieee80211_iterate_active_interfaces() |
877 | * which means it cannot be placed on the hw->workqueue | |
878 | * due to RTNL locking requirements. | |
95ea3627 | 879 | */ |
6bb40dd1 | 880 | struct work_struct intf_work; |
95ea3627 | 881 | |
7e613e16 ID |
882 | /** |
883 | * Scheduled work for TX/RX done handling (USB devices) | |
884 | */ | |
885 | struct work_struct rxdone_work; | |
886 | struct work_struct txdone_work; | |
887 | ||
95ea3627 | 888 | /* |
181d6902 ID |
889 | * Data queue arrays for RX, TX and Beacon. |
890 | * The Beacon array also contains the Atim queue | |
95ea3627 ID |
891 | * if that is supported by the device. |
892 | */ | |
b869767b | 893 | unsigned int data_queues; |
181d6902 ID |
894 | struct data_queue *rx; |
895 | struct data_queue *tx; | |
896 | struct data_queue *bcn; | |
95ea3627 ID |
897 | |
898 | /* | |
899 | * Firmware image. | |
900 | */ | |
901 | const struct firmware *fw; | |
ee134fcc | 902 | |
96c3da7d HS |
903 | /* |
904 | * FIFO for storing tx status reports between isr and tasklet. | |
905 | */ | |
c4d63244 | 906 | DECLARE_KFIFO_PTR(txstatus_fifo, u32); |
96c3da7d HS |
907 | |
908 | /* | |
909 | * Tasklet for processing tx status reports (rt2800pci). | |
910 | */ | |
911 | struct tasklet_struct txstatus_tasklet; | |
c5c65761 HS |
912 | struct tasklet_struct pretbtt_tasklet; |
913 | struct tasklet_struct tbtt_tasklet; | |
914 | struct tasklet_struct rxdone_tasklet; | |
915 | struct tasklet_struct autowake_tasklet; | |
916 | ||
917 | /* | |
918 | * Protect the interrupt mask register. | |
919 | */ | |
920 | spinlock_t irqmask_lock; | |
95ea3627 ID |
921 | }; |
922 | ||
1f285f14 BZ |
923 | /* |
924 | * Register defines. | |
925 | * Some registers require multiple attempts before success, | |
926 | * in those cases REGISTER_BUSY_COUNT attempts should be | |
927 | * taken with a REGISTER_BUSY_DELAY interval. | |
928 | */ | |
ae4ecb9f | 929 | #define REGISTER_BUSY_COUNT 100 |
1f285f14 BZ |
930 | #define REGISTER_BUSY_DELAY 100 |
931 | ||
95ea3627 ID |
932 | /* |
933 | * Generic RF access. | |
934 | * The RF is being accessed by word index. | |
935 | */ | |
0e14f6d3 | 936 | static inline void rt2x00_rf_read(struct rt2x00_dev *rt2x00dev, |
95ea3627 ID |
937 | const unsigned int word, u32 *data) |
938 | { | |
6b26dead PR |
939 | BUG_ON(word < 1 || word > rt2x00dev->ops->rf_size / sizeof(u32)); |
940 | *data = rt2x00dev->rf[word - 1]; | |
95ea3627 ID |
941 | } |
942 | ||
0e14f6d3 | 943 | static inline void rt2x00_rf_write(struct rt2x00_dev *rt2x00dev, |
95ea3627 ID |
944 | const unsigned int word, u32 data) |
945 | { | |
6b26dead PR |
946 | BUG_ON(word < 1 || word > rt2x00dev->ops->rf_size / sizeof(u32)); |
947 | rt2x00dev->rf[word - 1] = data; | |
95ea3627 ID |
948 | } |
949 | ||
950 | /* | |
951 | * Generic EEPROM access. | |
952 | * The EEPROM is being accessed by word index. | |
953 | */ | |
0e14f6d3 | 954 | static inline void *rt2x00_eeprom_addr(struct rt2x00_dev *rt2x00dev, |
95ea3627 ID |
955 | const unsigned int word) |
956 | { | |
957 | return (void *)&rt2x00dev->eeprom[word]; | |
958 | } | |
959 | ||
0e14f6d3 | 960 | static inline void rt2x00_eeprom_read(struct rt2x00_dev *rt2x00dev, |
95ea3627 ID |
961 | const unsigned int word, u16 *data) |
962 | { | |
963 | *data = le16_to_cpu(rt2x00dev->eeprom[word]); | |
964 | } | |
965 | ||
0e14f6d3 | 966 | static inline void rt2x00_eeprom_write(struct rt2x00_dev *rt2x00dev, |
95ea3627 ID |
967 | const unsigned int word, u16 data) |
968 | { | |
969 | rt2x00dev->eeprom[word] = cpu_to_le16(data); | |
970 | } | |
971 | ||
972 | /* | |
973 | * Chipset handlers | |
974 | */ | |
975 | static inline void rt2x00_set_chip(struct rt2x00_dev *rt2x00dev, | |
49e721ec | 976 | const u16 rt, const u16 rf, const u16 rev) |
95ea3627 | 977 | { |
95ea3627 ID |
978 | rt2x00dev->chip.rt = rt; |
979 | rt2x00dev->chip.rf = rf; | |
980 | rt2x00dev->chip.rev = rev; | |
440ddada | 981 | |
16475b09 | 982 | INFO(rt2x00dev, |
49e721ec | 983 | "Chipset detected - rt: %04x, rf: %04x, rev: %04x.\n", |
16475b09 GW |
984 | rt2x00dev->chip.rt, rt2x00dev->chip.rf, rt2x00dev->chip.rev); |
985 | } | |
986 | ||
8d0c9b65 | 987 | static inline bool rt2x00_rt(struct rt2x00_dev *rt2x00dev, const u16 rt) |
95ea3627 | 988 | { |
5122d898 | 989 | return (rt2x00dev->chip.rt == rt); |
95ea3627 ID |
990 | } |
991 | ||
8d0c9b65 | 992 | static inline bool rt2x00_rf(struct rt2x00_dev *rt2x00dev, const u16 rf) |
95ea3627 | 993 | { |
5122d898 | 994 | return (rt2x00dev->chip.rf == rf); |
95ea3627 ID |
995 | } |
996 | ||
49e721ec | 997 | static inline u16 rt2x00_rev(struct rt2x00_dev *rt2x00dev) |
95ea3627 | 998 | { |
5122d898 | 999 | return rt2x00dev->chip.rev; |
95ea3627 ID |
1000 | } |
1001 | ||
8d0c9b65 GW |
1002 | static inline bool rt2x00_rt_rev(struct rt2x00_dev *rt2x00dev, |
1003 | const u16 rt, const u16 rev) | |
1004 | { | |
1005 | return (rt2x00_rt(rt2x00dev, rt) && rt2x00_rev(rt2x00dev) == rev); | |
1006 | } | |
1007 | ||
1008 | static inline bool rt2x00_rt_rev_lt(struct rt2x00_dev *rt2x00dev, | |
1009 | const u16 rt, const u16 rev) | |
1010 | { | |
1011 | return (rt2x00_rt(rt2x00dev, rt) && rt2x00_rev(rt2x00dev) < rev); | |
1012 | } | |
1013 | ||
1014 | static inline bool rt2x00_rt_rev_gte(struct rt2x00_dev *rt2x00dev, | |
1015 | const u16 rt, const u16 rev) | |
1016 | { | |
1017 | return (rt2x00_rt(rt2x00dev, rt) && rt2x00_rev(rt2x00dev) >= rev); | |
1018 | } | |
1019 | ||
5822e070 BZ |
1020 | static inline void rt2x00_set_chip_intf(struct rt2x00_dev *rt2x00dev, |
1021 | enum rt2x00_chip_intf intf) | |
1022 | { | |
1023 | rt2x00dev->chip.intf = intf; | |
1024 | } | |
1025 | ||
5122d898 | 1026 | static inline bool rt2x00_intf(struct rt2x00_dev *rt2x00dev, |
5822e070 BZ |
1027 | enum rt2x00_chip_intf intf) |
1028 | { | |
5122d898 | 1029 | return (rt2x00dev->chip.intf == intf); |
5822e070 BZ |
1030 | } |
1031 | ||
cea90e55 | 1032 | static inline bool rt2x00_is_pci(struct rt2x00_dev *rt2x00dev) |
5822e070 | 1033 | { |
6e1fdd11 GW |
1034 | return rt2x00_intf(rt2x00dev, RT2X00_CHIP_INTF_PCI) || |
1035 | rt2x00_intf(rt2x00dev, RT2X00_CHIP_INTF_PCIE); | |
1036 | } | |
1037 | ||
1038 | static inline bool rt2x00_is_pcie(struct rt2x00_dev *rt2x00dev) | |
1039 | { | |
1040 | return rt2x00_intf(rt2x00dev, RT2X00_CHIP_INTF_PCIE); | |
5822e070 BZ |
1041 | } |
1042 | ||
cea90e55 | 1043 | static inline bool rt2x00_is_usb(struct rt2x00_dev *rt2x00dev) |
5822e070 | 1044 | { |
5122d898 | 1045 | return rt2x00_intf(rt2x00dev, RT2X00_CHIP_INTF_USB); |
5822e070 BZ |
1046 | } |
1047 | ||
cea90e55 GW |
1048 | static inline bool rt2x00_is_soc(struct rt2x00_dev *rt2x00dev) |
1049 | { | |
1050 | return rt2x00_intf(rt2x00dev, RT2X00_CHIP_INTF_SOC); | |
1051 | } | |
1052 | ||
239c249d | 1053 | /** |
c4da0048 | 1054 | * rt2x00queue_map_txskb - Map a skb into DMA for TX purposes. |
fa69560f | 1055 | * @entry: Pointer to &struct queue_entry |
239c249d | 1056 | */ |
fa69560f | 1057 | void rt2x00queue_map_txskb(struct queue_entry *entry); |
239c249d | 1058 | |
0b8004aa GW |
1059 | /** |
1060 | * rt2x00queue_unmap_skb - Unmap a skb from DMA. | |
fa69560f | 1061 | * @entry: Pointer to &struct queue_entry |
0b8004aa | 1062 | */ |
fa69560f | 1063 | void rt2x00queue_unmap_skb(struct queue_entry *entry); |
0b8004aa | 1064 | |
181d6902 | 1065 | /** |
e58c6aca | 1066 | * rt2x00queue_get_queue - Convert queue index to queue pointer |
181d6902 | 1067 | * @rt2x00dev: Pointer to &struct rt2x00_dev. |
e58c6aca | 1068 | * @queue: rt2x00 queue index (see &enum data_queue_qid). |
95ea3627 | 1069 | */ |
181d6902 | 1070 | struct data_queue *rt2x00queue_get_queue(struct rt2x00_dev *rt2x00dev, |
e58c6aca | 1071 | const enum data_queue_qid queue); |
181d6902 ID |
1072 | |
1073 | /** | |
1074 | * rt2x00queue_get_entry - Get queue entry where the given index points to. | |
9a46d44e | 1075 | * @queue: Pointer to &struct data_queue from where we obtain the entry. |
181d6902 ID |
1076 | * @index: Index identifier for obtaining the correct index. |
1077 | */ | |
1078 | struct queue_entry *rt2x00queue_get_entry(struct data_queue *queue, | |
1079 | enum queue_index index); | |
1080 | ||
0b7fde54 ID |
1081 | /** |
1082 | * rt2x00queue_pause_queue - Pause a data queue | |
1083 | * @queue: Pointer to &struct data_queue. | |
1084 | * | |
1085 | * This function will pause the data queue locally, preventing | |
1086 | * new frames to be added to the queue (while the hardware is | |
1087 | * still allowed to run). | |
1088 | */ | |
1089 | void rt2x00queue_pause_queue(struct data_queue *queue); | |
1090 | ||
1091 | /** | |
1092 | * rt2x00queue_unpause_queue - unpause a data queue | |
1093 | * @queue: Pointer to &struct data_queue. | |
1094 | * | |
1095 | * This function will unpause the data queue locally, allowing | |
1096 | * new frames to be added to the queue again. | |
1097 | */ | |
1098 | void rt2x00queue_unpause_queue(struct data_queue *queue); | |
1099 | ||
1100 | /** | |
1101 | * rt2x00queue_start_queue - Start a data queue | |
1102 | * @queue: Pointer to &struct data_queue. | |
1103 | * | |
1104 | * This function will start handling all pending frames in the queue. | |
1105 | */ | |
1106 | void rt2x00queue_start_queue(struct data_queue *queue); | |
1107 | ||
1108 | /** | |
1109 | * rt2x00queue_stop_queue - Halt a data queue | |
1110 | * @queue: Pointer to &struct data_queue. | |
1111 | * | |
1112 | * This function will stop all pending frames in the queue. | |
1113 | */ | |
1114 | void rt2x00queue_stop_queue(struct data_queue *queue); | |
1115 | ||
5be65609 ID |
1116 | /** |
1117 | * rt2x00queue_flush_queue - Flush a data queue | |
1118 | * @queue: Pointer to &struct data_queue. | |
1119 | * @drop: True to drop all pending frames. | |
1120 | * | |
1121 | * This function will flush the queue. After this call | |
1122 | * the queue is guarenteed to be empty. | |
1123 | */ | |
1124 | void rt2x00queue_flush_queue(struct data_queue *queue, bool drop); | |
1125 | ||
0b7fde54 ID |
1126 | /** |
1127 | * rt2x00queue_start_queues - Start all data queues | |
1128 | * @rt2x00dev: Pointer to &struct rt2x00_dev. | |
1129 | * | |
1130 | * This function will loop through all available queues to start them | |
1131 | */ | |
1132 | void rt2x00queue_start_queues(struct rt2x00_dev *rt2x00dev); | |
1133 | ||
1134 | /** | |
1135 | * rt2x00queue_stop_queues - Halt all data queues | |
1136 | * @rt2x00dev: Pointer to &struct rt2x00_dev. | |
1137 | * | |
1138 | * This function will loop through all available queues to stop | |
1139 | * any pending frames. | |
1140 | */ | |
1141 | void rt2x00queue_stop_queues(struct rt2x00_dev *rt2x00dev); | |
1142 | ||
5be65609 ID |
1143 | /** |
1144 | * rt2x00queue_flush_queues - Flush all data queues | |
1145 | * @rt2x00dev: Pointer to &struct rt2x00_dev. | |
1146 | * @drop: True to drop all pending frames. | |
1147 | * | |
1148 | * This function will loop through all available queues to flush | |
1149 | * any pending frames. | |
1150 | */ | |
1151 | void rt2x00queue_flush_queues(struct rt2x00_dev *rt2x00dev, bool drop); | |
1152 | ||
b4df4708 GW |
1153 | /* |
1154 | * Debugfs handlers. | |
1155 | */ | |
1156 | /** | |
1157 | * rt2x00debug_dump_frame - Dump a frame to userspace through debugfs. | |
1158 | * @rt2x00dev: Pointer to &struct rt2x00_dev. | |
1159 | * @type: The type of frame that is being dumped. | |
1160 | * @skb: The skb containing the frame to be dumped. | |
1161 | */ | |
1162 | #ifdef CONFIG_RT2X00_LIB_DEBUGFS | |
1163 | void rt2x00debug_dump_frame(struct rt2x00_dev *rt2x00dev, | |
1164 | enum rt2x00_dump_type type, struct sk_buff *skb); | |
1165 | #else | |
1166 | static inline void rt2x00debug_dump_frame(struct rt2x00_dev *rt2x00dev, | |
1167 | enum rt2x00_dump_type type, | |
1168 | struct sk_buff *skb) | |
1169 | { | |
1170 | } | |
1171 | #endif /* CONFIG_RT2X00_LIB_DEBUGFS */ | |
1172 | ||
95ea3627 ID |
1173 | /* |
1174 | * Interrupt context handlers. | |
1175 | */ | |
1176 | void rt2x00lib_beacondone(struct rt2x00_dev *rt2x00dev); | |
9f926fb5 | 1177 | void rt2x00lib_pretbtt(struct rt2x00_dev *rt2x00dev); |
64e7d723 | 1178 | void rt2x00lib_dmastart(struct queue_entry *entry); |
652a9dd2 | 1179 | void rt2x00lib_dmadone(struct queue_entry *entry); |
181d6902 ID |
1180 | void rt2x00lib_txdone(struct queue_entry *entry, |
1181 | struct txdone_entry_desc *txdesc); | |
3392bece | 1182 | void rt2x00lib_txdone_noinfo(struct queue_entry *entry, u32 status); |
fa69560f | 1183 | void rt2x00lib_rxdone(struct queue_entry *entry); |
95ea3627 | 1184 | |
95ea3627 ID |
1185 | /* |
1186 | * mac80211 handlers. | |
1187 | */ | |
7bb45683 | 1188 | void rt2x00mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb); |
95ea3627 ID |
1189 | int rt2x00mac_start(struct ieee80211_hw *hw); |
1190 | void rt2x00mac_stop(struct ieee80211_hw *hw); | |
1191 | int rt2x00mac_add_interface(struct ieee80211_hw *hw, | |
1ed32e4f | 1192 | struct ieee80211_vif *vif); |
95ea3627 | 1193 | void rt2x00mac_remove_interface(struct ieee80211_hw *hw, |
1ed32e4f | 1194 | struct ieee80211_vif *vif); |
e8975581 | 1195 | int rt2x00mac_config(struct ieee80211_hw *hw, u32 changed); |
3a643d24 ID |
1196 | void rt2x00mac_configure_filter(struct ieee80211_hw *hw, |
1197 | unsigned int changed_flags, | |
1198 | unsigned int *total_flags, | |
3ac64bee | 1199 | u64 multicast); |
930c06f2 SS |
1200 | int rt2x00mac_set_tim(struct ieee80211_hw *hw, struct ieee80211_sta *sta, |
1201 | bool set); | |
2bb057d0 ID |
1202 | #ifdef CONFIG_RT2X00_LIB_CRYPTO |
1203 | int rt2x00mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd, | |
dc822b5d | 1204 | struct ieee80211_vif *vif, struct ieee80211_sta *sta, |
2bb057d0 ID |
1205 | struct ieee80211_key_conf *key); |
1206 | #else | |
1207 | #define rt2x00mac_set_key NULL | |
1208 | #endif /* CONFIG_RT2X00_LIB_CRYPTO */ | |
d8147f9d ID |
1209 | void rt2x00mac_sw_scan_start(struct ieee80211_hw *hw); |
1210 | void rt2x00mac_sw_scan_complete(struct ieee80211_hw *hw); | |
95ea3627 ID |
1211 | int rt2x00mac_get_stats(struct ieee80211_hw *hw, |
1212 | struct ieee80211_low_level_stats *stats); | |
471b3efd JB |
1213 | void rt2x00mac_bss_info_changed(struct ieee80211_hw *hw, |
1214 | struct ieee80211_vif *vif, | |
1215 | struct ieee80211_bss_conf *bss_conf, | |
1216 | u32 changes); | |
e100bb64 | 1217 | int rt2x00mac_conf_tx(struct ieee80211_hw *hw, u16 queue, |
95ea3627 | 1218 | const struct ieee80211_tx_queue_params *params); |
e47a5cdd | 1219 | void rt2x00mac_rfkill_poll(struct ieee80211_hw *hw); |
f44df18c | 1220 | void rt2x00mac_flush(struct ieee80211_hw *hw, bool drop); |
95ea3627 ID |
1221 | |
1222 | /* | |
1223 | * Driver allocation handlers. | |
1224 | */ | |
1225 | int rt2x00lib_probe_dev(struct rt2x00_dev *rt2x00dev); | |
1226 | void rt2x00lib_remove_dev(struct rt2x00_dev *rt2x00dev); | |
1227 | #ifdef CONFIG_PM | |
1228 | int rt2x00lib_suspend(struct rt2x00_dev *rt2x00dev, pm_message_t state); | |
1229 | int rt2x00lib_resume(struct rt2x00_dev *rt2x00dev); | |
1230 | #endif /* CONFIG_PM */ | |
1231 | ||
1232 | #endif /* RT2X00_H */ |