Commit | Line | Data |
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95ea3627 | 1 | /* |
7e613e16 ID |
2 | Copyright (C) 2010 Willow Garage <http://www.willowgarage.com> |
3 | Copyright (C) 2004 - 2010 Ivo van Doorn <IvDoorn@gmail.com> | |
9c9a0d14 | 4 | Copyright (C) 2004 - 2009 Gertjan van Wingerde <gwingerde@gmail.com> |
95ea3627 ID |
5 | <http://rt2x00.serialmonkey.com> |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2 of the License, or | |
10 | (at your option) any later version. | |
11 | ||
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with this program; if not, write to the | |
19 | Free Software Foundation, Inc., | |
20 | 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. | |
21 | */ | |
22 | ||
23 | /* | |
24 | Module: rt2x00 | |
25 | Abstract: rt2x00 global information. | |
26 | */ | |
27 | ||
28 | #ifndef RT2X00_H | |
29 | #define RT2X00_H | |
30 | ||
31 | #include <linux/bitops.h> | |
a6b7a407 | 32 | #include <linux/interrupt.h> |
95ea3627 ID |
33 | #include <linux/skbuff.h> |
34 | #include <linux/workqueue.h> | |
35 | #include <linux/firmware.h> | |
a9450b70 | 36 | #include <linux/leds.h> |
3d82346c | 37 | #include <linux/mutex.h> |
61af43c5 | 38 | #include <linux/etherdevice.h> |
cca3e998 | 39 | #include <linux/input-polldev.h> |
96c3da7d | 40 | #include <linux/kfifo.h> |
f421111b | 41 | #include <linux/hrtimer.h> |
95ea3627 ID |
42 | |
43 | #include <net/mac80211.h> | |
44 | ||
45 | #include "rt2x00debug.h" | |
b4df4708 | 46 | #include "rt2x00dump.h" |
a9450b70 | 47 | #include "rt2x00leds.h" |
95ea3627 | 48 | #include "rt2x00reg.h" |
181d6902 | 49 | #include "rt2x00queue.h" |
95ea3627 ID |
50 | |
51 | /* | |
52 | * Module information. | |
95ea3627 | 53 | */ |
754be309 | 54 | #define DRV_VERSION "2.3.0" |
95ea3627 ID |
55 | #define DRV_PROJECT "http://rt2x00.serialmonkey.com" |
56 | ||
57 | /* | |
58 | * Debug definitions. | |
59 | * Debug output has to be enabled during compile time. | |
60 | */ | |
61 | #define DEBUG_PRINTK_MSG(__dev, __kernlvl, __lvl, __msg, __args...) \ | |
62 | printk(__kernlvl "%s -> %s: %s - " __msg, \ | |
c94c93da | 63 | wiphy_name((__dev)->hw->wiphy), __func__, __lvl, ##__args) |
95ea3627 ID |
64 | |
65 | #define DEBUG_PRINTK_PROBE(__kernlvl, __lvl, __msg, __args...) \ | |
66 | printk(__kernlvl "%s -> %s: %s - " __msg, \ | |
c94c93da | 67 | KBUILD_MODNAME, __func__, __lvl, ##__args) |
95ea3627 ID |
68 | |
69 | #ifdef CONFIG_RT2X00_DEBUG | |
70 | #define DEBUG_PRINTK(__dev, __kernlvl, __lvl, __msg, __args...) \ | |
e85b4c04 | 71 | DEBUG_PRINTK_MSG(__dev, __kernlvl, __lvl, __msg, ##__args) |
95ea3627 ID |
72 | #else |
73 | #define DEBUG_PRINTK(__dev, __kernlvl, __lvl, __msg, __args...) \ | |
74 | do { } while (0) | |
75 | #endif /* CONFIG_RT2X00_DEBUG */ | |
76 | ||
77 | /* | |
78 | * Various debug levels. | |
79 | * The debug levels PANIC and ERROR both indicate serious problems, | |
80 | * for this reason they should never be ignored. | |
81 | * The special ERROR_PROBE message is for messages that are generated | |
82 | * when the rt2x00_dev is not yet initialized. | |
83 | */ | |
84 | #define PANIC(__dev, __msg, __args...) \ | |
85 | DEBUG_PRINTK_MSG(__dev, KERN_CRIT, "Panic", __msg, ##__args) | |
86 | #define ERROR(__dev, __msg, __args...) \ | |
87 | DEBUG_PRINTK_MSG(__dev, KERN_ERR, "Error", __msg, ##__args) | |
88 | #define ERROR_PROBE(__msg, __args...) \ | |
89 | DEBUG_PRINTK_PROBE(KERN_ERR, "Error", __msg, ##__args) | |
90 | #define WARNING(__dev, __msg, __args...) \ | |
91 | DEBUG_PRINTK(__dev, KERN_WARNING, "Warning", __msg, ##__args) | |
92 | #define NOTICE(__dev, __msg, __args...) \ | |
93 | DEBUG_PRINTK(__dev, KERN_NOTICE, "Notice", __msg, ##__args) | |
94 | #define INFO(__dev, __msg, __args...) \ | |
95 | DEBUG_PRINTK(__dev, KERN_INFO, "Info", __msg, ##__args) | |
96 | #define DEBUG(__dev, __msg, __args...) \ | |
97 | DEBUG_PRINTK(__dev, KERN_DEBUG, "Debug", __msg, ##__args) | |
98 | #define EEPROM(__dev, __msg, __args...) \ | |
99 | DEBUG_PRINTK(__dev, KERN_DEBUG, "EEPROM recovery", __msg, ##__args) | |
100 | ||
bad13639 ID |
101 | /* |
102 | * Duration calculations | |
103 | * The rate variable passed is: 100kbs. | |
104 | * To convert from bytes to bits we multiply size with 8, | |
105 | * then the size is multiplied with 10 to make the | |
106 | * real rate -> rate argument correction. | |
107 | */ | |
108 | #define GET_DURATION(__size, __rate) (((__size) * 8 * 10) / (__rate)) | |
109 | #define GET_DURATION_RES(__size, __rate)(((__size) * 8 * 10) % (__rate)) | |
110 | ||
77e73d18 GW |
111 | /* |
112 | * Determine the number of L2 padding bytes required between the header and | |
113 | * the payload. | |
114 | */ | |
115 | #define L2PAD_SIZE(__hdrlen) (-(__hdrlen) & 3) | |
116 | ||
9f166171 ID |
117 | /* |
118 | * Determine the alignment requirement, | |
119 | * to make sure the 802.11 payload is padded to a 4-byte boundrary | |
120 | * we must determine the address of the payload and calculate the | |
121 | * amount of bytes needed to move the data. | |
122 | */ | |
123 | #define ALIGN_SIZE(__skb, __header) \ | |
124 | ( ((unsigned long)((__skb)->data + (__header))) & 3 ) | |
125 | ||
7a4a77b7 GW |
126 | /* |
127 | * Constants for extra TX headroom for alignment purposes. | |
128 | */ | |
129 | #define RT2X00_ALIGN_SIZE 4 /* Only whole frame needs alignment */ | |
130 | #define RT2X00_L2PAD_SIZE 8 /* Both header & payload need alignment */ | |
131 | ||
95ea3627 ID |
132 | /* |
133 | * Standard timing and size defines. | |
134 | * These values should follow the ieee80211 specifications. | |
135 | */ | |
136 | #define ACK_SIZE 14 | |
137 | #define IEEE80211_HEADER 24 | |
138 | #define PLCP 48 | |
139 | #define BEACON 100 | |
140 | #define PREAMBLE 144 | |
141 | #define SHORT_PREAMBLE 72 | |
142 | #define SLOT_TIME 20 | |
143 | #define SHORT_SLOT_TIME 9 | |
144 | #define SIFS 10 | |
145 | #define PIFS ( SIFS + SLOT_TIME ) | |
146 | #define SHORT_PIFS ( SIFS + SHORT_SLOT_TIME ) | |
147 | #define DIFS ( PIFS + SLOT_TIME ) | |
148 | #define SHORT_DIFS ( SHORT_PIFS + SHORT_SLOT_TIME ) | |
f2fdbc48 | 149 | #define EIFS ( SIFS + DIFS + \ |
bad13639 | 150 | GET_DURATION(IEEE80211_HEADER + ACK_SIZE, 10) ) |
f2fdbc48 | 151 | #define SHORT_EIFS ( SIFS + SHORT_DIFS + \ |
bad13639 | 152 | GET_DURATION(IEEE80211_HEADER + ACK_SIZE, 10) ) |
95ea3627 | 153 | |
66679a65 LE |
154 | /* |
155 | * Structure for average calculation | |
156 | * The avg field contains the actual average value, | |
157 | * but avg_weight is internally used during calculations | |
158 | * to prevent rounding errors. | |
159 | */ | |
160 | struct avg_val { | |
161 | int avg; | |
162 | int avg_weight; | |
163 | }; | |
164 | ||
5822e070 BZ |
165 | enum rt2x00_chip_intf { |
166 | RT2X00_CHIP_INTF_PCI, | |
6e1fdd11 | 167 | RT2X00_CHIP_INTF_PCIE, |
5822e070 | 168 | RT2X00_CHIP_INTF_USB, |
cea90e55 | 169 | RT2X00_CHIP_INTF_SOC, |
5822e070 BZ |
170 | }; |
171 | ||
95ea3627 ID |
172 | /* |
173 | * Chipset identification | |
174 | * The chipset on the device is composed of a RT and RF chip. | |
175 | * The chipset combination is important for determining device capabilities. | |
176 | */ | |
177 | struct rt2x00_chip { | |
178 | u16 rt; | |
49e721ec GW |
179 | #define RT2460 0x2460 |
180 | #define RT2560 0x2560 | |
181 | #define RT2570 0x2570 | |
182 | #define RT2661 0x2661 | |
183 | #define RT2573 0x2573 | |
5ed8f458 | 184 | #define RT2860 0x2860 /* 2.4GHz */ |
e148b4c8 | 185 | #define RT2872 0x2872 /* WSOC */ |
49e721ec | 186 | #define RT2883 0x2883 /* WSOC */ |
49e721ec GW |
187 | #define RT3070 0x3070 |
188 | #define RT3071 0x3071 | |
a9b3a9f7 | 189 | #define RT3090 0x3090 /* 2.4GHz PCIe */ |
49e721ec GW |
190 | #define RT3390 0x3390 |
191 | #define RT3572 0x3572 | |
5a87e7a7 | 192 | #define RT3593 0x3593 |
e148b4c8 | 193 | #define RT3883 0x3883 /* WSOC */ |
70127cb6 | 194 | #define RT5390 0x5390 /* 2.4GHz */ |
2ed71884 | 195 | #define RT5392 0x5392 /* 2.4GHz */ |
95ea3627 ID |
196 | |
197 | u16 rf; | |
49e721ec | 198 | u16 rev; |
5822e070 BZ |
199 | |
200 | enum rt2x00_chip_intf intf; | |
95ea3627 ID |
201 | }; |
202 | ||
203 | /* | |
204 | * RF register values that belong to a particular channel. | |
205 | */ | |
206 | struct rf_channel { | |
207 | int channel; | |
208 | u32 rf1; | |
209 | u32 rf2; | |
210 | u32 rf3; | |
211 | u32 rf4; | |
212 | }; | |
213 | ||
8c5e7a5f ID |
214 | /* |
215 | * Channel information structure | |
216 | */ | |
217 | struct channel_info { | |
218 | unsigned int flags; | |
219 | #define GEOGRAPHY_ALLOWED 0x00000001 | |
220 | ||
8d1331b3 ID |
221 | short max_power; |
222 | short default_power1; | |
223 | short default_power2; | |
8c5e7a5f ID |
224 | }; |
225 | ||
addc81bd ID |
226 | /* |
227 | * Antenna setup values. | |
228 | */ | |
229 | struct antenna_setup { | |
230 | enum antenna rx; | |
231 | enum antenna tx; | |
d96aa640 RJH |
232 | u8 rx_chain_num; |
233 | u8 tx_chain_num; | |
addc81bd ID |
234 | }; |
235 | ||
95ea3627 | 236 | /* |
ebcf26da | 237 | * Quality statistics about the currently active link. |
95ea3627 | 238 | */ |
ebcf26da | 239 | struct link_qual { |
95ea3627 | 240 | /* |
5352ff65 ID |
241 | * Statistics required for Link tuning by driver |
242 | * The rssi value is provided by rt2x00lib during the | |
243 | * link_tuner() callback function. | |
244 | * The false_cca field is filled during the link_stats() | |
245 | * callback function and could be used during the | |
246 | * link_tuner() callback function. | |
95ea3627 | 247 | */ |
5352ff65 | 248 | int rssi; |
95ea3627 ID |
249 | int false_cca; |
250 | ||
251 | /* | |
5352ff65 ID |
252 | * VGC levels |
253 | * Hardware driver will tune the VGC level during each call | |
254 | * to the link_tuner() callback function. This vgc_level is | |
255 | * is determined based on the link quality statistics like | |
256 | * average RSSI and the false CCA count. | |
95ea3627 | 257 | * |
5352ff65 ID |
258 | * In some cases the drivers need to differentiate between |
259 | * the currently "desired" VGC level and the level configured | |
260 | * in the hardware. The latter is important to reduce the | |
261 | * number of BBP register reads to reduce register access | |
262 | * overhead. For this reason we store both values here. | |
263 | */ | |
264 | u8 vgc_level; | |
265 | u8 vgc_level_reg; | |
266 | ||
267 | /* | |
268 | * Statistics required for Signal quality calculation. | |
269 | * These fields might be changed during the link_stats() | |
270 | * callback function. | |
95ea3627 | 271 | */ |
95ea3627 ID |
272 | int rx_success; |
273 | int rx_failed; | |
95ea3627 ID |
274 | int tx_success; |
275 | int tx_failed; | |
ebcf26da ID |
276 | }; |
277 | ||
69f81a2c ID |
278 | /* |
279 | * Antenna settings about the currently active link. | |
280 | */ | |
281 | struct link_ant { | |
282 | /* | |
283 | * Antenna flags | |
284 | */ | |
285 | unsigned int flags; | |
286 | #define ANTENNA_RX_DIVERSITY 0x00000001 | |
287 | #define ANTENNA_TX_DIVERSITY 0x00000002 | |
288 | #define ANTENNA_MODE_SAMPLE 0x00000004 | |
289 | ||
290 | /* | |
291 | * Currently active TX/RX antenna setup. | |
292 | * When software diversity is used, this will indicate | |
293 | * which antenna is actually used at this time. | |
294 | */ | |
295 | struct antenna_setup active; | |
296 | ||
297 | /* | |
193df183 LE |
298 | * RSSI history information for the antenna. |
299 | * Used to determine when to switch antenna | |
300 | * when using software diversity. | |
69f81a2c | 301 | */ |
193df183 | 302 | int rssi_history; |
69f81a2c ID |
303 | |
304 | /* | |
305 | * Current RSSI average of the currently active antenna. | |
306 | * Similar to the avg_rssi in the link_qual structure | |
307 | * this value is updated by using the walking average. | |
308 | */ | |
66679a65 | 309 | struct avg_val rssi_ant; |
69f81a2c ID |
310 | }; |
311 | ||
ebcf26da ID |
312 | /* |
313 | * To optimize the quality of the link we need to store | |
314 | * the quality of received frames and periodically | |
315 | * optimize the link. | |
316 | */ | |
317 | struct link { | |
318 | /* | |
319 | * Link tuner counter | |
320 | * The number of times the link has been tuned | |
321 | * since the radio has been switched on. | |
322 | */ | |
323 | u32 count; | |
324 | ||
325 | /* | |
326 | * Quality measurement values. | |
327 | */ | |
328 | struct link_qual qual; | |
329 | ||
addc81bd | 330 | /* |
69f81a2c | 331 | * TX/RX antenna setup. |
addc81bd | 332 | */ |
69f81a2c | 333 | struct link_ant ant; |
addc81bd | 334 | |
ebcf26da | 335 | /* |
5352ff65 | 336 | * Currently active average RSSI value |
ebcf26da | 337 | */ |
66679a65 | 338 | struct avg_val avg_rssi; |
eb20b4e8 | 339 | |
95ea3627 ID |
340 | /* |
341 | * Work structure for scheduling periodic link tuning. | |
342 | */ | |
343 | struct delayed_work work; | |
c965c74b ID |
344 | |
345 | /* | |
346 | * Work structure for scheduling periodic watchdog monitoring. | |
cdfd2c5c ID |
347 | * This work must be scheduled on the kernel workqueue, while |
348 | * all other work structures must be queued on the mac80211 | |
349 | * workqueue. This guarantees that the watchdog can schedule | |
350 | * other work structures and wait for their completion in order | |
351 | * to bring the device/driver back into the desired state. | |
c965c74b ID |
352 | */ |
353 | struct delayed_work watchdog_work; | |
9e33a355 HS |
354 | |
355 | /* | |
356 | * Work structure for scheduling periodic AGC adjustments. | |
357 | */ | |
358 | struct delayed_work agc_work; | |
2e9c43dd JL |
359 | |
360 | /* | |
361 | * Work structure for scheduling periodic VCO calibration. | |
362 | */ | |
363 | struct delayed_work vco_work; | |
95ea3627 ID |
364 | }; |
365 | ||
bfe6a15d HS |
366 | enum rt2x00_delayed_flags { |
367 | DELAYED_UPDATE_BEACON, | |
368 | }; | |
369 | ||
95ea3627 ID |
370 | /* |
371 | * Interface structure | |
6bb40dd1 ID |
372 | * Per interface configuration details, this structure |
373 | * is allocated as the private data for ieee80211_vif. | |
95ea3627 | 374 | */ |
6bb40dd1 | 375 | struct rt2x00_intf { |
17512dc3 IP |
376 | /* |
377 | * beacon->skb must be protected with the mutex. | |
378 | */ | |
379 | struct mutex beacon_skb_mutex; | |
380 | ||
6bb40dd1 ID |
381 | /* |
382 | * Entry in the beacon queue which belongs to | |
383 | * this interface. Each interface has its own | |
384 | * dedicated beacon entry. | |
385 | */ | |
386 | struct queue_entry *beacon; | |
69cf36a4 | 387 | bool enable_beacon; |
95ea3627 | 388 | |
6bb40dd1 ID |
389 | /* |
390 | * Actions that needed rescheduling. | |
391 | */ | |
bfe6a15d | 392 | unsigned long delayed_flags; |
f591fa5d | 393 | |
d4764b29 ID |
394 | /* |
395 | * Software sequence counter, this is only required | |
396 | * for hardware which doesn't support hardware | |
397 | * sequence counting. | |
398 | */ | |
e5851dac | 399 | atomic_t seqno; |
6bb40dd1 ID |
400 | }; |
401 | ||
402 | static inline struct rt2x00_intf* vif_to_intf(struct ieee80211_vif *vif) | |
95ea3627 | 403 | { |
6bb40dd1 | 404 | return (struct rt2x00_intf *)vif->drv_priv; |
95ea3627 ID |
405 | } |
406 | ||
31562e80 ID |
407 | /** |
408 | * struct hw_mode_spec: Hardware specifications structure | |
409 | * | |
95ea3627 ID |
410 | * Details about the supported modes, rates and channels |
411 | * of a particular chipset. This is used by rt2x00lib | |
412 | * to build the ieee80211_hw_mode array for mac80211. | |
31562e80 ID |
413 | * |
414 | * @supported_bands: Bitmask contained the supported bands (2.4GHz, 5.2GHz). | |
415 | * @supported_rates: Rate types which are supported (CCK, OFDM). | |
416 | * @num_channels: Number of supported channels. This is used as array size | |
417 | * for @tx_power_a, @tx_power_bg and @channels. | |
9a46d44e | 418 | * @channels: Device/chipset specific channel values (See &struct rf_channel). |
8c5e7a5f | 419 | * @channels_info: Additional information for channels (See &struct channel_info). |
35f00cfc | 420 | * @ht: Driver HT Capabilities (See &ieee80211_sta_ht_cap). |
95ea3627 ID |
421 | */ |
422 | struct hw_mode_spec { | |
31562e80 ID |
423 | unsigned int supported_bands; |
424 | #define SUPPORT_BAND_2GHZ 0x00000001 | |
425 | #define SUPPORT_BAND_5GHZ 0x00000002 | |
426 | ||
427 | unsigned int supported_rates; | |
428 | #define SUPPORT_RATE_CCK 0x00000001 | |
429 | #define SUPPORT_RATE_OFDM 0x00000002 | |
430 | ||
431 | unsigned int num_channels; | |
432 | const struct rf_channel *channels; | |
8c5e7a5f | 433 | const struct channel_info *channels_info; |
35f00cfc ID |
434 | |
435 | struct ieee80211_sta_ht_cap ht; | |
95ea3627 ID |
436 | }; |
437 | ||
5c58ee51 ID |
438 | /* |
439 | * Configuration structure wrapper around the | |
440 | * mac80211 configuration structure. | |
441 | * When mac80211 configures the driver, rt2x00lib | |
442 | * can precalculate values which are equal for all | |
443 | * rt2x00 drivers. Those values can be stored in here. | |
444 | */ | |
445 | struct rt2x00lib_conf { | |
446 | struct ieee80211_conf *conf; | |
8c5e7a5f | 447 | |
5c58ee51 | 448 | struct rf_channel rf; |
8c5e7a5f | 449 | struct channel_info channel; |
5c58ee51 ID |
450 | }; |
451 | ||
72810379 ID |
452 | /* |
453 | * Configuration structure for erp settings. | |
454 | */ | |
455 | struct rt2x00lib_erp { | |
456 | int short_preamble; | |
e360c4cb | 457 | int cts_protection; |
72810379 | 458 | |
881d948c | 459 | u32 basic_rates; |
e4ea1c40 ID |
460 | |
461 | int slot_time; | |
462 | ||
463 | short sifs; | |
464 | short pifs; | |
465 | short difs; | |
466 | short eifs; | |
8a566afe ID |
467 | |
468 | u16 beacon_int; | |
87c1915d | 469 | u16 ht_opmode; |
72810379 ID |
470 | }; |
471 | ||
2bb057d0 ID |
472 | /* |
473 | * Configuration structure for hardware encryption. | |
474 | */ | |
475 | struct rt2x00lib_crypto { | |
476 | enum cipher cipher; | |
477 | ||
478 | enum set_key_cmd cmd; | |
479 | const u8 *address; | |
480 | ||
481 | u32 bssidx; | |
2bb057d0 ID |
482 | |
483 | u8 key[16]; | |
484 | u8 tx_mic[8]; | |
485 | u8 rx_mic[8]; | |
f03fcfc1 HS |
486 | |
487 | int wcid; | |
2bb057d0 ID |
488 | }; |
489 | ||
6bb40dd1 ID |
490 | /* |
491 | * Configuration structure wrapper around the | |
492 | * rt2x00 interface configuration handler. | |
493 | */ | |
494 | struct rt2x00intf_conf { | |
495 | /* | |
496 | * Interface type | |
497 | */ | |
05c914fe | 498 | enum nl80211_iftype type; |
6bb40dd1 ID |
499 | |
500 | /* | |
25985edc | 501 | * TSF sync value, this is dependent on the operation type. |
6bb40dd1 ID |
502 | */ |
503 | enum tsf_sync sync; | |
504 | ||
505 | /* | |
25985edc LDM |
506 | * The MAC and BSSID addresses are simple array of bytes, |
507 | * these arrays are little endian, so when sending the addresses | |
6bb40dd1 ID |
508 | * to the drivers, copy the it into a endian-signed variable. |
509 | * | |
510 | * Note that all devices (except rt2500usb) have 32 bits | |
511 | * register word sizes. This means that whatever variable we | |
512 | * pass _must_ be a multiple of 32 bits. Otherwise the device | |
513 | * might not accept what we are sending to it. | |
514 | * This will also make it easier for the driver to write | |
515 | * the data to the device. | |
516 | */ | |
517 | __le32 mac[2]; | |
518 | __le32 bssid[2]; | |
519 | }; | |
520 | ||
b4943d81 HS |
521 | /* |
522 | * Private structure for storing STA details | |
523 | * wcid: Wireless Client ID | |
524 | */ | |
525 | struct rt2x00_sta { | |
526 | int wcid; | |
527 | }; | |
528 | ||
529 | static inline struct rt2x00_sta* sta_to_rt2x00_sta(struct ieee80211_sta *sta) | |
530 | { | |
531 | return (struct rt2x00_sta *)sta->drv_priv; | |
532 | } | |
533 | ||
95ea3627 ID |
534 | /* |
535 | * rt2x00lib callback functions. | |
536 | */ | |
537 | struct rt2x00lib_ops { | |
538 | /* | |
539 | * Interrupt handlers. | |
540 | */ | |
541 | irq_handler_t irq_handler; | |
542 | ||
96c3da7d HS |
543 | /* |
544 | * TX status tasklet handler. | |
545 | */ | |
546 | void (*txstatus_tasklet) (unsigned long data); | |
c5c65761 HS |
547 | void (*pretbtt_tasklet) (unsigned long data); |
548 | void (*tbtt_tasklet) (unsigned long data); | |
549 | void (*rxdone_tasklet) (unsigned long data); | |
550 | void (*autowake_tasklet) (unsigned long data); | |
96c3da7d | 551 | |
95ea3627 ID |
552 | /* |
553 | * Device init handlers. | |
554 | */ | |
555 | int (*probe_hw) (struct rt2x00_dev *rt2x00dev); | |
556 | char *(*get_firmware_name) (struct rt2x00_dev *rt2x00dev); | |
0cbe0064 ID |
557 | int (*check_firmware) (struct rt2x00_dev *rt2x00dev, |
558 | const u8 *data, const size_t len); | |
559 | int (*load_firmware) (struct rt2x00_dev *rt2x00dev, | |
560 | const u8 *data, const size_t len); | |
95ea3627 ID |
561 | |
562 | /* | |
563 | * Device initialization/deinitialization handlers. | |
564 | */ | |
565 | int (*initialize) (struct rt2x00_dev *rt2x00dev); | |
566 | void (*uninitialize) (struct rt2x00_dev *rt2x00dev); | |
567 | ||
837e7f24 | 568 | /* |
181d6902 | 569 | * queue initialization handlers |
837e7f24 | 570 | */ |
798b7adb ID |
571 | bool (*get_entry_state) (struct queue_entry *entry); |
572 | void (*clear_entry) (struct queue_entry *entry); | |
837e7f24 | 573 | |
95ea3627 ID |
574 | /* |
575 | * Radio control handlers. | |
576 | */ | |
577 | int (*set_device_state) (struct rt2x00_dev *rt2x00dev, | |
578 | enum dev_state state); | |
579 | int (*rfkill_poll) (struct rt2x00_dev *rt2x00dev); | |
ebcf26da ID |
580 | void (*link_stats) (struct rt2x00_dev *rt2x00dev, |
581 | struct link_qual *qual); | |
5352ff65 ID |
582 | void (*reset_tuner) (struct rt2x00_dev *rt2x00dev, |
583 | struct link_qual *qual); | |
584 | void (*link_tuner) (struct rt2x00_dev *rt2x00dev, | |
585 | struct link_qual *qual, const u32 count); | |
9e33a355 | 586 | void (*gain_calibration) (struct rt2x00_dev *rt2x00dev); |
2e9c43dd | 587 | void (*vco_calibration) (struct rt2x00_dev *rt2x00dev); |
dbba306f ID |
588 | |
589 | /* | |
590 | * Data queue handlers. | |
591 | */ | |
c965c74b | 592 | void (*watchdog) (struct rt2x00_dev *rt2x00dev); |
dbba306f ID |
593 | void (*start_queue) (struct data_queue *queue); |
594 | void (*kick_queue) (struct data_queue *queue); | |
595 | void (*stop_queue) (struct data_queue *queue); | |
152a5992 | 596 | void (*flush_queue) (struct data_queue *queue, bool drop); |
0e0d39e5 | 597 | void (*tx_dma_done) (struct queue_entry *entry); |
95ea3627 ID |
598 | |
599 | /* | |
600 | * TX control handlers | |
601 | */ | |
93331458 | 602 | void (*write_tx_desc) (struct queue_entry *entry, |
61486e0f | 603 | struct txentry_desc *txdesc); |
76dd5ddf GW |
604 | void (*write_tx_data) (struct queue_entry *entry, |
605 | struct txentry_desc *txdesc); | |
f224f4ef GW |
606 | void (*write_beacon) (struct queue_entry *entry, |
607 | struct txentry_desc *txdesc); | |
69cf36a4 | 608 | void (*clear_beacon) (struct queue_entry *entry); |
f1ca2167 | 609 | int (*get_tx_data_len) (struct queue_entry *entry); |
95ea3627 ID |
610 | |
611 | /* | |
612 | * RX control handlers | |
613 | */ | |
181d6902 ID |
614 | void (*fill_rxdone) (struct queue_entry *entry, |
615 | struct rxdone_entry_desc *rxdesc); | |
95ea3627 ID |
616 | |
617 | /* | |
618 | * Configuration handlers. | |
619 | */ | |
2bb057d0 ID |
620 | int (*config_shared_key) (struct rt2x00_dev *rt2x00dev, |
621 | struct rt2x00lib_crypto *crypto, | |
622 | struct ieee80211_key_conf *key); | |
623 | int (*config_pairwise_key) (struct rt2x00_dev *rt2x00dev, | |
624 | struct rt2x00lib_crypto *crypto, | |
625 | struct ieee80211_key_conf *key); | |
3a643d24 ID |
626 | void (*config_filter) (struct rt2x00_dev *rt2x00dev, |
627 | const unsigned int filter_flags); | |
6bb40dd1 ID |
628 | void (*config_intf) (struct rt2x00_dev *rt2x00dev, |
629 | struct rt2x00_intf *intf, | |
630 | struct rt2x00intf_conf *conf, | |
631 | const unsigned int flags); | |
632 | #define CONFIG_UPDATE_TYPE ( 1 << 1 ) | |
633 | #define CONFIG_UPDATE_MAC ( 1 << 2 ) | |
634 | #define CONFIG_UPDATE_BSSID ( 1 << 3 ) | |
635 | ||
3a643d24 | 636 | void (*config_erp) (struct rt2x00_dev *rt2x00dev, |
02044643 HS |
637 | struct rt2x00lib_erp *erp, |
638 | u32 changed); | |
e4ea1c40 ID |
639 | void (*config_ant) (struct rt2x00_dev *rt2x00dev, |
640 | struct antenna_setup *ant); | |
6bb40dd1 ID |
641 | void (*config) (struct rt2x00_dev *rt2x00dev, |
642 | struct rt2x00lib_conf *libconf, | |
e4ea1c40 | 643 | const unsigned int changed_flags); |
b4943d81 HS |
644 | int (*sta_add) (struct rt2x00_dev *rt2x00dev, |
645 | struct ieee80211_vif *vif, | |
646 | struct ieee80211_sta *sta); | |
647 | int (*sta_remove) (struct rt2x00_dev *rt2x00dev, | |
648 | int wcid); | |
95ea3627 ID |
649 | }; |
650 | ||
651 | /* | |
652 | * rt2x00 driver callback operation structure. | |
653 | */ | |
654 | struct rt2x00_ops { | |
655 | const char *name; | |
1ebbc485 | 656 | const unsigned int drv_data_size; |
6bb40dd1 ID |
657 | const unsigned int max_sta_intf; |
658 | const unsigned int max_ap_intf; | |
95ea3627 ID |
659 | const unsigned int eeprom_size; |
660 | const unsigned int rf_size; | |
61448f88 | 661 | const unsigned int tx_queues; |
e6218cc4 | 662 | const unsigned int extra_tx_headroom; |
181d6902 ID |
663 | const struct data_queue_desc *rx; |
664 | const struct data_queue_desc *tx; | |
665 | const struct data_queue_desc *bcn; | |
666 | const struct data_queue_desc *atim; | |
95ea3627 | 667 | const struct rt2x00lib_ops *lib; |
e796643e | 668 | const void *drv; |
95ea3627 ID |
669 | const struct ieee80211_ops *hw; |
670 | #ifdef CONFIG_RT2X00_LIB_DEBUGFS | |
671 | const struct rt2x00debug *debugfs; | |
672 | #endif /* CONFIG_RT2X00_LIB_DEBUGFS */ | |
673 | }; | |
674 | ||
483272f5 | 675 | /* |
7dab73b3 | 676 | * rt2x00 state flags |
483272f5 | 677 | */ |
7dab73b3 | 678 | enum rt2x00_state_flags { |
483272f5 | 679 | /* |
7dab73b3 | 680 | * Device flags |
483272f5 | 681 | */ |
0262ab0d ID |
682 | DEVICE_STATE_PRESENT, |
683 | DEVICE_STATE_REGISTERED_HW, | |
684 | DEVICE_STATE_INITIALIZED, | |
685 | DEVICE_STATE_STARTED, | |
0262ab0d | 686 | DEVICE_STATE_ENABLED_RADIO, |
d8147f9d | 687 | DEVICE_STATE_SCANNING, |
483272f5 | 688 | |
2bb057d0 ID |
689 | /* |
690 | * Driver configuration | |
691 | */ | |
35f00cfc | 692 | CONFIG_CHANNEL_HT40, |
1c0bcf89 | 693 | CONFIG_POWERSAVING, |
da40f407 | 694 | CONFIG_HT_DISABLED, |
e66a8ddf | 695 | CONFIG_QOS_DISABLED, |
f421111b SG |
696 | |
697 | /* | |
698 | * Mark we currently are sequentially reading TX_STA_FIFO register | |
699 | * FIXME: this is for only rt2800usb, should go to private data | |
700 | */ | |
701 | TX_STATUS_READING, | |
483272f5 ID |
702 | }; |
703 | ||
7dab73b3 ID |
704 | /* |
705 | * rt2x00 capability flags | |
706 | */ | |
707 | enum rt2x00_capability_flags { | |
708 | /* | |
709 | * Requirements | |
710 | */ | |
711 | REQUIRE_FIRMWARE, | |
712 | REQUIRE_BEACON_GUARD, | |
713 | REQUIRE_ATIM_QUEUE, | |
714 | REQUIRE_DMA, | |
715 | REQUIRE_COPY_IV, | |
716 | REQUIRE_L2PAD, | |
717 | REQUIRE_TXSTATUS_FIFO, | |
718 | REQUIRE_TASKLET_CONTEXT, | |
719 | REQUIRE_SW_SEQNO, | |
720 | REQUIRE_HT_TX_DESC, | |
1c0bcf89 | 721 | REQUIRE_PS_AUTOWAKE, |
7dab73b3 ID |
722 | |
723 | /* | |
724 | * Capabilities | |
725 | */ | |
726 | CAPABILITY_HW_BUTTON, | |
727 | CAPABILITY_HW_CRYPTO, | |
728 | CAPABILITY_POWER_LIMIT, | |
729 | CAPABILITY_CONTROL_FILTERS, | |
730 | CAPABILITY_CONTROL_FILTER_PSPOLL, | |
731 | CAPABILITY_PRE_TBTT_INTERRUPT, | |
732 | CAPABILITY_LINK_TUNING, | |
733 | CAPABILITY_FRAME_TYPE, | |
734 | CAPABILITY_RF_SEQUENCE, | |
735 | CAPABILITY_EXTERNAL_LNA_A, | |
736 | CAPABILITY_EXTERNAL_LNA_BG, | |
737 | CAPABILITY_DOUBLE_ANTENNA, | |
fdbc7b0a | 738 | CAPABILITY_BT_COEXIST, |
2e9c43dd | 739 | CAPABILITY_VCO_RECALIBRATION, |
7dab73b3 ID |
740 | }; |
741 | ||
95ea3627 ID |
742 | /* |
743 | * rt2x00 device structure. | |
744 | */ | |
745 | struct rt2x00_dev { | |
746 | /* | |
747 | * Device structure. | |
748 | * The structure stored in here depends on the | |
749 | * system bus (PCI or USB). | |
750 | * When accessing this variable, the rt2x00dev_{pci,usb} | |
49513481 | 751 | * macros should be used for correct typecasting. |
95ea3627 | 752 | */ |
14a3bf89 | 753 | struct device *dev; |
95ea3627 ID |
754 | |
755 | /* | |
756 | * Callback functions. | |
757 | */ | |
758 | const struct rt2x00_ops *ops; | |
759 | ||
1ebbc485 GW |
760 | /* |
761 | * Driver data. | |
762 | */ | |
763 | void *drv_data; | |
764 | ||
95ea3627 ID |
765 | /* |
766 | * IEEE80211 control structure. | |
767 | */ | |
768 | struct ieee80211_hw *hw; | |
8318d78a JB |
769 | struct ieee80211_supported_band bands[IEEE80211_NUM_BANDS]; |
770 | enum ieee80211_band curr_band; | |
e5ef5bad | 771 | int curr_freq; |
95ea3627 | 772 | |
95ea3627 ID |
773 | /* |
774 | * If enabled, the debugfs interface structures | |
775 | * required for deregistration of debugfs. | |
776 | */ | |
777 | #ifdef CONFIG_RT2X00_LIB_DEBUGFS | |
4d8dd66c | 778 | struct rt2x00debug_intf *debugfs_intf; |
95ea3627 ID |
779 | #endif /* CONFIG_RT2X00_LIB_DEBUGFS */ |
780 | ||
a9450b70 ID |
781 | /* |
782 | * LED structure for changing the LED status | |
783 | * by mac8011 or the kernel. | |
784 | */ | |
785 | #ifdef CONFIG_RT2X00_LIB_LEDS | |
a9450b70 ID |
786 | struct rt2x00_led led_radio; |
787 | struct rt2x00_led led_assoc; | |
788 | struct rt2x00_led led_qual; | |
789 | u16 led_mcu_reg; | |
790 | #endif /* CONFIG_RT2X00_LIB_LEDS */ | |
791 | ||
95ea3627 | 792 | /* |
7dab73b3 ID |
793 | * Device state flags. |
794 | * In these flags the current status is stored. | |
795 | * Access to these flags should occur atomically. | |
95ea3627 ID |
796 | */ |
797 | unsigned long flags; | |
95ea3627 | 798 | |
7dab73b3 ID |
799 | /* |
800 | * Device capabiltiy flags. | |
801 | * In these flags the device/driver capabilities are stored. | |
802 | * Access to these flags should occur non-atomically. | |
803 | */ | |
804 | unsigned long cap_flags; | |
805 | ||
440ddada ID |
806 | /* |
807 | * Device information, Bus IRQ and name (PCI, SoC) | |
808 | */ | |
809 | int irq; | |
810 | const char *name; | |
811 | ||
95ea3627 ID |
812 | /* |
813 | * Chipset identification. | |
814 | */ | |
815 | struct rt2x00_chip chip; | |
816 | ||
817 | /* | |
818 | * hw capability specifications. | |
819 | */ | |
820 | struct hw_mode_spec spec; | |
821 | ||
addc81bd ID |
822 | /* |
823 | * This is the default TX/RX antenna setup as indicated | |
6d64360a | 824 | * by the device's EEPROM. |
addc81bd ID |
825 | */ |
826 | struct antenna_setup default_ant; | |
827 | ||
95ea3627 ID |
828 | /* |
829 | * Register pointers | |
21795094 ID |
830 | * csr.base: CSR base register address. (PCI) |
831 | * csr.cache: CSR cache for usb_control_msg. (USB) | |
95ea3627 | 832 | */ |
21795094 ID |
833 | union csr { |
834 | void __iomem *base; | |
835 | void *cache; | |
836 | } csr; | |
95ea3627 | 837 | |
3d82346c | 838 | /* |
8ff48a8b ID |
839 | * Mutex to protect register accesses. |
840 | * For PCI and USB devices it protects against concurrent indirect | |
841 | * register access (BBP, RF, MCU) since accessing those | |
842 | * registers require multiple calls to the CSR registers. | |
843 | * For USB devices it also protects the csr_cache since that | |
844 | * field is used for normal CSR access and it cannot support | |
845 | * multiple callers simultaneously. | |
846 | */ | |
847 | struct mutex csr_mutex; | |
3d82346c | 848 | |
3c4f2085 ID |
849 | /* |
850 | * Current packet filter configuration for the device. | |
851 | * This contains all currently active FIF_* flags send | |
852 | * to us by mac80211 during configure_filter(). | |
853 | */ | |
854 | unsigned int packet_filter; | |
855 | ||
95ea3627 | 856 | /* |
6bb40dd1 ID |
857 | * Interface details: |
858 | * - Open ap interface count. | |
859 | * - Open sta interface count. | |
860 | * - Association count. | |
69cf36a4 | 861 | * - Beaconing enabled count. |
95ea3627 | 862 | */ |
6bb40dd1 ID |
863 | unsigned int intf_ap_count; |
864 | unsigned int intf_sta_count; | |
865 | unsigned int intf_associated; | |
69cf36a4 | 866 | unsigned int intf_beaconing; |
95ea3627 ID |
867 | |
868 | /* | |
869 | * Link quality | |
870 | */ | |
871 | struct link link; | |
872 | ||
873 | /* | |
874 | * EEPROM data. | |
875 | */ | |
876 | __le16 *eeprom; | |
877 | ||
878 | /* | |
879 | * Active RF register values. | |
880 | * These are stored here so we don't need | |
881 | * to read the rf registers and can directly | |
882 | * use this value instead. | |
883 | * This field should be accessed by using | |
884 | * rt2x00_rf_read() and rt2x00_rf_write(). | |
885 | */ | |
886 | u32 *rf; | |
887 | ||
ba2ab471 ID |
888 | /* |
889 | * LNA gain | |
890 | */ | |
891 | short lna_gain; | |
892 | ||
95ea3627 ID |
893 | /* |
894 | * Current TX power value. | |
895 | */ | |
896 | u16 tx_power; | |
897 | ||
42c82857 ID |
898 | /* |
899 | * Current retry values. | |
900 | */ | |
901 | u8 short_retry; | |
902 | u8 long_retry; | |
903 | ||
95ea3627 ID |
904 | /* |
905 | * Rssi <-> Dbm offset | |
906 | */ | |
907 | u8 rssi_offset; | |
908 | ||
909 | /* | |
bef453dc | 910 | * Frequency offset. |
95ea3627 ID |
911 | */ |
912 | u8 freq_offset; | |
913 | ||
1c0bcf89 ID |
914 | /* |
915 | * Association id. | |
916 | */ | |
917 | u16 aid; | |
918 | ||
6b347bff ID |
919 | /* |
920 | * Beacon interval. | |
921 | */ | |
922 | u16 beacon_int; | |
923 | ||
1c0bcf89 ID |
924 | /** |
925 | * Timestamp of last received beacon | |
926 | */ | |
927 | unsigned long last_beacon; | |
928 | ||
95ea3627 ID |
929 | /* |
930 | * Low level statistics which will have | |
931 | * to be kept up to date while device is running. | |
932 | */ | |
933 | struct ieee80211_low_level_stats low_level_stats; | |
934 | ||
0439f536 ID |
935 | /** |
936 | * Work queue for all work which should not be placed | |
937 | * on the mac80211 workqueue (because of dependencies | |
938 | * between various work structures). | |
939 | */ | |
940 | struct workqueue_struct *workqueue; | |
941 | ||
95ea3627 | 942 | /* |
4150c572 | 943 | * Scheduled work. |
8e260c22 ID |
944 | * NOTE: intf_work will use ieee80211_iterate_active_interfaces() |
945 | * which means it cannot be placed on the hw->workqueue | |
946 | * due to RTNL locking requirements. | |
95ea3627 | 947 | */ |
6bb40dd1 | 948 | struct work_struct intf_work; |
95ea3627 | 949 | |
7e613e16 ID |
950 | /** |
951 | * Scheduled work for TX/RX done handling (USB devices) | |
952 | */ | |
953 | struct work_struct rxdone_work; | |
954 | struct work_struct txdone_work; | |
955 | ||
1c0bcf89 ID |
956 | /* |
957 | * Powersaving work | |
958 | */ | |
959 | struct delayed_work autowakeup_work; | |
ed66ba47 | 960 | struct work_struct sleep_work; |
1c0bcf89 | 961 | |
95ea3627 | 962 | /* |
e74df4a7 | 963 | * Data queue arrays for RX, TX, Beacon and ATIM. |
95ea3627 | 964 | */ |
b869767b | 965 | unsigned int data_queues; |
181d6902 ID |
966 | struct data_queue *rx; |
967 | struct data_queue *tx; | |
968 | struct data_queue *bcn; | |
e74df4a7 | 969 | struct data_queue *atim; |
95ea3627 ID |
970 | |
971 | /* | |
972 | * Firmware image. | |
973 | */ | |
974 | const struct firmware *fw; | |
ee134fcc | 975 | |
96c3da7d HS |
976 | /* |
977 | * FIFO for storing tx status reports between isr and tasklet. | |
978 | */ | |
c4d63244 | 979 | DECLARE_KFIFO_PTR(txstatus_fifo, u32); |
96c3da7d | 980 | |
f0187a19 JS |
981 | /* |
982 | * Timer to ensure tx status reports are read (rt2800usb). | |
983 | */ | |
f421111b | 984 | struct hrtimer txstatus_timer; |
f0187a19 | 985 | |
96c3da7d HS |
986 | /* |
987 | * Tasklet for processing tx status reports (rt2800pci). | |
988 | */ | |
989 | struct tasklet_struct txstatus_tasklet; | |
c5c65761 HS |
990 | struct tasklet_struct pretbtt_tasklet; |
991 | struct tasklet_struct tbtt_tasklet; | |
992 | struct tasklet_struct rxdone_tasklet; | |
993 | struct tasklet_struct autowake_tasklet; | |
994 | ||
2e9c43dd JL |
995 | /* |
996 | * Used for VCO periodic calibration. | |
997 | */ | |
998 | int rf_channel; | |
999 | ||
c5c65761 HS |
1000 | /* |
1001 | * Protect the interrupt mask register. | |
1002 | */ | |
1003 | spinlock_t irqmask_lock; | |
95ea3627 ID |
1004 | }; |
1005 | ||
1f285f14 BZ |
1006 | /* |
1007 | * Register defines. | |
1008 | * Some registers require multiple attempts before success, | |
1009 | * in those cases REGISTER_BUSY_COUNT attempts should be | |
1010 | * taken with a REGISTER_BUSY_DELAY interval. | |
1011 | */ | |
ae4ecb9f | 1012 | #define REGISTER_BUSY_COUNT 100 |
1f285f14 BZ |
1013 | #define REGISTER_BUSY_DELAY 100 |
1014 | ||
95ea3627 ID |
1015 | /* |
1016 | * Generic RF access. | |
1017 | * The RF is being accessed by word index. | |
1018 | */ | |
0e14f6d3 | 1019 | static inline void rt2x00_rf_read(struct rt2x00_dev *rt2x00dev, |
95ea3627 ID |
1020 | const unsigned int word, u32 *data) |
1021 | { | |
6b26dead PR |
1022 | BUG_ON(word < 1 || word > rt2x00dev->ops->rf_size / sizeof(u32)); |
1023 | *data = rt2x00dev->rf[word - 1]; | |
95ea3627 ID |
1024 | } |
1025 | ||
0e14f6d3 | 1026 | static inline void rt2x00_rf_write(struct rt2x00_dev *rt2x00dev, |
95ea3627 ID |
1027 | const unsigned int word, u32 data) |
1028 | { | |
6b26dead PR |
1029 | BUG_ON(word < 1 || word > rt2x00dev->ops->rf_size / sizeof(u32)); |
1030 | rt2x00dev->rf[word - 1] = data; | |
95ea3627 ID |
1031 | } |
1032 | ||
1033 | /* | |
1034 | * Generic EEPROM access. | |
1035 | * The EEPROM is being accessed by word index. | |
1036 | */ | |
0e14f6d3 | 1037 | static inline void *rt2x00_eeprom_addr(struct rt2x00_dev *rt2x00dev, |
95ea3627 ID |
1038 | const unsigned int word) |
1039 | { | |
1040 | return (void *)&rt2x00dev->eeprom[word]; | |
1041 | } | |
1042 | ||
0e14f6d3 | 1043 | static inline void rt2x00_eeprom_read(struct rt2x00_dev *rt2x00dev, |
95ea3627 ID |
1044 | const unsigned int word, u16 *data) |
1045 | { | |
1046 | *data = le16_to_cpu(rt2x00dev->eeprom[word]); | |
1047 | } | |
1048 | ||
0e14f6d3 | 1049 | static inline void rt2x00_eeprom_write(struct rt2x00_dev *rt2x00dev, |
95ea3627 ID |
1050 | const unsigned int word, u16 data) |
1051 | { | |
1052 | rt2x00dev->eeprom[word] = cpu_to_le16(data); | |
1053 | } | |
1054 | ||
1055 | /* | |
1056 | * Chipset handlers | |
1057 | */ | |
1058 | static inline void rt2x00_set_chip(struct rt2x00_dev *rt2x00dev, | |
49e721ec | 1059 | const u16 rt, const u16 rf, const u16 rev) |
95ea3627 | 1060 | { |
95ea3627 ID |
1061 | rt2x00dev->chip.rt = rt; |
1062 | rt2x00dev->chip.rf = rf; | |
1063 | rt2x00dev->chip.rev = rev; | |
440ddada | 1064 | |
16475b09 | 1065 | INFO(rt2x00dev, |
49e721ec | 1066 | "Chipset detected - rt: %04x, rf: %04x, rev: %04x.\n", |
16475b09 GW |
1067 | rt2x00dev->chip.rt, rt2x00dev->chip.rf, rt2x00dev->chip.rev); |
1068 | } | |
1069 | ||
8d0c9b65 | 1070 | static inline bool rt2x00_rt(struct rt2x00_dev *rt2x00dev, const u16 rt) |
95ea3627 | 1071 | { |
5122d898 | 1072 | return (rt2x00dev->chip.rt == rt); |
95ea3627 ID |
1073 | } |
1074 | ||
8d0c9b65 | 1075 | static inline bool rt2x00_rf(struct rt2x00_dev *rt2x00dev, const u16 rf) |
95ea3627 | 1076 | { |
5122d898 | 1077 | return (rt2x00dev->chip.rf == rf); |
95ea3627 ID |
1078 | } |
1079 | ||
49e721ec | 1080 | static inline u16 rt2x00_rev(struct rt2x00_dev *rt2x00dev) |
95ea3627 | 1081 | { |
5122d898 | 1082 | return rt2x00dev->chip.rev; |
95ea3627 ID |
1083 | } |
1084 | ||
8d0c9b65 GW |
1085 | static inline bool rt2x00_rt_rev(struct rt2x00_dev *rt2x00dev, |
1086 | const u16 rt, const u16 rev) | |
1087 | { | |
1088 | return (rt2x00_rt(rt2x00dev, rt) && rt2x00_rev(rt2x00dev) == rev); | |
1089 | } | |
1090 | ||
1091 | static inline bool rt2x00_rt_rev_lt(struct rt2x00_dev *rt2x00dev, | |
1092 | const u16 rt, const u16 rev) | |
1093 | { | |
1094 | return (rt2x00_rt(rt2x00dev, rt) && rt2x00_rev(rt2x00dev) < rev); | |
1095 | } | |
1096 | ||
1097 | static inline bool rt2x00_rt_rev_gte(struct rt2x00_dev *rt2x00dev, | |
1098 | const u16 rt, const u16 rev) | |
1099 | { | |
1100 | return (rt2x00_rt(rt2x00dev, rt) && rt2x00_rev(rt2x00dev) >= rev); | |
1101 | } | |
1102 | ||
5822e070 BZ |
1103 | static inline void rt2x00_set_chip_intf(struct rt2x00_dev *rt2x00dev, |
1104 | enum rt2x00_chip_intf intf) | |
1105 | { | |
1106 | rt2x00dev->chip.intf = intf; | |
1107 | } | |
1108 | ||
5122d898 | 1109 | static inline bool rt2x00_intf(struct rt2x00_dev *rt2x00dev, |
5822e070 BZ |
1110 | enum rt2x00_chip_intf intf) |
1111 | { | |
5122d898 | 1112 | return (rt2x00dev->chip.intf == intf); |
5822e070 BZ |
1113 | } |
1114 | ||
cea90e55 | 1115 | static inline bool rt2x00_is_pci(struct rt2x00_dev *rt2x00dev) |
5822e070 | 1116 | { |
6e1fdd11 GW |
1117 | return rt2x00_intf(rt2x00dev, RT2X00_CHIP_INTF_PCI) || |
1118 | rt2x00_intf(rt2x00dev, RT2X00_CHIP_INTF_PCIE); | |
1119 | } | |
1120 | ||
1121 | static inline bool rt2x00_is_pcie(struct rt2x00_dev *rt2x00dev) | |
1122 | { | |
1123 | return rt2x00_intf(rt2x00dev, RT2X00_CHIP_INTF_PCIE); | |
5822e070 BZ |
1124 | } |
1125 | ||
cea90e55 | 1126 | static inline bool rt2x00_is_usb(struct rt2x00_dev *rt2x00dev) |
5822e070 | 1127 | { |
5122d898 | 1128 | return rt2x00_intf(rt2x00dev, RT2X00_CHIP_INTF_USB); |
5822e070 BZ |
1129 | } |
1130 | ||
cea90e55 GW |
1131 | static inline bool rt2x00_is_soc(struct rt2x00_dev *rt2x00dev) |
1132 | { | |
1133 | return rt2x00_intf(rt2x00dev, RT2X00_CHIP_INTF_SOC); | |
1134 | } | |
1135 | ||
239c249d | 1136 | /** |
c4da0048 | 1137 | * rt2x00queue_map_txskb - Map a skb into DMA for TX purposes. |
fa69560f | 1138 | * @entry: Pointer to &struct queue_entry |
239c249d | 1139 | */ |
fa69560f | 1140 | void rt2x00queue_map_txskb(struct queue_entry *entry); |
239c249d | 1141 | |
0b8004aa GW |
1142 | /** |
1143 | * rt2x00queue_unmap_skb - Unmap a skb from DMA. | |
fa69560f | 1144 | * @entry: Pointer to &struct queue_entry |
0b8004aa | 1145 | */ |
fa69560f | 1146 | void rt2x00queue_unmap_skb(struct queue_entry *entry); |
0b8004aa | 1147 | |
11f818e0 HS |
1148 | /** |
1149 | * rt2x00queue_get_tx_queue - Convert tx queue index to queue pointer | |
1150 | * @rt2x00dev: Pointer to &struct rt2x00_dev. | |
1151 | * @queue: rt2x00 queue index (see &enum data_queue_qid). | |
1152 | * | |
1153 | * Returns NULL for non tx queues. | |
1154 | */ | |
1155 | static inline struct data_queue * | |
1156 | rt2x00queue_get_tx_queue(struct rt2x00_dev *rt2x00dev, | |
1157 | const enum data_queue_qid queue) | |
1158 | { | |
1159 | if (queue < rt2x00dev->ops->tx_queues && rt2x00dev->tx) | |
1160 | return &rt2x00dev->tx[queue]; | |
1161 | ||
61c6e489 GW |
1162 | if (queue == QID_ATIM) |
1163 | return rt2x00dev->atim; | |
1164 | ||
11f818e0 HS |
1165 | return NULL; |
1166 | } | |
1167 | ||
181d6902 ID |
1168 | /** |
1169 | * rt2x00queue_get_entry - Get queue entry where the given index points to. | |
9a46d44e | 1170 | * @queue: Pointer to &struct data_queue from where we obtain the entry. |
181d6902 ID |
1171 | * @index: Index identifier for obtaining the correct index. |
1172 | */ | |
1173 | struct queue_entry *rt2x00queue_get_entry(struct data_queue *queue, | |
1174 | enum queue_index index); | |
1175 | ||
0b7fde54 ID |
1176 | /** |
1177 | * rt2x00queue_pause_queue - Pause a data queue | |
1178 | * @queue: Pointer to &struct data_queue. | |
1179 | * | |
1180 | * This function will pause the data queue locally, preventing | |
1181 | * new frames to be added to the queue (while the hardware is | |
1182 | * still allowed to run). | |
1183 | */ | |
1184 | void rt2x00queue_pause_queue(struct data_queue *queue); | |
1185 | ||
1186 | /** | |
1187 | * rt2x00queue_unpause_queue - unpause a data queue | |
1188 | * @queue: Pointer to &struct data_queue. | |
1189 | * | |
1190 | * This function will unpause the data queue locally, allowing | |
1191 | * new frames to be added to the queue again. | |
1192 | */ | |
1193 | void rt2x00queue_unpause_queue(struct data_queue *queue); | |
1194 | ||
1195 | /** | |
1196 | * rt2x00queue_start_queue - Start a data queue | |
1197 | * @queue: Pointer to &struct data_queue. | |
1198 | * | |
1199 | * This function will start handling all pending frames in the queue. | |
1200 | */ | |
1201 | void rt2x00queue_start_queue(struct data_queue *queue); | |
1202 | ||
1203 | /** | |
1204 | * rt2x00queue_stop_queue - Halt a data queue | |
1205 | * @queue: Pointer to &struct data_queue. | |
1206 | * | |
1207 | * This function will stop all pending frames in the queue. | |
1208 | */ | |
1209 | void rt2x00queue_stop_queue(struct data_queue *queue); | |
1210 | ||
5be65609 ID |
1211 | /** |
1212 | * rt2x00queue_flush_queue - Flush a data queue | |
1213 | * @queue: Pointer to &struct data_queue. | |
1214 | * @drop: True to drop all pending frames. | |
1215 | * | |
1216 | * This function will flush the queue. After this call | |
25985edc | 1217 | * the queue is guaranteed to be empty. |
5be65609 ID |
1218 | */ |
1219 | void rt2x00queue_flush_queue(struct data_queue *queue, bool drop); | |
1220 | ||
0b7fde54 ID |
1221 | /** |
1222 | * rt2x00queue_start_queues - Start all data queues | |
1223 | * @rt2x00dev: Pointer to &struct rt2x00_dev. | |
1224 | * | |
1225 | * This function will loop through all available queues to start them | |
1226 | */ | |
1227 | void rt2x00queue_start_queues(struct rt2x00_dev *rt2x00dev); | |
1228 | ||
1229 | /** | |
1230 | * rt2x00queue_stop_queues - Halt all data queues | |
1231 | * @rt2x00dev: Pointer to &struct rt2x00_dev. | |
1232 | * | |
1233 | * This function will loop through all available queues to stop | |
1234 | * any pending frames. | |
1235 | */ | |
1236 | void rt2x00queue_stop_queues(struct rt2x00_dev *rt2x00dev); | |
1237 | ||
5be65609 ID |
1238 | /** |
1239 | * rt2x00queue_flush_queues - Flush all data queues | |
1240 | * @rt2x00dev: Pointer to &struct rt2x00_dev. | |
1241 | * @drop: True to drop all pending frames. | |
1242 | * | |
1243 | * This function will loop through all available queues to flush | |
1244 | * any pending frames. | |
1245 | */ | |
1246 | void rt2x00queue_flush_queues(struct rt2x00_dev *rt2x00dev, bool drop); | |
1247 | ||
b4df4708 GW |
1248 | /* |
1249 | * Debugfs handlers. | |
1250 | */ | |
1251 | /** | |
1252 | * rt2x00debug_dump_frame - Dump a frame to userspace through debugfs. | |
1253 | * @rt2x00dev: Pointer to &struct rt2x00_dev. | |
1254 | * @type: The type of frame that is being dumped. | |
1255 | * @skb: The skb containing the frame to be dumped. | |
1256 | */ | |
1257 | #ifdef CONFIG_RT2X00_LIB_DEBUGFS | |
1258 | void rt2x00debug_dump_frame(struct rt2x00_dev *rt2x00dev, | |
1259 | enum rt2x00_dump_type type, struct sk_buff *skb); | |
1260 | #else | |
1261 | static inline void rt2x00debug_dump_frame(struct rt2x00_dev *rt2x00dev, | |
1262 | enum rt2x00_dump_type type, | |
1263 | struct sk_buff *skb) | |
1264 | { | |
1265 | } | |
1266 | #endif /* CONFIG_RT2X00_LIB_DEBUGFS */ | |
1267 | ||
18325523 HS |
1268 | /* |
1269 | * Utility functions. | |
1270 | */ | |
1271 | u32 rt2x00lib_get_bssidx(struct rt2x00_dev *rt2x00dev, | |
1272 | struct ieee80211_vif *vif); | |
1273 | ||
95ea3627 ID |
1274 | /* |
1275 | * Interrupt context handlers. | |
1276 | */ | |
1277 | void rt2x00lib_beacondone(struct rt2x00_dev *rt2x00dev); | |
9f926fb5 | 1278 | void rt2x00lib_pretbtt(struct rt2x00_dev *rt2x00dev); |
64e7d723 | 1279 | void rt2x00lib_dmastart(struct queue_entry *entry); |
652a9dd2 | 1280 | void rt2x00lib_dmadone(struct queue_entry *entry); |
181d6902 ID |
1281 | void rt2x00lib_txdone(struct queue_entry *entry, |
1282 | struct txdone_entry_desc *txdesc); | |
3392bece | 1283 | void rt2x00lib_txdone_noinfo(struct queue_entry *entry, u32 status); |
88211021 | 1284 | void rt2x00lib_rxdone(struct queue_entry *entry, gfp_t gfp); |
95ea3627 | 1285 | |
95ea3627 ID |
1286 | /* |
1287 | * mac80211 handlers. | |
1288 | */ | |
7bb45683 | 1289 | void rt2x00mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb); |
95ea3627 ID |
1290 | int rt2x00mac_start(struct ieee80211_hw *hw); |
1291 | void rt2x00mac_stop(struct ieee80211_hw *hw); | |
1292 | int rt2x00mac_add_interface(struct ieee80211_hw *hw, | |
1ed32e4f | 1293 | struct ieee80211_vif *vif); |
95ea3627 | 1294 | void rt2x00mac_remove_interface(struct ieee80211_hw *hw, |
1ed32e4f | 1295 | struct ieee80211_vif *vif); |
e8975581 | 1296 | int rt2x00mac_config(struct ieee80211_hw *hw, u32 changed); |
3a643d24 ID |
1297 | void rt2x00mac_configure_filter(struct ieee80211_hw *hw, |
1298 | unsigned int changed_flags, | |
1299 | unsigned int *total_flags, | |
3ac64bee | 1300 | u64 multicast); |
930c06f2 SS |
1301 | int rt2x00mac_set_tim(struct ieee80211_hw *hw, struct ieee80211_sta *sta, |
1302 | bool set); | |
2bb057d0 ID |
1303 | #ifdef CONFIG_RT2X00_LIB_CRYPTO |
1304 | int rt2x00mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd, | |
dc822b5d | 1305 | struct ieee80211_vif *vif, struct ieee80211_sta *sta, |
2bb057d0 ID |
1306 | struct ieee80211_key_conf *key); |
1307 | #else | |
1308 | #define rt2x00mac_set_key NULL | |
1309 | #endif /* CONFIG_RT2X00_LIB_CRYPTO */ | |
b4943d81 HS |
1310 | int rt2x00mac_sta_add(struct ieee80211_hw *hw, struct ieee80211_vif *vif, |
1311 | struct ieee80211_sta *sta); | |
1312 | int rt2x00mac_sta_remove(struct ieee80211_hw *hw, struct ieee80211_vif *vif, | |
1313 | struct ieee80211_sta *sta); | |
d8147f9d ID |
1314 | void rt2x00mac_sw_scan_start(struct ieee80211_hw *hw); |
1315 | void rt2x00mac_sw_scan_complete(struct ieee80211_hw *hw); | |
95ea3627 ID |
1316 | int rt2x00mac_get_stats(struct ieee80211_hw *hw, |
1317 | struct ieee80211_low_level_stats *stats); | |
471b3efd JB |
1318 | void rt2x00mac_bss_info_changed(struct ieee80211_hw *hw, |
1319 | struct ieee80211_vif *vif, | |
1320 | struct ieee80211_bss_conf *bss_conf, | |
1321 | u32 changes); | |
8a3a3c85 EP |
1322 | int rt2x00mac_conf_tx(struct ieee80211_hw *hw, |
1323 | struct ieee80211_vif *vif, u16 queue, | |
95ea3627 | 1324 | const struct ieee80211_tx_queue_params *params); |
e47a5cdd | 1325 | void rt2x00mac_rfkill_poll(struct ieee80211_hw *hw); |
f44df18c | 1326 | void rt2x00mac_flush(struct ieee80211_hw *hw, bool drop); |
0ed7b3c0 ID |
1327 | int rt2x00mac_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant); |
1328 | int rt2x00mac_get_antenna(struct ieee80211_hw *hw, u32 *tx_ant, u32 *rx_ant); | |
e7dee444 ID |
1329 | void rt2x00mac_get_ringparam(struct ieee80211_hw *hw, |
1330 | u32 *tx, u32 *tx_max, u32 *rx, u32 *rx_max); | |
5f0dd296 | 1331 | bool rt2x00mac_tx_frames_pending(struct ieee80211_hw *hw); |
95ea3627 ID |
1332 | |
1333 | /* | |
1334 | * Driver allocation handlers. | |
1335 | */ | |
1336 | int rt2x00lib_probe_dev(struct rt2x00_dev *rt2x00dev); | |
1337 | void rt2x00lib_remove_dev(struct rt2x00_dev *rt2x00dev); | |
1338 | #ifdef CONFIG_PM | |
1339 | int rt2x00lib_suspend(struct rt2x00_dev *rt2x00dev, pm_message_t state); | |
1340 | int rt2x00lib_resume(struct rt2x00_dev *rt2x00dev); | |
1341 | #endif /* CONFIG_PM */ | |
1342 | ||
1343 | #endif /* RT2X00_H */ |