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95ea3627 | 1 | /* |
7e613e16 ID |
2 | Copyright (C) 2010 Willow Garage <http://www.willowgarage.com> |
3 | Copyright (C) 2004 - 2010 Ivo van Doorn <IvDoorn@gmail.com> | |
9c9a0d14 | 4 | Copyright (C) 2004 - 2009 Gertjan van Wingerde <gwingerde@gmail.com> |
95ea3627 ID |
5 | <http://rt2x00.serialmonkey.com> |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2 of the License, or | |
10 | (at your option) any later version. | |
11 | ||
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with this program; if not, write to the | |
19 | Free Software Foundation, Inc., | |
20 | 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. | |
21 | */ | |
22 | ||
23 | /* | |
24 | Module: rt2x00 | |
25 | Abstract: rt2x00 global information. | |
26 | */ | |
27 | ||
28 | #ifndef RT2X00_H | |
29 | #define RT2X00_H | |
30 | ||
31 | #include <linux/bitops.h> | |
95ea3627 ID |
32 | #include <linux/skbuff.h> |
33 | #include <linux/workqueue.h> | |
34 | #include <linux/firmware.h> | |
a9450b70 | 35 | #include <linux/leds.h> |
3d82346c | 36 | #include <linux/mutex.h> |
61af43c5 | 37 | #include <linux/etherdevice.h> |
cca3e998 | 38 | #include <linux/input-polldev.h> |
96c3da7d | 39 | #include <linux/kfifo.h> |
f0187a19 | 40 | #include <linux/timer.h> |
95ea3627 ID |
41 | |
42 | #include <net/mac80211.h> | |
43 | ||
44 | #include "rt2x00debug.h" | |
b4df4708 | 45 | #include "rt2x00dump.h" |
a9450b70 | 46 | #include "rt2x00leds.h" |
95ea3627 | 47 | #include "rt2x00reg.h" |
181d6902 | 48 | #include "rt2x00queue.h" |
95ea3627 ID |
49 | |
50 | /* | |
51 | * Module information. | |
95ea3627 | 52 | */ |
754be309 | 53 | #define DRV_VERSION "2.3.0" |
95ea3627 ID |
54 | #define DRV_PROJECT "http://rt2x00.serialmonkey.com" |
55 | ||
56 | /* | |
57 | * Debug definitions. | |
58 | * Debug output has to be enabled during compile time. | |
59 | */ | |
60 | #define DEBUG_PRINTK_MSG(__dev, __kernlvl, __lvl, __msg, __args...) \ | |
61 | printk(__kernlvl "%s -> %s: %s - " __msg, \ | |
c94c93da | 62 | wiphy_name((__dev)->hw->wiphy), __func__, __lvl, ##__args) |
95ea3627 ID |
63 | |
64 | #define DEBUG_PRINTK_PROBE(__kernlvl, __lvl, __msg, __args...) \ | |
65 | printk(__kernlvl "%s -> %s: %s - " __msg, \ | |
c94c93da | 66 | KBUILD_MODNAME, __func__, __lvl, ##__args) |
95ea3627 ID |
67 | |
68 | #ifdef CONFIG_RT2X00_DEBUG | |
69 | #define DEBUG_PRINTK(__dev, __kernlvl, __lvl, __msg, __args...) \ | |
e85b4c04 | 70 | DEBUG_PRINTK_MSG(__dev, __kernlvl, __lvl, __msg, ##__args) |
95ea3627 ID |
71 | #else |
72 | #define DEBUG_PRINTK(__dev, __kernlvl, __lvl, __msg, __args...) \ | |
73 | do { } while (0) | |
74 | #endif /* CONFIG_RT2X00_DEBUG */ | |
75 | ||
76 | /* | |
77 | * Various debug levels. | |
78 | * The debug levels PANIC and ERROR both indicate serious problems, | |
79 | * for this reason they should never be ignored. | |
80 | * The special ERROR_PROBE message is for messages that are generated | |
81 | * when the rt2x00_dev is not yet initialized. | |
82 | */ | |
83 | #define PANIC(__dev, __msg, __args...) \ | |
84 | DEBUG_PRINTK_MSG(__dev, KERN_CRIT, "Panic", __msg, ##__args) | |
85 | #define ERROR(__dev, __msg, __args...) \ | |
86 | DEBUG_PRINTK_MSG(__dev, KERN_ERR, "Error", __msg, ##__args) | |
87 | #define ERROR_PROBE(__msg, __args...) \ | |
88 | DEBUG_PRINTK_PROBE(KERN_ERR, "Error", __msg, ##__args) | |
89 | #define WARNING(__dev, __msg, __args...) \ | |
90 | DEBUG_PRINTK(__dev, KERN_WARNING, "Warning", __msg, ##__args) | |
91 | #define NOTICE(__dev, __msg, __args...) \ | |
92 | DEBUG_PRINTK(__dev, KERN_NOTICE, "Notice", __msg, ##__args) | |
93 | #define INFO(__dev, __msg, __args...) \ | |
94 | DEBUG_PRINTK(__dev, KERN_INFO, "Info", __msg, ##__args) | |
95 | #define DEBUG(__dev, __msg, __args...) \ | |
96 | DEBUG_PRINTK(__dev, KERN_DEBUG, "Debug", __msg, ##__args) | |
97 | #define EEPROM(__dev, __msg, __args...) \ | |
98 | DEBUG_PRINTK(__dev, KERN_DEBUG, "EEPROM recovery", __msg, ##__args) | |
99 | ||
bad13639 ID |
100 | /* |
101 | * Duration calculations | |
102 | * The rate variable passed is: 100kbs. | |
103 | * To convert from bytes to bits we multiply size with 8, | |
104 | * then the size is multiplied with 10 to make the | |
105 | * real rate -> rate argument correction. | |
106 | */ | |
107 | #define GET_DURATION(__size, __rate) (((__size) * 8 * 10) / (__rate)) | |
108 | #define GET_DURATION_RES(__size, __rate)(((__size) * 8 * 10) % (__rate)) | |
109 | ||
77e73d18 GW |
110 | /* |
111 | * Determine the number of L2 padding bytes required between the header and | |
112 | * the payload. | |
113 | */ | |
114 | #define L2PAD_SIZE(__hdrlen) (-(__hdrlen) & 3) | |
115 | ||
9f166171 ID |
116 | /* |
117 | * Determine the alignment requirement, | |
118 | * to make sure the 802.11 payload is padded to a 4-byte boundrary | |
119 | * we must determine the address of the payload and calculate the | |
120 | * amount of bytes needed to move the data. | |
121 | */ | |
122 | #define ALIGN_SIZE(__skb, __header) \ | |
123 | ( ((unsigned long)((__skb)->data + (__header))) & 3 ) | |
124 | ||
7a4a77b7 GW |
125 | /* |
126 | * Constants for extra TX headroom for alignment purposes. | |
127 | */ | |
128 | #define RT2X00_ALIGN_SIZE 4 /* Only whole frame needs alignment */ | |
129 | #define RT2X00_L2PAD_SIZE 8 /* Both header & payload need alignment */ | |
130 | ||
95ea3627 ID |
131 | /* |
132 | * Standard timing and size defines. | |
133 | * These values should follow the ieee80211 specifications. | |
134 | */ | |
135 | #define ACK_SIZE 14 | |
136 | #define IEEE80211_HEADER 24 | |
137 | #define PLCP 48 | |
138 | #define BEACON 100 | |
139 | #define PREAMBLE 144 | |
140 | #define SHORT_PREAMBLE 72 | |
141 | #define SLOT_TIME 20 | |
142 | #define SHORT_SLOT_TIME 9 | |
143 | #define SIFS 10 | |
144 | #define PIFS ( SIFS + SLOT_TIME ) | |
145 | #define SHORT_PIFS ( SIFS + SHORT_SLOT_TIME ) | |
146 | #define DIFS ( PIFS + SLOT_TIME ) | |
147 | #define SHORT_DIFS ( SHORT_PIFS + SHORT_SLOT_TIME ) | |
f2fdbc48 | 148 | #define EIFS ( SIFS + DIFS + \ |
bad13639 | 149 | GET_DURATION(IEEE80211_HEADER + ACK_SIZE, 10) ) |
f2fdbc48 | 150 | #define SHORT_EIFS ( SIFS + SHORT_DIFS + \ |
bad13639 | 151 | GET_DURATION(IEEE80211_HEADER + ACK_SIZE, 10) ) |
95ea3627 | 152 | |
66679a65 LE |
153 | /* |
154 | * Structure for average calculation | |
155 | * The avg field contains the actual average value, | |
156 | * but avg_weight is internally used during calculations | |
157 | * to prevent rounding errors. | |
158 | */ | |
159 | struct avg_val { | |
160 | int avg; | |
161 | int avg_weight; | |
162 | }; | |
163 | ||
5822e070 BZ |
164 | enum rt2x00_chip_intf { |
165 | RT2X00_CHIP_INTF_PCI, | |
6e1fdd11 | 166 | RT2X00_CHIP_INTF_PCIE, |
5822e070 | 167 | RT2X00_CHIP_INTF_USB, |
cea90e55 | 168 | RT2X00_CHIP_INTF_SOC, |
5822e070 BZ |
169 | }; |
170 | ||
95ea3627 ID |
171 | /* |
172 | * Chipset identification | |
173 | * The chipset on the device is composed of a RT and RF chip. | |
174 | * The chipset combination is important for determining device capabilities. | |
175 | */ | |
176 | struct rt2x00_chip { | |
177 | u16 rt; | |
49e721ec GW |
178 | #define RT2460 0x2460 |
179 | #define RT2560 0x2560 | |
180 | #define RT2570 0x2570 | |
181 | #define RT2661 0x2661 | |
182 | #define RT2573 0x2573 | |
5ed8f458 | 183 | #define RT2860 0x2860 /* 2.4GHz */ |
e148b4c8 | 184 | #define RT2872 0x2872 /* WSOC */ |
49e721ec | 185 | #define RT2883 0x2883 /* WSOC */ |
49e721ec GW |
186 | #define RT3070 0x3070 |
187 | #define RT3071 0x3071 | |
a9b3a9f7 | 188 | #define RT3090 0x3090 /* 2.4GHz PCIe */ |
49e721ec GW |
189 | #define RT3390 0x3390 |
190 | #define RT3572 0x3572 | |
e148b4c8 GW |
191 | #define RT3593 0x3593 /* PCIe */ |
192 | #define RT3883 0x3883 /* WSOC */ | |
60687ba7 | 193 | #define RT5390 0x5390 /* 2.4GHz */ |
95ea3627 ID |
194 | |
195 | u16 rf; | |
49e721ec | 196 | u16 rev; |
5822e070 BZ |
197 | |
198 | enum rt2x00_chip_intf intf; | |
95ea3627 ID |
199 | }; |
200 | ||
201 | /* | |
202 | * RF register values that belong to a particular channel. | |
203 | */ | |
204 | struct rf_channel { | |
205 | int channel; | |
206 | u32 rf1; | |
207 | u32 rf2; | |
208 | u32 rf3; | |
209 | u32 rf4; | |
210 | }; | |
211 | ||
8c5e7a5f ID |
212 | /* |
213 | * Channel information structure | |
214 | */ | |
215 | struct channel_info { | |
216 | unsigned int flags; | |
217 | #define GEOGRAPHY_ALLOWED 0x00000001 | |
218 | ||
8d1331b3 ID |
219 | short max_power; |
220 | short default_power1; | |
221 | short default_power2; | |
8c5e7a5f ID |
222 | }; |
223 | ||
addc81bd ID |
224 | /* |
225 | * Antenna setup values. | |
226 | */ | |
227 | struct antenna_setup { | |
228 | enum antenna rx; | |
229 | enum antenna tx; | |
d96aa640 RJH |
230 | u8 rx_chain_num; |
231 | u8 tx_chain_num; | |
addc81bd ID |
232 | }; |
233 | ||
95ea3627 | 234 | /* |
ebcf26da | 235 | * Quality statistics about the currently active link. |
95ea3627 | 236 | */ |
ebcf26da | 237 | struct link_qual { |
95ea3627 | 238 | /* |
5352ff65 ID |
239 | * Statistics required for Link tuning by driver |
240 | * The rssi value is provided by rt2x00lib during the | |
241 | * link_tuner() callback function. | |
242 | * The false_cca field is filled during the link_stats() | |
243 | * callback function and could be used during the | |
244 | * link_tuner() callback function. | |
95ea3627 | 245 | */ |
5352ff65 | 246 | int rssi; |
95ea3627 ID |
247 | int false_cca; |
248 | ||
249 | /* | |
5352ff65 ID |
250 | * VGC levels |
251 | * Hardware driver will tune the VGC level during each call | |
252 | * to the link_tuner() callback function. This vgc_level is | |
253 | * is determined based on the link quality statistics like | |
254 | * average RSSI and the false CCA count. | |
95ea3627 | 255 | * |
5352ff65 ID |
256 | * In some cases the drivers need to differentiate between |
257 | * the currently "desired" VGC level and the level configured | |
258 | * in the hardware. The latter is important to reduce the | |
259 | * number of BBP register reads to reduce register access | |
260 | * overhead. For this reason we store both values here. | |
261 | */ | |
262 | u8 vgc_level; | |
263 | u8 vgc_level_reg; | |
264 | ||
265 | /* | |
266 | * Statistics required for Signal quality calculation. | |
267 | * These fields might be changed during the link_stats() | |
268 | * callback function. | |
95ea3627 | 269 | */ |
95ea3627 ID |
270 | int rx_success; |
271 | int rx_failed; | |
95ea3627 ID |
272 | int tx_success; |
273 | int tx_failed; | |
ebcf26da ID |
274 | }; |
275 | ||
69f81a2c ID |
276 | /* |
277 | * Antenna settings about the currently active link. | |
278 | */ | |
279 | struct link_ant { | |
280 | /* | |
281 | * Antenna flags | |
282 | */ | |
283 | unsigned int flags; | |
284 | #define ANTENNA_RX_DIVERSITY 0x00000001 | |
285 | #define ANTENNA_TX_DIVERSITY 0x00000002 | |
286 | #define ANTENNA_MODE_SAMPLE 0x00000004 | |
287 | ||
288 | /* | |
289 | * Currently active TX/RX antenna setup. | |
290 | * When software diversity is used, this will indicate | |
291 | * which antenna is actually used at this time. | |
292 | */ | |
293 | struct antenna_setup active; | |
294 | ||
295 | /* | |
193df183 LE |
296 | * RSSI history information for the antenna. |
297 | * Used to determine when to switch antenna | |
298 | * when using software diversity. | |
69f81a2c | 299 | */ |
193df183 | 300 | int rssi_history; |
69f81a2c ID |
301 | |
302 | /* | |
303 | * Current RSSI average of the currently active antenna. | |
304 | * Similar to the avg_rssi in the link_qual structure | |
305 | * this value is updated by using the walking average. | |
306 | */ | |
66679a65 | 307 | struct avg_val rssi_ant; |
69f81a2c ID |
308 | }; |
309 | ||
ebcf26da ID |
310 | /* |
311 | * To optimize the quality of the link we need to store | |
312 | * the quality of received frames and periodically | |
313 | * optimize the link. | |
314 | */ | |
315 | struct link { | |
316 | /* | |
317 | * Link tuner counter | |
318 | * The number of times the link has been tuned | |
319 | * since the radio has been switched on. | |
320 | */ | |
321 | u32 count; | |
322 | ||
323 | /* | |
324 | * Quality measurement values. | |
325 | */ | |
326 | struct link_qual qual; | |
327 | ||
addc81bd | 328 | /* |
69f81a2c | 329 | * TX/RX antenna setup. |
addc81bd | 330 | */ |
69f81a2c | 331 | struct link_ant ant; |
addc81bd | 332 | |
ebcf26da | 333 | /* |
5352ff65 | 334 | * Currently active average RSSI value |
ebcf26da | 335 | */ |
66679a65 | 336 | struct avg_val avg_rssi; |
eb20b4e8 | 337 | |
95ea3627 ID |
338 | /* |
339 | * Work structure for scheduling periodic link tuning. | |
340 | */ | |
341 | struct delayed_work work; | |
c965c74b ID |
342 | |
343 | /* | |
344 | * Work structure for scheduling periodic watchdog monitoring. | |
cdfd2c5c ID |
345 | * This work must be scheduled on the kernel workqueue, while |
346 | * all other work structures must be queued on the mac80211 | |
347 | * workqueue. This guarantees that the watchdog can schedule | |
348 | * other work structures and wait for their completion in order | |
349 | * to bring the device/driver back into the desired state. | |
c965c74b ID |
350 | */ |
351 | struct delayed_work watchdog_work; | |
9e33a355 HS |
352 | |
353 | /* | |
354 | * Work structure for scheduling periodic AGC adjustments. | |
355 | */ | |
356 | struct delayed_work agc_work; | |
95ea3627 ID |
357 | }; |
358 | ||
bfe6a15d HS |
359 | enum rt2x00_delayed_flags { |
360 | DELAYED_UPDATE_BEACON, | |
361 | }; | |
362 | ||
95ea3627 ID |
363 | /* |
364 | * Interface structure | |
6bb40dd1 ID |
365 | * Per interface configuration details, this structure |
366 | * is allocated as the private data for ieee80211_vif. | |
95ea3627 | 367 | */ |
6bb40dd1 | 368 | struct rt2x00_intf { |
17512dc3 IP |
369 | /* |
370 | * beacon->skb must be protected with the mutex. | |
371 | */ | |
372 | struct mutex beacon_skb_mutex; | |
373 | ||
6bb40dd1 ID |
374 | /* |
375 | * Entry in the beacon queue which belongs to | |
376 | * this interface. Each interface has its own | |
377 | * dedicated beacon entry. | |
378 | */ | |
379 | struct queue_entry *beacon; | |
69cf36a4 | 380 | bool enable_beacon; |
95ea3627 | 381 | |
6bb40dd1 ID |
382 | /* |
383 | * Actions that needed rescheduling. | |
384 | */ | |
bfe6a15d | 385 | unsigned long delayed_flags; |
f591fa5d | 386 | |
d4764b29 ID |
387 | /* |
388 | * Software sequence counter, this is only required | |
389 | * for hardware which doesn't support hardware | |
390 | * sequence counting. | |
391 | */ | |
392 | spinlock_t seqlock; | |
f591fa5d | 393 | u16 seqno; |
6bb40dd1 ID |
394 | }; |
395 | ||
396 | static inline struct rt2x00_intf* vif_to_intf(struct ieee80211_vif *vif) | |
95ea3627 | 397 | { |
6bb40dd1 | 398 | return (struct rt2x00_intf *)vif->drv_priv; |
95ea3627 ID |
399 | } |
400 | ||
31562e80 ID |
401 | /** |
402 | * struct hw_mode_spec: Hardware specifications structure | |
403 | * | |
95ea3627 ID |
404 | * Details about the supported modes, rates and channels |
405 | * of a particular chipset. This is used by rt2x00lib | |
406 | * to build the ieee80211_hw_mode array for mac80211. | |
31562e80 ID |
407 | * |
408 | * @supported_bands: Bitmask contained the supported bands (2.4GHz, 5.2GHz). | |
409 | * @supported_rates: Rate types which are supported (CCK, OFDM). | |
410 | * @num_channels: Number of supported channels. This is used as array size | |
411 | * for @tx_power_a, @tx_power_bg and @channels. | |
9a46d44e | 412 | * @channels: Device/chipset specific channel values (See &struct rf_channel). |
8c5e7a5f | 413 | * @channels_info: Additional information for channels (See &struct channel_info). |
35f00cfc | 414 | * @ht: Driver HT Capabilities (See &ieee80211_sta_ht_cap). |
95ea3627 ID |
415 | */ |
416 | struct hw_mode_spec { | |
31562e80 ID |
417 | unsigned int supported_bands; |
418 | #define SUPPORT_BAND_2GHZ 0x00000001 | |
419 | #define SUPPORT_BAND_5GHZ 0x00000002 | |
420 | ||
421 | unsigned int supported_rates; | |
422 | #define SUPPORT_RATE_CCK 0x00000001 | |
423 | #define SUPPORT_RATE_OFDM 0x00000002 | |
424 | ||
425 | unsigned int num_channels; | |
426 | const struct rf_channel *channels; | |
8c5e7a5f | 427 | const struct channel_info *channels_info; |
35f00cfc ID |
428 | |
429 | struct ieee80211_sta_ht_cap ht; | |
95ea3627 ID |
430 | }; |
431 | ||
5c58ee51 ID |
432 | /* |
433 | * Configuration structure wrapper around the | |
434 | * mac80211 configuration structure. | |
435 | * When mac80211 configures the driver, rt2x00lib | |
436 | * can precalculate values which are equal for all | |
437 | * rt2x00 drivers. Those values can be stored in here. | |
438 | */ | |
439 | struct rt2x00lib_conf { | |
440 | struct ieee80211_conf *conf; | |
8c5e7a5f | 441 | |
5c58ee51 | 442 | struct rf_channel rf; |
8c5e7a5f | 443 | struct channel_info channel; |
5c58ee51 ID |
444 | }; |
445 | ||
72810379 ID |
446 | /* |
447 | * Configuration structure for erp settings. | |
448 | */ | |
449 | struct rt2x00lib_erp { | |
450 | int short_preamble; | |
e360c4cb | 451 | int cts_protection; |
72810379 | 452 | |
881d948c | 453 | u32 basic_rates; |
e4ea1c40 ID |
454 | |
455 | int slot_time; | |
456 | ||
457 | short sifs; | |
458 | short pifs; | |
459 | short difs; | |
460 | short eifs; | |
8a566afe ID |
461 | |
462 | u16 beacon_int; | |
87c1915d | 463 | u16 ht_opmode; |
72810379 ID |
464 | }; |
465 | ||
2bb057d0 ID |
466 | /* |
467 | * Configuration structure for hardware encryption. | |
468 | */ | |
469 | struct rt2x00lib_crypto { | |
470 | enum cipher cipher; | |
471 | ||
472 | enum set_key_cmd cmd; | |
473 | const u8 *address; | |
474 | ||
475 | u32 bssidx; | |
2bb057d0 ID |
476 | |
477 | u8 key[16]; | |
478 | u8 tx_mic[8]; | |
479 | u8 rx_mic[8]; | |
480 | }; | |
481 | ||
6bb40dd1 ID |
482 | /* |
483 | * Configuration structure wrapper around the | |
484 | * rt2x00 interface configuration handler. | |
485 | */ | |
486 | struct rt2x00intf_conf { | |
487 | /* | |
488 | * Interface type | |
489 | */ | |
05c914fe | 490 | enum nl80211_iftype type; |
6bb40dd1 ID |
491 | |
492 | /* | |
493 | * TSF sync value, this is dependant on the operation type. | |
494 | */ | |
495 | enum tsf_sync sync; | |
496 | ||
497 | /* | |
498 | * The MAC and BSSID addressess are simple array of bytes, | |
499 | * these arrays are little endian, so when sending the addressess | |
500 | * to the drivers, copy the it into a endian-signed variable. | |
501 | * | |
502 | * Note that all devices (except rt2500usb) have 32 bits | |
503 | * register word sizes. This means that whatever variable we | |
504 | * pass _must_ be a multiple of 32 bits. Otherwise the device | |
505 | * might not accept what we are sending to it. | |
506 | * This will also make it easier for the driver to write | |
507 | * the data to the device. | |
508 | */ | |
509 | __le32 mac[2]; | |
510 | __le32 bssid[2]; | |
511 | }; | |
512 | ||
95ea3627 ID |
513 | /* |
514 | * rt2x00lib callback functions. | |
515 | */ | |
516 | struct rt2x00lib_ops { | |
517 | /* | |
518 | * Interrupt handlers. | |
519 | */ | |
520 | irq_handler_t irq_handler; | |
521 | ||
96c3da7d HS |
522 | /* |
523 | * TX status tasklet handler. | |
524 | */ | |
525 | void (*txstatus_tasklet) (unsigned long data); | |
c5c65761 HS |
526 | void (*pretbtt_tasklet) (unsigned long data); |
527 | void (*tbtt_tasklet) (unsigned long data); | |
528 | void (*rxdone_tasklet) (unsigned long data); | |
529 | void (*autowake_tasklet) (unsigned long data); | |
96c3da7d | 530 | |
95ea3627 ID |
531 | /* |
532 | * Device init handlers. | |
533 | */ | |
534 | int (*probe_hw) (struct rt2x00_dev *rt2x00dev); | |
535 | char *(*get_firmware_name) (struct rt2x00_dev *rt2x00dev); | |
0cbe0064 ID |
536 | int (*check_firmware) (struct rt2x00_dev *rt2x00dev, |
537 | const u8 *data, const size_t len); | |
538 | int (*load_firmware) (struct rt2x00_dev *rt2x00dev, | |
539 | const u8 *data, const size_t len); | |
95ea3627 ID |
540 | |
541 | /* | |
542 | * Device initialization/deinitialization handlers. | |
543 | */ | |
544 | int (*initialize) (struct rt2x00_dev *rt2x00dev); | |
545 | void (*uninitialize) (struct rt2x00_dev *rt2x00dev); | |
546 | ||
837e7f24 | 547 | /* |
181d6902 | 548 | * queue initialization handlers |
837e7f24 | 549 | */ |
798b7adb ID |
550 | bool (*get_entry_state) (struct queue_entry *entry); |
551 | void (*clear_entry) (struct queue_entry *entry); | |
837e7f24 | 552 | |
95ea3627 ID |
553 | /* |
554 | * Radio control handlers. | |
555 | */ | |
556 | int (*set_device_state) (struct rt2x00_dev *rt2x00dev, | |
557 | enum dev_state state); | |
558 | int (*rfkill_poll) (struct rt2x00_dev *rt2x00dev); | |
ebcf26da ID |
559 | void (*link_stats) (struct rt2x00_dev *rt2x00dev, |
560 | struct link_qual *qual); | |
5352ff65 ID |
561 | void (*reset_tuner) (struct rt2x00_dev *rt2x00dev, |
562 | struct link_qual *qual); | |
563 | void (*link_tuner) (struct rt2x00_dev *rt2x00dev, | |
564 | struct link_qual *qual, const u32 count); | |
9e33a355 | 565 | void (*gain_calibration) (struct rt2x00_dev *rt2x00dev); |
dbba306f ID |
566 | |
567 | /* | |
568 | * Data queue handlers. | |
569 | */ | |
c965c74b | 570 | void (*watchdog) (struct rt2x00_dev *rt2x00dev); |
dbba306f ID |
571 | void (*start_queue) (struct data_queue *queue); |
572 | void (*kick_queue) (struct data_queue *queue); | |
573 | void (*stop_queue) (struct data_queue *queue); | |
152a5992 | 574 | void (*flush_queue) (struct data_queue *queue, bool drop); |
0e0d39e5 | 575 | void (*tx_dma_done) (struct queue_entry *entry); |
95ea3627 ID |
576 | |
577 | /* | |
578 | * TX control handlers | |
579 | */ | |
93331458 | 580 | void (*write_tx_desc) (struct queue_entry *entry, |
61486e0f | 581 | struct txentry_desc *txdesc); |
76dd5ddf GW |
582 | void (*write_tx_data) (struct queue_entry *entry, |
583 | struct txentry_desc *txdesc); | |
f224f4ef GW |
584 | void (*write_beacon) (struct queue_entry *entry, |
585 | struct txentry_desc *txdesc); | |
69cf36a4 | 586 | void (*clear_beacon) (struct queue_entry *entry); |
f1ca2167 | 587 | int (*get_tx_data_len) (struct queue_entry *entry); |
95ea3627 ID |
588 | |
589 | /* | |
590 | * RX control handlers | |
591 | */ | |
181d6902 ID |
592 | void (*fill_rxdone) (struct queue_entry *entry, |
593 | struct rxdone_entry_desc *rxdesc); | |
95ea3627 ID |
594 | |
595 | /* | |
596 | * Configuration handlers. | |
597 | */ | |
2bb057d0 ID |
598 | int (*config_shared_key) (struct rt2x00_dev *rt2x00dev, |
599 | struct rt2x00lib_crypto *crypto, | |
600 | struct ieee80211_key_conf *key); | |
601 | int (*config_pairwise_key) (struct rt2x00_dev *rt2x00dev, | |
602 | struct rt2x00lib_crypto *crypto, | |
603 | struct ieee80211_key_conf *key); | |
3a643d24 ID |
604 | void (*config_filter) (struct rt2x00_dev *rt2x00dev, |
605 | const unsigned int filter_flags); | |
6bb40dd1 ID |
606 | void (*config_intf) (struct rt2x00_dev *rt2x00dev, |
607 | struct rt2x00_intf *intf, | |
608 | struct rt2x00intf_conf *conf, | |
609 | const unsigned int flags); | |
610 | #define CONFIG_UPDATE_TYPE ( 1 << 1 ) | |
611 | #define CONFIG_UPDATE_MAC ( 1 << 2 ) | |
612 | #define CONFIG_UPDATE_BSSID ( 1 << 3 ) | |
613 | ||
3a643d24 | 614 | void (*config_erp) (struct rt2x00_dev *rt2x00dev, |
02044643 HS |
615 | struct rt2x00lib_erp *erp, |
616 | u32 changed); | |
e4ea1c40 ID |
617 | void (*config_ant) (struct rt2x00_dev *rt2x00dev, |
618 | struct antenna_setup *ant); | |
6bb40dd1 ID |
619 | void (*config) (struct rt2x00_dev *rt2x00dev, |
620 | struct rt2x00lib_conf *libconf, | |
e4ea1c40 | 621 | const unsigned int changed_flags); |
95ea3627 ID |
622 | }; |
623 | ||
624 | /* | |
625 | * rt2x00 driver callback operation structure. | |
626 | */ | |
627 | struct rt2x00_ops { | |
628 | const char *name; | |
6bb40dd1 ID |
629 | const unsigned int max_sta_intf; |
630 | const unsigned int max_ap_intf; | |
95ea3627 ID |
631 | const unsigned int eeprom_size; |
632 | const unsigned int rf_size; | |
61448f88 | 633 | const unsigned int tx_queues; |
e6218cc4 | 634 | const unsigned int extra_tx_headroom; |
181d6902 ID |
635 | const struct data_queue_desc *rx; |
636 | const struct data_queue_desc *tx; | |
637 | const struct data_queue_desc *bcn; | |
638 | const struct data_queue_desc *atim; | |
95ea3627 | 639 | const struct rt2x00lib_ops *lib; |
e796643e | 640 | const void *drv; |
95ea3627 ID |
641 | const struct ieee80211_ops *hw; |
642 | #ifdef CONFIG_RT2X00_LIB_DEBUGFS | |
643 | const struct rt2x00debug *debugfs; | |
644 | #endif /* CONFIG_RT2X00_LIB_DEBUGFS */ | |
645 | }; | |
646 | ||
483272f5 | 647 | /* |
7dab73b3 | 648 | * rt2x00 state flags |
483272f5 | 649 | */ |
7dab73b3 | 650 | enum rt2x00_state_flags { |
483272f5 | 651 | /* |
7dab73b3 | 652 | * Device flags |
483272f5 | 653 | */ |
0262ab0d ID |
654 | DEVICE_STATE_PRESENT, |
655 | DEVICE_STATE_REGISTERED_HW, | |
656 | DEVICE_STATE_INITIALIZED, | |
657 | DEVICE_STATE_STARTED, | |
0262ab0d | 658 | DEVICE_STATE_ENABLED_RADIO, |
d8147f9d | 659 | DEVICE_STATE_SCANNING, |
483272f5 | 660 | |
2bb057d0 ID |
661 | /* |
662 | * Driver configuration | |
663 | */ | |
35f00cfc | 664 | CONFIG_CHANNEL_HT40, |
483272f5 ID |
665 | }; |
666 | ||
7dab73b3 ID |
667 | /* |
668 | * rt2x00 capability flags | |
669 | */ | |
670 | enum rt2x00_capability_flags { | |
671 | /* | |
672 | * Requirements | |
673 | */ | |
674 | REQUIRE_FIRMWARE, | |
675 | REQUIRE_BEACON_GUARD, | |
676 | REQUIRE_ATIM_QUEUE, | |
677 | REQUIRE_DMA, | |
678 | REQUIRE_COPY_IV, | |
679 | REQUIRE_L2PAD, | |
680 | REQUIRE_TXSTATUS_FIFO, | |
681 | REQUIRE_TASKLET_CONTEXT, | |
682 | REQUIRE_SW_SEQNO, | |
683 | REQUIRE_HT_TX_DESC, | |
684 | ||
685 | /* | |
686 | * Capabilities | |
687 | */ | |
688 | CAPABILITY_HW_BUTTON, | |
689 | CAPABILITY_HW_CRYPTO, | |
690 | CAPABILITY_POWER_LIMIT, | |
691 | CAPABILITY_CONTROL_FILTERS, | |
692 | CAPABILITY_CONTROL_FILTER_PSPOLL, | |
693 | CAPABILITY_PRE_TBTT_INTERRUPT, | |
694 | CAPABILITY_LINK_TUNING, | |
695 | CAPABILITY_FRAME_TYPE, | |
696 | CAPABILITY_RF_SEQUENCE, | |
697 | CAPABILITY_EXTERNAL_LNA_A, | |
698 | CAPABILITY_EXTERNAL_LNA_BG, | |
699 | CAPABILITY_DOUBLE_ANTENNA, | |
700 | }; | |
701 | ||
95ea3627 ID |
702 | /* |
703 | * rt2x00 device structure. | |
704 | */ | |
705 | struct rt2x00_dev { | |
706 | /* | |
707 | * Device structure. | |
708 | * The structure stored in here depends on the | |
709 | * system bus (PCI or USB). | |
710 | * When accessing this variable, the rt2x00dev_{pci,usb} | |
49513481 | 711 | * macros should be used for correct typecasting. |
95ea3627 | 712 | */ |
14a3bf89 | 713 | struct device *dev; |
95ea3627 ID |
714 | |
715 | /* | |
716 | * Callback functions. | |
717 | */ | |
718 | const struct rt2x00_ops *ops; | |
719 | ||
720 | /* | |
721 | * IEEE80211 control structure. | |
722 | */ | |
723 | struct ieee80211_hw *hw; | |
8318d78a JB |
724 | struct ieee80211_supported_band bands[IEEE80211_NUM_BANDS]; |
725 | enum ieee80211_band curr_band; | |
e5ef5bad | 726 | int curr_freq; |
95ea3627 | 727 | |
95ea3627 ID |
728 | /* |
729 | * If enabled, the debugfs interface structures | |
730 | * required for deregistration of debugfs. | |
731 | */ | |
732 | #ifdef CONFIG_RT2X00_LIB_DEBUGFS | |
4d8dd66c | 733 | struct rt2x00debug_intf *debugfs_intf; |
95ea3627 ID |
734 | #endif /* CONFIG_RT2X00_LIB_DEBUGFS */ |
735 | ||
a9450b70 ID |
736 | /* |
737 | * LED structure for changing the LED status | |
738 | * by mac8011 or the kernel. | |
739 | */ | |
740 | #ifdef CONFIG_RT2X00_LIB_LEDS | |
a9450b70 ID |
741 | struct rt2x00_led led_radio; |
742 | struct rt2x00_led led_assoc; | |
743 | struct rt2x00_led led_qual; | |
744 | u16 led_mcu_reg; | |
745 | #endif /* CONFIG_RT2X00_LIB_LEDS */ | |
746 | ||
95ea3627 | 747 | /* |
7dab73b3 ID |
748 | * Device state flags. |
749 | * In these flags the current status is stored. | |
750 | * Access to these flags should occur atomically. | |
95ea3627 ID |
751 | */ |
752 | unsigned long flags; | |
95ea3627 | 753 | |
7dab73b3 ID |
754 | /* |
755 | * Device capabiltiy flags. | |
756 | * In these flags the device/driver capabilities are stored. | |
757 | * Access to these flags should occur non-atomically. | |
758 | */ | |
759 | unsigned long cap_flags; | |
760 | ||
440ddada ID |
761 | /* |
762 | * Device information, Bus IRQ and name (PCI, SoC) | |
763 | */ | |
764 | int irq; | |
765 | const char *name; | |
766 | ||
95ea3627 ID |
767 | /* |
768 | * Chipset identification. | |
769 | */ | |
770 | struct rt2x00_chip chip; | |
771 | ||
772 | /* | |
773 | * hw capability specifications. | |
774 | */ | |
775 | struct hw_mode_spec spec; | |
776 | ||
addc81bd ID |
777 | /* |
778 | * This is the default TX/RX antenna setup as indicated | |
6d64360a | 779 | * by the device's EEPROM. |
addc81bd ID |
780 | */ |
781 | struct antenna_setup default_ant; | |
782 | ||
95ea3627 ID |
783 | /* |
784 | * Register pointers | |
21795094 ID |
785 | * csr.base: CSR base register address. (PCI) |
786 | * csr.cache: CSR cache for usb_control_msg. (USB) | |
95ea3627 | 787 | */ |
21795094 ID |
788 | union csr { |
789 | void __iomem *base; | |
790 | void *cache; | |
791 | } csr; | |
95ea3627 | 792 | |
3d82346c | 793 | /* |
8ff48a8b ID |
794 | * Mutex to protect register accesses. |
795 | * For PCI and USB devices it protects against concurrent indirect | |
796 | * register access (BBP, RF, MCU) since accessing those | |
797 | * registers require multiple calls to the CSR registers. | |
798 | * For USB devices it also protects the csr_cache since that | |
799 | * field is used for normal CSR access and it cannot support | |
800 | * multiple callers simultaneously. | |
801 | */ | |
802 | struct mutex csr_mutex; | |
3d82346c | 803 | |
3c4f2085 ID |
804 | /* |
805 | * Current packet filter configuration for the device. | |
806 | * This contains all currently active FIF_* flags send | |
807 | * to us by mac80211 during configure_filter(). | |
808 | */ | |
809 | unsigned int packet_filter; | |
810 | ||
95ea3627 | 811 | /* |
6bb40dd1 ID |
812 | * Interface details: |
813 | * - Open ap interface count. | |
814 | * - Open sta interface count. | |
815 | * - Association count. | |
69cf36a4 | 816 | * - Beaconing enabled count. |
95ea3627 | 817 | */ |
6bb40dd1 ID |
818 | unsigned int intf_ap_count; |
819 | unsigned int intf_sta_count; | |
820 | unsigned int intf_associated; | |
69cf36a4 | 821 | unsigned int intf_beaconing; |
95ea3627 ID |
822 | |
823 | /* | |
824 | * Link quality | |
825 | */ | |
826 | struct link link; | |
827 | ||
828 | /* | |
829 | * EEPROM data. | |
830 | */ | |
831 | __le16 *eeprom; | |
832 | ||
833 | /* | |
834 | * Active RF register values. | |
835 | * These are stored here so we don't need | |
836 | * to read the rf registers and can directly | |
837 | * use this value instead. | |
838 | * This field should be accessed by using | |
839 | * rt2x00_rf_read() and rt2x00_rf_write(). | |
840 | */ | |
841 | u32 *rf; | |
842 | ||
ba2ab471 ID |
843 | /* |
844 | * LNA gain | |
845 | */ | |
846 | short lna_gain; | |
847 | ||
95ea3627 ID |
848 | /* |
849 | * Current TX power value. | |
850 | */ | |
851 | u16 tx_power; | |
852 | ||
42c82857 ID |
853 | /* |
854 | * Current retry values. | |
855 | */ | |
856 | u8 short_retry; | |
857 | u8 long_retry; | |
858 | ||
95ea3627 ID |
859 | /* |
860 | * Rssi <-> Dbm offset | |
861 | */ | |
862 | u8 rssi_offset; | |
863 | ||
864 | /* | |
865 | * Frequency offset (for rt61pci & rt73usb). | |
866 | */ | |
867 | u8 freq_offset; | |
868 | ||
35f00cfc ID |
869 | /* |
870 | * Calibration information (for rt2800usb & rt2800pci). | |
871 | * [0] -> BW20 | |
872 | * [1] -> BW40 | |
873 | */ | |
874 | u8 calibration[2]; | |
875 | ||
6b347bff ID |
876 | /* |
877 | * Beacon interval. | |
878 | */ | |
879 | u16 beacon_int; | |
880 | ||
95ea3627 ID |
881 | /* |
882 | * Low level statistics which will have | |
883 | * to be kept up to date while device is running. | |
884 | */ | |
885 | struct ieee80211_low_level_stats low_level_stats; | |
886 | ||
0439f536 ID |
887 | /** |
888 | * Work queue for all work which should not be placed | |
889 | * on the mac80211 workqueue (because of dependencies | |
890 | * between various work structures). | |
891 | */ | |
892 | struct workqueue_struct *workqueue; | |
893 | ||
95ea3627 | 894 | /* |
4150c572 | 895 | * Scheduled work. |
8e260c22 ID |
896 | * NOTE: intf_work will use ieee80211_iterate_active_interfaces() |
897 | * which means it cannot be placed on the hw->workqueue | |
898 | * due to RTNL locking requirements. | |
95ea3627 | 899 | */ |
6bb40dd1 | 900 | struct work_struct intf_work; |
95ea3627 | 901 | |
7e613e16 ID |
902 | /** |
903 | * Scheduled work for TX/RX done handling (USB devices) | |
904 | */ | |
905 | struct work_struct rxdone_work; | |
906 | struct work_struct txdone_work; | |
907 | ||
95ea3627 | 908 | /* |
e74df4a7 | 909 | * Data queue arrays for RX, TX, Beacon and ATIM. |
95ea3627 | 910 | */ |
b869767b | 911 | unsigned int data_queues; |
181d6902 ID |
912 | struct data_queue *rx; |
913 | struct data_queue *tx; | |
914 | struct data_queue *bcn; | |
e74df4a7 | 915 | struct data_queue *atim; |
95ea3627 ID |
916 | |
917 | /* | |
918 | * Firmware image. | |
919 | */ | |
920 | const struct firmware *fw; | |
ee134fcc | 921 | |
96c3da7d HS |
922 | /* |
923 | * FIFO for storing tx status reports between isr and tasklet. | |
924 | */ | |
c4d63244 | 925 | DECLARE_KFIFO_PTR(txstatus_fifo, u32); |
96c3da7d | 926 | |
f0187a19 JS |
927 | /* |
928 | * Timer to ensure tx status reports are read (rt2800usb). | |
929 | */ | |
930 | struct timer_list txstatus_timer; | |
931 | ||
96c3da7d HS |
932 | /* |
933 | * Tasklet for processing tx status reports (rt2800pci). | |
934 | */ | |
935 | struct tasklet_struct txstatus_tasklet; | |
c5c65761 HS |
936 | struct tasklet_struct pretbtt_tasklet; |
937 | struct tasklet_struct tbtt_tasklet; | |
938 | struct tasklet_struct rxdone_tasklet; | |
939 | struct tasklet_struct autowake_tasklet; | |
940 | ||
941 | /* | |
942 | * Protect the interrupt mask register. | |
943 | */ | |
944 | spinlock_t irqmask_lock; | |
95ea3627 ID |
945 | }; |
946 | ||
1f285f14 BZ |
947 | /* |
948 | * Register defines. | |
949 | * Some registers require multiple attempts before success, | |
950 | * in those cases REGISTER_BUSY_COUNT attempts should be | |
951 | * taken with a REGISTER_BUSY_DELAY interval. | |
952 | */ | |
ae4ecb9f | 953 | #define REGISTER_BUSY_COUNT 100 |
1f285f14 BZ |
954 | #define REGISTER_BUSY_DELAY 100 |
955 | ||
95ea3627 ID |
956 | /* |
957 | * Generic RF access. | |
958 | * The RF is being accessed by word index. | |
959 | */ | |
0e14f6d3 | 960 | static inline void rt2x00_rf_read(struct rt2x00_dev *rt2x00dev, |
95ea3627 ID |
961 | const unsigned int word, u32 *data) |
962 | { | |
6b26dead PR |
963 | BUG_ON(word < 1 || word > rt2x00dev->ops->rf_size / sizeof(u32)); |
964 | *data = rt2x00dev->rf[word - 1]; | |
95ea3627 ID |
965 | } |
966 | ||
0e14f6d3 | 967 | static inline void rt2x00_rf_write(struct rt2x00_dev *rt2x00dev, |
95ea3627 ID |
968 | const unsigned int word, u32 data) |
969 | { | |
6b26dead PR |
970 | BUG_ON(word < 1 || word > rt2x00dev->ops->rf_size / sizeof(u32)); |
971 | rt2x00dev->rf[word - 1] = data; | |
95ea3627 ID |
972 | } |
973 | ||
974 | /* | |
975 | * Generic EEPROM access. | |
976 | * The EEPROM is being accessed by word index. | |
977 | */ | |
0e14f6d3 | 978 | static inline void *rt2x00_eeprom_addr(struct rt2x00_dev *rt2x00dev, |
95ea3627 ID |
979 | const unsigned int word) |
980 | { | |
981 | return (void *)&rt2x00dev->eeprom[word]; | |
982 | } | |
983 | ||
0e14f6d3 | 984 | static inline void rt2x00_eeprom_read(struct rt2x00_dev *rt2x00dev, |
95ea3627 ID |
985 | const unsigned int word, u16 *data) |
986 | { | |
987 | *data = le16_to_cpu(rt2x00dev->eeprom[word]); | |
988 | } | |
989 | ||
0e14f6d3 | 990 | static inline void rt2x00_eeprom_write(struct rt2x00_dev *rt2x00dev, |
95ea3627 ID |
991 | const unsigned int word, u16 data) |
992 | { | |
993 | rt2x00dev->eeprom[word] = cpu_to_le16(data); | |
994 | } | |
995 | ||
996 | /* | |
997 | * Chipset handlers | |
998 | */ | |
999 | static inline void rt2x00_set_chip(struct rt2x00_dev *rt2x00dev, | |
49e721ec | 1000 | const u16 rt, const u16 rf, const u16 rev) |
95ea3627 | 1001 | { |
95ea3627 ID |
1002 | rt2x00dev->chip.rt = rt; |
1003 | rt2x00dev->chip.rf = rf; | |
1004 | rt2x00dev->chip.rev = rev; | |
440ddada | 1005 | |
16475b09 | 1006 | INFO(rt2x00dev, |
49e721ec | 1007 | "Chipset detected - rt: %04x, rf: %04x, rev: %04x.\n", |
16475b09 GW |
1008 | rt2x00dev->chip.rt, rt2x00dev->chip.rf, rt2x00dev->chip.rev); |
1009 | } | |
1010 | ||
8d0c9b65 | 1011 | static inline bool rt2x00_rt(struct rt2x00_dev *rt2x00dev, const u16 rt) |
95ea3627 | 1012 | { |
5122d898 | 1013 | return (rt2x00dev->chip.rt == rt); |
95ea3627 ID |
1014 | } |
1015 | ||
8d0c9b65 | 1016 | static inline bool rt2x00_rf(struct rt2x00_dev *rt2x00dev, const u16 rf) |
95ea3627 | 1017 | { |
5122d898 | 1018 | return (rt2x00dev->chip.rf == rf); |
95ea3627 ID |
1019 | } |
1020 | ||
49e721ec | 1021 | static inline u16 rt2x00_rev(struct rt2x00_dev *rt2x00dev) |
95ea3627 | 1022 | { |
5122d898 | 1023 | return rt2x00dev->chip.rev; |
95ea3627 ID |
1024 | } |
1025 | ||
8d0c9b65 GW |
1026 | static inline bool rt2x00_rt_rev(struct rt2x00_dev *rt2x00dev, |
1027 | const u16 rt, const u16 rev) | |
1028 | { | |
1029 | return (rt2x00_rt(rt2x00dev, rt) && rt2x00_rev(rt2x00dev) == rev); | |
1030 | } | |
1031 | ||
1032 | static inline bool rt2x00_rt_rev_lt(struct rt2x00_dev *rt2x00dev, | |
1033 | const u16 rt, const u16 rev) | |
1034 | { | |
1035 | return (rt2x00_rt(rt2x00dev, rt) && rt2x00_rev(rt2x00dev) < rev); | |
1036 | } | |
1037 | ||
1038 | static inline bool rt2x00_rt_rev_gte(struct rt2x00_dev *rt2x00dev, | |
1039 | const u16 rt, const u16 rev) | |
1040 | { | |
1041 | return (rt2x00_rt(rt2x00dev, rt) && rt2x00_rev(rt2x00dev) >= rev); | |
1042 | } | |
1043 | ||
5822e070 BZ |
1044 | static inline void rt2x00_set_chip_intf(struct rt2x00_dev *rt2x00dev, |
1045 | enum rt2x00_chip_intf intf) | |
1046 | { | |
1047 | rt2x00dev->chip.intf = intf; | |
1048 | } | |
1049 | ||
5122d898 | 1050 | static inline bool rt2x00_intf(struct rt2x00_dev *rt2x00dev, |
5822e070 BZ |
1051 | enum rt2x00_chip_intf intf) |
1052 | { | |
5122d898 | 1053 | return (rt2x00dev->chip.intf == intf); |
5822e070 BZ |
1054 | } |
1055 | ||
cea90e55 | 1056 | static inline bool rt2x00_is_pci(struct rt2x00_dev *rt2x00dev) |
5822e070 | 1057 | { |
6e1fdd11 GW |
1058 | return rt2x00_intf(rt2x00dev, RT2X00_CHIP_INTF_PCI) || |
1059 | rt2x00_intf(rt2x00dev, RT2X00_CHIP_INTF_PCIE); | |
1060 | } | |
1061 | ||
1062 | static inline bool rt2x00_is_pcie(struct rt2x00_dev *rt2x00dev) | |
1063 | { | |
1064 | return rt2x00_intf(rt2x00dev, RT2X00_CHIP_INTF_PCIE); | |
5822e070 BZ |
1065 | } |
1066 | ||
cea90e55 | 1067 | static inline bool rt2x00_is_usb(struct rt2x00_dev *rt2x00dev) |
5822e070 | 1068 | { |
5122d898 | 1069 | return rt2x00_intf(rt2x00dev, RT2X00_CHIP_INTF_USB); |
5822e070 BZ |
1070 | } |
1071 | ||
cea90e55 GW |
1072 | static inline bool rt2x00_is_soc(struct rt2x00_dev *rt2x00dev) |
1073 | { | |
1074 | return rt2x00_intf(rt2x00dev, RT2X00_CHIP_INTF_SOC); | |
1075 | } | |
1076 | ||
239c249d | 1077 | /** |
c4da0048 | 1078 | * rt2x00queue_map_txskb - Map a skb into DMA for TX purposes. |
fa69560f | 1079 | * @entry: Pointer to &struct queue_entry |
239c249d | 1080 | */ |
fa69560f | 1081 | void rt2x00queue_map_txskb(struct queue_entry *entry); |
239c249d | 1082 | |
0b8004aa GW |
1083 | /** |
1084 | * rt2x00queue_unmap_skb - Unmap a skb from DMA. | |
fa69560f | 1085 | * @entry: Pointer to &struct queue_entry |
0b8004aa | 1086 | */ |
fa69560f | 1087 | void rt2x00queue_unmap_skb(struct queue_entry *entry); |
0b8004aa | 1088 | |
11f818e0 HS |
1089 | /** |
1090 | * rt2x00queue_get_tx_queue - Convert tx queue index to queue pointer | |
1091 | * @rt2x00dev: Pointer to &struct rt2x00_dev. | |
1092 | * @queue: rt2x00 queue index (see &enum data_queue_qid). | |
1093 | * | |
1094 | * Returns NULL for non tx queues. | |
1095 | */ | |
1096 | static inline struct data_queue * | |
1097 | rt2x00queue_get_tx_queue(struct rt2x00_dev *rt2x00dev, | |
1098 | const enum data_queue_qid queue) | |
1099 | { | |
1100 | if (queue < rt2x00dev->ops->tx_queues && rt2x00dev->tx) | |
1101 | return &rt2x00dev->tx[queue]; | |
1102 | ||
61c6e489 GW |
1103 | if (queue == QID_ATIM) |
1104 | return rt2x00dev->atim; | |
1105 | ||
11f818e0 HS |
1106 | return NULL; |
1107 | } | |
1108 | ||
181d6902 ID |
1109 | /** |
1110 | * rt2x00queue_get_entry - Get queue entry where the given index points to. | |
9a46d44e | 1111 | * @queue: Pointer to &struct data_queue from where we obtain the entry. |
181d6902 ID |
1112 | * @index: Index identifier for obtaining the correct index. |
1113 | */ | |
1114 | struct queue_entry *rt2x00queue_get_entry(struct data_queue *queue, | |
1115 | enum queue_index index); | |
1116 | ||
0b7fde54 ID |
1117 | /** |
1118 | * rt2x00queue_pause_queue - Pause a data queue | |
1119 | * @queue: Pointer to &struct data_queue. | |
1120 | * | |
1121 | * This function will pause the data queue locally, preventing | |
1122 | * new frames to be added to the queue (while the hardware is | |
1123 | * still allowed to run). | |
1124 | */ | |
1125 | void rt2x00queue_pause_queue(struct data_queue *queue); | |
1126 | ||
1127 | /** | |
1128 | * rt2x00queue_unpause_queue - unpause a data queue | |
1129 | * @queue: Pointer to &struct data_queue. | |
1130 | * | |
1131 | * This function will unpause the data queue locally, allowing | |
1132 | * new frames to be added to the queue again. | |
1133 | */ | |
1134 | void rt2x00queue_unpause_queue(struct data_queue *queue); | |
1135 | ||
1136 | /** | |
1137 | * rt2x00queue_start_queue - Start a data queue | |
1138 | * @queue: Pointer to &struct data_queue. | |
1139 | * | |
1140 | * This function will start handling all pending frames in the queue. | |
1141 | */ | |
1142 | void rt2x00queue_start_queue(struct data_queue *queue); | |
1143 | ||
1144 | /** | |
1145 | * rt2x00queue_stop_queue - Halt a data queue | |
1146 | * @queue: Pointer to &struct data_queue. | |
1147 | * | |
1148 | * This function will stop all pending frames in the queue. | |
1149 | */ | |
1150 | void rt2x00queue_stop_queue(struct data_queue *queue); | |
1151 | ||
5be65609 ID |
1152 | /** |
1153 | * rt2x00queue_flush_queue - Flush a data queue | |
1154 | * @queue: Pointer to &struct data_queue. | |
1155 | * @drop: True to drop all pending frames. | |
1156 | * | |
1157 | * This function will flush the queue. After this call | |
1158 | * the queue is guarenteed to be empty. | |
1159 | */ | |
1160 | void rt2x00queue_flush_queue(struct data_queue *queue, bool drop); | |
1161 | ||
0b7fde54 ID |
1162 | /** |
1163 | * rt2x00queue_start_queues - Start all data queues | |
1164 | * @rt2x00dev: Pointer to &struct rt2x00_dev. | |
1165 | * | |
1166 | * This function will loop through all available queues to start them | |
1167 | */ | |
1168 | void rt2x00queue_start_queues(struct rt2x00_dev *rt2x00dev); | |
1169 | ||
1170 | /** | |
1171 | * rt2x00queue_stop_queues - Halt all data queues | |
1172 | * @rt2x00dev: Pointer to &struct rt2x00_dev. | |
1173 | * | |
1174 | * This function will loop through all available queues to stop | |
1175 | * any pending frames. | |
1176 | */ | |
1177 | void rt2x00queue_stop_queues(struct rt2x00_dev *rt2x00dev); | |
1178 | ||
5be65609 ID |
1179 | /** |
1180 | * rt2x00queue_flush_queues - Flush all data queues | |
1181 | * @rt2x00dev: Pointer to &struct rt2x00_dev. | |
1182 | * @drop: True to drop all pending frames. | |
1183 | * | |
1184 | * This function will loop through all available queues to flush | |
1185 | * any pending frames. | |
1186 | */ | |
1187 | void rt2x00queue_flush_queues(struct rt2x00_dev *rt2x00dev, bool drop); | |
1188 | ||
b4df4708 GW |
1189 | /* |
1190 | * Debugfs handlers. | |
1191 | */ | |
1192 | /** | |
1193 | * rt2x00debug_dump_frame - Dump a frame to userspace through debugfs. | |
1194 | * @rt2x00dev: Pointer to &struct rt2x00_dev. | |
1195 | * @type: The type of frame that is being dumped. | |
1196 | * @skb: The skb containing the frame to be dumped. | |
1197 | */ | |
1198 | #ifdef CONFIG_RT2X00_LIB_DEBUGFS | |
1199 | void rt2x00debug_dump_frame(struct rt2x00_dev *rt2x00dev, | |
1200 | enum rt2x00_dump_type type, struct sk_buff *skb); | |
1201 | #else | |
1202 | static inline void rt2x00debug_dump_frame(struct rt2x00_dev *rt2x00dev, | |
1203 | enum rt2x00_dump_type type, | |
1204 | struct sk_buff *skb) | |
1205 | { | |
1206 | } | |
1207 | #endif /* CONFIG_RT2X00_LIB_DEBUGFS */ | |
1208 | ||
95ea3627 ID |
1209 | /* |
1210 | * Interrupt context handlers. | |
1211 | */ | |
1212 | void rt2x00lib_beacondone(struct rt2x00_dev *rt2x00dev); | |
9f926fb5 | 1213 | void rt2x00lib_pretbtt(struct rt2x00_dev *rt2x00dev); |
64e7d723 | 1214 | void rt2x00lib_dmastart(struct queue_entry *entry); |
652a9dd2 | 1215 | void rt2x00lib_dmadone(struct queue_entry *entry); |
181d6902 ID |
1216 | void rt2x00lib_txdone(struct queue_entry *entry, |
1217 | struct txdone_entry_desc *txdesc); | |
3392bece | 1218 | void rt2x00lib_txdone_noinfo(struct queue_entry *entry, u32 status); |
fa69560f | 1219 | void rt2x00lib_rxdone(struct queue_entry *entry); |
95ea3627 | 1220 | |
95ea3627 ID |
1221 | /* |
1222 | * mac80211 handlers. | |
1223 | */ | |
7bb45683 | 1224 | void rt2x00mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb); |
95ea3627 ID |
1225 | int rt2x00mac_start(struct ieee80211_hw *hw); |
1226 | void rt2x00mac_stop(struct ieee80211_hw *hw); | |
1227 | int rt2x00mac_add_interface(struct ieee80211_hw *hw, | |
1ed32e4f | 1228 | struct ieee80211_vif *vif); |
95ea3627 | 1229 | void rt2x00mac_remove_interface(struct ieee80211_hw *hw, |
1ed32e4f | 1230 | struct ieee80211_vif *vif); |
e8975581 | 1231 | int rt2x00mac_config(struct ieee80211_hw *hw, u32 changed); |
3a643d24 ID |
1232 | void rt2x00mac_configure_filter(struct ieee80211_hw *hw, |
1233 | unsigned int changed_flags, | |
1234 | unsigned int *total_flags, | |
3ac64bee | 1235 | u64 multicast); |
930c06f2 SS |
1236 | int rt2x00mac_set_tim(struct ieee80211_hw *hw, struct ieee80211_sta *sta, |
1237 | bool set); | |
2bb057d0 ID |
1238 | #ifdef CONFIG_RT2X00_LIB_CRYPTO |
1239 | int rt2x00mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd, | |
dc822b5d | 1240 | struct ieee80211_vif *vif, struct ieee80211_sta *sta, |
2bb057d0 ID |
1241 | struct ieee80211_key_conf *key); |
1242 | #else | |
1243 | #define rt2x00mac_set_key NULL | |
1244 | #endif /* CONFIG_RT2X00_LIB_CRYPTO */ | |
d8147f9d ID |
1245 | void rt2x00mac_sw_scan_start(struct ieee80211_hw *hw); |
1246 | void rt2x00mac_sw_scan_complete(struct ieee80211_hw *hw); | |
95ea3627 ID |
1247 | int rt2x00mac_get_stats(struct ieee80211_hw *hw, |
1248 | struct ieee80211_low_level_stats *stats); | |
471b3efd JB |
1249 | void rt2x00mac_bss_info_changed(struct ieee80211_hw *hw, |
1250 | struct ieee80211_vif *vif, | |
1251 | struct ieee80211_bss_conf *bss_conf, | |
1252 | u32 changes); | |
e100bb64 | 1253 | int rt2x00mac_conf_tx(struct ieee80211_hw *hw, u16 queue, |
95ea3627 | 1254 | const struct ieee80211_tx_queue_params *params); |
e47a5cdd | 1255 | void rt2x00mac_rfkill_poll(struct ieee80211_hw *hw); |
f44df18c | 1256 | void rt2x00mac_flush(struct ieee80211_hw *hw, bool drop); |
e7dee444 ID |
1257 | void rt2x00mac_get_ringparam(struct ieee80211_hw *hw, |
1258 | u32 *tx, u32 *tx_max, u32 *rx, u32 *rx_max); | |
95ea3627 ID |
1259 | |
1260 | /* | |
1261 | * Driver allocation handlers. | |
1262 | */ | |
1263 | int rt2x00lib_probe_dev(struct rt2x00_dev *rt2x00dev); | |
1264 | void rt2x00lib_remove_dev(struct rt2x00_dev *rt2x00dev); | |
1265 | #ifdef CONFIG_PM | |
1266 | int rt2x00lib_suspend(struct rt2x00_dev *rt2x00dev, pm_message_t state); | |
1267 | int rt2x00lib_resume(struct rt2x00_dev *rt2x00dev); | |
1268 | #endif /* CONFIG_PM */ | |
1269 | ||
1270 | #endif /* RT2X00_H */ |