[deliverable/linux.git] / drivers / net / wireless / rt2x00 / rt2x00pci.c

/*
	Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
	<http://rt2x00.serialmonkey.com>

	This program is free software; you can redistribute it and/or modify
	it under the terms of the GNU General Public License as published by
	the Free Software Foundation; either version 2 of the License, or
	(at your option) any later version.

	This program is distributed in the hope that it will be useful,
	but WITHOUT ANY WARRANTY; without even the implied warranty of
	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	GNU General Public License for more details.

	You should have received a copy of the GNU General Public License
	along with this program; if not, write to the
	Free Software Foundation, Inc.,
	59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
 */

/*
	Module: rt2x00pci
	Abstract: rt2x00 generic pci device routines.
 */

#include <linux/dma-mapping.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/pci.h>

#include "rt2x00.h"
#include "rt2x00pci.h"

/*
 * Register access.
 */
int rt2x00pci_regbusy_read(struct rt2x00_dev *rt2x00dev,
			   const unsigned int offset,
			   const struct rt2x00_field32 field,
			   u32 *reg)
{
	unsigned int i;

	for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
		rt2x00pci_register_read(rt2x00dev, offset, reg);
		if (!rt2x00_get_field32(*reg, field))
			return 1;
		udelay(REGISTER_BUSY_DELAY);
	}

	ERROR(rt2x00dev, "Indirect register access failed: "
	      "offset=0x%.08x, value=0x%.08x\n", offset, *reg);
	*reg = ~0;

	return 0;
}
EXPORT_SYMBOL_GPL(rt2x00pci_regbusy_read);

/*
 * TX data handlers.
 */
int rt2x00pci_write_tx_data(struct queue_entry *entry)
{
	struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
	struct queue_entry_priv_pci *entry_priv = entry->priv_data;
	struct skb_frame_desc *skbdesc;

	/*
	 * This should not happen, we already checked the entry
	 * was ours. When the hardware disagrees there has been
	 * a queue corruption!
	 */
	if (unlikely(rt2x00dev->ops->lib->get_entry_state(entry))) {
		ERROR(rt2x00dev,
		      "Corrupt queue %d, accessing entry which is not ours.\n"
		      "Please file bug report to %s.\n",
		      entry->queue->qid, DRV_PROJECT);
		return -EINVAL;
	}

	/*
	 * Fill in skb descriptor
	 */
	skbdesc = get_skb_frame_desc(entry->skb);
	skbdesc->desc = entry_priv->desc;
	skbdesc->desc_len = entry->queue->desc_size;

	return 0;
}
EXPORT_SYMBOL_GPL(rt2x00pci_write_tx_data);

/*
 * TX/RX data handlers.
 */
void rt2x00pci_rxdone(struct rt2x00_dev *rt2x00dev)
{
	struct data_queue *queue = rt2x00dev->rx;
	struct queue_entry *entry;
	struct queue_entry_priv_pci *entry_priv;
	struct skb_frame_desc *skbdesc;

	while (1) {
		entry = rt2x00queue_get_entry(queue, Q_INDEX);
		entry_priv = entry->priv_data;

		if (rt2x00dev->ops->lib->get_entry_state(entry))
			break;

		/*
		 * Fill in desc fields of the skb descriptor
		 */
		skbdesc = get_skb_frame_desc(entry->skb);
		skbdesc->desc = entry_priv->desc;
		skbdesc->desc_len = entry->queue->desc_size;

		/*
		 * Send the frame to rt2x00lib for further processing.
		 */
		rt2x00lib_rxdone(rt2x00dev, entry);
	}
}
EXPORT_SYMBOL_GPL(rt2x00pci_rxdone);

/*
 * Device initialization handlers.
 */
static int rt2x00pci_alloc_queue_dma(struct rt2x00_dev *rt2x00dev,
				     struct data_queue *queue)
{
	struct queue_entry_priv_pci *entry_priv;
	void *addr;
	dma_addr_t dma;
	unsigned int i;

	/*
	 * Allocate DMA memory for descriptor and buffer.
	 */
	addr = dma_alloc_coherent(rt2x00dev->dev,
				  queue->limit * queue->desc_size,
				  &dma, GFP_KERNEL | GFP_DMA);
	if (!addr)
		return -ENOMEM;

	memset(addr, 0, queue->limit * queue->desc_size);

	/*
	 * Initialize all queue entries to contain valid addresses.
	 */
	for (i = 0; i < queue->limit; i++) {
		entry_priv = queue->entries[i].priv_data;
		entry_priv->desc = addr + i * queue->desc_size;
		entry_priv->desc_dma = dma + i * queue->desc_size;
	}

	return 0;
}

static void rt2x00pci_free_queue_dma(struct rt2x00_dev *rt2x00dev,
				     struct data_queue *queue)
{
	struct queue_entry_priv_pci *entry_priv =
	    queue->entries[0].priv_data;

	if (entry_priv->desc)
		dma_free_coherent(rt2x00dev->dev,
				  queue->limit * queue->desc_size,
				  entry_priv->desc, entry_priv->desc_dma);
	entry_priv->desc = NULL;
}

int rt2x00pci_initialize(struct rt2x00_dev *rt2x00dev)
{
	struct data_queue *queue;
	int status;

	/*
	 * Allocate DMA
	 */
	queue_for_each(rt2x00dev, queue) {
		status = rt2x00pci_alloc_queue_dma(rt2x00dev, queue);
		if (status)
			goto exit;
	}

	/*
	 * Register interrupt handler.
	 */
	status = request_irq(rt2x00dev->irq, rt2x00dev->ops->lib->irq_handler,
			     IRQF_SHARED, rt2x00dev->name, rt2x00dev);
	if (status) {
		ERROR(rt2x00dev, "IRQ %d allocation failed (error %d).\n",
		      rt2x00dev->irq, status);
		goto exit;
	}

	return 0;

exit:
	queue_for_each(rt2x00dev, queue)
		rt2x00pci_free_queue_dma(rt2x00dev, queue);

	return status;
}
EXPORT_SYMBOL_GPL(rt2x00pci_initialize);

void rt2x00pci_uninitialize(struct rt2x00_dev *rt2x00dev)
{
	struct data_queue *queue;

	/*
	 * Free irq line.
	 */
	free_irq(to_pci_dev(rt2x00dev->dev)->irq, rt2x00dev);

	/*
	 * Free DMA
	 */
	queue_for_each(rt2x00dev, queue)
		rt2x00pci_free_queue_dma(rt2x00dev, queue);
}
EXPORT_SYMBOL_GPL(rt2x00pci_uninitialize);

/*
 * PCI driver handlers.
 */
static void rt2x00pci_free_reg(struct rt2x00_dev *rt2x00dev)
{
	kfree(rt2x00dev->rf);
	rt2x00dev->rf = NULL;

	kfree(rt2x00dev->eeprom);
	rt2x00dev->eeprom = NULL;

	if (rt2x00dev->csr.base) {
		iounmap(rt2x00dev->csr.base);
		rt2x00dev->csr.base = NULL;
	}
}

static int rt2x00pci_alloc_reg(struct rt2x00_dev *rt2x00dev)
{
	struct pci_dev *pci_dev = to_pci_dev(rt2x00dev->dev);

	rt2x00dev->csr.base = pci_ioremap_bar(pci_dev, 0);
	if (!rt2x00dev->csr.base)
		goto exit;

	rt2x00dev->eeprom = kzalloc(rt2x00dev->ops->eeprom_size, GFP_KERNEL);
	if (!rt2x00dev->eeprom)
		goto exit;

	rt2x00dev->rf = kzalloc(rt2x00dev->ops->rf_size, GFP_KERNEL);
	if (!rt2x00dev->rf)
		goto exit;

	return 0;

exit:
	ERROR_PROBE("Failed to allocate registers.\n");

	rt2x00pci_free_reg(rt2x00dev);

	return -ENOMEM;
}

int rt2x00pci_probe(struct pci_dev *pci_dev, const struct pci_device_id *id)
{
	struct rt2x00_ops *ops = (struct rt2x00_ops *)id->driver_data;
	struct ieee80211_hw *hw;
	struct rt2x00_dev *rt2x00dev;
	int retval;
	u16 chip;

	retval = pci_request_regions(pci_dev, pci_name(pci_dev));
	if (retval) {
		ERROR_PROBE("PCI request regions failed.\n");
		return retval;
	}

	retval = pci_enable_device(pci_dev);
	if (retval) {
		ERROR_PROBE("Enable device failed.\n");
		goto exit_release_regions;
	}

	pci_set_master(pci_dev);

	if (pci_set_mwi(pci_dev))
		ERROR_PROBE("MWI not available.\n");

	if (dma_set_mask(&pci_dev->dev, DMA_BIT_MASK(32))) {
		ERROR_PROBE("PCI DMA not supported.\n");
		retval = -EIO;
		goto exit_disable_device;
	}

	hw = ieee80211_alloc_hw(sizeof(struct rt2x00_dev), ops->hw);
	if (!hw) {
		ERROR_PROBE("Failed to allocate hardware.\n");
		retval = -ENOMEM;
		goto exit_disable_device;
	}

	pci_set_drvdata(pci_dev, hw);

	rt2x00dev = hw->priv;
	rt2x00dev->dev = &pci_dev->dev;
	rt2x00dev->ops = ops;
	rt2x00dev->hw = hw;
	rt2x00dev->irq = pci_dev->irq;
	rt2x00dev->name = pci_name(pci_dev);

	rt2x00_set_chip_intf(rt2x00dev, RT2X00_CHIP_INTF_PCI);

	/*
	 * Determine RT chipset by reading PCI header.
	 */
	pci_read_config_word(pci_dev, PCI_DEVICE_ID, &chip);
	rt2x00_set_chip_rt(rt2x00dev, chip);

	retval = rt2x00pci_alloc_reg(rt2x00dev);
	if (retval)
		goto exit_free_device;

	retval = rt2x00lib_probe_dev(rt2x00dev);
	if (retval)
		goto exit_free_reg;

	return 0;

exit_free_reg:
	rt2x00pci_free_reg(rt2x00dev);

exit_free_device:
	ieee80211_free_hw(hw);

exit_disable_device:
	if (retval != -EBUSY)
		pci_disable_device(pci_dev);

exit_release_regions:
	pci_release_regions(pci_dev);

	pci_set_drvdata(pci_dev, NULL);

	return retval;
}
EXPORT_SYMBOL_GPL(rt2x00pci_probe);

void rt2x00pci_remove(struct pci_dev *pci_dev)
{
	struct ieee80211_hw *hw = pci_get_drvdata(pci_dev);
	struct rt2x00_dev *rt2x00dev = hw->priv;

	/*
	 * Free all allocated data.
	 */
	rt2x00lib_remove_dev(rt2x00dev);
	rt2x00pci_free_reg(rt2x00dev);
	ieee80211_free_hw(hw);

	/*
	 * Free the PCI device data.
	 */
	pci_set_drvdata(pci_dev, NULL);
	pci_disable_device(pci_dev);
	pci_release_regions(pci_dev);
}
EXPORT_SYMBOL_GPL(rt2x00pci_remove);

#ifdef CONFIG_PM
int rt2x00pci_suspend(struct pci_dev *pci_dev, pm_message_t state)
{
	struct ieee80211_hw *hw = pci_get_drvdata(pci_dev);
	struct rt2x00_dev *rt2x00dev = hw->priv;
	int retval;

	retval = rt2x00lib_suspend(rt2x00dev, state);
	if (retval)
		return retval;

	pci_save_state(pci_dev);
	pci_disable_device(pci_dev);
	return pci_set_power_state(pci_dev, pci_choose_state(pci_dev, state));
}
EXPORT_SYMBOL_GPL(rt2x00pci_suspend);

int rt2x00pci_resume(struct pci_dev *pci_dev)
{
	struct ieee80211_hw *hw = pci_get_drvdata(pci_dev);
	struct rt2x00_dev *rt2x00dev = hw->priv;

	if (pci_set_power_state(pci_dev, PCI_D0) ||
	    pci_enable_device(pci_dev) ||
	    pci_restore_state(pci_dev)) {
		ERROR(rt2x00dev, "Failed to resume device.\n");
		return -EIO;
	}

	return rt2x00lib_resume(rt2x00dev);
}
EXPORT_SYMBOL_GPL(rt2x00pci_resume);
#endif /* CONFIG_PM */

/*
 * rt2x00pci module information.
 */
MODULE_AUTHOR(DRV_PROJECT);
MODULE_VERSION(DRV_VERSION);
MODULE_DESCRIPTION("rt2x00 pci library");
MODULE_LICENSE("GPL");
Commit	Line	Data
95ea3627	1	/*
9c9a0d14	2	Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
95ea3627 ID	3	<http://rt2x00.serialmonkey.com>
	4
	5	This program is free software; you can redistribute it and/or modify
	6	it under the terms of the GNU General Public License as published by
	7	the Free Software Foundation; either version 2 of the License, or
	8	(at your option) any later version.
	9
	10	This program is distributed in the hope that it will be useful,
	11	but WITHOUT ANY WARRANTY; without even the implied warranty of
	12	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	13	GNU General Public License for more details.
	14
	15	You should have received a copy of the GNU General Public License
	16	along with this program; if not, write to the
	17	Free Software Foundation, Inc.,
	18	59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
	19	*/
	20
	21	/*
	22	Module: rt2x00pci
	23	Abstract: rt2x00 generic pci device routines.
	24	*/
	25
95ea3627 ID	26	#include <linux/dma-mapping.h>
	27	#include <linux/kernel.h>
	28	#include <linux/module.h>
	29	#include <linux/pci.h>
	30
	31	#include "rt2x00.h"
	32	#include "rt2x00pci.h"
	33
c9c3b1a5 ID	34	/*
	35	* Register access.
	36	*/
	37	int rt2x00pci_regbusy_read(struct rt2x00_dev *rt2x00dev,
	38	const unsigned int offset,
	39	const struct rt2x00_field32 field,
	40	u32 *reg)
	41	{
	42	unsigned int i;
	43
	44	for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
	45	rt2x00pci_register_read(rt2x00dev, offset, reg);
	46	if (!rt2x00_get_field32(*reg, field))
	47	return 1;
	48	udelay(REGISTER_BUSY_DELAY);
	49	}
	50
	51	ERROR(rt2x00dev, "Indirect register access failed: "
	52	"offset=0x%.08x, value=0x%.08x\n", offset, *reg);
	53	*reg = ~0;
	54
	55	return 0;
	56	}
	57	EXPORT_SYMBOL_GPL(rt2x00pci_regbusy_read);
	58
95ea3627 ID	59	/*
	60	* TX data handlers.
	61	*/
6db3786a	62	int rt2x00pci_write_tx_data(struct queue_entry *entry)
95ea3627	63	{
798b7adb	64	struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
b8be63ff	65	struct queue_entry_priv_pci *entry_priv = entry->priv_data;
181d6902	66	struct skb_frame_desc *skbdesc;
95ea3627	67
6db3786a ID	68	/*
	69	* This should not happen, we already checked the entry
	70	* was ours. When the hardware disagrees there has been
	71	* a queue corruption!
	72	*/
798b7adb ID	73	if (unlikely(rt2x00dev->ops->lib->get_entry_state(entry))) {
798b7adb ID	74	ERROR(rt2x00dev,
6db3786a	75	"Corrupt queue %d, accessing entry which is not ours.\n"
95ea3627	76	"Please file bug report to %s.\n",
e58c6aca	77	entry->queue->qid, DRV_PROJECT);
95ea3627 ID	78	return -EINVAL;
	79	}
	80
08992f7f ID	81	/*
	82	* Fill in skb descriptor
	83	*/
6db3786a	84	skbdesc = get_skb_frame_desc(entry->skb);
b8be63ff	85	skbdesc->desc = entry_priv->desc;
6db3786a	86	skbdesc->desc_len = entry->queue->desc_size;
95ea3627	87
95ea3627 ID	88	return 0;
	89	}
	90	EXPORT_SYMBOL_GPL(rt2x00pci_write_tx_data);
	91
	92	/*
3957ccb5	93	* TX/RX data handlers.
95ea3627 ID	94	*/
	95	void rt2x00pci_rxdone(struct rt2x00_dev *rt2x00dev)
	96	{
181d6902 ID	97	struct data_queue *queue = rt2x00dev->rx;
181d6902 ID	98	struct queue_entry *entry;
b8be63ff	99	struct queue_entry_priv_pci *entry_priv;
c4da0048	100	struct skb_frame_desc *skbdesc;
95ea3627 ID	101
95ea3627 ID	102	while (1) {
181d6902	103	entry = rt2x00queue_get_entry(queue, Q_INDEX);
b8be63ff	104	entry_priv = entry->priv_data;
95ea3627	105
798b7adb	106	if (rt2x00dev->ops->lib->get_entry_state(entry))
95ea3627 ID	107	break;
95ea3627 ID	108
c4da0048 GW	109	/*
	110	* Fill in desc fields of the skb descriptor
	111	*/
	112	skbdesc = get_skb_frame_desc(entry->skb);
	113	skbdesc->desc = entry_priv->desc;
	114	skbdesc->desc_len = entry->queue->desc_size;
	115
	116	/*
	117	* Send the frame to rt2x00lib for further processing.
	118	*/
	119	rt2x00lib_rxdone(rt2x00dev, entry);
95ea3627 ID	120	}
	121	}
	122	EXPORT_SYMBOL_GPL(rt2x00pci_rxdone);
	123
	124	/*
	125	* Device initialization handlers.
	126	*/
181d6902 ID	127	static int rt2x00pci_alloc_queue_dma(struct rt2x00_dev *rt2x00dev,
181d6902 ID	128	struct data_queue *queue)
95ea3627	129	{
b8be63ff	130	struct queue_entry_priv_pci *entry_priv;
30b3a23c ID	131	void *addr;
30b3a23c ID	132	dma_addr_t dma;
95ea3627 ID	133	unsigned int i;
	134
	135	/*
	136	* Allocate DMA memory for descriptor and buffer.
	137	*/
c4da0048 GW	138	addr = dma_alloc_coherent(rt2x00dev->dev,
	139	queue->limit * queue->desc_size,
	140	&dma, GFP_KERNEL \| GFP_DMA);
30b3a23c	141	if (!addr)
95ea3627 ID	142	return -ENOMEM;
95ea3627 ID	143
c4da0048	144	memset(addr, 0, queue->limit * queue->desc_size);
9c9dd2c9	145
95ea3627	146	/*
181d6902	147	* Initialize all queue entries to contain valid addresses.
95ea3627	148	*/
181d6902	149	for (i = 0; i < queue->limit; i++) {
b8be63ff	150	entry_priv = queue->entries[i].priv_data;
c4da0048 GW	151	entry_priv->desc = addr + i * queue->desc_size;
c4da0048 GW	152	entry_priv->desc_dma = dma + i * queue->desc_size;
95ea3627 ID	153	}
	154
	155	return 0;
	156	}
	157
181d6902 ID	158	static void rt2x00pci_free_queue_dma(struct rt2x00_dev *rt2x00dev,
181d6902 ID	159	struct data_queue *queue)
95ea3627	160	{
b8be63ff ID	161	struct queue_entry_priv_pci *entry_priv =
b8be63ff ID	162	queue->entries[0].priv_data;
181d6902	163
c4da0048 GW	164	if (entry_priv->desc)
	165	dma_free_coherent(rt2x00dev->dev,
	166	queue->limit * queue->desc_size,
	167	entry_priv->desc, entry_priv->desc_dma);
	168	entry_priv->desc = NULL;
95ea3627 ID	169	}
	170
	171	int rt2x00pci_initialize(struct rt2x00_dev *rt2x00dev)
	172	{
181d6902	173	struct data_queue *queue;
95ea3627 ID	174	int status;
	175
	176	/*
	177	* Allocate DMA
	178	*/
181d6902 ID	179	queue_for_each(rt2x00dev, queue) {
181d6902 ID	180	status = rt2x00pci_alloc_queue_dma(rt2x00dev, queue);
95ea3627 ID	181	if (status)
	182	goto exit;
	183	}
	184
	185	/*
	186	* Register interrupt handler.
	187	*/
440ddada ID	188	status = request_irq(rt2x00dev->irq, rt2x00dev->ops->lib->irq_handler,
440ddada ID	189	IRQF_SHARED, rt2x00dev->name, rt2x00dev);
95ea3627 ID	190	if (status) {
95ea3627 ID	191	ERROR(rt2x00dev, "IRQ %d allocation failed (error %d).\n",
440ddada	192	rt2x00dev->irq, status);
b30cdfc5	193	goto exit;
95ea3627 ID	194	}
	195
	196	return 0;
	197
	198	exit:
b30cdfc5 ID	199	queue_for_each(rt2x00dev, queue)
b30cdfc5 ID	200	rt2x00pci_free_queue_dma(rt2x00dev, queue);
95ea3627 ID	201
	202	return status;
	203	}
	204	EXPORT_SYMBOL_GPL(rt2x00pci_initialize);
	205
	206	void rt2x00pci_uninitialize(struct rt2x00_dev *rt2x00dev)
	207	{
181d6902	208	struct data_queue *queue;
95ea3627 ID	209
	210	/*
	211	* Free irq line.
	212	*/
14a3bf89	213	free_irq(to_pci_dev(rt2x00dev->dev)->irq, rt2x00dev);
95ea3627 ID	214
	215	/*
	216	* Free DMA
	217	*/
181d6902 ID	218	queue_for_each(rt2x00dev, queue)
181d6902 ID	219	rt2x00pci_free_queue_dma(rt2x00dev, queue);
95ea3627 ID	220	}
	221	EXPORT_SYMBOL_GPL(rt2x00pci_uninitialize);
	222
	223	/*
	224	* PCI driver handlers.
	225	*/
	226	static void rt2x00pci_free_reg(struct rt2x00_dev *rt2x00dev)
	227	{
	228	kfree(rt2x00dev->rf);
	229	rt2x00dev->rf = NULL;
	230
	231	kfree(rt2x00dev->eeprom);
	232	rt2x00dev->eeprom = NULL;
	233
21795094 ID	234	if (rt2x00dev->csr.base) {
	235	iounmap(rt2x00dev->csr.base);
	236	rt2x00dev->csr.base = NULL;
95ea3627 ID	237	}
	238	}
	239
	240	static int rt2x00pci_alloc_reg(struct rt2x00_dev *rt2x00dev)
	241	{
14a3bf89	242	struct pci_dev *pci_dev = to_pci_dev(rt2x00dev->dev);
95ea3627	243
275f165f	244	rt2x00dev->csr.base = pci_ioremap_bar(pci_dev, 0);
21795094	245	if (!rt2x00dev->csr.base)
95ea3627 ID	246	goto exit;
	247
	248	rt2x00dev->eeprom = kzalloc(rt2x00dev->ops->eeprom_size, GFP_KERNEL);
	249	if (!rt2x00dev->eeprom)
	250	goto exit;
	251
	252	rt2x00dev->rf = kzalloc(rt2x00dev->ops->rf_size, GFP_KERNEL);
	253	if (!rt2x00dev->rf)
	254	goto exit;
	255
	256	return 0;
	257
	258	exit:
	259	ERROR_PROBE("Failed to allocate registers.\n");
	260
	261	rt2x00pci_free_reg(rt2x00dev);
	262
	263	return -ENOMEM;
	264	}
	265
	266	int rt2x00pci_probe(struct pci_dev pci_dev, const struct pci_device_id id)
	267	{
	268	struct rt2x00_ops ops = (struct rt2x00_ops )id->driver_data;
	269	struct ieee80211_hw *hw;
	270	struct rt2x00_dev *rt2x00dev;
	271	int retval;
440ddada	272	u16 chip;
95ea3627 ID	273
	274	retval = pci_request_regions(pci_dev, pci_name(pci_dev));
	275	if (retval) {
	276	ERROR_PROBE("PCI request regions failed.\n");
	277	return retval;
	278	}
	279
	280	retval = pci_enable_device(pci_dev);
	281	if (retval) {
	282	ERROR_PROBE("Enable device failed.\n");
	283	goto exit_release_regions;
	284	}
	285
	286	pci_set_master(pci_dev);
	287
	288	if (pci_set_mwi(pci_dev))
	289	ERROR_PROBE("MWI not available.\n");
	290
284901a9	291	if (dma_set_mask(&pci_dev->dev, DMA_BIT_MASK(32))) {
95ea3627 ID	292	ERROR_PROBE("PCI DMA not supported.\n");
	293	retval = -EIO;
	294	goto exit_disable_device;
	295	}
	296
	297	hw = ieee80211_alloc_hw(sizeof(struct rt2x00_dev), ops->hw);
	298	if (!hw) {
	299	ERROR_PROBE("Failed to allocate hardware.\n");
	300	retval = -ENOMEM;
	301	goto exit_disable_device;
	302	}
	303
	304	pci_set_drvdata(pci_dev, hw);
	305
	306	rt2x00dev = hw->priv;
14a3bf89	307	rt2x00dev->dev = &pci_dev->dev;
95ea3627 ID	308	rt2x00dev->ops = ops;
95ea3627 ID	309	rt2x00dev->hw = hw;
440ddada ID	310	rt2x00dev->irq = pci_dev->irq;
	311	rt2x00dev->name = pci_name(pci_dev);
	312
2015d192 GW	313	rt2x00_set_chip_intf(rt2x00dev, RT2X00_CHIP_INTF_PCI);
2015d192 GW	314
440ddada ID	315	/*
	316	* Determine RT chipset by reading PCI header.
	317	*/
	318	pci_read_config_word(pci_dev, PCI_DEVICE_ID, &chip);
	319	rt2x00_set_chip_rt(rt2x00dev, chip);
95ea3627 ID	320
	321	retval = rt2x00pci_alloc_reg(rt2x00dev);
	322	if (retval)
	323	goto exit_free_device;
	324
	325	retval = rt2x00lib_probe_dev(rt2x00dev);
	326	if (retval)
	327	goto exit_free_reg;
	328
	329	return 0;
	330
	331	exit_free_reg:
	332	rt2x00pci_free_reg(rt2x00dev);
	333
	334	exit_free_device:
	335	ieee80211_free_hw(hw);
	336
	337	exit_disable_device:
	338	if (retval != -EBUSY)
	339	pci_disable_device(pci_dev);
	340
	341	exit_release_regions:
	342	pci_release_regions(pci_dev);
	343
	344	pci_set_drvdata(pci_dev, NULL);
	345
	346	return retval;
	347	}
	348	EXPORT_SYMBOL_GPL(rt2x00pci_probe);
	349
	350	void rt2x00pci_remove(struct pci_dev *pci_dev)
	351	{
	352	struct ieee80211_hw *hw = pci_get_drvdata(pci_dev);
	353	struct rt2x00_dev *rt2x00dev = hw->priv;
	354
	355	/*
	356	* Free all allocated data.
	357	*/
	358	rt2x00lib_remove_dev(rt2x00dev);
	359	rt2x00pci_free_reg(rt2x00dev);
	360	ieee80211_free_hw(hw);
	361
	362	/*
	363	* Free the PCI device data.
	364	*/
	365	pci_set_drvdata(pci_dev, NULL);
	366	pci_disable_device(pci_dev);
	367	pci_release_regions(pci_dev);
	368	}
	369	EXPORT_SYMBOL_GPL(rt2x00pci_remove);
	370
	371	#ifdef CONFIG_PM
	372	int rt2x00pci_suspend(struct pci_dev *pci_dev, pm_message_t state)
	373	{
	374	struct ieee80211_hw *hw = pci_get_drvdata(pci_dev);
	375	struct rt2x00_dev *rt2x00dev = hw->priv;
	376	int retval;
	377
	378	retval = rt2x00lib_suspend(rt2x00dev, state);
	379	if (retval)
	380	return retval;
	381
95ea3627 ID	382	pci_save_state(pci_dev);
	383	pci_disable_device(pci_dev);
	384	return pci_set_power_state(pci_dev, pci_choose_state(pci_dev, state));
	385	}
	386	EXPORT_SYMBOL_GPL(rt2x00pci_suspend);
	387
	388	int rt2x00pci_resume(struct pci_dev *pci_dev)
	389	{
	390	struct ieee80211_hw *hw = pci_get_drvdata(pci_dev);
	391	struct rt2x00_dev *rt2x00dev = hw->priv;
95ea3627 ID	392
	393	if (pci_set_power_state(pci_dev, PCI_D0) \|\|
	394	pci_enable_device(pci_dev) \|\|
	395	pci_restore_state(pci_dev)) {
	396	ERROR(rt2x00dev, "Failed to resume device.\n");
	397	return -EIO;
	398	}
	399
499a214c	400	return rt2x00lib_resume(rt2x00dev);
95ea3627 ID	401	}
	402	EXPORT_SYMBOL_GPL(rt2x00pci_resume);
	403	#endif /* CONFIG_PM */
	404
	405	/*
	406	* rt2x00pci module information.
	407	*/
	408	MODULE_AUTHOR(DRV_PROJECT);
	409	MODULE_VERSION(DRV_VERSION);
181d6902	410	MODULE_DESCRIPTION("rt2x00 pci library");
95ea3627	411	MODULE_LICENSE("GPL");