rt2x00: Protect queue control with mutex
[deliverable/linux.git] / drivers / net / wireless / rt2x00 / rt2x00queue.c
CommitLineData
181d6902 1/*
7e613e16
ID
2 Copyright (C) 2010 Willow Garage <http://www.willowgarage.com>
3 Copyright (C) 2004 - 2010 Ivo van Doorn <IvDoorn@gmail.com>
9c9a0d14 4 Copyright (C) 2004 - 2009 Gertjan van Wingerde <gwingerde@gmail.com>
181d6902
ID
5 <http://rt2x00.serialmonkey.com>
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the
19 Free Software Foundation, Inc.,
20 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
21 */
22
23/*
24 Module: rt2x00lib
25 Abstract: rt2x00 queue specific routines.
26 */
27
5a0e3ad6 28#include <linux/slab.h>
181d6902
ID
29#include <linux/kernel.h>
30#include <linux/module.h>
c4da0048 31#include <linux/dma-mapping.h>
181d6902
ID
32
33#include "rt2x00.h"
34#include "rt2x00lib.h"
35
fa69560f 36struct sk_buff *rt2x00queue_alloc_rxskb(struct queue_entry *entry)
239c249d 37{
fa69560f 38 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
c4da0048
GW
39 struct sk_buff *skb;
40 struct skb_frame_desc *skbdesc;
2bb057d0
ID
41 unsigned int frame_size;
42 unsigned int head_size = 0;
43 unsigned int tail_size = 0;
239c249d
GW
44
45 /*
46 * The frame size includes descriptor size, because the
47 * hardware directly receive the frame into the skbuffer.
48 */
c4da0048 49 frame_size = entry->queue->data_size + entry->queue->desc_size;
239c249d
GW
50
51 /*
ff352391
ID
52 * The payload should be aligned to a 4-byte boundary,
53 * this means we need at least 3 bytes for moving the frame
54 * into the correct offset.
239c249d 55 */
2bb057d0
ID
56 head_size = 4;
57
58 /*
59 * For IV/EIV/ICV assembly we must make sure there is
60 * at least 8 bytes bytes available in headroom for IV/EIV
9c3444d3 61 * and 8 bytes for ICV data as tailroon.
2bb057d0 62 */
2bb057d0
ID
63 if (test_bit(CONFIG_SUPPORT_HW_CRYPTO, &rt2x00dev->flags)) {
64 head_size += 8;
9c3444d3 65 tail_size += 8;
2bb057d0 66 }
239c249d
GW
67
68 /*
69 * Allocate skbuffer.
70 */
2bb057d0 71 skb = dev_alloc_skb(frame_size + head_size + tail_size);
239c249d
GW
72 if (!skb)
73 return NULL;
74
2bb057d0
ID
75 /*
76 * Make sure we not have a frame with the requested bytes
77 * available in the head and tail.
78 */
79 skb_reserve(skb, head_size);
239c249d
GW
80 skb_put(skb, frame_size);
81
c4da0048
GW
82 /*
83 * Populate skbdesc.
84 */
85 skbdesc = get_skb_frame_desc(skb);
86 memset(skbdesc, 0, sizeof(*skbdesc));
87 skbdesc->entry = entry;
88
89 if (test_bit(DRIVER_REQUIRE_DMA, &rt2x00dev->flags)) {
90 skbdesc->skb_dma = dma_map_single(rt2x00dev->dev,
91 skb->data,
92 skb->len,
93 DMA_FROM_DEVICE);
94 skbdesc->flags |= SKBDESC_DMA_MAPPED_RX;
95 }
96
239c249d
GW
97 return skb;
98}
30caa6e3 99
fa69560f 100void rt2x00queue_map_txskb(struct queue_entry *entry)
30caa6e3 101{
fa69560f
ID
102 struct device *dev = entry->queue->rt2x00dev->dev;
103 struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
c4da0048 104
3ee54a07 105 skbdesc->skb_dma =
fa69560f 106 dma_map_single(dev, entry->skb->data, entry->skb->len, DMA_TO_DEVICE);
c4da0048
GW
107 skbdesc->flags |= SKBDESC_DMA_MAPPED_TX;
108}
109EXPORT_SYMBOL_GPL(rt2x00queue_map_txskb);
110
fa69560f 111void rt2x00queue_unmap_skb(struct queue_entry *entry)
c4da0048 112{
fa69560f
ID
113 struct device *dev = entry->queue->rt2x00dev->dev;
114 struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
c4da0048
GW
115
116 if (skbdesc->flags & SKBDESC_DMA_MAPPED_RX) {
fa69560f 117 dma_unmap_single(dev, skbdesc->skb_dma, entry->skb->len,
c4da0048
GW
118 DMA_FROM_DEVICE);
119 skbdesc->flags &= ~SKBDESC_DMA_MAPPED_RX;
546adf29 120 } else if (skbdesc->flags & SKBDESC_DMA_MAPPED_TX) {
fa69560f 121 dma_unmap_single(dev, skbdesc->skb_dma, entry->skb->len,
c4da0048
GW
122 DMA_TO_DEVICE);
123 skbdesc->flags &= ~SKBDESC_DMA_MAPPED_TX;
124 }
125}
0b8004aa 126EXPORT_SYMBOL_GPL(rt2x00queue_unmap_skb);
c4da0048 127
fa69560f 128void rt2x00queue_free_skb(struct queue_entry *entry)
c4da0048 129{
fa69560f 130 if (!entry->skb)
9a613195
ID
131 return;
132
fa69560f
ID
133 rt2x00queue_unmap_skb(entry);
134 dev_kfree_skb_any(entry->skb);
135 entry->skb = NULL;
30caa6e3 136}
239c249d 137
daee6c09 138void rt2x00queue_align_frame(struct sk_buff *skb)
9f166171 139{
9f166171 140 unsigned int frame_length = skb->len;
daee6c09 141 unsigned int align = ALIGN_SIZE(skb, 0);
9f166171
ID
142
143 if (!align)
144 return;
145
daee6c09
ID
146 skb_push(skb, align);
147 memmove(skb->data, skb->data + align, frame_length);
148 skb_trim(skb, frame_length);
149}
150
95d69aa0 151void rt2x00queue_align_payload(struct sk_buff *skb, unsigned int header_length)
daee6c09
ID
152{
153 unsigned int frame_length = skb->len;
95d69aa0 154 unsigned int align = ALIGN_SIZE(skb, header_length);
daee6c09
ID
155
156 if (!align)
157 return;
158
159 skb_push(skb, align);
160 memmove(skb->data, skb->data + align, frame_length);
161 skb_trim(skb, frame_length);
162}
163
164void rt2x00queue_insert_l2pad(struct sk_buff *skb, unsigned int header_length)
165{
2e331462 166 unsigned int payload_length = skb->len - header_length;
daee6c09
ID
167 unsigned int header_align = ALIGN_SIZE(skb, 0);
168 unsigned int payload_align = ALIGN_SIZE(skb, header_length);
e54be4e7 169 unsigned int l2pad = payload_length ? L2PAD_SIZE(header_length) : 0;
daee6c09 170
2e331462
GW
171 /*
172 * Adjust the header alignment if the payload needs to be moved more
173 * than the header.
174 */
175 if (payload_align > header_align)
176 header_align += 4;
177
178 /* There is nothing to do if no alignment is needed */
179 if (!header_align)
180 return;
daee6c09 181
2e331462
GW
182 /* Reserve the amount of space needed in front of the frame */
183 skb_push(skb, header_align);
184
185 /*
186 * Move the header.
187 */
188 memmove(skb->data, skb->data + header_align, header_length);
189
190 /* Move the payload, if present and if required */
191 if (payload_length && payload_align)
daee6c09 192 memmove(skb->data + header_length + l2pad,
a5186e99 193 skb->data + header_length + l2pad + payload_align,
2e331462
GW
194 payload_length);
195
196 /* Trim the skb to the correct size */
197 skb_trim(skb, header_length + l2pad + payload_length);
9f166171
ID
198}
199
daee6c09
ID
200void rt2x00queue_remove_l2pad(struct sk_buff *skb, unsigned int header_length)
201{
a061a93b
GW
202 /*
203 * L2 padding is only present if the skb contains more than just the
204 * IEEE 802.11 header.
205 */
206 unsigned int l2pad = (skb->len > header_length) ?
207 L2PAD_SIZE(header_length) : 0;
daee6c09 208
354e39db 209 if (!l2pad)
daee6c09
ID
210 return;
211
a061a93b
GW
212 memmove(skb->data + l2pad, skb->data, header_length);
213 skb_pull(skb, l2pad);
daee6c09
ID
214}
215
7b40982e
ID
216static void rt2x00queue_create_tx_descriptor_seq(struct queue_entry *entry,
217 struct txentry_desc *txdesc)
218{
219 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(entry->skb);
220 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)entry->skb->data;
221 struct rt2x00_intf *intf = vif_to_intf(tx_info->control.vif);
222 unsigned long irqflags;
223
224 if (!(tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) ||
225 unlikely(!tx_info->control.vif))
226 return;
227
228 /*
229 * Hardware should insert sequence counter.
230 * FIXME: We insert a software sequence counter first for
231 * hardware that doesn't support hardware sequence counting.
232 *
233 * This is wrong because beacons are not getting sequence
234 * numbers assigned properly.
235 *
236 * A secondary problem exists for drivers that cannot toggle
237 * sequence counting per-frame, since those will override the
238 * sequence counter given by mac80211.
239 */
240 spin_lock_irqsave(&intf->seqlock, irqflags);
241
242 if (test_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags))
243 intf->seqno += 0x10;
244 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
245 hdr->seq_ctrl |= cpu_to_le16(intf->seqno);
246
247 spin_unlock_irqrestore(&intf->seqlock, irqflags);
248
249 __set_bit(ENTRY_TXD_GENERATE_SEQ, &txdesc->flags);
250}
251
252static void rt2x00queue_create_tx_descriptor_plcp(struct queue_entry *entry,
253 struct txentry_desc *txdesc,
254 const struct rt2x00_rate *hwrate)
255{
256 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
257 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(entry->skb);
258 struct ieee80211_tx_rate *txrate = &tx_info->control.rates[0];
259 unsigned int data_length;
260 unsigned int duration;
261 unsigned int residual;
262
263 /* Data length + CRC + Crypto overhead (IV/EIV/ICV/MIC) */
264 data_length = entry->skb->len + 4;
265 data_length += rt2x00crypto_tx_overhead(rt2x00dev, entry->skb);
266
267 /*
268 * PLCP setup
269 * Length calculation depends on OFDM/CCK rate.
270 */
271 txdesc->signal = hwrate->plcp;
272 txdesc->service = 0x04;
273
274 if (hwrate->flags & DEV_RATE_OFDM) {
275 txdesc->length_high = (data_length >> 6) & 0x3f;
276 txdesc->length_low = data_length & 0x3f;
277 } else {
278 /*
279 * Convert length to microseconds.
280 */
281 residual = GET_DURATION_RES(data_length, hwrate->bitrate);
282 duration = GET_DURATION(data_length, hwrate->bitrate);
283
284 if (residual != 0) {
285 duration++;
286
287 /*
288 * Check if we need to set the Length Extension
289 */
290 if (hwrate->bitrate == 110 && residual <= 30)
291 txdesc->service |= 0x80;
292 }
293
294 txdesc->length_high = (duration >> 8) & 0xff;
295 txdesc->length_low = duration & 0xff;
296
297 /*
298 * When preamble is enabled we should set the
299 * preamble bit for the signal.
300 */
301 if (txrate->flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE)
302 txdesc->signal |= 0x08;
303 }
304}
305
bd88a781
ID
306static void rt2x00queue_create_tx_descriptor(struct queue_entry *entry,
307 struct txentry_desc *txdesc)
7050ec82 308{
2e92e6f2 309 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
e039fa4a 310 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(entry->skb);
7050ec82 311 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)entry->skb->data;
2e92e6f2 312 struct ieee80211_rate *rate =
e039fa4a 313 ieee80211_get_tx_rate(rt2x00dev->hw, tx_info);
7050ec82 314 const struct rt2x00_rate *hwrate;
7050ec82
ID
315
316 memset(txdesc, 0, sizeof(*txdesc));
317
9f166171 318 /*
df624ca5 319 * Header and frame information.
9f166171 320 */
df624ca5 321 txdesc->length = entry->skb->len;
9f166171 322 txdesc->header_length = ieee80211_get_hdrlen_from_skb(entry->skb);
9f166171 323
7050ec82
ID
324 /*
325 * Check whether this frame is to be acked.
326 */
e039fa4a 327 if (!(tx_info->flags & IEEE80211_TX_CTL_NO_ACK))
7050ec82
ID
328 __set_bit(ENTRY_TXD_ACK, &txdesc->flags);
329
330 /*
331 * Check if this is a RTS/CTS frame
332 */
ac104462
ID
333 if (ieee80211_is_rts(hdr->frame_control) ||
334 ieee80211_is_cts(hdr->frame_control)) {
7050ec82 335 __set_bit(ENTRY_TXD_BURST, &txdesc->flags);
ac104462 336 if (ieee80211_is_rts(hdr->frame_control))
7050ec82 337 __set_bit(ENTRY_TXD_RTS_FRAME, &txdesc->flags);
e039fa4a 338 else
7050ec82 339 __set_bit(ENTRY_TXD_CTS_FRAME, &txdesc->flags);
e039fa4a 340 if (tx_info->control.rts_cts_rate_idx >= 0)
2e92e6f2 341 rate =
e039fa4a 342 ieee80211_get_rts_cts_rate(rt2x00dev->hw, tx_info);
7050ec82
ID
343 }
344
345 /*
346 * Determine retry information.
347 */
e6a9854b 348 txdesc->retry_limit = tx_info->control.rates[0].count - 1;
42c82857 349 if (txdesc->retry_limit >= rt2x00dev->long_retry)
7050ec82
ID
350 __set_bit(ENTRY_TXD_RETRY_MODE, &txdesc->flags);
351
352 /*
353 * Check if more fragments are pending
354 */
2606e422 355 if (ieee80211_has_morefrags(hdr->frame_control)) {
7050ec82
ID
356 __set_bit(ENTRY_TXD_BURST, &txdesc->flags);
357 __set_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags);
358 }
359
2606e422
HS
360 /*
361 * Check if more frames (!= fragments) are pending
362 */
363 if (tx_info->flags & IEEE80211_TX_CTL_MORE_FRAMES)
364 __set_bit(ENTRY_TXD_BURST, &txdesc->flags);
365
7050ec82
ID
366 /*
367 * Beacons and probe responses require the tsf timestamp
e81e0aef
AB
368 * to be inserted into the frame, except for a frame that has been injected
369 * through a monitor interface. This latter is needed for testing a
370 * monitor interface.
7050ec82 371 */
e81e0aef
AB
372 if ((ieee80211_is_beacon(hdr->frame_control) ||
373 ieee80211_is_probe_resp(hdr->frame_control)) &&
374 (!(tx_info->flags & IEEE80211_TX_CTL_INJECTED)))
7050ec82
ID
375 __set_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags);
376
377 /*
378 * Determine with what IFS priority this frame should be send.
379 * Set ifs to IFS_SIFS when the this is not the first fragment,
380 * or this fragment came after RTS/CTS.
381 */
7b40982e
ID
382 if ((tx_info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT) &&
383 !test_bit(ENTRY_TXD_RTS_FRAME, &txdesc->flags)) {
7050ec82
ID
384 __set_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags);
385 txdesc->ifs = IFS_BACKOFF;
7b40982e 386 } else
7050ec82 387 txdesc->ifs = IFS_SIFS;
7050ec82 388
076f9582
ID
389 /*
390 * Determine rate modulation.
391 */
7050ec82 392 hwrate = rt2x00_get_rate(rate->hw_value);
076f9582 393 txdesc->rate_mode = RATE_MODE_CCK;
7b40982e 394 if (hwrate->flags & DEV_RATE_OFDM)
076f9582 395 txdesc->rate_mode = RATE_MODE_OFDM;
7050ec82 396
7b40982e
ID
397 /*
398 * Apply TX descriptor handling by components
399 */
400 rt2x00crypto_create_tx_descriptor(entry, txdesc);
35f00cfc 401 rt2x00ht_create_tx_descriptor(entry, txdesc, hwrate);
7b40982e
ID
402 rt2x00queue_create_tx_descriptor_seq(entry, txdesc);
403 rt2x00queue_create_tx_descriptor_plcp(entry, txdesc, hwrate);
7050ec82 404}
7050ec82 405
78eea11b
GW
406static int rt2x00queue_write_tx_data(struct queue_entry *entry,
407 struct txentry_desc *txdesc)
408{
409 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
410
411 /*
412 * This should not happen, we already checked the entry
413 * was ours. When the hardware disagrees there has been
414 * a queue corruption!
415 */
416 if (unlikely(rt2x00dev->ops->lib->get_entry_state &&
417 rt2x00dev->ops->lib->get_entry_state(entry))) {
418 ERROR(rt2x00dev,
419 "Corrupt queue %d, accessing entry which is not ours.\n"
420 "Please file bug report to %s.\n",
421 entry->queue->qid, DRV_PROJECT);
422 return -EINVAL;
423 }
424
425 /*
426 * Add the requested extra tx headroom in front of the skb.
427 */
428 skb_push(entry->skb, rt2x00dev->ops->extra_tx_headroom);
429 memset(entry->skb->data, 0, rt2x00dev->ops->extra_tx_headroom);
430
431 /*
76dd5ddf 432 * Call the driver's write_tx_data function, if it exists.
78eea11b 433 */
76dd5ddf
GW
434 if (rt2x00dev->ops->lib->write_tx_data)
435 rt2x00dev->ops->lib->write_tx_data(entry, txdesc);
78eea11b
GW
436
437 /*
438 * Map the skb to DMA.
439 */
440 if (test_bit(DRIVER_REQUIRE_DMA, &rt2x00dev->flags))
fa69560f 441 rt2x00queue_map_txskb(entry);
78eea11b
GW
442
443 return 0;
444}
445
bd88a781
ID
446static void rt2x00queue_write_tx_descriptor(struct queue_entry *entry,
447 struct txentry_desc *txdesc)
7050ec82 448{
b869767b 449 struct data_queue *queue = entry->queue;
7050ec82 450
93331458 451 queue->rt2x00dev->ops->lib->write_tx_desc(entry, txdesc);
7050ec82
ID
452
453 /*
454 * All processing on the frame has been completed, this means
455 * it is now ready to be dumped to userspace through debugfs.
456 */
93331458 457 rt2x00debug_dump_frame(queue->rt2x00dev, DUMP_FRAME_TX, entry->skb);
6295d815
GW
458}
459
8be4eed0 460static void rt2x00queue_kick_tx_queue(struct data_queue *queue,
6295d815
GW
461 struct txentry_desc *txdesc)
462{
7050ec82 463 /*
b869767b 464 * Check if we need to kick the queue, there are however a few rules
6295d815 465 * 1) Don't kick unless this is the last in frame in a burst.
b869767b
ID
466 * When the burst flag is set, this frame is always followed
467 * by another frame which in some way are related to eachother.
468 * This is true for fragments, RTS or CTS-to-self frames.
6295d815 469 * 2) Rule 1 can be broken when the available entries
b869767b 470 * in the queue are less then a certain threshold.
7050ec82 471 */
b869767b
ID
472 if (rt2x00queue_threshold(queue) ||
473 !test_bit(ENTRY_TXD_BURST, &txdesc->flags))
dbba306f 474 queue->rt2x00dev->ops->lib->kick_queue(queue);
7050ec82 475}
7050ec82 476
7351c6bd
JB
477int rt2x00queue_write_tx_frame(struct data_queue *queue, struct sk_buff *skb,
478 bool local)
6db3786a 479{
e6a9854b 480 struct ieee80211_tx_info *tx_info;
6db3786a
ID
481 struct queue_entry *entry = rt2x00queue_get_entry(queue, Q_INDEX);
482 struct txentry_desc txdesc;
d74f5ba4 483 struct skb_frame_desc *skbdesc;
e6a9854b 484 u8 rate_idx, rate_flags;
6db3786a
ID
485
486 if (unlikely(rt2x00queue_full(queue)))
0e3de998 487 return -ENOBUFS;
6db3786a 488
c6084d5f
HS
489 if (unlikely(test_and_set_bit(ENTRY_OWNER_DEVICE_DATA,
490 &entry->flags))) {
6db3786a
ID
491 ERROR(queue->rt2x00dev,
492 "Arrived at non-free entry in the non-full queue %d.\n"
493 "Please file bug report to %s.\n",
494 queue->qid, DRV_PROJECT);
495 return -EINVAL;
496 }
497
498 /*
499 * Copy all TX descriptor information into txdesc,
500 * after that we are free to use the skb->cb array
501 * for our information.
502 */
503 entry->skb = skb;
504 rt2x00queue_create_tx_descriptor(entry, &txdesc);
505
d74f5ba4 506 /*
e6a9854b 507 * All information is retrieved from the skb->cb array,
2bb057d0 508 * now we should claim ownership of the driver part of that
e6a9854b 509 * array, preserving the bitrate index and flags.
d74f5ba4 510 */
e6a9854b
JB
511 tx_info = IEEE80211_SKB_CB(skb);
512 rate_idx = tx_info->control.rates[0].idx;
513 rate_flags = tx_info->control.rates[0].flags;
0e3de998 514 skbdesc = get_skb_frame_desc(skb);
d74f5ba4
ID
515 memset(skbdesc, 0, sizeof(*skbdesc));
516 skbdesc->entry = entry;
e6a9854b
JB
517 skbdesc->tx_rate_idx = rate_idx;
518 skbdesc->tx_rate_flags = rate_flags;
d74f5ba4 519
7351c6bd
JB
520 if (local)
521 skbdesc->flags |= SKBDESC_NOT_MAC80211;
522
2bb057d0
ID
523 /*
524 * When hardware encryption is supported, and this frame
525 * is to be encrypted, we should strip the IV/EIV data from
3ad2f3fb 526 * the frame so we can provide it to the driver separately.
2bb057d0
ID
527 */
528 if (test_bit(ENTRY_TXD_ENCRYPT, &txdesc.flags) &&
dddfb478 529 !test_bit(ENTRY_TXD_ENCRYPT_IV, &txdesc.flags)) {
3f787bd6 530 if (test_bit(DRIVER_REQUIRE_COPY_IV, &queue->rt2x00dev->flags))
9eb4e21e 531 rt2x00crypto_tx_copy_iv(skb, &txdesc);
dddfb478 532 else
9eb4e21e 533 rt2x00crypto_tx_remove_iv(skb, &txdesc);
dddfb478 534 }
2bb057d0 535
93354cbb
ID
536 /*
537 * When DMA allocation is required we should guarentee to the
538 * driver that the DMA is aligned to a 4-byte boundary.
93354cbb
ID
539 * However some drivers require L2 padding to pad the payload
540 * rather then the header. This could be a requirement for
541 * PCI and USB devices, while header alignment only is valid
542 * for PCI devices.
543 */
9f166171 544 if (test_bit(DRIVER_REQUIRE_L2PAD, &queue->rt2x00dev->flags))
daee6c09 545 rt2x00queue_insert_l2pad(entry->skb, txdesc.header_length);
93354cbb 546 else if (test_bit(DRIVER_REQUIRE_DMA, &queue->rt2x00dev->flags))
daee6c09 547 rt2x00queue_align_frame(entry->skb);
9f166171 548
2bb057d0
ID
549 /*
550 * It could be possible that the queue was corrupted and this
0e3de998
ID
551 * call failed. Since we always return NETDEV_TX_OK to mac80211,
552 * this frame will simply be dropped.
2bb057d0 553 */
78eea11b 554 if (unlikely(rt2x00queue_write_tx_data(entry, &txdesc))) {
0262ab0d 555 clear_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags);
2bb057d0 556 entry->skb = NULL;
0e3de998 557 return -EIO;
6db3786a
ID
558 }
559
0262ab0d 560 set_bit(ENTRY_DATA_PENDING, &entry->flags);
6db3786a
ID
561
562 rt2x00queue_index_inc(queue, Q_INDEX);
563 rt2x00queue_write_tx_descriptor(entry, &txdesc);
8be4eed0 564 rt2x00queue_kick_tx_queue(queue, &txdesc);
6db3786a
ID
565
566 return 0;
567}
568
bd88a781 569int rt2x00queue_update_beacon(struct rt2x00_dev *rt2x00dev,
a2c9b652
ID
570 struct ieee80211_vif *vif,
571 const bool enable_beacon)
bd88a781
ID
572{
573 struct rt2x00_intf *intf = vif_to_intf(vif);
574 struct skb_frame_desc *skbdesc;
575 struct txentry_desc txdesc;
bd88a781
ID
576
577 if (unlikely(!intf->beacon))
578 return -ENOBUFS;
579
17512dc3
IP
580 mutex_lock(&intf->beacon_skb_mutex);
581
582 /*
583 * Clean up the beacon skb.
584 */
fa69560f 585 rt2x00queue_free_skb(intf->beacon);
17512dc3 586
a2c9b652 587 if (!enable_beacon) {
0b7fde54 588 rt2x00queue_stop_queue(intf->beacon->queue);
17512dc3 589 mutex_unlock(&intf->beacon_skb_mutex);
a2c9b652
ID
590 return 0;
591 }
592
bd88a781 593 intf->beacon->skb = ieee80211_beacon_get(rt2x00dev->hw, vif);
17512dc3
IP
594 if (!intf->beacon->skb) {
595 mutex_unlock(&intf->beacon_skb_mutex);
bd88a781 596 return -ENOMEM;
17512dc3 597 }
bd88a781
ID
598
599 /*
600 * Copy all TX descriptor information into txdesc,
601 * after that we are free to use the skb->cb array
602 * for our information.
603 */
604 rt2x00queue_create_tx_descriptor(intf->beacon, &txdesc);
605
bd88a781
ID
606 /*
607 * Fill in skb descriptor
608 */
609 skbdesc = get_skb_frame_desc(intf->beacon->skb);
610 memset(skbdesc, 0, sizeof(*skbdesc));
bd88a781
ID
611 skbdesc->entry = intf->beacon;
612
bd88a781 613 /*
d61cb266 614 * Send beacon to hardware and enable beacon genaration..
bd88a781 615 */
f224f4ef 616 rt2x00dev->ops->lib->write_beacon(intf->beacon, &txdesc);
bd88a781 617
17512dc3
IP
618 mutex_unlock(&intf->beacon_skb_mutex);
619
bd88a781
ID
620 return 0;
621}
622
5eb7efe8
ID
623void rt2x00queue_for_each_entry(struct data_queue *queue,
624 enum queue_index start,
625 enum queue_index end,
626 void (*fn)(struct queue_entry *entry))
627{
628 unsigned long irqflags;
629 unsigned int index_start;
630 unsigned int index_end;
631 unsigned int i;
632
633 if (unlikely(start >= Q_INDEX_MAX || end >= Q_INDEX_MAX)) {
634 ERROR(queue->rt2x00dev,
635 "Entry requested from invalid index range (%d - %d)\n",
636 start, end);
637 return;
638 }
639
640 /*
641 * Only protect the range we are going to loop over,
642 * if during our loop a extra entry is set to pending
643 * it should not be kicked during this run, since it
644 * is part of another TX operation.
645 */
813f0339 646 spin_lock_irqsave(&queue->index_lock, irqflags);
5eb7efe8
ID
647 index_start = queue->index[start];
648 index_end = queue->index[end];
813f0339 649 spin_unlock_irqrestore(&queue->index_lock, irqflags);
5eb7efe8
ID
650
651 /*
652 * Start from the TX done pointer, this guarentees that we will
653 * send out all frames in the correct order.
654 */
655 if (index_start < index_end) {
656 for (i = index_start; i < index_end; i++)
657 fn(&queue->entries[i]);
658 } else {
659 for (i = index_start; i < queue->limit; i++)
660 fn(&queue->entries[i]);
661
662 for (i = 0; i < index_end; i++)
663 fn(&queue->entries[i]);
664 }
665}
666EXPORT_SYMBOL_GPL(rt2x00queue_for_each_entry);
667
181d6902 668struct data_queue *rt2x00queue_get_queue(struct rt2x00_dev *rt2x00dev,
e58c6aca 669 const enum data_queue_qid queue)
181d6902
ID
670{
671 int atim = test_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags);
672
a2c9b652
ID
673 if (queue == QID_RX)
674 return rt2x00dev->rx;
675
61448f88 676 if (queue < rt2x00dev->ops->tx_queues && rt2x00dev->tx)
181d6902
ID
677 return &rt2x00dev->tx[queue];
678
679 if (!rt2x00dev->bcn)
680 return NULL;
681
e58c6aca 682 if (queue == QID_BEACON)
181d6902 683 return &rt2x00dev->bcn[0];
e58c6aca 684 else if (queue == QID_ATIM && atim)
181d6902
ID
685 return &rt2x00dev->bcn[1];
686
687 return NULL;
688}
689EXPORT_SYMBOL_GPL(rt2x00queue_get_queue);
690
691struct queue_entry *rt2x00queue_get_entry(struct data_queue *queue,
692 enum queue_index index)
693{
694 struct queue_entry *entry;
5f46c4d0 695 unsigned long irqflags;
181d6902
ID
696
697 if (unlikely(index >= Q_INDEX_MAX)) {
698 ERROR(queue->rt2x00dev,
699 "Entry requested from invalid index type (%d)\n", index);
700 return NULL;
701 }
702
813f0339 703 spin_lock_irqsave(&queue->index_lock, irqflags);
181d6902
ID
704
705 entry = &queue->entries[queue->index[index]];
706
813f0339 707 spin_unlock_irqrestore(&queue->index_lock, irqflags);
181d6902
ID
708
709 return entry;
710}
711EXPORT_SYMBOL_GPL(rt2x00queue_get_entry);
712
713void rt2x00queue_index_inc(struct data_queue *queue, enum queue_index index)
714{
5f46c4d0
ID
715 unsigned long irqflags;
716
181d6902
ID
717 if (unlikely(index >= Q_INDEX_MAX)) {
718 ERROR(queue->rt2x00dev,
719 "Index change on invalid index type (%d)\n", index);
720 return;
721 }
722
813f0339 723 spin_lock_irqsave(&queue->index_lock, irqflags);
181d6902
ID
724
725 queue->index[index]++;
726 if (queue->index[index] >= queue->limit)
727 queue->index[index] = 0;
728
652a9dd2
ID
729 queue->last_action[index] = jiffies;
730
10b6b801
ID
731 if (index == Q_INDEX) {
732 queue->length++;
733 } else if (index == Q_INDEX_DONE) {
734 queue->length--;
55887511 735 queue->count++;
10b6b801 736 }
181d6902 737
813f0339 738 spin_unlock_irqrestore(&queue->index_lock, irqflags);
181d6902 739}
181d6902 740
0b7fde54
ID
741void rt2x00queue_pause_queue(struct data_queue *queue)
742{
743 if (!test_bit(DEVICE_STATE_PRESENT, &queue->rt2x00dev->flags) ||
744 !test_bit(QUEUE_STARTED, &queue->flags) ||
745 test_and_set_bit(QUEUE_PAUSED, &queue->flags))
746 return;
747
748 switch (queue->qid) {
749 case QID_AC_BE:
750 case QID_AC_BK:
751 case QID_AC_VI:
752 case QID_AC_VO:
753 /*
754 * For TX queues, we have to disable the queue
755 * inside mac80211.
756 */
757 ieee80211_stop_queue(queue->rt2x00dev->hw, queue->qid);
758 break;
759 default:
760 break;
761 }
762}
763EXPORT_SYMBOL_GPL(rt2x00queue_pause_queue);
764
765void rt2x00queue_unpause_queue(struct data_queue *queue)
766{
767 if (!test_bit(DEVICE_STATE_PRESENT, &queue->rt2x00dev->flags) ||
768 !test_bit(QUEUE_STARTED, &queue->flags) ||
769 !test_and_clear_bit(QUEUE_PAUSED, &queue->flags))
770 return;
771
772 switch (queue->qid) {
773 case QID_AC_BE:
774 case QID_AC_BK:
775 case QID_AC_VI:
776 case QID_AC_VO:
777 /*
778 * For TX queues, we have to enable the queue
779 * inside mac80211.
780 */
781 ieee80211_wake_queue(queue->rt2x00dev->hw, queue->qid);
782 break;
783 default:
784 break;
785 }
786}
787EXPORT_SYMBOL_GPL(rt2x00queue_unpause_queue);
788
789void rt2x00queue_start_queue(struct data_queue *queue)
790{
791 mutex_lock(&queue->status_lock);
792
793 if (!test_bit(DEVICE_STATE_PRESENT, &queue->rt2x00dev->flags) ||
794 test_and_set_bit(QUEUE_STARTED, &queue->flags)) {
795 mutex_unlock(&queue->status_lock);
796 return;
797 }
798
799 set_bit(QUEUE_PAUSED, &queue->flags);
800
801 queue->rt2x00dev->ops->lib->start_queue(queue);
802
803 rt2x00queue_unpause_queue(queue);
804
805 mutex_unlock(&queue->status_lock);
806}
807EXPORT_SYMBOL_GPL(rt2x00queue_start_queue);
808
809void rt2x00queue_stop_queue(struct data_queue *queue)
810{
811 mutex_lock(&queue->status_lock);
812
813 if (!test_and_clear_bit(QUEUE_STARTED, &queue->flags)) {
814 mutex_unlock(&queue->status_lock);
815 return;
816 }
817
818 rt2x00queue_pause_queue(queue);
819
820 queue->rt2x00dev->ops->lib->stop_queue(queue);
821
822 mutex_unlock(&queue->status_lock);
823}
824EXPORT_SYMBOL_GPL(rt2x00queue_stop_queue);
825
826void rt2x00queue_start_queues(struct rt2x00_dev *rt2x00dev)
827{
828 struct data_queue *queue;
829
830 /*
831 * rt2x00queue_start_queue will call ieee80211_wake_queue
832 * for each queue after is has been properly initialized.
833 */
834 tx_queue_for_each(rt2x00dev, queue)
835 rt2x00queue_start_queue(queue);
836
837 rt2x00queue_start_queue(rt2x00dev->rx);
838}
839EXPORT_SYMBOL_GPL(rt2x00queue_start_queues);
840
841void rt2x00queue_stop_queues(struct rt2x00_dev *rt2x00dev)
842{
843 struct data_queue *queue;
844
845 /*
846 * rt2x00queue_stop_queue will call ieee80211_stop_queue
847 * as well, but we are completely shutting doing everything
848 * now, so it is much safer to stop all TX queues at once,
849 * and use rt2x00queue_stop_queue for cleaning up.
850 */
851 ieee80211_stop_queues(rt2x00dev->hw);
852
853 tx_queue_for_each(rt2x00dev, queue)
854 rt2x00queue_stop_queue(queue);
855
856 rt2x00queue_stop_queue(rt2x00dev->rx);
857}
858EXPORT_SYMBOL_GPL(rt2x00queue_stop_queues);
859
181d6902
ID
860static void rt2x00queue_reset(struct data_queue *queue)
861{
5f46c4d0 862 unsigned long irqflags;
652a9dd2 863 unsigned int i;
5f46c4d0 864
813f0339 865 spin_lock_irqsave(&queue->index_lock, irqflags);
181d6902
ID
866
867 queue->count = 0;
868 queue->length = 0;
652a9dd2
ID
869
870 for (i = 0; i < Q_INDEX_MAX; i++) {
871 queue->index[i] = 0;
872 queue->last_action[i] = jiffies;
873 }
181d6902 874
813f0339 875 spin_unlock_irqrestore(&queue->index_lock, irqflags);
181d6902
ID
876}
877
798b7adb 878void rt2x00queue_init_queues(struct rt2x00_dev *rt2x00dev)
181d6902
ID
879{
880 struct data_queue *queue;
881 unsigned int i;
882
798b7adb 883 queue_for_each(rt2x00dev, queue) {
181d6902
ID
884 rt2x00queue_reset(queue);
885
9c0ab712 886 for (i = 0; i < queue->limit; i++) {
798b7adb 887 rt2x00dev->ops->lib->clear_entry(&queue->entries[i]);
7e613e16
ID
888 if (queue->qid == QID_RX)
889 rt2x00queue_index_inc(queue, Q_INDEX);
9c0ab712 890 }
181d6902
ID
891 }
892}
893
894static int rt2x00queue_alloc_entries(struct data_queue *queue,
895 const struct data_queue_desc *qdesc)
896{
897 struct queue_entry *entries;
898 unsigned int entry_size;
899 unsigned int i;
900
901 rt2x00queue_reset(queue);
902
903 queue->limit = qdesc->entry_num;
b869767b 904 queue->threshold = DIV_ROUND_UP(qdesc->entry_num, 10);
181d6902
ID
905 queue->data_size = qdesc->data_size;
906 queue->desc_size = qdesc->desc_size;
907
908 /*
909 * Allocate all queue entries.
910 */
911 entry_size = sizeof(*entries) + qdesc->priv_size;
baeb2ffa 912 entries = kcalloc(queue->limit, entry_size, GFP_KERNEL);
181d6902
ID
913 if (!entries)
914 return -ENOMEM;
915
916#define QUEUE_ENTRY_PRIV_OFFSET(__base, __index, __limit, __esize, __psize) \
f8bfbc31
ME
917 (((char *)(__base)) + ((__limit) * (__esize)) + \
918 ((__index) * (__psize)))
181d6902
ID
919
920 for (i = 0; i < queue->limit; i++) {
921 entries[i].flags = 0;
922 entries[i].queue = queue;
923 entries[i].skb = NULL;
924 entries[i].entry_idx = i;
925 entries[i].priv_data =
926 QUEUE_ENTRY_PRIV_OFFSET(entries, i, queue->limit,
927 sizeof(*entries), qdesc->priv_size);
928 }
929
930#undef QUEUE_ENTRY_PRIV_OFFSET
931
932 queue->entries = entries;
933
934 return 0;
935}
936
fa69560f 937static void rt2x00queue_free_skbs(struct data_queue *queue)
30caa6e3
GW
938{
939 unsigned int i;
940
941 if (!queue->entries)
942 return;
943
944 for (i = 0; i < queue->limit; i++) {
fa69560f 945 rt2x00queue_free_skb(&queue->entries[i]);
30caa6e3
GW
946 }
947}
948
fa69560f 949static int rt2x00queue_alloc_rxskbs(struct data_queue *queue)
30caa6e3
GW
950{
951 unsigned int i;
952 struct sk_buff *skb;
953
954 for (i = 0; i < queue->limit; i++) {
fa69560f 955 skb = rt2x00queue_alloc_rxskb(&queue->entries[i]);
30caa6e3 956 if (!skb)
61243d8e 957 return -ENOMEM;
30caa6e3
GW
958 queue->entries[i].skb = skb;
959 }
960
961 return 0;
30caa6e3
GW
962}
963
181d6902
ID
964int rt2x00queue_initialize(struct rt2x00_dev *rt2x00dev)
965{
966 struct data_queue *queue;
967 int status;
968
181d6902
ID
969 status = rt2x00queue_alloc_entries(rt2x00dev->rx, rt2x00dev->ops->rx);
970 if (status)
971 goto exit;
972
973 tx_queue_for_each(rt2x00dev, queue) {
974 status = rt2x00queue_alloc_entries(queue, rt2x00dev->ops->tx);
975 if (status)
976 goto exit;
977 }
978
979 status = rt2x00queue_alloc_entries(rt2x00dev->bcn, rt2x00dev->ops->bcn);
980 if (status)
981 goto exit;
982
30caa6e3
GW
983 if (test_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags)) {
984 status = rt2x00queue_alloc_entries(&rt2x00dev->bcn[1],
985 rt2x00dev->ops->atim);
986 if (status)
987 goto exit;
988 }
181d6902 989
fa69560f 990 status = rt2x00queue_alloc_rxskbs(rt2x00dev->rx);
181d6902
ID
991 if (status)
992 goto exit;
993
994 return 0;
995
996exit:
997 ERROR(rt2x00dev, "Queue entries allocation failed.\n");
998
999 rt2x00queue_uninitialize(rt2x00dev);
1000
1001 return status;
1002}
1003
1004void rt2x00queue_uninitialize(struct rt2x00_dev *rt2x00dev)
1005{
1006 struct data_queue *queue;
1007
fa69560f 1008 rt2x00queue_free_skbs(rt2x00dev->rx);
30caa6e3 1009
181d6902
ID
1010 queue_for_each(rt2x00dev, queue) {
1011 kfree(queue->entries);
1012 queue->entries = NULL;
1013 }
1014}
1015
8f539276
ID
1016static void rt2x00queue_init(struct rt2x00_dev *rt2x00dev,
1017 struct data_queue *queue, enum data_queue_qid qid)
1018{
0b7fde54 1019 mutex_init(&queue->status_lock);
813f0339 1020 spin_lock_init(&queue->index_lock);
8f539276
ID
1021
1022 queue->rt2x00dev = rt2x00dev;
1023 queue->qid = qid;
2af0a570 1024 queue->txop = 0;
8f539276
ID
1025 queue->aifs = 2;
1026 queue->cw_min = 5;
1027 queue->cw_max = 10;
1028}
1029
181d6902
ID
1030int rt2x00queue_allocate(struct rt2x00_dev *rt2x00dev)
1031{
1032 struct data_queue *queue;
1033 enum data_queue_qid qid;
1034 unsigned int req_atim =
1035 !!test_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags);
1036
1037 /*
1038 * We need the following queues:
1039 * RX: 1
61448f88 1040 * TX: ops->tx_queues
181d6902
ID
1041 * Beacon: 1
1042 * Atim: 1 (if required)
1043 */
61448f88 1044 rt2x00dev->data_queues = 2 + rt2x00dev->ops->tx_queues + req_atim;
181d6902 1045
baeb2ffa 1046 queue = kcalloc(rt2x00dev->data_queues, sizeof(*queue), GFP_KERNEL);
181d6902
ID
1047 if (!queue) {
1048 ERROR(rt2x00dev, "Queue allocation failed.\n");
1049 return -ENOMEM;
1050 }
1051
1052 /*
1053 * Initialize pointers
1054 */
1055 rt2x00dev->rx = queue;
1056 rt2x00dev->tx = &queue[1];
61448f88 1057 rt2x00dev->bcn = &queue[1 + rt2x00dev->ops->tx_queues];
181d6902
ID
1058
1059 /*
1060 * Initialize queue parameters.
1061 * RX: qid = QID_RX
1062 * TX: qid = QID_AC_BE + index
1063 * TX: cw_min: 2^5 = 32.
1064 * TX: cw_max: 2^10 = 1024.
565a019a
ID
1065 * BCN: qid = QID_BEACON
1066 * ATIM: qid = QID_ATIM
181d6902 1067 */
8f539276 1068 rt2x00queue_init(rt2x00dev, rt2x00dev->rx, QID_RX);
181d6902 1069
8f539276
ID
1070 qid = QID_AC_BE;
1071 tx_queue_for_each(rt2x00dev, queue)
1072 rt2x00queue_init(rt2x00dev, queue, qid++);
181d6902 1073
565a019a 1074 rt2x00queue_init(rt2x00dev, &rt2x00dev->bcn[0], QID_BEACON);
181d6902 1075 if (req_atim)
565a019a 1076 rt2x00queue_init(rt2x00dev, &rt2x00dev->bcn[1], QID_ATIM);
181d6902
ID
1077
1078 return 0;
1079}
1080
1081void rt2x00queue_free(struct rt2x00_dev *rt2x00dev)
1082{
1083 kfree(rt2x00dev->rx);
1084 rt2x00dev->rx = NULL;
1085 rt2x00dev->tx = NULL;
1086 rt2x00dev->bcn = NULL;
1087}
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