rt2x00: Fix check for BSS info changes
[deliverable/linux.git] / drivers / net / wireless / rt2x00 / rt2x00queue.c
CommitLineData
181d6902
ID
1/*
2 Copyright (C) 2004 - 2008 rt2x00 SourceForge Project
3 <http://rt2x00.serialmonkey.com>
4
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
9
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
14
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the
17 Free Software Foundation, Inc.,
18 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19 */
20
21/*
22 Module: rt2x00lib
23 Abstract: rt2x00 queue specific routines.
24 */
25
26#include <linux/kernel.h>
27#include <linux/module.h>
c4da0048 28#include <linux/dma-mapping.h>
181d6902
ID
29
30#include "rt2x00.h"
31#include "rt2x00lib.h"
32
c4da0048
GW
33struct sk_buff *rt2x00queue_alloc_rxskb(struct rt2x00_dev *rt2x00dev,
34 struct queue_entry *entry)
239c249d 35{
c4da0048
GW
36 struct sk_buff *skb;
37 struct skb_frame_desc *skbdesc;
2bb057d0
ID
38 unsigned int frame_size;
39 unsigned int head_size = 0;
40 unsigned int tail_size = 0;
239c249d
GW
41
42 /*
43 * The frame size includes descriptor size, because the
44 * hardware directly receive the frame into the skbuffer.
45 */
c4da0048 46 frame_size = entry->queue->data_size + entry->queue->desc_size;
239c249d
GW
47
48 /*
ff352391
ID
49 * The payload should be aligned to a 4-byte boundary,
50 * this means we need at least 3 bytes for moving the frame
51 * into the correct offset.
239c249d 52 */
2bb057d0
ID
53 head_size = 4;
54
55 /*
56 * For IV/EIV/ICV assembly we must make sure there is
57 * at least 8 bytes bytes available in headroom for IV/EIV
58 * and 4 bytes for ICV data as tailroon.
59 */
60#ifdef CONFIG_RT2X00_LIB_CRYPTO
61 if (test_bit(CONFIG_SUPPORT_HW_CRYPTO, &rt2x00dev->flags)) {
62 head_size += 8;
63 tail_size += 4;
64 }
65#endif /* CONFIG_RT2X00_LIB_CRYPTO */
239c249d
GW
66
67 /*
68 * Allocate skbuffer.
69 */
2bb057d0 70 skb = dev_alloc_skb(frame_size + head_size + tail_size);
239c249d
GW
71 if (!skb)
72 return NULL;
73
2bb057d0
ID
74 /*
75 * Make sure we not have a frame with the requested bytes
76 * available in the head and tail.
77 */
78 skb_reserve(skb, head_size);
239c249d
GW
79 skb_put(skb, frame_size);
80
c4da0048
GW
81 /*
82 * Populate skbdesc.
83 */
84 skbdesc = get_skb_frame_desc(skb);
85 memset(skbdesc, 0, sizeof(*skbdesc));
86 skbdesc->entry = entry;
87
88 if (test_bit(DRIVER_REQUIRE_DMA, &rt2x00dev->flags)) {
89 skbdesc->skb_dma = dma_map_single(rt2x00dev->dev,
90 skb->data,
91 skb->len,
92 DMA_FROM_DEVICE);
93 skbdesc->flags |= SKBDESC_DMA_MAPPED_RX;
94 }
95
239c249d
GW
96 return skb;
97}
30caa6e3 98
c4da0048 99void rt2x00queue_map_txskb(struct rt2x00_dev *rt2x00dev, struct sk_buff *skb)
30caa6e3 100{
c4da0048
GW
101 struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb);
102
3ee54a07
ID
103 /*
104 * If device has requested headroom, we should make sure that
105 * is also mapped to the DMA so it can be used for transfering
106 * additional descriptor information to the hardware.
107 */
108 skb_push(skb, rt2x00dev->hw->extra_tx_headroom);
109
110 skbdesc->skb_dma =
111 dma_map_single(rt2x00dev->dev, skb->data, skb->len, DMA_TO_DEVICE);
112
113 /*
114 * Restore data pointer to original location again.
115 */
116 skb_pull(skb, rt2x00dev->hw->extra_tx_headroom);
117
c4da0048
GW
118 skbdesc->flags |= SKBDESC_DMA_MAPPED_TX;
119}
120EXPORT_SYMBOL_GPL(rt2x00queue_map_txskb);
121
122void rt2x00queue_unmap_skb(struct rt2x00_dev *rt2x00dev, struct sk_buff *skb)
123{
124 struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb);
125
126 if (skbdesc->flags & SKBDESC_DMA_MAPPED_RX) {
127 dma_unmap_single(rt2x00dev->dev, skbdesc->skb_dma, skb->len,
128 DMA_FROM_DEVICE);
129 skbdesc->flags &= ~SKBDESC_DMA_MAPPED_RX;
130 }
131
132 if (skbdesc->flags & SKBDESC_DMA_MAPPED_TX) {
3ee54a07
ID
133 /*
134 * Add headroom to the skb length, it has been removed
135 * by the driver, but it was actually mapped to DMA.
136 */
137 dma_unmap_single(rt2x00dev->dev, skbdesc->skb_dma,
138 skb->len + rt2x00dev->hw->extra_tx_headroom,
c4da0048
GW
139 DMA_TO_DEVICE);
140 skbdesc->flags &= ~SKBDESC_DMA_MAPPED_TX;
141 }
142}
c4da0048
GW
143
144void rt2x00queue_free_skb(struct rt2x00_dev *rt2x00dev, struct sk_buff *skb)
145{
9a613195
ID
146 if (!skb)
147 return;
148
61243d8e 149 rt2x00queue_unmap_skb(rt2x00dev, skb);
30caa6e3
GW
150 dev_kfree_skb_any(skb);
151}
239c249d 152
bd88a781
ID
153static void rt2x00queue_create_tx_descriptor(struct queue_entry *entry,
154 struct txentry_desc *txdesc)
7050ec82 155{
2e92e6f2 156 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
e039fa4a 157 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(entry->skb);
7050ec82 158 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)entry->skb->data;
2e92e6f2 159 struct ieee80211_rate *rate =
e039fa4a 160 ieee80211_get_tx_rate(rt2x00dev->hw, tx_info);
7050ec82
ID
161 const struct rt2x00_rate *hwrate;
162 unsigned int data_length;
163 unsigned int duration;
164 unsigned int residual;
d4764b29 165 unsigned long irqflags;
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ID
166
167 memset(txdesc, 0, sizeof(*txdesc));
168
169 /*
170 * Initialize information from queue
171 */
172 txdesc->queue = entry->queue->qid;
173 txdesc->cw_min = entry->queue->cw_min;
174 txdesc->cw_max = entry->queue->cw_max;
175 txdesc->aifs = entry->queue->aifs;
176
2bb057d0 177 /* Data length + CRC + IV/EIV/ICV/MMIC (when using encryption) */
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ID
178 data_length = entry->skb->len + 4;
179
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ID
180 /*
181 * Check whether this frame is to be acked.
182 */
e039fa4a 183 if (!(tx_info->flags & IEEE80211_TX_CTL_NO_ACK))
7050ec82
ID
184 __set_bit(ENTRY_TXD_ACK, &txdesc->flags);
185
2bb057d0
ID
186#ifdef CONFIG_RT2X00_LIB_CRYPTO
187 if (test_bit(CONFIG_SUPPORT_HW_CRYPTO, &rt2x00dev->flags) &&
188 !entry->skb->do_not_encrypt) {
189 struct ieee80211_key_conf *hw_key = tx_info->control.hw_key;
190
191 __set_bit(ENTRY_TXD_ENCRYPT, &txdesc->flags);
192
193 txdesc->cipher = rt2x00crypto_key_to_cipher(hw_key);
194
195 if (hw_key->flags & IEEE80211_KEY_FLAG_PAIRWISE)
196 __set_bit(ENTRY_TXD_ENCRYPT_PAIRWISE, &txdesc->flags);
197
198 txdesc->key_idx = hw_key->hw_key_idx;
199 txdesc->iv_offset = ieee80211_get_hdrlen_from_skb(entry->skb);
200
201 /*
202 * Extend frame length to include all encryption overhead
203 * that will be added by the hardware.
204 */
205 data_length += rt2x00crypto_tx_overhead(tx_info);
206
207 if (!(hw_key->flags & IEEE80211_KEY_FLAG_GENERATE_IV))
208 __set_bit(ENTRY_TXD_ENCRYPT_IV, &txdesc->flags);
209
210 if (!(hw_key->flags & IEEE80211_KEY_FLAG_GENERATE_MMIC))
211 __set_bit(ENTRY_TXD_ENCRYPT_MMIC, &txdesc->flags);
212 }
213#endif /* CONFIG_RT2X00_LIB_CRYPTO */
214
7050ec82
ID
215 /*
216 * Check if this is a RTS/CTS frame
217 */
ac104462
ID
218 if (ieee80211_is_rts(hdr->frame_control) ||
219 ieee80211_is_cts(hdr->frame_control)) {
7050ec82 220 __set_bit(ENTRY_TXD_BURST, &txdesc->flags);
ac104462 221 if (ieee80211_is_rts(hdr->frame_control))
7050ec82 222 __set_bit(ENTRY_TXD_RTS_FRAME, &txdesc->flags);
e039fa4a 223 else
7050ec82 224 __set_bit(ENTRY_TXD_CTS_FRAME, &txdesc->flags);
e039fa4a 225 if (tx_info->control.rts_cts_rate_idx >= 0)
2e92e6f2 226 rate =
e039fa4a 227 ieee80211_get_rts_cts_rate(rt2x00dev->hw, tx_info);
7050ec82
ID
228 }
229
230 /*
231 * Determine retry information.
232 */
e6a9854b 233 txdesc->retry_limit = tx_info->control.rates[0].count - 1;
42c82857 234 if (txdesc->retry_limit >= rt2x00dev->long_retry)
7050ec82
ID
235 __set_bit(ENTRY_TXD_RETRY_MODE, &txdesc->flags);
236
237 /*
238 * Check if more fragments are pending
239 */
8b7b1e05 240 if (ieee80211_has_morefrags(hdr->frame_control)) {
7050ec82
ID
241 __set_bit(ENTRY_TXD_BURST, &txdesc->flags);
242 __set_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags);
243 }
244
245 /*
246 * Beacons and probe responses require the tsf timestamp
247 * to be inserted into the frame.
248 */
ac104462
ID
249 if (ieee80211_is_beacon(hdr->frame_control) ||
250 ieee80211_is_probe_resp(hdr->frame_control))
7050ec82
ID
251 __set_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags);
252
253 /*
254 * Determine with what IFS priority this frame should be send.
255 * Set ifs to IFS_SIFS when the this is not the first fragment,
256 * or this fragment came after RTS/CTS.
257 */
258 if (test_bit(ENTRY_TXD_RTS_FRAME, &txdesc->flags)) {
259 txdesc->ifs = IFS_SIFS;
e039fa4a 260 } else if (tx_info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT) {
7050ec82
ID
261 __set_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags);
262 txdesc->ifs = IFS_BACKOFF;
263 } else {
264 txdesc->ifs = IFS_SIFS;
265 }
266
5adf6d63
ID
267 /*
268 * Hardware should insert sequence counter.
269 * FIXME: We insert a software sequence counter first for
270 * hardware that doesn't support hardware sequence counting.
271 *
272 * This is wrong because beacons are not getting sequence
273 * numbers assigned properly.
274 *
275 * A secondary problem exists for drivers that cannot toggle
276 * sequence counting per-frame, since those will override the
277 * sequence counter given by mac80211.
278 */
279 if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
25d834e1
JB
280 if (likely(tx_info->control.vif)) {
281 struct rt2x00_intf *intf;
5adf6d63 282
25d834e1 283 intf = vif_to_intf(tx_info->control.vif);
5adf6d63 284
25d834e1 285 spin_lock_irqsave(&intf->seqlock, irqflags);
5adf6d63 286
25d834e1
JB
287 if (test_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags))
288 intf->seqno += 0x10;
289 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
290 hdr->seq_ctrl |= cpu_to_le16(intf->seqno);
291
292 spin_unlock_irqrestore(&intf->seqlock, irqflags);
293
294 __set_bit(ENTRY_TXD_GENERATE_SEQ, &txdesc->flags);
295 }
5adf6d63
ID
296 }
297
7050ec82
ID
298 /*
299 * PLCP setup
300 * Length calculation depends on OFDM/CCK rate.
301 */
302 hwrate = rt2x00_get_rate(rate->hw_value);
303 txdesc->signal = hwrate->plcp;
304 txdesc->service = 0x04;
305
306 if (hwrate->flags & DEV_RATE_OFDM) {
307 __set_bit(ENTRY_TXD_OFDM_RATE, &txdesc->flags);
308
309 txdesc->length_high = (data_length >> 6) & 0x3f;
310 txdesc->length_low = data_length & 0x3f;
311 } else {
312 /*
313 * Convert length to microseconds.
314 */
bad13639
ID
315 residual = GET_DURATION_RES(data_length, hwrate->bitrate);
316 duration = GET_DURATION(data_length, hwrate->bitrate);
7050ec82
ID
317
318 if (residual != 0) {
319 duration++;
320
321 /*
322 * Check if we need to set the Length Extension
323 */
324 if (hwrate->bitrate == 110 && residual <= 30)
325 txdesc->service |= 0x80;
326 }
327
328 txdesc->length_high = (duration >> 8) & 0xff;
329 txdesc->length_low = duration & 0xff;
330
331 /*
332 * When preamble is enabled we should set the
333 * preamble bit for the signal.
334 */
335 if (rt2x00_get_rate_preamble(rate->hw_value))
336 txdesc->signal |= 0x08;
337 }
338}
7050ec82 339
bd88a781
ID
340static void rt2x00queue_write_tx_descriptor(struct queue_entry *entry,
341 struct txentry_desc *txdesc)
7050ec82 342{
b869767b
ID
343 struct data_queue *queue = entry->queue;
344 struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;
7050ec82
ID
345
346 rt2x00dev->ops->lib->write_tx_desc(rt2x00dev, entry->skb, txdesc);
347
348 /*
349 * All processing on the frame has been completed, this means
350 * it is now ready to be dumped to userspace through debugfs.
351 */
352 rt2x00debug_dump_frame(rt2x00dev, DUMP_FRAME_TX, entry->skb);
353
354 /*
b869767b
ID
355 * Check if we need to kick the queue, there are however a few rules
356 * 1) Don't kick beacon queue
357 * 2) Don't kick unless this is the last in frame in a burst.
358 * When the burst flag is set, this frame is always followed
359 * by another frame which in some way are related to eachother.
360 * This is true for fragments, RTS or CTS-to-self frames.
361 * 3) Rule 2 can be broken when the available entries
362 * in the queue are less then a certain threshold.
7050ec82 363 */
b869767b
ID
364 if (entry->queue->qid == QID_BEACON)
365 return;
366
367 if (rt2x00queue_threshold(queue) ||
368 !test_bit(ENTRY_TXD_BURST, &txdesc->flags))
369 rt2x00dev->ops->lib->kick_tx_queue(rt2x00dev, queue->qid);
7050ec82 370}
7050ec82 371
6db3786a
ID
372int rt2x00queue_write_tx_frame(struct data_queue *queue, struct sk_buff *skb)
373{
e6a9854b 374 struct ieee80211_tx_info *tx_info;
6db3786a
ID
375 struct queue_entry *entry = rt2x00queue_get_entry(queue, Q_INDEX);
376 struct txentry_desc txdesc;
d74f5ba4 377 struct skb_frame_desc *skbdesc;
8713a7cc 378 unsigned int iv_len = 0;
e6a9854b 379 u8 rate_idx, rate_flags;
6db3786a
ID
380
381 if (unlikely(rt2x00queue_full(queue)))
0e3de998 382 return -ENOBUFS;
6db3786a 383
0262ab0d 384 if (test_and_set_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags)) {
6db3786a
ID
385 ERROR(queue->rt2x00dev,
386 "Arrived at non-free entry in the non-full queue %d.\n"
387 "Please file bug report to %s.\n",
388 queue->qid, DRV_PROJECT);
389 return -EINVAL;
390 }
391
392 /*
393 * Copy all TX descriptor information into txdesc,
394 * after that we are free to use the skb->cb array
395 * for our information.
396 */
397 entry->skb = skb;
398 rt2x00queue_create_tx_descriptor(entry, &txdesc);
399
8713a7cc
FF
400 if (IEEE80211_SKB_CB(skb)->control.hw_key != NULL)
401 iv_len = IEEE80211_SKB_CB(skb)->control.hw_key->iv_len;
402
d74f5ba4 403 /*
e6a9854b 404 * All information is retrieved from the skb->cb array,
2bb057d0 405 * now we should claim ownership of the driver part of that
e6a9854b 406 * array, preserving the bitrate index and flags.
d74f5ba4 407 */
e6a9854b
JB
408 tx_info = IEEE80211_SKB_CB(skb);
409 rate_idx = tx_info->control.rates[0].idx;
410 rate_flags = tx_info->control.rates[0].flags;
0e3de998 411 skbdesc = get_skb_frame_desc(skb);
d74f5ba4
ID
412 memset(skbdesc, 0, sizeof(*skbdesc));
413 skbdesc->entry = entry;
e6a9854b
JB
414 skbdesc->tx_rate_idx = rate_idx;
415 skbdesc->tx_rate_flags = rate_flags;
d74f5ba4 416
2bb057d0
ID
417 /*
418 * When hardware encryption is supported, and this frame
419 * is to be encrypted, we should strip the IV/EIV data from
420 * the frame so we can provide it to the driver seperately.
421 */
422 if (test_bit(ENTRY_TXD_ENCRYPT, &txdesc.flags) &&
dddfb478
ID
423 !test_bit(ENTRY_TXD_ENCRYPT_IV, &txdesc.flags)) {
424 if (test_bit(CONFIG_CRYPTO_COPY_IV, &queue->rt2x00dev->flags))
425 rt2x00crypto_tx_copy_iv(skb, iv_len);
426 else
427 rt2x00crypto_tx_remove_iv(skb, iv_len);
428 }
2bb057d0
ID
429
430 /*
431 * It could be possible that the queue was corrupted and this
0e3de998
ID
432 * call failed. Since we always return NETDEV_TX_OK to mac80211,
433 * this frame will simply be dropped.
2bb057d0 434 */
6db3786a 435 if (unlikely(queue->rt2x00dev->ops->lib->write_tx_data(entry))) {
0262ab0d 436 clear_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags);
2bb057d0 437 entry->skb = NULL;
0e3de998 438 return -EIO;
6db3786a
ID
439 }
440
d74f5ba4
ID
441 if (test_bit(DRIVER_REQUIRE_DMA, &queue->rt2x00dev->flags))
442 rt2x00queue_map_txskb(queue->rt2x00dev, skb);
443
0262ab0d 444 set_bit(ENTRY_DATA_PENDING, &entry->flags);
6db3786a
ID
445
446 rt2x00queue_index_inc(queue, Q_INDEX);
447 rt2x00queue_write_tx_descriptor(entry, &txdesc);
448
449 return 0;
450}
451
bd88a781
ID
452int rt2x00queue_update_beacon(struct rt2x00_dev *rt2x00dev,
453 struct ieee80211_vif *vif)
454{
455 struct rt2x00_intf *intf = vif_to_intf(vif);
456 struct skb_frame_desc *skbdesc;
457 struct txentry_desc txdesc;
458 __le32 desc[16];
459
460 if (unlikely(!intf->beacon))
461 return -ENOBUFS;
462
463 intf->beacon->skb = ieee80211_beacon_get(rt2x00dev->hw, vif);
464 if (!intf->beacon->skb)
465 return -ENOMEM;
466
467 /*
468 * Copy all TX descriptor information into txdesc,
469 * after that we are free to use the skb->cb array
470 * for our information.
471 */
472 rt2x00queue_create_tx_descriptor(intf->beacon, &txdesc);
473
474 /*
475 * For the descriptor we use a local array from where the
476 * driver can move it to the correct location required for
477 * the hardware.
478 */
479 memset(desc, 0, sizeof(desc));
480
481 /*
482 * Fill in skb descriptor
483 */
484 skbdesc = get_skb_frame_desc(intf->beacon->skb);
485 memset(skbdesc, 0, sizeof(*skbdesc));
486 skbdesc->desc = desc;
487 skbdesc->desc_len = intf->beacon->queue->desc_size;
488 skbdesc->entry = intf->beacon;
489
490 /*
491 * Write TX descriptor into reserved room in front of the beacon.
492 */
493 rt2x00queue_write_tx_descriptor(intf->beacon, &txdesc);
494
495 /*
496 * Send beacon to hardware.
497 * Also enable beacon generation, which might have been disabled
498 * by the driver during the config_beacon() callback function.
499 */
500 rt2x00dev->ops->lib->write_beacon(intf->beacon);
501 rt2x00dev->ops->lib->kick_tx_queue(rt2x00dev, QID_BEACON);
502
503 return 0;
504}
505
181d6902 506struct data_queue *rt2x00queue_get_queue(struct rt2x00_dev *rt2x00dev,
e58c6aca 507 const enum data_queue_qid queue)
181d6902
ID
508{
509 int atim = test_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags);
510
61448f88 511 if (queue < rt2x00dev->ops->tx_queues && rt2x00dev->tx)
181d6902
ID
512 return &rt2x00dev->tx[queue];
513
514 if (!rt2x00dev->bcn)
515 return NULL;
516
e58c6aca 517 if (queue == QID_BEACON)
181d6902 518 return &rt2x00dev->bcn[0];
e58c6aca 519 else if (queue == QID_ATIM && atim)
181d6902
ID
520 return &rt2x00dev->bcn[1];
521
522 return NULL;
523}
524EXPORT_SYMBOL_GPL(rt2x00queue_get_queue);
525
526struct queue_entry *rt2x00queue_get_entry(struct data_queue *queue,
527 enum queue_index index)
528{
529 struct queue_entry *entry;
5f46c4d0 530 unsigned long irqflags;
181d6902
ID
531
532 if (unlikely(index >= Q_INDEX_MAX)) {
533 ERROR(queue->rt2x00dev,
534 "Entry requested from invalid index type (%d)\n", index);
535 return NULL;
536 }
537
5f46c4d0 538 spin_lock_irqsave(&queue->lock, irqflags);
181d6902
ID
539
540 entry = &queue->entries[queue->index[index]];
541
5f46c4d0 542 spin_unlock_irqrestore(&queue->lock, irqflags);
181d6902
ID
543
544 return entry;
545}
546EXPORT_SYMBOL_GPL(rt2x00queue_get_entry);
547
548void rt2x00queue_index_inc(struct data_queue *queue, enum queue_index index)
549{
5f46c4d0
ID
550 unsigned long irqflags;
551
181d6902
ID
552 if (unlikely(index >= Q_INDEX_MAX)) {
553 ERROR(queue->rt2x00dev,
554 "Index change on invalid index type (%d)\n", index);
555 return;
556 }
557
5f46c4d0 558 spin_lock_irqsave(&queue->lock, irqflags);
181d6902
ID
559
560 queue->index[index]++;
561 if (queue->index[index] >= queue->limit)
562 queue->index[index] = 0;
563
10b6b801
ID
564 if (index == Q_INDEX) {
565 queue->length++;
566 } else if (index == Q_INDEX_DONE) {
567 queue->length--;
55887511 568 queue->count++;
10b6b801 569 }
181d6902 570
5f46c4d0 571 spin_unlock_irqrestore(&queue->lock, irqflags);
181d6902 572}
181d6902
ID
573
574static void rt2x00queue_reset(struct data_queue *queue)
575{
5f46c4d0
ID
576 unsigned long irqflags;
577
578 spin_lock_irqsave(&queue->lock, irqflags);
181d6902
ID
579
580 queue->count = 0;
581 queue->length = 0;
582 memset(queue->index, 0, sizeof(queue->index));
583
5f46c4d0 584 spin_unlock_irqrestore(&queue->lock, irqflags);
181d6902
ID
585}
586
798b7adb 587void rt2x00queue_init_queues(struct rt2x00_dev *rt2x00dev)
181d6902
ID
588{
589 struct data_queue *queue;
590 unsigned int i;
591
798b7adb 592 queue_for_each(rt2x00dev, queue) {
181d6902
ID
593 rt2x00queue_reset(queue);
594
9c0ab712
ID
595 for (i = 0; i < queue->limit; i++) {
596 queue->entries[i].flags = 0;
597
798b7adb 598 rt2x00dev->ops->lib->clear_entry(&queue->entries[i]);
9c0ab712 599 }
181d6902
ID
600 }
601}
602
603static int rt2x00queue_alloc_entries(struct data_queue *queue,
604 const struct data_queue_desc *qdesc)
605{
606 struct queue_entry *entries;
607 unsigned int entry_size;
608 unsigned int i;
609
610 rt2x00queue_reset(queue);
611
612 queue->limit = qdesc->entry_num;
b869767b 613 queue->threshold = DIV_ROUND_UP(qdesc->entry_num, 10);
181d6902
ID
614 queue->data_size = qdesc->data_size;
615 queue->desc_size = qdesc->desc_size;
616
617 /*
618 * Allocate all queue entries.
619 */
620 entry_size = sizeof(*entries) + qdesc->priv_size;
621 entries = kzalloc(queue->limit * entry_size, GFP_KERNEL);
622 if (!entries)
623 return -ENOMEM;
624
625#define QUEUE_ENTRY_PRIV_OFFSET(__base, __index, __limit, __esize, __psize) \
231be4e9
AB
626 ( ((char *)(__base)) + ((__limit) * (__esize)) + \
627 ((__index) * (__psize)) )
181d6902
ID
628
629 for (i = 0; i < queue->limit; i++) {
630 entries[i].flags = 0;
631 entries[i].queue = queue;
632 entries[i].skb = NULL;
633 entries[i].entry_idx = i;
634 entries[i].priv_data =
635 QUEUE_ENTRY_PRIV_OFFSET(entries, i, queue->limit,
636 sizeof(*entries), qdesc->priv_size);
637 }
638
639#undef QUEUE_ENTRY_PRIV_OFFSET
640
641 queue->entries = entries;
642
643 return 0;
644}
645
c4da0048
GW
646static void rt2x00queue_free_skbs(struct rt2x00_dev *rt2x00dev,
647 struct data_queue *queue)
30caa6e3
GW
648{
649 unsigned int i;
650
651 if (!queue->entries)
652 return;
653
654 for (i = 0; i < queue->limit; i++) {
655 if (queue->entries[i].skb)
c4da0048 656 rt2x00queue_free_skb(rt2x00dev, queue->entries[i].skb);
30caa6e3
GW
657 }
658}
659
c4da0048
GW
660static int rt2x00queue_alloc_rxskbs(struct rt2x00_dev *rt2x00dev,
661 struct data_queue *queue)
30caa6e3
GW
662{
663 unsigned int i;
664 struct sk_buff *skb;
665
666 for (i = 0; i < queue->limit; i++) {
c4da0048 667 skb = rt2x00queue_alloc_rxskb(rt2x00dev, &queue->entries[i]);
30caa6e3 668 if (!skb)
61243d8e 669 return -ENOMEM;
30caa6e3
GW
670 queue->entries[i].skb = skb;
671 }
672
673 return 0;
30caa6e3
GW
674}
675
181d6902
ID
676int rt2x00queue_initialize(struct rt2x00_dev *rt2x00dev)
677{
678 struct data_queue *queue;
679 int status;
680
181d6902
ID
681 status = rt2x00queue_alloc_entries(rt2x00dev->rx, rt2x00dev->ops->rx);
682 if (status)
683 goto exit;
684
685 tx_queue_for_each(rt2x00dev, queue) {
686 status = rt2x00queue_alloc_entries(queue, rt2x00dev->ops->tx);
687 if (status)
688 goto exit;
689 }
690
691 status = rt2x00queue_alloc_entries(rt2x00dev->bcn, rt2x00dev->ops->bcn);
692 if (status)
693 goto exit;
694
30caa6e3
GW
695 if (test_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags)) {
696 status = rt2x00queue_alloc_entries(&rt2x00dev->bcn[1],
697 rt2x00dev->ops->atim);
698 if (status)
699 goto exit;
700 }
181d6902 701
c4da0048 702 status = rt2x00queue_alloc_rxskbs(rt2x00dev, rt2x00dev->rx);
181d6902
ID
703 if (status)
704 goto exit;
705
706 return 0;
707
708exit:
709 ERROR(rt2x00dev, "Queue entries allocation failed.\n");
710
711 rt2x00queue_uninitialize(rt2x00dev);
712
713 return status;
714}
715
716void rt2x00queue_uninitialize(struct rt2x00_dev *rt2x00dev)
717{
718 struct data_queue *queue;
719
c4da0048 720 rt2x00queue_free_skbs(rt2x00dev, rt2x00dev->rx);
30caa6e3 721
181d6902
ID
722 queue_for_each(rt2x00dev, queue) {
723 kfree(queue->entries);
724 queue->entries = NULL;
725 }
726}
727
8f539276
ID
728static void rt2x00queue_init(struct rt2x00_dev *rt2x00dev,
729 struct data_queue *queue, enum data_queue_qid qid)
730{
731 spin_lock_init(&queue->lock);
732
733 queue->rt2x00dev = rt2x00dev;
734 queue->qid = qid;
2af0a570 735 queue->txop = 0;
8f539276
ID
736 queue->aifs = 2;
737 queue->cw_min = 5;
738 queue->cw_max = 10;
739}
740
181d6902
ID
741int rt2x00queue_allocate(struct rt2x00_dev *rt2x00dev)
742{
743 struct data_queue *queue;
744 enum data_queue_qid qid;
745 unsigned int req_atim =
746 !!test_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags);
747
748 /*
749 * We need the following queues:
750 * RX: 1
61448f88 751 * TX: ops->tx_queues
181d6902
ID
752 * Beacon: 1
753 * Atim: 1 (if required)
754 */
61448f88 755 rt2x00dev->data_queues = 2 + rt2x00dev->ops->tx_queues + req_atim;
181d6902
ID
756
757 queue = kzalloc(rt2x00dev->data_queues * sizeof(*queue), GFP_KERNEL);
758 if (!queue) {
759 ERROR(rt2x00dev, "Queue allocation failed.\n");
760 return -ENOMEM;
761 }
762
763 /*
764 * Initialize pointers
765 */
766 rt2x00dev->rx = queue;
767 rt2x00dev->tx = &queue[1];
61448f88 768 rt2x00dev->bcn = &queue[1 + rt2x00dev->ops->tx_queues];
181d6902
ID
769
770 /*
771 * Initialize queue parameters.
772 * RX: qid = QID_RX
773 * TX: qid = QID_AC_BE + index
774 * TX: cw_min: 2^5 = 32.
775 * TX: cw_max: 2^10 = 1024.
565a019a
ID
776 * BCN: qid = QID_BEACON
777 * ATIM: qid = QID_ATIM
181d6902 778 */
8f539276 779 rt2x00queue_init(rt2x00dev, rt2x00dev->rx, QID_RX);
181d6902 780
8f539276
ID
781 qid = QID_AC_BE;
782 tx_queue_for_each(rt2x00dev, queue)
783 rt2x00queue_init(rt2x00dev, queue, qid++);
181d6902 784
565a019a 785 rt2x00queue_init(rt2x00dev, &rt2x00dev->bcn[0], QID_BEACON);
181d6902 786 if (req_atim)
565a019a 787 rt2x00queue_init(rt2x00dev, &rt2x00dev->bcn[1], QID_ATIM);
181d6902
ID
788
789 return 0;
790}
791
792void rt2x00queue_free(struct rt2x00_dev *rt2x00dev)
793{
794 kfree(rt2x00dev->rx);
795 rt2x00dev->rx = NULL;
796 rt2x00dev->tx = NULL;
797 rt2x00dev->bcn = NULL;
798}
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