rt2x00: Only configure hardware when radio is enabled
[deliverable/linux.git] / drivers / net / wireless / rt2x00 / rt2x00queue.c
CommitLineData
181d6902
ID
1/*
2 Copyright (C) 2004 - 2008 rt2x00 SourceForge Project
3 <http://rt2x00.serialmonkey.com>
4
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
9
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
14
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the
17 Free Software Foundation, Inc.,
18 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19 */
20
21/*
22 Module: rt2x00lib
23 Abstract: rt2x00 queue specific routines.
24 */
25
26#include <linux/kernel.h>
27#include <linux/module.h>
c4da0048 28#include <linux/dma-mapping.h>
181d6902
ID
29
30#include "rt2x00.h"
31#include "rt2x00lib.h"
32
c4da0048
GW
33struct sk_buff *rt2x00queue_alloc_rxskb(struct rt2x00_dev *rt2x00dev,
34 struct queue_entry *entry)
239c249d 35{
c4da0048
GW
36 struct sk_buff *skb;
37 struct skb_frame_desc *skbdesc;
2bb057d0
ID
38 unsigned int frame_size;
39 unsigned int head_size = 0;
40 unsigned int tail_size = 0;
239c249d
GW
41
42 /*
43 * The frame size includes descriptor size, because the
44 * hardware directly receive the frame into the skbuffer.
45 */
c4da0048 46 frame_size = entry->queue->data_size + entry->queue->desc_size;
239c249d
GW
47
48 /*
ff352391
ID
49 * The payload should be aligned to a 4-byte boundary,
50 * this means we need at least 3 bytes for moving the frame
51 * into the correct offset.
239c249d 52 */
2bb057d0
ID
53 head_size = 4;
54
55 /*
56 * For IV/EIV/ICV assembly we must make sure there is
57 * at least 8 bytes bytes available in headroom for IV/EIV
58 * and 4 bytes for ICV data as tailroon.
59 */
60#ifdef CONFIG_RT2X00_LIB_CRYPTO
61 if (test_bit(CONFIG_SUPPORT_HW_CRYPTO, &rt2x00dev->flags)) {
62 head_size += 8;
63 tail_size += 4;
64 }
65#endif /* CONFIG_RT2X00_LIB_CRYPTO */
239c249d
GW
66
67 /*
68 * Allocate skbuffer.
69 */
2bb057d0 70 skb = dev_alloc_skb(frame_size + head_size + tail_size);
239c249d
GW
71 if (!skb)
72 return NULL;
73
2bb057d0
ID
74 /*
75 * Make sure we not have a frame with the requested bytes
76 * available in the head and tail.
77 */
78 skb_reserve(skb, head_size);
239c249d
GW
79 skb_put(skb, frame_size);
80
c4da0048
GW
81 /*
82 * Populate skbdesc.
83 */
84 skbdesc = get_skb_frame_desc(skb);
85 memset(skbdesc, 0, sizeof(*skbdesc));
86 skbdesc->entry = entry;
87
88 if (test_bit(DRIVER_REQUIRE_DMA, &rt2x00dev->flags)) {
89 skbdesc->skb_dma = dma_map_single(rt2x00dev->dev,
90 skb->data,
91 skb->len,
92 DMA_FROM_DEVICE);
93 skbdesc->flags |= SKBDESC_DMA_MAPPED_RX;
94 }
95
239c249d
GW
96 return skb;
97}
30caa6e3 98
c4da0048 99void rt2x00queue_map_txskb(struct rt2x00_dev *rt2x00dev, struct sk_buff *skb)
30caa6e3 100{
c4da0048
GW
101 struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb);
102
3ee54a07
ID
103 /*
104 * If device has requested headroom, we should make sure that
105 * is also mapped to the DMA so it can be used for transfering
106 * additional descriptor information to the hardware.
107 */
108 skb_push(skb, rt2x00dev->hw->extra_tx_headroom);
109
110 skbdesc->skb_dma =
111 dma_map_single(rt2x00dev->dev, skb->data, skb->len, DMA_TO_DEVICE);
112
113 /*
114 * Restore data pointer to original location again.
115 */
116 skb_pull(skb, rt2x00dev->hw->extra_tx_headroom);
117
c4da0048
GW
118 skbdesc->flags |= SKBDESC_DMA_MAPPED_TX;
119}
120EXPORT_SYMBOL_GPL(rt2x00queue_map_txskb);
121
122void rt2x00queue_unmap_skb(struct rt2x00_dev *rt2x00dev, struct sk_buff *skb)
123{
124 struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb);
125
126 if (skbdesc->flags & SKBDESC_DMA_MAPPED_RX) {
127 dma_unmap_single(rt2x00dev->dev, skbdesc->skb_dma, skb->len,
128 DMA_FROM_DEVICE);
129 skbdesc->flags &= ~SKBDESC_DMA_MAPPED_RX;
130 }
131
132 if (skbdesc->flags & SKBDESC_DMA_MAPPED_TX) {
3ee54a07
ID
133 /*
134 * Add headroom to the skb length, it has been removed
135 * by the driver, but it was actually mapped to DMA.
136 */
137 dma_unmap_single(rt2x00dev->dev, skbdesc->skb_dma,
138 skb->len + rt2x00dev->hw->extra_tx_headroom,
c4da0048
GW
139 DMA_TO_DEVICE);
140 skbdesc->flags &= ~SKBDESC_DMA_MAPPED_TX;
141 }
142}
c4da0048
GW
143
144void rt2x00queue_free_skb(struct rt2x00_dev *rt2x00dev, struct sk_buff *skb)
145{
9a613195
ID
146 if (!skb)
147 return;
148
61243d8e 149 rt2x00queue_unmap_skb(rt2x00dev, skb);
30caa6e3
GW
150 dev_kfree_skb_any(skb);
151}
239c249d 152
bd88a781
ID
153static void rt2x00queue_create_tx_descriptor(struct queue_entry *entry,
154 struct txentry_desc *txdesc)
7050ec82 155{
2e92e6f2 156 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
e039fa4a 157 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(entry->skb);
5adf6d63 158 struct rt2x00_intf *intf = vif_to_intf(tx_info->control.vif);
7050ec82 159 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)entry->skb->data;
2e92e6f2 160 struct ieee80211_rate *rate =
e039fa4a 161 ieee80211_get_tx_rate(rt2x00dev->hw, tx_info);
7050ec82
ID
162 const struct rt2x00_rate *hwrate;
163 unsigned int data_length;
164 unsigned int duration;
165 unsigned int residual;
d4764b29 166 unsigned long irqflags;
7050ec82
ID
167
168 memset(txdesc, 0, sizeof(*txdesc));
169
170 /*
171 * Initialize information from queue
172 */
173 txdesc->queue = entry->queue->qid;
174 txdesc->cw_min = entry->queue->cw_min;
175 txdesc->cw_max = entry->queue->cw_max;
176 txdesc->aifs = entry->queue->aifs;
177
2bb057d0 178 /* Data length + CRC + IV/EIV/ICV/MMIC (when using encryption) */
7050ec82
ID
179 data_length = entry->skb->len + 4;
180
7050ec82
ID
181 /*
182 * Check whether this frame is to be acked.
183 */
e039fa4a 184 if (!(tx_info->flags & IEEE80211_TX_CTL_NO_ACK))
7050ec82
ID
185 __set_bit(ENTRY_TXD_ACK, &txdesc->flags);
186
2bb057d0
ID
187#ifdef CONFIG_RT2X00_LIB_CRYPTO
188 if (test_bit(CONFIG_SUPPORT_HW_CRYPTO, &rt2x00dev->flags) &&
189 !entry->skb->do_not_encrypt) {
190 struct ieee80211_key_conf *hw_key = tx_info->control.hw_key;
191
192 __set_bit(ENTRY_TXD_ENCRYPT, &txdesc->flags);
193
194 txdesc->cipher = rt2x00crypto_key_to_cipher(hw_key);
195
196 if (hw_key->flags & IEEE80211_KEY_FLAG_PAIRWISE)
197 __set_bit(ENTRY_TXD_ENCRYPT_PAIRWISE, &txdesc->flags);
198
199 txdesc->key_idx = hw_key->hw_key_idx;
200 txdesc->iv_offset = ieee80211_get_hdrlen_from_skb(entry->skb);
201
202 /*
203 * Extend frame length to include all encryption overhead
204 * that will be added by the hardware.
205 */
206 data_length += rt2x00crypto_tx_overhead(tx_info);
207
208 if (!(hw_key->flags & IEEE80211_KEY_FLAG_GENERATE_IV))
209 __set_bit(ENTRY_TXD_ENCRYPT_IV, &txdesc->flags);
210
211 if (!(hw_key->flags & IEEE80211_KEY_FLAG_GENERATE_MMIC))
212 __set_bit(ENTRY_TXD_ENCRYPT_MMIC, &txdesc->flags);
213 }
214#endif /* CONFIG_RT2X00_LIB_CRYPTO */
215
7050ec82
ID
216 /*
217 * Check if this is a RTS/CTS frame
218 */
ac104462
ID
219 if (ieee80211_is_rts(hdr->frame_control) ||
220 ieee80211_is_cts(hdr->frame_control)) {
7050ec82 221 __set_bit(ENTRY_TXD_BURST, &txdesc->flags);
ac104462 222 if (ieee80211_is_rts(hdr->frame_control))
7050ec82 223 __set_bit(ENTRY_TXD_RTS_FRAME, &txdesc->flags);
e039fa4a 224 else
7050ec82 225 __set_bit(ENTRY_TXD_CTS_FRAME, &txdesc->flags);
e039fa4a 226 if (tx_info->control.rts_cts_rate_idx >= 0)
2e92e6f2 227 rate =
e039fa4a 228 ieee80211_get_rts_cts_rate(rt2x00dev->hw, tx_info);
7050ec82
ID
229 }
230
231 /*
232 * Determine retry information.
233 */
e039fa4a
JB
234 txdesc->retry_limit = tx_info->control.retry_limit;
235 if (tx_info->flags & IEEE80211_TX_CTL_LONG_RETRY_LIMIT)
7050ec82
ID
236 __set_bit(ENTRY_TXD_RETRY_MODE, &txdesc->flags);
237
238 /*
239 * Check if more fragments are pending
240 */
8b7b1e05 241 if (ieee80211_has_morefrags(hdr->frame_control)) {
7050ec82
ID
242 __set_bit(ENTRY_TXD_BURST, &txdesc->flags);
243 __set_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags);
244 }
245
246 /*
247 * Beacons and probe responses require the tsf timestamp
248 * to be inserted into the frame.
249 */
ac104462
ID
250 if (ieee80211_is_beacon(hdr->frame_control) ||
251 ieee80211_is_probe_resp(hdr->frame_control))
7050ec82
ID
252 __set_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags);
253
254 /*
255 * Determine with what IFS priority this frame should be send.
256 * Set ifs to IFS_SIFS when the this is not the first fragment,
257 * or this fragment came after RTS/CTS.
258 */
259 if (test_bit(ENTRY_TXD_RTS_FRAME, &txdesc->flags)) {
260 txdesc->ifs = IFS_SIFS;
e039fa4a 261 } else if (tx_info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT) {
7050ec82
ID
262 __set_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags);
263 txdesc->ifs = IFS_BACKOFF;
264 } else {
265 txdesc->ifs = IFS_SIFS;
266 }
267
5adf6d63
ID
268 /*
269 * Hardware should insert sequence counter.
270 * FIXME: We insert a software sequence counter first for
271 * hardware that doesn't support hardware sequence counting.
272 *
273 * This is wrong because beacons are not getting sequence
274 * numbers assigned properly.
275 *
276 * A secondary problem exists for drivers that cannot toggle
277 * sequence counting per-frame, since those will override the
278 * sequence counter given by mac80211.
279 */
280 if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
d4764b29 281 spin_lock_irqsave(&intf->seqlock, irqflags);
5adf6d63
ID
282
283 if (test_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags))
284 intf->seqno += 0x10;
285 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
286 hdr->seq_ctrl |= cpu_to_le16(intf->seqno);
287
d4764b29 288 spin_unlock_irqrestore(&intf->seqlock, irqflags);
5adf6d63
ID
289
290 __set_bit(ENTRY_TXD_GENERATE_SEQ, &txdesc->flags);
291 }
292
7050ec82
ID
293 /*
294 * PLCP setup
295 * Length calculation depends on OFDM/CCK rate.
296 */
297 hwrate = rt2x00_get_rate(rate->hw_value);
298 txdesc->signal = hwrate->plcp;
299 txdesc->service = 0x04;
300
301 if (hwrate->flags & DEV_RATE_OFDM) {
302 __set_bit(ENTRY_TXD_OFDM_RATE, &txdesc->flags);
303
304 txdesc->length_high = (data_length >> 6) & 0x3f;
305 txdesc->length_low = data_length & 0x3f;
306 } else {
307 /*
308 * Convert length to microseconds.
309 */
310 residual = get_duration_res(data_length, hwrate->bitrate);
311 duration = get_duration(data_length, hwrate->bitrate);
312
313 if (residual != 0) {
314 duration++;
315
316 /*
317 * Check if we need to set the Length Extension
318 */
319 if (hwrate->bitrate == 110 && residual <= 30)
320 txdesc->service |= 0x80;
321 }
322
323 txdesc->length_high = (duration >> 8) & 0xff;
324 txdesc->length_low = duration & 0xff;
325
326 /*
327 * When preamble is enabled we should set the
328 * preamble bit for the signal.
329 */
330 if (rt2x00_get_rate_preamble(rate->hw_value))
331 txdesc->signal |= 0x08;
332 }
333}
7050ec82 334
bd88a781
ID
335static void rt2x00queue_write_tx_descriptor(struct queue_entry *entry,
336 struct txentry_desc *txdesc)
7050ec82 337{
b869767b
ID
338 struct data_queue *queue = entry->queue;
339 struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;
7050ec82
ID
340
341 rt2x00dev->ops->lib->write_tx_desc(rt2x00dev, entry->skb, txdesc);
342
343 /*
344 * All processing on the frame has been completed, this means
345 * it is now ready to be dumped to userspace through debugfs.
346 */
347 rt2x00debug_dump_frame(rt2x00dev, DUMP_FRAME_TX, entry->skb);
348
349 /*
b869767b
ID
350 * Check if we need to kick the queue, there are however a few rules
351 * 1) Don't kick beacon queue
352 * 2) Don't kick unless this is the last in frame in a burst.
353 * When the burst flag is set, this frame is always followed
354 * by another frame which in some way are related to eachother.
355 * This is true for fragments, RTS or CTS-to-self frames.
356 * 3) Rule 2 can be broken when the available entries
357 * in the queue are less then a certain threshold.
7050ec82 358 */
b869767b
ID
359 if (entry->queue->qid == QID_BEACON)
360 return;
361
362 if (rt2x00queue_threshold(queue) ||
363 !test_bit(ENTRY_TXD_BURST, &txdesc->flags))
364 rt2x00dev->ops->lib->kick_tx_queue(rt2x00dev, queue->qid);
7050ec82 365}
7050ec82 366
6db3786a
ID
367int rt2x00queue_write_tx_frame(struct data_queue *queue, struct sk_buff *skb)
368{
369 struct queue_entry *entry = rt2x00queue_get_entry(queue, Q_INDEX);
370 struct txentry_desc txdesc;
d74f5ba4 371 struct skb_frame_desc *skbdesc;
2bb057d0 372 unsigned int iv_len = IEEE80211_SKB_CB(skb)->control.iv_len;
6db3786a
ID
373
374 if (unlikely(rt2x00queue_full(queue)))
375 return -EINVAL;
376
0262ab0d 377 if (test_and_set_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags)) {
6db3786a
ID
378 ERROR(queue->rt2x00dev,
379 "Arrived at non-free entry in the non-full queue %d.\n"
380 "Please file bug report to %s.\n",
381 queue->qid, DRV_PROJECT);
382 return -EINVAL;
383 }
384
385 /*
386 * Copy all TX descriptor information into txdesc,
387 * after that we are free to use the skb->cb array
388 * for our information.
389 */
390 entry->skb = skb;
391 rt2x00queue_create_tx_descriptor(entry, &txdesc);
392
d74f5ba4 393 /*
2bb057d0
ID
394 * All information is retreived from the skb->cb array,
395 * now we should claim ownership of the driver part of that
396 * array.
d74f5ba4
ID
397 */
398 skbdesc = get_skb_frame_desc(entry->skb);
399 memset(skbdesc, 0, sizeof(*skbdesc));
400 skbdesc->entry = entry;
401
2bb057d0
ID
402 /*
403 * When hardware encryption is supported, and this frame
404 * is to be encrypted, we should strip the IV/EIV data from
405 * the frame so we can provide it to the driver seperately.
406 */
407 if (test_bit(ENTRY_TXD_ENCRYPT, &txdesc.flags) &&
408 !test_bit(ENTRY_TXD_ENCRYPT_IV, &txdesc.flags))
409 rt2x00crypto_tx_remove_iv(skb, iv_len);
410
411 /*
412 * It could be possible that the queue was corrupted and this
413 * call failed. Just drop the frame, we cannot rollback and pass
414 * the frame to mac80211 because the skb->cb has now been tainted.
415 */
6db3786a 416 if (unlikely(queue->rt2x00dev->ops->lib->write_tx_data(entry))) {
0262ab0d 417 clear_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags);
2bb057d0
ID
418 dev_kfree_skb_any(entry->skb);
419 entry->skb = NULL;
420 return 0;
6db3786a
ID
421 }
422
d74f5ba4
ID
423 if (test_bit(DRIVER_REQUIRE_DMA, &queue->rt2x00dev->flags))
424 rt2x00queue_map_txskb(queue->rt2x00dev, skb);
425
0262ab0d 426 set_bit(ENTRY_DATA_PENDING, &entry->flags);
6db3786a
ID
427
428 rt2x00queue_index_inc(queue, Q_INDEX);
429 rt2x00queue_write_tx_descriptor(entry, &txdesc);
430
431 return 0;
432}
433
bd88a781
ID
434int rt2x00queue_update_beacon(struct rt2x00_dev *rt2x00dev,
435 struct ieee80211_vif *vif)
436{
437 struct rt2x00_intf *intf = vif_to_intf(vif);
438 struct skb_frame_desc *skbdesc;
439 struct txentry_desc txdesc;
440 __le32 desc[16];
441
442 if (unlikely(!intf->beacon))
443 return -ENOBUFS;
444
445 intf->beacon->skb = ieee80211_beacon_get(rt2x00dev->hw, vif);
446 if (!intf->beacon->skb)
447 return -ENOMEM;
448
449 /*
450 * Copy all TX descriptor information into txdesc,
451 * after that we are free to use the skb->cb array
452 * for our information.
453 */
454 rt2x00queue_create_tx_descriptor(intf->beacon, &txdesc);
455
456 /*
457 * For the descriptor we use a local array from where the
458 * driver can move it to the correct location required for
459 * the hardware.
460 */
461 memset(desc, 0, sizeof(desc));
462
463 /*
464 * Fill in skb descriptor
465 */
466 skbdesc = get_skb_frame_desc(intf->beacon->skb);
467 memset(skbdesc, 0, sizeof(*skbdesc));
468 skbdesc->desc = desc;
469 skbdesc->desc_len = intf->beacon->queue->desc_size;
470 skbdesc->entry = intf->beacon;
471
472 /*
473 * Write TX descriptor into reserved room in front of the beacon.
474 */
475 rt2x00queue_write_tx_descriptor(intf->beacon, &txdesc);
476
477 /*
478 * Send beacon to hardware.
479 * Also enable beacon generation, which might have been disabled
480 * by the driver during the config_beacon() callback function.
481 */
482 rt2x00dev->ops->lib->write_beacon(intf->beacon);
483 rt2x00dev->ops->lib->kick_tx_queue(rt2x00dev, QID_BEACON);
484
485 return 0;
486}
487
181d6902 488struct data_queue *rt2x00queue_get_queue(struct rt2x00_dev *rt2x00dev,
e58c6aca 489 const enum data_queue_qid queue)
181d6902
ID
490{
491 int atim = test_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags);
492
61448f88 493 if (queue < rt2x00dev->ops->tx_queues && rt2x00dev->tx)
181d6902
ID
494 return &rt2x00dev->tx[queue];
495
496 if (!rt2x00dev->bcn)
497 return NULL;
498
e58c6aca 499 if (queue == QID_BEACON)
181d6902 500 return &rt2x00dev->bcn[0];
e58c6aca 501 else if (queue == QID_ATIM && atim)
181d6902
ID
502 return &rt2x00dev->bcn[1];
503
504 return NULL;
505}
506EXPORT_SYMBOL_GPL(rt2x00queue_get_queue);
507
508struct queue_entry *rt2x00queue_get_entry(struct data_queue *queue,
509 enum queue_index index)
510{
511 struct queue_entry *entry;
5f46c4d0 512 unsigned long irqflags;
181d6902
ID
513
514 if (unlikely(index >= Q_INDEX_MAX)) {
515 ERROR(queue->rt2x00dev,
516 "Entry requested from invalid index type (%d)\n", index);
517 return NULL;
518 }
519
5f46c4d0 520 spin_lock_irqsave(&queue->lock, irqflags);
181d6902
ID
521
522 entry = &queue->entries[queue->index[index]];
523
5f46c4d0 524 spin_unlock_irqrestore(&queue->lock, irqflags);
181d6902
ID
525
526 return entry;
527}
528EXPORT_SYMBOL_GPL(rt2x00queue_get_entry);
529
530void rt2x00queue_index_inc(struct data_queue *queue, enum queue_index index)
531{
5f46c4d0
ID
532 unsigned long irqflags;
533
181d6902
ID
534 if (unlikely(index >= Q_INDEX_MAX)) {
535 ERROR(queue->rt2x00dev,
536 "Index change on invalid index type (%d)\n", index);
537 return;
538 }
539
5f46c4d0 540 spin_lock_irqsave(&queue->lock, irqflags);
181d6902
ID
541
542 queue->index[index]++;
543 if (queue->index[index] >= queue->limit)
544 queue->index[index] = 0;
545
10b6b801
ID
546 if (index == Q_INDEX) {
547 queue->length++;
548 } else if (index == Q_INDEX_DONE) {
549 queue->length--;
550 queue->count ++;
551 }
181d6902 552
5f46c4d0 553 spin_unlock_irqrestore(&queue->lock, irqflags);
181d6902 554}
181d6902
ID
555
556static void rt2x00queue_reset(struct data_queue *queue)
557{
5f46c4d0
ID
558 unsigned long irqflags;
559
560 spin_lock_irqsave(&queue->lock, irqflags);
181d6902
ID
561
562 queue->count = 0;
563 queue->length = 0;
564 memset(queue->index, 0, sizeof(queue->index));
565
5f46c4d0 566 spin_unlock_irqrestore(&queue->lock, irqflags);
181d6902
ID
567}
568
569void rt2x00queue_init_rx(struct rt2x00_dev *rt2x00dev)
570{
571 struct data_queue *queue = rt2x00dev->rx;
572 unsigned int i;
573
574 rt2x00queue_reset(queue);
575
576 if (!rt2x00dev->ops->lib->init_rxentry)
577 return;
578
9c0ab712
ID
579 for (i = 0; i < queue->limit; i++) {
580 queue->entries[i].flags = 0;
581
181d6902
ID
582 rt2x00dev->ops->lib->init_rxentry(rt2x00dev,
583 &queue->entries[i]);
9c0ab712 584 }
181d6902
ID
585}
586
587void rt2x00queue_init_tx(struct rt2x00_dev *rt2x00dev)
588{
589 struct data_queue *queue;
590 unsigned int i;
591
592 txall_queue_for_each(rt2x00dev, queue) {
593 rt2x00queue_reset(queue);
594
595 if (!rt2x00dev->ops->lib->init_txentry)
596 continue;
597
9c0ab712
ID
598 for (i = 0; i < queue->limit; i++) {
599 queue->entries[i].flags = 0;
600
181d6902
ID
601 rt2x00dev->ops->lib->init_txentry(rt2x00dev,
602 &queue->entries[i]);
9c0ab712 603 }
181d6902
ID
604 }
605}
606
607static int rt2x00queue_alloc_entries(struct data_queue *queue,
608 const struct data_queue_desc *qdesc)
609{
610 struct queue_entry *entries;
611 unsigned int entry_size;
612 unsigned int i;
613
614 rt2x00queue_reset(queue);
615
616 queue->limit = qdesc->entry_num;
b869767b 617 queue->threshold = DIV_ROUND_UP(qdesc->entry_num, 10);
181d6902
ID
618 queue->data_size = qdesc->data_size;
619 queue->desc_size = qdesc->desc_size;
620
621 /*
622 * Allocate all queue entries.
623 */
624 entry_size = sizeof(*entries) + qdesc->priv_size;
625 entries = kzalloc(queue->limit * entry_size, GFP_KERNEL);
626 if (!entries)
627 return -ENOMEM;
628
629#define QUEUE_ENTRY_PRIV_OFFSET(__base, __index, __limit, __esize, __psize) \
231be4e9
AB
630 ( ((char *)(__base)) + ((__limit) * (__esize)) + \
631 ((__index) * (__psize)) )
181d6902
ID
632
633 for (i = 0; i < queue->limit; i++) {
634 entries[i].flags = 0;
635 entries[i].queue = queue;
636 entries[i].skb = NULL;
637 entries[i].entry_idx = i;
638 entries[i].priv_data =
639 QUEUE_ENTRY_PRIV_OFFSET(entries, i, queue->limit,
640 sizeof(*entries), qdesc->priv_size);
641 }
642
643#undef QUEUE_ENTRY_PRIV_OFFSET
644
645 queue->entries = entries;
646
647 return 0;
648}
649
c4da0048
GW
650static void rt2x00queue_free_skbs(struct rt2x00_dev *rt2x00dev,
651 struct data_queue *queue)
30caa6e3
GW
652{
653 unsigned int i;
654
655 if (!queue->entries)
656 return;
657
658 for (i = 0; i < queue->limit; i++) {
659 if (queue->entries[i].skb)
c4da0048 660 rt2x00queue_free_skb(rt2x00dev, queue->entries[i].skb);
30caa6e3
GW
661 }
662}
663
c4da0048
GW
664static int rt2x00queue_alloc_rxskbs(struct rt2x00_dev *rt2x00dev,
665 struct data_queue *queue)
30caa6e3
GW
666{
667 unsigned int i;
668 struct sk_buff *skb;
669
670 for (i = 0; i < queue->limit; i++) {
c4da0048 671 skb = rt2x00queue_alloc_rxskb(rt2x00dev, &queue->entries[i]);
30caa6e3 672 if (!skb)
61243d8e 673 return -ENOMEM;
30caa6e3
GW
674 queue->entries[i].skb = skb;
675 }
676
677 return 0;
30caa6e3
GW
678}
679
181d6902
ID
680int rt2x00queue_initialize(struct rt2x00_dev *rt2x00dev)
681{
682 struct data_queue *queue;
683 int status;
684
181d6902
ID
685 status = rt2x00queue_alloc_entries(rt2x00dev->rx, rt2x00dev->ops->rx);
686 if (status)
687 goto exit;
688
689 tx_queue_for_each(rt2x00dev, queue) {
690 status = rt2x00queue_alloc_entries(queue, rt2x00dev->ops->tx);
691 if (status)
692 goto exit;
693 }
694
695 status = rt2x00queue_alloc_entries(rt2x00dev->bcn, rt2x00dev->ops->bcn);
696 if (status)
697 goto exit;
698
30caa6e3
GW
699 if (test_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags)) {
700 status = rt2x00queue_alloc_entries(&rt2x00dev->bcn[1],
701 rt2x00dev->ops->atim);
702 if (status)
703 goto exit;
704 }
181d6902 705
c4da0048 706 status = rt2x00queue_alloc_rxskbs(rt2x00dev, rt2x00dev->rx);
181d6902
ID
707 if (status)
708 goto exit;
709
710 return 0;
711
712exit:
713 ERROR(rt2x00dev, "Queue entries allocation failed.\n");
714
715 rt2x00queue_uninitialize(rt2x00dev);
716
717 return status;
718}
719
720void rt2x00queue_uninitialize(struct rt2x00_dev *rt2x00dev)
721{
722 struct data_queue *queue;
723
c4da0048 724 rt2x00queue_free_skbs(rt2x00dev, rt2x00dev->rx);
30caa6e3 725
181d6902
ID
726 queue_for_each(rt2x00dev, queue) {
727 kfree(queue->entries);
728 queue->entries = NULL;
729 }
730}
731
8f539276
ID
732static void rt2x00queue_init(struct rt2x00_dev *rt2x00dev,
733 struct data_queue *queue, enum data_queue_qid qid)
734{
735 spin_lock_init(&queue->lock);
736
737 queue->rt2x00dev = rt2x00dev;
738 queue->qid = qid;
739 queue->aifs = 2;
740 queue->cw_min = 5;
741 queue->cw_max = 10;
742}
743
181d6902
ID
744int rt2x00queue_allocate(struct rt2x00_dev *rt2x00dev)
745{
746 struct data_queue *queue;
747 enum data_queue_qid qid;
748 unsigned int req_atim =
749 !!test_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags);
750
751 /*
752 * We need the following queues:
753 * RX: 1
61448f88 754 * TX: ops->tx_queues
181d6902
ID
755 * Beacon: 1
756 * Atim: 1 (if required)
757 */
61448f88 758 rt2x00dev->data_queues = 2 + rt2x00dev->ops->tx_queues + req_atim;
181d6902
ID
759
760 queue = kzalloc(rt2x00dev->data_queues * sizeof(*queue), GFP_KERNEL);
761 if (!queue) {
762 ERROR(rt2x00dev, "Queue allocation failed.\n");
763 return -ENOMEM;
764 }
765
766 /*
767 * Initialize pointers
768 */
769 rt2x00dev->rx = queue;
770 rt2x00dev->tx = &queue[1];
61448f88 771 rt2x00dev->bcn = &queue[1 + rt2x00dev->ops->tx_queues];
181d6902
ID
772
773 /*
774 * Initialize queue parameters.
775 * RX: qid = QID_RX
776 * TX: qid = QID_AC_BE + index
777 * TX: cw_min: 2^5 = 32.
778 * TX: cw_max: 2^10 = 1024.
565a019a
ID
779 * BCN: qid = QID_BEACON
780 * ATIM: qid = QID_ATIM
181d6902 781 */
8f539276 782 rt2x00queue_init(rt2x00dev, rt2x00dev->rx, QID_RX);
181d6902 783
8f539276
ID
784 qid = QID_AC_BE;
785 tx_queue_for_each(rt2x00dev, queue)
786 rt2x00queue_init(rt2x00dev, queue, qid++);
181d6902 787
565a019a 788 rt2x00queue_init(rt2x00dev, &rt2x00dev->bcn[0], QID_BEACON);
181d6902 789 if (req_atim)
565a019a 790 rt2x00queue_init(rt2x00dev, &rt2x00dev->bcn[1], QID_ATIM);
181d6902
ID
791
792 return 0;
793}
794
795void rt2x00queue_free(struct rt2x00_dev *rt2x00dev)
796{
797 kfree(rt2x00dev->rx);
798 rt2x00dev->rx = NULL;
799 rt2x00dev->tx = NULL;
800 rt2x00dev->bcn = NULL;
801}
This page took 0.147215 seconds and 5 git commands to generate.