rt2x00: Remove SKBDESC_L2_PADDED flag.
[deliverable/linux.git] / drivers / net / wireless / rt2x00 / rt2x00queue.c
CommitLineData
181d6902 1/*
9c9a0d14
GW
2 Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
3 Copyright (C) 2004 - 2009 Gertjan van Wingerde <gwingerde@gmail.com>
181d6902
ID
4 <http://rt2x00.serialmonkey.com>
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the
18 Free Software Foundation, Inc.,
19 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
20 */
21
22/*
23 Module: rt2x00lib
24 Abstract: rt2x00 queue specific routines.
25 */
26
27#include <linux/kernel.h>
28#include <linux/module.h>
c4da0048 29#include <linux/dma-mapping.h>
181d6902
ID
30
31#include "rt2x00.h"
32#include "rt2x00lib.h"
33
c4da0048
GW
34struct sk_buff *rt2x00queue_alloc_rxskb(struct rt2x00_dev *rt2x00dev,
35 struct queue_entry *entry)
239c249d 36{
c4da0048
GW
37 struct sk_buff *skb;
38 struct skb_frame_desc *skbdesc;
2bb057d0
ID
39 unsigned int frame_size;
40 unsigned int head_size = 0;
41 unsigned int tail_size = 0;
239c249d
GW
42
43 /*
44 * The frame size includes descriptor size, because the
45 * hardware directly receive the frame into the skbuffer.
46 */
c4da0048 47 frame_size = entry->queue->data_size + entry->queue->desc_size;
239c249d
GW
48
49 /*
ff352391
ID
50 * The payload should be aligned to a 4-byte boundary,
51 * this means we need at least 3 bytes for moving the frame
52 * into the correct offset.
239c249d 53 */
2bb057d0
ID
54 head_size = 4;
55
56 /*
57 * For IV/EIV/ICV assembly we must make sure there is
58 * at least 8 bytes bytes available in headroom for IV/EIV
9c3444d3 59 * and 8 bytes for ICV data as tailroon.
2bb057d0 60 */
2bb057d0
ID
61 if (test_bit(CONFIG_SUPPORT_HW_CRYPTO, &rt2x00dev->flags)) {
62 head_size += 8;
9c3444d3 63 tail_size += 8;
2bb057d0 64 }
239c249d
GW
65
66 /*
67 * Allocate skbuffer.
68 */
2bb057d0 69 skb = dev_alloc_skb(frame_size + head_size + tail_size);
239c249d
GW
70 if (!skb)
71 return NULL;
72
2bb057d0
ID
73 /*
74 * Make sure we not have a frame with the requested bytes
75 * available in the head and tail.
76 */
77 skb_reserve(skb, head_size);
239c249d
GW
78 skb_put(skb, frame_size);
79
c4da0048
GW
80 /*
81 * Populate skbdesc.
82 */
83 skbdesc = get_skb_frame_desc(skb);
84 memset(skbdesc, 0, sizeof(*skbdesc));
85 skbdesc->entry = entry;
86
87 if (test_bit(DRIVER_REQUIRE_DMA, &rt2x00dev->flags)) {
88 skbdesc->skb_dma = dma_map_single(rt2x00dev->dev,
89 skb->data,
90 skb->len,
91 DMA_FROM_DEVICE);
92 skbdesc->flags |= SKBDESC_DMA_MAPPED_RX;
93 }
94
239c249d
GW
95 return skb;
96}
30caa6e3 97
c4da0048 98void rt2x00queue_map_txskb(struct rt2x00_dev *rt2x00dev, struct sk_buff *skb)
30caa6e3 99{
c4da0048
GW
100 struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb);
101
3ee54a07
ID
102 /*
103 * If device has requested headroom, we should make sure that
104 * is also mapped to the DMA so it can be used for transfering
105 * additional descriptor information to the hardware.
106 */
107 skb_push(skb, rt2x00dev->hw->extra_tx_headroom);
108
109 skbdesc->skb_dma =
110 dma_map_single(rt2x00dev->dev, skb->data, skb->len, DMA_TO_DEVICE);
111
112 /*
113 * Restore data pointer to original location again.
114 */
115 skb_pull(skb, rt2x00dev->hw->extra_tx_headroom);
116
c4da0048
GW
117 skbdesc->flags |= SKBDESC_DMA_MAPPED_TX;
118}
119EXPORT_SYMBOL_GPL(rt2x00queue_map_txskb);
120
121void rt2x00queue_unmap_skb(struct rt2x00_dev *rt2x00dev, struct sk_buff *skb)
122{
123 struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb);
124
125 if (skbdesc->flags & SKBDESC_DMA_MAPPED_RX) {
126 dma_unmap_single(rt2x00dev->dev, skbdesc->skb_dma, skb->len,
127 DMA_FROM_DEVICE);
128 skbdesc->flags &= ~SKBDESC_DMA_MAPPED_RX;
129 }
130
131 if (skbdesc->flags & SKBDESC_DMA_MAPPED_TX) {
3ee54a07
ID
132 /*
133 * Add headroom to the skb length, it has been removed
134 * by the driver, but it was actually mapped to DMA.
135 */
136 dma_unmap_single(rt2x00dev->dev, skbdesc->skb_dma,
137 skb->len + rt2x00dev->hw->extra_tx_headroom,
c4da0048
GW
138 DMA_TO_DEVICE);
139 skbdesc->flags &= ~SKBDESC_DMA_MAPPED_TX;
140 }
141}
c4da0048
GW
142
143void rt2x00queue_free_skb(struct rt2x00_dev *rt2x00dev, struct sk_buff *skb)
144{
9a613195
ID
145 if (!skb)
146 return;
147
61243d8e 148 rt2x00queue_unmap_skb(rt2x00dev, skb);
30caa6e3
GW
149 dev_kfree_skb_any(skb);
150}
239c249d 151
daee6c09 152void rt2x00queue_align_frame(struct sk_buff *skb)
9f166171 153{
9f166171 154 unsigned int frame_length = skb->len;
daee6c09 155 unsigned int align = ALIGN_SIZE(skb, 0);
9f166171
ID
156
157 if (!align)
158 return;
159
daee6c09
ID
160 skb_push(skb, align);
161 memmove(skb->data, skb->data + align, frame_length);
162 skb_trim(skb, frame_length);
163}
164
95d69aa0 165void rt2x00queue_align_payload(struct sk_buff *skb, unsigned int header_length)
daee6c09
ID
166{
167 unsigned int frame_length = skb->len;
95d69aa0 168 unsigned int align = ALIGN_SIZE(skb, header_length);
daee6c09
ID
169
170 if (!align)
171 return;
172
173 skb_push(skb, align);
174 memmove(skb->data, skb->data + align, frame_length);
175 skb_trim(skb, frame_length);
176}
177
178void rt2x00queue_insert_l2pad(struct sk_buff *skb, unsigned int header_length)
179{
daee6c09
ID
180 unsigned int frame_length = skb->len;
181 unsigned int header_align = ALIGN_SIZE(skb, 0);
182 unsigned int payload_align = ALIGN_SIZE(skb, header_length);
77e73d18 183 unsigned int l2pad = L2PAD_SIZE(header_length);
daee6c09
ID
184
185 if (header_align == payload_align) {
186 /*
187 * Both header and payload must be moved the same
188 * amount of bytes to align them properly. This means
189 * we don't use the L2 padding but just move the entire
190 * frame.
191 */
192 rt2x00queue_align_frame(skb);
193 } else if (!payload_align) {
194 /*
195 * Simple L2 padding, only the header needs to be moved,
196 * the payload is already properly aligned.
197 */
198 skb_push(skb, header_align);
6a325d85 199 memmove(skb->data, skb->data + header_align, header_length);
9f166171 200 } else {
daee6c09
ID
201 /*
202 *
203 * Complicated L2 padding, both header and payload need
204 * to be moved. By default we only move to the start
205 * of the buffer, so our header alignment needs to be
206 * increased if there is not enough room for the header
207 * to be moved.
208 */
209 if (payload_align > header_align)
210 header_align += 4;
211
212 skb_push(skb, header_align);
213 memmove(skb->data, skb->data + header_align, header_length);
214 memmove(skb->data + header_length + l2pad,
a5186e99 215 skb->data + header_length + l2pad + payload_align,
daee6c09 216 frame_length - header_length);
77e73d18 217 skb_trim(skb, frame_length + l2pad);
9f166171
ID
218 }
219}
220
daee6c09
ID
221void rt2x00queue_remove_l2pad(struct sk_buff *skb, unsigned int header_length)
222{
77e73d18 223 unsigned int l2pad = L2PAD_SIZE(header_length);
daee6c09 224
354e39db 225 if (!l2pad)
daee6c09
ID
226 return;
227
228 memmove(skb->data + l2pad, skb->data, header_length);
229 skb_pull(skb, l2pad);
230}
231
7b40982e
ID
232static void rt2x00queue_create_tx_descriptor_seq(struct queue_entry *entry,
233 struct txentry_desc *txdesc)
234{
235 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(entry->skb);
236 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)entry->skb->data;
237 struct rt2x00_intf *intf = vif_to_intf(tx_info->control.vif);
238 unsigned long irqflags;
239
240 if (!(tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) ||
241 unlikely(!tx_info->control.vif))
242 return;
243
244 /*
245 * Hardware should insert sequence counter.
246 * FIXME: We insert a software sequence counter first for
247 * hardware that doesn't support hardware sequence counting.
248 *
249 * This is wrong because beacons are not getting sequence
250 * numbers assigned properly.
251 *
252 * A secondary problem exists for drivers that cannot toggle
253 * sequence counting per-frame, since those will override the
254 * sequence counter given by mac80211.
255 */
256 spin_lock_irqsave(&intf->seqlock, irqflags);
257
258 if (test_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags))
259 intf->seqno += 0x10;
260 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
261 hdr->seq_ctrl |= cpu_to_le16(intf->seqno);
262
263 spin_unlock_irqrestore(&intf->seqlock, irqflags);
264
265 __set_bit(ENTRY_TXD_GENERATE_SEQ, &txdesc->flags);
266}
267
268static void rt2x00queue_create_tx_descriptor_plcp(struct queue_entry *entry,
269 struct txentry_desc *txdesc,
270 const struct rt2x00_rate *hwrate)
271{
272 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
273 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(entry->skb);
274 struct ieee80211_tx_rate *txrate = &tx_info->control.rates[0];
275 unsigned int data_length;
276 unsigned int duration;
277 unsigned int residual;
278
279 /* Data length + CRC + Crypto overhead (IV/EIV/ICV/MIC) */
280 data_length = entry->skb->len + 4;
281 data_length += rt2x00crypto_tx_overhead(rt2x00dev, entry->skb);
282
283 /*
284 * PLCP setup
285 * Length calculation depends on OFDM/CCK rate.
286 */
287 txdesc->signal = hwrate->plcp;
288 txdesc->service = 0x04;
289
290 if (hwrate->flags & DEV_RATE_OFDM) {
291 txdesc->length_high = (data_length >> 6) & 0x3f;
292 txdesc->length_low = data_length & 0x3f;
293 } else {
294 /*
295 * Convert length to microseconds.
296 */
297 residual = GET_DURATION_RES(data_length, hwrate->bitrate);
298 duration = GET_DURATION(data_length, hwrate->bitrate);
299
300 if (residual != 0) {
301 duration++;
302
303 /*
304 * Check if we need to set the Length Extension
305 */
306 if (hwrate->bitrate == 110 && residual <= 30)
307 txdesc->service |= 0x80;
308 }
309
310 txdesc->length_high = (duration >> 8) & 0xff;
311 txdesc->length_low = duration & 0xff;
312
313 /*
314 * When preamble is enabled we should set the
315 * preamble bit for the signal.
316 */
317 if (txrate->flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE)
318 txdesc->signal |= 0x08;
319 }
320}
321
bd88a781
ID
322static void rt2x00queue_create_tx_descriptor(struct queue_entry *entry,
323 struct txentry_desc *txdesc)
7050ec82 324{
2e92e6f2 325 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
e039fa4a 326 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(entry->skb);
7050ec82 327 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)entry->skb->data;
2e92e6f2 328 struct ieee80211_rate *rate =
e039fa4a 329 ieee80211_get_tx_rate(rt2x00dev->hw, tx_info);
7050ec82 330 const struct rt2x00_rate *hwrate;
7050ec82
ID
331
332 memset(txdesc, 0, sizeof(*txdesc));
333
334 /*
335 * Initialize information from queue
336 */
337 txdesc->queue = entry->queue->qid;
338 txdesc->cw_min = entry->queue->cw_min;
339 txdesc->cw_max = entry->queue->cw_max;
340 txdesc->aifs = entry->queue->aifs;
341
9f166171
ID
342 /*
343 * Header and alignment information.
344 */
345 txdesc->header_length = ieee80211_get_hdrlen_from_skb(entry->skb);
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GW
346 if (test_bit(DRIVER_REQUIRE_L2PAD, &rt2x00dev->flags))
347 txdesc->l2pad = L2PAD_SIZE(txdesc->header_length);
9f166171 348
7050ec82
ID
349 /*
350 * Check whether this frame is to be acked.
351 */
e039fa4a 352 if (!(tx_info->flags & IEEE80211_TX_CTL_NO_ACK))
7050ec82
ID
353 __set_bit(ENTRY_TXD_ACK, &txdesc->flags);
354
355 /*
356 * Check if this is a RTS/CTS frame
357 */
ac104462
ID
358 if (ieee80211_is_rts(hdr->frame_control) ||
359 ieee80211_is_cts(hdr->frame_control)) {
7050ec82 360 __set_bit(ENTRY_TXD_BURST, &txdesc->flags);
ac104462 361 if (ieee80211_is_rts(hdr->frame_control))
7050ec82 362 __set_bit(ENTRY_TXD_RTS_FRAME, &txdesc->flags);
e039fa4a 363 else
7050ec82 364 __set_bit(ENTRY_TXD_CTS_FRAME, &txdesc->flags);
e039fa4a 365 if (tx_info->control.rts_cts_rate_idx >= 0)
2e92e6f2 366 rate =
e039fa4a 367 ieee80211_get_rts_cts_rate(rt2x00dev->hw, tx_info);
7050ec82
ID
368 }
369
370 /*
371 * Determine retry information.
372 */
e6a9854b 373 txdesc->retry_limit = tx_info->control.rates[0].count - 1;
42c82857 374 if (txdesc->retry_limit >= rt2x00dev->long_retry)
7050ec82
ID
375 __set_bit(ENTRY_TXD_RETRY_MODE, &txdesc->flags);
376
377 /*
378 * Check if more fragments are pending
379 */
267e8987
ID
380 if (ieee80211_has_morefrags(hdr->frame_control) ||
381 (tx_info->flags & IEEE80211_TX_CTL_MORE_FRAMES)) {
7050ec82
ID
382 __set_bit(ENTRY_TXD_BURST, &txdesc->flags);
383 __set_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags);
384 }
385
386 /*
387 * Beacons and probe responses require the tsf timestamp
e81e0aef
AB
388 * to be inserted into the frame, except for a frame that has been injected
389 * through a monitor interface. This latter is needed for testing a
390 * monitor interface.
7050ec82 391 */
e81e0aef
AB
392 if ((ieee80211_is_beacon(hdr->frame_control) ||
393 ieee80211_is_probe_resp(hdr->frame_control)) &&
394 (!(tx_info->flags & IEEE80211_TX_CTL_INJECTED)))
7050ec82
ID
395 __set_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags);
396
397 /*
398 * Determine with what IFS priority this frame should be send.
399 * Set ifs to IFS_SIFS when the this is not the first fragment,
400 * or this fragment came after RTS/CTS.
401 */
7b40982e
ID
402 if ((tx_info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT) &&
403 !test_bit(ENTRY_TXD_RTS_FRAME, &txdesc->flags)) {
7050ec82
ID
404 __set_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags);
405 txdesc->ifs = IFS_BACKOFF;
7b40982e 406 } else
7050ec82 407 txdesc->ifs = IFS_SIFS;
7050ec82 408
076f9582
ID
409 /*
410 * Determine rate modulation.
411 */
7050ec82 412 hwrate = rt2x00_get_rate(rate->hw_value);
076f9582 413 txdesc->rate_mode = RATE_MODE_CCK;
7b40982e 414 if (hwrate->flags & DEV_RATE_OFDM)
076f9582 415 txdesc->rate_mode = RATE_MODE_OFDM;
7050ec82 416
7b40982e
ID
417 /*
418 * Apply TX descriptor handling by components
419 */
420 rt2x00crypto_create_tx_descriptor(entry, txdesc);
35f00cfc 421 rt2x00ht_create_tx_descriptor(entry, txdesc, hwrate);
7b40982e
ID
422 rt2x00queue_create_tx_descriptor_seq(entry, txdesc);
423 rt2x00queue_create_tx_descriptor_plcp(entry, txdesc, hwrate);
7050ec82 424}
7050ec82 425
bd88a781
ID
426static void rt2x00queue_write_tx_descriptor(struct queue_entry *entry,
427 struct txentry_desc *txdesc)
7050ec82 428{
b869767b
ID
429 struct data_queue *queue = entry->queue;
430 struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;
7050ec82
ID
431
432 rt2x00dev->ops->lib->write_tx_desc(rt2x00dev, entry->skb, txdesc);
433
434 /*
435 * All processing on the frame has been completed, this means
436 * it is now ready to be dumped to userspace through debugfs.
437 */
438 rt2x00debug_dump_frame(rt2x00dev, DUMP_FRAME_TX, entry->skb);
439
440 /*
b869767b
ID
441 * Check if we need to kick the queue, there are however a few rules
442 * 1) Don't kick beacon queue
443 * 2) Don't kick unless this is the last in frame in a burst.
444 * When the burst flag is set, this frame is always followed
445 * by another frame which in some way are related to eachother.
446 * This is true for fragments, RTS or CTS-to-self frames.
447 * 3) Rule 2 can be broken when the available entries
448 * in the queue are less then a certain threshold.
7050ec82 449 */
b869767b
ID
450 if (entry->queue->qid == QID_BEACON)
451 return;
452
453 if (rt2x00queue_threshold(queue) ||
454 !test_bit(ENTRY_TXD_BURST, &txdesc->flags))
455 rt2x00dev->ops->lib->kick_tx_queue(rt2x00dev, queue->qid);
7050ec82 456}
7050ec82 457
7351c6bd
JB
458int rt2x00queue_write_tx_frame(struct data_queue *queue, struct sk_buff *skb,
459 bool local)
6db3786a 460{
e6a9854b 461 struct ieee80211_tx_info *tx_info;
6db3786a
ID
462 struct queue_entry *entry = rt2x00queue_get_entry(queue, Q_INDEX);
463 struct txentry_desc txdesc;
d74f5ba4 464 struct skb_frame_desc *skbdesc;
e6a9854b 465 u8 rate_idx, rate_flags;
6db3786a
ID
466
467 if (unlikely(rt2x00queue_full(queue)))
0e3de998 468 return -ENOBUFS;
6db3786a 469
0262ab0d 470 if (test_and_set_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags)) {
6db3786a
ID
471 ERROR(queue->rt2x00dev,
472 "Arrived at non-free entry in the non-full queue %d.\n"
473 "Please file bug report to %s.\n",
474 queue->qid, DRV_PROJECT);
475 return -EINVAL;
476 }
477
478 /*
479 * Copy all TX descriptor information into txdesc,
480 * after that we are free to use the skb->cb array
481 * for our information.
482 */
483 entry->skb = skb;
484 rt2x00queue_create_tx_descriptor(entry, &txdesc);
485
d74f5ba4 486 /*
e6a9854b 487 * All information is retrieved from the skb->cb array,
2bb057d0 488 * now we should claim ownership of the driver part of that
e6a9854b 489 * array, preserving the bitrate index and flags.
d74f5ba4 490 */
e6a9854b
JB
491 tx_info = IEEE80211_SKB_CB(skb);
492 rate_idx = tx_info->control.rates[0].idx;
493 rate_flags = tx_info->control.rates[0].flags;
0e3de998 494 skbdesc = get_skb_frame_desc(skb);
d74f5ba4
ID
495 memset(skbdesc, 0, sizeof(*skbdesc));
496 skbdesc->entry = entry;
e6a9854b
JB
497 skbdesc->tx_rate_idx = rate_idx;
498 skbdesc->tx_rate_flags = rate_flags;
d74f5ba4 499
7351c6bd
JB
500 if (local)
501 skbdesc->flags |= SKBDESC_NOT_MAC80211;
502
2bb057d0
ID
503 /*
504 * When hardware encryption is supported, and this frame
505 * is to be encrypted, we should strip the IV/EIV data from
506 * the frame so we can provide it to the driver seperately.
507 */
508 if (test_bit(ENTRY_TXD_ENCRYPT, &txdesc.flags) &&
dddfb478 509 !test_bit(ENTRY_TXD_ENCRYPT_IV, &txdesc.flags)) {
3f787bd6 510 if (test_bit(DRIVER_REQUIRE_COPY_IV, &queue->rt2x00dev->flags))
9eb4e21e 511 rt2x00crypto_tx_copy_iv(skb, &txdesc);
dddfb478 512 else
9eb4e21e 513 rt2x00crypto_tx_remove_iv(skb, &txdesc);
dddfb478 514 }
2bb057d0 515
93354cbb
ID
516 /*
517 * When DMA allocation is required we should guarentee to the
518 * driver that the DMA is aligned to a 4-byte boundary.
93354cbb
ID
519 * However some drivers require L2 padding to pad the payload
520 * rather then the header. This could be a requirement for
521 * PCI and USB devices, while header alignment only is valid
522 * for PCI devices.
523 */
9f166171 524 if (test_bit(DRIVER_REQUIRE_L2PAD, &queue->rt2x00dev->flags))
daee6c09 525 rt2x00queue_insert_l2pad(entry->skb, txdesc.header_length);
93354cbb 526 else if (test_bit(DRIVER_REQUIRE_DMA, &queue->rt2x00dev->flags))
daee6c09 527 rt2x00queue_align_frame(entry->skb);
9f166171 528
2bb057d0
ID
529 /*
530 * It could be possible that the queue was corrupted and this
0e3de998
ID
531 * call failed. Since we always return NETDEV_TX_OK to mac80211,
532 * this frame will simply be dropped.
2bb057d0 533 */
6db3786a 534 if (unlikely(queue->rt2x00dev->ops->lib->write_tx_data(entry))) {
0262ab0d 535 clear_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags);
2bb057d0 536 entry->skb = NULL;
0e3de998 537 return -EIO;
6db3786a
ID
538 }
539
d74f5ba4
ID
540 if (test_bit(DRIVER_REQUIRE_DMA, &queue->rt2x00dev->flags))
541 rt2x00queue_map_txskb(queue->rt2x00dev, skb);
542
0262ab0d 543 set_bit(ENTRY_DATA_PENDING, &entry->flags);
6db3786a
ID
544
545 rt2x00queue_index_inc(queue, Q_INDEX);
546 rt2x00queue_write_tx_descriptor(entry, &txdesc);
547
548 return 0;
549}
550
bd88a781 551int rt2x00queue_update_beacon(struct rt2x00_dev *rt2x00dev,
a2c9b652
ID
552 struct ieee80211_vif *vif,
553 const bool enable_beacon)
bd88a781
ID
554{
555 struct rt2x00_intf *intf = vif_to_intf(vif);
556 struct skb_frame_desc *skbdesc;
557 struct txentry_desc txdesc;
558 __le32 desc[16];
559
560 if (unlikely(!intf->beacon))
561 return -ENOBUFS;
562
17512dc3
IP
563 mutex_lock(&intf->beacon_skb_mutex);
564
565 /*
566 * Clean up the beacon skb.
567 */
568 rt2x00queue_free_skb(rt2x00dev, intf->beacon->skb);
569 intf->beacon->skb = NULL;
570
a2c9b652
ID
571 if (!enable_beacon) {
572 rt2x00dev->ops->lib->kill_tx_queue(rt2x00dev, QID_BEACON);
17512dc3 573 mutex_unlock(&intf->beacon_skb_mutex);
a2c9b652
ID
574 return 0;
575 }
576
bd88a781 577 intf->beacon->skb = ieee80211_beacon_get(rt2x00dev->hw, vif);
17512dc3
IP
578 if (!intf->beacon->skb) {
579 mutex_unlock(&intf->beacon_skb_mutex);
bd88a781 580 return -ENOMEM;
17512dc3 581 }
bd88a781
ID
582
583 /*
584 * Copy all TX descriptor information into txdesc,
585 * after that we are free to use the skb->cb array
586 * for our information.
587 */
588 rt2x00queue_create_tx_descriptor(intf->beacon, &txdesc);
589
590 /*
591 * For the descriptor we use a local array from where the
592 * driver can move it to the correct location required for
593 * the hardware.
594 */
595 memset(desc, 0, sizeof(desc));
596
597 /*
598 * Fill in skb descriptor
599 */
600 skbdesc = get_skb_frame_desc(intf->beacon->skb);
601 memset(skbdesc, 0, sizeof(*skbdesc));
602 skbdesc->desc = desc;
603 skbdesc->desc_len = intf->beacon->queue->desc_size;
604 skbdesc->entry = intf->beacon;
605
606 /*
607 * Write TX descriptor into reserved room in front of the beacon.
608 */
609 rt2x00queue_write_tx_descriptor(intf->beacon, &txdesc);
610
611 /*
612 * Send beacon to hardware.
613 * Also enable beacon generation, which might have been disabled
614 * by the driver during the config_beacon() callback function.
615 */
616 rt2x00dev->ops->lib->write_beacon(intf->beacon);
617 rt2x00dev->ops->lib->kick_tx_queue(rt2x00dev, QID_BEACON);
618
17512dc3
IP
619 mutex_unlock(&intf->beacon_skb_mutex);
620
bd88a781
ID
621 return 0;
622}
623
181d6902 624struct data_queue *rt2x00queue_get_queue(struct rt2x00_dev *rt2x00dev,
e58c6aca 625 const enum data_queue_qid queue)
181d6902
ID
626{
627 int atim = test_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags);
628
a2c9b652
ID
629 if (queue == QID_RX)
630 return rt2x00dev->rx;
631
61448f88 632 if (queue < rt2x00dev->ops->tx_queues && rt2x00dev->tx)
181d6902
ID
633 return &rt2x00dev->tx[queue];
634
635 if (!rt2x00dev->bcn)
636 return NULL;
637
e58c6aca 638 if (queue == QID_BEACON)
181d6902 639 return &rt2x00dev->bcn[0];
e58c6aca 640 else if (queue == QID_ATIM && atim)
181d6902
ID
641 return &rt2x00dev->bcn[1];
642
643 return NULL;
644}
645EXPORT_SYMBOL_GPL(rt2x00queue_get_queue);
646
647struct queue_entry *rt2x00queue_get_entry(struct data_queue *queue,
648 enum queue_index index)
649{
650 struct queue_entry *entry;
5f46c4d0 651 unsigned long irqflags;
181d6902
ID
652
653 if (unlikely(index >= Q_INDEX_MAX)) {
654 ERROR(queue->rt2x00dev,
655 "Entry requested from invalid index type (%d)\n", index);
656 return NULL;
657 }
658
5f46c4d0 659 spin_lock_irqsave(&queue->lock, irqflags);
181d6902
ID
660
661 entry = &queue->entries[queue->index[index]];
662
5f46c4d0 663 spin_unlock_irqrestore(&queue->lock, irqflags);
181d6902
ID
664
665 return entry;
666}
667EXPORT_SYMBOL_GPL(rt2x00queue_get_entry);
668
669void rt2x00queue_index_inc(struct data_queue *queue, enum queue_index index)
670{
5f46c4d0
ID
671 unsigned long irqflags;
672
181d6902
ID
673 if (unlikely(index >= Q_INDEX_MAX)) {
674 ERROR(queue->rt2x00dev,
675 "Index change on invalid index type (%d)\n", index);
676 return;
677 }
678
5f46c4d0 679 spin_lock_irqsave(&queue->lock, irqflags);
181d6902
ID
680
681 queue->index[index]++;
682 if (queue->index[index] >= queue->limit)
683 queue->index[index] = 0;
684
10b6b801
ID
685 if (index == Q_INDEX) {
686 queue->length++;
687 } else if (index == Q_INDEX_DONE) {
688 queue->length--;
55887511 689 queue->count++;
10b6b801 690 }
181d6902 691
5f46c4d0 692 spin_unlock_irqrestore(&queue->lock, irqflags);
181d6902 693}
181d6902
ID
694
695static void rt2x00queue_reset(struct data_queue *queue)
696{
5f46c4d0
ID
697 unsigned long irqflags;
698
699 spin_lock_irqsave(&queue->lock, irqflags);
181d6902
ID
700
701 queue->count = 0;
702 queue->length = 0;
703 memset(queue->index, 0, sizeof(queue->index));
704
5f46c4d0 705 spin_unlock_irqrestore(&queue->lock, irqflags);
181d6902
ID
706}
707
a2c9b652
ID
708void rt2x00queue_stop_queues(struct rt2x00_dev *rt2x00dev)
709{
710 struct data_queue *queue;
711
712 txall_queue_for_each(rt2x00dev, queue)
713 rt2x00dev->ops->lib->kill_tx_queue(rt2x00dev, queue->qid);
714}
715
798b7adb 716void rt2x00queue_init_queues(struct rt2x00_dev *rt2x00dev)
181d6902
ID
717{
718 struct data_queue *queue;
719 unsigned int i;
720
798b7adb 721 queue_for_each(rt2x00dev, queue) {
181d6902
ID
722 rt2x00queue_reset(queue);
723
9c0ab712
ID
724 for (i = 0; i < queue->limit; i++) {
725 queue->entries[i].flags = 0;
726
798b7adb 727 rt2x00dev->ops->lib->clear_entry(&queue->entries[i]);
9c0ab712 728 }
181d6902
ID
729 }
730}
731
732static int rt2x00queue_alloc_entries(struct data_queue *queue,
733 const struct data_queue_desc *qdesc)
734{
735 struct queue_entry *entries;
736 unsigned int entry_size;
737 unsigned int i;
738
739 rt2x00queue_reset(queue);
740
741 queue->limit = qdesc->entry_num;
b869767b 742 queue->threshold = DIV_ROUND_UP(qdesc->entry_num, 10);
181d6902
ID
743 queue->data_size = qdesc->data_size;
744 queue->desc_size = qdesc->desc_size;
745
746 /*
747 * Allocate all queue entries.
748 */
749 entry_size = sizeof(*entries) + qdesc->priv_size;
750 entries = kzalloc(queue->limit * entry_size, GFP_KERNEL);
751 if (!entries)
752 return -ENOMEM;
753
754#define QUEUE_ENTRY_PRIV_OFFSET(__base, __index, __limit, __esize, __psize) \
231be4e9
AB
755 ( ((char *)(__base)) + ((__limit) * (__esize)) + \
756 ((__index) * (__psize)) )
181d6902
ID
757
758 for (i = 0; i < queue->limit; i++) {
759 entries[i].flags = 0;
760 entries[i].queue = queue;
761 entries[i].skb = NULL;
762 entries[i].entry_idx = i;
763 entries[i].priv_data =
764 QUEUE_ENTRY_PRIV_OFFSET(entries, i, queue->limit,
765 sizeof(*entries), qdesc->priv_size);
766 }
767
768#undef QUEUE_ENTRY_PRIV_OFFSET
769
770 queue->entries = entries;
771
772 return 0;
773}
774
c4da0048
GW
775static void rt2x00queue_free_skbs(struct rt2x00_dev *rt2x00dev,
776 struct data_queue *queue)
30caa6e3
GW
777{
778 unsigned int i;
779
780 if (!queue->entries)
781 return;
782
783 for (i = 0; i < queue->limit; i++) {
784 if (queue->entries[i].skb)
c4da0048 785 rt2x00queue_free_skb(rt2x00dev, queue->entries[i].skb);
30caa6e3
GW
786 }
787}
788
c4da0048
GW
789static int rt2x00queue_alloc_rxskbs(struct rt2x00_dev *rt2x00dev,
790 struct data_queue *queue)
30caa6e3
GW
791{
792 unsigned int i;
793 struct sk_buff *skb;
794
795 for (i = 0; i < queue->limit; i++) {
c4da0048 796 skb = rt2x00queue_alloc_rxskb(rt2x00dev, &queue->entries[i]);
30caa6e3 797 if (!skb)
61243d8e 798 return -ENOMEM;
30caa6e3
GW
799 queue->entries[i].skb = skb;
800 }
801
802 return 0;
30caa6e3
GW
803}
804
181d6902
ID
805int rt2x00queue_initialize(struct rt2x00_dev *rt2x00dev)
806{
807 struct data_queue *queue;
808 int status;
809
181d6902
ID
810 status = rt2x00queue_alloc_entries(rt2x00dev->rx, rt2x00dev->ops->rx);
811 if (status)
812 goto exit;
813
814 tx_queue_for_each(rt2x00dev, queue) {
815 status = rt2x00queue_alloc_entries(queue, rt2x00dev->ops->tx);
816 if (status)
817 goto exit;
818 }
819
820 status = rt2x00queue_alloc_entries(rt2x00dev->bcn, rt2x00dev->ops->bcn);
821 if (status)
822 goto exit;
823
30caa6e3
GW
824 if (test_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags)) {
825 status = rt2x00queue_alloc_entries(&rt2x00dev->bcn[1],
826 rt2x00dev->ops->atim);
827 if (status)
828 goto exit;
829 }
181d6902 830
c4da0048 831 status = rt2x00queue_alloc_rxskbs(rt2x00dev, rt2x00dev->rx);
181d6902
ID
832 if (status)
833 goto exit;
834
835 return 0;
836
837exit:
838 ERROR(rt2x00dev, "Queue entries allocation failed.\n");
839
840 rt2x00queue_uninitialize(rt2x00dev);
841
842 return status;
843}
844
845void rt2x00queue_uninitialize(struct rt2x00_dev *rt2x00dev)
846{
847 struct data_queue *queue;
848
c4da0048 849 rt2x00queue_free_skbs(rt2x00dev, rt2x00dev->rx);
30caa6e3 850
181d6902
ID
851 queue_for_each(rt2x00dev, queue) {
852 kfree(queue->entries);
853 queue->entries = NULL;
854 }
855}
856
8f539276
ID
857static void rt2x00queue_init(struct rt2x00_dev *rt2x00dev,
858 struct data_queue *queue, enum data_queue_qid qid)
859{
860 spin_lock_init(&queue->lock);
861
862 queue->rt2x00dev = rt2x00dev;
863 queue->qid = qid;
2af0a570 864 queue->txop = 0;
8f539276
ID
865 queue->aifs = 2;
866 queue->cw_min = 5;
867 queue->cw_max = 10;
868}
869
181d6902
ID
870int rt2x00queue_allocate(struct rt2x00_dev *rt2x00dev)
871{
872 struct data_queue *queue;
873 enum data_queue_qid qid;
874 unsigned int req_atim =
875 !!test_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags);
876
877 /*
878 * We need the following queues:
879 * RX: 1
61448f88 880 * TX: ops->tx_queues
181d6902
ID
881 * Beacon: 1
882 * Atim: 1 (if required)
883 */
61448f88 884 rt2x00dev->data_queues = 2 + rt2x00dev->ops->tx_queues + req_atim;
181d6902
ID
885
886 queue = kzalloc(rt2x00dev->data_queues * sizeof(*queue), GFP_KERNEL);
887 if (!queue) {
888 ERROR(rt2x00dev, "Queue allocation failed.\n");
889 return -ENOMEM;
890 }
891
892 /*
893 * Initialize pointers
894 */
895 rt2x00dev->rx = queue;
896 rt2x00dev->tx = &queue[1];
61448f88 897 rt2x00dev->bcn = &queue[1 + rt2x00dev->ops->tx_queues];
181d6902
ID
898
899 /*
900 * Initialize queue parameters.
901 * RX: qid = QID_RX
902 * TX: qid = QID_AC_BE + index
903 * TX: cw_min: 2^5 = 32.
904 * TX: cw_max: 2^10 = 1024.
565a019a
ID
905 * BCN: qid = QID_BEACON
906 * ATIM: qid = QID_ATIM
181d6902 907 */
8f539276 908 rt2x00queue_init(rt2x00dev, rt2x00dev->rx, QID_RX);
181d6902 909
8f539276
ID
910 qid = QID_AC_BE;
911 tx_queue_for_each(rt2x00dev, queue)
912 rt2x00queue_init(rt2x00dev, queue, qid++);
181d6902 913
565a019a 914 rt2x00queue_init(rt2x00dev, &rt2x00dev->bcn[0], QID_BEACON);
181d6902 915 if (req_atim)
565a019a 916 rt2x00queue_init(rt2x00dev, &rt2x00dev->bcn[1], QID_ATIM);
181d6902
ID
917
918 return 0;
919}
920
921void rt2x00queue_free(struct rt2x00_dev *rt2x00dev)
922{
923 kfree(rt2x00dev->rx);
924 rt2x00dev->rx = NULL;
925 rt2x00dev->tx = NULL;
926 rt2x00dev->bcn = NULL;
927}
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