rt2x00: Fix stuck queue in tx failure case
[deliverable/linux.git] / drivers / net / wireless / rt2x00 / rt2x00queue.c
CommitLineData
181d6902 1/*
7e613e16
ID
2 Copyright (C) 2010 Willow Garage <http://www.willowgarage.com>
3 Copyright (C) 2004 - 2010 Ivo van Doorn <IvDoorn@gmail.com>
9c9a0d14 4 Copyright (C) 2004 - 2009 Gertjan van Wingerde <gwingerde@gmail.com>
181d6902
ID
5 <http://rt2x00.serialmonkey.com>
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the
19 Free Software Foundation, Inc.,
20 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
21 */
22
23/*
24 Module: rt2x00lib
25 Abstract: rt2x00 queue specific routines.
26 */
27
5a0e3ad6 28#include <linux/slab.h>
181d6902
ID
29#include <linux/kernel.h>
30#include <linux/module.h>
c4da0048 31#include <linux/dma-mapping.h>
181d6902
ID
32
33#include "rt2x00.h"
34#include "rt2x00lib.h"
35
fa69560f 36struct sk_buff *rt2x00queue_alloc_rxskb(struct queue_entry *entry)
239c249d 37{
fa69560f 38 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
c4da0048
GW
39 struct sk_buff *skb;
40 struct skb_frame_desc *skbdesc;
2bb057d0
ID
41 unsigned int frame_size;
42 unsigned int head_size = 0;
43 unsigned int tail_size = 0;
239c249d
GW
44
45 /*
46 * The frame size includes descriptor size, because the
47 * hardware directly receive the frame into the skbuffer.
48 */
c4da0048 49 frame_size = entry->queue->data_size + entry->queue->desc_size;
239c249d
GW
50
51 /*
ff352391
ID
52 * The payload should be aligned to a 4-byte boundary,
53 * this means we need at least 3 bytes for moving the frame
54 * into the correct offset.
239c249d 55 */
2bb057d0
ID
56 head_size = 4;
57
58 /*
59 * For IV/EIV/ICV assembly we must make sure there is
60 * at least 8 bytes bytes available in headroom for IV/EIV
9c3444d3 61 * and 8 bytes for ICV data as tailroon.
2bb057d0 62 */
2bb057d0
ID
63 if (test_bit(CONFIG_SUPPORT_HW_CRYPTO, &rt2x00dev->flags)) {
64 head_size += 8;
9c3444d3 65 tail_size += 8;
2bb057d0 66 }
239c249d
GW
67
68 /*
69 * Allocate skbuffer.
70 */
2bb057d0 71 skb = dev_alloc_skb(frame_size + head_size + tail_size);
239c249d
GW
72 if (!skb)
73 return NULL;
74
2bb057d0
ID
75 /*
76 * Make sure we not have a frame with the requested bytes
77 * available in the head and tail.
78 */
79 skb_reserve(skb, head_size);
239c249d
GW
80 skb_put(skb, frame_size);
81
c4da0048
GW
82 /*
83 * Populate skbdesc.
84 */
85 skbdesc = get_skb_frame_desc(skb);
86 memset(skbdesc, 0, sizeof(*skbdesc));
87 skbdesc->entry = entry;
88
89 if (test_bit(DRIVER_REQUIRE_DMA, &rt2x00dev->flags)) {
90 skbdesc->skb_dma = dma_map_single(rt2x00dev->dev,
91 skb->data,
92 skb->len,
93 DMA_FROM_DEVICE);
94 skbdesc->flags |= SKBDESC_DMA_MAPPED_RX;
95 }
96
239c249d
GW
97 return skb;
98}
30caa6e3 99
fa69560f 100void rt2x00queue_map_txskb(struct queue_entry *entry)
30caa6e3 101{
fa69560f
ID
102 struct device *dev = entry->queue->rt2x00dev->dev;
103 struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
c4da0048 104
3ee54a07 105 skbdesc->skb_dma =
fa69560f 106 dma_map_single(dev, entry->skb->data, entry->skb->len, DMA_TO_DEVICE);
c4da0048
GW
107 skbdesc->flags |= SKBDESC_DMA_MAPPED_TX;
108}
109EXPORT_SYMBOL_GPL(rt2x00queue_map_txskb);
110
fa69560f 111void rt2x00queue_unmap_skb(struct queue_entry *entry)
c4da0048 112{
fa69560f
ID
113 struct device *dev = entry->queue->rt2x00dev->dev;
114 struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
c4da0048
GW
115
116 if (skbdesc->flags & SKBDESC_DMA_MAPPED_RX) {
fa69560f 117 dma_unmap_single(dev, skbdesc->skb_dma, entry->skb->len,
c4da0048
GW
118 DMA_FROM_DEVICE);
119 skbdesc->flags &= ~SKBDESC_DMA_MAPPED_RX;
546adf29 120 } else if (skbdesc->flags & SKBDESC_DMA_MAPPED_TX) {
fa69560f 121 dma_unmap_single(dev, skbdesc->skb_dma, entry->skb->len,
c4da0048
GW
122 DMA_TO_DEVICE);
123 skbdesc->flags &= ~SKBDESC_DMA_MAPPED_TX;
124 }
125}
0b8004aa 126EXPORT_SYMBOL_GPL(rt2x00queue_unmap_skb);
c4da0048 127
fa69560f 128void rt2x00queue_free_skb(struct queue_entry *entry)
c4da0048 129{
fa69560f 130 if (!entry->skb)
9a613195
ID
131 return;
132
fa69560f
ID
133 rt2x00queue_unmap_skb(entry);
134 dev_kfree_skb_any(entry->skb);
135 entry->skb = NULL;
30caa6e3 136}
239c249d 137
daee6c09 138void rt2x00queue_align_frame(struct sk_buff *skb)
9f166171 139{
9f166171 140 unsigned int frame_length = skb->len;
daee6c09 141 unsigned int align = ALIGN_SIZE(skb, 0);
9f166171
ID
142
143 if (!align)
144 return;
145
daee6c09
ID
146 skb_push(skb, align);
147 memmove(skb->data, skb->data + align, frame_length);
148 skb_trim(skb, frame_length);
149}
150
daee6c09
ID
151void rt2x00queue_insert_l2pad(struct sk_buff *skb, unsigned int header_length)
152{
2e331462 153 unsigned int payload_length = skb->len - header_length;
daee6c09
ID
154 unsigned int header_align = ALIGN_SIZE(skb, 0);
155 unsigned int payload_align = ALIGN_SIZE(skb, header_length);
e54be4e7 156 unsigned int l2pad = payload_length ? L2PAD_SIZE(header_length) : 0;
daee6c09 157
2e331462
GW
158 /*
159 * Adjust the header alignment if the payload needs to be moved more
160 * than the header.
161 */
162 if (payload_align > header_align)
163 header_align += 4;
164
165 /* There is nothing to do if no alignment is needed */
166 if (!header_align)
167 return;
daee6c09 168
2e331462
GW
169 /* Reserve the amount of space needed in front of the frame */
170 skb_push(skb, header_align);
171
172 /*
173 * Move the header.
174 */
175 memmove(skb->data, skb->data + header_align, header_length);
176
177 /* Move the payload, if present and if required */
178 if (payload_length && payload_align)
daee6c09 179 memmove(skb->data + header_length + l2pad,
a5186e99 180 skb->data + header_length + l2pad + payload_align,
2e331462
GW
181 payload_length);
182
183 /* Trim the skb to the correct size */
184 skb_trim(skb, header_length + l2pad + payload_length);
9f166171
ID
185}
186
daee6c09
ID
187void rt2x00queue_remove_l2pad(struct sk_buff *skb, unsigned int header_length)
188{
a061a93b
GW
189 /*
190 * L2 padding is only present if the skb contains more than just the
191 * IEEE 802.11 header.
192 */
193 unsigned int l2pad = (skb->len > header_length) ?
194 L2PAD_SIZE(header_length) : 0;
daee6c09 195
354e39db 196 if (!l2pad)
daee6c09
ID
197 return;
198
a061a93b
GW
199 memmove(skb->data + l2pad, skb->data, header_length);
200 skb_pull(skb, l2pad);
daee6c09
ID
201}
202
7b40982e
ID
203static void rt2x00queue_create_tx_descriptor_seq(struct queue_entry *entry,
204 struct txentry_desc *txdesc)
205{
206 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(entry->skb);
207 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)entry->skb->data;
208 struct rt2x00_intf *intf = vif_to_intf(tx_info->control.vif);
209 unsigned long irqflags;
210
c262e08b 211 if (!(tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ))
7b40982e
ID
212 return;
213
7fe7ee77
HS
214 __set_bit(ENTRY_TXD_GENERATE_SEQ, &txdesc->flags);
215
216 if (!test_bit(DRIVER_REQUIRE_SW_SEQNO, &entry->queue->rt2x00dev->flags))
217 return;
218
7b40982e 219 /*
7fe7ee77
HS
220 * The hardware is not able to insert a sequence number. Assign a
221 * software generated one here.
7b40982e
ID
222 *
223 * This is wrong because beacons are not getting sequence
224 * numbers assigned properly.
225 *
226 * A secondary problem exists for drivers that cannot toggle
227 * sequence counting per-frame, since those will override the
228 * sequence counter given by mac80211.
229 */
230 spin_lock_irqsave(&intf->seqlock, irqflags);
231
232 if (test_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags))
233 intf->seqno += 0x10;
234 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
235 hdr->seq_ctrl |= cpu_to_le16(intf->seqno);
236
237 spin_unlock_irqrestore(&intf->seqlock, irqflags);
238
7b40982e
ID
239}
240
241static void rt2x00queue_create_tx_descriptor_plcp(struct queue_entry *entry,
242 struct txentry_desc *txdesc,
243 const struct rt2x00_rate *hwrate)
244{
245 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
246 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(entry->skb);
247 struct ieee80211_tx_rate *txrate = &tx_info->control.rates[0];
248 unsigned int data_length;
249 unsigned int duration;
250 unsigned int residual;
251
2517794b
HS
252 /*
253 * Determine with what IFS priority this frame should be send.
254 * Set ifs to IFS_SIFS when the this is not the first fragment,
255 * or this fragment came after RTS/CTS.
256 */
257 if (test_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags))
258 txdesc->u.plcp.ifs = IFS_BACKOFF;
259 else
260 txdesc->u.plcp.ifs = IFS_SIFS;
261
7b40982e
ID
262 /* Data length + CRC + Crypto overhead (IV/EIV/ICV/MIC) */
263 data_length = entry->skb->len + 4;
264 data_length += rt2x00crypto_tx_overhead(rt2x00dev, entry->skb);
265
266 /*
267 * PLCP setup
268 * Length calculation depends on OFDM/CCK rate.
269 */
26a1d07f
HS
270 txdesc->u.plcp.signal = hwrate->plcp;
271 txdesc->u.plcp.service = 0x04;
7b40982e
ID
272
273 if (hwrate->flags & DEV_RATE_OFDM) {
26a1d07f
HS
274 txdesc->u.plcp.length_high = (data_length >> 6) & 0x3f;
275 txdesc->u.plcp.length_low = data_length & 0x3f;
7b40982e
ID
276 } else {
277 /*
278 * Convert length to microseconds.
279 */
280 residual = GET_DURATION_RES(data_length, hwrate->bitrate);
281 duration = GET_DURATION(data_length, hwrate->bitrate);
282
283 if (residual != 0) {
284 duration++;
285
286 /*
287 * Check if we need to set the Length Extension
288 */
289 if (hwrate->bitrate == 110 && residual <= 30)
26a1d07f 290 txdesc->u.plcp.service |= 0x80;
7b40982e
ID
291 }
292
26a1d07f
HS
293 txdesc->u.plcp.length_high = (duration >> 8) & 0xff;
294 txdesc->u.plcp.length_low = duration & 0xff;
7b40982e
ID
295
296 /*
297 * When preamble is enabled we should set the
298 * preamble bit for the signal.
299 */
300 if (txrate->flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE)
26a1d07f 301 txdesc->u.plcp.signal |= 0x08;
7b40982e
ID
302 }
303}
304
bd88a781
ID
305static void rt2x00queue_create_tx_descriptor(struct queue_entry *entry,
306 struct txentry_desc *txdesc)
7050ec82 307{
2e92e6f2 308 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
e039fa4a 309 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(entry->skb);
7050ec82 310 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)entry->skb->data;
55b585e2
HS
311 struct ieee80211_tx_rate *txrate = &tx_info->control.rates[0];
312 struct ieee80211_rate *rate;
313 const struct rt2x00_rate *hwrate = NULL;
7050ec82
ID
314
315 memset(txdesc, 0, sizeof(*txdesc));
316
9f166171 317 /*
df624ca5 318 * Header and frame information.
9f166171 319 */
df624ca5 320 txdesc->length = entry->skb->len;
9f166171 321 txdesc->header_length = ieee80211_get_hdrlen_from_skb(entry->skb);
9f166171 322
7050ec82
ID
323 /*
324 * Check whether this frame is to be acked.
325 */
e039fa4a 326 if (!(tx_info->flags & IEEE80211_TX_CTL_NO_ACK))
7050ec82
ID
327 __set_bit(ENTRY_TXD_ACK, &txdesc->flags);
328
329 /*
330 * Check if this is a RTS/CTS frame
331 */
ac104462
ID
332 if (ieee80211_is_rts(hdr->frame_control) ||
333 ieee80211_is_cts(hdr->frame_control)) {
7050ec82 334 __set_bit(ENTRY_TXD_BURST, &txdesc->flags);
ac104462 335 if (ieee80211_is_rts(hdr->frame_control))
7050ec82 336 __set_bit(ENTRY_TXD_RTS_FRAME, &txdesc->flags);
e039fa4a 337 else
7050ec82 338 __set_bit(ENTRY_TXD_CTS_FRAME, &txdesc->flags);
e039fa4a 339 if (tx_info->control.rts_cts_rate_idx >= 0)
2e92e6f2 340 rate =
e039fa4a 341 ieee80211_get_rts_cts_rate(rt2x00dev->hw, tx_info);
7050ec82
ID
342 }
343
344 /*
345 * Determine retry information.
346 */
e6a9854b 347 txdesc->retry_limit = tx_info->control.rates[0].count - 1;
42c82857 348 if (txdesc->retry_limit >= rt2x00dev->long_retry)
7050ec82
ID
349 __set_bit(ENTRY_TXD_RETRY_MODE, &txdesc->flags);
350
351 /*
352 * Check if more fragments are pending
353 */
2606e422 354 if (ieee80211_has_morefrags(hdr->frame_control)) {
7050ec82
ID
355 __set_bit(ENTRY_TXD_BURST, &txdesc->flags);
356 __set_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags);
357 }
358
2606e422
HS
359 /*
360 * Check if more frames (!= fragments) are pending
361 */
362 if (tx_info->flags & IEEE80211_TX_CTL_MORE_FRAMES)
363 __set_bit(ENTRY_TXD_BURST, &txdesc->flags);
364
7050ec82
ID
365 /*
366 * Beacons and probe responses require the tsf timestamp
1bce85cf 367 * to be inserted into the frame.
7050ec82 368 */
1bce85cf
HS
369 if (ieee80211_is_beacon(hdr->frame_control) ||
370 ieee80211_is_probe_resp(hdr->frame_control))
7050ec82
ID
371 __set_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags);
372
7b40982e 373 if ((tx_info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT) &&
2517794b 374 !test_bit(ENTRY_TXD_RTS_FRAME, &txdesc->flags))
7050ec82 375 __set_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags);
7050ec82 376
076f9582
ID
377 /*
378 * Determine rate modulation.
379 */
55b585e2
HS
380 if (txrate->flags & IEEE80211_TX_RC_GREEN_FIELD)
381 txdesc->rate_mode = RATE_MODE_HT_GREENFIELD;
382 else if (txrate->flags & IEEE80211_TX_RC_MCS)
383 txdesc->rate_mode = RATE_MODE_HT_MIX;
384 else {
385 rate = ieee80211_get_tx_rate(rt2x00dev->hw, tx_info);
386 hwrate = rt2x00_get_rate(rate->hw_value);
387 if (hwrate->flags & DEV_RATE_OFDM)
388 txdesc->rate_mode = RATE_MODE_OFDM;
389 else
390 txdesc->rate_mode = RATE_MODE_CCK;
391 }
7050ec82 392
7b40982e
ID
393 /*
394 * Apply TX descriptor handling by components
395 */
396 rt2x00crypto_create_tx_descriptor(entry, txdesc);
397 rt2x00queue_create_tx_descriptor_seq(entry, txdesc);
26a1d07f
HS
398
399 if (test_bit(DRIVER_REQUIRE_HT_TX_DESC, &rt2x00dev->flags))
400 rt2x00ht_create_tx_descriptor(entry, txdesc, hwrate);
401 else
402 rt2x00queue_create_tx_descriptor_plcp(entry, txdesc, hwrate);
7050ec82 403}
7050ec82 404
78eea11b
GW
405static int rt2x00queue_write_tx_data(struct queue_entry *entry,
406 struct txentry_desc *txdesc)
407{
408 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
409
410 /*
411 * This should not happen, we already checked the entry
412 * was ours. When the hardware disagrees there has been
413 * a queue corruption!
414 */
415 if (unlikely(rt2x00dev->ops->lib->get_entry_state &&
416 rt2x00dev->ops->lib->get_entry_state(entry))) {
417 ERROR(rt2x00dev,
418 "Corrupt queue %d, accessing entry which is not ours.\n"
419 "Please file bug report to %s.\n",
420 entry->queue->qid, DRV_PROJECT);
421 return -EINVAL;
422 }
423
424 /*
425 * Add the requested extra tx headroom in front of the skb.
426 */
427 skb_push(entry->skb, rt2x00dev->ops->extra_tx_headroom);
428 memset(entry->skb->data, 0, rt2x00dev->ops->extra_tx_headroom);
429
430 /*
76dd5ddf 431 * Call the driver's write_tx_data function, if it exists.
78eea11b 432 */
76dd5ddf
GW
433 if (rt2x00dev->ops->lib->write_tx_data)
434 rt2x00dev->ops->lib->write_tx_data(entry, txdesc);
78eea11b
GW
435
436 /*
437 * Map the skb to DMA.
438 */
439 if (test_bit(DRIVER_REQUIRE_DMA, &rt2x00dev->flags))
fa69560f 440 rt2x00queue_map_txskb(entry);
78eea11b
GW
441
442 return 0;
443}
444
bd88a781
ID
445static void rt2x00queue_write_tx_descriptor(struct queue_entry *entry,
446 struct txentry_desc *txdesc)
7050ec82 447{
b869767b 448 struct data_queue *queue = entry->queue;
7050ec82 449
93331458 450 queue->rt2x00dev->ops->lib->write_tx_desc(entry, txdesc);
7050ec82
ID
451
452 /*
453 * All processing on the frame has been completed, this means
454 * it is now ready to be dumped to userspace through debugfs.
455 */
93331458 456 rt2x00debug_dump_frame(queue->rt2x00dev, DUMP_FRAME_TX, entry->skb);
6295d815
GW
457}
458
8be4eed0 459static void rt2x00queue_kick_tx_queue(struct data_queue *queue,
6295d815
GW
460 struct txentry_desc *txdesc)
461{
7050ec82 462 /*
b869767b 463 * Check if we need to kick the queue, there are however a few rules
6295d815 464 * 1) Don't kick unless this is the last in frame in a burst.
b869767b
ID
465 * When the burst flag is set, this frame is always followed
466 * by another frame which in some way are related to eachother.
467 * This is true for fragments, RTS or CTS-to-self frames.
6295d815 468 * 2) Rule 1 can be broken when the available entries
b869767b 469 * in the queue are less then a certain threshold.
7050ec82 470 */
b869767b
ID
471 if (rt2x00queue_threshold(queue) ||
472 !test_bit(ENTRY_TXD_BURST, &txdesc->flags))
dbba306f 473 queue->rt2x00dev->ops->lib->kick_queue(queue);
7050ec82 474}
7050ec82 475
7351c6bd
JB
476int rt2x00queue_write_tx_frame(struct data_queue *queue, struct sk_buff *skb,
477 bool local)
6db3786a 478{
e6a9854b 479 struct ieee80211_tx_info *tx_info;
6db3786a
ID
480 struct queue_entry *entry = rt2x00queue_get_entry(queue, Q_INDEX);
481 struct txentry_desc txdesc;
d74f5ba4 482 struct skb_frame_desc *skbdesc;
e6a9854b 483 u8 rate_idx, rate_flags;
6db3786a 484
6a4c499e
HS
485 if (unlikely(rt2x00queue_full(queue))) {
486 ERROR(queue->rt2x00dev,
487 "Dropping frame due to full tx queue %d.\n", queue->qid);
0e3de998 488 return -ENOBUFS;
6a4c499e 489 }
6db3786a 490
c6084d5f
HS
491 if (unlikely(test_and_set_bit(ENTRY_OWNER_DEVICE_DATA,
492 &entry->flags))) {
6db3786a
ID
493 ERROR(queue->rt2x00dev,
494 "Arrived at non-free entry in the non-full queue %d.\n"
495 "Please file bug report to %s.\n",
496 queue->qid, DRV_PROJECT);
497 return -EINVAL;
498 }
499
500 /*
501 * Copy all TX descriptor information into txdesc,
502 * after that we are free to use the skb->cb array
503 * for our information.
504 */
505 entry->skb = skb;
506 rt2x00queue_create_tx_descriptor(entry, &txdesc);
507
d74f5ba4 508 /*
e6a9854b 509 * All information is retrieved from the skb->cb array,
2bb057d0 510 * now we should claim ownership of the driver part of that
e6a9854b 511 * array, preserving the bitrate index and flags.
d74f5ba4 512 */
e6a9854b
JB
513 tx_info = IEEE80211_SKB_CB(skb);
514 rate_idx = tx_info->control.rates[0].idx;
515 rate_flags = tx_info->control.rates[0].flags;
0e3de998 516 skbdesc = get_skb_frame_desc(skb);
d74f5ba4
ID
517 memset(skbdesc, 0, sizeof(*skbdesc));
518 skbdesc->entry = entry;
e6a9854b
JB
519 skbdesc->tx_rate_idx = rate_idx;
520 skbdesc->tx_rate_flags = rate_flags;
d74f5ba4 521
7351c6bd
JB
522 if (local)
523 skbdesc->flags |= SKBDESC_NOT_MAC80211;
524
2bb057d0
ID
525 /*
526 * When hardware encryption is supported, and this frame
527 * is to be encrypted, we should strip the IV/EIV data from
3ad2f3fb 528 * the frame so we can provide it to the driver separately.
2bb057d0
ID
529 */
530 if (test_bit(ENTRY_TXD_ENCRYPT, &txdesc.flags) &&
dddfb478 531 !test_bit(ENTRY_TXD_ENCRYPT_IV, &txdesc.flags)) {
3f787bd6 532 if (test_bit(DRIVER_REQUIRE_COPY_IV, &queue->rt2x00dev->flags))
9eb4e21e 533 rt2x00crypto_tx_copy_iv(skb, &txdesc);
dddfb478 534 else
9eb4e21e 535 rt2x00crypto_tx_remove_iv(skb, &txdesc);
dddfb478 536 }
2bb057d0 537
93354cbb
ID
538 /*
539 * When DMA allocation is required we should guarentee to the
540 * driver that the DMA is aligned to a 4-byte boundary.
93354cbb
ID
541 * However some drivers require L2 padding to pad the payload
542 * rather then the header. This could be a requirement for
543 * PCI and USB devices, while header alignment only is valid
544 * for PCI devices.
545 */
9f166171 546 if (test_bit(DRIVER_REQUIRE_L2PAD, &queue->rt2x00dev->flags))
daee6c09 547 rt2x00queue_insert_l2pad(entry->skb, txdesc.header_length);
93354cbb 548 else if (test_bit(DRIVER_REQUIRE_DMA, &queue->rt2x00dev->flags))
daee6c09 549 rt2x00queue_align_frame(entry->skb);
9f166171 550
2bb057d0
ID
551 /*
552 * It could be possible that the queue was corrupted and this
0e3de998
ID
553 * call failed. Since we always return NETDEV_TX_OK to mac80211,
554 * this frame will simply be dropped.
2bb057d0 555 */
78eea11b 556 if (unlikely(rt2x00queue_write_tx_data(entry, &txdesc))) {
0262ab0d 557 clear_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags);
2bb057d0 558 entry->skb = NULL;
0e3de998 559 return -EIO;
6db3786a
ID
560 }
561
0262ab0d 562 set_bit(ENTRY_DATA_PENDING, &entry->flags);
6db3786a
ID
563
564 rt2x00queue_index_inc(queue, Q_INDEX);
565 rt2x00queue_write_tx_descriptor(entry, &txdesc);
8be4eed0 566 rt2x00queue_kick_tx_queue(queue, &txdesc);
6db3786a
ID
567
568 return 0;
569}
570
69cf36a4
HS
571int rt2x00queue_clear_beacon(struct rt2x00_dev *rt2x00dev,
572 struct ieee80211_vif *vif)
573{
574 struct rt2x00_intf *intf = vif_to_intf(vif);
575
576 if (unlikely(!intf->beacon))
577 return -ENOBUFS;
578
579 mutex_lock(&intf->beacon_skb_mutex);
580
581 /*
582 * Clean up the beacon skb.
583 */
584 rt2x00queue_free_skb(intf->beacon);
585
586 /*
587 * Clear beacon (single bssid devices don't need to clear the beacon
588 * since the beacon queue will get stopped anyway).
589 */
590 if (rt2x00dev->ops->lib->clear_beacon)
591 rt2x00dev->ops->lib->clear_beacon(intf->beacon);
592
593 mutex_unlock(&intf->beacon_skb_mutex);
594
595 return 0;
596}
597
8414ff07
HS
598int rt2x00queue_update_beacon_locked(struct rt2x00_dev *rt2x00dev,
599 struct ieee80211_vif *vif)
bd88a781
ID
600{
601 struct rt2x00_intf *intf = vif_to_intf(vif);
602 struct skb_frame_desc *skbdesc;
603 struct txentry_desc txdesc;
bd88a781
ID
604
605 if (unlikely(!intf->beacon))
606 return -ENOBUFS;
607
17512dc3
IP
608 /*
609 * Clean up the beacon skb.
610 */
fa69560f 611 rt2x00queue_free_skb(intf->beacon);
17512dc3 612
bd88a781 613 intf->beacon->skb = ieee80211_beacon_get(rt2x00dev->hw, vif);
8414ff07 614 if (!intf->beacon->skb)
bd88a781
ID
615 return -ENOMEM;
616
617 /*
618 * Copy all TX descriptor information into txdesc,
619 * after that we are free to use the skb->cb array
620 * for our information.
621 */
622 rt2x00queue_create_tx_descriptor(intf->beacon, &txdesc);
623
bd88a781
ID
624 /*
625 * Fill in skb descriptor
626 */
627 skbdesc = get_skb_frame_desc(intf->beacon->skb);
628 memset(skbdesc, 0, sizeof(*skbdesc));
bd88a781
ID
629 skbdesc->entry = intf->beacon;
630
bd88a781 631 /*
69cf36a4 632 * Send beacon to hardware.
bd88a781 633 */
f224f4ef 634 rt2x00dev->ops->lib->write_beacon(intf->beacon, &txdesc);
bd88a781 635
8414ff07
HS
636 return 0;
637
638}
639
640int rt2x00queue_update_beacon(struct rt2x00_dev *rt2x00dev,
641 struct ieee80211_vif *vif)
642{
643 struct rt2x00_intf *intf = vif_to_intf(vif);
644 int ret;
645
646 mutex_lock(&intf->beacon_skb_mutex);
647 ret = rt2x00queue_update_beacon_locked(rt2x00dev, vif);
17512dc3
IP
648 mutex_unlock(&intf->beacon_skb_mutex);
649
8414ff07 650 return ret;
bd88a781
ID
651}
652
5eb7efe8
ID
653void rt2x00queue_for_each_entry(struct data_queue *queue,
654 enum queue_index start,
655 enum queue_index end,
656 void (*fn)(struct queue_entry *entry))
657{
658 unsigned long irqflags;
659 unsigned int index_start;
660 unsigned int index_end;
661 unsigned int i;
662
663 if (unlikely(start >= Q_INDEX_MAX || end >= Q_INDEX_MAX)) {
664 ERROR(queue->rt2x00dev,
665 "Entry requested from invalid index range (%d - %d)\n",
666 start, end);
667 return;
668 }
669
670 /*
671 * Only protect the range we are going to loop over,
672 * if during our loop a extra entry is set to pending
673 * it should not be kicked during this run, since it
674 * is part of another TX operation.
675 */
813f0339 676 spin_lock_irqsave(&queue->index_lock, irqflags);
5eb7efe8
ID
677 index_start = queue->index[start];
678 index_end = queue->index[end];
813f0339 679 spin_unlock_irqrestore(&queue->index_lock, irqflags);
5eb7efe8
ID
680
681 /*
682 * Start from the TX done pointer, this guarentees that we will
683 * send out all frames in the correct order.
684 */
685 if (index_start < index_end) {
686 for (i = index_start; i < index_end; i++)
687 fn(&queue->entries[i]);
688 } else {
689 for (i = index_start; i < queue->limit; i++)
690 fn(&queue->entries[i]);
691
692 for (i = 0; i < index_end; i++)
693 fn(&queue->entries[i]);
694 }
695}
696EXPORT_SYMBOL_GPL(rt2x00queue_for_each_entry);
697
181d6902
ID
698struct queue_entry *rt2x00queue_get_entry(struct data_queue *queue,
699 enum queue_index index)
700{
701 struct queue_entry *entry;
5f46c4d0 702 unsigned long irqflags;
181d6902
ID
703
704 if (unlikely(index >= Q_INDEX_MAX)) {
705 ERROR(queue->rt2x00dev,
706 "Entry requested from invalid index type (%d)\n", index);
707 return NULL;
708 }
709
813f0339 710 spin_lock_irqsave(&queue->index_lock, irqflags);
181d6902
ID
711
712 entry = &queue->entries[queue->index[index]];
713
813f0339 714 spin_unlock_irqrestore(&queue->index_lock, irqflags);
181d6902
ID
715
716 return entry;
717}
718EXPORT_SYMBOL_GPL(rt2x00queue_get_entry);
719
720void rt2x00queue_index_inc(struct data_queue *queue, enum queue_index index)
721{
5f46c4d0
ID
722 unsigned long irqflags;
723
181d6902
ID
724 if (unlikely(index >= Q_INDEX_MAX)) {
725 ERROR(queue->rt2x00dev,
726 "Index change on invalid index type (%d)\n", index);
727 return;
728 }
729
813f0339 730 spin_lock_irqsave(&queue->index_lock, irqflags);
181d6902
ID
731
732 queue->index[index]++;
733 if (queue->index[index] >= queue->limit)
734 queue->index[index] = 0;
735
652a9dd2
ID
736 queue->last_action[index] = jiffies;
737
10b6b801
ID
738 if (index == Q_INDEX) {
739 queue->length++;
740 } else if (index == Q_INDEX_DONE) {
741 queue->length--;
55887511 742 queue->count++;
10b6b801 743 }
181d6902 744
813f0339 745 spin_unlock_irqrestore(&queue->index_lock, irqflags);
181d6902 746}
181d6902 747
0b7fde54
ID
748void rt2x00queue_pause_queue(struct data_queue *queue)
749{
750 if (!test_bit(DEVICE_STATE_PRESENT, &queue->rt2x00dev->flags) ||
751 !test_bit(QUEUE_STARTED, &queue->flags) ||
752 test_and_set_bit(QUEUE_PAUSED, &queue->flags))
753 return;
754
755 switch (queue->qid) {
f615e9a3
ID
756 case QID_AC_VO:
757 case QID_AC_VI:
0b7fde54
ID
758 case QID_AC_BE:
759 case QID_AC_BK:
0b7fde54
ID
760 /*
761 * For TX queues, we have to disable the queue
762 * inside mac80211.
763 */
764 ieee80211_stop_queue(queue->rt2x00dev->hw, queue->qid);
765 break;
766 default:
767 break;
768 }
769}
770EXPORT_SYMBOL_GPL(rt2x00queue_pause_queue);
771
772void rt2x00queue_unpause_queue(struct data_queue *queue)
773{
774 if (!test_bit(DEVICE_STATE_PRESENT, &queue->rt2x00dev->flags) ||
775 !test_bit(QUEUE_STARTED, &queue->flags) ||
776 !test_and_clear_bit(QUEUE_PAUSED, &queue->flags))
777 return;
778
779 switch (queue->qid) {
f615e9a3
ID
780 case QID_AC_VO:
781 case QID_AC_VI:
0b7fde54
ID
782 case QID_AC_BE:
783 case QID_AC_BK:
0b7fde54
ID
784 /*
785 * For TX queues, we have to enable the queue
786 * inside mac80211.
787 */
788 ieee80211_wake_queue(queue->rt2x00dev->hw, queue->qid);
789 break;
5be65609
ID
790 case QID_RX:
791 /*
792 * For RX we need to kick the queue now in order to
793 * receive frames.
794 */
795 queue->rt2x00dev->ops->lib->kick_queue(queue);
0b7fde54
ID
796 default:
797 break;
798 }
799}
800EXPORT_SYMBOL_GPL(rt2x00queue_unpause_queue);
801
802void rt2x00queue_start_queue(struct data_queue *queue)
803{
804 mutex_lock(&queue->status_lock);
805
806 if (!test_bit(DEVICE_STATE_PRESENT, &queue->rt2x00dev->flags) ||
807 test_and_set_bit(QUEUE_STARTED, &queue->flags)) {
808 mutex_unlock(&queue->status_lock);
809 return;
810 }
811
812 set_bit(QUEUE_PAUSED, &queue->flags);
813
814 queue->rt2x00dev->ops->lib->start_queue(queue);
815
816 rt2x00queue_unpause_queue(queue);
817
818 mutex_unlock(&queue->status_lock);
819}
820EXPORT_SYMBOL_GPL(rt2x00queue_start_queue);
821
822void rt2x00queue_stop_queue(struct data_queue *queue)
823{
824 mutex_lock(&queue->status_lock);
825
826 if (!test_and_clear_bit(QUEUE_STARTED, &queue->flags)) {
827 mutex_unlock(&queue->status_lock);
828 return;
829 }
830
831 rt2x00queue_pause_queue(queue);
832
833 queue->rt2x00dev->ops->lib->stop_queue(queue);
834
835 mutex_unlock(&queue->status_lock);
836}
837EXPORT_SYMBOL_GPL(rt2x00queue_stop_queue);
838
5be65609
ID
839void rt2x00queue_flush_queue(struct data_queue *queue, bool drop)
840{
841 unsigned int i;
842 bool started;
843 bool tx_queue =
f615e9a3 844 (queue->qid == QID_AC_VO) ||
5be65609 845 (queue->qid == QID_AC_VI) ||
f615e9a3
ID
846 (queue->qid == QID_AC_BE) ||
847 (queue->qid == QID_AC_BK);
5be65609
ID
848
849 mutex_lock(&queue->status_lock);
850
851 /*
852 * If the queue has been started, we must stop it temporarily
853 * to prevent any new frames to be queued on the device. If
854 * we are not dropping the pending frames, the queue must
855 * only be stopped in the software and not the hardware,
856 * otherwise the queue will never become empty on its own.
857 */
858 started = test_bit(QUEUE_STARTED, &queue->flags);
859 if (started) {
860 /*
861 * Pause the queue
862 */
863 rt2x00queue_pause_queue(queue);
864
865 /*
866 * If we are not supposed to drop any pending
867 * frames, this means we must force a start (=kick)
868 * to the queue to make sure the hardware will
869 * start transmitting.
870 */
871 if (!drop && tx_queue)
872 queue->rt2x00dev->ops->lib->kick_queue(queue);
873 }
874
875 /*
876 * Check if driver supports flushing, we can only guarentee
877 * full support for flushing if the driver is able
878 * to cancel all pending frames (drop = true).
879 */
880 if (drop && queue->rt2x00dev->ops->lib->flush_queue)
881 queue->rt2x00dev->ops->lib->flush_queue(queue);
882
883 /*
884 * When we don't want to drop any frames, or when
885 * the driver doesn't fully flush the queue correcly,
886 * we must wait for the queue to become empty.
887 */
888 for (i = 0; !rt2x00queue_empty(queue) && i < 100; i++)
889 msleep(10);
890
891 /*
892 * The queue flush has failed...
893 */
894 if (unlikely(!rt2x00queue_empty(queue)))
21957c31 895 WARNING(queue->rt2x00dev, "Queue %d failed to flush\n", queue->qid);
5be65609
ID
896
897 /*
898 * Restore the queue to the previous status
899 */
900 if (started)
901 rt2x00queue_unpause_queue(queue);
902
903 mutex_unlock(&queue->status_lock);
904}
905EXPORT_SYMBOL_GPL(rt2x00queue_flush_queue);
906
0b7fde54
ID
907void rt2x00queue_start_queues(struct rt2x00_dev *rt2x00dev)
908{
909 struct data_queue *queue;
910
911 /*
912 * rt2x00queue_start_queue will call ieee80211_wake_queue
913 * for each queue after is has been properly initialized.
914 */
915 tx_queue_for_each(rt2x00dev, queue)
916 rt2x00queue_start_queue(queue);
917
918 rt2x00queue_start_queue(rt2x00dev->rx);
919}
920EXPORT_SYMBOL_GPL(rt2x00queue_start_queues);
921
922void rt2x00queue_stop_queues(struct rt2x00_dev *rt2x00dev)
923{
924 struct data_queue *queue;
925
926 /*
927 * rt2x00queue_stop_queue will call ieee80211_stop_queue
928 * as well, but we are completely shutting doing everything
929 * now, so it is much safer to stop all TX queues at once,
930 * and use rt2x00queue_stop_queue for cleaning up.
931 */
932 ieee80211_stop_queues(rt2x00dev->hw);
933
934 tx_queue_for_each(rt2x00dev, queue)
935 rt2x00queue_stop_queue(queue);
936
937 rt2x00queue_stop_queue(rt2x00dev->rx);
938}
939EXPORT_SYMBOL_GPL(rt2x00queue_stop_queues);
940
5be65609
ID
941void rt2x00queue_flush_queues(struct rt2x00_dev *rt2x00dev, bool drop)
942{
943 struct data_queue *queue;
944
945 tx_queue_for_each(rt2x00dev, queue)
946 rt2x00queue_flush_queue(queue, drop);
947
948 rt2x00queue_flush_queue(rt2x00dev->rx, drop);
949}
950EXPORT_SYMBOL_GPL(rt2x00queue_flush_queues);
951
181d6902
ID
952static void rt2x00queue_reset(struct data_queue *queue)
953{
5f46c4d0 954 unsigned long irqflags;
652a9dd2 955 unsigned int i;
5f46c4d0 956
813f0339 957 spin_lock_irqsave(&queue->index_lock, irqflags);
181d6902
ID
958
959 queue->count = 0;
960 queue->length = 0;
652a9dd2
ID
961
962 for (i = 0; i < Q_INDEX_MAX; i++) {
963 queue->index[i] = 0;
964 queue->last_action[i] = jiffies;
965 }
181d6902 966
813f0339 967 spin_unlock_irqrestore(&queue->index_lock, irqflags);
181d6902
ID
968}
969
798b7adb 970void rt2x00queue_init_queues(struct rt2x00_dev *rt2x00dev)
181d6902
ID
971{
972 struct data_queue *queue;
973 unsigned int i;
974
798b7adb 975 queue_for_each(rt2x00dev, queue) {
181d6902
ID
976 rt2x00queue_reset(queue);
977
64e7d723 978 for (i = 0; i < queue->limit; i++)
798b7adb 979 rt2x00dev->ops->lib->clear_entry(&queue->entries[i]);
181d6902
ID
980 }
981}
982
983static int rt2x00queue_alloc_entries(struct data_queue *queue,
984 const struct data_queue_desc *qdesc)
985{
986 struct queue_entry *entries;
987 unsigned int entry_size;
988 unsigned int i;
989
990 rt2x00queue_reset(queue);
991
992 queue->limit = qdesc->entry_num;
b869767b 993 queue->threshold = DIV_ROUND_UP(qdesc->entry_num, 10);
181d6902
ID
994 queue->data_size = qdesc->data_size;
995 queue->desc_size = qdesc->desc_size;
996
997 /*
998 * Allocate all queue entries.
999 */
1000 entry_size = sizeof(*entries) + qdesc->priv_size;
baeb2ffa 1001 entries = kcalloc(queue->limit, entry_size, GFP_KERNEL);
181d6902
ID
1002 if (!entries)
1003 return -ENOMEM;
1004
1005#define QUEUE_ENTRY_PRIV_OFFSET(__base, __index, __limit, __esize, __psize) \
f8bfbc31
ME
1006 (((char *)(__base)) + ((__limit) * (__esize)) + \
1007 ((__index) * (__psize)))
181d6902
ID
1008
1009 for (i = 0; i < queue->limit; i++) {
1010 entries[i].flags = 0;
1011 entries[i].queue = queue;
1012 entries[i].skb = NULL;
1013 entries[i].entry_idx = i;
1014 entries[i].priv_data =
1015 QUEUE_ENTRY_PRIV_OFFSET(entries, i, queue->limit,
1016 sizeof(*entries), qdesc->priv_size);
1017 }
1018
1019#undef QUEUE_ENTRY_PRIV_OFFSET
1020
1021 queue->entries = entries;
1022
1023 return 0;
1024}
1025
fa69560f 1026static void rt2x00queue_free_skbs(struct data_queue *queue)
30caa6e3
GW
1027{
1028 unsigned int i;
1029
1030 if (!queue->entries)
1031 return;
1032
1033 for (i = 0; i < queue->limit; i++) {
fa69560f 1034 rt2x00queue_free_skb(&queue->entries[i]);
30caa6e3
GW
1035 }
1036}
1037
fa69560f 1038static int rt2x00queue_alloc_rxskbs(struct data_queue *queue)
30caa6e3
GW
1039{
1040 unsigned int i;
1041 struct sk_buff *skb;
1042
1043 for (i = 0; i < queue->limit; i++) {
fa69560f 1044 skb = rt2x00queue_alloc_rxskb(&queue->entries[i]);
30caa6e3 1045 if (!skb)
61243d8e 1046 return -ENOMEM;
30caa6e3
GW
1047 queue->entries[i].skb = skb;
1048 }
1049
1050 return 0;
30caa6e3
GW
1051}
1052
181d6902
ID
1053int rt2x00queue_initialize(struct rt2x00_dev *rt2x00dev)
1054{
1055 struct data_queue *queue;
1056 int status;
1057
181d6902
ID
1058 status = rt2x00queue_alloc_entries(rt2x00dev->rx, rt2x00dev->ops->rx);
1059 if (status)
1060 goto exit;
1061
1062 tx_queue_for_each(rt2x00dev, queue) {
1063 status = rt2x00queue_alloc_entries(queue, rt2x00dev->ops->tx);
1064 if (status)
1065 goto exit;
1066 }
1067
1068 status = rt2x00queue_alloc_entries(rt2x00dev->bcn, rt2x00dev->ops->bcn);
1069 if (status)
1070 goto exit;
1071
30caa6e3 1072 if (test_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags)) {
e74df4a7 1073 status = rt2x00queue_alloc_entries(rt2x00dev->atim,
30caa6e3
GW
1074 rt2x00dev->ops->atim);
1075 if (status)
1076 goto exit;
1077 }
181d6902 1078
fa69560f 1079 status = rt2x00queue_alloc_rxskbs(rt2x00dev->rx);
181d6902
ID
1080 if (status)
1081 goto exit;
1082
1083 return 0;
1084
1085exit:
1086 ERROR(rt2x00dev, "Queue entries allocation failed.\n");
1087
1088 rt2x00queue_uninitialize(rt2x00dev);
1089
1090 return status;
1091}
1092
1093void rt2x00queue_uninitialize(struct rt2x00_dev *rt2x00dev)
1094{
1095 struct data_queue *queue;
1096
fa69560f 1097 rt2x00queue_free_skbs(rt2x00dev->rx);
30caa6e3 1098
181d6902
ID
1099 queue_for_each(rt2x00dev, queue) {
1100 kfree(queue->entries);
1101 queue->entries = NULL;
1102 }
1103}
1104
8f539276
ID
1105static void rt2x00queue_init(struct rt2x00_dev *rt2x00dev,
1106 struct data_queue *queue, enum data_queue_qid qid)
1107{
0b7fde54 1108 mutex_init(&queue->status_lock);
813f0339 1109 spin_lock_init(&queue->index_lock);
8f539276
ID
1110
1111 queue->rt2x00dev = rt2x00dev;
1112 queue->qid = qid;
2af0a570 1113 queue->txop = 0;
8f539276
ID
1114 queue->aifs = 2;
1115 queue->cw_min = 5;
1116 queue->cw_max = 10;
1117}
1118
181d6902
ID
1119int rt2x00queue_allocate(struct rt2x00_dev *rt2x00dev)
1120{
1121 struct data_queue *queue;
1122 enum data_queue_qid qid;
1123 unsigned int req_atim =
1124 !!test_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags);
1125
1126 /*
1127 * We need the following queues:
1128 * RX: 1
61448f88 1129 * TX: ops->tx_queues
181d6902
ID
1130 * Beacon: 1
1131 * Atim: 1 (if required)
1132 */
61448f88 1133 rt2x00dev->data_queues = 2 + rt2x00dev->ops->tx_queues + req_atim;
181d6902 1134
baeb2ffa 1135 queue = kcalloc(rt2x00dev->data_queues, sizeof(*queue), GFP_KERNEL);
181d6902
ID
1136 if (!queue) {
1137 ERROR(rt2x00dev, "Queue allocation failed.\n");
1138 return -ENOMEM;
1139 }
1140
1141 /*
1142 * Initialize pointers
1143 */
1144 rt2x00dev->rx = queue;
1145 rt2x00dev->tx = &queue[1];
61448f88 1146 rt2x00dev->bcn = &queue[1 + rt2x00dev->ops->tx_queues];
e74df4a7 1147 rt2x00dev->atim = req_atim ? &queue[2 + rt2x00dev->ops->tx_queues] : NULL;
181d6902
ID
1148
1149 /*
1150 * Initialize queue parameters.
1151 * RX: qid = QID_RX
f615e9a3 1152 * TX: qid = QID_AC_VO + index
181d6902
ID
1153 * TX: cw_min: 2^5 = 32.
1154 * TX: cw_max: 2^10 = 1024.
565a019a
ID
1155 * BCN: qid = QID_BEACON
1156 * ATIM: qid = QID_ATIM
181d6902 1157 */
8f539276 1158 rt2x00queue_init(rt2x00dev, rt2x00dev->rx, QID_RX);
181d6902 1159
f615e9a3 1160 qid = QID_AC_VO;
8f539276
ID
1161 tx_queue_for_each(rt2x00dev, queue)
1162 rt2x00queue_init(rt2x00dev, queue, qid++);
181d6902 1163
e74df4a7 1164 rt2x00queue_init(rt2x00dev, rt2x00dev->bcn, QID_BEACON);
181d6902 1165 if (req_atim)
e74df4a7 1166 rt2x00queue_init(rt2x00dev, rt2x00dev->atim, QID_ATIM);
181d6902
ID
1167
1168 return 0;
1169}
1170
1171void rt2x00queue_free(struct rt2x00_dev *rt2x00dev)
1172{
1173 kfree(rt2x00dev->rx);
1174 rt2x00dev->rx = NULL;
1175 rt2x00dev->tx = NULL;
1176 rt2x00dev->bcn = NULL;
1177}
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