rt2x00: Move code into seperate functions
[deliverable/linux.git] / drivers / net / wireless / rt2x00 / rt2x00queue.c
CommitLineData
181d6902
ID
1/*
2 Copyright (C) 2004 - 2008 rt2x00 SourceForge Project
3 <http://rt2x00.serialmonkey.com>
4
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
9
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
14
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the
17 Free Software Foundation, Inc.,
18 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19 */
20
21/*
22 Module: rt2x00lib
23 Abstract: rt2x00 queue specific routines.
24 */
25
26#include <linux/kernel.h>
27#include <linux/module.h>
c4da0048 28#include <linux/dma-mapping.h>
181d6902
ID
29
30#include "rt2x00.h"
31#include "rt2x00lib.h"
32
c4da0048
GW
33struct sk_buff *rt2x00queue_alloc_rxskb(struct rt2x00_dev *rt2x00dev,
34 struct queue_entry *entry)
239c249d 35{
c4da0048
GW
36 struct sk_buff *skb;
37 struct skb_frame_desc *skbdesc;
2bb057d0
ID
38 unsigned int frame_size;
39 unsigned int head_size = 0;
40 unsigned int tail_size = 0;
239c249d
GW
41
42 /*
43 * The frame size includes descriptor size, because the
44 * hardware directly receive the frame into the skbuffer.
45 */
c4da0048 46 frame_size = entry->queue->data_size + entry->queue->desc_size;
239c249d
GW
47
48 /*
ff352391
ID
49 * The payload should be aligned to a 4-byte boundary,
50 * this means we need at least 3 bytes for moving the frame
51 * into the correct offset.
239c249d 52 */
2bb057d0
ID
53 head_size = 4;
54
55 /*
56 * For IV/EIV/ICV assembly we must make sure there is
57 * at least 8 bytes bytes available in headroom for IV/EIV
9c3444d3 58 * and 8 bytes for ICV data as tailroon.
2bb057d0 59 */
2bb057d0
ID
60 if (test_bit(CONFIG_SUPPORT_HW_CRYPTO, &rt2x00dev->flags)) {
61 head_size += 8;
9c3444d3 62 tail_size += 8;
2bb057d0 63 }
239c249d
GW
64
65 /*
66 * Allocate skbuffer.
67 */
2bb057d0 68 skb = dev_alloc_skb(frame_size + head_size + tail_size);
239c249d
GW
69 if (!skb)
70 return NULL;
71
2bb057d0
ID
72 /*
73 * Make sure we not have a frame with the requested bytes
74 * available in the head and tail.
75 */
76 skb_reserve(skb, head_size);
239c249d
GW
77 skb_put(skb, frame_size);
78
c4da0048
GW
79 /*
80 * Populate skbdesc.
81 */
82 skbdesc = get_skb_frame_desc(skb);
83 memset(skbdesc, 0, sizeof(*skbdesc));
84 skbdesc->entry = entry;
85
86 if (test_bit(DRIVER_REQUIRE_DMA, &rt2x00dev->flags)) {
87 skbdesc->skb_dma = dma_map_single(rt2x00dev->dev,
88 skb->data,
89 skb->len,
90 DMA_FROM_DEVICE);
91 skbdesc->flags |= SKBDESC_DMA_MAPPED_RX;
92 }
93
239c249d
GW
94 return skb;
95}
30caa6e3 96
c4da0048 97void rt2x00queue_map_txskb(struct rt2x00_dev *rt2x00dev, struct sk_buff *skb)
30caa6e3 98{
c4da0048
GW
99 struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb);
100
3ee54a07
ID
101 /*
102 * If device has requested headroom, we should make sure that
103 * is also mapped to the DMA so it can be used for transfering
104 * additional descriptor information to the hardware.
105 */
106 skb_push(skb, rt2x00dev->hw->extra_tx_headroom);
107
108 skbdesc->skb_dma =
109 dma_map_single(rt2x00dev->dev, skb->data, skb->len, DMA_TO_DEVICE);
110
111 /*
112 * Restore data pointer to original location again.
113 */
114 skb_pull(skb, rt2x00dev->hw->extra_tx_headroom);
115
c4da0048
GW
116 skbdesc->flags |= SKBDESC_DMA_MAPPED_TX;
117}
118EXPORT_SYMBOL_GPL(rt2x00queue_map_txskb);
119
120void rt2x00queue_unmap_skb(struct rt2x00_dev *rt2x00dev, struct sk_buff *skb)
121{
122 struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb);
123
124 if (skbdesc->flags & SKBDESC_DMA_MAPPED_RX) {
125 dma_unmap_single(rt2x00dev->dev, skbdesc->skb_dma, skb->len,
126 DMA_FROM_DEVICE);
127 skbdesc->flags &= ~SKBDESC_DMA_MAPPED_RX;
128 }
129
130 if (skbdesc->flags & SKBDESC_DMA_MAPPED_TX) {
3ee54a07
ID
131 /*
132 * Add headroom to the skb length, it has been removed
133 * by the driver, but it was actually mapped to DMA.
134 */
135 dma_unmap_single(rt2x00dev->dev, skbdesc->skb_dma,
136 skb->len + rt2x00dev->hw->extra_tx_headroom,
c4da0048
GW
137 DMA_TO_DEVICE);
138 skbdesc->flags &= ~SKBDESC_DMA_MAPPED_TX;
139 }
140}
c4da0048
GW
141
142void rt2x00queue_free_skb(struct rt2x00_dev *rt2x00dev, struct sk_buff *skb)
143{
9a613195
ID
144 if (!skb)
145 return;
146
61243d8e 147 rt2x00queue_unmap_skb(rt2x00dev, skb);
30caa6e3
GW
148 dev_kfree_skb_any(skb);
149}
239c249d 150
7b40982e
ID
151static void rt2x00queue_create_tx_descriptor_seq(struct queue_entry *entry,
152 struct txentry_desc *txdesc)
153{
154 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(entry->skb);
155 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)entry->skb->data;
156 struct rt2x00_intf *intf = vif_to_intf(tx_info->control.vif);
157 unsigned long irqflags;
158
159 if (!(tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) ||
160 unlikely(!tx_info->control.vif))
161 return;
162
163 /*
164 * Hardware should insert sequence counter.
165 * FIXME: We insert a software sequence counter first for
166 * hardware that doesn't support hardware sequence counting.
167 *
168 * This is wrong because beacons are not getting sequence
169 * numbers assigned properly.
170 *
171 * A secondary problem exists for drivers that cannot toggle
172 * sequence counting per-frame, since those will override the
173 * sequence counter given by mac80211.
174 */
175 spin_lock_irqsave(&intf->seqlock, irqflags);
176
177 if (test_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags))
178 intf->seqno += 0x10;
179 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
180 hdr->seq_ctrl |= cpu_to_le16(intf->seqno);
181
182 spin_unlock_irqrestore(&intf->seqlock, irqflags);
183
184 __set_bit(ENTRY_TXD_GENERATE_SEQ, &txdesc->flags);
185}
186
187static void rt2x00queue_create_tx_descriptor_plcp(struct queue_entry *entry,
188 struct txentry_desc *txdesc,
189 const struct rt2x00_rate *hwrate)
190{
191 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
192 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(entry->skb);
193 struct ieee80211_tx_rate *txrate = &tx_info->control.rates[0];
194 unsigned int data_length;
195 unsigned int duration;
196 unsigned int residual;
197
198 /* Data length + CRC + Crypto overhead (IV/EIV/ICV/MIC) */
199 data_length = entry->skb->len + 4;
200 data_length += rt2x00crypto_tx_overhead(rt2x00dev, entry->skb);
201
202 /*
203 * PLCP setup
204 * Length calculation depends on OFDM/CCK rate.
205 */
206 txdesc->signal = hwrate->plcp;
207 txdesc->service = 0x04;
208
209 if (hwrate->flags & DEV_RATE_OFDM) {
210 txdesc->length_high = (data_length >> 6) & 0x3f;
211 txdesc->length_low = data_length & 0x3f;
212 } else {
213 /*
214 * Convert length to microseconds.
215 */
216 residual = GET_DURATION_RES(data_length, hwrate->bitrate);
217 duration = GET_DURATION(data_length, hwrate->bitrate);
218
219 if (residual != 0) {
220 duration++;
221
222 /*
223 * Check if we need to set the Length Extension
224 */
225 if (hwrate->bitrate == 110 && residual <= 30)
226 txdesc->service |= 0x80;
227 }
228
229 txdesc->length_high = (duration >> 8) & 0xff;
230 txdesc->length_low = duration & 0xff;
231
232 /*
233 * When preamble is enabled we should set the
234 * preamble bit for the signal.
235 */
236 if (txrate->flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE)
237 txdesc->signal |= 0x08;
238 }
239}
240
bd88a781
ID
241static void rt2x00queue_create_tx_descriptor(struct queue_entry *entry,
242 struct txentry_desc *txdesc)
7050ec82 243{
2e92e6f2 244 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
e039fa4a 245 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(entry->skb);
7050ec82 246 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)entry->skb->data;
2e92e6f2 247 struct ieee80211_rate *rate =
e039fa4a 248 ieee80211_get_tx_rate(rt2x00dev->hw, tx_info);
7050ec82 249 const struct rt2x00_rate *hwrate;
7050ec82
ID
250
251 memset(txdesc, 0, sizeof(*txdesc));
252
253 /*
254 * Initialize information from queue
255 */
256 txdesc->queue = entry->queue->qid;
257 txdesc->cw_min = entry->queue->cw_min;
258 txdesc->cw_max = entry->queue->cw_max;
259 txdesc->aifs = entry->queue->aifs;
260
7050ec82
ID
261 /*
262 * Check whether this frame is to be acked.
263 */
e039fa4a 264 if (!(tx_info->flags & IEEE80211_TX_CTL_NO_ACK))
7050ec82
ID
265 __set_bit(ENTRY_TXD_ACK, &txdesc->flags);
266
267 /*
268 * Check if this is a RTS/CTS frame
269 */
ac104462
ID
270 if (ieee80211_is_rts(hdr->frame_control) ||
271 ieee80211_is_cts(hdr->frame_control)) {
7050ec82 272 __set_bit(ENTRY_TXD_BURST, &txdesc->flags);
ac104462 273 if (ieee80211_is_rts(hdr->frame_control))
7050ec82 274 __set_bit(ENTRY_TXD_RTS_FRAME, &txdesc->flags);
e039fa4a 275 else
7050ec82 276 __set_bit(ENTRY_TXD_CTS_FRAME, &txdesc->flags);
e039fa4a 277 if (tx_info->control.rts_cts_rate_idx >= 0)
2e92e6f2 278 rate =
e039fa4a 279 ieee80211_get_rts_cts_rate(rt2x00dev->hw, tx_info);
7050ec82
ID
280 }
281
282 /*
283 * Determine retry information.
284 */
e6a9854b 285 txdesc->retry_limit = tx_info->control.rates[0].count - 1;
42c82857 286 if (txdesc->retry_limit >= rt2x00dev->long_retry)
7050ec82
ID
287 __set_bit(ENTRY_TXD_RETRY_MODE, &txdesc->flags);
288
289 /*
290 * Check if more fragments are pending
291 */
8b7b1e05 292 if (ieee80211_has_morefrags(hdr->frame_control)) {
7050ec82
ID
293 __set_bit(ENTRY_TXD_BURST, &txdesc->flags);
294 __set_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags);
295 }
296
297 /*
298 * Beacons and probe responses require the tsf timestamp
299 * to be inserted into the frame.
300 */
ac104462
ID
301 if (ieee80211_is_beacon(hdr->frame_control) ||
302 ieee80211_is_probe_resp(hdr->frame_control))
7050ec82
ID
303 __set_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags);
304
305 /*
306 * Determine with what IFS priority this frame should be send.
307 * Set ifs to IFS_SIFS when the this is not the first fragment,
308 * or this fragment came after RTS/CTS.
309 */
7b40982e
ID
310 if ((tx_info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT) &&
311 !test_bit(ENTRY_TXD_RTS_FRAME, &txdesc->flags)) {
7050ec82
ID
312 __set_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags);
313 txdesc->ifs = IFS_BACKOFF;
7b40982e 314 } else
7050ec82 315 txdesc->ifs = IFS_SIFS;
7050ec82 316
7050ec82 317 hwrate = rt2x00_get_rate(rate->hw_value);
7b40982e 318 if (hwrate->flags & DEV_RATE_OFDM)
7050ec82
ID
319 __set_bit(ENTRY_TXD_OFDM_RATE, &txdesc->flags);
320
7b40982e
ID
321 /*
322 * Apply TX descriptor handling by components
323 */
324 rt2x00crypto_create_tx_descriptor(entry, txdesc);
325 rt2x00queue_create_tx_descriptor_seq(entry, txdesc);
326 rt2x00queue_create_tx_descriptor_plcp(entry, txdesc, hwrate);
7050ec82 327}
7050ec82 328
bd88a781
ID
329static void rt2x00queue_write_tx_descriptor(struct queue_entry *entry,
330 struct txentry_desc *txdesc)
7050ec82 331{
b869767b
ID
332 struct data_queue *queue = entry->queue;
333 struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;
7050ec82
ID
334
335 rt2x00dev->ops->lib->write_tx_desc(rt2x00dev, entry->skb, txdesc);
336
337 /*
338 * All processing on the frame has been completed, this means
339 * it is now ready to be dumped to userspace through debugfs.
340 */
341 rt2x00debug_dump_frame(rt2x00dev, DUMP_FRAME_TX, entry->skb);
342
343 /*
b869767b
ID
344 * Check if we need to kick the queue, there are however a few rules
345 * 1) Don't kick beacon queue
346 * 2) Don't kick unless this is the last in frame in a burst.
347 * When the burst flag is set, this frame is always followed
348 * by another frame which in some way are related to eachother.
349 * This is true for fragments, RTS or CTS-to-self frames.
350 * 3) Rule 2 can be broken when the available entries
351 * in the queue are less then a certain threshold.
7050ec82 352 */
b869767b
ID
353 if (entry->queue->qid == QID_BEACON)
354 return;
355
356 if (rt2x00queue_threshold(queue) ||
357 !test_bit(ENTRY_TXD_BURST, &txdesc->flags))
358 rt2x00dev->ops->lib->kick_tx_queue(rt2x00dev, queue->qid);
7050ec82 359}
7050ec82 360
6db3786a
ID
361int rt2x00queue_write_tx_frame(struct data_queue *queue, struct sk_buff *skb)
362{
e6a9854b 363 struct ieee80211_tx_info *tx_info;
6db3786a
ID
364 struct queue_entry *entry = rt2x00queue_get_entry(queue, Q_INDEX);
365 struct txentry_desc txdesc;
d74f5ba4 366 struct skb_frame_desc *skbdesc;
8713a7cc 367 unsigned int iv_len = 0;
e6a9854b 368 u8 rate_idx, rate_flags;
6db3786a
ID
369
370 if (unlikely(rt2x00queue_full(queue)))
0e3de998 371 return -ENOBUFS;
6db3786a 372
0262ab0d 373 if (test_and_set_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags)) {
6db3786a
ID
374 ERROR(queue->rt2x00dev,
375 "Arrived at non-free entry in the non-full queue %d.\n"
376 "Please file bug report to %s.\n",
377 queue->qid, DRV_PROJECT);
378 return -EINVAL;
379 }
380
381 /*
382 * Copy all TX descriptor information into txdesc,
383 * after that we are free to use the skb->cb array
384 * for our information.
385 */
386 entry->skb = skb;
387 rt2x00queue_create_tx_descriptor(entry, &txdesc);
388
8713a7cc
FF
389 if (IEEE80211_SKB_CB(skb)->control.hw_key != NULL)
390 iv_len = IEEE80211_SKB_CB(skb)->control.hw_key->iv_len;
391
d74f5ba4 392 /*
e6a9854b 393 * All information is retrieved from the skb->cb array,
2bb057d0 394 * now we should claim ownership of the driver part of that
e6a9854b 395 * array, preserving the bitrate index and flags.
d74f5ba4 396 */
e6a9854b
JB
397 tx_info = IEEE80211_SKB_CB(skb);
398 rate_idx = tx_info->control.rates[0].idx;
399 rate_flags = tx_info->control.rates[0].flags;
0e3de998 400 skbdesc = get_skb_frame_desc(skb);
d74f5ba4
ID
401 memset(skbdesc, 0, sizeof(*skbdesc));
402 skbdesc->entry = entry;
e6a9854b
JB
403 skbdesc->tx_rate_idx = rate_idx;
404 skbdesc->tx_rate_flags = rate_flags;
d74f5ba4 405
2bb057d0
ID
406 /*
407 * When hardware encryption is supported, and this frame
408 * is to be encrypted, we should strip the IV/EIV data from
409 * the frame so we can provide it to the driver seperately.
410 */
411 if (test_bit(ENTRY_TXD_ENCRYPT, &txdesc.flags) &&
dddfb478 412 !test_bit(ENTRY_TXD_ENCRYPT_IV, &txdesc.flags)) {
3f787bd6 413 if (test_bit(DRIVER_REQUIRE_COPY_IV, &queue->rt2x00dev->flags))
dddfb478
ID
414 rt2x00crypto_tx_copy_iv(skb, iv_len);
415 else
416 rt2x00crypto_tx_remove_iv(skb, iv_len);
417 }
2bb057d0
ID
418
419 /*
420 * It could be possible that the queue was corrupted and this
0e3de998
ID
421 * call failed. Since we always return NETDEV_TX_OK to mac80211,
422 * this frame will simply be dropped.
2bb057d0 423 */
6db3786a 424 if (unlikely(queue->rt2x00dev->ops->lib->write_tx_data(entry))) {
0262ab0d 425 clear_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags);
2bb057d0 426 entry->skb = NULL;
0e3de998 427 return -EIO;
6db3786a
ID
428 }
429
d74f5ba4
ID
430 if (test_bit(DRIVER_REQUIRE_DMA, &queue->rt2x00dev->flags))
431 rt2x00queue_map_txskb(queue->rt2x00dev, skb);
432
0262ab0d 433 set_bit(ENTRY_DATA_PENDING, &entry->flags);
6db3786a
ID
434
435 rt2x00queue_index_inc(queue, Q_INDEX);
436 rt2x00queue_write_tx_descriptor(entry, &txdesc);
437
438 return 0;
439}
440
bd88a781
ID
441int rt2x00queue_update_beacon(struct rt2x00_dev *rt2x00dev,
442 struct ieee80211_vif *vif)
443{
444 struct rt2x00_intf *intf = vif_to_intf(vif);
445 struct skb_frame_desc *skbdesc;
446 struct txentry_desc txdesc;
447 __le32 desc[16];
448
449 if (unlikely(!intf->beacon))
450 return -ENOBUFS;
451
452 intf->beacon->skb = ieee80211_beacon_get(rt2x00dev->hw, vif);
453 if (!intf->beacon->skb)
454 return -ENOMEM;
455
456 /*
457 * Copy all TX descriptor information into txdesc,
458 * after that we are free to use the skb->cb array
459 * for our information.
460 */
461 rt2x00queue_create_tx_descriptor(intf->beacon, &txdesc);
462
463 /*
464 * For the descriptor we use a local array from where the
465 * driver can move it to the correct location required for
466 * the hardware.
467 */
468 memset(desc, 0, sizeof(desc));
469
470 /*
471 * Fill in skb descriptor
472 */
473 skbdesc = get_skb_frame_desc(intf->beacon->skb);
474 memset(skbdesc, 0, sizeof(*skbdesc));
475 skbdesc->desc = desc;
476 skbdesc->desc_len = intf->beacon->queue->desc_size;
477 skbdesc->entry = intf->beacon;
478
479 /*
480 * Write TX descriptor into reserved room in front of the beacon.
481 */
482 rt2x00queue_write_tx_descriptor(intf->beacon, &txdesc);
483
484 /*
485 * Send beacon to hardware.
486 * Also enable beacon generation, which might have been disabled
487 * by the driver during the config_beacon() callback function.
488 */
489 rt2x00dev->ops->lib->write_beacon(intf->beacon);
490 rt2x00dev->ops->lib->kick_tx_queue(rt2x00dev, QID_BEACON);
491
492 return 0;
493}
494
181d6902 495struct data_queue *rt2x00queue_get_queue(struct rt2x00_dev *rt2x00dev,
e58c6aca 496 const enum data_queue_qid queue)
181d6902
ID
497{
498 int atim = test_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags);
499
61448f88 500 if (queue < rt2x00dev->ops->tx_queues && rt2x00dev->tx)
181d6902
ID
501 return &rt2x00dev->tx[queue];
502
503 if (!rt2x00dev->bcn)
504 return NULL;
505
e58c6aca 506 if (queue == QID_BEACON)
181d6902 507 return &rt2x00dev->bcn[0];
e58c6aca 508 else if (queue == QID_ATIM && atim)
181d6902
ID
509 return &rt2x00dev->bcn[1];
510
511 return NULL;
512}
513EXPORT_SYMBOL_GPL(rt2x00queue_get_queue);
514
515struct queue_entry *rt2x00queue_get_entry(struct data_queue *queue,
516 enum queue_index index)
517{
518 struct queue_entry *entry;
5f46c4d0 519 unsigned long irqflags;
181d6902
ID
520
521 if (unlikely(index >= Q_INDEX_MAX)) {
522 ERROR(queue->rt2x00dev,
523 "Entry requested from invalid index type (%d)\n", index);
524 return NULL;
525 }
526
5f46c4d0 527 spin_lock_irqsave(&queue->lock, irqflags);
181d6902
ID
528
529 entry = &queue->entries[queue->index[index]];
530
5f46c4d0 531 spin_unlock_irqrestore(&queue->lock, irqflags);
181d6902
ID
532
533 return entry;
534}
535EXPORT_SYMBOL_GPL(rt2x00queue_get_entry);
536
537void rt2x00queue_index_inc(struct data_queue *queue, enum queue_index index)
538{
5f46c4d0
ID
539 unsigned long irqflags;
540
181d6902
ID
541 if (unlikely(index >= Q_INDEX_MAX)) {
542 ERROR(queue->rt2x00dev,
543 "Index change on invalid index type (%d)\n", index);
544 return;
545 }
546
5f46c4d0 547 spin_lock_irqsave(&queue->lock, irqflags);
181d6902
ID
548
549 queue->index[index]++;
550 if (queue->index[index] >= queue->limit)
551 queue->index[index] = 0;
552
10b6b801
ID
553 if (index == Q_INDEX) {
554 queue->length++;
555 } else if (index == Q_INDEX_DONE) {
556 queue->length--;
55887511 557 queue->count++;
10b6b801 558 }
181d6902 559
5f46c4d0 560 spin_unlock_irqrestore(&queue->lock, irqflags);
181d6902 561}
181d6902
ID
562
563static void rt2x00queue_reset(struct data_queue *queue)
564{
5f46c4d0
ID
565 unsigned long irqflags;
566
567 spin_lock_irqsave(&queue->lock, irqflags);
181d6902
ID
568
569 queue->count = 0;
570 queue->length = 0;
571 memset(queue->index, 0, sizeof(queue->index));
572
5f46c4d0 573 spin_unlock_irqrestore(&queue->lock, irqflags);
181d6902
ID
574}
575
798b7adb 576void rt2x00queue_init_queues(struct rt2x00_dev *rt2x00dev)
181d6902
ID
577{
578 struct data_queue *queue;
579 unsigned int i;
580
798b7adb 581 queue_for_each(rt2x00dev, queue) {
181d6902
ID
582 rt2x00queue_reset(queue);
583
9c0ab712
ID
584 for (i = 0; i < queue->limit; i++) {
585 queue->entries[i].flags = 0;
586
798b7adb 587 rt2x00dev->ops->lib->clear_entry(&queue->entries[i]);
9c0ab712 588 }
181d6902
ID
589 }
590}
591
592static int rt2x00queue_alloc_entries(struct data_queue *queue,
593 const struct data_queue_desc *qdesc)
594{
595 struct queue_entry *entries;
596 unsigned int entry_size;
597 unsigned int i;
598
599 rt2x00queue_reset(queue);
600
601 queue->limit = qdesc->entry_num;
b869767b 602 queue->threshold = DIV_ROUND_UP(qdesc->entry_num, 10);
181d6902
ID
603 queue->data_size = qdesc->data_size;
604 queue->desc_size = qdesc->desc_size;
605
606 /*
607 * Allocate all queue entries.
608 */
609 entry_size = sizeof(*entries) + qdesc->priv_size;
610 entries = kzalloc(queue->limit * entry_size, GFP_KERNEL);
611 if (!entries)
612 return -ENOMEM;
613
614#define QUEUE_ENTRY_PRIV_OFFSET(__base, __index, __limit, __esize, __psize) \
231be4e9
AB
615 ( ((char *)(__base)) + ((__limit) * (__esize)) + \
616 ((__index) * (__psize)) )
181d6902
ID
617
618 for (i = 0; i < queue->limit; i++) {
619 entries[i].flags = 0;
620 entries[i].queue = queue;
621 entries[i].skb = NULL;
622 entries[i].entry_idx = i;
623 entries[i].priv_data =
624 QUEUE_ENTRY_PRIV_OFFSET(entries, i, queue->limit,
625 sizeof(*entries), qdesc->priv_size);
626 }
627
628#undef QUEUE_ENTRY_PRIV_OFFSET
629
630 queue->entries = entries;
631
632 return 0;
633}
634
c4da0048
GW
635static void rt2x00queue_free_skbs(struct rt2x00_dev *rt2x00dev,
636 struct data_queue *queue)
30caa6e3
GW
637{
638 unsigned int i;
639
640 if (!queue->entries)
641 return;
642
643 for (i = 0; i < queue->limit; i++) {
644 if (queue->entries[i].skb)
c4da0048 645 rt2x00queue_free_skb(rt2x00dev, queue->entries[i].skb);
30caa6e3
GW
646 }
647}
648
c4da0048
GW
649static int rt2x00queue_alloc_rxskbs(struct rt2x00_dev *rt2x00dev,
650 struct data_queue *queue)
30caa6e3
GW
651{
652 unsigned int i;
653 struct sk_buff *skb;
654
655 for (i = 0; i < queue->limit; i++) {
c4da0048 656 skb = rt2x00queue_alloc_rxskb(rt2x00dev, &queue->entries[i]);
30caa6e3 657 if (!skb)
61243d8e 658 return -ENOMEM;
30caa6e3
GW
659 queue->entries[i].skb = skb;
660 }
661
662 return 0;
30caa6e3
GW
663}
664
181d6902
ID
665int rt2x00queue_initialize(struct rt2x00_dev *rt2x00dev)
666{
667 struct data_queue *queue;
668 int status;
669
181d6902
ID
670 status = rt2x00queue_alloc_entries(rt2x00dev->rx, rt2x00dev->ops->rx);
671 if (status)
672 goto exit;
673
674 tx_queue_for_each(rt2x00dev, queue) {
675 status = rt2x00queue_alloc_entries(queue, rt2x00dev->ops->tx);
676 if (status)
677 goto exit;
678 }
679
680 status = rt2x00queue_alloc_entries(rt2x00dev->bcn, rt2x00dev->ops->bcn);
681 if (status)
682 goto exit;
683
30caa6e3
GW
684 if (test_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags)) {
685 status = rt2x00queue_alloc_entries(&rt2x00dev->bcn[1],
686 rt2x00dev->ops->atim);
687 if (status)
688 goto exit;
689 }
181d6902 690
c4da0048 691 status = rt2x00queue_alloc_rxskbs(rt2x00dev, rt2x00dev->rx);
181d6902
ID
692 if (status)
693 goto exit;
694
695 return 0;
696
697exit:
698 ERROR(rt2x00dev, "Queue entries allocation failed.\n");
699
700 rt2x00queue_uninitialize(rt2x00dev);
701
702 return status;
703}
704
705void rt2x00queue_uninitialize(struct rt2x00_dev *rt2x00dev)
706{
707 struct data_queue *queue;
708
c4da0048 709 rt2x00queue_free_skbs(rt2x00dev, rt2x00dev->rx);
30caa6e3 710
181d6902
ID
711 queue_for_each(rt2x00dev, queue) {
712 kfree(queue->entries);
713 queue->entries = NULL;
714 }
715}
716
8f539276
ID
717static void rt2x00queue_init(struct rt2x00_dev *rt2x00dev,
718 struct data_queue *queue, enum data_queue_qid qid)
719{
720 spin_lock_init(&queue->lock);
721
722 queue->rt2x00dev = rt2x00dev;
723 queue->qid = qid;
2af0a570 724 queue->txop = 0;
8f539276
ID
725 queue->aifs = 2;
726 queue->cw_min = 5;
727 queue->cw_max = 10;
728}
729
181d6902
ID
730int rt2x00queue_allocate(struct rt2x00_dev *rt2x00dev)
731{
732 struct data_queue *queue;
733 enum data_queue_qid qid;
734 unsigned int req_atim =
735 !!test_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags);
736
737 /*
738 * We need the following queues:
739 * RX: 1
61448f88 740 * TX: ops->tx_queues
181d6902
ID
741 * Beacon: 1
742 * Atim: 1 (if required)
743 */
61448f88 744 rt2x00dev->data_queues = 2 + rt2x00dev->ops->tx_queues + req_atim;
181d6902
ID
745
746 queue = kzalloc(rt2x00dev->data_queues * sizeof(*queue), GFP_KERNEL);
747 if (!queue) {
748 ERROR(rt2x00dev, "Queue allocation failed.\n");
749 return -ENOMEM;
750 }
751
752 /*
753 * Initialize pointers
754 */
755 rt2x00dev->rx = queue;
756 rt2x00dev->tx = &queue[1];
61448f88 757 rt2x00dev->bcn = &queue[1 + rt2x00dev->ops->tx_queues];
181d6902
ID
758
759 /*
760 * Initialize queue parameters.
761 * RX: qid = QID_RX
762 * TX: qid = QID_AC_BE + index
763 * TX: cw_min: 2^5 = 32.
764 * TX: cw_max: 2^10 = 1024.
565a019a
ID
765 * BCN: qid = QID_BEACON
766 * ATIM: qid = QID_ATIM
181d6902 767 */
8f539276 768 rt2x00queue_init(rt2x00dev, rt2x00dev->rx, QID_RX);
181d6902 769
8f539276
ID
770 qid = QID_AC_BE;
771 tx_queue_for_each(rt2x00dev, queue)
772 rt2x00queue_init(rt2x00dev, queue, qid++);
181d6902 773
565a019a 774 rt2x00queue_init(rt2x00dev, &rt2x00dev->bcn[0], QID_BEACON);
181d6902 775 if (req_atim)
565a019a 776 rt2x00queue_init(rt2x00dev, &rt2x00dev->bcn[1], QID_ATIM);
181d6902
ID
777
778 return 0;
779}
780
781void rt2x00queue_free(struct rt2x00_dev *rt2x00dev)
782{
783 kfree(rt2x00dev->rx);
784 rt2x00dev->rx = NULL;
785 rt2x00dev->tx = NULL;
786 rt2x00dev->bcn = NULL;
787}
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