rt2x00: Generate sw sequence numbers only for devices that need it
[deliverable/linux.git] / drivers / net / wireless / rt2x00 / rt2x00queue.c
CommitLineData
181d6902 1/*
7e613e16
ID
2 Copyright (C) 2010 Willow Garage <http://www.willowgarage.com>
3 Copyright (C) 2004 - 2010 Ivo van Doorn <IvDoorn@gmail.com>
9c9a0d14 4 Copyright (C) 2004 - 2009 Gertjan van Wingerde <gwingerde@gmail.com>
181d6902
ID
5 <http://rt2x00.serialmonkey.com>
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the
19 Free Software Foundation, Inc.,
20 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
21 */
22
23/*
24 Module: rt2x00lib
25 Abstract: rt2x00 queue specific routines.
26 */
27
5a0e3ad6 28#include <linux/slab.h>
181d6902
ID
29#include <linux/kernel.h>
30#include <linux/module.h>
c4da0048 31#include <linux/dma-mapping.h>
181d6902
ID
32
33#include "rt2x00.h"
34#include "rt2x00lib.h"
35
fa69560f 36struct sk_buff *rt2x00queue_alloc_rxskb(struct queue_entry *entry)
239c249d 37{
fa69560f 38 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
c4da0048
GW
39 struct sk_buff *skb;
40 struct skb_frame_desc *skbdesc;
2bb057d0
ID
41 unsigned int frame_size;
42 unsigned int head_size = 0;
43 unsigned int tail_size = 0;
239c249d
GW
44
45 /*
46 * The frame size includes descriptor size, because the
47 * hardware directly receive the frame into the skbuffer.
48 */
c4da0048 49 frame_size = entry->queue->data_size + entry->queue->desc_size;
239c249d
GW
50
51 /*
ff352391
ID
52 * The payload should be aligned to a 4-byte boundary,
53 * this means we need at least 3 bytes for moving the frame
54 * into the correct offset.
239c249d 55 */
2bb057d0
ID
56 head_size = 4;
57
58 /*
59 * For IV/EIV/ICV assembly we must make sure there is
60 * at least 8 bytes bytes available in headroom for IV/EIV
9c3444d3 61 * and 8 bytes for ICV data as tailroon.
2bb057d0 62 */
2bb057d0
ID
63 if (test_bit(CONFIG_SUPPORT_HW_CRYPTO, &rt2x00dev->flags)) {
64 head_size += 8;
9c3444d3 65 tail_size += 8;
2bb057d0 66 }
239c249d
GW
67
68 /*
69 * Allocate skbuffer.
70 */
2bb057d0 71 skb = dev_alloc_skb(frame_size + head_size + tail_size);
239c249d
GW
72 if (!skb)
73 return NULL;
74
2bb057d0
ID
75 /*
76 * Make sure we not have a frame with the requested bytes
77 * available in the head and tail.
78 */
79 skb_reserve(skb, head_size);
239c249d
GW
80 skb_put(skb, frame_size);
81
c4da0048
GW
82 /*
83 * Populate skbdesc.
84 */
85 skbdesc = get_skb_frame_desc(skb);
86 memset(skbdesc, 0, sizeof(*skbdesc));
87 skbdesc->entry = entry;
88
89 if (test_bit(DRIVER_REQUIRE_DMA, &rt2x00dev->flags)) {
90 skbdesc->skb_dma = dma_map_single(rt2x00dev->dev,
91 skb->data,
92 skb->len,
93 DMA_FROM_DEVICE);
94 skbdesc->flags |= SKBDESC_DMA_MAPPED_RX;
95 }
96
239c249d
GW
97 return skb;
98}
30caa6e3 99
fa69560f 100void rt2x00queue_map_txskb(struct queue_entry *entry)
30caa6e3 101{
fa69560f
ID
102 struct device *dev = entry->queue->rt2x00dev->dev;
103 struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
c4da0048 104
3ee54a07 105 skbdesc->skb_dma =
fa69560f 106 dma_map_single(dev, entry->skb->data, entry->skb->len, DMA_TO_DEVICE);
c4da0048
GW
107 skbdesc->flags |= SKBDESC_DMA_MAPPED_TX;
108}
109EXPORT_SYMBOL_GPL(rt2x00queue_map_txskb);
110
fa69560f 111void rt2x00queue_unmap_skb(struct queue_entry *entry)
c4da0048 112{
fa69560f
ID
113 struct device *dev = entry->queue->rt2x00dev->dev;
114 struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
c4da0048
GW
115
116 if (skbdesc->flags & SKBDESC_DMA_MAPPED_RX) {
fa69560f 117 dma_unmap_single(dev, skbdesc->skb_dma, entry->skb->len,
c4da0048
GW
118 DMA_FROM_DEVICE);
119 skbdesc->flags &= ~SKBDESC_DMA_MAPPED_RX;
546adf29 120 } else if (skbdesc->flags & SKBDESC_DMA_MAPPED_TX) {
fa69560f 121 dma_unmap_single(dev, skbdesc->skb_dma, entry->skb->len,
c4da0048
GW
122 DMA_TO_DEVICE);
123 skbdesc->flags &= ~SKBDESC_DMA_MAPPED_TX;
124 }
125}
0b8004aa 126EXPORT_SYMBOL_GPL(rt2x00queue_unmap_skb);
c4da0048 127
fa69560f 128void rt2x00queue_free_skb(struct queue_entry *entry)
c4da0048 129{
fa69560f 130 if (!entry->skb)
9a613195
ID
131 return;
132
fa69560f
ID
133 rt2x00queue_unmap_skb(entry);
134 dev_kfree_skb_any(entry->skb);
135 entry->skb = NULL;
30caa6e3 136}
239c249d 137
daee6c09 138void rt2x00queue_align_frame(struct sk_buff *skb)
9f166171 139{
9f166171 140 unsigned int frame_length = skb->len;
daee6c09 141 unsigned int align = ALIGN_SIZE(skb, 0);
9f166171
ID
142
143 if (!align)
144 return;
145
daee6c09
ID
146 skb_push(skb, align);
147 memmove(skb->data, skb->data + align, frame_length);
148 skb_trim(skb, frame_length);
149}
150
95d69aa0 151void rt2x00queue_align_payload(struct sk_buff *skb, unsigned int header_length)
daee6c09
ID
152{
153 unsigned int frame_length = skb->len;
95d69aa0 154 unsigned int align = ALIGN_SIZE(skb, header_length);
daee6c09
ID
155
156 if (!align)
157 return;
158
159 skb_push(skb, align);
160 memmove(skb->data, skb->data + align, frame_length);
161 skb_trim(skb, frame_length);
162}
163
164void rt2x00queue_insert_l2pad(struct sk_buff *skb, unsigned int header_length)
165{
2e331462 166 unsigned int payload_length = skb->len - header_length;
daee6c09
ID
167 unsigned int header_align = ALIGN_SIZE(skb, 0);
168 unsigned int payload_align = ALIGN_SIZE(skb, header_length);
e54be4e7 169 unsigned int l2pad = payload_length ? L2PAD_SIZE(header_length) : 0;
daee6c09 170
2e331462
GW
171 /*
172 * Adjust the header alignment if the payload needs to be moved more
173 * than the header.
174 */
175 if (payload_align > header_align)
176 header_align += 4;
177
178 /* There is nothing to do if no alignment is needed */
179 if (!header_align)
180 return;
daee6c09 181
2e331462
GW
182 /* Reserve the amount of space needed in front of the frame */
183 skb_push(skb, header_align);
184
185 /*
186 * Move the header.
187 */
188 memmove(skb->data, skb->data + header_align, header_length);
189
190 /* Move the payload, if present and if required */
191 if (payload_length && payload_align)
daee6c09 192 memmove(skb->data + header_length + l2pad,
a5186e99 193 skb->data + header_length + l2pad + payload_align,
2e331462
GW
194 payload_length);
195
196 /* Trim the skb to the correct size */
197 skb_trim(skb, header_length + l2pad + payload_length);
9f166171
ID
198}
199
daee6c09
ID
200void rt2x00queue_remove_l2pad(struct sk_buff *skb, unsigned int header_length)
201{
a061a93b
GW
202 /*
203 * L2 padding is only present if the skb contains more than just the
204 * IEEE 802.11 header.
205 */
206 unsigned int l2pad = (skb->len > header_length) ?
207 L2PAD_SIZE(header_length) : 0;
daee6c09 208
354e39db 209 if (!l2pad)
daee6c09
ID
210 return;
211
a061a93b
GW
212 memmove(skb->data + l2pad, skb->data, header_length);
213 skb_pull(skb, l2pad);
daee6c09
ID
214}
215
7b40982e
ID
216static void rt2x00queue_create_tx_descriptor_seq(struct queue_entry *entry,
217 struct txentry_desc *txdesc)
218{
219 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(entry->skb);
220 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)entry->skb->data;
221 struct rt2x00_intf *intf = vif_to_intf(tx_info->control.vif);
222 unsigned long irqflags;
223
c262e08b 224 if (!(tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ))
7b40982e
ID
225 return;
226
7fe7ee77
HS
227 __set_bit(ENTRY_TXD_GENERATE_SEQ, &txdesc->flags);
228
229 if (!test_bit(DRIVER_REQUIRE_SW_SEQNO, &entry->queue->rt2x00dev->flags))
230 return;
231
7b40982e 232 /*
7fe7ee77
HS
233 * The hardware is not able to insert a sequence number. Assign a
234 * software generated one here.
7b40982e
ID
235 *
236 * This is wrong because beacons are not getting sequence
237 * numbers assigned properly.
238 *
239 * A secondary problem exists for drivers that cannot toggle
240 * sequence counting per-frame, since those will override the
241 * sequence counter given by mac80211.
242 */
243 spin_lock_irqsave(&intf->seqlock, irqflags);
244
245 if (test_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags))
246 intf->seqno += 0x10;
247 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
248 hdr->seq_ctrl |= cpu_to_le16(intf->seqno);
249
250 spin_unlock_irqrestore(&intf->seqlock, irqflags);
251
7b40982e
ID
252}
253
254static void rt2x00queue_create_tx_descriptor_plcp(struct queue_entry *entry,
255 struct txentry_desc *txdesc,
256 const struct rt2x00_rate *hwrate)
257{
258 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
259 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(entry->skb);
260 struct ieee80211_tx_rate *txrate = &tx_info->control.rates[0];
261 unsigned int data_length;
262 unsigned int duration;
263 unsigned int residual;
264
265 /* Data length + CRC + Crypto overhead (IV/EIV/ICV/MIC) */
266 data_length = entry->skb->len + 4;
267 data_length += rt2x00crypto_tx_overhead(rt2x00dev, entry->skb);
268
269 /*
270 * PLCP setup
271 * Length calculation depends on OFDM/CCK rate.
272 */
273 txdesc->signal = hwrate->plcp;
274 txdesc->service = 0x04;
275
276 if (hwrate->flags & DEV_RATE_OFDM) {
277 txdesc->length_high = (data_length >> 6) & 0x3f;
278 txdesc->length_low = data_length & 0x3f;
279 } else {
280 /*
281 * Convert length to microseconds.
282 */
283 residual = GET_DURATION_RES(data_length, hwrate->bitrate);
284 duration = GET_DURATION(data_length, hwrate->bitrate);
285
286 if (residual != 0) {
287 duration++;
288
289 /*
290 * Check if we need to set the Length Extension
291 */
292 if (hwrate->bitrate == 110 && residual <= 30)
293 txdesc->service |= 0x80;
294 }
295
296 txdesc->length_high = (duration >> 8) & 0xff;
297 txdesc->length_low = duration & 0xff;
298
299 /*
300 * When preamble is enabled we should set the
301 * preamble bit for the signal.
302 */
303 if (txrate->flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE)
304 txdesc->signal |= 0x08;
305 }
306}
307
bd88a781
ID
308static void rt2x00queue_create_tx_descriptor(struct queue_entry *entry,
309 struct txentry_desc *txdesc)
7050ec82 310{
2e92e6f2 311 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
e039fa4a 312 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(entry->skb);
7050ec82 313 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)entry->skb->data;
2e92e6f2 314 struct ieee80211_rate *rate =
e039fa4a 315 ieee80211_get_tx_rate(rt2x00dev->hw, tx_info);
7050ec82 316 const struct rt2x00_rate *hwrate;
7050ec82
ID
317
318 memset(txdesc, 0, sizeof(*txdesc));
319
9f166171 320 /*
df624ca5 321 * Header and frame information.
9f166171 322 */
df624ca5 323 txdesc->length = entry->skb->len;
9f166171 324 txdesc->header_length = ieee80211_get_hdrlen_from_skb(entry->skb);
9f166171 325
7050ec82
ID
326 /*
327 * Check whether this frame is to be acked.
328 */
e039fa4a 329 if (!(tx_info->flags & IEEE80211_TX_CTL_NO_ACK))
7050ec82
ID
330 __set_bit(ENTRY_TXD_ACK, &txdesc->flags);
331
332 /*
333 * Check if this is a RTS/CTS frame
334 */
ac104462
ID
335 if (ieee80211_is_rts(hdr->frame_control) ||
336 ieee80211_is_cts(hdr->frame_control)) {
7050ec82 337 __set_bit(ENTRY_TXD_BURST, &txdesc->flags);
ac104462 338 if (ieee80211_is_rts(hdr->frame_control))
7050ec82 339 __set_bit(ENTRY_TXD_RTS_FRAME, &txdesc->flags);
e039fa4a 340 else
7050ec82 341 __set_bit(ENTRY_TXD_CTS_FRAME, &txdesc->flags);
e039fa4a 342 if (tx_info->control.rts_cts_rate_idx >= 0)
2e92e6f2 343 rate =
e039fa4a 344 ieee80211_get_rts_cts_rate(rt2x00dev->hw, tx_info);
7050ec82
ID
345 }
346
347 /*
348 * Determine retry information.
349 */
e6a9854b 350 txdesc->retry_limit = tx_info->control.rates[0].count - 1;
42c82857 351 if (txdesc->retry_limit >= rt2x00dev->long_retry)
7050ec82
ID
352 __set_bit(ENTRY_TXD_RETRY_MODE, &txdesc->flags);
353
354 /*
355 * Check if more fragments are pending
356 */
2606e422 357 if (ieee80211_has_morefrags(hdr->frame_control)) {
7050ec82
ID
358 __set_bit(ENTRY_TXD_BURST, &txdesc->flags);
359 __set_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags);
360 }
361
2606e422
HS
362 /*
363 * Check if more frames (!= fragments) are pending
364 */
365 if (tx_info->flags & IEEE80211_TX_CTL_MORE_FRAMES)
366 __set_bit(ENTRY_TXD_BURST, &txdesc->flags);
367
7050ec82
ID
368 /*
369 * Beacons and probe responses require the tsf timestamp
1bce85cf 370 * to be inserted into the frame.
7050ec82 371 */
1bce85cf
HS
372 if (ieee80211_is_beacon(hdr->frame_control) ||
373 ieee80211_is_probe_resp(hdr->frame_control))
7050ec82
ID
374 __set_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags);
375
376 /*
377 * Determine with what IFS priority this frame should be send.
378 * Set ifs to IFS_SIFS when the this is not the first fragment,
379 * or this fragment came after RTS/CTS.
380 */
7b40982e
ID
381 if ((tx_info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT) &&
382 !test_bit(ENTRY_TXD_RTS_FRAME, &txdesc->flags)) {
7050ec82
ID
383 __set_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags);
384 txdesc->ifs = IFS_BACKOFF;
7b40982e 385 } else
7050ec82 386 txdesc->ifs = IFS_SIFS;
7050ec82 387
076f9582
ID
388 /*
389 * Determine rate modulation.
390 */
7050ec82 391 hwrate = rt2x00_get_rate(rate->hw_value);
076f9582 392 txdesc->rate_mode = RATE_MODE_CCK;
7b40982e 393 if (hwrate->flags & DEV_RATE_OFDM)
076f9582 394 txdesc->rate_mode = RATE_MODE_OFDM;
7050ec82 395
7b40982e
ID
396 /*
397 * Apply TX descriptor handling by components
398 */
399 rt2x00crypto_create_tx_descriptor(entry, txdesc);
35f00cfc 400 rt2x00ht_create_tx_descriptor(entry, txdesc, hwrate);
7b40982e
ID
401 rt2x00queue_create_tx_descriptor_seq(entry, txdesc);
402 rt2x00queue_create_tx_descriptor_plcp(entry, txdesc, hwrate);
7050ec82 403}
7050ec82 404
78eea11b
GW
405static int rt2x00queue_write_tx_data(struct queue_entry *entry,
406 struct txentry_desc *txdesc)
407{
408 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
409
410 /*
411 * This should not happen, we already checked the entry
412 * was ours. When the hardware disagrees there has been
413 * a queue corruption!
414 */
415 if (unlikely(rt2x00dev->ops->lib->get_entry_state &&
416 rt2x00dev->ops->lib->get_entry_state(entry))) {
417 ERROR(rt2x00dev,
418 "Corrupt queue %d, accessing entry which is not ours.\n"
419 "Please file bug report to %s.\n",
420 entry->queue->qid, DRV_PROJECT);
421 return -EINVAL;
422 }
423
424 /*
425 * Add the requested extra tx headroom in front of the skb.
426 */
427 skb_push(entry->skb, rt2x00dev->ops->extra_tx_headroom);
428 memset(entry->skb->data, 0, rt2x00dev->ops->extra_tx_headroom);
429
430 /*
76dd5ddf 431 * Call the driver's write_tx_data function, if it exists.
78eea11b 432 */
76dd5ddf
GW
433 if (rt2x00dev->ops->lib->write_tx_data)
434 rt2x00dev->ops->lib->write_tx_data(entry, txdesc);
78eea11b
GW
435
436 /*
437 * Map the skb to DMA.
438 */
439 if (test_bit(DRIVER_REQUIRE_DMA, &rt2x00dev->flags))
fa69560f 440 rt2x00queue_map_txskb(entry);
78eea11b
GW
441
442 return 0;
443}
444
bd88a781
ID
445static void rt2x00queue_write_tx_descriptor(struct queue_entry *entry,
446 struct txentry_desc *txdesc)
7050ec82 447{
b869767b 448 struct data_queue *queue = entry->queue;
7050ec82 449
93331458 450 queue->rt2x00dev->ops->lib->write_tx_desc(entry, txdesc);
7050ec82
ID
451
452 /*
453 * All processing on the frame has been completed, this means
454 * it is now ready to be dumped to userspace through debugfs.
455 */
93331458 456 rt2x00debug_dump_frame(queue->rt2x00dev, DUMP_FRAME_TX, entry->skb);
6295d815
GW
457}
458
8be4eed0 459static void rt2x00queue_kick_tx_queue(struct data_queue *queue,
6295d815
GW
460 struct txentry_desc *txdesc)
461{
7050ec82 462 /*
b869767b 463 * Check if we need to kick the queue, there are however a few rules
6295d815 464 * 1) Don't kick unless this is the last in frame in a burst.
b869767b
ID
465 * When the burst flag is set, this frame is always followed
466 * by another frame which in some way are related to eachother.
467 * This is true for fragments, RTS or CTS-to-self frames.
6295d815 468 * 2) Rule 1 can be broken when the available entries
b869767b 469 * in the queue are less then a certain threshold.
7050ec82 470 */
b869767b
ID
471 if (rt2x00queue_threshold(queue) ||
472 !test_bit(ENTRY_TXD_BURST, &txdesc->flags))
dbba306f 473 queue->rt2x00dev->ops->lib->kick_queue(queue);
7050ec82 474}
7050ec82 475
7351c6bd
JB
476int rt2x00queue_write_tx_frame(struct data_queue *queue, struct sk_buff *skb,
477 bool local)
6db3786a 478{
e6a9854b 479 struct ieee80211_tx_info *tx_info;
6db3786a
ID
480 struct queue_entry *entry = rt2x00queue_get_entry(queue, Q_INDEX);
481 struct txentry_desc txdesc;
d74f5ba4 482 struct skb_frame_desc *skbdesc;
e6a9854b 483 u8 rate_idx, rate_flags;
6db3786a
ID
484
485 if (unlikely(rt2x00queue_full(queue)))
0e3de998 486 return -ENOBUFS;
6db3786a 487
c6084d5f
HS
488 if (unlikely(test_and_set_bit(ENTRY_OWNER_DEVICE_DATA,
489 &entry->flags))) {
6db3786a
ID
490 ERROR(queue->rt2x00dev,
491 "Arrived at non-free entry in the non-full queue %d.\n"
492 "Please file bug report to %s.\n",
493 queue->qid, DRV_PROJECT);
494 return -EINVAL;
495 }
496
497 /*
498 * Copy all TX descriptor information into txdesc,
499 * after that we are free to use the skb->cb array
500 * for our information.
501 */
502 entry->skb = skb;
503 rt2x00queue_create_tx_descriptor(entry, &txdesc);
504
d74f5ba4 505 /*
e6a9854b 506 * All information is retrieved from the skb->cb array,
2bb057d0 507 * now we should claim ownership of the driver part of that
e6a9854b 508 * array, preserving the bitrate index and flags.
d74f5ba4 509 */
e6a9854b
JB
510 tx_info = IEEE80211_SKB_CB(skb);
511 rate_idx = tx_info->control.rates[0].idx;
512 rate_flags = tx_info->control.rates[0].flags;
0e3de998 513 skbdesc = get_skb_frame_desc(skb);
d74f5ba4
ID
514 memset(skbdesc, 0, sizeof(*skbdesc));
515 skbdesc->entry = entry;
e6a9854b
JB
516 skbdesc->tx_rate_idx = rate_idx;
517 skbdesc->tx_rate_flags = rate_flags;
d74f5ba4 518
7351c6bd
JB
519 if (local)
520 skbdesc->flags |= SKBDESC_NOT_MAC80211;
521
2bb057d0
ID
522 /*
523 * When hardware encryption is supported, and this frame
524 * is to be encrypted, we should strip the IV/EIV data from
3ad2f3fb 525 * the frame so we can provide it to the driver separately.
2bb057d0
ID
526 */
527 if (test_bit(ENTRY_TXD_ENCRYPT, &txdesc.flags) &&
dddfb478 528 !test_bit(ENTRY_TXD_ENCRYPT_IV, &txdesc.flags)) {
3f787bd6 529 if (test_bit(DRIVER_REQUIRE_COPY_IV, &queue->rt2x00dev->flags))
9eb4e21e 530 rt2x00crypto_tx_copy_iv(skb, &txdesc);
dddfb478 531 else
9eb4e21e 532 rt2x00crypto_tx_remove_iv(skb, &txdesc);
dddfb478 533 }
2bb057d0 534
93354cbb
ID
535 /*
536 * When DMA allocation is required we should guarentee to the
537 * driver that the DMA is aligned to a 4-byte boundary.
93354cbb
ID
538 * However some drivers require L2 padding to pad the payload
539 * rather then the header. This could be a requirement for
540 * PCI and USB devices, while header alignment only is valid
541 * for PCI devices.
542 */
9f166171 543 if (test_bit(DRIVER_REQUIRE_L2PAD, &queue->rt2x00dev->flags))
daee6c09 544 rt2x00queue_insert_l2pad(entry->skb, txdesc.header_length);
93354cbb 545 else if (test_bit(DRIVER_REQUIRE_DMA, &queue->rt2x00dev->flags))
daee6c09 546 rt2x00queue_align_frame(entry->skb);
9f166171 547
2bb057d0
ID
548 /*
549 * It could be possible that the queue was corrupted and this
0e3de998
ID
550 * call failed. Since we always return NETDEV_TX_OK to mac80211,
551 * this frame will simply be dropped.
2bb057d0 552 */
78eea11b 553 if (unlikely(rt2x00queue_write_tx_data(entry, &txdesc))) {
0262ab0d 554 clear_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags);
2bb057d0 555 entry->skb = NULL;
0e3de998 556 return -EIO;
6db3786a
ID
557 }
558
0262ab0d 559 set_bit(ENTRY_DATA_PENDING, &entry->flags);
6db3786a
ID
560
561 rt2x00queue_index_inc(queue, Q_INDEX);
562 rt2x00queue_write_tx_descriptor(entry, &txdesc);
8be4eed0 563 rt2x00queue_kick_tx_queue(queue, &txdesc);
6db3786a
ID
564
565 return 0;
566}
567
69cf36a4
HS
568int rt2x00queue_clear_beacon(struct rt2x00_dev *rt2x00dev,
569 struct ieee80211_vif *vif)
570{
571 struct rt2x00_intf *intf = vif_to_intf(vif);
572
573 if (unlikely(!intf->beacon))
574 return -ENOBUFS;
575
576 mutex_lock(&intf->beacon_skb_mutex);
577
578 /*
579 * Clean up the beacon skb.
580 */
581 rt2x00queue_free_skb(intf->beacon);
582
583 /*
584 * Clear beacon (single bssid devices don't need to clear the beacon
585 * since the beacon queue will get stopped anyway).
586 */
587 if (rt2x00dev->ops->lib->clear_beacon)
588 rt2x00dev->ops->lib->clear_beacon(intf->beacon);
589
590 mutex_unlock(&intf->beacon_skb_mutex);
591
592 return 0;
593}
594
8414ff07
HS
595int rt2x00queue_update_beacon_locked(struct rt2x00_dev *rt2x00dev,
596 struct ieee80211_vif *vif)
bd88a781
ID
597{
598 struct rt2x00_intf *intf = vif_to_intf(vif);
599 struct skb_frame_desc *skbdesc;
600 struct txentry_desc txdesc;
bd88a781
ID
601
602 if (unlikely(!intf->beacon))
603 return -ENOBUFS;
604
17512dc3
IP
605 /*
606 * Clean up the beacon skb.
607 */
fa69560f 608 rt2x00queue_free_skb(intf->beacon);
17512dc3 609
bd88a781 610 intf->beacon->skb = ieee80211_beacon_get(rt2x00dev->hw, vif);
8414ff07 611 if (!intf->beacon->skb)
bd88a781
ID
612 return -ENOMEM;
613
614 /*
615 * Copy all TX descriptor information into txdesc,
616 * after that we are free to use the skb->cb array
617 * for our information.
618 */
619 rt2x00queue_create_tx_descriptor(intf->beacon, &txdesc);
620
bd88a781
ID
621 /*
622 * Fill in skb descriptor
623 */
624 skbdesc = get_skb_frame_desc(intf->beacon->skb);
625 memset(skbdesc, 0, sizeof(*skbdesc));
bd88a781
ID
626 skbdesc->entry = intf->beacon;
627
bd88a781 628 /*
69cf36a4 629 * Send beacon to hardware.
bd88a781 630 */
f224f4ef 631 rt2x00dev->ops->lib->write_beacon(intf->beacon, &txdesc);
bd88a781 632
8414ff07
HS
633 return 0;
634
635}
636
637int rt2x00queue_update_beacon(struct rt2x00_dev *rt2x00dev,
638 struct ieee80211_vif *vif)
639{
640 struct rt2x00_intf *intf = vif_to_intf(vif);
641 int ret;
642
643 mutex_lock(&intf->beacon_skb_mutex);
644 ret = rt2x00queue_update_beacon_locked(rt2x00dev, vif);
17512dc3
IP
645 mutex_unlock(&intf->beacon_skb_mutex);
646
8414ff07 647 return ret;
bd88a781
ID
648}
649
5eb7efe8
ID
650void rt2x00queue_for_each_entry(struct data_queue *queue,
651 enum queue_index start,
652 enum queue_index end,
653 void (*fn)(struct queue_entry *entry))
654{
655 unsigned long irqflags;
656 unsigned int index_start;
657 unsigned int index_end;
658 unsigned int i;
659
660 if (unlikely(start >= Q_INDEX_MAX || end >= Q_INDEX_MAX)) {
661 ERROR(queue->rt2x00dev,
662 "Entry requested from invalid index range (%d - %d)\n",
663 start, end);
664 return;
665 }
666
667 /*
668 * Only protect the range we are going to loop over,
669 * if during our loop a extra entry is set to pending
670 * it should not be kicked during this run, since it
671 * is part of another TX operation.
672 */
813f0339 673 spin_lock_irqsave(&queue->index_lock, irqflags);
5eb7efe8
ID
674 index_start = queue->index[start];
675 index_end = queue->index[end];
813f0339 676 spin_unlock_irqrestore(&queue->index_lock, irqflags);
5eb7efe8
ID
677
678 /*
679 * Start from the TX done pointer, this guarentees that we will
680 * send out all frames in the correct order.
681 */
682 if (index_start < index_end) {
683 for (i = index_start; i < index_end; i++)
684 fn(&queue->entries[i]);
685 } else {
686 for (i = index_start; i < queue->limit; i++)
687 fn(&queue->entries[i]);
688
689 for (i = 0; i < index_end; i++)
690 fn(&queue->entries[i]);
691 }
692}
693EXPORT_SYMBOL_GPL(rt2x00queue_for_each_entry);
694
181d6902 695struct data_queue *rt2x00queue_get_queue(struct rt2x00_dev *rt2x00dev,
e58c6aca 696 const enum data_queue_qid queue)
181d6902
ID
697{
698 int atim = test_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags);
699
a2c9b652
ID
700 if (queue == QID_RX)
701 return rt2x00dev->rx;
702
61448f88 703 if (queue < rt2x00dev->ops->tx_queues && rt2x00dev->tx)
181d6902
ID
704 return &rt2x00dev->tx[queue];
705
706 if (!rt2x00dev->bcn)
707 return NULL;
708
e58c6aca 709 if (queue == QID_BEACON)
181d6902 710 return &rt2x00dev->bcn[0];
e58c6aca 711 else if (queue == QID_ATIM && atim)
181d6902
ID
712 return &rt2x00dev->bcn[1];
713
714 return NULL;
715}
716EXPORT_SYMBOL_GPL(rt2x00queue_get_queue);
717
718struct queue_entry *rt2x00queue_get_entry(struct data_queue *queue,
719 enum queue_index index)
720{
721 struct queue_entry *entry;
5f46c4d0 722 unsigned long irqflags;
181d6902
ID
723
724 if (unlikely(index >= Q_INDEX_MAX)) {
725 ERROR(queue->rt2x00dev,
726 "Entry requested from invalid index type (%d)\n", index);
727 return NULL;
728 }
729
813f0339 730 spin_lock_irqsave(&queue->index_lock, irqflags);
181d6902
ID
731
732 entry = &queue->entries[queue->index[index]];
733
813f0339 734 spin_unlock_irqrestore(&queue->index_lock, irqflags);
181d6902
ID
735
736 return entry;
737}
738EXPORT_SYMBOL_GPL(rt2x00queue_get_entry);
739
740void rt2x00queue_index_inc(struct data_queue *queue, enum queue_index index)
741{
5f46c4d0
ID
742 unsigned long irqflags;
743
181d6902
ID
744 if (unlikely(index >= Q_INDEX_MAX)) {
745 ERROR(queue->rt2x00dev,
746 "Index change on invalid index type (%d)\n", index);
747 return;
748 }
749
813f0339 750 spin_lock_irqsave(&queue->index_lock, irqflags);
181d6902
ID
751
752 queue->index[index]++;
753 if (queue->index[index] >= queue->limit)
754 queue->index[index] = 0;
755
652a9dd2
ID
756 queue->last_action[index] = jiffies;
757
10b6b801
ID
758 if (index == Q_INDEX) {
759 queue->length++;
760 } else if (index == Q_INDEX_DONE) {
761 queue->length--;
55887511 762 queue->count++;
10b6b801 763 }
181d6902 764
813f0339 765 spin_unlock_irqrestore(&queue->index_lock, irqflags);
181d6902 766}
181d6902 767
0b7fde54
ID
768void rt2x00queue_pause_queue(struct data_queue *queue)
769{
770 if (!test_bit(DEVICE_STATE_PRESENT, &queue->rt2x00dev->flags) ||
771 !test_bit(QUEUE_STARTED, &queue->flags) ||
772 test_and_set_bit(QUEUE_PAUSED, &queue->flags))
773 return;
774
775 switch (queue->qid) {
f615e9a3
ID
776 case QID_AC_VO:
777 case QID_AC_VI:
0b7fde54
ID
778 case QID_AC_BE:
779 case QID_AC_BK:
0b7fde54
ID
780 /*
781 * For TX queues, we have to disable the queue
782 * inside mac80211.
783 */
784 ieee80211_stop_queue(queue->rt2x00dev->hw, queue->qid);
785 break;
786 default:
787 break;
788 }
789}
790EXPORT_SYMBOL_GPL(rt2x00queue_pause_queue);
791
792void rt2x00queue_unpause_queue(struct data_queue *queue)
793{
794 if (!test_bit(DEVICE_STATE_PRESENT, &queue->rt2x00dev->flags) ||
795 !test_bit(QUEUE_STARTED, &queue->flags) ||
796 !test_and_clear_bit(QUEUE_PAUSED, &queue->flags))
797 return;
798
799 switch (queue->qid) {
f615e9a3
ID
800 case QID_AC_VO:
801 case QID_AC_VI:
0b7fde54
ID
802 case QID_AC_BE:
803 case QID_AC_BK:
0b7fde54
ID
804 /*
805 * For TX queues, we have to enable the queue
806 * inside mac80211.
807 */
808 ieee80211_wake_queue(queue->rt2x00dev->hw, queue->qid);
809 break;
5be65609
ID
810 case QID_RX:
811 /*
812 * For RX we need to kick the queue now in order to
813 * receive frames.
814 */
815 queue->rt2x00dev->ops->lib->kick_queue(queue);
0b7fde54
ID
816 default:
817 break;
818 }
819}
820EXPORT_SYMBOL_GPL(rt2x00queue_unpause_queue);
821
822void rt2x00queue_start_queue(struct data_queue *queue)
823{
824 mutex_lock(&queue->status_lock);
825
826 if (!test_bit(DEVICE_STATE_PRESENT, &queue->rt2x00dev->flags) ||
827 test_and_set_bit(QUEUE_STARTED, &queue->flags)) {
828 mutex_unlock(&queue->status_lock);
829 return;
830 }
831
832 set_bit(QUEUE_PAUSED, &queue->flags);
833
834 queue->rt2x00dev->ops->lib->start_queue(queue);
835
836 rt2x00queue_unpause_queue(queue);
837
838 mutex_unlock(&queue->status_lock);
839}
840EXPORT_SYMBOL_GPL(rt2x00queue_start_queue);
841
842void rt2x00queue_stop_queue(struct data_queue *queue)
843{
844 mutex_lock(&queue->status_lock);
845
846 if (!test_and_clear_bit(QUEUE_STARTED, &queue->flags)) {
847 mutex_unlock(&queue->status_lock);
848 return;
849 }
850
851 rt2x00queue_pause_queue(queue);
852
853 queue->rt2x00dev->ops->lib->stop_queue(queue);
854
855 mutex_unlock(&queue->status_lock);
856}
857EXPORT_SYMBOL_GPL(rt2x00queue_stop_queue);
858
5be65609
ID
859void rt2x00queue_flush_queue(struct data_queue *queue, bool drop)
860{
861 unsigned int i;
862 bool started;
863 bool tx_queue =
f615e9a3 864 (queue->qid == QID_AC_VO) ||
5be65609 865 (queue->qid == QID_AC_VI) ||
f615e9a3
ID
866 (queue->qid == QID_AC_BE) ||
867 (queue->qid == QID_AC_BK);
5be65609
ID
868
869 mutex_lock(&queue->status_lock);
870
871 /*
872 * If the queue has been started, we must stop it temporarily
873 * to prevent any new frames to be queued on the device. If
874 * we are not dropping the pending frames, the queue must
875 * only be stopped in the software and not the hardware,
876 * otherwise the queue will never become empty on its own.
877 */
878 started = test_bit(QUEUE_STARTED, &queue->flags);
879 if (started) {
880 /*
881 * Pause the queue
882 */
883 rt2x00queue_pause_queue(queue);
884
885 /*
886 * If we are not supposed to drop any pending
887 * frames, this means we must force a start (=kick)
888 * to the queue to make sure the hardware will
889 * start transmitting.
890 */
891 if (!drop && tx_queue)
892 queue->rt2x00dev->ops->lib->kick_queue(queue);
893 }
894
895 /*
896 * Check if driver supports flushing, we can only guarentee
897 * full support for flushing if the driver is able
898 * to cancel all pending frames (drop = true).
899 */
900 if (drop && queue->rt2x00dev->ops->lib->flush_queue)
901 queue->rt2x00dev->ops->lib->flush_queue(queue);
902
903 /*
904 * When we don't want to drop any frames, or when
905 * the driver doesn't fully flush the queue correcly,
906 * we must wait for the queue to become empty.
907 */
908 for (i = 0; !rt2x00queue_empty(queue) && i < 100; i++)
909 msleep(10);
910
911 /*
912 * The queue flush has failed...
913 */
914 if (unlikely(!rt2x00queue_empty(queue)))
21957c31 915 WARNING(queue->rt2x00dev, "Queue %d failed to flush\n", queue->qid);
5be65609
ID
916
917 /*
918 * Restore the queue to the previous status
919 */
920 if (started)
921 rt2x00queue_unpause_queue(queue);
922
923 mutex_unlock(&queue->status_lock);
924}
925EXPORT_SYMBOL_GPL(rt2x00queue_flush_queue);
926
0b7fde54
ID
927void rt2x00queue_start_queues(struct rt2x00_dev *rt2x00dev)
928{
929 struct data_queue *queue;
930
931 /*
932 * rt2x00queue_start_queue will call ieee80211_wake_queue
933 * for each queue after is has been properly initialized.
934 */
935 tx_queue_for_each(rt2x00dev, queue)
936 rt2x00queue_start_queue(queue);
937
938 rt2x00queue_start_queue(rt2x00dev->rx);
939}
940EXPORT_SYMBOL_GPL(rt2x00queue_start_queues);
941
942void rt2x00queue_stop_queues(struct rt2x00_dev *rt2x00dev)
943{
944 struct data_queue *queue;
945
946 /*
947 * rt2x00queue_stop_queue will call ieee80211_stop_queue
948 * as well, but we are completely shutting doing everything
949 * now, so it is much safer to stop all TX queues at once,
950 * and use rt2x00queue_stop_queue for cleaning up.
951 */
952 ieee80211_stop_queues(rt2x00dev->hw);
953
954 tx_queue_for_each(rt2x00dev, queue)
955 rt2x00queue_stop_queue(queue);
956
957 rt2x00queue_stop_queue(rt2x00dev->rx);
958}
959EXPORT_SYMBOL_GPL(rt2x00queue_stop_queues);
960
5be65609
ID
961void rt2x00queue_flush_queues(struct rt2x00_dev *rt2x00dev, bool drop)
962{
963 struct data_queue *queue;
964
965 tx_queue_for_each(rt2x00dev, queue)
966 rt2x00queue_flush_queue(queue, drop);
967
968 rt2x00queue_flush_queue(rt2x00dev->rx, drop);
969}
970EXPORT_SYMBOL_GPL(rt2x00queue_flush_queues);
971
181d6902
ID
972static void rt2x00queue_reset(struct data_queue *queue)
973{
5f46c4d0 974 unsigned long irqflags;
652a9dd2 975 unsigned int i;
5f46c4d0 976
813f0339 977 spin_lock_irqsave(&queue->index_lock, irqflags);
181d6902
ID
978
979 queue->count = 0;
980 queue->length = 0;
652a9dd2
ID
981
982 for (i = 0; i < Q_INDEX_MAX; i++) {
983 queue->index[i] = 0;
984 queue->last_action[i] = jiffies;
985 }
181d6902 986
813f0339 987 spin_unlock_irqrestore(&queue->index_lock, irqflags);
181d6902
ID
988}
989
798b7adb 990void rt2x00queue_init_queues(struct rt2x00_dev *rt2x00dev)
181d6902
ID
991{
992 struct data_queue *queue;
993 unsigned int i;
994
798b7adb 995 queue_for_each(rt2x00dev, queue) {
181d6902
ID
996 rt2x00queue_reset(queue);
997
64e7d723 998 for (i = 0; i < queue->limit; i++)
798b7adb 999 rt2x00dev->ops->lib->clear_entry(&queue->entries[i]);
181d6902
ID
1000 }
1001}
1002
1003static int rt2x00queue_alloc_entries(struct data_queue *queue,
1004 const struct data_queue_desc *qdesc)
1005{
1006 struct queue_entry *entries;
1007 unsigned int entry_size;
1008 unsigned int i;
1009
1010 rt2x00queue_reset(queue);
1011
1012 queue->limit = qdesc->entry_num;
b869767b 1013 queue->threshold = DIV_ROUND_UP(qdesc->entry_num, 10);
181d6902
ID
1014 queue->data_size = qdesc->data_size;
1015 queue->desc_size = qdesc->desc_size;
1016
1017 /*
1018 * Allocate all queue entries.
1019 */
1020 entry_size = sizeof(*entries) + qdesc->priv_size;
baeb2ffa 1021 entries = kcalloc(queue->limit, entry_size, GFP_KERNEL);
181d6902
ID
1022 if (!entries)
1023 return -ENOMEM;
1024
1025#define QUEUE_ENTRY_PRIV_OFFSET(__base, __index, __limit, __esize, __psize) \
f8bfbc31
ME
1026 (((char *)(__base)) + ((__limit) * (__esize)) + \
1027 ((__index) * (__psize)))
181d6902
ID
1028
1029 for (i = 0; i < queue->limit; i++) {
1030 entries[i].flags = 0;
1031 entries[i].queue = queue;
1032 entries[i].skb = NULL;
1033 entries[i].entry_idx = i;
1034 entries[i].priv_data =
1035 QUEUE_ENTRY_PRIV_OFFSET(entries, i, queue->limit,
1036 sizeof(*entries), qdesc->priv_size);
1037 }
1038
1039#undef QUEUE_ENTRY_PRIV_OFFSET
1040
1041 queue->entries = entries;
1042
1043 return 0;
1044}
1045
fa69560f 1046static void rt2x00queue_free_skbs(struct data_queue *queue)
30caa6e3
GW
1047{
1048 unsigned int i;
1049
1050 if (!queue->entries)
1051 return;
1052
1053 for (i = 0; i < queue->limit; i++) {
fa69560f 1054 rt2x00queue_free_skb(&queue->entries[i]);
30caa6e3
GW
1055 }
1056}
1057
fa69560f 1058static int rt2x00queue_alloc_rxskbs(struct data_queue *queue)
30caa6e3
GW
1059{
1060 unsigned int i;
1061 struct sk_buff *skb;
1062
1063 for (i = 0; i < queue->limit; i++) {
fa69560f 1064 skb = rt2x00queue_alloc_rxskb(&queue->entries[i]);
30caa6e3 1065 if (!skb)
61243d8e 1066 return -ENOMEM;
30caa6e3
GW
1067 queue->entries[i].skb = skb;
1068 }
1069
1070 return 0;
30caa6e3
GW
1071}
1072
181d6902
ID
1073int rt2x00queue_initialize(struct rt2x00_dev *rt2x00dev)
1074{
1075 struct data_queue *queue;
1076 int status;
1077
181d6902
ID
1078 status = rt2x00queue_alloc_entries(rt2x00dev->rx, rt2x00dev->ops->rx);
1079 if (status)
1080 goto exit;
1081
1082 tx_queue_for_each(rt2x00dev, queue) {
1083 status = rt2x00queue_alloc_entries(queue, rt2x00dev->ops->tx);
1084 if (status)
1085 goto exit;
1086 }
1087
1088 status = rt2x00queue_alloc_entries(rt2x00dev->bcn, rt2x00dev->ops->bcn);
1089 if (status)
1090 goto exit;
1091
30caa6e3
GW
1092 if (test_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags)) {
1093 status = rt2x00queue_alloc_entries(&rt2x00dev->bcn[1],
1094 rt2x00dev->ops->atim);
1095 if (status)
1096 goto exit;
1097 }
181d6902 1098
fa69560f 1099 status = rt2x00queue_alloc_rxskbs(rt2x00dev->rx);
181d6902
ID
1100 if (status)
1101 goto exit;
1102
1103 return 0;
1104
1105exit:
1106 ERROR(rt2x00dev, "Queue entries allocation failed.\n");
1107
1108 rt2x00queue_uninitialize(rt2x00dev);
1109
1110 return status;
1111}
1112
1113void rt2x00queue_uninitialize(struct rt2x00_dev *rt2x00dev)
1114{
1115 struct data_queue *queue;
1116
fa69560f 1117 rt2x00queue_free_skbs(rt2x00dev->rx);
30caa6e3 1118
181d6902
ID
1119 queue_for_each(rt2x00dev, queue) {
1120 kfree(queue->entries);
1121 queue->entries = NULL;
1122 }
1123}
1124
8f539276
ID
1125static void rt2x00queue_init(struct rt2x00_dev *rt2x00dev,
1126 struct data_queue *queue, enum data_queue_qid qid)
1127{
0b7fde54 1128 mutex_init(&queue->status_lock);
813f0339 1129 spin_lock_init(&queue->index_lock);
8f539276
ID
1130
1131 queue->rt2x00dev = rt2x00dev;
1132 queue->qid = qid;
2af0a570 1133 queue->txop = 0;
8f539276
ID
1134 queue->aifs = 2;
1135 queue->cw_min = 5;
1136 queue->cw_max = 10;
1137}
1138
181d6902
ID
1139int rt2x00queue_allocate(struct rt2x00_dev *rt2x00dev)
1140{
1141 struct data_queue *queue;
1142 enum data_queue_qid qid;
1143 unsigned int req_atim =
1144 !!test_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags);
1145
1146 /*
1147 * We need the following queues:
1148 * RX: 1
61448f88 1149 * TX: ops->tx_queues
181d6902
ID
1150 * Beacon: 1
1151 * Atim: 1 (if required)
1152 */
61448f88 1153 rt2x00dev->data_queues = 2 + rt2x00dev->ops->tx_queues + req_atim;
181d6902 1154
baeb2ffa 1155 queue = kcalloc(rt2x00dev->data_queues, sizeof(*queue), GFP_KERNEL);
181d6902
ID
1156 if (!queue) {
1157 ERROR(rt2x00dev, "Queue allocation failed.\n");
1158 return -ENOMEM;
1159 }
1160
1161 /*
1162 * Initialize pointers
1163 */
1164 rt2x00dev->rx = queue;
1165 rt2x00dev->tx = &queue[1];
61448f88 1166 rt2x00dev->bcn = &queue[1 + rt2x00dev->ops->tx_queues];
181d6902
ID
1167
1168 /*
1169 * Initialize queue parameters.
1170 * RX: qid = QID_RX
f615e9a3 1171 * TX: qid = QID_AC_VO + index
181d6902
ID
1172 * TX: cw_min: 2^5 = 32.
1173 * TX: cw_max: 2^10 = 1024.
565a019a
ID
1174 * BCN: qid = QID_BEACON
1175 * ATIM: qid = QID_ATIM
181d6902 1176 */
8f539276 1177 rt2x00queue_init(rt2x00dev, rt2x00dev->rx, QID_RX);
181d6902 1178
f615e9a3 1179 qid = QID_AC_VO;
8f539276
ID
1180 tx_queue_for_each(rt2x00dev, queue)
1181 rt2x00queue_init(rt2x00dev, queue, qid++);
181d6902 1182
565a019a 1183 rt2x00queue_init(rt2x00dev, &rt2x00dev->bcn[0], QID_BEACON);
181d6902 1184 if (req_atim)
565a019a 1185 rt2x00queue_init(rt2x00dev, &rt2x00dev->bcn[1], QID_ATIM);
181d6902
ID
1186
1187 return 0;
1188}
1189
1190void rt2x00queue_free(struct rt2x00_dev *rt2x00dev)
1191{
1192 kfree(rt2x00dev->rx);
1193 rt2x00dev->rx = NULL;
1194 rt2x00dev->tx = NULL;
1195 rt2x00dev->bcn = NULL;
1196}
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