rt2x00: Make use of unlikely during tx status processing
[deliverable/linux.git] / drivers / net / wireless / rt2x00 / rt2x00queue.c
CommitLineData
181d6902 1/*
7e613e16
ID
2 Copyright (C) 2010 Willow Garage <http://www.willowgarage.com>
3 Copyright (C) 2004 - 2010 Ivo van Doorn <IvDoorn@gmail.com>
9c9a0d14 4 Copyright (C) 2004 - 2009 Gertjan van Wingerde <gwingerde@gmail.com>
181d6902
ID
5 <http://rt2x00.serialmonkey.com>
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the
19 Free Software Foundation, Inc.,
20 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
21 */
22
23/*
24 Module: rt2x00lib
25 Abstract: rt2x00 queue specific routines.
26 */
27
5a0e3ad6 28#include <linux/slab.h>
181d6902
ID
29#include <linux/kernel.h>
30#include <linux/module.h>
c4da0048 31#include <linux/dma-mapping.h>
181d6902
ID
32
33#include "rt2x00.h"
34#include "rt2x00lib.h"
35
fa69560f 36struct sk_buff *rt2x00queue_alloc_rxskb(struct queue_entry *entry)
239c249d 37{
fa69560f 38 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
c4da0048
GW
39 struct sk_buff *skb;
40 struct skb_frame_desc *skbdesc;
2bb057d0
ID
41 unsigned int frame_size;
42 unsigned int head_size = 0;
43 unsigned int tail_size = 0;
239c249d
GW
44
45 /*
46 * The frame size includes descriptor size, because the
47 * hardware directly receive the frame into the skbuffer.
48 */
c4da0048 49 frame_size = entry->queue->data_size + entry->queue->desc_size;
239c249d
GW
50
51 /*
ff352391
ID
52 * The payload should be aligned to a 4-byte boundary,
53 * this means we need at least 3 bytes for moving the frame
54 * into the correct offset.
239c249d 55 */
2bb057d0
ID
56 head_size = 4;
57
58 /*
59 * For IV/EIV/ICV assembly we must make sure there is
60 * at least 8 bytes bytes available in headroom for IV/EIV
9c3444d3 61 * and 8 bytes for ICV data as tailroon.
2bb057d0 62 */
2bb057d0
ID
63 if (test_bit(CONFIG_SUPPORT_HW_CRYPTO, &rt2x00dev->flags)) {
64 head_size += 8;
9c3444d3 65 tail_size += 8;
2bb057d0 66 }
239c249d
GW
67
68 /*
69 * Allocate skbuffer.
70 */
2bb057d0 71 skb = dev_alloc_skb(frame_size + head_size + tail_size);
239c249d
GW
72 if (!skb)
73 return NULL;
74
2bb057d0
ID
75 /*
76 * Make sure we not have a frame with the requested bytes
77 * available in the head and tail.
78 */
79 skb_reserve(skb, head_size);
239c249d
GW
80 skb_put(skb, frame_size);
81
c4da0048
GW
82 /*
83 * Populate skbdesc.
84 */
85 skbdesc = get_skb_frame_desc(skb);
86 memset(skbdesc, 0, sizeof(*skbdesc));
87 skbdesc->entry = entry;
88
89 if (test_bit(DRIVER_REQUIRE_DMA, &rt2x00dev->flags)) {
90 skbdesc->skb_dma = dma_map_single(rt2x00dev->dev,
91 skb->data,
92 skb->len,
93 DMA_FROM_DEVICE);
94 skbdesc->flags |= SKBDESC_DMA_MAPPED_RX;
95 }
96
239c249d
GW
97 return skb;
98}
30caa6e3 99
fa69560f 100void rt2x00queue_map_txskb(struct queue_entry *entry)
30caa6e3 101{
fa69560f
ID
102 struct device *dev = entry->queue->rt2x00dev->dev;
103 struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
c4da0048 104
3ee54a07 105 skbdesc->skb_dma =
fa69560f 106 dma_map_single(dev, entry->skb->data, entry->skb->len, DMA_TO_DEVICE);
c4da0048
GW
107 skbdesc->flags |= SKBDESC_DMA_MAPPED_TX;
108}
109EXPORT_SYMBOL_GPL(rt2x00queue_map_txskb);
110
fa69560f 111void rt2x00queue_unmap_skb(struct queue_entry *entry)
c4da0048 112{
fa69560f
ID
113 struct device *dev = entry->queue->rt2x00dev->dev;
114 struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
c4da0048
GW
115
116 if (skbdesc->flags & SKBDESC_DMA_MAPPED_RX) {
fa69560f 117 dma_unmap_single(dev, skbdesc->skb_dma, entry->skb->len,
c4da0048
GW
118 DMA_FROM_DEVICE);
119 skbdesc->flags &= ~SKBDESC_DMA_MAPPED_RX;
546adf29 120 } else if (skbdesc->flags & SKBDESC_DMA_MAPPED_TX) {
fa69560f 121 dma_unmap_single(dev, skbdesc->skb_dma, entry->skb->len,
c4da0048
GW
122 DMA_TO_DEVICE);
123 skbdesc->flags &= ~SKBDESC_DMA_MAPPED_TX;
124 }
125}
0b8004aa 126EXPORT_SYMBOL_GPL(rt2x00queue_unmap_skb);
c4da0048 127
fa69560f 128void rt2x00queue_free_skb(struct queue_entry *entry)
c4da0048 129{
fa69560f 130 if (!entry->skb)
9a613195
ID
131 return;
132
fa69560f
ID
133 rt2x00queue_unmap_skb(entry);
134 dev_kfree_skb_any(entry->skb);
135 entry->skb = NULL;
30caa6e3 136}
239c249d 137
daee6c09 138void rt2x00queue_align_frame(struct sk_buff *skb)
9f166171 139{
9f166171 140 unsigned int frame_length = skb->len;
daee6c09 141 unsigned int align = ALIGN_SIZE(skb, 0);
9f166171
ID
142
143 if (!align)
144 return;
145
daee6c09
ID
146 skb_push(skb, align);
147 memmove(skb->data, skb->data + align, frame_length);
148 skb_trim(skb, frame_length);
149}
150
95d69aa0 151void rt2x00queue_align_payload(struct sk_buff *skb, unsigned int header_length)
daee6c09
ID
152{
153 unsigned int frame_length = skb->len;
95d69aa0 154 unsigned int align = ALIGN_SIZE(skb, header_length);
daee6c09
ID
155
156 if (!align)
157 return;
158
159 skb_push(skb, align);
160 memmove(skb->data, skb->data + align, frame_length);
161 skb_trim(skb, frame_length);
162}
163
164void rt2x00queue_insert_l2pad(struct sk_buff *skb, unsigned int header_length)
165{
2e331462 166 unsigned int payload_length = skb->len - header_length;
daee6c09
ID
167 unsigned int header_align = ALIGN_SIZE(skb, 0);
168 unsigned int payload_align = ALIGN_SIZE(skb, header_length);
e54be4e7 169 unsigned int l2pad = payload_length ? L2PAD_SIZE(header_length) : 0;
daee6c09 170
2e331462
GW
171 /*
172 * Adjust the header alignment if the payload needs to be moved more
173 * than the header.
174 */
175 if (payload_align > header_align)
176 header_align += 4;
177
178 /* There is nothing to do if no alignment is needed */
179 if (!header_align)
180 return;
daee6c09 181
2e331462
GW
182 /* Reserve the amount of space needed in front of the frame */
183 skb_push(skb, header_align);
184
185 /*
186 * Move the header.
187 */
188 memmove(skb->data, skb->data + header_align, header_length);
189
190 /* Move the payload, if present and if required */
191 if (payload_length && payload_align)
daee6c09 192 memmove(skb->data + header_length + l2pad,
a5186e99 193 skb->data + header_length + l2pad + payload_align,
2e331462
GW
194 payload_length);
195
196 /* Trim the skb to the correct size */
197 skb_trim(skb, header_length + l2pad + payload_length);
9f166171
ID
198}
199
daee6c09
ID
200void rt2x00queue_remove_l2pad(struct sk_buff *skb, unsigned int header_length)
201{
a061a93b
GW
202 /*
203 * L2 padding is only present if the skb contains more than just the
204 * IEEE 802.11 header.
205 */
206 unsigned int l2pad = (skb->len > header_length) ?
207 L2PAD_SIZE(header_length) : 0;
daee6c09 208
354e39db 209 if (!l2pad)
daee6c09
ID
210 return;
211
a061a93b
GW
212 memmove(skb->data + l2pad, skb->data, header_length);
213 skb_pull(skb, l2pad);
daee6c09
ID
214}
215
7b40982e
ID
216static void rt2x00queue_create_tx_descriptor_seq(struct queue_entry *entry,
217 struct txentry_desc *txdesc)
218{
219 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(entry->skb);
220 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)entry->skb->data;
221 struct rt2x00_intf *intf = vif_to_intf(tx_info->control.vif);
222 unsigned long irqflags;
223
224 if (!(tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) ||
225 unlikely(!tx_info->control.vif))
226 return;
227
228 /*
229 * Hardware should insert sequence counter.
230 * FIXME: We insert a software sequence counter first for
231 * hardware that doesn't support hardware sequence counting.
232 *
233 * This is wrong because beacons are not getting sequence
234 * numbers assigned properly.
235 *
236 * A secondary problem exists for drivers that cannot toggle
237 * sequence counting per-frame, since those will override the
238 * sequence counter given by mac80211.
239 */
240 spin_lock_irqsave(&intf->seqlock, irqflags);
241
242 if (test_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags))
243 intf->seqno += 0x10;
244 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
245 hdr->seq_ctrl |= cpu_to_le16(intf->seqno);
246
247 spin_unlock_irqrestore(&intf->seqlock, irqflags);
248
249 __set_bit(ENTRY_TXD_GENERATE_SEQ, &txdesc->flags);
250}
251
252static void rt2x00queue_create_tx_descriptor_plcp(struct queue_entry *entry,
253 struct txentry_desc *txdesc,
254 const struct rt2x00_rate *hwrate)
255{
256 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
257 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(entry->skb);
258 struct ieee80211_tx_rate *txrate = &tx_info->control.rates[0];
259 unsigned int data_length;
260 unsigned int duration;
261 unsigned int residual;
262
263 /* Data length + CRC + Crypto overhead (IV/EIV/ICV/MIC) */
264 data_length = entry->skb->len + 4;
265 data_length += rt2x00crypto_tx_overhead(rt2x00dev, entry->skb);
266
267 /*
268 * PLCP setup
269 * Length calculation depends on OFDM/CCK rate.
270 */
271 txdesc->signal = hwrate->plcp;
272 txdesc->service = 0x04;
273
274 if (hwrate->flags & DEV_RATE_OFDM) {
275 txdesc->length_high = (data_length >> 6) & 0x3f;
276 txdesc->length_low = data_length & 0x3f;
277 } else {
278 /*
279 * Convert length to microseconds.
280 */
281 residual = GET_DURATION_RES(data_length, hwrate->bitrate);
282 duration = GET_DURATION(data_length, hwrate->bitrate);
283
284 if (residual != 0) {
285 duration++;
286
287 /*
288 * Check if we need to set the Length Extension
289 */
290 if (hwrate->bitrate == 110 && residual <= 30)
291 txdesc->service |= 0x80;
292 }
293
294 txdesc->length_high = (duration >> 8) & 0xff;
295 txdesc->length_low = duration & 0xff;
296
297 /*
298 * When preamble is enabled we should set the
299 * preamble bit for the signal.
300 */
301 if (txrate->flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE)
302 txdesc->signal |= 0x08;
303 }
304}
305
bd88a781
ID
306static void rt2x00queue_create_tx_descriptor(struct queue_entry *entry,
307 struct txentry_desc *txdesc)
7050ec82 308{
2e92e6f2 309 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
e039fa4a 310 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(entry->skb);
7050ec82 311 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)entry->skb->data;
2e92e6f2 312 struct ieee80211_rate *rate =
e039fa4a 313 ieee80211_get_tx_rate(rt2x00dev->hw, tx_info);
7050ec82 314 const struct rt2x00_rate *hwrate;
7050ec82
ID
315
316 memset(txdesc, 0, sizeof(*txdesc));
317
9f166171 318 /*
df624ca5 319 * Header and frame information.
9f166171 320 */
df624ca5 321 txdesc->length = entry->skb->len;
9f166171 322 txdesc->header_length = ieee80211_get_hdrlen_from_skb(entry->skb);
9f166171 323
7050ec82
ID
324 /*
325 * Check whether this frame is to be acked.
326 */
e039fa4a 327 if (!(tx_info->flags & IEEE80211_TX_CTL_NO_ACK))
7050ec82
ID
328 __set_bit(ENTRY_TXD_ACK, &txdesc->flags);
329
330 /*
331 * Check if this is a RTS/CTS frame
332 */
ac104462
ID
333 if (ieee80211_is_rts(hdr->frame_control) ||
334 ieee80211_is_cts(hdr->frame_control)) {
7050ec82 335 __set_bit(ENTRY_TXD_BURST, &txdesc->flags);
ac104462 336 if (ieee80211_is_rts(hdr->frame_control))
7050ec82 337 __set_bit(ENTRY_TXD_RTS_FRAME, &txdesc->flags);
e039fa4a 338 else
7050ec82 339 __set_bit(ENTRY_TXD_CTS_FRAME, &txdesc->flags);
e039fa4a 340 if (tx_info->control.rts_cts_rate_idx >= 0)
2e92e6f2 341 rate =
e039fa4a 342 ieee80211_get_rts_cts_rate(rt2x00dev->hw, tx_info);
7050ec82
ID
343 }
344
345 /*
346 * Determine retry information.
347 */
e6a9854b 348 txdesc->retry_limit = tx_info->control.rates[0].count - 1;
42c82857 349 if (txdesc->retry_limit >= rt2x00dev->long_retry)
7050ec82
ID
350 __set_bit(ENTRY_TXD_RETRY_MODE, &txdesc->flags);
351
352 /*
353 * Check if more fragments are pending
354 */
2606e422 355 if (ieee80211_has_morefrags(hdr->frame_control)) {
7050ec82
ID
356 __set_bit(ENTRY_TXD_BURST, &txdesc->flags);
357 __set_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags);
358 }
359
2606e422
HS
360 /*
361 * Check if more frames (!= fragments) are pending
362 */
363 if (tx_info->flags & IEEE80211_TX_CTL_MORE_FRAMES)
364 __set_bit(ENTRY_TXD_BURST, &txdesc->flags);
365
7050ec82
ID
366 /*
367 * Beacons and probe responses require the tsf timestamp
1bce85cf 368 * to be inserted into the frame.
7050ec82 369 */
1bce85cf
HS
370 if (ieee80211_is_beacon(hdr->frame_control) ||
371 ieee80211_is_probe_resp(hdr->frame_control))
7050ec82
ID
372 __set_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags);
373
374 /*
375 * Determine with what IFS priority this frame should be send.
376 * Set ifs to IFS_SIFS when the this is not the first fragment,
377 * or this fragment came after RTS/CTS.
378 */
7b40982e
ID
379 if ((tx_info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT) &&
380 !test_bit(ENTRY_TXD_RTS_FRAME, &txdesc->flags)) {
7050ec82
ID
381 __set_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags);
382 txdesc->ifs = IFS_BACKOFF;
7b40982e 383 } else
7050ec82 384 txdesc->ifs = IFS_SIFS;
7050ec82 385
076f9582
ID
386 /*
387 * Determine rate modulation.
388 */
7050ec82 389 hwrate = rt2x00_get_rate(rate->hw_value);
076f9582 390 txdesc->rate_mode = RATE_MODE_CCK;
7b40982e 391 if (hwrate->flags & DEV_RATE_OFDM)
076f9582 392 txdesc->rate_mode = RATE_MODE_OFDM;
7050ec82 393
7b40982e
ID
394 /*
395 * Apply TX descriptor handling by components
396 */
397 rt2x00crypto_create_tx_descriptor(entry, txdesc);
35f00cfc 398 rt2x00ht_create_tx_descriptor(entry, txdesc, hwrate);
7b40982e
ID
399 rt2x00queue_create_tx_descriptor_seq(entry, txdesc);
400 rt2x00queue_create_tx_descriptor_plcp(entry, txdesc, hwrate);
7050ec82 401}
7050ec82 402
78eea11b
GW
403static int rt2x00queue_write_tx_data(struct queue_entry *entry,
404 struct txentry_desc *txdesc)
405{
406 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
407
408 /*
409 * This should not happen, we already checked the entry
410 * was ours. When the hardware disagrees there has been
411 * a queue corruption!
412 */
413 if (unlikely(rt2x00dev->ops->lib->get_entry_state &&
414 rt2x00dev->ops->lib->get_entry_state(entry))) {
415 ERROR(rt2x00dev,
416 "Corrupt queue %d, accessing entry which is not ours.\n"
417 "Please file bug report to %s.\n",
418 entry->queue->qid, DRV_PROJECT);
419 return -EINVAL;
420 }
421
422 /*
423 * Add the requested extra tx headroom in front of the skb.
424 */
425 skb_push(entry->skb, rt2x00dev->ops->extra_tx_headroom);
426 memset(entry->skb->data, 0, rt2x00dev->ops->extra_tx_headroom);
427
428 /*
76dd5ddf 429 * Call the driver's write_tx_data function, if it exists.
78eea11b 430 */
76dd5ddf
GW
431 if (rt2x00dev->ops->lib->write_tx_data)
432 rt2x00dev->ops->lib->write_tx_data(entry, txdesc);
78eea11b
GW
433
434 /*
435 * Map the skb to DMA.
436 */
437 if (test_bit(DRIVER_REQUIRE_DMA, &rt2x00dev->flags))
fa69560f 438 rt2x00queue_map_txskb(entry);
78eea11b
GW
439
440 return 0;
441}
442
bd88a781
ID
443static void rt2x00queue_write_tx_descriptor(struct queue_entry *entry,
444 struct txentry_desc *txdesc)
7050ec82 445{
b869767b 446 struct data_queue *queue = entry->queue;
7050ec82 447
93331458 448 queue->rt2x00dev->ops->lib->write_tx_desc(entry, txdesc);
7050ec82
ID
449
450 /*
451 * All processing on the frame has been completed, this means
452 * it is now ready to be dumped to userspace through debugfs.
453 */
93331458 454 rt2x00debug_dump_frame(queue->rt2x00dev, DUMP_FRAME_TX, entry->skb);
6295d815
GW
455}
456
8be4eed0 457static void rt2x00queue_kick_tx_queue(struct data_queue *queue,
6295d815
GW
458 struct txentry_desc *txdesc)
459{
7050ec82 460 /*
b869767b 461 * Check if we need to kick the queue, there are however a few rules
6295d815 462 * 1) Don't kick unless this is the last in frame in a burst.
b869767b
ID
463 * When the burst flag is set, this frame is always followed
464 * by another frame which in some way are related to eachother.
465 * This is true for fragments, RTS or CTS-to-self frames.
6295d815 466 * 2) Rule 1 can be broken when the available entries
b869767b 467 * in the queue are less then a certain threshold.
7050ec82 468 */
b869767b
ID
469 if (rt2x00queue_threshold(queue) ||
470 !test_bit(ENTRY_TXD_BURST, &txdesc->flags))
dbba306f 471 queue->rt2x00dev->ops->lib->kick_queue(queue);
7050ec82 472}
7050ec82 473
7351c6bd
JB
474int rt2x00queue_write_tx_frame(struct data_queue *queue, struct sk_buff *skb,
475 bool local)
6db3786a 476{
e6a9854b 477 struct ieee80211_tx_info *tx_info;
6db3786a
ID
478 struct queue_entry *entry = rt2x00queue_get_entry(queue, Q_INDEX);
479 struct txentry_desc txdesc;
d74f5ba4 480 struct skb_frame_desc *skbdesc;
e6a9854b 481 u8 rate_idx, rate_flags;
6db3786a
ID
482
483 if (unlikely(rt2x00queue_full(queue)))
0e3de998 484 return -ENOBUFS;
6db3786a 485
c6084d5f
HS
486 if (unlikely(test_and_set_bit(ENTRY_OWNER_DEVICE_DATA,
487 &entry->flags))) {
6db3786a
ID
488 ERROR(queue->rt2x00dev,
489 "Arrived at non-free entry in the non-full queue %d.\n"
490 "Please file bug report to %s.\n",
491 queue->qid, DRV_PROJECT);
492 return -EINVAL;
493 }
494
495 /*
496 * Copy all TX descriptor information into txdesc,
497 * after that we are free to use the skb->cb array
498 * for our information.
499 */
500 entry->skb = skb;
501 rt2x00queue_create_tx_descriptor(entry, &txdesc);
502
d74f5ba4 503 /*
e6a9854b 504 * All information is retrieved from the skb->cb array,
2bb057d0 505 * now we should claim ownership of the driver part of that
e6a9854b 506 * array, preserving the bitrate index and flags.
d74f5ba4 507 */
e6a9854b
JB
508 tx_info = IEEE80211_SKB_CB(skb);
509 rate_idx = tx_info->control.rates[0].idx;
510 rate_flags = tx_info->control.rates[0].flags;
0e3de998 511 skbdesc = get_skb_frame_desc(skb);
d74f5ba4
ID
512 memset(skbdesc, 0, sizeof(*skbdesc));
513 skbdesc->entry = entry;
e6a9854b
JB
514 skbdesc->tx_rate_idx = rate_idx;
515 skbdesc->tx_rate_flags = rate_flags;
d74f5ba4 516
7351c6bd
JB
517 if (local)
518 skbdesc->flags |= SKBDESC_NOT_MAC80211;
519
2bb057d0
ID
520 /*
521 * When hardware encryption is supported, and this frame
522 * is to be encrypted, we should strip the IV/EIV data from
3ad2f3fb 523 * the frame so we can provide it to the driver separately.
2bb057d0
ID
524 */
525 if (test_bit(ENTRY_TXD_ENCRYPT, &txdesc.flags) &&
dddfb478 526 !test_bit(ENTRY_TXD_ENCRYPT_IV, &txdesc.flags)) {
3f787bd6 527 if (test_bit(DRIVER_REQUIRE_COPY_IV, &queue->rt2x00dev->flags))
9eb4e21e 528 rt2x00crypto_tx_copy_iv(skb, &txdesc);
dddfb478 529 else
9eb4e21e 530 rt2x00crypto_tx_remove_iv(skb, &txdesc);
dddfb478 531 }
2bb057d0 532
93354cbb
ID
533 /*
534 * When DMA allocation is required we should guarentee to the
535 * driver that the DMA is aligned to a 4-byte boundary.
93354cbb
ID
536 * However some drivers require L2 padding to pad the payload
537 * rather then the header. This could be a requirement for
538 * PCI and USB devices, while header alignment only is valid
539 * for PCI devices.
540 */
9f166171 541 if (test_bit(DRIVER_REQUIRE_L2PAD, &queue->rt2x00dev->flags))
daee6c09 542 rt2x00queue_insert_l2pad(entry->skb, txdesc.header_length);
93354cbb 543 else if (test_bit(DRIVER_REQUIRE_DMA, &queue->rt2x00dev->flags))
daee6c09 544 rt2x00queue_align_frame(entry->skb);
9f166171 545
2bb057d0
ID
546 /*
547 * It could be possible that the queue was corrupted and this
0e3de998
ID
548 * call failed. Since we always return NETDEV_TX_OK to mac80211,
549 * this frame will simply be dropped.
2bb057d0 550 */
78eea11b 551 if (unlikely(rt2x00queue_write_tx_data(entry, &txdesc))) {
0262ab0d 552 clear_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags);
2bb057d0 553 entry->skb = NULL;
0e3de998 554 return -EIO;
6db3786a
ID
555 }
556
0262ab0d 557 set_bit(ENTRY_DATA_PENDING, &entry->flags);
6db3786a
ID
558
559 rt2x00queue_index_inc(queue, Q_INDEX);
560 rt2x00queue_write_tx_descriptor(entry, &txdesc);
8be4eed0 561 rt2x00queue_kick_tx_queue(queue, &txdesc);
6db3786a
ID
562
563 return 0;
564}
565
69cf36a4
HS
566int rt2x00queue_clear_beacon(struct rt2x00_dev *rt2x00dev,
567 struct ieee80211_vif *vif)
568{
569 struct rt2x00_intf *intf = vif_to_intf(vif);
570
571 if (unlikely(!intf->beacon))
572 return -ENOBUFS;
573
574 mutex_lock(&intf->beacon_skb_mutex);
575
576 /*
577 * Clean up the beacon skb.
578 */
579 rt2x00queue_free_skb(intf->beacon);
580
581 /*
582 * Clear beacon (single bssid devices don't need to clear the beacon
583 * since the beacon queue will get stopped anyway).
584 */
585 if (rt2x00dev->ops->lib->clear_beacon)
586 rt2x00dev->ops->lib->clear_beacon(intf->beacon);
587
588 mutex_unlock(&intf->beacon_skb_mutex);
589
590 return 0;
591}
592
8414ff07
HS
593int rt2x00queue_update_beacon_locked(struct rt2x00_dev *rt2x00dev,
594 struct ieee80211_vif *vif)
bd88a781
ID
595{
596 struct rt2x00_intf *intf = vif_to_intf(vif);
597 struct skb_frame_desc *skbdesc;
598 struct txentry_desc txdesc;
bd88a781
ID
599
600 if (unlikely(!intf->beacon))
601 return -ENOBUFS;
602
17512dc3
IP
603 /*
604 * Clean up the beacon skb.
605 */
fa69560f 606 rt2x00queue_free_skb(intf->beacon);
17512dc3 607
bd88a781 608 intf->beacon->skb = ieee80211_beacon_get(rt2x00dev->hw, vif);
8414ff07 609 if (!intf->beacon->skb)
bd88a781
ID
610 return -ENOMEM;
611
612 /*
613 * Copy all TX descriptor information into txdesc,
614 * after that we are free to use the skb->cb array
615 * for our information.
616 */
617 rt2x00queue_create_tx_descriptor(intf->beacon, &txdesc);
618
bd88a781
ID
619 /*
620 * Fill in skb descriptor
621 */
622 skbdesc = get_skb_frame_desc(intf->beacon->skb);
623 memset(skbdesc, 0, sizeof(*skbdesc));
bd88a781
ID
624 skbdesc->entry = intf->beacon;
625
bd88a781 626 /*
69cf36a4 627 * Send beacon to hardware.
bd88a781 628 */
f224f4ef 629 rt2x00dev->ops->lib->write_beacon(intf->beacon, &txdesc);
bd88a781 630
8414ff07
HS
631 return 0;
632
633}
634
635int rt2x00queue_update_beacon(struct rt2x00_dev *rt2x00dev,
636 struct ieee80211_vif *vif)
637{
638 struct rt2x00_intf *intf = vif_to_intf(vif);
639 int ret;
640
641 mutex_lock(&intf->beacon_skb_mutex);
642 ret = rt2x00queue_update_beacon_locked(rt2x00dev, vif);
17512dc3
IP
643 mutex_unlock(&intf->beacon_skb_mutex);
644
8414ff07 645 return ret;
bd88a781
ID
646}
647
5eb7efe8
ID
648void rt2x00queue_for_each_entry(struct data_queue *queue,
649 enum queue_index start,
650 enum queue_index end,
651 void (*fn)(struct queue_entry *entry))
652{
653 unsigned long irqflags;
654 unsigned int index_start;
655 unsigned int index_end;
656 unsigned int i;
657
658 if (unlikely(start >= Q_INDEX_MAX || end >= Q_INDEX_MAX)) {
659 ERROR(queue->rt2x00dev,
660 "Entry requested from invalid index range (%d - %d)\n",
661 start, end);
662 return;
663 }
664
665 /*
666 * Only protect the range we are going to loop over,
667 * if during our loop a extra entry is set to pending
668 * it should not be kicked during this run, since it
669 * is part of another TX operation.
670 */
813f0339 671 spin_lock_irqsave(&queue->index_lock, irqflags);
5eb7efe8
ID
672 index_start = queue->index[start];
673 index_end = queue->index[end];
813f0339 674 spin_unlock_irqrestore(&queue->index_lock, irqflags);
5eb7efe8
ID
675
676 /*
677 * Start from the TX done pointer, this guarentees that we will
678 * send out all frames in the correct order.
679 */
680 if (index_start < index_end) {
681 for (i = index_start; i < index_end; i++)
682 fn(&queue->entries[i]);
683 } else {
684 for (i = index_start; i < queue->limit; i++)
685 fn(&queue->entries[i]);
686
687 for (i = 0; i < index_end; i++)
688 fn(&queue->entries[i]);
689 }
690}
691EXPORT_SYMBOL_GPL(rt2x00queue_for_each_entry);
692
181d6902 693struct data_queue *rt2x00queue_get_queue(struct rt2x00_dev *rt2x00dev,
e58c6aca 694 const enum data_queue_qid queue)
181d6902
ID
695{
696 int atim = test_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags);
697
a2c9b652
ID
698 if (queue == QID_RX)
699 return rt2x00dev->rx;
700
61448f88 701 if (queue < rt2x00dev->ops->tx_queues && rt2x00dev->tx)
181d6902
ID
702 return &rt2x00dev->tx[queue];
703
704 if (!rt2x00dev->bcn)
705 return NULL;
706
e58c6aca 707 if (queue == QID_BEACON)
181d6902 708 return &rt2x00dev->bcn[0];
e58c6aca 709 else if (queue == QID_ATIM && atim)
181d6902
ID
710 return &rt2x00dev->bcn[1];
711
712 return NULL;
713}
714EXPORT_SYMBOL_GPL(rt2x00queue_get_queue);
715
716struct queue_entry *rt2x00queue_get_entry(struct data_queue *queue,
717 enum queue_index index)
718{
719 struct queue_entry *entry;
5f46c4d0 720 unsigned long irqflags;
181d6902
ID
721
722 if (unlikely(index >= Q_INDEX_MAX)) {
723 ERROR(queue->rt2x00dev,
724 "Entry requested from invalid index type (%d)\n", index);
725 return NULL;
726 }
727
813f0339 728 spin_lock_irqsave(&queue->index_lock, irqflags);
181d6902
ID
729
730 entry = &queue->entries[queue->index[index]];
731
813f0339 732 spin_unlock_irqrestore(&queue->index_lock, irqflags);
181d6902
ID
733
734 return entry;
735}
736EXPORT_SYMBOL_GPL(rt2x00queue_get_entry);
737
738void rt2x00queue_index_inc(struct data_queue *queue, enum queue_index index)
739{
5f46c4d0
ID
740 unsigned long irqflags;
741
181d6902
ID
742 if (unlikely(index >= Q_INDEX_MAX)) {
743 ERROR(queue->rt2x00dev,
744 "Index change on invalid index type (%d)\n", index);
745 return;
746 }
747
813f0339 748 spin_lock_irqsave(&queue->index_lock, irqflags);
181d6902
ID
749
750 queue->index[index]++;
751 if (queue->index[index] >= queue->limit)
752 queue->index[index] = 0;
753
652a9dd2
ID
754 queue->last_action[index] = jiffies;
755
10b6b801
ID
756 if (index == Q_INDEX) {
757 queue->length++;
758 } else if (index == Q_INDEX_DONE) {
759 queue->length--;
55887511 760 queue->count++;
10b6b801 761 }
181d6902 762
813f0339 763 spin_unlock_irqrestore(&queue->index_lock, irqflags);
181d6902 764}
181d6902 765
0b7fde54
ID
766void rt2x00queue_pause_queue(struct data_queue *queue)
767{
768 if (!test_bit(DEVICE_STATE_PRESENT, &queue->rt2x00dev->flags) ||
769 !test_bit(QUEUE_STARTED, &queue->flags) ||
770 test_and_set_bit(QUEUE_PAUSED, &queue->flags))
771 return;
772
773 switch (queue->qid) {
f615e9a3
ID
774 case QID_AC_VO:
775 case QID_AC_VI:
0b7fde54
ID
776 case QID_AC_BE:
777 case QID_AC_BK:
0b7fde54
ID
778 /*
779 * For TX queues, we have to disable the queue
780 * inside mac80211.
781 */
782 ieee80211_stop_queue(queue->rt2x00dev->hw, queue->qid);
783 break;
784 default:
785 break;
786 }
787}
788EXPORT_SYMBOL_GPL(rt2x00queue_pause_queue);
789
790void rt2x00queue_unpause_queue(struct data_queue *queue)
791{
792 if (!test_bit(DEVICE_STATE_PRESENT, &queue->rt2x00dev->flags) ||
793 !test_bit(QUEUE_STARTED, &queue->flags) ||
794 !test_and_clear_bit(QUEUE_PAUSED, &queue->flags))
795 return;
796
797 switch (queue->qid) {
f615e9a3
ID
798 case QID_AC_VO:
799 case QID_AC_VI:
0b7fde54
ID
800 case QID_AC_BE:
801 case QID_AC_BK:
0b7fde54
ID
802 /*
803 * For TX queues, we have to enable the queue
804 * inside mac80211.
805 */
806 ieee80211_wake_queue(queue->rt2x00dev->hw, queue->qid);
807 break;
5be65609
ID
808 case QID_RX:
809 /*
810 * For RX we need to kick the queue now in order to
811 * receive frames.
812 */
813 queue->rt2x00dev->ops->lib->kick_queue(queue);
0b7fde54
ID
814 default:
815 break;
816 }
817}
818EXPORT_SYMBOL_GPL(rt2x00queue_unpause_queue);
819
820void rt2x00queue_start_queue(struct data_queue *queue)
821{
822 mutex_lock(&queue->status_lock);
823
824 if (!test_bit(DEVICE_STATE_PRESENT, &queue->rt2x00dev->flags) ||
825 test_and_set_bit(QUEUE_STARTED, &queue->flags)) {
826 mutex_unlock(&queue->status_lock);
827 return;
828 }
829
830 set_bit(QUEUE_PAUSED, &queue->flags);
831
832 queue->rt2x00dev->ops->lib->start_queue(queue);
833
834 rt2x00queue_unpause_queue(queue);
835
836 mutex_unlock(&queue->status_lock);
837}
838EXPORT_SYMBOL_GPL(rt2x00queue_start_queue);
839
840void rt2x00queue_stop_queue(struct data_queue *queue)
841{
842 mutex_lock(&queue->status_lock);
843
844 if (!test_and_clear_bit(QUEUE_STARTED, &queue->flags)) {
845 mutex_unlock(&queue->status_lock);
846 return;
847 }
848
849 rt2x00queue_pause_queue(queue);
850
851 queue->rt2x00dev->ops->lib->stop_queue(queue);
852
853 mutex_unlock(&queue->status_lock);
854}
855EXPORT_SYMBOL_GPL(rt2x00queue_stop_queue);
856
5be65609
ID
857void rt2x00queue_flush_queue(struct data_queue *queue, bool drop)
858{
859 unsigned int i;
860 bool started;
861 bool tx_queue =
f615e9a3 862 (queue->qid == QID_AC_VO) ||
5be65609 863 (queue->qid == QID_AC_VI) ||
f615e9a3
ID
864 (queue->qid == QID_AC_BE) ||
865 (queue->qid == QID_AC_BK);
5be65609
ID
866
867 mutex_lock(&queue->status_lock);
868
869 /*
870 * If the queue has been started, we must stop it temporarily
871 * to prevent any new frames to be queued on the device. If
872 * we are not dropping the pending frames, the queue must
873 * only be stopped in the software and not the hardware,
874 * otherwise the queue will never become empty on its own.
875 */
876 started = test_bit(QUEUE_STARTED, &queue->flags);
877 if (started) {
878 /*
879 * Pause the queue
880 */
881 rt2x00queue_pause_queue(queue);
882
883 /*
884 * If we are not supposed to drop any pending
885 * frames, this means we must force a start (=kick)
886 * to the queue to make sure the hardware will
887 * start transmitting.
888 */
889 if (!drop && tx_queue)
890 queue->rt2x00dev->ops->lib->kick_queue(queue);
891 }
892
893 /*
894 * Check if driver supports flushing, we can only guarentee
895 * full support for flushing if the driver is able
896 * to cancel all pending frames (drop = true).
897 */
898 if (drop && queue->rt2x00dev->ops->lib->flush_queue)
899 queue->rt2x00dev->ops->lib->flush_queue(queue);
900
901 /*
902 * When we don't want to drop any frames, or when
903 * the driver doesn't fully flush the queue correcly,
904 * we must wait for the queue to become empty.
905 */
906 for (i = 0; !rt2x00queue_empty(queue) && i < 100; i++)
907 msleep(10);
908
909 /*
910 * The queue flush has failed...
911 */
912 if (unlikely(!rt2x00queue_empty(queue)))
21957c31 913 WARNING(queue->rt2x00dev, "Queue %d failed to flush\n", queue->qid);
5be65609
ID
914
915 /*
916 * Restore the queue to the previous status
917 */
918 if (started)
919 rt2x00queue_unpause_queue(queue);
920
921 mutex_unlock(&queue->status_lock);
922}
923EXPORT_SYMBOL_GPL(rt2x00queue_flush_queue);
924
0b7fde54
ID
925void rt2x00queue_start_queues(struct rt2x00_dev *rt2x00dev)
926{
927 struct data_queue *queue;
928
929 /*
930 * rt2x00queue_start_queue will call ieee80211_wake_queue
931 * for each queue after is has been properly initialized.
932 */
933 tx_queue_for_each(rt2x00dev, queue)
934 rt2x00queue_start_queue(queue);
935
936 rt2x00queue_start_queue(rt2x00dev->rx);
937}
938EXPORT_SYMBOL_GPL(rt2x00queue_start_queues);
939
940void rt2x00queue_stop_queues(struct rt2x00_dev *rt2x00dev)
941{
942 struct data_queue *queue;
943
944 /*
945 * rt2x00queue_stop_queue will call ieee80211_stop_queue
946 * as well, but we are completely shutting doing everything
947 * now, so it is much safer to stop all TX queues at once,
948 * and use rt2x00queue_stop_queue for cleaning up.
949 */
950 ieee80211_stop_queues(rt2x00dev->hw);
951
952 tx_queue_for_each(rt2x00dev, queue)
953 rt2x00queue_stop_queue(queue);
954
955 rt2x00queue_stop_queue(rt2x00dev->rx);
956}
957EXPORT_SYMBOL_GPL(rt2x00queue_stop_queues);
958
5be65609
ID
959void rt2x00queue_flush_queues(struct rt2x00_dev *rt2x00dev, bool drop)
960{
961 struct data_queue *queue;
962
963 tx_queue_for_each(rt2x00dev, queue)
964 rt2x00queue_flush_queue(queue, drop);
965
966 rt2x00queue_flush_queue(rt2x00dev->rx, drop);
967}
968EXPORT_SYMBOL_GPL(rt2x00queue_flush_queues);
969
181d6902
ID
970static void rt2x00queue_reset(struct data_queue *queue)
971{
5f46c4d0 972 unsigned long irqflags;
652a9dd2 973 unsigned int i;
5f46c4d0 974
813f0339 975 spin_lock_irqsave(&queue->index_lock, irqflags);
181d6902
ID
976
977 queue->count = 0;
978 queue->length = 0;
652a9dd2
ID
979
980 for (i = 0; i < Q_INDEX_MAX; i++) {
981 queue->index[i] = 0;
982 queue->last_action[i] = jiffies;
983 }
181d6902 984
813f0339 985 spin_unlock_irqrestore(&queue->index_lock, irqflags);
181d6902
ID
986}
987
798b7adb 988void rt2x00queue_init_queues(struct rt2x00_dev *rt2x00dev)
181d6902
ID
989{
990 struct data_queue *queue;
991 unsigned int i;
992
798b7adb 993 queue_for_each(rt2x00dev, queue) {
181d6902
ID
994 rt2x00queue_reset(queue);
995
64e7d723 996 for (i = 0; i < queue->limit; i++)
798b7adb 997 rt2x00dev->ops->lib->clear_entry(&queue->entries[i]);
181d6902
ID
998 }
999}
1000
1001static int rt2x00queue_alloc_entries(struct data_queue *queue,
1002 const struct data_queue_desc *qdesc)
1003{
1004 struct queue_entry *entries;
1005 unsigned int entry_size;
1006 unsigned int i;
1007
1008 rt2x00queue_reset(queue);
1009
1010 queue->limit = qdesc->entry_num;
b869767b 1011 queue->threshold = DIV_ROUND_UP(qdesc->entry_num, 10);
181d6902
ID
1012 queue->data_size = qdesc->data_size;
1013 queue->desc_size = qdesc->desc_size;
1014
1015 /*
1016 * Allocate all queue entries.
1017 */
1018 entry_size = sizeof(*entries) + qdesc->priv_size;
baeb2ffa 1019 entries = kcalloc(queue->limit, entry_size, GFP_KERNEL);
181d6902
ID
1020 if (!entries)
1021 return -ENOMEM;
1022
1023#define QUEUE_ENTRY_PRIV_OFFSET(__base, __index, __limit, __esize, __psize) \
f8bfbc31
ME
1024 (((char *)(__base)) + ((__limit) * (__esize)) + \
1025 ((__index) * (__psize)))
181d6902
ID
1026
1027 for (i = 0; i < queue->limit; i++) {
1028 entries[i].flags = 0;
1029 entries[i].queue = queue;
1030 entries[i].skb = NULL;
1031 entries[i].entry_idx = i;
1032 entries[i].priv_data =
1033 QUEUE_ENTRY_PRIV_OFFSET(entries, i, queue->limit,
1034 sizeof(*entries), qdesc->priv_size);
1035 }
1036
1037#undef QUEUE_ENTRY_PRIV_OFFSET
1038
1039 queue->entries = entries;
1040
1041 return 0;
1042}
1043
fa69560f 1044static void rt2x00queue_free_skbs(struct data_queue *queue)
30caa6e3
GW
1045{
1046 unsigned int i;
1047
1048 if (!queue->entries)
1049 return;
1050
1051 for (i = 0; i < queue->limit; i++) {
fa69560f 1052 rt2x00queue_free_skb(&queue->entries[i]);
30caa6e3
GW
1053 }
1054}
1055
fa69560f 1056static int rt2x00queue_alloc_rxskbs(struct data_queue *queue)
30caa6e3
GW
1057{
1058 unsigned int i;
1059 struct sk_buff *skb;
1060
1061 for (i = 0; i < queue->limit; i++) {
fa69560f 1062 skb = rt2x00queue_alloc_rxskb(&queue->entries[i]);
30caa6e3 1063 if (!skb)
61243d8e 1064 return -ENOMEM;
30caa6e3
GW
1065 queue->entries[i].skb = skb;
1066 }
1067
1068 return 0;
30caa6e3
GW
1069}
1070
181d6902
ID
1071int rt2x00queue_initialize(struct rt2x00_dev *rt2x00dev)
1072{
1073 struct data_queue *queue;
1074 int status;
1075
181d6902
ID
1076 status = rt2x00queue_alloc_entries(rt2x00dev->rx, rt2x00dev->ops->rx);
1077 if (status)
1078 goto exit;
1079
1080 tx_queue_for_each(rt2x00dev, queue) {
1081 status = rt2x00queue_alloc_entries(queue, rt2x00dev->ops->tx);
1082 if (status)
1083 goto exit;
1084 }
1085
1086 status = rt2x00queue_alloc_entries(rt2x00dev->bcn, rt2x00dev->ops->bcn);
1087 if (status)
1088 goto exit;
1089
30caa6e3
GW
1090 if (test_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags)) {
1091 status = rt2x00queue_alloc_entries(&rt2x00dev->bcn[1],
1092 rt2x00dev->ops->atim);
1093 if (status)
1094 goto exit;
1095 }
181d6902 1096
fa69560f 1097 status = rt2x00queue_alloc_rxskbs(rt2x00dev->rx);
181d6902
ID
1098 if (status)
1099 goto exit;
1100
1101 return 0;
1102
1103exit:
1104 ERROR(rt2x00dev, "Queue entries allocation failed.\n");
1105
1106 rt2x00queue_uninitialize(rt2x00dev);
1107
1108 return status;
1109}
1110
1111void rt2x00queue_uninitialize(struct rt2x00_dev *rt2x00dev)
1112{
1113 struct data_queue *queue;
1114
fa69560f 1115 rt2x00queue_free_skbs(rt2x00dev->rx);
30caa6e3 1116
181d6902
ID
1117 queue_for_each(rt2x00dev, queue) {
1118 kfree(queue->entries);
1119 queue->entries = NULL;
1120 }
1121}
1122
8f539276
ID
1123static void rt2x00queue_init(struct rt2x00_dev *rt2x00dev,
1124 struct data_queue *queue, enum data_queue_qid qid)
1125{
0b7fde54 1126 mutex_init(&queue->status_lock);
813f0339 1127 spin_lock_init(&queue->index_lock);
8f539276
ID
1128
1129 queue->rt2x00dev = rt2x00dev;
1130 queue->qid = qid;
2af0a570 1131 queue->txop = 0;
8f539276
ID
1132 queue->aifs = 2;
1133 queue->cw_min = 5;
1134 queue->cw_max = 10;
1135}
1136
181d6902
ID
1137int rt2x00queue_allocate(struct rt2x00_dev *rt2x00dev)
1138{
1139 struct data_queue *queue;
1140 enum data_queue_qid qid;
1141 unsigned int req_atim =
1142 !!test_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags);
1143
1144 /*
1145 * We need the following queues:
1146 * RX: 1
61448f88 1147 * TX: ops->tx_queues
181d6902
ID
1148 * Beacon: 1
1149 * Atim: 1 (if required)
1150 */
61448f88 1151 rt2x00dev->data_queues = 2 + rt2x00dev->ops->tx_queues + req_atim;
181d6902 1152
baeb2ffa 1153 queue = kcalloc(rt2x00dev->data_queues, sizeof(*queue), GFP_KERNEL);
181d6902
ID
1154 if (!queue) {
1155 ERROR(rt2x00dev, "Queue allocation failed.\n");
1156 return -ENOMEM;
1157 }
1158
1159 /*
1160 * Initialize pointers
1161 */
1162 rt2x00dev->rx = queue;
1163 rt2x00dev->tx = &queue[1];
61448f88 1164 rt2x00dev->bcn = &queue[1 + rt2x00dev->ops->tx_queues];
181d6902
ID
1165
1166 /*
1167 * Initialize queue parameters.
1168 * RX: qid = QID_RX
f615e9a3 1169 * TX: qid = QID_AC_VO + index
181d6902
ID
1170 * TX: cw_min: 2^5 = 32.
1171 * TX: cw_max: 2^10 = 1024.
565a019a
ID
1172 * BCN: qid = QID_BEACON
1173 * ATIM: qid = QID_ATIM
181d6902 1174 */
8f539276 1175 rt2x00queue_init(rt2x00dev, rt2x00dev->rx, QID_RX);
181d6902 1176
f615e9a3 1177 qid = QID_AC_VO;
8f539276
ID
1178 tx_queue_for_each(rt2x00dev, queue)
1179 rt2x00queue_init(rt2x00dev, queue, qid++);
181d6902 1180
565a019a 1181 rt2x00queue_init(rt2x00dev, &rt2x00dev->bcn[0], QID_BEACON);
181d6902 1182 if (req_atim)
565a019a 1183 rt2x00queue_init(rt2x00dev, &rt2x00dev->bcn[1], QID_ATIM);
181d6902
ID
1184
1185 return 0;
1186}
1187
1188void rt2x00queue_free(struct rt2x00_dev *rt2x00dev)
1189{
1190 kfree(rt2x00dev->rx);
1191 rt2x00dev->rx = NULL;
1192 rt2x00dev->tx = NULL;
1193 rt2x00dev->bcn = NULL;
1194}
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