rt2x00: Clean up all driver's kick_tx_queue callback functions.
[deliverable/linux.git] / drivers / net / wireless / rt2x00 / rt2x00queue.c
CommitLineData
181d6902 1/*
9c9a0d14
GW
2 Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
3 Copyright (C) 2004 - 2009 Gertjan van Wingerde <gwingerde@gmail.com>
181d6902
ID
4 <http://rt2x00.serialmonkey.com>
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the
18 Free Software Foundation, Inc.,
19 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
20 */
21
22/*
23 Module: rt2x00lib
24 Abstract: rt2x00 queue specific routines.
25 */
26
27#include <linux/kernel.h>
28#include <linux/module.h>
c4da0048 29#include <linux/dma-mapping.h>
181d6902
ID
30
31#include "rt2x00.h"
32#include "rt2x00lib.h"
33
c4da0048
GW
34struct sk_buff *rt2x00queue_alloc_rxskb(struct rt2x00_dev *rt2x00dev,
35 struct queue_entry *entry)
239c249d 36{
c4da0048
GW
37 struct sk_buff *skb;
38 struct skb_frame_desc *skbdesc;
2bb057d0
ID
39 unsigned int frame_size;
40 unsigned int head_size = 0;
41 unsigned int tail_size = 0;
239c249d
GW
42
43 /*
44 * The frame size includes descriptor size, because the
45 * hardware directly receive the frame into the skbuffer.
46 */
c4da0048 47 frame_size = entry->queue->data_size + entry->queue->desc_size;
239c249d
GW
48
49 /*
ff352391
ID
50 * The payload should be aligned to a 4-byte boundary,
51 * this means we need at least 3 bytes for moving the frame
52 * into the correct offset.
239c249d 53 */
2bb057d0
ID
54 head_size = 4;
55
56 /*
57 * For IV/EIV/ICV assembly we must make sure there is
58 * at least 8 bytes bytes available in headroom for IV/EIV
9c3444d3 59 * and 8 bytes for ICV data as tailroon.
2bb057d0 60 */
2bb057d0
ID
61 if (test_bit(CONFIG_SUPPORT_HW_CRYPTO, &rt2x00dev->flags)) {
62 head_size += 8;
9c3444d3 63 tail_size += 8;
2bb057d0 64 }
239c249d
GW
65
66 /*
67 * Allocate skbuffer.
68 */
2bb057d0 69 skb = dev_alloc_skb(frame_size + head_size + tail_size);
239c249d
GW
70 if (!skb)
71 return NULL;
72
2bb057d0
ID
73 /*
74 * Make sure we not have a frame with the requested bytes
75 * available in the head and tail.
76 */
77 skb_reserve(skb, head_size);
239c249d
GW
78 skb_put(skb, frame_size);
79
c4da0048
GW
80 /*
81 * Populate skbdesc.
82 */
83 skbdesc = get_skb_frame_desc(skb);
84 memset(skbdesc, 0, sizeof(*skbdesc));
85 skbdesc->entry = entry;
86
87 if (test_bit(DRIVER_REQUIRE_DMA, &rt2x00dev->flags)) {
88 skbdesc->skb_dma = dma_map_single(rt2x00dev->dev,
89 skb->data,
90 skb->len,
91 DMA_FROM_DEVICE);
92 skbdesc->flags |= SKBDESC_DMA_MAPPED_RX;
93 }
94
239c249d
GW
95 return skb;
96}
30caa6e3 97
c4da0048 98void rt2x00queue_map_txskb(struct rt2x00_dev *rt2x00dev, struct sk_buff *skb)
30caa6e3 99{
c4da0048
GW
100 struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb);
101
3ee54a07
ID
102 /*
103 * If device has requested headroom, we should make sure that
104 * is also mapped to the DMA so it can be used for transfering
105 * additional descriptor information to the hardware.
106 */
b59a52f1 107 skb_push(skb, rt2x00dev->ops->extra_tx_headroom);
3ee54a07
ID
108
109 skbdesc->skb_dma =
110 dma_map_single(rt2x00dev->dev, skb->data, skb->len, DMA_TO_DEVICE);
111
112 /*
113 * Restore data pointer to original location again.
114 */
b59a52f1 115 skb_pull(skb, rt2x00dev->ops->extra_tx_headroom);
3ee54a07 116
c4da0048
GW
117 skbdesc->flags |= SKBDESC_DMA_MAPPED_TX;
118}
119EXPORT_SYMBOL_GPL(rt2x00queue_map_txskb);
120
121void rt2x00queue_unmap_skb(struct rt2x00_dev *rt2x00dev, struct sk_buff *skb)
122{
123 struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb);
124
125 if (skbdesc->flags & SKBDESC_DMA_MAPPED_RX) {
126 dma_unmap_single(rt2x00dev->dev, skbdesc->skb_dma, skb->len,
127 DMA_FROM_DEVICE);
128 skbdesc->flags &= ~SKBDESC_DMA_MAPPED_RX;
129 }
130
131 if (skbdesc->flags & SKBDESC_DMA_MAPPED_TX) {
3ee54a07
ID
132 /*
133 * Add headroom to the skb length, it has been removed
134 * by the driver, but it was actually mapped to DMA.
135 */
136 dma_unmap_single(rt2x00dev->dev, skbdesc->skb_dma,
b59a52f1 137 skb->len + rt2x00dev->ops->extra_tx_headroom,
c4da0048
GW
138 DMA_TO_DEVICE);
139 skbdesc->flags &= ~SKBDESC_DMA_MAPPED_TX;
140 }
141}
c4da0048
GW
142
143void rt2x00queue_free_skb(struct rt2x00_dev *rt2x00dev, struct sk_buff *skb)
144{
9a613195
ID
145 if (!skb)
146 return;
147
61243d8e 148 rt2x00queue_unmap_skb(rt2x00dev, skb);
30caa6e3
GW
149 dev_kfree_skb_any(skb);
150}
239c249d 151
daee6c09 152void rt2x00queue_align_frame(struct sk_buff *skb)
9f166171 153{
9f166171 154 unsigned int frame_length = skb->len;
daee6c09 155 unsigned int align = ALIGN_SIZE(skb, 0);
9f166171
ID
156
157 if (!align)
158 return;
159
daee6c09
ID
160 skb_push(skb, align);
161 memmove(skb->data, skb->data + align, frame_length);
162 skb_trim(skb, frame_length);
163}
164
95d69aa0 165void rt2x00queue_align_payload(struct sk_buff *skb, unsigned int header_length)
daee6c09
ID
166{
167 unsigned int frame_length = skb->len;
95d69aa0 168 unsigned int align = ALIGN_SIZE(skb, header_length);
daee6c09
ID
169
170 if (!align)
171 return;
172
173 skb_push(skb, align);
174 memmove(skb->data, skb->data + align, frame_length);
175 skb_trim(skb, frame_length);
176}
177
178void rt2x00queue_insert_l2pad(struct sk_buff *skb, unsigned int header_length)
179{
2e331462 180 unsigned int payload_length = skb->len - header_length;
daee6c09
ID
181 unsigned int header_align = ALIGN_SIZE(skb, 0);
182 unsigned int payload_align = ALIGN_SIZE(skb, header_length);
e54be4e7 183 unsigned int l2pad = payload_length ? L2PAD_SIZE(header_length) : 0;
daee6c09 184
2e331462
GW
185 /*
186 * Adjust the header alignment if the payload needs to be moved more
187 * than the header.
188 */
189 if (payload_align > header_align)
190 header_align += 4;
191
192 /* There is nothing to do if no alignment is needed */
193 if (!header_align)
194 return;
daee6c09 195
2e331462
GW
196 /* Reserve the amount of space needed in front of the frame */
197 skb_push(skb, header_align);
198
199 /*
200 * Move the header.
201 */
202 memmove(skb->data, skb->data + header_align, header_length);
203
204 /* Move the payload, if present and if required */
205 if (payload_length && payload_align)
daee6c09 206 memmove(skb->data + header_length + l2pad,
a5186e99 207 skb->data + header_length + l2pad + payload_align,
2e331462
GW
208 payload_length);
209
210 /* Trim the skb to the correct size */
211 skb_trim(skb, header_length + l2pad + payload_length);
9f166171
ID
212}
213
daee6c09
ID
214void rt2x00queue_remove_l2pad(struct sk_buff *skb, unsigned int header_length)
215{
77e73d18 216 unsigned int l2pad = L2PAD_SIZE(header_length);
daee6c09 217
354e39db 218 if (!l2pad)
daee6c09
ID
219 return;
220
221 memmove(skb->data + l2pad, skb->data, header_length);
222 skb_pull(skb, l2pad);
223}
224
7b40982e
ID
225static void rt2x00queue_create_tx_descriptor_seq(struct queue_entry *entry,
226 struct txentry_desc *txdesc)
227{
228 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(entry->skb);
229 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)entry->skb->data;
230 struct rt2x00_intf *intf = vif_to_intf(tx_info->control.vif);
231 unsigned long irqflags;
232
233 if (!(tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) ||
234 unlikely(!tx_info->control.vif))
235 return;
236
237 /*
238 * Hardware should insert sequence counter.
239 * FIXME: We insert a software sequence counter first for
240 * hardware that doesn't support hardware sequence counting.
241 *
242 * This is wrong because beacons are not getting sequence
243 * numbers assigned properly.
244 *
245 * A secondary problem exists for drivers that cannot toggle
246 * sequence counting per-frame, since those will override the
247 * sequence counter given by mac80211.
248 */
249 spin_lock_irqsave(&intf->seqlock, irqflags);
250
251 if (test_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags))
252 intf->seqno += 0x10;
253 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
254 hdr->seq_ctrl |= cpu_to_le16(intf->seqno);
255
256 spin_unlock_irqrestore(&intf->seqlock, irqflags);
257
258 __set_bit(ENTRY_TXD_GENERATE_SEQ, &txdesc->flags);
259}
260
261static void rt2x00queue_create_tx_descriptor_plcp(struct queue_entry *entry,
262 struct txentry_desc *txdesc,
263 const struct rt2x00_rate *hwrate)
264{
265 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
266 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(entry->skb);
267 struct ieee80211_tx_rate *txrate = &tx_info->control.rates[0];
268 unsigned int data_length;
269 unsigned int duration;
270 unsigned int residual;
271
272 /* Data length + CRC + Crypto overhead (IV/EIV/ICV/MIC) */
273 data_length = entry->skb->len + 4;
274 data_length += rt2x00crypto_tx_overhead(rt2x00dev, entry->skb);
275
276 /*
277 * PLCP setup
278 * Length calculation depends on OFDM/CCK rate.
279 */
280 txdesc->signal = hwrate->plcp;
281 txdesc->service = 0x04;
282
283 if (hwrate->flags & DEV_RATE_OFDM) {
284 txdesc->length_high = (data_length >> 6) & 0x3f;
285 txdesc->length_low = data_length & 0x3f;
286 } else {
287 /*
288 * Convert length to microseconds.
289 */
290 residual = GET_DURATION_RES(data_length, hwrate->bitrate);
291 duration = GET_DURATION(data_length, hwrate->bitrate);
292
293 if (residual != 0) {
294 duration++;
295
296 /*
297 * Check if we need to set the Length Extension
298 */
299 if (hwrate->bitrate == 110 && residual <= 30)
300 txdesc->service |= 0x80;
301 }
302
303 txdesc->length_high = (duration >> 8) & 0xff;
304 txdesc->length_low = duration & 0xff;
305
306 /*
307 * When preamble is enabled we should set the
308 * preamble bit for the signal.
309 */
310 if (txrate->flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE)
311 txdesc->signal |= 0x08;
312 }
313}
314
bd88a781
ID
315static void rt2x00queue_create_tx_descriptor(struct queue_entry *entry,
316 struct txentry_desc *txdesc)
7050ec82 317{
2e92e6f2 318 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
e039fa4a 319 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(entry->skb);
7050ec82 320 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)entry->skb->data;
2e92e6f2 321 struct ieee80211_rate *rate =
e039fa4a 322 ieee80211_get_tx_rate(rt2x00dev->hw, tx_info);
7050ec82 323 const struct rt2x00_rate *hwrate;
7050ec82
ID
324
325 memset(txdesc, 0, sizeof(*txdesc));
326
327 /*
328 * Initialize information from queue
329 */
330 txdesc->queue = entry->queue->qid;
331 txdesc->cw_min = entry->queue->cw_min;
332 txdesc->cw_max = entry->queue->cw_max;
333 txdesc->aifs = entry->queue->aifs;
334
9f166171 335 /*
df624ca5 336 * Header and frame information.
9f166171 337 */
df624ca5 338 txdesc->length = entry->skb->len;
9f166171 339 txdesc->header_length = ieee80211_get_hdrlen_from_skb(entry->skb);
9f166171 340
7050ec82
ID
341 /*
342 * Check whether this frame is to be acked.
343 */
e039fa4a 344 if (!(tx_info->flags & IEEE80211_TX_CTL_NO_ACK))
7050ec82
ID
345 __set_bit(ENTRY_TXD_ACK, &txdesc->flags);
346
347 /*
348 * Check if this is a RTS/CTS frame
349 */
ac104462
ID
350 if (ieee80211_is_rts(hdr->frame_control) ||
351 ieee80211_is_cts(hdr->frame_control)) {
7050ec82 352 __set_bit(ENTRY_TXD_BURST, &txdesc->flags);
ac104462 353 if (ieee80211_is_rts(hdr->frame_control))
7050ec82 354 __set_bit(ENTRY_TXD_RTS_FRAME, &txdesc->flags);
e039fa4a 355 else
7050ec82 356 __set_bit(ENTRY_TXD_CTS_FRAME, &txdesc->flags);
e039fa4a 357 if (tx_info->control.rts_cts_rate_idx >= 0)
2e92e6f2 358 rate =
e039fa4a 359 ieee80211_get_rts_cts_rate(rt2x00dev->hw, tx_info);
7050ec82
ID
360 }
361
362 /*
363 * Determine retry information.
364 */
e6a9854b 365 txdesc->retry_limit = tx_info->control.rates[0].count - 1;
42c82857 366 if (txdesc->retry_limit >= rt2x00dev->long_retry)
7050ec82
ID
367 __set_bit(ENTRY_TXD_RETRY_MODE, &txdesc->flags);
368
369 /*
370 * Check if more fragments are pending
371 */
267e8987
ID
372 if (ieee80211_has_morefrags(hdr->frame_control) ||
373 (tx_info->flags & IEEE80211_TX_CTL_MORE_FRAMES)) {
7050ec82
ID
374 __set_bit(ENTRY_TXD_BURST, &txdesc->flags);
375 __set_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags);
376 }
377
378 /*
379 * Beacons and probe responses require the tsf timestamp
e81e0aef
AB
380 * to be inserted into the frame, except for a frame that has been injected
381 * through a monitor interface. This latter is needed for testing a
382 * monitor interface.
7050ec82 383 */
e81e0aef
AB
384 if ((ieee80211_is_beacon(hdr->frame_control) ||
385 ieee80211_is_probe_resp(hdr->frame_control)) &&
386 (!(tx_info->flags & IEEE80211_TX_CTL_INJECTED)))
7050ec82
ID
387 __set_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags);
388
389 /*
390 * Determine with what IFS priority this frame should be send.
391 * Set ifs to IFS_SIFS when the this is not the first fragment,
392 * or this fragment came after RTS/CTS.
393 */
7b40982e
ID
394 if ((tx_info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT) &&
395 !test_bit(ENTRY_TXD_RTS_FRAME, &txdesc->flags)) {
7050ec82
ID
396 __set_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags);
397 txdesc->ifs = IFS_BACKOFF;
7b40982e 398 } else
7050ec82 399 txdesc->ifs = IFS_SIFS;
7050ec82 400
076f9582
ID
401 /*
402 * Determine rate modulation.
403 */
7050ec82 404 hwrate = rt2x00_get_rate(rate->hw_value);
076f9582 405 txdesc->rate_mode = RATE_MODE_CCK;
7b40982e 406 if (hwrate->flags & DEV_RATE_OFDM)
076f9582 407 txdesc->rate_mode = RATE_MODE_OFDM;
7050ec82 408
7b40982e
ID
409 /*
410 * Apply TX descriptor handling by components
411 */
412 rt2x00crypto_create_tx_descriptor(entry, txdesc);
35f00cfc 413 rt2x00ht_create_tx_descriptor(entry, txdesc, hwrate);
7b40982e
ID
414 rt2x00queue_create_tx_descriptor_seq(entry, txdesc);
415 rt2x00queue_create_tx_descriptor_plcp(entry, txdesc, hwrate);
7050ec82 416}
7050ec82 417
bd88a781
ID
418static void rt2x00queue_write_tx_descriptor(struct queue_entry *entry,
419 struct txentry_desc *txdesc)
7050ec82 420{
b869767b
ID
421 struct data_queue *queue = entry->queue;
422 struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;
7050ec82
ID
423
424 rt2x00dev->ops->lib->write_tx_desc(rt2x00dev, entry->skb, txdesc);
425
426 /*
427 * All processing on the frame has been completed, this means
428 * it is now ready to be dumped to userspace through debugfs.
429 */
430 rt2x00debug_dump_frame(rt2x00dev, DUMP_FRAME_TX, entry->skb);
431
432 /*
b869767b
ID
433 * Check if we need to kick the queue, there are however a few rules
434 * 1) Don't kick beacon queue
435 * 2) Don't kick unless this is the last in frame in a burst.
436 * When the burst flag is set, this frame is always followed
437 * by another frame which in some way are related to eachother.
438 * This is true for fragments, RTS or CTS-to-self frames.
439 * 3) Rule 2 can be broken when the available entries
440 * in the queue are less then a certain threshold.
7050ec82 441 */
b869767b
ID
442 if (entry->queue->qid == QID_BEACON)
443 return;
444
445 if (rt2x00queue_threshold(queue) ||
446 !test_bit(ENTRY_TXD_BURST, &txdesc->flags))
447 rt2x00dev->ops->lib->kick_tx_queue(rt2x00dev, queue->qid);
7050ec82 448}
7050ec82 449
7351c6bd
JB
450int rt2x00queue_write_tx_frame(struct data_queue *queue, struct sk_buff *skb,
451 bool local)
6db3786a 452{
e6a9854b 453 struct ieee80211_tx_info *tx_info;
6db3786a
ID
454 struct queue_entry *entry = rt2x00queue_get_entry(queue, Q_INDEX);
455 struct txentry_desc txdesc;
d74f5ba4 456 struct skb_frame_desc *skbdesc;
e6a9854b 457 u8 rate_idx, rate_flags;
6db3786a
ID
458
459 if (unlikely(rt2x00queue_full(queue)))
0e3de998 460 return -ENOBUFS;
6db3786a 461
0262ab0d 462 if (test_and_set_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags)) {
6db3786a
ID
463 ERROR(queue->rt2x00dev,
464 "Arrived at non-free entry in the non-full queue %d.\n"
465 "Please file bug report to %s.\n",
466 queue->qid, DRV_PROJECT);
467 return -EINVAL;
468 }
469
470 /*
471 * Copy all TX descriptor information into txdesc,
472 * after that we are free to use the skb->cb array
473 * for our information.
474 */
475 entry->skb = skb;
476 rt2x00queue_create_tx_descriptor(entry, &txdesc);
477
d74f5ba4 478 /*
e6a9854b 479 * All information is retrieved from the skb->cb array,
2bb057d0 480 * now we should claim ownership of the driver part of that
e6a9854b 481 * array, preserving the bitrate index and flags.
d74f5ba4 482 */
e6a9854b
JB
483 tx_info = IEEE80211_SKB_CB(skb);
484 rate_idx = tx_info->control.rates[0].idx;
485 rate_flags = tx_info->control.rates[0].flags;
0e3de998 486 skbdesc = get_skb_frame_desc(skb);
d74f5ba4
ID
487 memset(skbdesc, 0, sizeof(*skbdesc));
488 skbdesc->entry = entry;
e6a9854b
JB
489 skbdesc->tx_rate_idx = rate_idx;
490 skbdesc->tx_rate_flags = rate_flags;
d74f5ba4 491
7351c6bd
JB
492 if (local)
493 skbdesc->flags |= SKBDESC_NOT_MAC80211;
494
2bb057d0
ID
495 /*
496 * When hardware encryption is supported, and this frame
497 * is to be encrypted, we should strip the IV/EIV data from
498 * the frame so we can provide it to the driver seperately.
499 */
500 if (test_bit(ENTRY_TXD_ENCRYPT, &txdesc.flags) &&
dddfb478 501 !test_bit(ENTRY_TXD_ENCRYPT_IV, &txdesc.flags)) {
3f787bd6 502 if (test_bit(DRIVER_REQUIRE_COPY_IV, &queue->rt2x00dev->flags))
9eb4e21e 503 rt2x00crypto_tx_copy_iv(skb, &txdesc);
dddfb478 504 else
9eb4e21e 505 rt2x00crypto_tx_remove_iv(skb, &txdesc);
dddfb478 506 }
2bb057d0 507
93354cbb
ID
508 /*
509 * When DMA allocation is required we should guarentee to the
510 * driver that the DMA is aligned to a 4-byte boundary.
93354cbb
ID
511 * However some drivers require L2 padding to pad the payload
512 * rather then the header. This could be a requirement for
513 * PCI and USB devices, while header alignment only is valid
514 * for PCI devices.
515 */
9f166171 516 if (test_bit(DRIVER_REQUIRE_L2PAD, &queue->rt2x00dev->flags))
daee6c09 517 rt2x00queue_insert_l2pad(entry->skb, txdesc.header_length);
93354cbb 518 else if (test_bit(DRIVER_REQUIRE_DMA, &queue->rt2x00dev->flags))
daee6c09 519 rt2x00queue_align_frame(entry->skb);
9f166171 520
2bb057d0
ID
521 /*
522 * It could be possible that the queue was corrupted and this
0e3de998
ID
523 * call failed. Since we always return NETDEV_TX_OK to mac80211,
524 * this frame will simply be dropped.
2bb057d0 525 */
41086693
HS
526 if (unlikely(queue->rt2x00dev->ops->lib->write_tx_data(entry,
527 &txdesc))) {
0262ab0d 528 clear_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags);
2bb057d0 529 entry->skb = NULL;
0e3de998 530 return -EIO;
6db3786a
ID
531 }
532
d74f5ba4
ID
533 if (test_bit(DRIVER_REQUIRE_DMA, &queue->rt2x00dev->flags))
534 rt2x00queue_map_txskb(queue->rt2x00dev, skb);
535
0262ab0d 536 set_bit(ENTRY_DATA_PENDING, &entry->flags);
6db3786a
ID
537
538 rt2x00queue_index_inc(queue, Q_INDEX);
539 rt2x00queue_write_tx_descriptor(entry, &txdesc);
540
541 return 0;
542}
543
bd88a781 544int rt2x00queue_update_beacon(struct rt2x00_dev *rt2x00dev,
a2c9b652
ID
545 struct ieee80211_vif *vif,
546 const bool enable_beacon)
bd88a781
ID
547{
548 struct rt2x00_intf *intf = vif_to_intf(vif);
549 struct skb_frame_desc *skbdesc;
550 struct txentry_desc txdesc;
551 __le32 desc[16];
552
553 if (unlikely(!intf->beacon))
554 return -ENOBUFS;
555
17512dc3
IP
556 mutex_lock(&intf->beacon_skb_mutex);
557
558 /*
559 * Clean up the beacon skb.
560 */
561 rt2x00queue_free_skb(rt2x00dev, intf->beacon->skb);
562 intf->beacon->skb = NULL;
563
a2c9b652
ID
564 if (!enable_beacon) {
565 rt2x00dev->ops->lib->kill_tx_queue(rt2x00dev, QID_BEACON);
17512dc3 566 mutex_unlock(&intf->beacon_skb_mutex);
a2c9b652
ID
567 return 0;
568 }
569
bd88a781 570 intf->beacon->skb = ieee80211_beacon_get(rt2x00dev->hw, vif);
17512dc3
IP
571 if (!intf->beacon->skb) {
572 mutex_unlock(&intf->beacon_skb_mutex);
bd88a781 573 return -ENOMEM;
17512dc3 574 }
bd88a781
ID
575
576 /*
577 * Copy all TX descriptor information into txdesc,
578 * after that we are free to use the skb->cb array
579 * for our information.
580 */
581 rt2x00queue_create_tx_descriptor(intf->beacon, &txdesc);
582
583 /*
584 * For the descriptor we use a local array from where the
585 * driver can move it to the correct location required for
586 * the hardware.
587 */
588 memset(desc, 0, sizeof(desc));
589
590 /*
591 * Fill in skb descriptor
592 */
593 skbdesc = get_skb_frame_desc(intf->beacon->skb);
594 memset(skbdesc, 0, sizeof(*skbdesc));
595 skbdesc->desc = desc;
596 skbdesc->desc_len = intf->beacon->queue->desc_size;
597 skbdesc->entry = intf->beacon;
598
599 /*
600 * Write TX descriptor into reserved room in front of the beacon.
601 */
602 rt2x00queue_write_tx_descriptor(intf->beacon, &txdesc);
603
604 /*
d61cb266 605 * Send beacon to hardware and enable beacon genaration..
bd88a781
ID
606 */
607 rt2x00dev->ops->lib->write_beacon(intf->beacon);
bd88a781 608
17512dc3
IP
609 mutex_unlock(&intf->beacon_skb_mutex);
610
bd88a781
ID
611 return 0;
612}
613
181d6902 614struct data_queue *rt2x00queue_get_queue(struct rt2x00_dev *rt2x00dev,
e58c6aca 615 const enum data_queue_qid queue)
181d6902
ID
616{
617 int atim = test_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags);
618
a2c9b652
ID
619 if (queue == QID_RX)
620 return rt2x00dev->rx;
621
61448f88 622 if (queue < rt2x00dev->ops->tx_queues && rt2x00dev->tx)
181d6902
ID
623 return &rt2x00dev->tx[queue];
624
625 if (!rt2x00dev->bcn)
626 return NULL;
627
e58c6aca 628 if (queue == QID_BEACON)
181d6902 629 return &rt2x00dev->bcn[0];
e58c6aca 630 else if (queue == QID_ATIM && atim)
181d6902
ID
631 return &rt2x00dev->bcn[1];
632
633 return NULL;
634}
635EXPORT_SYMBOL_GPL(rt2x00queue_get_queue);
636
637struct queue_entry *rt2x00queue_get_entry(struct data_queue *queue,
638 enum queue_index index)
639{
640 struct queue_entry *entry;
5f46c4d0 641 unsigned long irqflags;
181d6902
ID
642
643 if (unlikely(index >= Q_INDEX_MAX)) {
644 ERROR(queue->rt2x00dev,
645 "Entry requested from invalid index type (%d)\n", index);
646 return NULL;
647 }
648
5f46c4d0 649 spin_lock_irqsave(&queue->lock, irqflags);
181d6902
ID
650
651 entry = &queue->entries[queue->index[index]];
652
5f46c4d0 653 spin_unlock_irqrestore(&queue->lock, irqflags);
181d6902
ID
654
655 return entry;
656}
657EXPORT_SYMBOL_GPL(rt2x00queue_get_entry);
658
659void rt2x00queue_index_inc(struct data_queue *queue, enum queue_index index)
660{
5f46c4d0
ID
661 unsigned long irqflags;
662
181d6902
ID
663 if (unlikely(index >= Q_INDEX_MAX)) {
664 ERROR(queue->rt2x00dev,
665 "Index change on invalid index type (%d)\n", index);
666 return;
667 }
668
5f46c4d0 669 spin_lock_irqsave(&queue->lock, irqflags);
181d6902
ID
670
671 queue->index[index]++;
672 if (queue->index[index] >= queue->limit)
673 queue->index[index] = 0;
674
10b6b801
ID
675 if (index == Q_INDEX) {
676 queue->length++;
677 } else if (index == Q_INDEX_DONE) {
678 queue->length--;
55887511 679 queue->count++;
10b6b801 680 }
181d6902 681
5f46c4d0 682 spin_unlock_irqrestore(&queue->lock, irqflags);
181d6902 683}
181d6902
ID
684
685static void rt2x00queue_reset(struct data_queue *queue)
686{
5f46c4d0
ID
687 unsigned long irqflags;
688
689 spin_lock_irqsave(&queue->lock, irqflags);
181d6902
ID
690
691 queue->count = 0;
692 queue->length = 0;
693 memset(queue->index, 0, sizeof(queue->index));
694
5f46c4d0 695 spin_unlock_irqrestore(&queue->lock, irqflags);
181d6902
ID
696}
697
a2c9b652
ID
698void rt2x00queue_stop_queues(struct rt2x00_dev *rt2x00dev)
699{
700 struct data_queue *queue;
701
702 txall_queue_for_each(rt2x00dev, queue)
703 rt2x00dev->ops->lib->kill_tx_queue(rt2x00dev, queue->qid);
704}
705
798b7adb 706void rt2x00queue_init_queues(struct rt2x00_dev *rt2x00dev)
181d6902
ID
707{
708 struct data_queue *queue;
709 unsigned int i;
710
798b7adb 711 queue_for_each(rt2x00dev, queue) {
181d6902
ID
712 rt2x00queue_reset(queue);
713
9c0ab712
ID
714 for (i = 0; i < queue->limit; i++) {
715 queue->entries[i].flags = 0;
716
798b7adb 717 rt2x00dev->ops->lib->clear_entry(&queue->entries[i]);
9c0ab712 718 }
181d6902
ID
719 }
720}
721
722static int rt2x00queue_alloc_entries(struct data_queue *queue,
723 const struct data_queue_desc *qdesc)
724{
725 struct queue_entry *entries;
726 unsigned int entry_size;
727 unsigned int i;
728
729 rt2x00queue_reset(queue);
730
731 queue->limit = qdesc->entry_num;
b869767b 732 queue->threshold = DIV_ROUND_UP(qdesc->entry_num, 10);
181d6902
ID
733 queue->data_size = qdesc->data_size;
734 queue->desc_size = qdesc->desc_size;
735
736 /*
737 * Allocate all queue entries.
738 */
739 entry_size = sizeof(*entries) + qdesc->priv_size;
740 entries = kzalloc(queue->limit * entry_size, GFP_KERNEL);
741 if (!entries)
742 return -ENOMEM;
743
744#define QUEUE_ENTRY_PRIV_OFFSET(__base, __index, __limit, __esize, __psize) \
231be4e9
AB
745 ( ((char *)(__base)) + ((__limit) * (__esize)) + \
746 ((__index) * (__psize)) )
181d6902
ID
747
748 for (i = 0; i < queue->limit; i++) {
749 entries[i].flags = 0;
750 entries[i].queue = queue;
751 entries[i].skb = NULL;
752 entries[i].entry_idx = i;
753 entries[i].priv_data =
754 QUEUE_ENTRY_PRIV_OFFSET(entries, i, queue->limit,
755 sizeof(*entries), qdesc->priv_size);
756 }
757
758#undef QUEUE_ENTRY_PRIV_OFFSET
759
760 queue->entries = entries;
761
762 return 0;
763}
764
c4da0048
GW
765static void rt2x00queue_free_skbs(struct rt2x00_dev *rt2x00dev,
766 struct data_queue *queue)
30caa6e3
GW
767{
768 unsigned int i;
769
770 if (!queue->entries)
771 return;
772
773 for (i = 0; i < queue->limit; i++) {
774 if (queue->entries[i].skb)
c4da0048 775 rt2x00queue_free_skb(rt2x00dev, queue->entries[i].skb);
30caa6e3
GW
776 }
777}
778
c4da0048
GW
779static int rt2x00queue_alloc_rxskbs(struct rt2x00_dev *rt2x00dev,
780 struct data_queue *queue)
30caa6e3
GW
781{
782 unsigned int i;
783 struct sk_buff *skb;
784
785 for (i = 0; i < queue->limit; i++) {
c4da0048 786 skb = rt2x00queue_alloc_rxskb(rt2x00dev, &queue->entries[i]);
30caa6e3 787 if (!skb)
61243d8e 788 return -ENOMEM;
30caa6e3
GW
789 queue->entries[i].skb = skb;
790 }
791
792 return 0;
30caa6e3
GW
793}
794
181d6902
ID
795int rt2x00queue_initialize(struct rt2x00_dev *rt2x00dev)
796{
797 struct data_queue *queue;
798 int status;
799
181d6902
ID
800 status = rt2x00queue_alloc_entries(rt2x00dev->rx, rt2x00dev->ops->rx);
801 if (status)
802 goto exit;
803
804 tx_queue_for_each(rt2x00dev, queue) {
805 status = rt2x00queue_alloc_entries(queue, rt2x00dev->ops->tx);
806 if (status)
807 goto exit;
808 }
809
810 status = rt2x00queue_alloc_entries(rt2x00dev->bcn, rt2x00dev->ops->bcn);
811 if (status)
812 goto exit;
813
30caa6e3
GW
814 if (test_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags)) {
815 status = rt2x00queue_alloc_entries(&rt2x00dev->bcn[1],
816 rt2x00dev->ops->atim);
817 if (status)
818 goto exit;
819 }
181d6902 820
c4da0048 821 status = rt2x00queue_alloc_rxskbs(rt2x00dev, rt2x00dev->rx);
181d6902
ID
822 if (status)
823 goto exit;
824
825 return 0;
826
827exit:
828 ERROR(rt2x00dev, "Queue entries allocation failed.\n");
829
830 rt2x00queue_uninitialize(rt2x00dev);
831
832 return status;
833}
834
835void rt2x00queue_uninitialize(struct rt2x00_dev *rt2x00dev)
836{
837 struct data_queue *queue;
838
c4da0048 839 rt2x00queue_free_skbs(rt2x00dev, rt2x00dev->rx);
30caa6e3 840
181d6902
ID
841 queue_for_each(rt2x00dev, queue) {
842 kfree(queue->entries);
843 queue->entries = NULL;
844 }
845}
846
8f539276
ID
847static void rt2x00queue_init(struct rt2x00_dev *rt2x00dev,
848 struct data_queue *queue, enum data_queue_qid qid)
849{
850 spin_lock_init(&queue->lock);
851
852 queue->rt2x00dev = rt2x00dev;
853 queue->qid = qid;
2af0a570 854 queue->txop = 0;
8f539276
ID
855 queue->aifs = 2;
856 queue->cw_min = 5;
857 queue->cw_max = 10;
858}
859
181d6902
ID
860int rt2x00queue_allocate(struct rt2x00_dev *rt2x00dev)
861{
862 struct data_queue *queue;
863 enum data_queue_qid qid;
864 unsigned int req_atim =
865 !!test_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags);
866
867 /*
868 * We need the following queues:
869 * RX: 1
61448f88 870 * TX: ops->tx_queues
181d6902
ID
871 * Beacon: 1
872 * Atim: 1 (if required)
873 */
61448f88 874 rt2x00dev->data_queues = 2 + rt2x00dev->ops->tx_queues + req_atim;
181d6902
ID
875
876 queue = kzalloc(rt2x00dev->data_queues * sizeof(*queue), GFP_KERNEL);
877 if (!queue) {
878 ERROR(rt2x00dev, "Queue allocation failed.\n");
879 return -ENOMEM;
880 }
881
882 /*
883 * Initialize pointers
884 */
885 rt2x00dev->rx = queue;
886 rt2x00dev->tx = &queue[1];
61448f88 887 rt2x00dev->bcn = &queue[1 + rt2x00dev->ops->tx_queues];
181d6902
ID
888
889 /*
890 * Initialize queue parameters.
891 * RX: qid = QID_RX
892 * TX: qid = QID_AC_BE + index
893 * TX: cw_min: 2^5 = 32.
894 * TX: cw_max: 2^10 = 1024.
565a019a
ID
895 * BCN: qid = QID_BEACON
896 * ATIM: qid = QID_ATIM
181d6902 897 */
8f539276 898 rt2x00queue_init(rt2x00dev, rt2x00dev->rx, QID_RX);
181d6902 899
8f539276
ID
900 qid = QID_AC_BE;
901 tx_queue_for_each(rt2x00dev, queue)
902 rt2x00queue_init(rt2x00dev, queue, qid++);
181d6902 903
565a019a 904 rt2x00queue_init(rt2x00dev, &rt2x00dev->bcn[0], QID_BEACON);
181d6902 905 if (req_atim)
565a019a 906 rt2x00queue_init(rt2x00dev, &rt2x00dev->bcn[1], QID_ATIM);
181d6902
ID
907
908 return 0;
909}
910
911void rt2x00queue_free(struct rt2x00_dev *rt2x00dev)
912{
913 kfree(rt2x00dev->rx);
914 rt2x00dev->rx = NULL;
915 rt2x00dev->tx = NULL;
916 rt2x00dev->bcn = NULL;
917}
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